OV - exec - Loop 610

	Loop Id: 610	Module: exec	Source: par_multi_interp.c:1075-1099	Coverage: 0.78%

0x46ff00 INC	%RCX

0x46ff03 CMP	%RDI,%RCX

0x46ff06 JGE	470250

0x46ff0c MOV	(%R14,%RCX,8),%RDX

0x46ff10 MOV	-0x38(%RBP),%R13

0x46ff14 LEA	(,%RDX,8),%R9

0x46ff1c CMP	%R11,(%R13,%RDX,8)

0x46ff21 JNE	46ff00

0x46ff23 MOV	-0x70(%RBP),%RDI

0x46ff27 LEA	0x8(%R9),%R13

0x46ff2b VMOVQ	%R13,%XMM15

0x46ff30 MOV	(%RDI,%R9,1),%RDX

0x46ff34 MOV	-0x50(%RBP),%RDI

0x46ff38 MOV	0x8(%RDI,%R9,1),%RDI

0x46ff3d ADD	%RDX,%RDI

0x46ff40 CMP	%RDI,%RDX

0x46ff43 JGE	4700bf

0x46ff49 MOV	-0x8(%R15,%R12,1),%R13

0x46ff4e LEA	(%R13,%RDX,8),%RDX

0x46ff53 LEA	(%R13,%RDI,8),%R13

0x46ff58 MOV	%R13,-0x60(%RBP)

0x46ff5c SUB	%RDX,%R13

0x46ff5f SUB	$0x8,%R13

0x46ff63 SHR	$0x3,%R13

0x46ff67 INC	%R13

0x46ff6a AND	$0x3,%R13D

0x46ff6e JE	47000b

0x46ff74 CMP	$0x1,%R13

0x46ff78 JE	46ffd6

0x46ff7a CMP	$0x2,%R13

0x46ff7e JE	46ffab

0x46ff80 VMOVQ	(%RDX),%XMM0

0x46ff84 MOV	-0x40(%RBP),%RDI

0x46ff88 VMOVQ	%XMM0,%R13

0x46ff8d LEA	(%RDI,%R13,8),%R13

0x46ff91 CMP	%RAX,(%R13)

0x46ff95 JE	46ffa7

0x46ff97 MOV	(%R15,%R12,1),%RDI

0x46ff9b VMOVQ	%XMM0,(%RDI,%RSI,8)

0x46ffa0 INC	%RSI

0x46ffa3 MOV	%RAX,(%R13)

0x46ffa7 ADD	$0x8,%RDX

0x46ffab VMOVQ	(%RDX),%XMM3

0x46ffaf MOV	-0x40(%RBP),%RDI

0x46ffb3 VMOVQ	%XMM3,%R13

0x46ffb8 LEA	(%RDI,%R13,8),%R13

0x46ffbc CMP	%RAX,(%R13)

0x46ffc0 JE	46ffd2

0x46ffc2 MOV	(%R15,%R12,1),%RDI

0x46ffc6 VMOVQ	%XMM3,(%RDI,%RSI,8)

0x46ffcb INC	%RSI

0x46ffce MOV	%RAX,(%R13)

0x46ffd2 ADD	$0x8,%RDX

0x46ffd6 VMOVQ	(%RDX),%XMM5

0x46ffda MOV	-0x40(%RBP),%RDI

0x46ffde VMOVQ	%XMM5,%R13

0x46ffe3 LEA	(%RDI,%R13,8),%R13

0x46ffe7 CMP	%RAX,(%R13)

0x46ffeb JE	46fffd

0x46ffed MOV	(%R15,%R12,1),%RDI

0x46fff1 VMOVQ	%XMM5,(%RDI,%RSI,8)

0x46fff6 INC	%RSI

0x46fff9 MOV	%RAX,(%R13)

0x46fffd ADD	$0x8,%RDX

0x470001 CMP	%RDX,-0x60(%RBP)

0x470005 JE	4700bf

0x47000b MOV	%R11,-0xf0(%RBP)

0x470012 MOV	-0x40(%RBP),%R13

0x470016 MOV	%R8,%R11

0x470019 MOV	-0x60(%RBP),%R8

0x47001d VMOVQ	%R9,%XMM2

0x470022 MOV	%RCX,-0xe8(%RBP)

  (612) 0x470029 MOV	(%RDX),%RDI

  (612) 0x47002c LEA	(%R13,%RDI,8),%RCX

  (612) 0x470031 CMP	%RAX,(%RCX)

  (612) 0x470034 JE	470044

  (612) 0x470036 MOV	(%R15,%R12,1),%R9

  (612) 0x47003a MOV	%RDI,(%R9,%RSI,8)

  (612) 0x47003e INC	%RSI

  (612) 0x470041 MOV	%RAX,(%RCX)

  (612) 0x470044 MOV	0x8(%RDX),%RCX

  (612) 0x470048 LEA	0x8(%RDX),%RDI

  (612) 0x47004c LEA	(%R13,%RCX,8),%RDX

  (612) 0x470051 CMP	%RAX,(%RDX)

  (612) 0x470054 JE	470064

  (612) 0x470056 MOV	(%R15,%R12,1),%R9

  (612) 0x47005a MOV	%RCX,(%R9,%RSI,8)

  (612) 0x47005e INC	%RSI

  (612) 0x470061 MOV	%RAX,(%RDX)

  (612) 0x470064 MOV	0x8(%RDI),%RCX

  (612) 0x470068 LEA	(%R13,%RCX,8),%RDX

  (612) 0x47006d CMP	%RAX,(%RDX)

  (612) 0x470070 JE	470080

  (612) 0x470072 MOV	(%R15,%R12,1),%R9

  (612) 0x470076 MOV	%RCX,(%R9,%RSI,8)

  (612) 0x47007a INC	%RSI

  (612) 0x47007d MOV	%RAX,(%RDX)

  (612) 0x470080 MOV	0x10(%RDI),%RCX

  (612) 0x470084 LEA	(%R13,%RCX,8),%RDX

  (612) 0x470089 CMP	%RAX,(%RDX)

  (612) 0x47008c JE	47009c

  (612) 0x47008e MOV	(%R15,%R12,1),%R9

  (612) 0x470092 MOV	%RCX,(%R9,%RSI,8)

  (612) 0x470096 INC	%RSI

  (612) 0x470099 MOV	%RAX,(%RDX)

  (612) 0x47009c LEA	0x18(%RDI),%RDX

  (612) 0x4700a0 CMP	%RDX,%R8

  (612) 0x4700a3 JNE	470029

0x4700a5 MOV	%R11,%R8

0x4700a8 MOV	-0xe8(%RBP),%RCX

0x4700af MOV	-0xf0(%RBP),%R11

0x4700b6 VMOVQ	%XMM2,%R9

0x4700bb MOV	%R13,-0x40(%RBP)

0x4700bf MOV	-0x68(%RBP),%R13

0x4700c3 MOV	-0x48(%RBP),%RDI

0x4700c7 MOV	(%R13,%R9,1),%RDX

0x4700cc VMOVQ	%XMM15,%R9

0x4700d1 MOV	(%RDI,%R9,1),%R13

0x4700d5 ADD	%RDX,%R13

0x4700d8 CMP	%R13,%RDX

0x4700db JGE	470232

0x4700e1 MOV	-0x8(%R10,%R12,1),%RDI

0x4700e6 LEA	(%RDI,%RDX,8),%RDX

0x4700ea LEA	(%RDI,%R13,8),%RDI

0x4700ee MOV	%RDI,%R9

0x4700f1 SUB	%RDX,%R9

0x4700f4 SUB	$0x8,%R9

0x4700f8 SHR	$0x3,%R9

0x4700fc INC	%R9

0x4700ff AND	$0x3,%R9D

0x470103 JE	470193

0x470109 CMP	$0x1,%R9

0x47010d JE	470163

0x47010f CMP	$0x2,%R9

0x470113 JE	47013c

0x470115 VMOVQ	(%RDX),%XMM10

0x470119 VMOVQ	%XMM10,%R13

0x47011e LEA	(%RBX,%R13,8),%R9

0x470122 CMP	%RAX,(%R9)

0x470125 JE	470138

0x470127 MOV	(%R10,%R12,1),%R13

0x47012b VMOVQ	%XMM10,(%R13,%R8,8)

0x470132 INC	%R8

0x470135 MOV	%RAX,(%R9)

0x470138 ADD	$0x8,%RDX

0x47013c VMOVQ	(%RDX),%XMM11

0x470140 VMOVQ	%XMM11,%R9

0x470145 LEA	(%RBX,%R9,8),%R9

0x470149 CMP	%RAX,(%R9)

0x47014c JE	47015f

0x47014e MOV	(%R10,%R12,1),%R13

0x470152 VMOVQ	%XMM11,(%R13,%R8,8)

0x470159 INC	%R8

0x47015c MOV	%RAX,(%R9)

0x47015f ADD	$0x8,%RDX

0x470163 VMOVQ	(%RDX),%XMM12

0x470167 VMOVQ	%XMM12,%R9

0x47016c LEA	(%RBX,%R9,8),%R9

0x470170 CMP	%RAX,(%R9)

0x470173 JE	470186

0x470175 MOV	(%R10,%R12,1),%R13

0x470179 VMOVQ	%XMM12,(%R13,%R8,8)

0x470180 INC	%R8

0x470183 MOV	%RAX,(%R9)

0x470186 ADD	$0x8,%RDX

0x47018a CMP	%RDI,%RDX

0x47018d JE	470232

0x470193 MOV	-0x40(%RBP),%R13

0x470197 MOV	%R11,-0xe8(%RBP)

0x47019e MOV	%RCX,%R11

0x4701a1 MOV	%RDI,%RCX

0x4701a4 MOV	%RSI,-0x60(%RBP)

  (611) 0x4701a8 MOV	(%RDX),%R9

  (611) 0x4701ab LEA	(%RBX,%R9,8),%RDI

  (611) 0x4701af CMP	%RAX,(%RDI)

  (611) 0x4701b2 JE	4701c2

  (611) 0x4701b4 MOV	(%R10,%R12,1),%RSI

  (611) 0x4701b8 MOV	%R9,(%RSI,%R8,8)

  (611) 0x4701bc INC	%R8

  (611) 0x4701bf MOV	%RAX,(%RDI)

  (611) 0x4701c2 MOV	0x8(%RDX),%RDI

  (611) 0x4701c6 LEA	0x8(%RDX),%R9

  (611) 0x4701ca LEA	(%RBX,%RDI,8),%RDX

  (611) 0x4701ce CMP	%RAX,(%RDX)

  (611) 0x4701d1 JE	4701e1

  (611) 0x4701d3 MOV	(%R10,%R12,1),%RSI

  (611) 0x4701d7 MOV	%RDI,(%RSI,%R8,8)

  (611) 0x4701db INC	%R8

  (611) 0x4701de MOV	%RAX,(%RDX)

  (611) 0x4701e1 MOV	0x8(%R9),%RDI

  (611) 0x4701e5 LEA	(%RBX,%RDI,8),%RDX

  (611) 0x4701e9 CMP	%RAX,(%RDX)

  (611) 0x4701ec JE	4701fc

  (611) 0x4701ee MOV	(%R10,%R12,1),%RSI

  (611) 0x4701f2 MOV	%RDI,(%RSI,%R8,8)

  (611) 0x4701f6 INC	%R8

  (611) 0x4701f9 MOV	%RAX,(%RDX)

  (611) 0x4701fc MOV	0x10(%R9),%RDI

  (611) 0x470200 LEA	(%RBX,%RDI,8),%RDX

  (611) 0x470204 CMP	%RAX,(%RDX)

  (611) 0x470207 JE	470217

  (611) 0x470209 MOV	(%R10,%R12,1),%RSI

  (611) 0x47020d MOV	%RDI,(%RSI,%R8,8)

  (611) 0x470211 INC	%R8

  (611) 0x470214 MOV	%RAX,(%RDX)

  (611) 0x470217 LEA	0x18(%R9),%RDX

  (611) 0x47021b CMP	%RCX,%RDX

  (611) 0x47021e JNE	4701a8

0x470220 MOV	%R11,%RCX

0x470223 MOV	-0x60(%RBP),%RSI

0x470227 MOV	-0xe8(%RBP),%R11

0x47022e MOV	%R13,-0x40(%RBP)

0x470232 VMOVQ	%XMM13,%R13

0x470237 INC	%RCX

0x47023a MOV	(%R13),%RDI

0x47023e CMP	%RDI,%RCX

0x470241 JL	46ff0c

/home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 1075 - 1099

--------------------------------------------------------------------------------

1075:              for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++)

1076:              {

1077:                 j1 = S_diag_j[j];

1078:                 if (assigned[j1] == pass-1)

1079:                 {

1080:                    j_start = P_diag_start[j1];

1081:                    j_end = j_start+P_diag_i[j1+1];

1082:                    for (k=j_start; k < j_end; k++)

1083:                    {

1084:                       k1 = P_diag_pass[pass-1][k];

1085:                       if (P_marker[k1] != -i1-1)

1086:                       {

1087:                           P_diag_pass[pass][cnt_nz++] = k1;

1088:                           P_marker[k1] = -i1-1;

1089:                       }

1090:                    }

1091:                    j_start = P_offd_start[j1];

1092:                    j_end = j_start+P_offd_i[j1+1];

1093:                    for (k=j_start; k < j_end; k++)

1094:                    {

1095:                       k1 = P_offd_pass[pass-1][k];

1096:                       if (P_marker_offd[k1] != -i1-1)

1097:                       {

1098:                          P_offd_pass[pass][cnt_nz_offd++] = k1;

1099:                          P_marker_offd[k1] = -i1-1;

Coverage (%)	Name	Source Location	Module
►96.96+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►3.02+	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	hypre_BoomerAMGBuildMultipass	par_multi_interp.c:891	exec
○	hypre_BoomerAMGSetup	par_amg_setup.c:737	exec
○	hypre_PCGSetup	pcg.c:234	exec
○	main	amg.c:398	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	amg.c:253	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Metric	Value
CQA speedup if no scalar integer	2.36
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	8.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.16
Bottlenecks	micro-operation queue,
Function	hypre_BoomerAMGBuildMultipass._omp_fn.5
Source	par_multi_interp.c:1075-1075,par_multi_interp.c:1078-1088,par_multi_interp.c:1091-1099
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	18.00
CQA cycles if no scalar integer	7.63
CQA cycles if FP arith vectorized	18.00
CQA cycles if fully vectorized	2.25
Front-end cycles	18.00
P0 cycles	12.50
P1 cycles	12.50
P2 cycles	12.50
P3 cycles	12.50
P4 cycles	12.50
P5 cycles	12.50
P6 cycles	15.50
P7 cycles	15.50
P8 cycles	15.50
P9 cycles	15.50
P10 cycles	0.00
P11 cycles	0.00
P12 cycles	0.00
P13 cycles	0.00
P14 cycles	7.50
P15 cycles	7.50
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	145.00
Nb uops	144.00
Nb loads	45.00
Nb stores	19.00
Nb stack references	9.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	27.56
Bytes prefetched	0.00
Bytes loaded	344.00
Bytes stored	152.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	12.50
Vector-efficiency ratio load	12.50
Vector-efficiency ratio store	12.50
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	12.50

Metric	Value
CQA speedup if no scalar integer	2.36
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	8.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.16
Bottlenecks	micro-operation queue,
Function	hypre_BoomerAMGBuildMultipass._omp_fn.5
Source	par_multi_interp.c:1075-1075,par_multi_interp.c:1078-1088,par_multi_interp.c:1091-1099
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	18.00
CQA cycles if no scalar integer	7.63
CQA cycles if FP arith vectorized	18.00
CQA cycles if fully vectorized	2.25
Front-end cycles	18.00
P0 cycles	12.50
P1 cycles	12.50
P2 cycles	12.50
P3 cycles	12.50
P4 cycles	12.50
P5 cycles	12.50
P6 cycles	15.50
P7 cycles	15.50
P8 cycles	15.50
P9 cycles	15.50
P10 cycles	0.00
P11 cycles	0.00
P12 cycles	0.00
P13 cycles	0.00
P14 cycles	7.50
P15 cycles	7.50
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	145.00
Nb uops	144.00
Nb loads	45.00
Nb stores	19.00
Nb stack references	9.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	27.56
Bytes prefetched	0.00
Bytes loaded	344.00
Bytes stored	152.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	12.50
Vector-efficiency ratio load	12.50
Vector-efficiency ratio store	12.50
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	12.50

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	hypre_BoomerAMGBuildMultipass._omp_fn.5
Source file and lines	par_multi_interp.c:1075-1099
Module	exec

The loop is defined in /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1075-1099.

Analyzed code is defined in /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1075,1078-1088,1091-1099.

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Too many paths. If you really need to analyze all of the 65026 paths individually, rerun with max-paths=65026
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 65026 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 18.00 to 7.63 cycles (2.36x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your loop is not vectorized. 8 data elements could be processed at once in vector registers. By vectorizing your loop, you can lower the cost of an iteration from 18.00 to 2.25 cycles (8.00x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This loop is probably writing/copying data or processing integer elements.

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 344 bytes. The binary loop is storing 152 bytes.

General properties

nb instructions	145
nb uops	144
loop length	595
used x86 registers	15
used mmx registers	0
used xmm registers	9
used ymm registers	0
used zmm registers	0
nb stack references	9

Front-end

ASSUMED MACRO FUSION FIT IN UOP CACHE

micro-operation queue	18.00 cycles
front end	18.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	12.50	12.50	12.50	12.50	12.50	12.50	15.50	15.50	15.50	15.50	0.00	0.00	0.00	0.00	7.50	7.50
cycles	12.50	12.50	12.50	12.50	12.50	12.50	15.50	15.50	15.50	15.50	0.00	0.00	0.00	0.00	7.50	7.50

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	18.00
Dispatch	15.50
Overall L1	18.00

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 18.00 cycles. At this rate:

7% of peak load performance is reached (19.11 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
6% of peak store performance is reached (8.44 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 18.00 to 15.50 cycles (1.16x speedup).

ASM code

In the binary file, the address of the loop is: 46ff0c

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P14	P15	Latency	Recip. throughput	Vectorization
INC %RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP %RDI,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JGE 470250 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x1240>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV (%R14,%RCX,8),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV -0x38(%RBP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
LEA (,%RDX,8),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
CMP %R11,(%R13,%RDX,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JNE 46ff00 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xef0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x70(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
LEA 0x8(%R9),%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
VMOVQ %R13,%XMM15	1	0	0	1	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
MOV (%RDI,%R9,1),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV -0x50(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV 0x8(%RDI,%R9,1),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
ADD %RDX,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP %RDI,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JGE 4700bf <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x10af>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x8(%R15,%R12,1),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
LEA (%R13,%RDX,8),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
LEA (%R13,%RDI,8),%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
MOV %R13,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
SUB %RDX,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
SUB $0x8,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
SHR $0x3,%R13	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33	N/A
INC %R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
AND $0x3,%R13D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JE 47000b <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xffb>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x1,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 46ffd6 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xfc6>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x2,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 46ffab <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xf9b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
VMOVQ (%RDX),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MOV -0x40(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VMOVQ %XMM0,%R13	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
LEA (%RDI,%R13,8),%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
CMP %RAX,(%R13)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 46ffa7 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xf97>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV (%R15,%R12,1),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VMOVQ %XMM0,(%RDI,%RSI,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	1	0.50	scal (12.5%)
INC %RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,(%R13)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
ADD $0x8,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
VMOVQ (%RDX),%XMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MOV -0x40(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VMOVQ %XMM3,%R13	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
LEA (%RDI,%R13,8),%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
CMP %RAX,(%R13)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 46ffd2 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xfc2>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV (%R15,%R12,1),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VMOVQ %XMM3,(%RDI,%RSI,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	1	0.50	scal (12.5%)
INC %RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,(%R13)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
ADD $0x8,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
VMOVQ (%RDX),%XMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MOV -0x40(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VMOVQ %XMM5,%R13	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
LEA (%RDI,%R13,8),%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
CMP %RAX,(%R13)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 46fffd <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xfed>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV (%R15,%R12,1),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VMOVQ %XMM5,(%RDI,%RSI,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	1	0.50	scal (12.5%)
INC %RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,(%R13)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
ADD $0x8,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP %RDX,-0x60(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 4700bf <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x10af>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R11,-0xf0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
MOV -0x40(%RBP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV %R8,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV -0x60(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VMOVQ %R9,%XMM2	1	0	0	1	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
MOV %RCX,-0xe8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
MOV %R11,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0xe8(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV -0xf0(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (12.5%)
VMOVQ %XMM2,%R9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %R13,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
MOV -0x68(%RBP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV -0x48(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV (%R13,%R9,1),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VMOVQ %XMM15,%R9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV (%RDI,%R9,1),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
ADD %RDX,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP %R13,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JGE 470232 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x1222>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x8(%R10,%R12,1),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
LEA (%RDI,%RDX,8),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
LEA (%RDI,%R13,8),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
MOV %RDI,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %RDX,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
SUB $0x8,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
SHR $0x3,%R9	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33	N/A
INC %R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
AND $0x3,%R9D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JE 470193 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x1183>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x1,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 470163 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x1153>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x2,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 47013c <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x112c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
VMOVQ (%RDX),%XMM10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
VMOVQ %XMM10,%R13	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
LEA (%RBX,%R13,8),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
CMP %RAX,(%R9)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 470138 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x1128>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV (%R10,%R12,1),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VMOVQ %XMM10,(%R13,%R8,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	1	0.50	scal (12.5%)
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,(%R9)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
ADD $0x8,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
VMOVQ (%RDX),%XMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
VMOVQ %XMM11,%R9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
LEA (%RBX,%R9,8),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
CMP %RAX,(%R9)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 47015f <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x114f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV (%R10,%R12,1),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VMOVQ %XMM11,(%R13,%R8,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	1	0.50	scal (12.5%)
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,(%R9)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
ADD $0x8,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
VMOVQ (%RDX),%XMM12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
VMOVQ %XMM12,%R9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
LEA (%RBX,%R9,8),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
CMP %RAX,(%R9)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 470186 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x1176>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV (%R10,%R12,1),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VMOVQ %XMM12,(%R13,%R8,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	1	0.50	scal (12.5%)
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,(%R9)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
ADD $0x8,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP %RDI,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 470232 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x1222>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x40(%RBP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV %R11,-0xe8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
MOV %RCX,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSI,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
MOV %R11,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x60(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV -0xe8(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (12.5%)
MOV %R13,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
VMOVQ %XMM13,%R13	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
INC %RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV (%R13),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
CMP %RDI,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JL 46ff0c <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xefc>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A

Function	hypre_BoomerAMGBuildMultipass._omp_fn.5
Source file and lines	par_multi_interp.c:1075-1099
Module	exec

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Too many paths. If you really need to analyze all of the 65026 paths individually, rerun with max-paths=65026
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 18.00 to 7.63 cycles (2.36x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This loop is probably writing/copying data or processing integer elements.

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 344 bytes. The binary loop is storing 152 bytes.

General properties

nb instructions	145
nb uops	144
loop length	595
used x86 registers	15
used mmx registers	0
used xmm registers	9
used ymm registers	0
used zmm registers	0
nb stack references	9

Front-end

ASSUMED MACRO FUSION FIT IN UOP CACHE

micro-operation queue	18.00 cycles
front end	18.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	12.50	12.50	12.50	12.50	12.50	12.50	15.50	15.50	15.50	15.50	0.00	0.00	0.00	0.00	7.50	7.50
cycles	12.50	12.50	12.50	12.50	12.50	12.50	15.50	15.50	15.50	15.50	0.00	0.00	0.00	0.00	7.50	7.50

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	18.00
Dispatch	15.50
Overall L1	18.00

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 18.00 cycles. At this rate:

7% of peak load performance is reached (19.11 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
6% of peak store performance is reached (8.44 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the loop is: 46ff0c

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P14	P15	Latency	Recip. throughput	Vectorization
INC %RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP %RDI,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JGE 470250 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x1240>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV (%R14,%RCX,8),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV -0x38(%RBP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
LEA (,%RDX,8),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
CMP %R11,(%R13,%RDX,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JNE 46ff00 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xef0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x70(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
LEA 0x8(%R9),%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
VMOVQ %R13,%XMM15	1	0	0	1	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
MOV (%RDI,%R9,1),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV -0x50(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV 0x8(%RDI,%R9,1),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
ADD %RDX,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP %RDI,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JGE 4700bf <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x10af>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x8(%R15,%R12,1),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
LEA (%R13,%RDX,8),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
LEA (%R13,%RDI,8),%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
MOV %R13,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
SUB %RDX,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
SUB $0x8,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
SHR $0x3,%R13	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33	N/A
INC %R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
AND $0x3,%R13D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JE 47000b <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xffb>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x1,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 46ffd6 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xfc6>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x2,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 46ffab <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xf9b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
VMOVQ (%RDX),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MOV -0x40(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VMOVQ %XMM0,%R13	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
LEA (%RDI,%R13,8),%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
CMP %RAX,(%R13)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 46ffa7 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xf97>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV (%R15,%R12,1),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VMOVQ %XMM0,(%RDI,%RSI,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	1	0.50	scal (12.5%)
INC %RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,(%R13)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
ADD $0x8,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
VMOVQ (%RDX),%XMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MOV -0x40(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VMOVQ %XMM3,%R13	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
LEA (%RDI,%R13,8),%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
CMP %RAX,(%R13)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 46ffd2 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xfc2>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV (%R15,%R12,1),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VMOVQ %XMM3,(%RDI,%RSI,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	1	0.50	scal (12.5%)
INC %RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,(%R13)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
ADD $0x8,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
VMOVQ (%RDX),%XMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MOV -0x40(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VMOVQ %XMM5,%R13	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
LEA (%RDI,%R13,8),%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
CMP %RAX,(%R13)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 46fffd <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xfed>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV (%R15,%R12,1),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VMOVQ %XMM5,(%RDI,%RSI,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	1	0.50	scal (12.5%)
INC %RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,(%R13)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
ADD $0x8,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP %RDX,-0x60(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 4700bf <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x10af>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R11,-0xf0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
MOV -0x40(%RBP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV %R8,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV -0x60(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VMOVQ %R9,%XMM2	1	0	0	1	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
MOV %RCX,-0xe8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
MOV %R11,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0xe8(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV -0xf0(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (12.5%)
VMOVQ %XMM2,%R9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %R13,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
MOV -0x68(%RBP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV -0x48(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV (%R13,%R9,1),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VMOVQ %XMM15,%R9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV (%RDI,%R9,1),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
ADD %RDX,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP %R13,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JGE 470232 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x1222>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x8(%R10,%R12,1),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
LEA (%RDI,%RDX,8),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
LEA (%RDI,%R13,8),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
MOV %RDI,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %RDX,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
SUB $0x8,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
SHR $0x3,%R9	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33	N/A
INC %R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
AND $0x3,%R9D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JE 470193 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x1183>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x1,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 470163 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x1153>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x2,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 47013c <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x112c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
VMOVQ (%RDX),%XMM10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
VMOVQ %XMM10,%R13	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
LEA (%RBX,%R13,8),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
CMP %RAX,(%R9)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 470138 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x1128>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV (%R10,%R12,1),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VMOVQ %XMM10,(%R13,%R8,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	1	0.50	scal (12.5%)
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,(%R9)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
ADD $0x8,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
VMOVQ (%RDX),%XMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
VMOVQ %XMM11,%R9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
LEA (%RBX,%R9,8),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
CMP %RAX,(%R9)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 47015f <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x114f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV (%R10,%R12,1),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VMOVQ %XMM11,(%R13,%R8,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	1	0.50	scal (12.5%)
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,(%R9)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
ADD $0x8,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
VMOVQ (%RDX),%XMM12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
VMOVQ %XMM12,%R9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
LEA (%RBX,%R9,8),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
CMP %RAX,(%R9)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 470186 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x1176>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV (%R10,%R12,1),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VMOVQ %XMM12,(%R13,%R8,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	1	0.50	scal (12.5%)
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,(%R9)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
ADD $0x8,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP %RDI,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 470232 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x1222>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x40(%RBP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV %R11,-0xe8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
MOV %RCX,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSI,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
MOV %R11,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x60(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV -0xe8(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (12.5%)
MOV %R13,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
VMOVQ %XMM13,%R13	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
INC %RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV (%R13),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
CMP %RDI,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JL 46ff0c <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xefc>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code