OV - exec - Loop 2856

	Loop Id: 2856	Module: exec	Source: IJMatrix_parcsr.c:3383-3454 [...]	Coverage: 0.89%

0x5793c0 MOV	(%R15,%R13,8),%RAX

0x5793c4 CMP	%RAX,%R14

0x5793c7 JG	5795c0

0x5793cd CMP	%RAX,0x108(%RSP)

0x5793d5 JL	5795c0

0x5793db MOV	0xc8(%RSP),%R12

0x5793e3 MOV	(%R12,%R10,1),%R8

0x5793e7 CMP	%R8,%RDI

0x5793ea JLE	57950e

0x5793f0 MOV	%RDI,%R12

0x5793f3 SUB	%R8,%R12

0x5793f6 AND	$0x7,%R12D

0x5793fa JE	579488

0x579400 CMP	$0x1,%R12

0x579404 JE	579472

0x579406 CMP	$0x2,%R12

0x57940a JE	579465

0x57940c CMP	$0x3,%R12

0x579410 JE	579458

0x579412 CMP	$0x4,%R12

0x579416 JE	57944b

0x579418 CMP	$0x5,%R12

0x57941c JE	57943e

0x57941e CMP	$0x6,%R12

0x579422 JE	579431

0x579424 CMP	(%RBX,%R8,8),%RAX

0x579428 JE	579760

0x57942e INC	%R8

0x579431 CMP	(%RBX,%R8,8),%RAX

0x579435 JE	579760

0x57943b INC	%R8

0x57943e CMP	(%RBX,%R8,8),%RAX

0x579442 JE	579760

0x579448 INC	%R8

0x57944b CMP	(%RBX,%R8,8),%RAX

0x57944f JE	579760

0x579455 INC	%R8

0x579458 CMP	(%RBX,%R8,8),%RAX

0x57945c JE	579760

0x579462 INC	%R8

0x579465 CMP	(%RBX,%R8,8),%RAX

0x579469 JE	579760

0x57946f INC	%R8

0x579472 CMP	(%RBX,%R8,8),%RAX

0x579476 JE	579760

0x57947c INC	%R8

0x57947f CMP	%R8,%RDI

0x579482 JE	57950e

  (2858) 0x579488 CMP	(%RBX,%R8,8),%RAX

  (2858) 0x57948c JE	579760

  (2858) 0x579492 LEA	0x1(%R8),%R12

  (2858) 0x579496 MOV	%R12,%R8

  (2858) 0x579499 CMP	(%RBX,%R12,8),%RAX

  (2858) 0x57949d JE	579760

  (2858) 0x5794a3 INC	%R8

  (2858) 0x5794a6 CMP	(%RBX,%R8,8),%RAX

  (2858) 0x5794aa JE	579760

  (2858) 0x5794b0 LEA	0x2(%R12),%R8

  (2858) 0x5794b5 CMP	0x10(%RBX,%R12,8),%RAX

  (2858) 0x5794ba JE	579760

  (2858) 0x5794c0 LEA	0x3(%R12),%R8

  (2858) 0x5794c5 CMP	0x18(%RBX,%R12,8),%RAX

  (2858) 0x5794ca JE	579760

  (2858) 0x5794d0 LEA	0x4(%R12),%R8

  (2858) 0x5794d5 CMP	0x20(%RBX,%R12,8),%RAX

  (2858) 0x5794da JE	579760

  (2858) 0x5794e0 LEA	0x5(%R12),%R8

  (2858) 0x5794e5 CMP	0x28(%RBX,%R12,8),%RAX

  (2858) 0x5794ea JE	579760

  (2858) 0x5794f0 LEA	0x6(%R12),%R8

  (2858) 0x5794f5 CMP	0x30(%RBX,%R12,8),%RAX

  (2858) 0x5794fa JE	579760

  (2858) 0x579500 LEA	0x7(%R12),%R8

  (2858) 0x579505 CMP	%R8,%RDI

  (2858) 0x579508 JNE	579488

0x57950e MOV	0x118(%RSP),%R12

0x579516 CMP	%R12,0xa0(%RSP)

0x57951e JLE	57a332

0x579524 LEA	(,%R12,8),%R8

0x57952c INC	%R12

0x57952f VMOVSD	(%R9,%R13,8),%XMM0

0x579535 MOV	%RAX,(%RBX,%R8,1)

0x579539 MOV	0xb8(%RSP),%RAX

0x579541 MOV	%R12,0x118(%RSP)

0x579549 VMOVSD	%XMM0,(%RAX,%R8,1)

0x57954f NOP

0x579550 INC	%R13

0x579553 CMP	%RCX,%R13

0x579556 JNE	5793c0

0x5795c0 MOV	0x110(%RSP),%R8

0x5795c8 MOV	(%R8,%R10,1),%R8

0x5795cc CMP	%R8,%RDX

0x5795cf JLE	5796e3

0x5795d5 MOV	%RDX,%R12

0x5795d8 SUB	%R8,%R12

0x5795db AND	$0x7,%R12D

0x5795df JE	579669

0x5795e5 CMP	$0x1,%R12

0x5795e9 JE	579657

0x5795eb CMP	$0x2,%R12

0x5795ef JE	57964a

0x5795f1 CMP	$0x3,%R12

0x5795f5 JE	57963d

0x5795f7 CMP	$0x4,%R12

0x5795fb JE	579630

0x5795fd CMP	$0x5,%R12

0x579601 JE	579623

0x579603 CMP	$0x6,%R12

0x579607 JE	579616

0x579609 CMP	(%RSI,%R8,8),%RAX

0x57960d JE	579740

0x579613 INC	%R8

0x579616 CMP	(%RSI,%R8,8),%RAX

0x57961a JE	579740

0x579620 INC	%R8

0x579623 CMP	(%RSI,%R8,8),%RAX

0x579627 JE	579740

0x57962d INC	%R8

0x579630 CMP	(%RSI,%R8,8),%RAX

0x579634 JE	579740

0x57963a INC	%R8

0x57963d CMP	(%RSI,%R8,8),%RAX

0x579641 JE	579740

0x579647 INC	%R8

0x57964a CMP	(%RSI,%R8,8),%RAX

0x57964e JE	579740

0x579654 INC	%R8

0x579657 CMP	(%RSI,%R8,8),%RAX

0x57965b JE	579740

0x579661 INC	%R8

0x579664 CMP	%R8,%RDX

0x579667 JE	5796e3

  (2857) 0x579669 CMP	(%RSI,%R8,8),%RAX

  (2857) 0x57966d JE	579740

  (2857) 0x579673 LEA	0x1(%R8),%R12

  (2857) 0x579677 MOV	%R12,%R8

  (2857) 0x57967a CMP	(%RSI,%R12,8),%RAX

  (2857) 0x57967e JE	579740

  (2857) 0x579684 INC	%R8

  (2857) 0x579687 CMP	(%RSI,%R8,8),%RAX

  (2857) 0x57968b JE	579740

  (2857) 0x579691 LEA	0x2(%R12),%R8

  (2857) 0x579696 CMP	0x10(%RSI,%R12,8),%RAX

  (2857) 0x57969b JE	579740

  (2857) 0x5796a1 LEA	0x3(%R12),%R8

  (2857) 0x5796a6 CMP	0x18(%RSI,%R12,8),%RAX

  (2857) 0x5796ab JE	579740

  (2857) 0x5796b1 LEA	0x4(%R12),%R8

  (2857) 0x5796b6 CMP	0x20(%RSI,%R12,8),%RAX

  (2857) 0x5796bb JE	579740

  (2857) 0x5796c1 LEA	0x5(%R12),%R8

  (2857) 0x5796c6 CMP	0x28(%RSI,%R12,8),%RAX

  (2857) 0x5796cb JE	579740

  (2857) 0x5796cd LEA	0x6(%R12),%R8

  (2857) 0x5796d2 CMP	0x30(%RSI,%R12,8),%RAX

  (2857) 0x5796d7 JE	579740

  (2857) 0x5796d9 LEA	0x7(%R12),%R8

  (2857) 0x5796de CMP	%R8,%RDX

  (2857) 0x5796e1 JNE	579669

0x5796e3 CMP	%R11,0xb0(%RSP)

0x5796eb JLE	57a234

0x5796f1 MOV	0x100(%RSP),%R8

0x5796f9 LEA	(,%R11,8),%R12

0x579701 VMOVSD	(%R9,%R13,8),%XMM2

0x579707 INC	%R11

0x57970a MOV	%RAX,(%RSI,%R12,1)

0x57970e VMOVSD	%XMM2,(%R8,%R12,1)

0x579714 JMP	579550

0x579740 MOV	0x100(%RSP),%RAX

0x579748 VMOVSD	(%R9,%R13,8),%XMM3

0x57974e VMOVSD	%XMM3,(%RAX,%R8,8)

0x579754 JMP	579550

0x579760 MOV	0xb8(%RSP),%R12

0x579768 VMOVSD	(%R9,%R13,8),%XMM1

0x57976e VMOVSD	%XMM1,(%R12,%R8,8)

0x579774 JMP	579550

/home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/IJ_mv/IJMatrix_parcsr.c: 3383 - 3454

--------------------------------------------------------------------------------

3383:   	          for (i=0; i < n; i++)

3384: 	          {

3385: 	             if (cols[indx] < col_0 || cols[indx] > col_n)

3386:                      /* insert into offd */

3387: 	             {

3388: 	                for (j=offd_i[row_local]; j < offd_indx; j++)

3389: 	                {

3390: 		           if (offd_j[j] == cols[indx])

3391: 		           {

3392:                               offd_data[j] = values[indx];

3393: 		              not_found = 0;

3394: 		              break;

3395: 		           }

3396: 	                }

3397: 	                if (not_found)

3398: 	                {

3399: 	                   if (cnt_offd < offd_space)

3400: 	                   {

3401: 	                      offd_j[cnt_offd] = cols[indx];

3402: 	                      offd_data[cnt_offd++] = values[indx];

[...]

3422: 	                for (j=diag_i[row_local]; j < diag_indx; j++)

3423: 	                {

3424: 		           if (diag_j[j] == cols[indx])

3425: 		           {

3426:                               diag_data[j] = values[indx];

3427: 		              not_found = 0;

3428: 		              break;

3429: 		           }

3430: 	                }

3431: 	                if (not_found)

3432: 	                {

3433: 	                   if (cnt_diag < diag_space)

3434: 	                   {

3435: 	                      diag_j[cnt_diag] = cols[indx];

3436: 	                      diag_data[cnt_diag++] = values[indx];

[...]

3454: 	             indx++;

Coverage (%)	Name	Source Location	Module
►97.00+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►3.00+	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	hypre_IJMatrixSetValuesOMPParC[...]	IJMatrix_parcsr.c:3509	exec
○	BuildIJLaplacian27pt	amg.c:2267	exec
○	main	amg.c:274	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	amg.c:253	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Metric	Value
CQA speedup if no scalar integer	1.32
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	8.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.08
Bottlenecks	P0, P1, P2, P3, P4, P5,
Function	hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1
Source	IJMatrix_parcsr.c:3383-3385,IJMatrix_parcsr.c:3388-3392,IJMatrix_parcsr.c:3397-3402,IJMatrix_parcsr.c:3422-3426,IJMatrix_parcsr.c:3431-3436,IJMatrix_parcsr.c:3454-3454
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	16.33
CQA cycles if no scalar integer	12.33
CQA cycles if FP arith vectorized	16.33
CQA cycles if fully vectorized	2.04
Front-end cycles	15.13
P0 cycles	16.33
P1 cycles	16.33
P2 cycles	16.33
P3 cycles	16.33
P4 cycles	16.33
P5 cycles	16.33
P6 cycles	9.50
P7 cycles	9.50
P8 cycles	9.50
P9 cycles	9.50
P10 cycles	0.00
P11 cycles	0.00
P12 cycles	0.00
P13 cycles	0.00
P14 cycles	2.00
P15 cycles	2.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	122.00
Nb uops	121.00
Nb loads	31.00
Nb stores	7.00
Nb stack references	8.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	18.61
Bytes prefetched	0.00
Bytes loaded	248.00
Bytes stored	56.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	12.50
Vector-efficiency ratio load	12.50
Vector-efficiency ratio store	12.50
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	12.50

Metric	Value
CQA speedup if no scalar integer	1.32
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	8.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.08
Bottlenecks	P0, P1, P2, P3, P4, P5,
Function	hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1
Source	IJMatrix_parcsr.c:3383-3385,IJMatrix_parcsr.c:3388-3392,IJMatrix_parcsr.c:3397-3402,IJMatrix_parcsr.c:3422-3426,IJMatrix_parcsr.c:3431-3436,IJMatrix_parcsr.c:3454-3454
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	16.33
CQA cycles if no scalar integer	12.33
CQA cycles if FP arith vectorized	16.33
CQA cycles if fully vectorized	2.04
Front-end cycles	15.13
P0 cycles	16.33
P1 cycles	16.33
P2 cycles	16.33
P3 cycles	16.33
P4 cycles	16.33
P5 cycles	16.33
P6 cycles	9.50
P7 cycles	9.50
P8 cycles	9.50
P9 cycles	9.50
P10 cycles	0.00
P11 cycles	0.00
P12 cycles	0.00
P13 cycles	0.00
P14 cycles	2.00
P15 cycles	2.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	122.00
Nb uops	121.00
Nb loads	31.00
Nb stores	7.00
Nb stack references	8.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	18.61
Bytes prefetched	0.00
Bytes loaded	248.00
Bytes stored	56.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	12.50
Vector-efficiency ratio load	12.50
Vector-efficiency ratio store	12.50
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	12.50

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1
Source file and lines	IJMatrix_parcsr.c:3383-3454
Module	exec

The loop is defined in /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/IJ_mv/IJMatrix_parcsr.c:3383-3402,3422-3436,3454.

Analyzed code is defined in /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/IJ_mv/IJMatrix_parcsr.c:3383-3385,3388-3392,3397-3402,3422-3426,3431-3436,3454.

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Too many paths. If you really need to analyze all of the 324 paths individually, rerun with max-paths=324
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 324 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 16.33 to 12.33 cycles (1.32x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your loop is not vectorized. 8 data elements could be processed at once in vector registers. By vectorizing your loop, you can lower the cost of an iteration from 16.33 to 2.04 cycles (8.00x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This loop is probably writing/copying data or processing integer elements.

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 248 bytes. The binary loop is storing 56 bytes.

General properties

nb instructions	122
nb uops	121
loop length	551
used x86 registers	15
used mmx registers	0
used xmm registers	4
used ymm registers	0
used zmm registers	0
nb stack references	8

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	15.13 cycles
front end	15.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	16.33	16.33	16.33	16.33	16.33	16.33	9.50	9.50	9.50	9.50	0.00	0.00	0.00	0.00	2.00	2.00
cycles	16.33	16.33	16.33	16.33	16.33	16.33	9.50	9.50	9.50	9.50	0.00	0.00	0.00	0.00	2.00	2.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	15.13
Dispatch	16.33
Overall L1	16.33

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

INT

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	12%

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 16.33 cycles. At this rate:

5% of peak load performance is reached (15.18 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (3.43 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the loop is: 5793c0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P14	P15	Latency	Recip. throughput	Vectorization
MOV (%R15,%R13,8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
CMP %RAX,%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JG 5795c0 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x740>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP %RAX,0x108(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JL 5795c0 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x740>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0xc8(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV (%R12,%R10,1),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
CMP %R8,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JLE 57950e <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x68e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RDI,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %R8,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
AND $0x7,%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JE 579488 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x608>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x1,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 579472 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x5f2>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x2,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 579465 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x5e5>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x3,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 579458 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x5d8>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x4,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 57944b <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x5cb>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x5,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 57943e <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x5be>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x6,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 579431 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x5b1>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP (%RBX,%R8,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 579760 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x8e0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP (%RBX,%R8,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 579760 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x8e0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP (%RBX,%R8,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 579760 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x8e0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP (%RBX,%R8,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 579760 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x8e0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP (%RBX,%R8,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 579760 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x8e0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP (%RBX,%R8,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 579760 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x8e0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP (%RBX,%R8,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 579760 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x8e0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP %R8,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 57950e <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x68e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x118(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
CMP %R12,0xa0(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JLE 57a332 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x14b2>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
LEA (,%R12,8),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
INC %R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
VMOVSD (%R9,%R13,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MOV %RAX,(%RBX,%R8,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
MOV 0xb8(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV %R12,0x118(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
VMOVSD %XMM0,(%RAX,%R8,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	1	0.50	scal (12.5%)
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
INC %R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP %RCX,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 5793c0 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x540>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x110(%RSP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV (%R8,%R10,1),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
CMP %R8,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JLE 5796e3 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x863>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RDX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %R8,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
AND $0x7,%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JE 579669 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x7e9>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x1,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 579657 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x7d7>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x2,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 57964a <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x7ca>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x3,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 57963d <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x7bd>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x4,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 579630 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x7b0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x5,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 579623 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x7a3>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x6,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 579616 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x796>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP (%RSI,%R8,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 579740 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x8c0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP (%RSI,%R8,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 579740 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x8c0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP (%RSI,%R8,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 579740 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x8c0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP (%RSI,%R8,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 579740 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x8c0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP (%RSI,%R8,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 579740 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x8c0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP (%RSI,%R8,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 579740 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x8c0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP (%RSI,%R8,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 579740 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x8c0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP %R8,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 5796e3 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x863>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP %R11,0xb0(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JLE 57a234 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x13b4>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x100(%RSP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
LEA (,%R11,8),%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
VMOVSD (%R9,%R13,8),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
INC %R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,(%RSI,%R12,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
VMOVSD %XMM2,(%R8,%R12,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	1	0.50	scal (12.5%)
JMP 579550 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x6d0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
MOV 0x100(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VMOVSD (%R9,%R13,8),%XMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM3,(%RAX,%R8,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	1	0.50	scal (12.5%)
JMP 579550 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x6d0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
MOV 0xb8(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VMOVSD (%R9,%R13,8),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM1,(%R12,%R8,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	1	0.50	scal (12.5%)
JMP 579550 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x6d0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A

Function	hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1
Source file and lines	IJMatrix_parcsr.c:3383-3454
Module	exec

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Too many paths. If you really need to analyze all of the 324 paths individually, rerun with max-paths=324
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This loop is probably writing/copying data or processing integer elements.

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 248 bytes. The binary loop is storing 56 bytes.

General properties

nb instructions	122
nb uops	121
loop length	551
used x86 registers	15
used mmx registers	0
used xmm registers	4
used ymm registers	0
used zmm registers	0
nb stack references	8

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	15.13 cycles
front end	15.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	16.33	16.33	16.33	16.33	16.33	16.33	9.50	9.50	9.50	9.50	0.00	0.00	0.00	0.00	2.00	2.00
cycles	16.33	16.33	16.33	16.33	16.33	16.33	9.50	9.50	9.50	9.50	0.00	0.00	0.00	0.00	2.00	2.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	15.13
Dispatch	16.33
Overall L1	16.33

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

INT

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	12%

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 16.33 cycles. At this rate:

5% of peak load performance is reached (15.18 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (3.43 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the loop is: 5793c0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P14	P15	Latency	Recip. throughput	Vectorization
MOV (%R15,%R13,8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
CMP %RAX,%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JG 5795c0 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x740>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP %RAX,0x108(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JL 5795c0 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x740>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0xc8(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV (%R12,%R10,1),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
CMP %R8,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JLE 57950e <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x68e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RDI,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %R8,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
AND $0x7,%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JE 579488 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x608>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x1,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 579472 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x5f2>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x2,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 579465 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x5e5>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x3,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 579458 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x5d8>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x4,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 57944b <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x5cb>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x5,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 57943e <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x5be>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x6,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 579431 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x5b1>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP (%RBX,%R8,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 579760 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x8e0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP (%RBX,%R8,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 579760 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x8e0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP (%RBX,%R8,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 579760 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x8e0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP (%RBX,%R8,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 579760 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x8e0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP (%RBX,%R8,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 579760 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x8e0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP (%RBX,%R8,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 579760 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x8e0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP (%RBX,%R8,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 579760 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x8e0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP %R8,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 57950e <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x68e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x118(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
CMP %R12,0xa0(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JLE 57a332 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x14b2>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
LEA (,%R12,8),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
INC %R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
VMOVSD (%R9,%R13,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MOV %RAX,(%RBX,%R8,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
MOV 0xb8(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV %R12,0x118(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
VMOVSD %XMM0,(%RAX,%R8,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	1	0.50	scal (12.5%)
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
INC %R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP %RCX,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 5793c0 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x540>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x110(%RSP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV (%R8,%R10,1),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
CMP %R8,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JLE 5796e3 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x863>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RDX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %R8,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
AND $0x7,%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JE 579669 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x7e9>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x1,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 579657 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x7d7>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x2,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 57964a <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x7ca>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x3,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 57963d <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x7bd>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x4,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 579630 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x7b0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x5,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 579623 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x7a3>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x6,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 579616 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x796>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP (%RSI,%R8,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 579740 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x8c0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP (%RSI,%R8,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 579740 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x8c0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP (%RSI,%R8,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 579740 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x8c0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP (%RSI,%R8,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 579740 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x8c0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP (%RSI,%R8,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 579740 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x8c0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP (%RSI,%R8,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 579740 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x8c0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP (%RSI,%R8,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JE 579740 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x8c0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP %R8,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 5796e3 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x863>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
CMP %R11,0xb0(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
JLE 57a234 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x13b4>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x100(%RSP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
LEA (,%R11,8),%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
VMOVSD (%R9,%R13,8),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
INC %R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,(%RSI,%R12,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
VMOVSD %XMM2,(%R8,%R12,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	1	0.50	scal (12.5%)
JMP 579550 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x6d0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
MOV 0x100(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VMOVSD (%R9,%R13,8),%XMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM3,(%RAX,%R8,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	1	0.50	scal (12.5%)
JMP 579550 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x6d0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
MOV 0xb8(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VMOVSD (%R9,%R13,8),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM1,(%R12,%R8,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	1	0.50	scal (12.5%)
JMP 579550 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x6d0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code