OV - exec - Function hypre_BoomerAMGCreateS._omp

	Function: hypre_BoomerAMGCreateS._omp_fn.1	Module: exec	Source: par_strength.c:246-513 [...]	Coverage (incl. loops): 1.16% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c: 246 - 513

--------------------------------------------------------------------------------

246: #pragma omp parallel private(i,diag,row_scale,row_sum,jA,jS)

247: #endif

248:    {

249:    HYPRE_Int start, stop;

250:    hypre_GetSimpleThreadPartition(&start, &stop, num_variables);

251:    HYPRE_Int jS_diag = 0, jS_offd = 0;

252:

253:    for (i = start; i < stop; i++)

254:    {

255:       S_diag_i[i] = jS_diag;

256:       if (num_cols_offd)

257:       {

258:          S_offd_i[i] = jS_offd;

259:       }

260:

261:       diag = A_diag_data[A_diag_i[i]];

262:

263:       /* compute scaling factor and row sum */

264:       row_scale = 0.0;

265:       row_sum = diag;

266:       if (num_functions > 1)

267:       {

268:          if (diag < 0)

269:          {

270:             for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

271:             {

272:                if (dof_func[i] == dof_func[A_diag_j[jA]])

273:                {

274:                   row_scale = hypre_max(row_scale, A_diag_data[jA]);

275:                   row_sum += A_diag_data[jA];

276:                }

277:             }

278:             for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

279:             {

280:                if (dof_func[i] == dof_func_offd[A_offd_j[jA]])

281:                {

282:                   row_scale = hypre_max(row_scale, A_offd_data[jA]);

283:                   row_sum += A_offd_data[jA];

[...]

289:             for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

290:             {

291:                if (dof_func[i] == dof_func[A_diag_j[jA]])

292:                {

293:                   row_scale = hypre_min(row_scale, A_diag_data[jA]);

294:                   row_sum += A_diag_data[jA];

295:                }

296:             }

297:             for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

298:             {

299:                if (dof_func[i] == dof_func_offd[A_offd_j[jA]])

300:                {

301:                   row_scale = hypre_min(row_scale, A_offd_data[jA]);

302:                   row_sum += A_offd_data[jA];

[...]

309:          if (diag < 0)

310:          {

311:             for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

312:             {

313:                row_scale = hypre_max(row_scale, A_diag_data[jA]);

314:                row_sum += A_diag_data[jA];

315:             }

316:             for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

317:             {

318:                row_scale = hypre_max(row_scale, A_offd_data[jA]);

319:                row_sum += A_offd_data[jA];

320:             }

321:          }

322:          else

323:          {

324:             for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

325:             {

326:                row_scale = hypre_min(row_scale, A_diag_data[jA]);

327:                row_sum += A_diag_data[jA];

328:             }

329:             for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

330:             {

331:                row_scale = hypre_min(row_scale, A_offd_data[jA]);

332:                row_sum += A_offd_data[jA];

333:             }

334:          } /* diag >= 0*/

335:       } /* num_functions <= 1 */

336:

337:       jS_diag += A_diag_i[i + 1] - A_diag_i[i] - 1;

338:       jS_offd += A_offd_i[i + 1] - A_offd_i[i];

339:

340:       /* compute row entries of S */

341:       S_temp_diag_j[A_diag_i[i]] = -1;

342:       if ((fabs(row_sum) > fabs(diag)*max_row_sum) && (max_row_sum < 1.0))

343:       {

344:          /* make all dependencies weak */

345:          for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

346:          {

347:             S_temp_diag_j[jA] = -1;

348:          }

349:          jS_diag -= A_diag_i[i + 1] - (A_diag_i[i] + 1);

350:

351:          for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

352:          {

353:             S_temp_offd_j[jA] = -1;

354:          }

355:          jS_offd -= A_offd_i[i + 1] - A_offd_i[i];

[...]

363:                for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

364:                {

365:                   if (A_diag_data[jA] <= strength_threshold * row_scale

366:                       || dof_func[i] != dof_func[A_diag_j[jA]])

367:                   {

368:                      S_temp_diag_j[jA] = -1;

369:                      --jS_diag;

[...]

376:                for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

377:                {

378:                   if (A_offd_data[jA] <= strength_threshold * row_scale

379:                       || dof_func[i] != dof_func_offd[A_offd_j[jA]])

380:                   {

381:                      S_temp_offd_j[jA] = -1;

382:                      --jS_offd;

[...]

392:                for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

393:                {

394:                   if (A_diag_data[jA] >= strength_threshold * row_scale

395:                       || dof_func[i] != dof_func[A_diag_j[jA]])

396:                   {

397:                      S_temp_diag_j[jA] = -1;

398:                      --jS_diag;

[...]

405:                for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

406:                {

407:                   if (A_offd_data[jA] >= strength_threshold * row_scale

408:                       || dof_func[i] != dof_func_offd[A_offd_j[jA]])

409:                   {

410:                      S_temp_offd_j[jA] = -1;

411:                      --jS_offd;

[...]

424:                for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

425:                {

426:                   if (A_diag_data[jA] <= strength_threshold * row_scale)

427:                   {

428:                      S_temp_diag_j[jA] = -1;

429:                      --jS_diag;

430:                   }

431:                   else

432:                   {

433:                      S_temp_diag_j[jA] = A_diag_j[jA];

434:                   }

435:                }

436:                for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

437:                {

438:                   if (A_offd_data[jA] <= strength_threshold * row_scale)

439:                   {

440:                      S_temp_offd_j[jA] = -1;

441:                      --jS_offd;

442:                   }

443:                   else

444:                   {

445:                      S_temp_offd_j[jA] = A_offd_j[jA];

[...]

451:                for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

452:                {

453:                   if (A_diag_data[jA] >= strength_threshold * row_scale)

454:                   {

455:                      S_temp_diag_j[jA] = -1;

456:                      --jS_diag;

457:                   }

458:                   else

459:                   {

460:                      S_temp_diag_j[jA] = A_diag_j[jA];

461:                   }

462:                }

463:                for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

464:                {

465:                   if (A_offd_data[jA] >= strength_threshold * row_scale)

466:                   {

467:                      S_temp_offd_j[jA] = -1;

468:                      --jS_offd;

469:                   }

470:                   else

471:                   {

472:                      S_temp_offd_j[jA] = A_offd_j[jA];

[...]

480:    hypre_prefix_sum_pair(&jS_diag, S_diag_i + num_variables, &jS_offd, S_offd_i + num_variables, prefix_sum_workspace);

[...]

492:    for (i = start; i < stop; i++)

493:    {

494:       S_diag_i[i] += jS_diag;

495:       S_offd_i[i] += jS_offd;

496:

497:       jS = S_diag_i[i];

498:       for (jA = A_diag_i[i]; jA < A_diag_i[i+1]; jA++)

499:       {

500:          if (S_temp_diag_j[jA] > -1)

501:          {

502:             S_diag_j[jS]    = S_temp_diag_j[jA];

503:             jS++;

504:          }

505:       }

506:

507:       jS = S_offd_i[i];

508:       for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

509:       {

510:          if (S_temp_offd_j[jA] > -1)

511:          {

512:             S_offd_j[jS]    = S_temp_offd_j[jA];

513:             jS++;

0x507c40 PUSH	%RBP

0x507c41 MOV	%RSP,%RBP

0x507c44 PUSH	%R15

0x507c46 PUSH	%R14

0x507c48 PUSH	%R13

0x507c4a PUSH	%R12

0x507c4c PUSH	%RBX

0x507c4d AND	$-0x20,%RSP

0x507c51 SUB	$0xa0,%RSP

0x507c58 MOV	0x70(%RDI),%RDX

0x507c5c MOV	0x58(%RDI),%R9

0x507c60 MOV	0x88(%RDI),%R8

0x507c67 MOV	0x80(%RDI),%RAX

0x507c6e MOV	0x78(%RDI),%R10

0x507c72 MOV	0x68(%RDI),%RCX

0x507c76 MOV	0x60(%RDI),%RSI

0x507c7a MOV	0x98(%RDI),%R12

0x507c81 MOV	0x90(%RDI),%RBX

0x507c88 MOV	%RDX,0x38(%RSP)

0x507c8d MOV	0x50(%RDI),%RDX

0x507c91 MOV	%R9,0x50(%RSP)

0x507c96 MOV	%R8,0x30(%RSP)

0x507c9b MOV	%RAX,0x68(%RSP)

0x507ca0 MOV	%R10,0x40(%RSP)

0x507ca5 MOV	%RCX,(%RSP)

0x507ca9 MOV	%RSI,0x58(%RSP)

0x507cae LEA	0x88(%RSP),%RSI

0x507cb6 MOV	%RDX,0x8(%RSP)

0x507cbb MOV	0x30(%RDI),%R13

0x507cbf MOV	0x28(%RDI),%R8

0x507cc3 MOV	0x10(%RDI),%R10

0x507cc7 MOV	0x38(%RDI),%R11

0x507ccb MOV	0x20(%RDI),%RAX

0x507ccf VMOVSD	0x8(%RDI),%XMM5

0x507cd4 VMOVSD	(%RDI),%XMM3

0x507cd8 MOV	0x48(%RDI),%R14

0x507cdc MOV	0x40(%RDI),%R15

0x507ce0 VMOVSD	%XMM5,0x70(%RSP)

0x507ce6 VMOVSD	%XMM3,0x78(%RSP)

0x507cec MOV	%R13,0x20(%RSP)

0x507cf1 MOV	0x18(%RDI),%R13

0x507cf5 LEA	0x80(%RSP),%RDI

0x507cfd MOV	%R8,0x60(%RSP)

0x507d02 MOV	%R10,0x48(%RSP)

0x507d07 MOV	%R11,0x28(%RSP)

0x507d0c MOV	%RAX,0x18(%RSP)

0x507d11 CALL	5a9cf0 <hypre_GetSimpleThreadPartition>

0x507d16 VMOVQ	0x88(%RSP),%XMM4

0x507d1f MOV	0x80(%RSP),%RDI

0x507d27 MOV	0x60(%RSP),%R9

0x507d2c MOVQ	$0,0x90(%RSP)

0x507d38 MOV	0x40(%RSP),%R10

0x507d3d MOV	0x30(%RSP),%R8

0x507d42 MOVQ	$0,0x98(%RSP)

0x507d4e VMOVSD	0x78(%RSP),%XMM3

0x507d54 VMOVSD	0x70(%RSP),%XMM5

0x507d5a VMOVQ	%XMM4,%RDX

0x507d5f CMP	%RDX,%RDI

0x507d62 JGE	508446

0x507d68 MOV	0x20(%RSP),%RSI

0x507d6d LEA	(,%RDI,8),%R11

0x507d75 MOV	0x18(%RSP),%RAX

0x507d7a VMOVQ	%R12,%XMM8

0x507d7f VMOVQ	%R8,%XMM18

0x507d85 VMOVQ	%R10,%XMM19

0x507d8b MOV	%R9,%R12

0x507d8e VMOVSD	0xa79b2(%RIP),%XMM0

0x507d96 VMOVQ	%RBX,%XMM7

0x507d9b VCOMISD	%XMM5,%XMM0

0x507d9f MOV	%R14,%R8

0x507da2 SETAB	0x30(%RSP)

0x507da7 MOV	%R15,%R9

0x507daa MOV	%R13,%R10

0x507dad VMOVQ	0xa81eb(%RIP),%XMM2

0x507db5 VXORPD	%XMM6,%XMM6,%XMM6

0x507db9 LEA	(%RSI,%R11,1),%RCX

0x507dbd LEA	0x8(%RAX,%R11,1),%RDX

0x507dc2 MOV	%RCX,0x70(%RSP)

0x507dc7 LEA	0x8(%RSI,%R11,1),%RCX

0x507dcc MOV	0x28(%RSP),%RSI

0x507dd1 MOV	%RDX,0x78(%RSP)

0x507dd6 XOR	%R11D,%R11D

0x507dd9 XOR	%EDX,%EDX

0x507ddb NOPL	(%RAX,%RAX,1)

(1846) 0x507de0 MOV	0x58(%RSP),%RBX

(1846) 0x507de5 CMPQ	$0,0x50(%RSP)

(1846) 0x507deb MOV	%RDX,(%RBX,%RDI,8)

(1846) 0x507def JE	507dfa

(1846) 0x507df1 MOV	0x38(%RSP),%R14

(1846) 0x507df6 MOV	%R11,(%R14,%RDI,8)

(1846) 0x507dfa MOV	0x78(%RSP),%R15

(1846) 0x507dff VMOVQ	-0x8(%R15),%XMM16

(1846) 0x507e06 VMOVQ	%XMM16,%R13

(1846) 0x507e0c VMOVQ	%XMM16,%RAX

(1846) 0x507e12 SAL	$0x3,%R13

(1846) 0x507e16 CMPQ	$0x1,0x48(%RSP)

(1846) 0x507e1c VMOVQ	%R13,%XMM17

(1846) 0x507e22 VMOVSD	(%R12,%R13,1),%XMM1

(1846) 0x507e28 LEA	0x1(%RAX),%R14

(1846) 0x507e2c MOV	(%R15),%R13

(1846) 0x507e2f JLE	508590

(1846) 0x507e35 VCOMISD	%XMM1,%XMM6

(1846) 0x507e39 JA	508b90

(1846) 0x507e3f CMP	%R13,%R14

(1846) 0x507e42 JGE	50983f

(1846) 0x507e48 MOV	%R13,%RAX

(1846) 0x507e4b MOV	(%R10,%RDI,8),%RBX

(1846) 0x507e4f VMOVAPD	%XMM1,%XMM9

(1846) 0x507e53 VXORPD	%XMM0,%XMM0,%XMM0

(1846) 0x507e57 SUB	%R14,%RAX

(1846) 0x507e5a AND	$0x7,%EAX

(1846) 0x507e5d JE	507f57

(1846) 0x507e63 CMP	$0x1,%RAX

(1846) 0x507e67 JE	507f31

(1846) 0x507e6d CMP	$0x2,%RAX

(1846) 0x507e71 JE	507f14

(1846) 0x507e77 CMP	$0x3,%RAX

(1846) 0x507e7b JE	507ef7

(1846) 0x507e7d CMP	$0x4,%RAX

(1846) 0x507e81 JE	507eda

(1846) 0x507e83 CMP	$0x5,%RAX

(1846) 0x507e87 JE	507ebd

(1846) 0x507e89 CMP	$0x6,%RAX

(1846) 0x507e8d JE	507eac

(1846) 0x507e8f MOV	(%R9,%R14,8),%R15

(1846) 0x507e93 CMP	(%R10,%R15,8),%RBX

(1846) 0x507e97 JNE	507ea9

(1846) 0x507e99 VMOVSD	(%R12,%R14,8),%XMM11

(1846) 0x507e9f VMINSD	%XMM11,%XMM0,%XMM0

(1846) 0x507ea4 VADDSD	%XMM11,%XMM1,%XMM9

(1846) 0x507ea9 INC	%R14

(1846) 0x507eac MOV	(%R9,%R14,8),%RAX

(1846) 0x507eb0 CMP	(%R10,%RAX,8),%RBX

(1846) 0x507eb4 JE	5097f1

(1846) 0x507eba INC	%R14

(1846) 0x507ebd MOV	(%R9,%R14,8),%R15

(1846) 0x507ec1 CMP	(%R10,%R15,8),%RBX

(1846) 0x507ec5 JNE	507ed7

(1846) 0x507ec7 VMOVSD	(%R12,%R14,8),%XMM13

(1846) 0x507ecd VMINSD	%XMM13,%XMM0,%XMM0

(1846) 0x507ed2 VADDSD	%XMM13,%XMM9,%XMM9

(1846) 0x507ed7 INC	%R14

(1846) 0x507eda MOV	(%R9,%R14,8),%RAX

(1846) 0x507ede CMP	(%R10,%RAX,8),%RBX

(1846) 0x507ee2 JNE	507ef4

(1846) 0x507ee4 VMOVSD	(%R12,%R14,8),%XMM14

(1846) 0x507eea VMINSD	%XMM14,%XMM0,%XMM0

(1846) 0x507eef VADDSD	%XMM14,%XMM9,%XMM9

(1846) 0x507ef4 INC	%R14

(1846) 0x507ef7 MOV	(%R9,%R14,8),%R15

(1846) 0x507efb CMP	(%R10,%R15,8),%RBX

(1846) 0x507eff JNE	507f11

(1846) 0x507f01 VMOVSD	(%R12,%R14,8),%XMM15

(1846) 0x507f07 VMINSD	%XMM15,%XMM0,%XMM0

(1846) 0x507f0c VADDSD	%XMM15,%XMM9,%XMM9

(1846) 0x507f11 INC	%R14

(1846) 0x507f14 MOV	(%R9,%R14,8),%RAX

(1846) 0x507f18 CMP	(%R10,%RAX,8),%RBX

(1846) 0x507f1c JNE	507f2e

(1846) 0x507f1e VMOVSD	(%R12,%R14,8),%XMM12

(1846) 0x507f24 VMINSD	%XMM12,%XMM0,%XMM0

(1846) 0x507f29 VADDSD	%XMM12,%XMM9,%XMM9

(1846) 0x507f2e INC	%R14

(1846) 0x507f31 MOV	(%R9,%R14,8),%R15

(1846) 0x507f35 CMP	(%R10,%R15,8),%RBX

(1846) 0x507f39 JNE	507f4b

(1846) 0x507f3b VMOVSD	(%R12,%R14,8),%XMM11

(1846) 0x507f41 VMINSD	%XMM11,%XMM0,%XMM0

(1846) 0x507f46 VADDSD	%XMM11,%XMM9,%XMM9

(1846) 0x507f4b INC	%R14

(1846) 0x507f4e CMP	%R13,%R14

(1846) 0x507f51 JE	508050

  (1866) 0x507f57 MOV	(%R9,%R14,8),%RAX

  (1866) 0x507f5b CMP	(%R10,%RAX,8),%RBX

  (1866) 0x507f5f JNE	507f71

  (1866) 0x507f61 VMOVSD	(%R12,%R14,8),%XMM10

  (1866) 0x507f67 VMINSD	%XMM10,%XMM0,%XMM0

  (1866) 0x507f6c VADDSD	%XMM10,%XMM9,%XMM9

  (1866) 0x507f71 LEA	0x1(%R14),%RAX

  (1866) 0x507f75 MOV	(%R9,%RAX,8),%R14

  (1866) 0x507f79 CMP	(%R10,%R14,8),%RBX

  (1866) 0x507f7d JNE	507f8f

  (1866) 0x507f7f VMOVSD	(%R12,%RAX,8),%XMM13

  (1866) 0x507f85 VMINSD	%XMM13,%XMM0,%XMM0

  (1866) 0x507f8a VADDSD	%XMM13,%XMM9,%XMM9

  (1866) 0x507f8f LEA	0x1(%RAX),%R14

  (1866) 0x507f93 MOV	(%R9,%R14,8),%R15

  (1866) 0x507f97 CMP	(%R10,%R15,8),%RBX

  (1866) 0x507f9b JNE	507fad

  (1866) 0x507f9d VMOVSD	(%R12,%R14,8),%XMM14

  (1866) 0x507fa3 VMINSD	%XMM14,%XMM0,%XMM0

  (1866) 0x507fa8 VADDSD	%XMM14,%XMM9,%XMM9

  (1866) 0x507fad LEA	0x2(%RAX),%R14

  (1866) 0x507fb1 MOV	(%R9,%R14,8),%R15

  (1866) 0x507fb5 CMP	(%R10,%R15,8),%RBX

  (1866) 0x507fb9 JNE	507fcb

  (1866) 0x507fbb VMOVSD	(%R12,%R14,8),%XMM15

  (1866) 0x507fc1 VMINSD	%XMM15,%XMM0,%XMM0

  (1866) 0x507fc6 VADDSD	%XMM15,%XMM9,%XMM9

  (1866) 0x507fcb LEA	0x3(%RAX),%R14

  (1866) 0x507fcf MOV	(%R9,%R14,8),%R15

  (1866) 0x507fd3 CMP	(%R10,%R15,8),%RBX

  (1866) 0x507fd7 JNE	507fe9

  (1866) 0x507fd9 VMOVSD	(%R12,%R14,8),%XMM12

  (1866) 0x507fdf VMINSD	%XMM12,%XMM0,%XMM0

  (1866) 0x507fe4 VADDSD	%XMM12,%XMM9,%XMM9

  (1866) 0x507fe9 LEA	0x4(%RAX),%R14

  (1866) 0x507fed MOV	(%R9,%R14,8),%R15

  (1866) 0x507ff1 CMP	(%R10,%R15,8),%RBX

  (1866) 0x507ff5 JNE	508007

  (1866) 0x507ff7 VMOVSD	(%R12,%R14,8),%XMM11

  (1866) 0x507ffd VMINSD	%XMM11,%XMM0,%XMM0

  (1866) 0x508002 VADDSD	%XMM11,%XMM9,%XMM9

  (1866) 0x508007 LEA	0x5(%RAX),%R14

  (1866) 0x50800b MOV	(%R9,%R14,8),%R15

  (1866) 0x50800f CMP	(%R10,%R15,8),%RBX

  (1866) 0x508013 JNE	508025

  (1866) 0x508015 VMOVSD	(%R12,%R14,8),%XMM10

  (1866) 0x50801b VMINSD	%XMM10,%XMM0,%XMM0

  (1866) 0x508020 VADDSD	%XMM10,%XMM9,%XMM9

  (1866) 0x508025 LEA	0x6(%RAX),%R14

  (1866) 0x508029 MOV	(%R9,%R14,8),%R15

  (1866) 0x50802d CMP	(%R10,%R15,8),%RBX

  (1866) 0x508031 JNE	508043

  (1866) 0x508033 VMOVSD	(%R12,%R14,8),%XMM13

  (1866) 0x508039 VMINSD	%XMM13,%XMM0,%XMM0

  (1866) 0x50803e VADDSD	%XMM13,%XMM9,%XMM9

  (1866) 0x508043 LEA	0x7(%RAX),%R14

  (1866) 0x508047 CMP	%R13,%R14

  (1866) 0x50804a JNE	507f57

(1846) 0x508050 MOV	0x70(%RSP),%RBX

(1846) 0x508055 MOV	(%RCX),%R15

(1846) 0x508058 MOV	(%RBX),%RAX

(1846) 0x50805b MOV	%R15,0x60(%RSP)

(1846) 0x508060 MOV	%RAX,0x40(%RSP)

(1846) 0x508065 CMP	%R15,%RAX

(1846) 0x508068 JGE	508307

(1846) 0x50806e SUB	%RAX,%R15

(1846) 0x508071 VMOVQ	(%R10,%RDI,8),%XMM14

(1846) 0x508077 MOV	%RAX,%R14

(1846) 0x50807a MOV	%R15,%RBX

(1846) 0x50807d AND	$0x7,%EBX

(1846) 0x508080 JE	50981b

(1846) 0x508086 CMP	$0x1,%RBX

(1846) 0x50808a JE	5081a8

(1846) 0x508090 CMP	$0x2,%RBX

(1846) 0x508094 JE	508181

(1846) 0x50809a CMP	$0x3,%RBX

(1846) 0x50809e JE	50815a

(1846) 0x5080a4 CMP	$0x4,%RBX

(1846) 0x5080a8 JE	508133

(1846) 0x5080ae CMP	$0x5,%RBX

(1846) 0x5080b2 JE	50810c

(1846) 0x5080b4 CMP	$0x6,%RBX

(1846) 0x5080b8 JE	5080f1

(1846) 0x5080ba MOV	0x40(%RSP),%R14

(1846) 0x5080bf MOV	0x68(%RSP),%RBX

(1846) 0x5080c4 VMOVQ	%XMM14,%R15

(1846) 0x5080c9 MOV	(%R8,%R14,8),%RAX

(1846) 0x5080cd CMP	%R15,(%RBX,%RAX,8)

(1846) 0x5080d1 JNE	5080e8

(1846) 0x5080d3 MOV	0x40(%RSP),%R14

(1846) 0x5080d8 VMOVSD	(%RSI,%R14,8),%XMM15

(1846) 0x5080de VMINSD	%XMM15,%XMM0,%XMM0

(1846) 0x5080e3 VADDSD	%XMM15,%XMM9,%XMM9

(1846) 0x5080e8 MOV	0x40(%RSP),%RAX

(1846) 0x5080ed LEA	0x1(%RAX),%R14

(1846) 0x5080f1 MOV	0x68(%RSP),%RAX

(1846) 0x5080f6 MOV	(%R8,%R14,8),%RBX

(1846) 0x5080fa VMOVQ	%XMM14,%R15

(1846) 0x5080ff CMP	%R15,(%RAX,%RBX,8)

(1846) 0x508103 JE	509806

(1846) 0x508109 INC	%R14

(1846) 0x50810c MOV	0x68(%RSP),%RAX

(1846) 0x508111 MOV	(%R8,%R14,8),%RBX

(1846) 0x508115 VMOVQ	%XMM14,%R15

(1846) 0x50811a CMP	%R15,(%RAX,%RBX,8)

(1846) 0x50811e JNE	508130

(1846) 0x508120 VMOVSD	(%RSI,%R14,8),%XMM11

(1846) 0x508126 VMINSD	%XMM11,%XMM0,%XMM0

(1846) 0x50812b VADDSD	%XMM11,%XMM9,%XMM9

(1846) 0x508130 INC	%R14

(1846) 0x508133 MOV	0x68(%RSP),%RAX

(1846) 0x508138 MOV	(%R8,%R14,8),%RBX

(1846) 0x50813c VMOVQ	%XMM14,%R15

(1846) 0x508141 CMP	%R15,(%RAX,%RBX,8)

(1846) 0x508145 JNE	508157

(1846) 0x508147 VMOVSD	(%RSI,%R14,8),%XMM10

(1846) 0x50814d VMINSD	%XMM10,%XMM0,%XMM0

(1846) 0x508152 VADDSD	%XMM10,%XMM9,%XMM9

(1846) 0x508157 INC	%R14

(1846) 0x50815a MOV	0x68(%RSP),%RAX

(1846) 0x50815f MOV	(%R8,%R14,8),%RBX

(1846) 0x508163 VMOVQ	%XMM14,%R15

(1846) 0x508168 CMP	%R15,(%RAX,%RBX,8)

(1846) 0x50816c JNE	50817e

(1846) 0x50816e VMOVSD	(%RSI,%R14,8),%XMM13

(1846) 0x508174 VMINSD	%XMM13,%XMM0,%XMM0

(1846) 0x508179 VADDSD	%XMM13,%XMM9,%XMM9

(1846) 0x50817e INC	%R14

(1846) 0x508181 MOV	0x68(%RSP),%RAX

(1846) 0x508186 MOV	(%R8,%R14,8),%RBX

(1846) 0x50818a VMOVQ	%XMM14,%R15

(1846) 0x50818f CMP	%R15,(%RAX,%RBX,8)

(1846) 0x508193 JNE	5081a5

(1846) 0x508195 VMOVSD	(%RSI,%R14,8),%XMM15

(1846) 0x50819b VMINSD	%XMM15,%XMM0,%XMM0

(1846) 0x5081a0 VADDSD	%XMM15,%XMM9,%XMM9

(1846) 0x5081a5 INC	%R14

(1846) 0x5081a8 MOV	0x68(%RSP),%RAX

(1846) 0x5081ad MOV	(%R8,%R14,8),%RBX

(1846) 0x5081b1 VMOVQ	%XMM14,%R15

(1846) 0x5081b6 CMP	%R15,(%RAX,%RBX,8)

(1846) 0x5081ba JNE	5081cc

(1846) 0x5081bc VMOVSD	(%RSI,%R14,8),%XMM12

(1846) 0x5081c2 VMINSD	%XMM12,%XMM0,%XMM0

(1846) 0x5081c7 VADDSD	%XMM12,%XMM9,%XMM9

(1846) 0x5081cc MOV	0x60(%RSP),%RAX

(1846) 0x5081d1 INC	%R14

(1846) 0x5081d4 CMP	%RAX,%R14

(1846) 0x5081d7 JE	508307

(1846) 0x5081dd MOV	%R13,0x10(%RSP)

(1846) 0x5081e2 MOV	%R11,%R13

(1846) 0x5081e5 MOV	%RDX,%R11

(1846) 0x5081e8 MOV	0x68(%RSP),%RDX

(1846) 0x5081ed MOV	%RAX,%R15

(1846) 0x5081f0 VMOVQ	%XMM14,%RBX

(1846) 0x5081f5 MOV	%RCX,0x28(%RSP)

  (1865) 0x5081fa MOV	(%R8,%R14,8),%RCX

  (1865) 0x5081fe CMP	%RBX,(%RDX,%RCX,8)

  (1865) 0x508202 JNE	508214

  (1865) 0x508204 VMOVSD	(%RSI,%R14,8),%XMM14

  (1865) 0x50820a VMINSD	%XMM14,%XMM0,%XMM0

  (1865) 0x50820f VADDSD	%XMM14,%XMM9,%XMM9

  (1865) 0x508214 LEA	0x1(%R14),%RAX

  (1865) 0x508218 MOV	(%R8,%RAX,8),%R14

  (1865) 0x50821c CMP	%RBX,(%RDX,%R14,8)

  (1865) 0x508220 JNE	508231

  (1865) 0x508222 VMOVSD	(%RSI,%RAX,8),%XMM11

  (1865) 0x508227 VMINSD	%XMM11,%XMM0,%XMM0

  (1865) 0x50822c VADDSD	%XMM11,%XMM9,%XMM9

  (1865) 0x508231 LEA	0x1(%RAX),%R14

  (1865) 0x508235 MOV	(%R8,%R14,8),%RCX

  (1865) 0x508239 CMP	%RBX,(%RDX,%RCX,8)

  (1865) 0x50823d JNE	50824f

  (1865) 0x50823f VMOVSD	(%RSI,%R14,8),%XMM10

  (1865) 0x508245 VMINSD	%XMM10,%XMM0,%XMM0

  (1865) 0x50824a VADDSD	%XMM10,%XMM9,%XMM9

  (1865) 0x50824f LEA	0x2(%RAX),%R14

  (1865) 0x508253 MOV	(%R8,%R14,8),%RCX

  (1865) 0x508257 CMP	%RBX,(%RDX,%RCX,8)

  (1865) 0x50825b JNE	50826d

  (1865) 0x50825d VMOVSD	(%RSI,%R14,8),%XMM13

  (1865) 0x508263 VMINSD	%XMM13,%XMM0,%XMM0

  (1865) 0x508268 VADDSD	%XMM13,%XMM9,%XMM9

  (1865) 0x50826d LEA	0x3(%RAX),%R14

  (1865) 0x508271 MOV	(%R8,%R14,8),%RCX

  (1865) 0x508275 CMP	%RBX,(%RDX,%RCX,8)

  (1865) 0x508279 JNE	50828b

  (1865) 0x50827b VMOVSD	(%RSI,%R14,8),%XMM15

  (1865) 0x508281 VMINSD	%XMM15,%XMM0,%XMM0

  (1865) 0x508286 VADDSD	%XMM15,%XMM9,%XMM9

  (1865) 0x50828b LEA	0x4(%RAX),%R14

  (1865) 0x50828f MOV	(%R8,%R14,8),%RCX

  (1865) 0x508293 CMP	%RBX,(%RDX,%RCX,8)

  (1865) 0x508297 JNE	5082a9

  (1865) 0x508299 VMOVSD	(%RSI,%R14,8),%XMM12

  (1865) 0x50829f VMINSD	%XMM12,%XMM0,%XMM0

  (1865) 0x5082a4 VADDSD	%XMM12,%XMM9,%XMM9

  (1865) 0x5082a9 LEA	0x5(%RAX),%R14

  (1865) 0x5082ad MOV	(%R8,%R14,8),%RCX

  (1865) 0x5082b1 CMP	%RBX,(%RDX,%RCX,8)

  (1865) 0x5082b5 JNE	5082c7

  (1865) 0x5082b7 VMOVSD	(%RSI,%R14,8),%XMM14

  (1865) 0x5082bd VMINSD	%XMM14,%XMM0,%XMM0

  (1865) 0x5082c2 VADDSD	%XMM14,%XMM9,%XMM9

  (1865) 0x5082c7 LEA	0x6(%RAX),%R14

  (1865) 0x5082cb MOV	(%R8,%R14,8),%RCX

  (1865) 0x5082cf CMP	%RBX,(%RDX,%RCX,8)

  (1865) 0x5082d3 JNE	5082e5

  (1865) 0x5082d5 VMOVSD	(%RSI,%R14,8),%XMM11

  (1865) 0x5082db VMINSD	%XMM11,%XMM0,%XMM0

  (1865) 0x5082e0 VADDSD	%XMM11,%XMM9,%XMM9

  (1865) 0x5082e5 LEA	0x7(%RAX),%R14

  (1865) 0x5082e9 CMP	%R15,%R14

  (1865) 0x5082ec JNE	5081fa

(1846) 0x5082f2 MOV	%R11,%RDX

(1846) 0x5082f5 MOV	0x28(%RSP),%RCX

(1846) 0x5082fa MOV	%R13,%R11

(1846) 0x5082fd MOV	0x10(%RSP),%R13

(1846) 0x508302 MOV	%R15,0x60(%RSP)

(1846) 0x508307 VMOVQ	%XMM16,%R15

(1846) 0x50830d MOV	0x40(%RSP),%RBX

(1846) 0x508312 MOV	0x60(%RSP),%RAX

(1846) 0x508317 VMOVQ	%XMM7,%R14

(1846) 0x50831c SUB	%R15,%R13

(1846) 0x50831f MOV	0x78(%RSP),%R15

(1846) 0x508324 VANDPD	%XMM2,%XMM9,%XMM9

(1846) 0x508328 VANDPD	%XMM2,%XMM1,%XMM1

(1846) 0x50832c LEA	-0x1(%RDX,%R13,1),%RDX

(1846) 0x508331 VMOVQ	%XMM17,%R13

(1846) 0x508337 VMULSD	%XMM5,%XMM1,%XMM10

(1846) 0x50833b MOVQ	$-0x1,(%R14,%R13,1)

(1846) 0x508343 SUB	%RBX,%RAX

(1846) 0x508346 MOV	-0x8(%R15),%RBX

(1846) 0x50834a ADD	%RAX,%R11

(1846) 0x50834d MOV	(%R15),%R15

(1846) 0x508350 VCOMISD	%XMM10,%XMM9

(1846) 0x508355 LEA	0x1(%RBX),%R13

(1846) 0x508359 MOV	%RBX,0x60(%RSP)

(1846) 0x50835e JBE	50836b

(1846) 0x508360 CMPB	$0,0x30(%RSP)

(1846) 0x508365 JNE	509740

(1846) 0x50836b VMULSD	%XMM3,%XMM0,%XMM13

(1846) 0x50836f CMP	%R15,%R13

(1846) 0x508372 JGE	5083ac

(1846) 0x508374 MOV	0x78(%RSP),%R14

(1846) 0x508379 VMOVQ	%XMM7,%RBX

(1846) 0x50837e XCHG	%AX,%AX

  (1864) 0x508380 VCOMISD	(%R12,%R13,8),%XMM13

  (1864) 0x508386 JBE	508396

  (1864) 0x508388 MOV	(%R9,%R13,8),%RAX

  (1864) 0x50838c MOV	(%R10,%RDI,8),%R15

  (1864) 0x508390 CMP	%R15,(%R10,%RAX,8)

  (1864) 0x508394 JE	5083a0

  (1864) 0x508396 DEC	%RDX

  (1864) 0x508399 MOV	$-0x1,%RAX

  (1864) 0x5083a0 MOV	%RAX,(%RBX,%R13,8)

  (1864) 0x5083a4 INC	%R13

  (1864) 0x5083a7 CMP	%R13,(%R14)

  (1864) 0x5083aa JG	508380

(1846) 0x5083ac MOV	0x70(%RSP),%R13

(1846) 0x5083b1 MOV	(%R13),%R13

(1846) 0x5083b5 CMP	(%RCX),%R13

(1846) 0x5083b8 JGE	5083fc

(1846) 0x5083ba MOV	0x68(%RSP),%R14

(1846) 0x5083bf VMOVQ	%XMM8,%RBX

(1846) 0x5083c4 VMULSD	%XMM3,%XMM0,%XMM0

(1846) 0x5083c8 NOPL	(%RAX,%RAX,1)

  (1863) 0x5083d0 VCOMISD	(%RSI,%R13,8),%XMM0

  (1863) 0x5083d6 JBE	5083e6

  (1863) 0x5083d8 MOV	(%R8,%R13,8),%RAX

  (1863) 0x5083dc MOV	(%R10,%RDI,8),%R15

  (1863) 0x5083e0 CMP	%R15,(%R14,%RAX,8)

  (1863) 0x5083e4 JE	5083f0

  (1863) 0x5083e6 DEC	%R11

  (1863) 0x5083e9 MOV	$-0x1,%RAX

  (1863) 0x5083f0 MOV	%RAX,(%RBX,%R13,8)

  (1863) 0x5083f4 INC	%R13

  (1863) 0x5083f7 CMP	%R13,(%RCX)

  (1863) 0x5083fa JG	5083d0

(1846) 0x5083fc INC	%RDI

(1846) 0x5083ff VMOVQ	%XMM4,%R13

(1846) 0x508404 ADD	$0x8,%RCX

(1846) 0x508408 ADDQ	$0x8,0x70(%RSP)

(1846) 0x50840e ADDQ	$0x8,0x78(%RSP)

(1846) 0x508414 CMP	%R13,%RDI

(1846) 0x508417 JNE	507de0

0x50841d VMOVQ	%XMM8,%R12

0x508422 VMOVQ	%XMM7,%RBX

0x508427 MOV	%R11,0x98(%RSP)

0x50842f MOV	%RDX,0x90(%RSP)

0x508437 VMOVQ	%XMM18,%R8

0x50843d VMOVQ	%XMM19,%R10

0x508443 VZEROUPPER

0x508446 MOV	0x8(%RSP),%RSI

0x50844b MOV	0x38(%RSP),%R15

0x508450 MOV	0x58(%RSP),%R14

0x508455 LEA	0x98(%RSP),%RDX

0x50845d LEA	0x90(%RSP),%RDI

0x508465 MOV	%R10,0x70(%RSP)

0x50846a SAL	$0x3,%RSI

0x50846e LEA	(%R15,%RSI,1),%RCX

0x508472 LEA	(%R14,%RSI,1),%RSI

0x508476 CALL	5ab200 <hypre_prefix_sum_pair>

0x50847b MOV	0x80(%RSP),%RAX

0x508483 MOV	0x88(%RSP),%RDX

0x50848b CMP	%RDX,%RAX

0x50848e JGE	50857b

0x508494 MOV	0x90(%RSP),%R13

0x50849c MOV	0x98(%RSP),%R9

0x5084a4 MOV	0x18(%RSP),%R8

0x5084a9 MOV	0x20(%RSP),%R11

0x5084ae MOV	%R15,%RDI

0x5084b1 LEA	(%R14,%RDX,8),%RCX

0x5084b5 SAL	$0x3,%RAX

0x5084b9 MOV	%RCX,0x78(%RSP)

0x5084be LEA	(%R14,%RAX,1),%RSI

0x5084c2 ADD	%RAX,%RDI

0x5084c5 MOV	%R13,%R10

0x5084c8 VMOVQ	%R9,%XMM2

0x5084cd MOV	0x70(%RSP),%R13

0x5084d2 MOV	(%RSP),%R9

0x5084d6 LEA	0x8(%R8,%RAX,1),%R8

0x5084db LEA	0x8(%R11,%RAX,1),%R11

(1843) 0x5084e0 ADD	%R10,(%RSI)

(1843) 0x5084e3 VMOVQ	%XMM2,%RCX

(1843) 0x5084e8 ADD	(%RDI),%RCX

(1843) 0x5084eb MOV	%RCX,(%RDI)

(1843) 0x5084ee MOV	-0x8(%R8),%RAX

(1843) 0x5084f2 MOV	(%R8),%R15

(1843) 0x5084f5 MOV	(%RSI),%R14

(1843) 0x5084f8 CMP	%R15,%RAX

(1843) 0x5084fb JGE	508522

(1843) 0x5084fd NOPL	(%RAX)

  (1845) 0x508500 MOV	(%RBX,%RAX,8),%RDX

  (1845) 0x508504 TEST	%RDX,%RDX

  (1845) 0x508507 JS	508b70

  (1845) 0x50850d MOV	%RDX,(%R9,%R14,8)

  (1845) 0x508511 MOV	(%R8),%R15

  (1845) 0x508514 INC	%RAX

  (1845) 0x508517 INC	%R14

  (1845) 0x50851a CMP	%R15,%RAX

  (1845) 0x50851d JL	508500

(1843) 0x50851f MOV	(%RDI),%RCX

(1843) 0x508522 MOV	-0x8(%R11),%RAX

(1843) 0x508526 MOV	(%R11),%R14

(1843) 0x508529 CMP	%R14,%RAX

(1843) 0x50852c JGE	508560

(1843) 0x50852e NOPW	%CS:(%RAX,%RAX,1)

(1843) 0x508539 NOPL	(%RAX)

  (1844) 0x508540 MOV	(%R12,%RAX,8),%RDX

  (1844) 0x508544 TEST	%RDX,%RDX

  (1844) 0x508547 JS	508b50

  (1844) 0x50854d MOV	%RDX,(%R13,%RCX,8)

  (1844) 0x508552 MOV	(%R11),%R14

  (1844) 0x508555 INC	%RAX

  (1844) 0x508558 INC	%RCX

  (1844) 0x50855b CMP	%RAX,%R14

  (1844) 0x50855e JG	508540

(1843) 0x508560 ADD	$0x8,%RSI

(1843) 0x508564 ADD	$0x8,%RDI

(1843) 0x508568 ADD	$0x8,%R8

(1843) 0x50856c ADD	$0x8,%R11

(1843) 0x508570 CMP	%RSI,0x78(%RSP)

(1843) 0x508575 JNE	5084e0

0x50857b LEA	-0x28(%RBP),%RSP

0x50857f POP	%RBX

0x508580 POP	%R12

0x508582 POP	%R13

0x508584 POP	%R14

0x508586 POP	%R15

0x508588 POP	%RBP

0x508589 RET

0x50858a NOPW	(%RAX,%RAX,1)

(1846) 0x508590 VCOMISD	%XMM1,%XMM6

(1846) 0x508594 JA	509170

(1846) 0x50859a CMP	%R13,%R14

(1846) 0x50859d JGE	50987d

(1846) 0x5085a3 MOV	%R13,%R15

(1846) 0x5085a6 SUB	%RAX,%R15

(1846) 0x5085a9 LEA	-0x1(%R15),%RBX

(1846) 0x5085ad SUB	$0x2,%R15

(1846) 0x5085b1 CMP	$0x2,%R15

(1846) 0x5085b5 JBE	5098e6

(1846) 0x5085bb VMOVQ	%XMM17,%RAX

(1846) 0x5085c1 VXORPD	%XMM0,%XMM0,%XMM0

(1846) 0x5085c5 VMOVAPD	%YMM0,%YMM10

(1846) 0x5085c9 LEA	0x8(%R12,%RAX,1),%R15

(1846) 0x5085ce MOV	%RBX,%RAX

(1846) 0x5085d1 SHR	$0x2,%RAX

(1846) 0x5085d5 SAL	$0x5,%RAX

(1846) 0x5085d9 MOV	%RAX,0x60(%RSP)

(1846) 0x5085de ADD	%R15,%RAX

(1846) 0x5085e1 VMOVQ	%RAX,%XMM15

(1846) 0x5085e6 MOV	0x60(%RSP),%RAX

(1846) 0x5085eb SUB	$0x20,%RAX

(1846) 0x5085ef SHR	$0x5,%RAX

(1846) 0x5085f3 INC	%RAX

(1846) 0x5085f6 AND	$0x7,%EAX

(1846) 0x5085f9 JE	5086b4

(1846) 0x5085ff CMP	$0x1,%RAX

(1846) 0x508603 JE	508693

(1846) 0x508609 CMP	$0x2,%RAX

(1846) 0x50860d JE	508680

(1846) 0x50860f CMP	$0x3,%RAX

(1846) 0x508613 JE	50866d

(1846) 0x508615 CMP	$0x4,%RAX

(1846) 0x508619 JE	50865a

(1846) 0x50861b CMP	$0x5,%RAX

(1846) 0x50861f JE	508647

(1846) 0x508621 CMP	$0x6,%RAX

(1846) 0x508625 JE	508634

(1846) 0x508627 VMOVUPD	(%R15),%YMM0

(1846) 0x50862c ADD	$0x20,%R15

(1846) 0x508630 VMINPD	%YMM0,%YMM10,%YMM10

(1846) 0x508634 VMOVUPD	(%R15),%YMM9

(1846) 0x508639 ADD	$0x20,%R15

(1846) 0x50863d VMINPD	%YMM9,%YMM10,%YMM10

(1846) 0x508642 VADDPD	%YMM9,%YMM0,%YMM0

(1846) 0x508647 VMOVUPD	(%R15),%YMM11

(1846) 0x50864c ADD	$0x20,%R15

(1846) 0x508650 VMINPD	%YMM11,%YMM10,%YMM10

(1846) 0x508655 VADDPD	%YMM11,%YMM0,%YMM0

(1846) 0x50865a VMOVUPD	(%R15),%YMM12

(1846) 0x50865f ADD	$0x20,%R15

(1846) 0x508663 VMINPD	%YMM12,%YMM10,%YMM10

(1846) 0x508668 VADDPD	%YMM12,%YMM0,%YMM0

(1846) 0x50866d VMOVUPD	(%R15),%YMM13

(1846) 0x508672 ADD	$0x20,%R15

(1846) 0x508676 VMINPD	%YMM13,%YMM10,%YMM10

(1846) 0x50867b VADDPD	%YMM13,%YMM0,%YMM0

(1846) 0x508680 VMOVUPD	(%R15),%YMM14

(1846) 0x508685 ADD	$0x20,%R15

(1846) 0x508689 VMINPD	%YMM14,%YMM10,%YMM10

(1846) 0x50868e VADDPD	%YMM14,%YMM0,%YMM0

(1846) 0x508693 VMOVUPD	(%R15),%YMM9

(1846) 0x508698 VMOVQ	%XMM15,%RAX

(1846) 0x50869d ADD	$0x20,%R15

(1846) 0x5086a1 VMINPD	%YMM9,%YMM10,%YMM10

(1846) 0x5086a6 VADDPD	%YMM9,%YMM0,%YMM0

(1846) 0x5086ab CMP	%RAX,%R15

(1846) 0x5086ae JE	508749

(1846) 0x5086b4 VMOVQ	%XMM15,%RAX

  (1858) 0x5086b9 VMOVUPD	(%R15),%YMM15

  (1858) 0x5086be VMOVUPD	0x20(%R15),%YMM13

  (1858) 0x5086c4 VMOVUPD	0x40(%R15),%YMM9

  (1858) 0x5086ca ADD	$0x100,%R15

  (1858) 0x5086d1 VMINPD	%YMM15,%YMM10,%YMM11

  (1858) 0x5086d6 VADDPD	%YMM15,%YMM0,%YMM12

  (1858) 0x5086db VMINPD	%YMM13,%YMM11,%YMM14

  (1858) 0x5086e0 VADDPD	%YMM13,%YMM12,%YMM0

  (1858) 0x5086e5 VMOVUPD	-0xa0(%R15),%YMM11

  (1858) 0x5086ee VMINPD	%YMM9,%YMM14,%YMM10

  (1858) 0x5086f3 VADDPD	%YMM9,%YMM0,%YMM15

  (1858) 0x5086f8 VMOVUPD	-0x80(%R15),%YMM14

  (1858) 0x5086fe VMOVUPD	-0x60(%R15),%YMM9

  (1858) 0x508704 VADDPD	%YMM11,%YMM15,%YMM13

  (1858) 0x508709 VMINPD	%YMM11,%YMM10,%YMM12

  (1858) 0x50870e VADDPD	%YMM14,%YMM13,%YMM0

  (1858) 0x508713 VMINPD	%YMM14,%YMM12,%YMM10

  (1858) 0x508718 VMOVUPD	-0x40(%R15),%YMM12

  (1858) 0x50871e VMINPD	%YMM9,%YMM10,%YMM15

  (1858) 0x508723 VADDPD	%YMM9,%YMM0,%YMM11

  (1858) 0x508728 VMOVUPD	-0x20(%R15),%YMM0

  (1858) 0x50872e VMINPD	%YMM12,%YMM15,%YMM13

  (1858) 0x508733 VADDPD	%YMM12,%YMM11,%YMM14

  (1858) 0x508738 VMINPD	%YMM0,%YMM13,%YMM10

  (1858) 0x50873c VADDPD	%YMM0,%YMM14,%YMM0

  (1858) 0x508740 CMP	%RAX,%R15

  (1858) 0x508743 JNE	5086b9

(1846) 0x508749 VEXTRACTF64X2	$0x1,%YMM0,%XMM9

(1846) 0x508750 VADDPD	%XMM0,%XMM9,%XMM15

(1846) 0x508754 VEXTRACTF64X2	$0x1,%YMM10,%XMM13

(1846) 0x50875b VMINPD	%XMM10,%XMM13,%XMM10

(1846) 0x508760 MOV	%RBX,%R15

(1846) 0x508763 AND	$-0x4,%R15

(1846) 0x508767 VUNPCKHPD	%XMM15,%XMM15,%XMM11

(1846) 0x50876c VUNPCKHPD	%XMM10,%XMM10,%XMM14

(1846) 0x508771 ADD	%R15,%R14

(1846) 0x508774 AND	$0x3,%EBX

(1846) 0x508777 VADDPD	%XMM15,%XMM11,%XMM12

(1846) 0x50877c VMINPD	%XMM10,%XMM14,%XMM0

(1846) 0x508781 VADDSD	%XMM12,%XMM1,%XMM11

(1846) 0x508786 JE	5087d4

(1846) 0x508788 LEA	(,%R14,8),%RBX

(1846) 0x508790 LEA	0x1(%R14),%RAX

(1846) 0x508794 VMOVSD	(%R12,%RBX,1),%XMM9

(1846) 0x50879a VMINSD	%XMM9,%XMM0,%XMM0

(1846) 0x50879f VADDSD	%XMM9,%XMM11,%XMM11

(1846) 0x5087a4 CMP	%R13,%RAX

(1846) 0x5087a7 JGE	5087d4

(1846) 0x5087a9 ADD	$0x2,%R14

(1846) 0x5087ad VMOVSD	0x8(%R12,%RBX,1),%XMM15

(1846) 0x5087b4 VMINSD	%XMM15,%XMM0,%XMM0

(1846) 0x5087b9 VADDSD	%XMM15,%XMM11,%XMM11

(1846) 0x5087be CMP	%R13,%R14

(1846) 0x5087c1 JGE	5087d4

(1846) 0x5087c3 VMOVSD	0x10(%R12,%RBX,1),%XMM12

(1846) 0x5087ca VMINSD	%XMM12,%XMM0,%XMM0

(1846) 0x5087cf VADDSD	%XMM12,%XMM11,%XMM11

(1846) 0x5087d4 MOV	0x70(%RSP),%R14

(1846) 0x5087d9 MOV	(%RCX),%RAX

(1846) 0x5087dc MOV	(%R14),%R15

(1846) 0x5087df MOV	%R15,0x60(%RSP)

(1846) 0x5087e4 CMP	%RAX,%R15

(1846) 0x5087e7 JGE	508a2d

(1846) 0x5087ed MOV	%RAX,%RBX

(1846) 0x5087f0 SUB	%R15,%RBX

(1846) 0x5087f3 LEA	-0x1(%RBX),%R14

(1846) 0x5087f7 MOV	%RBX,0x40(%RSP)

(1846) 0x5087fc CMP	$0x2,%R14

(1846) 0x508800 JBE	5098de

(1846) 0x508806 LEA	(%RSI,%R15,8),%R14

(1846) 0x50880a MOV	%RBX,%R15

(1846) 0x50880d VBROADCASTSD	%XMM0,%YMM0

(1846) 0x508812 VXORPD	%XMM9,%XMM9,%XMM9

(1846) 0x508817 SHR	$0x2,%R15

(1846) 0x50881b SAL	$0x5,%R15

(1846) 0x50881f LEA	(%R15,%R14,1),%RBX

(1846) 0x508823 SUB	$0x20,%R15

(1846) 0x508827 SHR	$0x5,%R15

(1846) 0x50882b VMOVQ	%RBX,%XMM20

(1846) 0x508831 INC	%R15

(1846) 0x508834 AND	$0x7,%R15D

(1846) 0x508838 JE	5088f5

(1846) 0x50883e CMP	$0x1,%R15

(1846) 0x508842 JE	5088d3

(1846) 0x508848 CMP	$0x2,%R15

(1846) 0x50884c JE	5088c0

(1846) 0x50884e CMP	$0x3,%R15

(1846) 0x508852 JE	5088ad

(1846) 0x508854 CMP	$0x4,%R15

(1846) 0x508858 JE	50889a

(1846) 0x50885a CMP	$0x5,%R15

(1846) 0x50885e JE	508887

(1846) 0x508860 CMP	$0x6,%R15

(1846) 0x508864 JE	508874

(1846) 0x508866 VMOVUPD	(%R14),%YMM9

(1846) 0x50886b ADD	$0x20,%R14

(1846) 0x50886f VMINPD	%YMM9,%YMM0,%YMM0

(1846) 0x508874 VMOVUPD	(%R14),%YMM13

(1846) 0x508879 ADD	$0x20,%R14

(1846) 0x50887d VMINPD	%YMM13,%YMM0,%YMM0

(1846) 0x508882 VADDPD	%YMM13,%YMM9,%YMM9

(1846) 0x508887 VMOVUPD	(%R14),%YMM10

(1846) 0x50888c ADD	$0x20,%R14

(1846) 0x508890 VMINPD	%YMM10,%YMM0,%YMM0

(1846) 0x508895 VADDPD	%YMM10,%YMM9,%YMM9

(1846) 0x50889a VMOVUPD	(%R14),%YMM14

(1846) 0x50889f ADD	$0x20,%R14

(1846) 0x5088a3 VMINPD	%YMM14,%YMM0,%YMM0

(1846) 0x5088a8 VADDPD	%YMM14,%YMM9,%YMM9

(1846) 0x5088ad VMOVUPD	(%R14),%YMM15

(1846) 0x5088b2 ADD	$0x20,%R14

(1846) 0x5088b6 VMINPD	%YMM15,%YMM0,%YMM0

(1846) 0x5088bb VADDPD	%YMM15,%YMM9,%YMM9

(1846) 0x5088c0 VMOVUPD	(%R14),%YMM12

(1846) 0x5088c5 ADD	$0x20,%R14

(1846) 0x5088c9 VMINPD	%YMM12,%YMM0,%YMM0

(1846) 0x5088ce VADDPD	%YMM12,%YMM9,%YMM9

(1846) 0x5088d3 VMOVUPD	(%R14),%YMM13

(1846) 0x5088d8 VMOVQ	%XMM20,%R15

(1846) 0x5088de ADD	$0x20,%R14

(1846) 0x5088e2 VMINPD	%YMM13,%YMM0,%YMM0

(1846) 0x5088e7 VADDPD	%YMM13,%YMM9,%YMM9

(1846) 0x5088ec CMP	%R15,%R14

(1846) 0x5088ef JE	50899a

(1846) 0x5088f5 MOV	0x40(%RSP),%RBX

(1846) 0x5088fa VMOVQ	%XMM20,%R15

  (1857) 0x508900 VMOVUPD	(%R14),%YMM10

  (1857) 0x508905 VMOVUPD	0x20(%R14),%YMM12

  (1857) 0x50890b ADD	$0x100,%R14

  (1857) 0x508912 VMINPD	%YMM10,%YMM0,%YMM14

  (1857) 0x508917 VADDPD	%YMM10,%YMM9,%YMM15

  (1857) 0x50891c VMOVUPD	-0xc0(%R14),%YMM10

  (1857) 0x508925 VMINPD	%YMM12,%YMM14,%YMM13

  (1857) 0x50892a VADDPD	%YMM12,%YMM15,%YMM9

  (1857) 0x50892f VMOVUPD	-0xa0(%R14),%YMM15

  (1857) 0x508938 VMINPD	%YMM10,%YMM13,%YMM0

  (1857) 0x50893d VADDPD	%YMM10,%YMM9,%YMM14

  (1857) 0x508942 VMOVUPD	-0x80(%R14),%YMM9

  (1857) 0x508948 VMOVUPD	-0x60(%R14),%YMM10

  (1857) 0x50894e VMINPD	%YMM15,%YMM0,%YMM12

  (1857) 0x508953 VADDPD	%YMM15,%YMM14,%YMM13

  (1857) 0x508958 VMINPD	%YMM9,%YMM12,%YMM0

  (1857) 0x50895d VADDPD	%YMM9,%YMM13,%YMM14

  (1857) 0x508962 VMOVUPD	-0x40(%R14),%YMM13

  (1857) 0x508968 VADDPD	%YMM10,%YMM14,%YMM12

  (1857) 0x50896d VMINPD	%YMM10,%YMM0,%YMM15

  (1857) 0x508972 VMOVUPD	-0x20(%R14),%YMM14

  (1857) 0x508978 VMINPD	%YMM13,%YMM15,%YMM0

  (1857) 0x50897d VADDPD	%YMM13,%YMM12,%YMM9

  (1857) 0x508982 VMINPD	%YMM14,%YMM0,%YMM0

  (1857) 0x508987 VADDPD	%YMM14,%YMM9,%YMM9

  (1857) 0x50898c CMP	%R15,%R14

  (1857) 0x50898f JNE	508900

(1846) 0x508995 MOV	%RBX,0x40(%RSP)

(1846) 0x50899a MOV	0x40(%RSP),%R15

(1846) 0x50899f VEXTRACTF64X2	$0x1,%YMM9,%XMM10

(1846) 0x5089a6 VADDPD	%XMM9,%XMM10,%XMM15

(1846) 0x5089ab MOV	0x60(%RSP),%RBX

(1846) 0x5089b0 VEXTRACTF64X2	$0x1,%YMM0,%XMM9

(1846) 0x5089b7 VMINPD	%XMM0,%XMM9,%XMM14

(1846) 0x5089bb VUNPCKHPD	%XMM15,%XMM15,%XMM12

(1846) 0x5089c0 VADDPD	%XMM15,%XMM12,%XMM13

(1846) 0x5089c5 VUNPCKHPD	%XMM14,%XMM14,%XMM0

(1846) 0x5089ca MOV	%R15,%R14

(1846) 0x5089cd VMINPD	%XMM14,%XMM0,%XMM0

(1846) 0x5089d2 AND	$-0x4,%R14

(1846) 0x5089d6 ADD	%RBX,%R14

(1846) 0x5089d9 AND	$0x3,%R15D

(1846) 0x5089dd VADDSD	%XMM13,%XMM11,%XMM11

(1846) 0x5089e2 JE	508a2d

(1846) 0x5089e4 LEA	(,%R14,8),%RBX

(1846) 0x5089ec LEA	0x1(%R14),%R15

(1846) 0x5089f0 VMOVSD	(%RSI,%RBX,1),%XMM10

(1846) 0x5089f5 VMINSD	%XMM10,%XMM0,%XMM0

(1846) 0x5089fa VADDSD	%XMM10,%XMM11,%XMM11

(1846) 0x5089ff CMP	%R15,%RAX

(1846) 0x508a02 JLE	508a2d

(1846) 0x508a04 ADD	$0x2,%R14

(1846) 0x508a08 VMOVSD	0x8(%RSI,%RBX,1),%XMM15

(1846) 0x508a0e VMINSD	%XMM15,%XMM0,%XMM0

(1846) 0x508a13 VADDSD	%XMM15,%XMM11,%XMM11

(1846) 0x508a18 CMP	%R14,%RAX

(1846) 0x508a1b JLE	508a2d

(1846) 0x508a1d VMOVSD	0x10(%RSI,%RBX,1),%XMM12

(1846) 0x508a23 VMINSD	%XMM12,%XMM0,%XMM0

(1846) 0x508a28 VADDSD	%XMM12,%XMM11,%XMM11

(1846) 0x508a2d VMOVQ	%XMM16,%R14

(1846) 0x508a33 VMOVQ	%XMM7,%R15

(1846) 0x508a38 VANDPD	%XMM2,%XMM1,%XMM1

(1846) 0x508a3c VANDPD	%XMM2,%XMM11,%XMM11

(1846) 0x508a40 SUB	%R14,%R13

(1846) 0x508a43 MOV	0x78(%RSP),%R14

(1846) 0x508a48 VMOVQ	%XMM17,%RBX

(1846) 0x508a4e VMULSD	%XMM5,%XMM1,%XMM13

(1846) 0x508a52 LEA	-0x1(%RDX,%R13,1),%RDX

(1846) 0x508a57 MOV	0x60(%RSP),%R13

(1846) 0x508a5c MOVQ	$-0x1,(%R15,%RBX,1)

(1846) 0x508a64 MOV	(%R14),%R15

(1846) 0x508a67 SUB	%R13,%RAX

(1846) 0x508a6a MOV	-0x8(%R14),%R13

(1846) 0x508a6e ADD	%RAX,%R11

(1846) 0x508a71 VCOMISD	%XMM13,%XMM11

(1846) 0x508a76 MOV	%R13,0x60(%RSP)

(1846) 0x508a7b LEA	0x1(%R13),%R13

(1846) 0x508a7f JBE	508a8c

(1846) 0x508a81 CMPB	$0,0x30(%RSP)

(1846) 0x508a86 JNE	509740

(1846) 0x508a8c VMULSD	%XMM0,%XMM3,%XMM9

(1846) 0x508a90 CMP	%R15,%R13

(1846) 0x508a93 JGE	508ae6

(1846) 0x508a95 NOPW	%CS:(%RAX,%RAX,1)

(1846) 0x508aa0 NOPW	%CS:(%RAX,%RAX,1)

(1846) 0x508aab NOPW	%CS:(%RAX,%RAX,1)

(1846) 0x508ab6 NOPW	%CS:(%RAX,%RAX,1)

  (1856) 0x508ac0 VCOMISD	(%R12,%R13,8),%XMM9

  (1856) 0x508ac6 JBE	509140

  (1856) 0x508acc MOV	(%R9,%R13,8),%RBX

  (1856) 0x508ad0 MOV	0x78(%RSP),%R14

  (1856) 0x508ad5 VMOVQ	%XMM7,%RAX

  (1856) 0x508ada MOV	%RBX,(%RAX,%R13,8)

  (1856) 0x508ade INC	%R13

  (1856) 0x508ae1 CMP	%R13,(%R14)

  (1856) 0x508ae4 JG	508ac0

(1846) 0x508ae6 MOV	0x70(%RSP),%R13

(1846) 0x508aeb MOV	(%R13),%R14

(1846) 0x508aef CMP	(%RCX),%R14

(1846) 0x508af2 JGE	5083fc

(1846) 0x508af8 VMULSD	%XMM0,%XMM3,%XMM14

(1846) 0x508afc NOPL	(%RAX)

  (1854) 0x508b00 VCOMISD	(%RSI,%R14,8),%XMM14

  (1854) 0x508b06 JBE	508b29

  (1855) 0x508b08 MOV	(%R8,%R14,8),%R15

  (1855) 0x508b0c VMOVQ	%XMM8,%RAX

  (1855) 0x508b11 MOV	%R15,(%RAX,%R14,8)

  (1855) 0x508b15 INC	%R14

  (1855) 0x508b18 CMP	%R14,(%RCX)

  (1855) 0x508b1b JLE	5083fc

  (1855) 0x508b21 VCOMISD	(%RSI,%R14,8),%XMM14

  (1855) 0x508b27 JA	508b08

  (1854) 0x508b29 VMOVQ	%XMM8,%RBX

  (1854) 0x508b2e DEC	%R11

  (1854) 0x508b31 MOVQ	$-0x1,(%RBX,%R14,8)

  (1854) 0x508b39 INC	%R14

  (1854) 0x508b3c CMP	(%RCX),%R14

  (1854) 0x508b3f JL	508b00

(1846) 0x508b41 JMP	5083fc

0x508b46 NOPW	%CS:(%RAX,%RAX,1)

  (1844) 0x508b50 INC	%RAX

  (1844) 0x508b53 CMP	%R14,%RAX

  (1844) 0x508b56 JL	508540

(1843) 0x508b5c JMP	508560

0x508b61 NOPW	%CS:(%RAX,%RAX,1)

0x508b6c NOPL	(%RAX)

  (1845) 0x508b70 INC	%RAX

  (1845) 0x508b73 CMP	%R15,%RAX

  (1845) 0x508b76 JL	508500

(1843) 0x508b7c JMP	50851f

0x508b81 NOPW	%CS:(%RAX,%RAX,1)

0x508b8c NOPL	(%RAX)

(1846) 0x508b90 CMP	%R13,%R14

(1846) 0x508b93 JGE	509870

(1846) 0x508b99 MOV	%R13,%R15

(1846) 0x508b9c MOV	(%R10,%RDI,8),%RBX

(1846) 0x508ba0 VMOVAPD	%XMM1,%XMM9

(1846) 0x508ba4 VXORPD	%XMM0,%XMM0,%XMM0

(1846) 0x508ba8 SUB	%R14,%R15

(1846) 0x508bab AND	$0x7,%R15D

(1846) 0x508baf JE	508c9d

(1846) 0x508bb5 CMP	$0x1,%R15

(1846) 0x508bb9 JE	508c77

(1846) 0x508bbf CMP	$0x2,%R15

(1846) 0x508bc3 JE	508c5a

(1846) 0x508bc9 CMP	$0x3,%R15

(1846) 0x508bcd JE	508c3d

(1846) 0x508bcf CMP	$0x4,%R15

(1846) 0x508bd3 JE	508c20

(1846) 0x508bd5 CMP	$0x5,%R15

(1846) 0x508bd9 JE	508c0f

(1846) 0x508bdb CMP	$0x6,%R15

(1846) 0x508bdf JE	508bf2

(1846) 0x508be1 MOV	(%R9,%R14,8),%RAX

(1846) 0x508be5 CMP	%RBX,(%R10,%RAX,8)

(1846) 0x508be9 JE	5098af

(1846) 0x508bef INC	%R14

(1846) 0x508bf2 MOV	(%R9,%R14,8),%R15

(1846) 0x508bf6 CMP	%RBX,(%R10,%R15,8)

(1846) 0x508bfa JNE	508c0c

(1846) 0x508bfc VMOVSD	(%R12,%R14,8),%XMM12

(1846) 0x508c02 VMAXSD	%XMM12,%XMM0,%XMM0

(1846) 0x508c07 VADDSD	%XMM12,%XMM9,%XMM9

(1846) 0x508c0c INC	%R14

(1846) 0x508c0f MOV	(%R9,%R14,8),%RAX

(1846) 0x508c13 CMP	%RBX,(%R10,%RAX,8)

(1846) 0x508c17 JE	5097dc

(1846) 0x508c1d INC	%R14

(1846) 0x508c20 MOV	(%R9,%R14,8),%R15

(1846) 0x508c24 CMP	%RBX,(%R10,%R15,8)

(1846) 0x508c28 JNE	508c3a

(1846) 0x508c2a VMOVSD	(%R12,%R14,8),%XMM11

(1846) 0x508c30 VMAXSD	%XMM11,%XMM0,%XMM0

(1846) 0x508c35 VADDSD	%XMM11,%XMM9,%XMM9

(1846) 0x508c3a INC	%R14

(1846) 0x508c3d MOV	(%R9,%R14,8),%RAX

(1846) 0x508c41 CMP	%RBX,(%R10,%RAX,8)

(1846) 0x508c45 JNE	508c57

(1846) 0x508c47 VMOVSD	(%R12,%R14,8),%XMM10

(1846) 0x508c4d VMAXSD	%XMM10,%XMM0,%XMM0

(1846) 0x508c52 VADDSD	%XMM10,%XMM9,%XMM9

(1846) 0x508c57 INC	%R14

(1846) 0x508c5a MOV	(%R9,%R14,8),%R15

(1846) 0x508c5e CMP	%RBX,(%R10,%R15,8)

(1846) 0x508c62 JNE	508c74

(1846) 0x508c64 VMOVSD	(%R12,%R14,8),%XMM13

(1846) 0x508c6a VMAXSD	%XMM13,%XMM0,%XMM0

(1846) 0x508c6f VADDSD	%XMM13,%XMM9,%XMM9

(1846) 0x508c74 INC	%R14

(1846) 0x508c77 MOV	(%R9,%R14,8),%RAX

(1846) 0x508c7b CMP	%RBX,(%R10,%RAX,8)

(1846) 0x508c7f JNE	508c91

(1846) 0x508c81 VMOVSD	(%R12,%R14,8),%XMM15

(1846) 0x508c87 VMAXSD	%XMM15,%XMM0,%XMM0

(1846) 0x508c8c VADDSD	%XMM15,%XMM9,%XMM9

(1846) 0x508c91 INC	%R14

(1846) 0x508c94 CMP	%R13,%R14

(1846) 0x508c97 JE	508d96

  (1862) 0x508c9d MOV	(%R9,%R14,8),%R15

  (1862) 0x508ca1 CMP	%RBX,(%R10,%R15,8)

  (1862) 0x508ca5 JNE	508cb7

  (1862) 0x508ca7 VMOVSD	(%R12,%R14,8),%XMM12

  (1862) 0x508cad VMAXSD	%XMM12,%XMM0,%XMM0

  (1862) 0x508cb2 VADDSD	%XMM12,%XMM9,%XMM9

  (1862) 0x508cb7 LEA	0x1(%R14),%RAX

  (1862) 0x508cbb MOV	(%R9,%RAX,8),%R14

  (1862) 0x508cbf CMP	%RBX,(%R10,%R14,8)

  (1862) 0x508cc3 JNE	508cd5

  (1862) 0x508cc5 VMOVSD	(%R12,%RAX,8),%XMM14

  (1862) 0x508ccb VMAXSD	%XMM14,%XMM0,%XMM0

  (1862) 0x508cd0 VADDSD	%XMM14,%XMM9,%XMM9

  (1862) 0x508cd5 LEA	0x1(%RAX),%R14

  (1862) 0x508cd9 MOV	(%R9,%R14,8),%R15

  (1862) 0x508cdd CMP	%RBX,(%R10,%R15,8)

  (1862) 0x508ce1 JNE	508cf3

  (1862) 0x508ce3 VMOVSD	(%R12,%R14,8),%XMM11

  (1862) 0x508ce9 VMAXSD	%XMM11,%XMM0,%XMM0

  (1862) 0x508cee VADDSD	%XMM11,%XMM9,%XMM9

  (1862) 0x508cf3 LEA	0x2(%RAX),%R14

  (1862) 0x508cf7 MOV	(%R9,%R14,8),%R15

  (1862) 0x508cfb CMP	%RBX,(%R10,%R15,8)

  (1862) 0x508cff JNE	508d11

  (1862) 0x508d01 VMOVSD	(%R12,%R14,8),%XMM10

  (1862) 0x508d07 VMAXSD	%XMM10,%XMM0,%XMM0

  (1862) 0x508d0c VADDSD	%XMM10,%XMM9,%XMM9

  (1862) 0x508d11 LEA	0x3(%RAX),%R14

  (1862) 0x508d15 MOV	(%R9,%R14,8),%R15

  (1862) 0x508d19 CMP	%RBX,(%R10,%R15,8)

  (1862) 0x508d1d JNE	508d2f

  (1862) 0x508d1f VMOVSD	(%R12,%R14,8),%XMM13

  (1862) 0x508d25 VMAXSD	%XMM13,%XMM0,%XMM0

  (1862) 0x508d2a VADDSD	%XMM13,%XMM9,%XMM9

  (1862) 0x508d2f LEA	0x4(%RAX),%R14

  (1862) 0x508d33 MOV	(%R9,%R14,8),%R15

  (1862) 0x508d37 CMP	%RBX,(%R10,%R15,8)

  (1862) 0x508d3b JNE	508d4d

  (1862) 0x508d3d VMOVSD	(%R12,%R14,8),%XMM15

  (1862) 0x508d43 VMAXSD	%XMM15,%XMM0,%XMM0

  (1862) 0x508d48 VADDSD	%XMM15,%XMM9,%XMM9

  (1862) 0x508d4d LEA	0x5(%RAX),%R14

  (1862) 0x508d51 MOV	(%R9,%R14,8),%R15

  (1862) 0x508d55 CMP	%RBX,(%R10,%R15,8)

  (1862) 0x508d59 JNE	508d6b

  (1862) 0x508d5b VMOVSD	(%R12,%R14,8),%XMM12

  (1862) 0x508d61 VMAXSD	%XMM12,%XMM0,%XMM0

  (1862) 0x508d66 VADDSD	%XMM12,%XMM9,%XMM9

  (1862) 0x508d6b LEA	0x6(%RAX),%R14

  (1862) 0x508d6f MOV	(%R9,%R14,8),%R15

  (1862) 0x508d73 CMP	%RBX,(%R10,%R15,8)

  (1862) 0x508d77 JNE	508d89

  (1862) 0x508d79 VMOVSD	(%R12,%R14,8),%XMM14

  (1862) 0x508d7f VMAXSD	%XMM14,%XMM0,%XMM0

  (1862) 0x508d84 VADDSD	%XMM14,%XMM9,%XMM9

  (1862) 0x508d89 LEA	0x7(%RAX),%R14

  (1862) 0x508d8d CMP	%R13,%R14

  (1862) 0x508d90 JNE	508c9d

(1846) 0x508d96 MOV	0x70(%RSP),%RBX

(1846) 0x508d9b MOV	(%RCX),%R15

(1846) 0x508d9e MOV	(%RBX),%RAX

(1846) 0x508da1 MOV	%R15,0x60(%RSP)

(1846) 0x508da6 MOV	%RAX,0x40(%RSP)

(1846) 0x508dab CMP	%R15,%RAX

(1846) 0x508dae JGE	509038

(1846) 0x508db4 SUB	%RAX,%R15

(1846) 0x508db7 VMOVQ	(%R10,%RDI,8),%XMM11

(1846) 0x508dbd MOV	%RAX,%R14

(1846) 0x508dc0 MOV	%R15,%RBX

(1846) 0x508dc3 AND	$0x7,%EBX

(1846) 0x508dc6 JE	50984c

(1846) 0x508dcc CMP	$0x1,%RBX

(1846) 0x508dd0 JE	508ed9

(1846) 0x508dd6 CMP	$0x2,%RBX

(1846) 0x508dda JE	508eb2

(1846) 0x508de0 CMP	$0x3,%RBX

(1846) 0x508de4 JE	508e8b

(1846) 0x508dea CMP	$0x4,%RBX

(1846) 0x508dee JE	508e64

(1846) 0x508df0 CMP	$0x5,%RBX

(1846) 0x508df4 JE	508e49

(1846) 0x508df6 CMP	$0x6,%RBX

(1846) 0x508dfa JE	508e22

(1846) 0x508dfc MOV	0x40(%RSP),%R14

(1846) 0x508e01 MOV	0x68(%RSP),%RBX

(1846) 0x508e06 VMOVQ	%XMM11,%R15

(1846) 0x508e0b MOV	(%R8,%R14,8),%RAX

(1846) 0x508e0f CMP	(%RBX,%RAX,8),%R15

(1846) 0x508e13 JE	5098c4

(1846) 0x508e19 MOV	0x40(%RSP),%RAX

(1846) 0x508e1e LEA	0x1(%RAX),%R14

(1846) 0x508e22 MOV	0x68(%RSP),%RAX

(1846) 0x508e27 MOV	(%R8,%R14,8),%RBX

(1846) 0x508e2b VMOVQ	%XMM11,%R15

(1846) 0x508e30 CMP	(%RAX,%RBX,8),%R15

(1846) 0x508e34 JNE	508e46

(1846) 0x508e36 VMOVSD	(%RSI,%R14,8),%XMM13

(1846) 0x508e3c VMAXSD	%XMM13,%XMM0,%XMM0

(1846) 0x508e41 VADDSD	%XMM13,%XMM9,%XMM9

(1846) 0x508e46 INC	%R14

(1846) 0x508e49 MOV	0x68(%RSP),%RAX

(1846) 0x508e4e MOV	(%R8,%R14,8),%RBX

(1846) 0x508e52 VMOVQ	%XMM11,%R15

(1846) 0x508e57 CMP	(%RAX,%RBX,8),%R15

(1846) 0x508e5b JE	5097c7

(1846) 0x508e61 INC	%R14

(1846) 0x508e64 MOV	0x68(%RSP),%RAX

(1846) 0x508e69 MOV	(%R8,%R14,8),%RBX

(1846) 0x508e6d VMOVQ	%XMM11,%R15

(1846) 0x508e72 CMP	(%RAX,%RBX,8),%R15

(1846) 0x508e76 JNE	508e88

(1846) 0x508e78 VMOVSD	(%RSI,%R14,8),%XMM12

(1846) 0x508e7e VMAXSD	%XMM12,%XMM0,%XMM0

(1846) 0x508e83 VADDSD	%XMM12,%XMM9,%XMM9

(1846) 0x508e88 INC	%R14

(1846) 0x508e8b MOV	0x68(%RSP),%RAX

(1846) 0x508e90 MOV	(%R8,%R14,8),%RBX

(1846) 0x508e94 VMOVQ	%XMM11,%R15

(1846) 0x508e99 CMP	(%RAX,%RBX,8),%R15

(1846) 0x508e9d JNE	508eaf

(1846) 0x508e9f VMOVSD	(%RSI,%R14,8),%XMM14

(1846) 0x508ea5 VMAXSD	%XMM14,%XMM0,%XMM0

(1846) 0x508eaa VADDSD	%XMM14,%XMM9,%XMM9

(1846) 0x508eaf INC	%R14

(1846) 0x508eb2 MOV	0x68(%RSP),%RAX

(1846) 0x508eb7 MOV	(%R8,%R14,8),%RBX

(1846) 0x508ebb VMOVQ	%XMM11,%R15

(1846) 0x508ec0 CMP	(%RAX,%RBX,8),%R15

(1846) 0x508ec4 JNE	508ed6

(1846) 0x508ec6 VMOVSD	(%RSI,%R14,8),%XMM10

(1846) 0x508ecc VMAXSD	%XMM10,%XMM0,%XMM0

(1846) 0x508ed1 VADDSD	%XMM10,%XMM9,%XMM9

(1846) 0x508ed6 INC	%R14

(1846) 0x508ed9 MOV	0x68(%RSP),%RAX

(1846) 0x508ede MOV	(%R8,%R14,8),%RBX

(1846) 0x508ee2 VMOVQ	%XMM11,%R15

(1846) 0x508ee7 CMP	(%RAX,%RBX,8),%R15

(1846) 0x508eeb JNE	508efd

(1846) 0x508eed VMOVSD	(%RSI,%R14,8),%XMM13

(1846) 0x508ef3 VMAXSD	%XMM13,%XMM0,%XMM0

(1846) 0x508ef8 VADDSD	%XMM13,%XMM9,%XMM9

(1846) 0x508efd MOV	0x60(%RSP),%RAX

(1846) 0x508f02 INC	%R14

(1846) 0x508f05 CMP	%RAX,%R14

(1846) 0x508f08 JE	509038

(1846) 0x508f0e MOV	%R13,0x10(%RSP)

(1846) 0x508f13 MOV	%R11,%R13

(1846) 0x508f16 MOV	%RDX,%R11

(1846) 0x508f19 MOV	0x68(%RSP),%RDX

(1846) 0x508f1e MOV	%RAX,%R15

(1846) 0x508f21 VMOVQ	%XMM11,%RBX

(1846) 0x508f26 MOV	%RCX,0x28(%RSP)

  (1861) 0x508f2b MOV	(%R8,%R14,8),%RCX

  (1861) 0x508f2f CMP	(%RDX,%RCX,8),%RBX

  (1861) 0x508f33 JNE	508f45

  (1861) 0x508f35 VMOVSD	(%RSI,%R14,8),%XMM11

  (1861) 0x508f3b VMAXSD	%XMM11,%XMM0,%XMM0

  (1861) 0x508f40 VADDSD	%XMM11,%XMM9,%XMM9

  (1861) 0x508f45 LEA	0x1(%R14),%RAX

  (1861) 0x508f49 MOV	(%R8,%RAX,8),%R14

  (1861) 0x508f4d CMP	(%RDX,%R14,8),%RBX

  (1861) 0x508f51 JNE	508f62

  (1861) 0x508f53 VMOVSD	(%RSI,%RAX,8),%XMM15

  (1861) 0x508f58 VMAXSD	%XMM15,%XMM0,%XMM0

  (1861) 0x508f5d VADDSD	%XMM15,%XMM9,%XMM9

  (1861) 0x508f62 LEA	0x1(%RAX),%R14

  (1861) 0x508f66 MOV	(%R8,%R14,8),%RCX

  (1861) 0x508f6a CMP	(%RDX,%RCX,8),%RBX

  (1861) 0x508f6e JNE	508f80

  (1861) 0x508f70 VMOVSD	(%RSI,%R14,8),%XMM12

  (1861) 0x508f76 VMAXSD	%XMM12,%XMM0,%XMM0

  (1861) 0x508f7b VADDSD	%XMM12,%XMM9,%XMM9

  (1861) 0x508f80 LEA	0x2(%RAX),%R14

  (1861) 0x508f84 MOV	(%R8,%R14,8),%RCX

  (1861) 0x508f88 CMP	(%RDX,%RCX,8),%RBX

  (1861) 0x508f8c JNE	508f9e

  (1861) 0x508f8e VMOVSD	(%RSI,%R14,8),%XMM14

  (1861) 0x508f94 VMAXSD	%XMM14,%XMM0,%XMM0

  (1861) 0x508f99 VADDSD	%XMM14,%XMM9,%XMM9

  (1861) 0x508f9e LEA	0x3(%RAX),%R14

  (1861) 0x508fa2 MOV	(%R8,%R14,8),%RCX

  (1861) 0x508fa6 CMP	(%RDX,%RCX,8),%RBX

  (1861) 0x508faa JNE	508fbc

  (1861) 0x508fac VMOVSD	(%RSI,%R14,8),%XMM10

  (1861) 0x508fb2 VMAXSD	%XMM10,%XMM0,%XMM0

  (1861) 0x508fb7 VADDSD	%XMM10,%XMM9,%XMM9

  (1861) 0x508fbc LEA	0x4(%RAX),%R14

  (1861) 0x508fc0 MOV	(%R8,%R14,8),%RCX

  (1861) 0x508fc4 CMP	(%RDX,%RCX,8),%RBX

  (1861) 0x508fc8 JNE	508fda

  (1861) 0x508fca VMOVSD	(%RSI,%R14,8),%XMM13

  (1861) 0x508fd0 VMAXSD	%XMM13,%XMM0,%XMM0

  (1861) 0x508fd5 VADDSD	%XMM13,%XMM9,%XMM9

  (1861) 0x508fda LEA	0x5(%RAX),%R14

  (1861) 0x508fde MOV	(%R8,%R14,8),%RCX

  (1861) 0x508fe2 CMP	(%RDX,%RCX,8),%RBX

  (1861) 0x508fe6 JNE	508ff8

  (1861) 0x508fe8 VMOVSD	(%RSI,%R14,8),%XMM11

  (1861) 0x508fee VMAXSD	%XMM11,%XMM0,%XMM0

  (1861) 0x508ff3 VADDSD	%XMM11,%XMM9,%XMM9

  (1861) 0x508ff8 LEA	0x6(%RAX),%R14

  (1861) 0x508ffc MOV	(%R8,%R14,8),%RCX

  (1861) 0x509000 CMP	(%RDX,%RCX,8),%RBX

  (1861) 0x509004 JNE	509016

  (1861) 0x509006 VMOVSD	(%RSI,%R14,8),%XMM15

  (1861) 0x50900c VMAXSD	%XMM15,%XMM0,%XMM0

  (1861) 0x509011 VADDSD	%XMM15,%XMM9,%XMM9

  (1861) 0x509016 LEA	0x7(%RAX),%R14

  (1861) 0x50901a CMP	%R15,%R14

  (1861) 0x50901d JNE	508f2b

(1846) 0x509023 MOV	%R11,%RDX

(1846) 0x509026 MOV	0x28(%RSP),%RCX

(1846) 0x50902b MOV	%R13,%R11

(1846) 0x50902e MOV	0x10(%RSP),%R13

(1846) 0x509033 MOV	%R15,0x60(%RSP)

(1846) 0x509038 VMOVQ	%XMM16,%R15

(1846) 0x50903e MOV	0x40(%RSP),%RBX

(1846) 0x509043 VMOVQ	%XMM7,%RAX

(1846) 0x509048 VANDPD	%XMM2,%XMM1,%XMM1

(1846) 0x50904c SUB	%R15,%R13

(1846) 0x50904f MOV	0x78(%RSP),%R15

(1846) 0x509054 VMOVQ	%XMM17,%R14

(1846) 0x50905a VANDPD	%XMM2,%XMM9,%XMM9

(1846) 0x50905e LEA	-0x1(%RDX,%R13,1),%RDX

(1846) 0x509063 MOV	0x60(%RSP),%R13

(1846) 0x509068 MOVQ	$-0x1,(%RAX,%R14,1)

(1846) 0x509070 VMULSD	%XMM5,%XMM1,%XMM12

(1846) 0x509074 SUB	%RBX,%R13

(1846) 0x509077 MOV	-0x8(%R15),%RBX

(1846) 0x50907b MOV	(%R15),%R15

(1846) 0x50907e ADD	%R13,%R11

(1846) 0x509081 VCOMISD	%XMM12,%XMM9

(1846) 0x509086 LEA	0x1(%RBX),%R13

(1846) 0x50908a MOV	%RBX,0x60(%RSP)

(1846) 0x50908f JBE	50909c

(1846) 0x509091 CMPB	$0,0x30(%RSP)

(1846) 0x509096 JNE	509740

(1846) 0x50909c VMULSD	%XMM0,%XMM3,%XMM14

(1846) 0x5090a0 CMP	%R15,%R13

(1846) 0x5090a3 JGE	5090dc

(1846) 0x5090a5 MOV	0x78(%RSP),%R14

(1846) 0x5090aa VMOVQ	%XMM7,%RBX

(1846) 0x5090af NOP

  (1860) 0x5090b0 VCOMISD	(%R12,%R13,8),%XMM14

  (1860) 0x5090b6 JAE	5090c6

  (1860) 0x5090b8 MOV	(%R9,%R13,8),%RAX

  (1860) 0x5090bc MOV	(%R10,%RDI,8),%R15

  (1860) 0x5090c0 CMP	%R15,(%R10,%RAX,8)

  (1860) 0x5090c4 JE	5090d0

  (1860) 0x5090c6 DEC	%RDX

  (1860) 0x5090c9 MOV	$-0x1,%RAX

  (1860) 0x5090d0 MOV	%RAX,(%RBX,%R13,8)

  (1860) 0x5090d4 INC	%R13

  (1860) 0x5090d7 CMP	%R13,(%R14)

  (1860) 0x5090da JG	5090b0

(1846) 0x5090dc MOV	0x70(%RSP),%R13

(1846) 0x5090e1 MOV	(%R13),%R13

(1846) 0x5090e5 CMP	(%RCX),%R13

(1846) 0x5090e8 JGE	5083fc

(1846) 0x5090ee MOV	0x68(%RSP),%R14

(1846) 0x5090f3 VMOVQ	%XMM8,%RBX

(1846) 0x5090f8 VMULSD	%XMM0,%XMM3,%XMM0

(1846) 0x5090fc NOPL	(%RAX)

  (1859) 0x509100 VCOMISD	(%RSI,%R13,8),%XMM0

  (1859) 0x509106 JAE	509116

  (1859) 0x509108 MOV	(%R8,%R13,8),%RAX

  (1859) 0x50910c MOV	(%R10,%RDI,8),%R15

  (1859) 0x509110 CMP	%R15,(%R14,%RAX,8)

  (1859) 0x509114 JE	509120

  (1859) 0x509116 DEC	%R11

  (1859) 0x509119 MOV	$-0x1,%RAX

  (1859) 0x509120 MOV	%RAX,(%RBX,%R13,8)

  (1859) 0x509124 INC	%R13

  (1859) 0x509127 CMP	%R13,(%RCX)

  (1859) 0x50912a JG	509100

(1846) 0x50912c JMP	5083fc

0x509131 NOPW	%CS:(%RAX,%RAX,1)

0x50913c NOPL	(%RAX)

  (1856) 0x509140 MOV	0x78(%RSP),%RBX

  (1856) 0x509145 VMOVQ	%XMM7,%R15

  (1856) 0x50914a DEC	%RDX

  (1856) 0x50914d MOVQ	$-0x1,(%R15,%R13,8)

  (1856) 0x509155 INC	%R13

  (1856) 0x509158 CMP	(%RBX),%R13

  (1856) 0x50915b JL	508ac0

(1846) 0x509161 JMP	508ae6

0x509166 NOPW	%CS:(%RAX,%RAX,1)

(1846) 0x509170 CMP	%R13,%R14

(1846) 0x509173 JGE	5098f3

(1846) 0x509179 MOV	%R13,%R15

(1846) 0x50917c SUB	%RAX,%R15

(1846) 0x50917f LEA	-0x1(%R15),%RBX

(1846) 0x509183 SUB	$0x2,%R15

(1846) 0x509187 CMP	$0x2,%R15

(1846) 0x50918b JBE	509901

(1846) 0x509191 MOV	%RBX,%RAX

(1846) 0x509194 VMOVQ	%XMM17,%R15

(1846) 0x50919a VXORPD	%XMM0,%XMM0,%XMM0

(1846) 0x50919e VMOVAPD	%YMM0,%YMM11

(1846) 0x5091a2 SHR	$0x2,%RAX

(1846) 0x5091a6 SAL	$0x5,%RAX

(1846) 0x5091aa LEA	0x8(%R12,%R15,1),%R15

(1846) 0x5091af MOV	%RAX,0x40(%RSP)

(1846) 0x5091b4 ADD	%R15,%RAX

(1846) 0x5091b7 MOV	%RAX,0x60(%RSP)

(1846) 0x5091bc MOV	0x40(%RSP),%RAX

(1846) 0x5091c1 SUB	$0x20,%RAX

(1846) 0x5091c5 SHR	$0x5,%RAX

(1846) 0x5091c9 INC	%RAX

(1846) 0x5091cc AND	$0x7,%EAX

(1846) 0x5091cf JE	50927e

(1846) 0x5091d5 CMP	$0x1,%RAX

(1846) 0x5091d9 JE	509260

(1846) 0x5091df CMP	$0x2,%RAX

(1846) 0x5091e3 JE	50924d

(1846) 0x5091e5 CMP	$0x3,%RAX

(1846) 0x5091e9 JE	50923a

(1846) 0x5091eb CMP	$0x4,%RAX

(1846) 0x5091ef JE	509227

(1846) 0x5091f1 CMP	$0x5,%RAX

(1846) 0x5091f5 JE	509214

(1846) 0x5091f7 CMP	$0x6,%RAX

(1846) 0x5091fb JNE	50988a

(1846) 0x509201 VMOVUPD	(%R15),%YMM10

(1846) 0x509206 ADD	$0x20,%R15

(1846) 0x50920a VMAXPD	%YMM10,%YMM11,%YMM11

(1846) 0x50920f VADDPD	%YMM10,%YMM0,%YMM0

(1846) 0x509214 VMOVUPD	(%R15),%YMM15

(1846) 0x509219 ADD	$0x20,%R15

(1846) 0x50921d VMAXPD	%YMM15,%YMM11,%YMM11

(1846) 0x509222 VADDPD	%YMM15,%YMM0,%YMM0

(1846) 0x509227 VMOVUPD	(%R15),%YMM12

(1846) 0x50922c ADD	$0x20,%R15

(1846) 0x509230 VMAXPD	%YMM12,%YMM11,%YMM11

(1846) 0x509235 VADDPD	%YMM12,%YMM0,%YMM0

(1846) 0x50923a VMOVUPD	(%R15),%YMM13

(1846) 0x50923f ADD	$0x20,%R15

(1846) 0x509243 VMAXPD	%YMM13,%YMM11,%YMM11

(1846) 0x509248 VADDPD	%YMM13,%YMM0,%YMM0

(1846) 0x50924d VMOVUPD	(%R15),%YMM9

(1846) 0x509252 ADD	$0x20,%R15

(1846) 0x509256 VMAXPD	%YMM9,%YMM11,%YMM11

(1846) 0x50925b VADDPD	%YMM9,%YMM0,%YMM0

(1846) 0x509260 VMOVUPD	(%R15),%YMM14

(1846) 0x509265 ADD	$0x20,%R15

(1846) 0x509269 VMAXPD	%YMM14,%YMM11,%YMM11

(1846) 0x50926e VADDPD	%YMM14,%YMM0,%YMM0

(1846) 0x509273 CMP	%R15,0x60(%RSP)

(1846) 0x509278 JE	509310

  (1853) 0x50927e VMOVUPD	(%R15),%YMM10

  (1853) 0x509283 VMOVUPD	0x20(%R15),%YMM13

  (1853) 0x509289 VMOVUPD	0x40(%R15),%YMM9

  (1853) 0x50928f ADD	$0x100,%R15

  (1853) 0x509296 VMAXPD	%YMM10,%YMM11,%YMM15

  (1853) 0x50929b VADDPD	%YMM10,%YMM0,%YMM12

  (1853) 0x5092a0 VMAXPD	%YMM13,%YMM15,%YMM14

  (1853) 0x5092a5 VADDPD	%YMM13,%YMM12,%YMM0

  (1853) 0x5092aa VMOVUPD	-0xa0(%R15),%YMM15

  (1853) 0x5092b3 VMAXPD	%YMM9,%YMM14,%YMM11

  (1853) 0x5092b8 VADDPD	%YMM9,%YMM0,%YMM10

  (1853) 0x5092bd VMOVUPD	-0x80(%R15),%YMM14

  (1853) 0x5092c3 VMOVUPD	-0x60(%R15),%YMM9

  (1853) 0x5092c9 VADDPD	%YMM15,%YMM10,%YMM13

  (1853) 0x5092ce VMAXPD	%YMM15,%YMM11,%YMM12

  (1853) 0x5092d3 VADDPD	%YMM14,%YMM13,%YMM0

  (1853) 0x5092d8 VMAXPD	%YMM14,%YMM12,%YMM11

  (1853) 0x5092dd VMOVUPD	-0x40(%R15),%YMM12

  (1853) 0x5092e3 VMAXPD	%YMM9,%YMM11,%YMM10

  (1853) 0x5092e8 VADDPD	%YMM9,%YMM0,%YMM15

  (1853) 0x5092ed VMOVUPD	-0x20(%R15),%YMM0

  (1853) 0x5092f3 VMAXPD	%YMM12,%YMM10,%YMM13

  (1853) 0x5092f8 VADDPD	%YMM12,%YMM15,%YMM14

  (1853) 0x5092fd VMAXPD	%YMM0,%YMM13,%YMM11

  (1853) 0x509301 VADDPD	%YMM0,%YMM14,%YMM0

  (1853) 0x509305 CMP	%R15,0x60(%RSP)

  (1853) 0x50930a JNE	50927e

(1846) 0x509310 VEXTRACTF64X2	$0x1,%YMM0,%XMM9

(1846) 0x509317 VADDPD	%XMM0,%XMM9,%XMM15

(1846) 0x50931b VEXTRACTF64X2	$0x1,%YMM11,%XMM13

(1846) 0x509322 VMAXPD	%XMM11,%XMM13,%XMM11

(1846) 0x509327 MOV	%RBX,%R15

(1846) 0x50932a AND	$-0x4,%R15

(1846) 0x50932e VUNPCKHPD	%XMM15,%XMM15,%XMM10

(1846) 0x509333 VUNPCKHPD	%XMM11,%XMM11,%XMM0

(1846) 0x509338 ADD	%R15,%R14

(1846) 0x50933b AND	$0x3,%EBX

(1846) 0x50933e VADDPD	%XMM15,%XMM10,%XMM12

(1846) 0x509343 VADDSD	%XMM12,%XMM1,%XMM14

(1846) 0x509348 VMAXPD	%XMM11,%XMM0,%XMM12

(1846) 0x50934d JE	50939b

(1846) 0x50934f LEA	(,%R14,8),%RBX

(1846) 0x509357 LEA	0x1(%R14),%RAX

(1846) 0x50935b VMOVSD	(%R12,%RBX,1),%XMM9

(1846) 0x509361 VMAXSD	%XMM9,%XMM12,%XMM12

(1846) 0x509366 VADDSD	%XMM9,%XMM14,%XMM14

(1846) 0x50936b CMP	%R13,%RAX

(1846) 0x50936e JGE	50939b

(1846) 0x509370 ADD	$0x2,%R14

(1846) 0x509374 VMOVSD	0x8(%R12,%RBX,1),%XMM15

(1846) 0x50937b VMAXSD	%XMM15,%XMM12,%XMM12

(1846) 0x509380 VADDSD	%XMM15,%XMM14,%XMM14

(1846) 0x509385 CMP	%R13,%R14

(1846) 0x509388 JGE	50939b

(1846) 0x50938a VMOVSD	0x10(%R12,%RBX,1),%XMM10

(1846) 0x509391 VMAXSD	%XMM10,%XMM12,%XMM12

(1846) 0x509396 VADDSD	%XMM10,%XMM14,%XMM14

(1846) 0x50939b MOV	0x70(%RSP),%R14

(1846) 0x5093a0 MOV	(%RCX),%RBX

(1846) 0x5093a3 MOV	(%R14),%R15

(1846) 0x5093a6 MOV	%RBX,0x60(%RSP)

(1846) 0x5093ab CMP	%RBX,%R15

(1846) 0x5093ae JGE	5095e3

(1846) 0x5093b4 MOV	%RBX,%RAX

(1846) 0x5093b7 SUB	%R15,%RAX

(1846) 0x5093ba LEA	-0x1(%RAX),%R14

(1846) 0x5093be MOV	%RAX,0x40(%RSP)

(1846) 0x5093c3 CMP	$0x2,%R14

(1846) 0x5093c7 JBE	50990f

(1846) 0x5093cd SHR	$0x2,%RAX

(1846) 0x5093d1 VXORPD	%XMM9,%XMM9,%XMM9

(1846) 0x5093d6 VBROADCASTSD	%XMM12,%YMM0

(1846) 0x5093db SAL	$0x5,%RAX

(1846) 0x5093df LEA	(%RSI,%R15,8),%R14

(1846) 0x5093e3 LEA	(%RAX,%R14,1),%RBX

(1846) 0x5093e7 SUB	$0x20,%RAX

(1846) 0x5093eb SHR	$0x5,%RAX

(1846) 0x5093ef MOV	%RBX,0x28(%RSP)

(1846) 0x5093f4 INC	%RAX

(1846) 0x5093f7 AND	$0x7,%EAX

(1846) 0x5093fa JE	5094a9

(1846) 0x509400 CMP	$0x1,%RAX

(1846) 0x509404 JE	50948b

(1846) 0x50940a CMP	$0x2,%RAX

(1846) 0x50940e JE	509478

(1846) 0x509410 CMP	$0x3,%RAX

(1846) 0x509414 JE	509465

(1846) 0x509416 CMP	$0x4,%RAX

(1846) 0x50941a JE	509452

(1846) 0x50941c CMP	$0x5,%RAX

(1846) 0x509420 JE	50943f

(1846) 0x509422 CMP	$0x6,%RAX

(1846) 0x509426 JNE	50989c

(1846) 0x50942c VMOVUPD	(%R14),%YMM13

(1846) 0x509431 ADD	$0x20,%R14

(1846) 0x509435 VMAXPD	%YMM13,%YMM0,%YMM0

(1846) 0x50943a VADDPD	%YMM13,%YMM9,%YMM9

(1846) 0x50943f VMOVUPD	(%R14),%YMM11

(1846) 0x509444 ADD	$0x20,%R14

(1846) 0x509448 VMAXPD	%YMM11,%YMM0,%YMM0

(1846) 0x50944d VADDPD	%YMM11,%YMM9,%YMM9

(1846) 0x509452 VMOVUPD	(%R14),%YMM15

(1846) 0x509457 ADD	$0x20,%R14

(1846) 0x50945b VMAXPD	%YMM15,%YMM0,%YMM0

(1846) 0x509460 VADDPD	%YMM15,%YMM9,%YMM9

(1846) 0x509465 VMOVUPD	(%R14),%YMM10

(1846) 0x50946a ADD	$0x20,%R14

(1846) 0x50946e VMAXPD	%YMM10,%YMM0,%YMM0

(1846) 0x509473 VADDPD	%YMM10,%YMM9,%YMM9

(1846) 0x509478 VMOVUPD	(%R14),%YMM12

(1846) 0x50947d ADD	$0x20,%R14

(1846) 0x509481 VMAXPD	%YMM12,%YMM0,%YMM0

(1846) 0x509486 VADDPD	%YMM12,%YMM9,%YMM9

(1846) 0x50948b VMOVUPD	(%R14),%YMM13

(1846) 0x509490 ADD	$0x20,%R14

(1846) 0x509494 VMAXPD	%YMM13,%YMM0,%YMM0

(1846) 0x509499 VADDPD	%YMM13,%YMM9,%YMM9

(1846) 0x50949e CMP	%R14,0x28(%RSP)

(1846) 0x5094a3 JE	50954a

(1846) 0x5094a9 MOV	0x40(%RSP),%RAX

  (1852) 0x5094ae VMOVUPD	(%R14),%YMM11

  (1852) 0x5094b3 VMOVUPD	0x20(%R14),%YMM12

  (1852) 0x5094b9 ADD	$0x100,%R14

  (1852) 0x5094c0 VMAXPD	%YMM11,%YMM0,%YMM15

  (1852) 0x5094c5 VADDPD	%YMM11,%YMM9,%YMM10

  (1852) 0x5094ca VMOVUPD	-0xc0(%R14),%YMM11

  (1852) 0x5094d3 VMAXPD	%YMM12,%YMM15,%YMM13

  (1852) 0x5094d8 VADDPD	%YMM12,%YMM10,%YMM9

  (1852) 0x5094dd VMOVUPD	-0xa0(%R14),%YMM10

  (1852) 0x5094e6 VMAXPD	%YMM11,%YMM13,%YMM0

  (1852) 0x5094eb VADDPD	%YMM11,%YMM9,%YMM15

  (1852) 0x5094f0 VMOVUPD	-0x80(%R14),%YMM9

  (1852) 0x5094f6 VMOVUPD	-0x60(%R14),%YMM11

  (1852) 0x5094fc VMAXPD	%YMM10,%YMM0,%YMM12

  (1852) 0x509501 VADDPD	%YMM10,%YMM15,%YMM13

  (1852) 0x509506 VMAXPD	%YMM9,%YMM12,%YMM0

  (1852) 0x50950b VADDPD	%YMM9,%YMM13,%YMM15

  (1852) 0x509510 VMOVUPD	-0x40(%R14),%YMM13

  (1852) 0x509516 VADDPD	%YMM11,%YMM15,%YMM12

  (1852) 0x50951b VMAXPD	%YMM11,%YMM0,%YMM10

  (1852) 0x509520 VMOVUPD	-0x20(%R14),%YMM15

  (1852) 0x509526 VMAXPD	%YMM13,%YMM10,%YMM0

  (1852) 0x50952b VADDPD	%YMM13,%YMM12,%YMM9

  (1852) 0x509530 VMAXPD	%YMM15,%YMM0,%YMM0

  (1852) 0x509535 VADDPD	%YMM15,%YMM9,%YMM9

  (1852) 0x50953a CMP	%R14,0x28(%RSP)

  (1852) 0x50953f JNE	5094ae

(1846) 0x509545 MOV	%RAX,0x40(%RSP)

(1846) 0x50954a VEXTRACTF64X2	$0x1,%YMM9,%XMM11

(1846) 0x509551 MOV	0x40(%RSP),%RBX

(1846) 0x509556 VADDPD	%XMM9,%XMM11,%XMM10

(1846) 0x50955b VEXTRACTF64X2	$0x1,%YMM0,%XMM9

(1846) 0x509562 VMAXPD	%XMM0,%XMM9,%XMM15

(1846) 0x509566 VUNPCKHPD	%XMM10,%XMM10,%XMM12

(1846) 0x50956b VADDPD	%XMM10,%XMM12,%XMM13

(1846) 0x509570 VUNPCKHPD	%XMM15,%XMM15,%XMM0

(1846) 0x509575 MOV	%RBX,%R14

(1846) 0x509578 VMAXPD	%XMM15,%XMM0,%XMM12

(1846) 0x50957d AND	$-0x4,%R14

(1846) 0x509581 ADD	%R15,%R14

(1846) 0x509584 VADDSD	%XMM13,%XMM14,%XMM14

(1846) 0x509589 TEST	$0x3,%BL

(1846) 0x50958c JE	5095e3

(1846) 0x50958e LEA	0x1(%R14),%RAX

(1846) 0x509592 LEA	(,%R14,8),%RBX

(1846) 0x50959a MOV	%RAX,0x40(%RSP)

(1846) 0x50959f MOV	0x60(%RSP),%RAX

(1846) 0x5095a4 VMOVSD	(%RSI,%RBX,1),%XMM11

(1846) 0x5095a9 VMAXSD	%XMM11,%XMM12,%XMM12

(1846) 0x5095ae VADDSD	%XMM11,%XMM14,%XMM14

(1846) 0x5095b3 CMP	%RAX,0x40(%RSP)

(1846) 0x5095b8 JGE	5095e3

(1846) 0x5095ba ADD	$0x2,%R14

(1846) 0x5095be VMOVSD	0x8(%RSI,%RBX,1),%XMM10

(1846) 0x5095c4 VMAXSD	%XMM10,%XMM12,%XMM12

(1846) 0x5095c9 VADDSD	%XMM10,%XMM14,%XMM14

(1846) 0x5095ce CMP	%RAX,%R14

(1846) 0x5095d1 JGE	5095e3

(1846) 0x5095d3 VMOVSD	0x10(%RSI,%RBX,1),%XMM13

(1846) 0x5095d9 VMAXSD	%XMM13,%XMM12,%XMM12

(1846) 0x5095de VADDSD	%XMM13,%XMM14,%XMM14

(1846) 0x5095e3 VMOVQ	%XMM16,%R14

(1846) 0x5095e9 MOV	0x78(%RSP),%RAX

(1846) 0x5095ee VMOVQ	%XMM17,%RBX

(1846) 0x5095f4 VANDPD	%XMM2,%XMM14,%XMM14

(1846) 0x5095f8 SUB	%R14,%R13

(1846) 0x5095fb VANDPD	%XMM2,%XMM1,%XMM1

(1846) 0x5095ff LEA	-0x1(%RDX,%R13,1),%RDX

(1846) 0x509604 MOV	0x60(%RSP),%R13

(1846) 0x509609 VMULSD	%XMM5,%XMM1,%XMM9

(1846) 0x50960d SUB	%R15,%R13

(1846) 0x509610 VMOVQ	%XMM7,%R15

(1846) 0x509615 MOVQ	$-0x1,(%R15,%RBX,1)

(1846) 0x50961d MOV	-0x8(%RAX),%R14

(1846) 0x509621 ADD	%R13,%R11

(1846) 0x509624 MOV	(%RAX),%R15

(1846) 0x509627 VCOMISD	%XMM9,%XMM14

(1846) 0x50962c LEA	0x1(%R14),%R13

(1846) 0x509630 MOV	%R14,0x60(%RSP)

(1846) 0x509635 JBE	509642

(1846) 0x509637 CMPB	$0,0x30(%RSP)

(1846) 0x50963c JNE	509740

(1846) 0x509642 VMULSD	%XMM12,%XMM3,%XMM15

(1846) 0x509647 CMP	%R13,%R15

(1846) 0x50964a JLE	5096a6

(1846) 0x50964c NOPW	%CS:(%RAX,%RAX,1)

(1846) 0x509657 NOPW	%CS:(%RAX,%RAX,1)

(1846) 0x509662 NOPW	%CS:(%RAX,%RAX,1)

(1846) 0x50966d NOPW	%CS:(%RAX,%RAX,1)

(1846) 0x509678 NOPL	(%RAX,%RAX,1)

  (1849) 0x509680 VCOMISD	(%R12,%R13,8),%XMM15

  (1849) 0x509686 JAE	509710

  (1849) 0x50968c MOV	(%R9,%R13,8),%R15

  (1849) 0x509690 MOV	0x78(%RSP),%RAX

  (1849) 0x509695 VMOVQ	%XMM7,%RBX

  (1849) 0x50969a MOV	%R15,(%RBX,%R13,8)

  (1849) 0x50969e INC	%R13

  (1849) 0x5096a1 CMP	%R13,(%RAX)

  (1849) 0x5096a4 JG	509680

(1846) 0x5096a6 MOV	0x70(%RSP),%R13

(1846) 0x5096ab MOV	(%R13),%R14

(1846) 0x5096af CMP	(%RCX),%R14

(1846) 0x5096b2 JGE	5083fc

(1846) 0x5096b8 VMULSD	%XMM12,%XMM3,%XMM12

(1846) 0x5096bd NOPL	(%RAX)

  (1847) 0x5096c0 VCOMISD	(%RSI,%R14,8),%XMM12

  (1847) 0x5096c6 JAE	5096e9

  (1848) 0x5096c8 MOV	(%R8,%R14,8),%RBX

  (1848) 0x5096cc VMOVQ	%XMM8,%RAX

  (1848) 0x5096d1 MOV	%RBX,(%RAX,%R14,8)

  (1848) 0x5096d5 INC	%R14

  (1848) 0x5096d8 CMP	%R14,(%RCX)

  (1848) 0x5096db JLE	5083fc

  (1848) 0x5096e1 VCOMISD	(%RSI,%R14,8),%XMM12

  (1848) 0x5096e7 JB	5096c8

  (1847) 0x5096e9 VMOVQ	%XMM8,%R15

  (1847) 0x5096ee DEC	%R11

  (1847) 0x5096f1 MOVQ	$-0x1,(%R15,%R14,8)

  (1847) 0x5096f9 INC	%R14

  (1847) 0x5096fc CMP	%R14,(%RCX)

  (1847) 0x5096ff JG	5096c0

(1846) 0x509701 JMP	5083fc

0x509706 NOPW	%CS:(%RAX,%RAX,1)

  (1849) 0x509710 MOV	0x78(%RSP),%R15

  (1849) 0x509715 VMOVQ	%XMM7,%R14

  (1849) 0x50971a DEC	%RDX

  (1849) 0x50971d MOVQ	$-0x1,(%R14,%R13,8)

  (1849) 0x509725 INC	%R13

  (1849) 0x509728 CMP	%R13,(%R15)

  (1849) 0x50972b JG	509680

(1846) 0x509731 JMP	5096a6

0x509736 NOPW	%CS:(%RAX,%RAX,1)

(1846) 0x509740 CMP	%R13,%R15

(1846) 0x509743 JLE	509785

(1846) 0x509745 MOV	0x78(%RSP),%R14

(1846) 0x50974a VMOVQ	%XMM7,%RAX

(1846) 0x50974f NOPW	%CS:(%RAX,%RAX,1)

(1846) 0x50975a NOPW	(%RAX,%RAX,1)

  (1851) 0x509760 MOVQ	$-0x1,(%RAX,%R13,8)

  (1851) 0x509768 MOV	(%R14),%R15

  (1851) 0x50976b INC	%R13

  (1851) 0x50976e CMP	%R13,%R15

  (1851) 0x509771 JG	509760

(1846) 0x509773 MOV	0x78(%RSP),%R13

(1846) 0x509778 MOV	-0x8(%R13),%RBX

(1846) 0x50977c LEA	0x1(%RBX),%R13

(1846) 0x509780 MOV	%RBX,0x60(%RSP)

(1846) 0x509785 SUB	%R13,%R15

(1846) 0x509788 MOV	(%RCX),%R14

(1846) 0x50978b VMOVQ	%XMM8,%RAX

(1846) 0x509790 SUB	%R15,%RDX

(1846) 0x509793 MOV	0x70(%RSP),%R15

(1846) 0x509798 MOV	(%R15),%RBX

(1846) 0x50979b CMP	%R14,%RBX

(1846) 0x50979e JGE	5097bc

  (1850) 0x5097a0 MOVQ	$-0x1,(%RAX,%RBX,8)

  (1850) 0x5097a8 MOV	(%RCX),%R14

  (1850) 0x5097ab INC	%RBX

  (1850) 0x5097ae CMP	%RBX,%R14

  (1850) 0x5097b1 JG	5097a0

(1846) 0x5097b3 MOV	0x70(%RSP),%R13

(1846) 0x5097b8 MOV	(%R13),%RBX

(1846) 0x5097bc SUB	%RBX,%R14

(1846) 0x5097bf SUB	%R14,%R11

(1846) 0x5097c2 JMP	5083fc

(1846) 0x5097c7 VMOVSD	(%RSI,%R14,8),%XMM15

(1846) 0x5097cd VMAXSD	%XMM15,%XMM0,%XMM0

(1846) 0x5097d2 VADDSD	%XMM15,%XMM9,%XMM9

(1846) 0x5097d7 JMP	508e61

(1846) 0x5097dc VMOVSD	(%R12,%R14,8),%XMM14

(1846) 0x5097e2 VMAXSD	%XMM14,%XMM0,%XMM0

(1846) 0x5097e7 VADDSD	%XMM14,%XMM9,%XMM9

(1846) 0x5097ec JMP	508c1d

(1846) 0x5097f1 VMOVSD	(%R12,%R14,8),%XMM10

(1846) 0x5097f7 VMINSD	%XMM10,%XMM0,%XMM0

(1846) 0x5097fc VADDSD	%XMM10,%XMM9,%XMM9

(1846) 0x509801 JMP	507eba

(1846) 0x509806 VMOVSD	(%RSI,%R14,8),%XMM12

(1846) 0x50980c VMINSD	%XMM12,%XMM0,%XMM0

(1846) 0x509811 VADDSD	%XMM12,%XMM9,%XMM9

(1846) 0x509816 JMP	508109

(1846) 0x50981b MOV	%R13,0x10(%RSP)

(1846) 0x509820 MOV	0x60(%RSP),%R15

(1846) 0x509825 MOV	%R11,%R13

(1846) 0x509828 VMOVQ	%XMM14,%RBX

(1846) 0x50982d MOV	%RDX,%R11

(1846) 0x509830 MOV	%RCX,0x28(%RSP)

(1846) 0x509835 MOV	0x68(%RSP),%RDX

(1846) 0x50983a JMP	5081fa

(1846) 0x50983f VMOVAPD	%XMM1,%XMM9

(1846) 0x509843 VXORPD	%XMM0,%XMM0,%XMM0

(1846) 0x509847 JMP	508050

(1846) 0x50984c MOV	%R13,0x10(%RSP)

(1846) 0x509851 MOV	0x60(%RSP),%R15

(1846) 0x509856 MOV	%R11,%R13

(1846) 0x509859 VMOVQ	%XMM11,%RBX

(1846) 0x50985e MOV	%RDX,%R11

(1846) 0x509861 MOV	%RCX,0x28(%RSP)

(1846) 0x509866 MOV	0x68(%RSP),%RDX

(1846) 0x50986b JMP	508f2b

(1846) 0x509870 VMOVAPD	%XMM1,%XMM9

(1846) 0x509874 VXORPD	%XMM0,%XMM0,%XMM0

(1846) 0x509878 JMP	508d96

(1846) 0x50987d VMOVAPD	%XMM1,%XMM11

(1846) 0x509881 VXORPD	%XMM0,%XMM0,%XMM0

(1846) 0x509885 JMP	5087d4

(1846) 0x50988a VMOVUPD	(%R15),%YMM0

(1846) 0x50988f ADD	$0x20,%R15

(1846) 0x509893 VMAXPD	%YMM0,%YMM11,%YMM11

(1846) 0x509897 JMP	509201

(1846) 0x50989c VMOVUPD	(%R14),%YMM9

(1846) 0x5098a1 ADD	$0x20,%R14

(1846) 0x5098a5 VMAXPD	%YMM9,%YMM0,%YMM0

(1846) 0x5098aa JMP	50942c

(1846) 0x5098af VMOVSD	(%R12,%R14,8),%XMM15

(1846) 0x5098b5 VMAXSD	%XMM15,%XMM0,%XMM0

(1846) 0x5098ba VADDSD	%XMM15,%XMM1,%XMM9

(1846) 0x5098bf JMP	508bef

(1846) 0x5098c4 MOV	0x40(%RSP),%R14

(1846) 0x5098c9 VMOVSD	(%RSI,%R14,8),%XMM10

(1846) 0x5098cf VMAXSD	%XMM10,%XMM0,%XMM0

(1846) 0x5098d4 VADDSD	%XMM10,%XMM9,%XMM9

(1846) 0x5098d9 JMP	508e19

(1846) 0x5098de MOV	%R15,%R14

(1846) 0x5098e1 JMP	5089e4

(1846) 0x5098e6 VMOVAPD	%XMM1,%XMM11

(1846) 0x5098ea VXORPD	%XMM0,%XMM0,%XMM0

(1846) 0x5098ee JMP	508788

(1846) 0x5098f3 VMOVAPD	%XMM1,%XMM14

(1846) 0x5098f7 VXORPD	%XMM12,%XMM12,%XMM12

(1846) 0x5098fc JMP	50939b

(1846) 0x509901 VMOVAPD	%XMM1,%XMM14

(1846) 0x509905 VXORPD	%XMM12,%XMM12,%XMM12

(1846) 0x50990a JMP	50934f

(1846) 0x50990f MOV	%R15,%R14

(1846) 0x509912 JMP	50958e

0x509917 NOPW	(%RAX,%RAX,1)

Coverage (%)	Name	Source Location	Module
►96.13+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►2.97+	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	hypre_BoomerAMGCreateS	par_strength.c:246	exec
○	hypre_BoomerAMGSetup	par_amg_setup.c:581	exec
○	hypre_PCGSetup	pcg.c:234	exec
○	main	amg.c:398	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	amg.c:253	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_3

Source file and lines	par_strength.c:246-513
Module	exec

The function is defined in /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:246-283,289-302,309-355,363-369,376-382,392-398,405-411,424-445,451-472,480,492-513.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 18.25 to 5.00 cycles (3.65x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is probably not vectorized. Only 12% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 18.25 to 1.80 cycles (10.16x speedup).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Performance is limited by:

reading data from caches/RAM (load units are a bottleneck)
writing data to caches/RAM (the store unit is a bottleneck)

By removing all these bottlenecks, you can lower the cost of an iteration from 18.25 to 16.88 cycles (1.08x speedup).

Workaround

Read less array elements
Write less array elements
Provide more information to your compiler:
- use the 'restrict' C99 keyword

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

hypre_GetSimpleThreadPartition: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:250
hypre_prefix_sum_pair: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:480

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

LEA: 4 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:268
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:268
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:495
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:495
VCOMISD: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:342

Type of elements and instruction set

1 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 344 bytes (43 double precision FP elements). The binary function is storing 185 bytes (23 double precision FP elements).

General properties

nb instructions	141
nb uops	135
loop length	726
used x86 registers	16
used mmx registers	0
used xmm registers	10
used ymm registers	0
used zmm registers	0
nb stack references	20

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	16.88 cycles
front end	16.88 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	5.50	5.50	5.50	5.50	5.50	5.50	18.25	18.25	18.25	18.25	0.00	0.00	0.50	0.50	4.00	4.00
cycles	5.50	5.50	5.50	5.50	5.50	5.50	18.25	18.25	18.25	18.25	0.00	0.00	0.50	0.50	4.00	4.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	16.88
Dispatch	18.25
Overall L1	18.25

Vectorization ratios

INT

all	1%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	5%

all	11%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	50%

INT+FP

all	3%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	10%

Vector efficiency ratios

INT

all	12%
load	12%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	13%

all	13%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	18%

INT+FP

all	12%
load	12%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	13%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 18.25 cycles. At this rate:

7% of peak load performance is reached (18.85 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
7% of peak store performance is reached (10.14 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 507c40

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
AND $-0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB $0xa0,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x70(%RDI),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV 0x58(%RDI),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x88(%RDI),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV 0x80(%RDI),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV 0x78(%RDI),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x68(%RDI),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x60(%RDI),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV 0x98(%RDI),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x90(%RDI),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (12.5%)
MOV %RDX,0x38(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x50(%RDI),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV %R9,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
MOV %R8,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
MOV %RCX,(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
MOV %RSI,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
LEA 0x88(%RSP),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RDX,0x8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x30(%RDI),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x28(%RDI),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV 0x10(%RDI),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x38(%RDI),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV 0x20(%RDI),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
VMOVSD 0x8(%RDI),%XMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD (%RDI),%XMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	0.50	scal (12.5%)
MOV 0x48(%RDI),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV 0x40(%RDI),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
VMOVSD %XMM5,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVSD %XMM3,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %R13,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x18(%RDI),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (12.5%)
LEA 0x80(%RSP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R8,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
MOV %R11,0x28(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,0x18(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
CALL 5a9cf0 <hypre_GetSimpleThreadPartition>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0.50	N/A
VMOVQ 0x88(%RSP),%XMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	0.50	scal (12.5%)
MOV 0x80(%RSP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV 0x60(%RSP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (12.5%)
MOVQ $0,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (6.3%)
MOV 0x40(%RSP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x30(%RSP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOVQ $0,0x98(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (6.3%)
VMOVSD 0x78(%RSP),%XMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x70(%RSP),%XMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ %XMM4,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
CMP %RDX,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JGE 508446 <hypre_BoomerAMGCreateS._omp_fn.1+0x806>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x20(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
LEA (,%RDI,8),%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV 0x18(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
VMOVQ %R12,%XMM8	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
VMOVQ %R8,%XMM18	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
VMOVQ %R10,%XMM19	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
MOV %R9,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
VMOVSD 0xa79b2(%RIP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ %RBX,%XMM7	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
VCOMISD %XMM5,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0.50	0.50	6	0.50	scal (12.5%)
MOV %R14,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SETAB 0x30(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	1	0.50	N/A
MOV %R15,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %R13,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
VMOVQ 0xa81eb(%RIP),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	0.50	scal (12.5%)
VXORPD %XMM6,%XMM6,%XMM6	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
LEA (%RSI,%R11,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x8(%RAX,%R11,1),%RDX	2	0	0	0.50	0.50	0	0	0.25	0.25	0.25	0.25	0	0	0	0	2	0.50	N/A
MOV %RCX,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
LEA 0x8(%RSI,%R11,1),%RCX	2	0	0	0.50	0.50	0	0	0.25	0.25	0.25	0.25	0	0	0	0	2	0.50	N/A
MOV 0x28(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV %RDX,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
XOR %R11D,%R11D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
VMOVQ %XMM8,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM7,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %R11,0x98(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDX,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
VMOVQ %XMM18,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM19,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
MOV 0x8(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV 0x38(%RSP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV 0x58(%RSP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
LEA 0x98(%RSP),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x90(%RSP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R10,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
SAL $0x3,%RSI	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	1	0.33	N/A
LEA (%R15,%RSI,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA (%R14,%RSI,1),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
CALL 5ab200 <hypre_prefix_sum_pair>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0.50	N/A
MOV 0x80(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV 0x88(%RSP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
CMP %RDX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JGE 50857b <hypre_BoomerAMGCreateS._omp_fn.1+0x93b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x90(%RSP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x98(%RSP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x18(%RSP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV 0x20(%RSP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV %R15,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R14,%RDX,8),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
SAL $0x3,%RAX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV %RCX,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
LEA (%R14,%RAX,1),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %RAX,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R13,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
VMOVQ %R9,%XMM2	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
MOV 0x70(%RSP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (12.5%)
MOV (%RSP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (12.5%)
LEA 0x8(%R8,%RAX,1),%R8	2	0	0	0.50	0.50	0	0	0.25	0.25	0.25	0.25	0	0	0	0	2	0.50	N/A
LEA 0x8(%R11,%RAX,1),%R11	2	0	0	0.50	0.50	0	0	0.25	0.25	0.25	0.25	0	0	0	0	2	0.50	N/A
LEA -0x28(%RBP),%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	1	0.50	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_3

Source file and lines	par_strength.c:246-513
Module	exec

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 18.25 to 5.00 cycles (3.65x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Performance is limited by:

reading data from caches/RAM (load units are a bottleneck)
writing data to caches/RAM (the store unit is a bottleneck)

By removing all these bottlenecks, you can lower the cost of an iteration from 18.25 to 16.88 cycles (1.08x speedup).

Workaround

Read less array elements
Write less array elements
Provide more information to your compiler:
- use the 'restrict' C99 keyword

No data for this section

CALL instructions

Detected function call instructions.

Details

hypre_GetSimpleThreadPartition: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:250
hypre_prefix_sum_pair: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:480

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

LEA: 4 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:268
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:268
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:495
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:495
VCOMISD: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:342

Type of elements and instruction set

1 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).

Matching between your function (in the source code) and the binary function

General properties

nb instructions	141
nb uops	135
loop length	726
used x86 registers	16
used mmx registers	0
used xmm registers	10
used ymm registers	0
used zmm registers	0
nb stack references	20

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	16.88 cycles
front end	16.88 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	5.50	5.50	5.50	5.50	5.50	5.50	18.25	18.25	18.25	18.25	0.00	0.00	0.50	0.50	4.00	4.00
cycles	5.50	5.50	5.50	5.50	5.50	5.50	18.25	18.25	18.25	18.25	0.00	0.00	0.50	0.50	4.00	4.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	16.88
Dispatch	18.25
Overall L1	18.25

Vectorization ratios

INT

all	1%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	5%

all	11%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	50%

INT+FP

all	3%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	10%

Vector efficiency ratios

INT

all	12%
load	12%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	13%

all	13%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	18%

INT+FP

all	12%
load	12%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	13%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 18.25 cycles. At this rate:

7% of peak load performance is reached (18.85 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
7% of peak store performance is reached (10.14 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 507c40

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
AND $-0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB $0xa0,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x70(%RDI),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV 0x58(%RDI),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x88(%RDI),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV 0x80(%RDI),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV 0x78(%RDI),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x68(%RDI),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x60(%RDI),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV 0x98(%RDI),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x90(%RDI),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (12.5%)
MOV %RDX,0x38(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x50(%RDI),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV %R9,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
MOV %R8,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
MOV %RCX,(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
MOV %RSI,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
LEA 0x88(%RSP),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RDX,0x8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x30(%RDI),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x28(%RDI),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV 0x10(%RDI),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x38(%RDI),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV 0x20(%RDI),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
VMOVSD 0x8(%RDI),%XMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD (%RDI),%XMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	0.50	scal (12.5%)
MOV 0x48(%RDI),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV 0x40(%RDI),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
VMOVSD %XMM5,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVSD %XMM3,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %R13,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x18(%RDI),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (12.5%)
LEA 0x80(%RSP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R8,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
MOV %R11,0x28(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,0x18(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
CALL 5a9cf0 <hypre_GetSimpleThreadPartition>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0.50	N/A
VMOVQ 0x88(%RSP),%XMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	0.50	scal (12.5%)
MOV 0x80(%RSP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV 0x60(%RSP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (12.5%)
MOVQ $0,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (6.3%)
MOV 0x40(%RSP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x30(%RSP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOVQ $0,0x98(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (6.3%)
VMOVSD 0x78(%RSP),%XMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD 0x70(%RSP),%XMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ %XMM4,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
CMP %RDX,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JGE 508446 <hypre_BoomerAMGCreateS._omp_fn.1+0x806>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x20(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
LEA (,%RDI,8),%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV 0x18(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
VMOVQ %R12,%XMM8	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
VMOVQ %R8,%XMM18	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
VMOVQ %R10,%XMM19	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
MOV %R9,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
VMOVSD 0xa79b2(%RIP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ %RBX,%XMM7	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
VCOMISD %XMM5,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0.50	0.50	6	0.50	scal (12.5%)
MOV %R14,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SETAB 0x30(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	1	0.50	N/A
MOV %R15,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %R13,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
VMOVQ 0xa81eb(%RIP),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	0.50	scal (12.5%)
VXORPD %XMM6,%XMM6,%XMM6	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
LEA (%RSI,%R11,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x8(%RAX,%R11,1),%RDX	2	0	0	0.50	0.50	0	0	0.25	0.25	0.25	0.25	0	0	0	0	2	0.50	N/A
MOV %RCX,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
LEA 0x8(%RSI,%R11,1),%RCX	2	0	0	0.50	0.50	0	0	0.25	0.25	0.25	0.25	0	0	0	0	2	0.50	N/A
MOV 0x28(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV %RDX,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
XOR %R11D,%R11D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
VMOVQ %XMM8,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM7,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %R11,0x98(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDX,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
VMOVQ %XMM18,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM19,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
MOV 0x8(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV 0x38(%RSP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV 0x58(%RSP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
LEA 0x98(%RSP),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x90(%RSP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R10,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
SAL $0x3,%RSI	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	1	0.33	N/A
LEA (%R15,%RSI,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA (%R14,%RSI,1),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
CALL 5ab200 <hypre_prefix_sum_pair>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0.50	N/A
MOV 0x80(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV 0x88(%RSP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
CMP %RDX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JGE 50857b <hypre_BoomerAMGCreateS._omp_fn.1+0x93b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x90(%RSP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x98(%RSP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x18(%RSP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV 0x20(%RSP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV %R15,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R14,%RDX,8),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
SAL $0x3,%RAX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV %RCX,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
LEA (%R14,%RAX,1),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %RAX,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R13,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
VMOVQ %R9,%XMM2	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
MOV 0x70(%RSP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (12.5%)
MOV (%RSP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (12.5%)
LEA 0x8(%R8,%RAX,1),%R8	2	0	0	0.50	0.50	0	0	0.25	0.25	0.25	0.25	0	0	0	0	2	0.50	N/A
LEA 0x8(%R11,%RAX,1),%R11	2	0	0	0.50	0.50	0	0	0.25	0.25	0.25	0.25	0	0	0	0	2	0.50	N/A
LEA -0x28(%RBP),%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	1	0.50	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼hypre_BoomerAMGCreateS._omp_fn.1–	1.16	0.60
▼Loop 1846 - par_strength.c:253-472 - exec–	0.43	0.20
○Loop 1856 - par_strength.c:451-460 - exec	0.33	0.16
○Loop 1858 - par_strength.c:324-327 - exec	0.00	0.01
○Loop 1855 - par_strength.c:463-472 - exec	0.00	0.00
○Loop 1854 - par_strength.c:463-468 - exec	0.00	0.00
○Loop 1857 - par_strength.c:329-332 - exec	0.00	0.00
○Loop 1853 - par_strength.c:311-314 - exec	0.00	0.00
○Loop 1848 - par_strength.c:436-445 - exec	0.00	0.00
○Loop 1861 - par_strength.c:278-283 - exec	0.00	0.00
○Loop 1862 - par_strength.c:270-275 - exec	0.00	0.00
○Loop 1859 - par_strength.c:376-382 - exec	0.00	0.00
○Loop 1849 - par_strength.c:424-433 - exec	0.00	0.00
○Loop 1852 - par_strength.c:316-319 - exec	0.00	0.00
○Loop 1864 - par_strength.c:392-398 - exec	0.00	0.00
○Loop 1866 - par_strength.c:289-294 - exec	0.00	0.00
○Loop 1865 - par_strength.c:297-302 - exec	0.00	0.00
○Loop 1851 - par_strength.c:345-347 - exec	0.00	0.00
○Loop 1860 - par_strength.c:363-369 - exec	0.00	0.00
○Loop 1863 - par_strength.c:405-411 - exec	0.00	0.00
○Loop 1847 - par_strength.c:436-441 - exec	0.00	0.00
○Loop 1850 - par_strength.c:351-353 - exec	0.00	0.00
▼Loop 1843 - par_strength.c:492-513 - exec–	0.07	0.03
○Loop 1845 - par_strength.c:498-503 - exec	0.33	0.16
○Loop 1844 - par_strength.c:508-513 - exec	0.00	0.00

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