OV - exec - Function hypre_BoomerAMGBuildMultipass._omp

	Function: hypre_BoomerAMGBuildMultipass._omp_fn.5	Module: exec	Source: par_multi_interp.c:891-1134 [...]	Coverage (incl. loops): 1.67% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 891 - 1134

--------------------------------------------------------------------------------

891:       #pragma omp parallel private(i,my_thread_num,num_threads,thread_start,thread_stop,cnt_nz,cnt_nz_offd,i1,j,j1,j_start,j_end,k1,k,P_marker,P_marker_offd)

[...]

900:           my_thread_num = hypre_GetThreadNum();

901:           num_threads = hypre_NumActiveThreads();

902:           thread_start = (pass_length/num_threads)*my_thread_num;

903:           if (my_thread_num == num_threads-1)

904:           {  thread_stop = pass_length; }

905:           else

906:           {  thread_stop = (pass_length/num_threads)*(my_thread_num+1); }

907:           thread_start += pass_pointer[pass];

908:           thread_stop += pass_pointer[pass];

909:

910:           /* Local initializations */

911:           cnt_nz = 0;

912:           cnt_nz_offd = 0;

913:

914:           /* This block of code is to go to the top of the parallel region starting before

915:            * the loop over num_passes. */

916:           P_marker = hypre_CTAlloc(HYPRE_Int, n_coarse); /* marks points to see if they're counted */

917:           for (i=0; i < n_coarse; i++)

918:           {   P_marker[i] = -1; }

919:           if (new_num_cols_offd == local_index+1)

920:           {

921:              P_marker_offd = hypre_CTAlloc(HYPRE_Int,new_num_cols_offd);

922:              for (i=0; i < new_num_cols_offd; i++)

923:              {   P_marker_offd[i] = -1; }

924:           }

925:           else if (n_coarse_offd)

926:           {

927:              P_marker_offd = hypre_CTAlloc(HYPRE_Int, n_coarse_offd);

928:              for (i=0; i < n_coarse_offd; i++)

[...]

939:           for (i=thread_start; i < thread_stop; i++)

940:           {

941:              i1 = pass_array[i];

942:              P_diag_start[i1] = cnt_nz;

943:              P_offd_start[i1] = cnt_nz_offd;

944:              for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++)

945:              {

946:                 j1 = S_diag_j[j];

947:                 if (assigned[j1] == pass-1)

948:                 {

949:                    j_start = P_diag_start[j1];

950:                    j_end = j_start+P_diag_i[j1+1];

951:                    for (k=j_start; k < j_end; k++)

952:                    {

953:                       k1 = P_diag_pass[pass-1][k];

954:                       if (P_marker[k1] != i1)

955:                       {

956:                          cnt_nz++;

957:                          P_diag_i[i1+1]++;

958:                          P_marker[k1] = i1;

959:                       }

960:                    }

961:                    j_start = P_offd_start[j1];

962:                    j_end = j_start+P_offd_i[j1+1];

963:                    for (k=j_start; k < j_end; k++)

964:                    {

965:                       k1 = P_offd_pass[pass-1][k];

966:                       if (P_marker_offd[k1] != i1)

967:                       {

968:                          cnt_nz_offd++;

969:                          P_offd_i[i1+1]++;

970:                          P_marker_offd[k1] = i1;

[...]

976:              for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++)

977:              {

978:                 j1 = S_offd_j[j];

979:                 if (assigned_offd[j1] == pass-1)

980:                 {

981:                    j_start = Pext_start[j1];

982:                    j_end = j_start+Pext_i[j1+1];

983:                    for (k=j_start; k < j_end; k++)

984:                    {

985:                       k1 = Pext_pass[pass][k];

986:                       if (k1 < 0)

987:                       {

988:                          if (P_marker[-k1-1] != i1)

989:                          {

990:                             cnt_nz++;

991:                             P_diag_i[i1+1]++;

992:                             P_marker[-k1-1] = i1;

993:                          }

994:                       }

995:                       else if (P_marker_offd[k1] != i1)

996:                       {

997:                          cnt_nz_offd++;

998:                          P_offd_i[i1+1]++;

999:                          P_marker_offd[k1] = i1;

[...]

1008:           if(my_thread_num == 0)

1009:           {   max_num_threads[0] = num_threads; }

1010:           cnt_nz_offd_per_thread[my_thread_num] = cnt_nz_offd;

1011:           cnt_nz_per_thread[my_thread_num] = cnt_nz;

1012: #ifdef HYPRE_USING_OPENMP

1013: #pragma omp barrier

1014: #endif

1015:           if(my_thread_num == 0)

1016:           {

1017:               for(i = 1; i < max_num_threads[0]; i++)

1018:               {

1019:                   cnt_nz_offd_per_thread[i] += cnt_nz_offd_per_thread[i-1];

1020:                   cnt_nz_per_thread[i] += cnt_nz_per_thread[i-1];

1021:               }

1022:           }

1023: #ifdef HYPRE_USING_OPENMP

1024: #pragma omp barrier

1025: #endif

1026:           if(my_thread_num > 0)

1027:           {

1028:               /* update this thread's section of P_diag_start and P_offd_start

1029:                * with the num of nz's counted by previous threads */

1030:               for (i=thread_start; i < thread_stop; i++)

1031:                {

1032:                    i1 = pass_array[i];

1033:                    P_diag_start[i1] += cnt_nz_per_thread[my_thread_num-1];

1034:                    P_offd_start[i1] += cnt_nz_offd_per_thread[my_thread_num-1];

[...]

1040:               cnt_nz = cnt_nz_per_thread[max_num_threads[0]-1];

1041:               cnt_nz_offd = cnt_nz_offd_per_thread[max_num_threads[0]-1];

1042:

1043:               /* Updated total nz count */

1044:               total_nz += cnt_nz;

1045:               total_nz_offd += cnt_nz_offd;

1046:

1047:               /* Allocate P_diag_pass and P_offd_pass for all threads */

1048:               P_diag_pass[pass] = hypre_CTAlloc(HYPRE_Int, cnt_nz);

1049:               if (cnt_nz_offd)

1050:                  P_offd_pass[pass] = hypre_CTAlloc(HYPRE_Int, cnt_nz_offd);

1051:               else if (num_procs > 1)

1052:                  P_offd_pass[pass] = NULL;

1053:           }

1054: #ifdef HYPRE_USING_OPENMP

1055: #pragma omp barrier

1056: #endif

1057:

1058:           /* offset cnt_nz and cnt_nz_offd to point to the starting

1059:            * point in P_diag_pass and P_offd_pass for each thread */

1060:           if(my_thread_num > 0)

1061:           {

1062:               cnt_nz = cnt_nz_per_thread[my_thread_num-1];

1063:               cnt_nz_offd = cnt_nz_offd_per_thread[my_thread_num-1];

1064:           }

1065:           else

1066:           {

1067:               cnt_nz = 0;

1068:               cnt_nz_offd = 0;

1069:           }

1070:

1071:           /* Set P_diag_pass and P_offd_pass */

1072:           for (i=thread_start; i < thread_stop; i++)

1073:           {

1074:              i1 = pass_array[i];

1075:              for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++)

1076:              {

1077:                 j1 = S_diag_j[j];

1078:                 if (assigned[j1] == pass-1)

1079:                 {

1080:                    j_start = P_diag_start[j1];

1081:                    j_end = j_start+P_diag_i[j1+1];

1082:                    for (k=j_start; k < j_end; k++)

1083:                    {

1084:                       k1 = P_diag_pass[pass-1][k];

1085:                       if (P_marker[k1] != -i1-1)

1086:                       {

1087:                           P_diag_pass[pass][cnt_nz++] = k1;

1088:                           P_marker[k1] = -i1-1;

1089:                       }

1090:                    }

1091:                    j_start = P_offd_start[j1];

1092:                    j_end = j_start+P_offd_i[j1+1];

1093:                    for (k=j_start; k < j_end; k++)

1094:                    {

1095:                       k1 = P_offd_pass[pass-1][k];

1096:                       if (P_marker_offd[k1] != -i1-1)

1097:                       {

1098:                          P_offd_pass[pass][cnt_nz_offd++] = k1;

1099:                          P_marker_offd[k1] = -i1-1;

1100:                       }

1101:                    }

1102:                 }

1103:              }

1104:              for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++)

1105:              {

1106:                 j1 = S_offd_j[j];

1107:                 if (assigned_offd[j1] == pass-1)

1108:                 {

1109:                    j_start = Pext_start[j1];

1110:                    j_end = j_start+Pext_i[j1+1];

1111:                    for (k=j_start; k < j_end; k++)

1112:                    {

1113:                       k1 = Pext_pass[pass][k];

1114:                       if (k1 < 0)

1115:                       {

1116:                          if (P_marker[-k1-1] != -i1-1)

1117:                          {

1118:                             P_diag_pass[pass][cnt_nz++] = -k1-1;

1119:                             P_marker[-k1-1] = -i1-1;

1120:                          }

1121:                       }

1122:                       else if (P_marker_offd[k1] != -i1-1)

1123:                       {

1124:                          P_offd_pass[pass][cnt_nz_offd++] = k1;

1125:                          P_marker_offd[k1] = -i1-1;

[...]

1132:           hypre_TFree(P_marker);

1133:           if ( (n_coarse_offd) || (new_num_cols_offd  == local_index+1) )

1134:           {    hypre_TFree(P_marker_offd); }

0x46f010 PUSH	%RBP

0x46f011 MOV	%RSP,%RBP

0x46f014 PUSH	%R15

0x46f016 PUSH	%R14

0x46f018 PUSH	%R13

0x46f01a PUSH	%R12

0x46f01c PUSH	%RBX

0x46f01d SUB	$0xf8,%RSP

0x46f024 MOV	0xe0(%RDI),%R11

0x46f02b MOV	0xd8(%RDI),%R10

0x46f032 MOV	0xd0(%RDI),%RAX

0x46f039 MOV	0xc0(%RDI),%RDX

0x46f040 MOV	0xb8(%RDI),%RCX

0x46f047 MOV	0xa0(%RDI),%RSI

0x46f04e MOV	0x98(%RDI),%R8

0x46f055 MOV	0x90(%RDI),%R9

0x46f05c MOV	0x88(%RDI),%R15

0x46f063 MOV	0xc8(%RDI),%R12

0x46f06a MOV	%R11,-0x118(%RBP)

0x46f071 MOV	%R10,-0x110(%RBP)

0x46f078 MOV	%RAX,-0xf0(%RBP)

0x46f07f MOV	%RDX,-0x100(%RBP)

0x46f086 MOV	%RCX,-0x60(%RBP)

0x46f08a MOV	%RSI,-0x98(%RBP)

0x46f091 MOV	%R8,-0x38(%RBP)

0x46f095 MOV	%R9,-0xf8(%RBP)

0x46f09c MOV	%R15,-0x40(%RBP)

0x46f0a0 MOV	0x80(%RDI),%R13

0x46f0a7 MOV	0x70(%RDI),%R14

0x46f0ab MOV	0x68(%RDI),%R11

0x46f0af MOV	0x60(%RDI),%R10

0x46f0b3 MOV	0x28(%RDI),%R9

0x46f0b7 MOV	0x50(%RDI),%RDX

0x46f0bb MOV	0x48(%RDI),%RCX

0x46f0bf MOV	0x38(%RDI),%RSI

0x46f0c3 MOV	0x30(%RDI),%R8

0x46f0c7 MOV	0x58(%RDI),%RAX

0x46f0cb MOV	0x40(%RDI),%R15

0x46f0cf MOV	%RDI,-0x90(%RBP)

0x46f0d6 MOV	%R13,-0xd8(%RBP)

0x46f0dd MOV	%R14,-0xa8(%RBP)

0x46f0e4 MOV	0x20(%RDI),%R13

0x46f0e8 MOV	0x18(%RDI),%R14

0x46f0ec MOV	%R11,-0xb8(%RBP)

0x46f0f3 MOV	%R10,-0x78(%RBP)

0x46f0f7 MOV	0x10(%RDI),%R11

0x46f0fb MOV	(%RDI),%R10

0x46f0fe MOV	%R9,-0x48(%RBP)

0x46f102 MOV	%RDX,-0x68(%RBP)

0x46f106 MOV	%RCX,-0x70(%RBP)

0x46f10a MOV	%RSI,-0xc0(%RBP)

0x46f111 MOV	%R8,-0xb0(%RBP)

0x46f118 MOV	%RAX,-0x80(%RBP)

0x46f11c MOV	%R13,-0x50(%RBP)

0x46f120 MOV	%R14,-0xa0(%RBP)

0x46f127 MOV	0x8(%RDI),%R14

0x46f12b MOV	%R11,-0x88(%RBP)

0x46f132 MOV	%R10,-0xd0(%RBP)

0x46f139 CALL	5a9ce0 <hypre_GetThreadNum>

0x46f13e MOV	%RAX,%R13

0x46f141 MOV	%RAX,-0x108(%RBP)

0x46f148 CALL	5a9cd0 <hypre_NumActiveThreads>

0x46f14d MOV	-0xd8(%RBP),%R8

0x46f154 MOV	%RAX,%RDI

0x46f157 MOV	%RAX,-0x120(%RBP)

0x46f15e MOV	%R12,%RAX

0x46f161 MOV	%R13,%RCX

0x46f164 CQTO

0x46f166 LEA	-0x1(%RDI),%RSI

0x46f16a IDIV	%RDI

0x46f16d IMUL	%RAX,%RCX

0x46f171 ADD	%RCX,%RAX

0x46f174 CMP	%RSI,%R13

0x46f177 LEA	(,%R8,8),%R13

0x46f17f MOV	%RCX,-0xe0(%RBP)

0x46f186 MOV	(%R15,%R13,1),%R15

0x46f18a CMOVNE	%RAX,%R12

0x46f18e MOV	$0x8,%ESI

0x46f193 MOV	%R12,-0xe8(%RBP)

0x46f19a ADD	%R15,%RCX

0x46f19d ADD	%R12,%R15

0x46f1a0 MOV	%R15,-0xc8(%RBP)

0x46f1a7 MOV	-0x40(%RBP),%R15

0x46f1ab MOV	%RCX,-0x58(%RBP)

0x46f1af MOV	%R15,%RDI

0x46f1b2 CALL	5a6c20 <hypre_CAlloc>

0x46f1b7 TEST	%R15,%R15

0x46f1ba MOV	-0x90(%RBP),%R9

0x46f1c1 MOV	-0x110(%RBP),%R10

0x46f1c8 MOV	-0x118(%RBP),%R11

0x46f1cf MOV	%RAX,%R12

0x46f1d2 JLE	46f213

0x46f1d4 MOV	-0x40(%RBP),%RDX

0x46f1d8 MOV	$0xff,%ESI

0x46f1dd MOV	%RAX,%RDI

0x46f1e0 MOV	%R9,-0x118(%RBP)

0x46f1e7 MOV	%R10,-0x110(%RBP)

0x46f1ee MOV	%R11,-0x90(%RBP)

0x46f1f5 SAL	$0x3,%RDX

0x46f1f9 CALL	4110a0 <memset@plt>

0x46f1fe MOV	-0x90(%RBP),%R11

0x46f205 MOV	-0x110(%RBP),%R10

0x46f20c MOV	-0x118(%RBP),%R9

0x46f213 MOV	-0x60(%RBP),%RDI

0x46f217 INC	%RDI

0x46f21a MOV	%RDI,-0x118(%RBP)

0x46f221 CMP	%RDI,-0x100(%RBP)

0x46f228 JE	47072a

0x46f22e CMPQ	$0,-0xf8(%RBP)

0x46f236 JNE	4706bf

0x46f23c MOV	-0xd8(%RBP),%RAX

0x46f243 MOV	-0xe0(%RBP),%R8

0x46f24a MOV	-0x58(%RBP),%RSI

0x46f24e XOR	%EDX,%EDX

0x46f250 XOR	%ECX,%ECX

0x46f252 DEC	%RAX

0x46f255 CMP	%R8,-0xe8(%RBP)

0x46f25c JLE	46fae9

0x46f262 VMOVQ	%R10,%XMM9

0x46f267 MOV	%R9,-0x110(%RBP)

0x46f26e VMOVQ	%R11,%XMM8

0x46f273 MOV	%R14,%R10

0x46f276 VMOVQ	%R13,%XMM6

0x46f27b MOV	%RAX,%R9

0x46f27e MOV	%RSI,-0x40(%RBP)

0x46f282 NOPW	%CS:(%RAX,%RAX,1)

0x46f28d NOPL	(%RAX)

(615) 0x46f290 MOV	-0xc0(%RBP),%R14

(615) 0x46f297 MOV	-0x40(%RBP),%R13

(615) 0x46f29b MOV	-0xd0(%RBP),%R8

(615) 0x46f2a2 MOV	-0x70(%RBP),%R11

(615) 0x46f2a6 MOV	-0x68(%RBP),%RDI

(615) 0x46f2aa MOV	(%R14,%R13,8),%R15

(615) 0x46f2ae LEA	(,%R15,8),%RSI

(615) 0x46f2b6 LEA	0x8(%R8,%RSI,1),%R14

(615) 0x46f2bb MOV	%RCX,(%R11,%RSI,1)

(615) 0x46f2bf MOV	%RDX,(%RDI,%RSI,1)

(615) 0x46f2c3 MOV	-0x48(%RBP),%RDI

(615) 0x46f2c7 MOV	(%R8,%RSI,1),%RAX

(615) 0x46f2cb MOV	(%R14),%R13

(615) 0x46f2ce VMOVQ	%R14,%XMM7

(615) 0x46f2d3 MOV	-0x50(%RBP),%R14

(615) 0x46f2d7 LEA	0x8(%RSI),%R11

(615) 0x46f2db MOV	%R11,-0x90(%RBP)

(615) 0x46f2e2 LEA	(%RDI,%R11,1),%R8

(615) 0x46f2e6 ADD	%R11,%R14

(615) 0x46f2e9 CMP	%R13,%RAX

(615) 0x46f2ec JGE	46f7d1

(615) 0x46f2f2 VMOVQ	%RSI,%XMM3

(615) 0x46f2f7 MOV	-0x38(%RBP),%RDI

(615) 0x46f2fb MOV	%R12,%RSI

(615) 0x46f2fe VMOVQ	%R8,%XMM1

(615) 0x46f303 MOV	%RBX,%R12

(615) 0x46f306 MOV	%RCX,%RBX

(615) 0x46f309 MOV	%RDX,%RCX

(615) 0x46f30c JMP	46f32c

0x46f30e NOPW	%CS:(%RAX,%RAX,1)

0x46f319 NOPL	(%RAX)

  (618) 0x46f320 INC	%RAX

  (618) 0x46f323 CMP	%R13,%RAX

  (618) 0x46f326 JGE	46f7c0

  (618) 0x46f32c MOV	(%R10,%RAX,8),%RDX

  (618) 0x46f330 LEA	(,%RDX,8),%R8

  (618) 0x46f338 CMP	%R9,(%RDI,%RDX,8)

  (618) 0x46f33c JNE	46f320

  (618) 0x46f33e MOV	-0x70(%RBP),%R13

  (618) 0x46f342 MOV	-0x50(%RBP),%RDX

  (618) 0x46f346 LEA	0x8(%R8),%R11

  (618) 0x46f34a VMOVQ	%R11,%XMM4

  (618) 0x46f34f MOV	(%R13,%R8,1),%R13

  (618) 0x46f354 MOV	0x8(%RDX,%R8,1),%R11

  (618) 0x46f359 ADD	%R13,%R11

  (618) 0x46f35c VMOVQ	%R11,%XMM5

  (618) 0x46f361 CMP	%R11,%R13

  (618) 0x46f364 JGE	46f567

  (618) 0x46f36a MOV	-0x80(%RBP),%R11

  (618) 0x46f36e VMOVQ	%XMM6,%RDX

  (618) 0x46f373 MOV	-0x8(%R11,%RDX,1),%R11

  (618) 0x46f378 VMOVQ	%XMM5,%RDX

  (618) 0x46f37d LEA	(%R11,%R13,8),%R13

  (618) 0x46f381 LEA	(%R11,%RDX,8),%R11

  (618) 0x46f385 MOV	%R11,-0x60(%RBP)

  (618) 0x46f389 SUB	%R13,%R11

  (618) 0x46f38c SUB	$0x8,%R11

  (618) 0x46f390 SHR	$0x3,%R11

  (618) 0x46f394 INC	%R11

  (618) 0x46f397 AND	$0x7,%R11D

  (618) 0x46f39b JE	46f48d

  (618) 0x46f3a1 CMP	$0x1,%R11

  (618) 0x46f3a5 JE	46f469

  (618) 0x46f3ab CMP	$0x2,%R11

  (618) 0x46f3af JE	46f44f

  (618) 0x46f3b5 CMP	$0x3,%R11

  (618) 0x46f3b9 JE	46f435

  (618) 0x46f3bb CMP	$0x4,%R11

  (618) 0x46f3bf JE	46f41b

  (618) 0x46f3c1 CMP	$0x5,%R11

  (618) 0x46f3c5 JE	46f401

  (618) 0x46f3c7 CMP	$0x6,%R11

  (618) 0x46f3cb JE	46f3e7

  (618) 0x46f3cd MOV	(%R13),%RDX

  (618) 0x46f3d1 LEA	(%RSI,%RDX,8),%R11

  (618) 0x46f3d5 CMP	(%R11),%R15

  (618) 0x46f3d8 JE	46f3e3

  (618) 0x46f3da INC	%RBX

  (618) 0x46f3dd INCQ	(%R14)

  (618) 0x46f3e0 MOV	%R15,(%R11)

  (618) 0x46f3e3 ADD	$0x8,%R13

  (618) 0x46f3e7 MOV	(%R13),%RDX

  (618) 0x46f3eb LEA	(%RSI,%RDX,8),%R11

  (618) 0x46f3ef CMP	(%R11),%R15

  (618) 0x46f3f2 JE	46f3fd

  (618) 0x46f3f4 INC	%RBX

  (618) 0x46f3f7 INCQ	(%R14)

  (618) 0x46f3fa MOV	%R15,(%R11)

  (618) 0x46f3fd ADD	$0x8,%R13

  (618) 0x46f401 MOV	(%R13),%RDX

  (618) 0x46f405 LEA	(%RSI,%RDX,8),%R11

  (618) 0x46f409 CMP	(%R11),%R15

  (618) 0x46f40c JE	46f417

  (618) 0x46f40e INC	%RBX

  (618) 0x46f411 INCQ	(%R14)

  (618) 0x46f414 MOV	%R15,(%R11)

  (618) 0x46f417 ADD	$0x8,%R13

  (618) 0x46f41b MOV	(%R13),%RDX

  (618) 0x46f41f LEA	(%RSI,%RDX,8),%R11

  (618) 0x46f423 CMP	(%R11),%R15

  (618) 0x46f426 JE	46f431

  (618) 0x46f428 INC	%RBX

  (618) 0x46f42b INCQ	(%R14)

  (618) 0x46f42e MOV	%R15,(%R11)

  (618) 0x46f431 ADD	$0x8,%R13

  (618) 0x46f435 MOV	(%R13),%RDX

  (618) 0x46f439 LEA	(%RSI,%RDX,8),%R11

  (618) 0x46f43d CMP	(%R11),%R15

  (618) 0x46f440 JE	46f44b

  (618) 0x46f442 INC	%RBX

  (618) 0x46f445 INCQ	(%R14)

  (618) 0x46f448 MOV	%R15,(%R11)

  (618) 0x46f44b ADD	$0x8,%R13

  (618) 0x46f44f MOV	(%R13),%RDX

  (618) 0x46f453 LEA	(%RSI,%RDX,8),%R11

  (618) 0x46f457 CMP	(%R11),%R15

  (618) 0x46f45a JE	46f465

  (618) 0x46f45c INC	%RBX

  (618) 0x46f45f INCQ	(%R14)

  (618) 0x46f462 MOV	%R15,(%R11)

  (618) 0x46f465 ADD	$0x8,%R13

  (618) 0x46f469 MOV	(%R13),%RDX

  (618) 0x46f46d LEA	(%RSI,%RDX,8),%R11

  (618) 0x46f471 CMP	(%R11),%R15

  (618) 0x46f474 JE	46f47f

  (618) 0x46f476 INC	%RBX

  (618) 0x46f479 INCQ	(%R14)

  (618) 0x46f47c MOV	%R15,(%R11)

  (618) 0x46f47f ADD	$0x8,%R13

  (618) 0x46f483 CMP	%R13,-0x60(%RBP)

  (618) 0x46f487 JE	46f567

  (618) 0x46f48d VMOVQ	%XMM1,%R11

    (620) 0x46f492 MOV	(%R13),%RDX

    (620) 0x46f496 LEA	(%RSI,%RDX,8),%RDX

    (620) 0x46f49a CMP	(%RDX),%R15

    (620) 0x46f49d JE	46f4a8

    (620) 0x46f49f INC	%RBX

    (620) 0x46f4a2 INCQ	(%R14)

    (620) 0x46f4a5 MOV	%R15,(%RDX)

    (620) 0x46f4a8 LEA	0x8(%R13),%RDX

    (620) 0x46f4ac MOV	0x8(%R13),%R13

    (620) 0x46f4b0 LEA	(%RSI,%R13,8),%R13

    (620) 0x46f4b4 CMP	(%R13),%R15

    (620) 0x46f4b8 JE	46f4c4

    (620) 0x46f4ba INC	%RBX

    (620) 0x46f4bd INCQ	(%R14)

    (620) 0x46f4c0 MOV	%R15,(%R13)

    (620) 0x46f4c4 MOV	0x8(%RDX),%R13

    (620) 0x46f4c8 LEA	(%RSI,%R13,8),%R13

    (620) 0x46f4cc CMP	(%R13),%R15

    (620) 0x46f4d0 JE	46f4dc

    (620) 0x46f4d2 INC	%RBX

    (620) 0x46f4d5 INCQ	(%R14)

    (620) 0x46f4d8 MOV	%R15,(%R13)

    (620) 0x46f4dc MOV	0x10(%RDX),%R13

    (620) 0x46f4e0 LEA	(%RSI,%R13,8),%R13

    (620) 0x46f4e4 CMP	(%R13),%R15

    (620) 0x46f4e8 JE	46f4f4

    (620) 0x46f4ea INC	%RBX

    (620) 0x46f4ed INCQ	(%R14)

    (620) 0x46f4f0 MOV	%R15,(%R13)

    (620) 0x46f4f4 MOV	0x18(%RDX),%R13

    (620) 0x46f4f8 LEA	(%RSI,%R13,8),%R13

    (620) 0x46f4fc CMP	(%R13),%R15

    (620) 0x46f500 JE	46f50c

    (620) 0x46f502 INC	%RBX

    (620) 0x46f505 INCQ	(%R14)

    (620) 0x46f508 MOV	%R15,(%R13)

    (620) 0x46f50c MOV	0x20(%RDX),%R13

    (620) 0x46f510 LEA	(%RSI,%R13,8),%R13

    (620) 0x46f514 CMP	(%R13),%R15

    (620) 0x46f518 JE	46f524

    (620) 0x46f51a INC	%RBX

    (620) 0x46f51d INCQ	(%R14)

    (620) 0x46f520 MOV	%R15,(%R13)

    (620) 0x46f524 MOV	0x28(%RDX),%R13

    (620) 0x46f528 LEA	(%RSI,%R13,8),%R13

    (620) 0x46f52c CMP	(%R13),%R15

    (620) 0x46f530 JE	46f53c

    (620) 0x46f532 INC	%RBX

    (620) 0x46f535 INCQ	(%R14)

    (620) 0x46f538 MOV	%R15,(%R13)

    (620) 0x46f53c MOV	0x30(%RDX),%R13

    (620) 0x46f540 LEA	(%RSI,%R13,8),%R13

    (620) 0x46f544 CMP	(%R13),%R15

    (620) 0x46f548 JE	46f554

    (620) 0x46f54a INC	%RBX

    (620) 0x46f54d INCQ	(%R14)

    (620) 0x46f550 MOV	%R15,(%R13)

    (620) 0x46f554 LEA	0x38(%RDX),%R13

    (620) 0x46f558 CMP	%R13,-0x60(%RBP)

    (620) 0x46f55c JNE	46f492

  (618) 0x46f562 VMOVQ	%R11,%XMM1

  (618) 0x46f567 MOV	-0x68(%RBP),%R11

  (618) 0x46f56b VMOVQ	%XMM4,%RDX

  (618) 0x46f570 MOV	(%R11,%R8,1),%R13

  (618) 0x46f574 MOV	-0x48(%RBP),%R8

  (618) 0x46f578 MOV	(%R8,%RDX,1),%R8

  (618) 0x46f57c ADD	%R13,%R8

  (618) 0x46f57f CMP	%R8,%R13

  (618) 0x46f582 JGE	46f7a4

  (618) 0x46f588 MOV	-0x78(%RBP),%RDX

  (618) 0x46f58c VMOVQ	%XMM6,%R11

  (618) 0x46f591 MOV	-0x8(%RDX,%R11,1),%RDX

  (618) 0x46f596 LEA	(%RDX,%R8,8),%R8

  (618) 0x46f59a LEA	(%RDX,%R13,8),%R13

  (618) 0x46f59e MOV	%R8,%R11

  (618) 0x46f5a1 SUB	%R13,%R11

  (618) 0x46f5a4 SUB	$0x8,%R11

  (618) 0x46f5a8 SHR	$0x3,%R11

  (618) 0x46f5ac INC	%R11

  (618) 0x46f5af AND	$0x7,%R11D

  (618) 0x46f5b3 JE	46f6cb

  (618) 0x46f5b9 CMP	$0x1,%R11

  (618) 0x46f5bd JE	46f6a3

  (618) 0x46f5c3 CMP	$0x2,%R11

  (618) 0x46f5c7 JE	46f684

  (618) 0x46f5cd CMP	$0x3,%R11

  (618) 0x46f5d1 JE	46f665

  (618) 0x46f5d7 CMP	$0x4,%R11

  (618) 0x46f5db JE	46f646

  (618) 0x46f5dd CMP	$0x5,%R11

  (618) 0x46f5e1 JE	46f627

  (618) 0x46f5e3 CMP	$0x6,%R11

  (618) 0x46f5e7 JE	46f608

  (618) 0x46f5e9 MOV	(%R13),%RDX

  (618) 0x46f5ed LEA	(%R12,%RDX,8),%RDX

  (618) 0x46f5f1 CMP	(%RDX),%R15

  (618) 0x46f5f4 JE	46f604

  (618) 0x46f5f6 VMOVQ	%XMM1,%R11

  (618) 0x46f5fb INC	%RCX

  (618) 0x46f5fe INCQ	(%R11)

  (618) 0x46f601 MOV	%R15,(%RDX)

  (618) 0x46f604 ADD	$0x8,%R13

  (618) 0x46f608 MOV	(%R13),%RDX

  (618) 0x46f60c LEA	(%R12,%RDX,8),%RDX

  (618) 0x46f610 CMP	(%RDX),%R15

  (618) 0x46f613 JE	46f623

  (618) 0x46f615 VMOVQ	%XMM1,%R11

  (618) 0x46f61a INC	%RCX

  (618) 0x46f61d INCQ	(%R11)

  (618) 0x46f620 MOV	%R15,(%RDX)

  (618) 0x46f623 ADD	$0x8,%R13

  (618) 0x46f627 MOV	(%R13),%RDX

  (618) 0x46f62b LEA	(%R12,%RDX,8),%RDX

  (618) 0x46f62f CMP	(%RDX),%R15

  (618) 0x46f632 JE	46f642

  (618) 0x46f634 VMOVQ	%XMM1,%R11

  (618) 0x46f639 INC	%RCX

  (618) 0x46f63c INCQ	(%R11)

  (618) 0x46f63f MOV	%R15,(%RDX)

  (618) 0x46f642 ADD	$0x8,%R13

  (618) 0x46f646 MOV	(%R13),%RDX

  (618) 0x46f64a LEA	(%R12,%RDX,8),%RDX

  (618) 0x46f64e CMP	(%RDX),%R15

  (618) 0x46f651 JE	46f661

  (618) 0x46f653 VMOVQ	%XMM1,%R11

  (618) 0x46f658 INC	%RCX

  (618) 0x46f65b INCQ	(%R11)

  (618) 0x46f65e MOV	%R15,(%RDX)

  (618) 0x46f661 ADD	$0x8,%R13

  (618) 0x46f665 MOV	(%R13),%RDX

  (618) 0x46f669 LEA	(%R12,%RDX,8),%RDX

  (618) 0x46f66d CMP	(%RDX),%R15

  (618) 0x46f670 JE	46f680

  (618) 0x46f672 VMOVQ	%XMM1,%R11

  (618) 0x46f677 INC	%RCX

  (618) 0x46f67a INCQ	(%R11)

  (618) 0x46f67d MOV	%R15,(%RDX)

  (618) 0x46f680 ADD	$0x8,%R13

  (618) 0x46f684 MOV	(%R13),%RDX

  (618) 0x46f688 LEA	(%R12,%RDX,8),%RDX

  (618) 0x46f68c CMP	(%RDX),%R15

  (618) 0x46f68f JE	46f69f

  (618) 0x46f691 VMOVQ	%XMM1,%R11

  (618) 0x46f696 INC	%RCX

  (618) 0x46f699 INCQ	(%R11)

  (618) 0x46f69c MOV	%R15,(%RDX)

  (618) 0x46f69f ADD	$0x8,%R13

  (618) 0x46f6a3 MOV	(%R13),%RDX

  (618) 0x46f6a7 LEA	(%R12,%RDX,8),%RDX

  (618) 0x46f6ab CMP	(%RDX),%R15

  (618) 0x46f6ae JE	46f6be

  (618) 0x46f6b0 VMOVQ	%XMM1,%R11

  (618) 0x46f6b5 INC	%RCX

  (618) 0x46f6b8 INCQ	(%R11)

  (618) 0x46f6bb MOV	%R15,(%RDX)

  (618) 0x46f6be ADD	$0x8,%R13

  (618) 0x46f6c2 CMP	%R8,%R13

  (618) 0x46f6c5 JE	46f7a4

  (618) 0x46f6cb VMOVQ	%XMM1,%R11

    (619) 0x46f6d0 MOV	(%R13),%RDX

    (619) 0x46f6d4 LEA	(%R12,%RDX,8),%RDX

    (619) 0x46f6d8 CMP	(%RDX),%R15

    (619) 0x46f6db JE	46f6e6

    (619) 0x46f6dd INC	%RCX

    (619) 0x46f6e0 INCQ	(%R11)

    (619) 0x46f6e3 MOV	%R15,(%RDX)

    (619) 0x46f6e6 LEA	0x8(%R13),%RDX

    (619) 0x46f6ea MOV	0x8(%R13),%R13

    (619) 0x46f6ee LEA	(%R12,%R13,8),%R13

    (619) 0x46f6f2 CMP	(%R13),%R15

    (619) 0x46f6f6 JE	46f702

    (619) 0x46f6f8 INC	%RCX

    (619) 0x46f6fb INCQ	(%R11)

    (619) 0x46f6fe MOV	%R15,(%R13)

    (619) 0x46f702 MOV	0x8(%RDX),%R13

    (619) 0x46f706 LEA	(%R12,%R13,8),%R13

    (619) 0x46f70a CMP	(%R13),%R15

    (619) 0x46f70e JE	46f71a

    (619) 0x46f710 INC	%RCX

    (619) 0x46f713 INCQ	(%R11)

    (619) 0x46f716 MOV	%R15,(%R13)

    (619) 0x46f71a MOV	0x10(%RDX),%R13

    (619) 0x46f71e LEA	(%R12,%R13,8),%R13

    (619) 0x46f722 CMP	(%R13),%R15

    (619) 0x46f726 JE	46f732

    (619) 0x46f728 INC	%RCX

    (619) 0x46f72b INCQ	(%R11)

    (619) 0x46f72e MOV	%R15,(%R13)

    (619) 0x46f732 MOV	0x18(%RDX),%R13

    (619) 0x46f736 LEA	(%R12,%R13,8),%R13

    (619) 0x46f73a CMP	(%R13),%R15

    (619) 0x46f73e JE	46f74a

    (619) 0x46f740 INC	%RCX

    (619) 0x46f743 INCQ	(%R11)

    (619) 0x46f746 MOV	%R15,(%R13)

    (619) 0x46f74a MOV	0x20(%RDX),%R13

    (619) 0x46f74e LEA	(%R12,%R13,8),%R13

    (619) 0x46f752 CMP	(%R13),%R15

    (619) 0x46f756 JE	46f762

    (619) 0x46f758 INC	%RCX

    (619) 0x46f75b INCQ	(%R11)

    (619) 0x46f75e MOV	%R15,(%R13)

    (619) 0x46f762 MOV	0x28(%RDX),%R13

    (619) 0x46f766 LEA	(%R12,%R13,8),%R13

    (619) 0x46f76a CMP	(%R13),%R15

    (619) 0x46f76e JE	46f77a

    (619) 0x46f770 INC	%RCX

    (619) 0x46f773 INCQ	(%R11)

    (619) 0x46f776 MOV	%R15,(%R13)

    (619) 0x46f77a MOV	0x30(%RDX),%R13

    (619) 0x46f77e LEA	(%R12,%R13,8),%R13

    (619) 0x46f782 CMP	(%R13),%R15

    (619) 0x46f786 JE	46f792

    (619) 0x46f788 INC	%RCX

    (619) 0x46f78b INCQ	(%R11)

    (619) 0x46f78e MOV	%R15,(%R13)

    (619) 0x46f792 LEA	0x38(%RDX),%R13

    (619) 0x46f796 CMP	%R8,%R13

    (619) 0x46f799 JNE	46f6d0

  (618) 0x46f79f VMOVQ	%R11,%XMM1

  (618) 0x46f7a4 VMOVQ	%XMM7,%R8

  (618) 0x46f7a9 INC	%RAX

  (618) 0x46f7ac MOV	(%R8),%R13

  (618) 0x46f7af CMP	%R13,%RAX

  (618) 0x46f7b2 JL	46f32c

(615) 0x46f7b8 NOPL	(%RAX,%RAX,1)

(615) 0x46f7c0 MOV	%RCX,%RDX

(615) 0x46f7c3 MOV	%RBX,%RCX

(615) 0x46f7c6 MOV	%R12,%RBX

(615) 0x46f7c9 MOV	%RSI,%R12

(615) 0x46f7cc VMOVQ	%XMM3,%RSI

(615) 0x46f7d1 MOV	-0x88(%RBP),%R14

(615) 0x46f7d8 MOV	-0x90(%RBP),%RDI

(615) 0x46f7df MOV	-0x50(%RBP),%R8

(615) 0x46f7e3 MOV	%R14,%R11

(615) 0x46f7e6 MOV	(%R14,%RSI,1),%RAX

(615) 0x46f7ea MOV	-0x48(%RBP),%RSI

(615) 0x46f7ee ADD	%RDI,%R8

(615) 0x46f7f1 ADD	%RDI,%R11

(615) 0x46f7f4 VMOVQ	%R8,%XMM2

(615) 0x46f7f9 MOV	(%R11),%R13

(615) 0x46f7fc VMOVQ	%R11,%XMM11

(615) 0x46f801 LEA	(%RSI,%RDI,1),%R14

(615) 0x46f805 CMP	%R13,%RAX

(615) 0x46f808 JGE	46fabb

(615) 0x46f80e MOV	%R12,%R8

(615) 0x46f811 MOV	-0x98(%RBP),%RDI

(615) 0x46f818 MOV	%RCX,%R12

(615) 0x46f81b VMOVQ	%R10,%XMM10

(615) 0x46f820 MOV	-0xa0(%RBP),%RCX

(615) 0x46f827 VMOVDQA	%XMM2,%XMM12

(615) 0x46f82b MOV	%R14,-0x60(%RBP)

(615) 0x46f82f JMP	46f84c

0x46f831 NOPW	%CS:(%RAX,%RAX,1)

0x46f83c NOPL	(%RAX)

  (616) 0x46f840 INC	%RAX

  (616) 0x46f843 CMP	%R13,%RAX

  (616) 0x46f846 JGE	46fab0

  (616) 0x46f84c MOV	(%RCX,%RAX,8),%R10

  (616) 0x46f850 LEA	(,%R10,8),%R11

  (616) 0x46f858 CMP	%R9,(%RDI,%R10,8)

  (616) 0x46f85c JNE	46f840

  (616) 0x46f85e MOV	-0xb0(%RBP),%RSI

  (616) 0x46f865 MOV	-0xa8(%RBP),%R14

  (616) 0x46f86c MOV	(%RSI,%R11,1),%RSI

  (616) 0x46f870 MOV	0x8(%R14,%R11,1),%R14

  (616) 0x46f875 ADD	%RSI,%R14

  (616) 0x46f878 CMP	%R14,%RSI

  (616) 0x46f87b JGE	46f840

  (616) 0x46f87d MOV	-0xb8(%RBP),%R13

  (616) 0x46f884 VMOVQ	%XMM6,%R10

  (616) 0x46f889 MOV	(%R13,%R10,1),%R11

  (616) 0x46f88e LEA	(%R11,%R14,8),%R14

  (616) 0x46f892 LEA	(%R11,%RSI,8),%RSI

  (616) 0x46f896 MOV	%R14,%R13

  (616) 0x46f899 SUB	%RSI,%R13

  (616) 0x46f89c SUB	$0x8,%R13

  (616) 0x46f8a0 SHR	$0x3,%R13

  (616) 0x46f8a4 INC	%R13

  (616) 0x46f8a7 AND	$0x3,%R13D

  (616) 0x46f8ab JE	46f93b

  (616) 0x46f8b1 CMP	$0x1,%R13

  (616) 0x46f8b5 JE	46f90a

  (616) 0x46f8b7 CMP	$0x2,%R13

  (616) 0x46f8bb JE	46f8e4

  (616) 0x46f8bd MOV	(%RSI),%R10

  (616) 0x46f8c0 TEST	%R10,%R10

  (616) 0x46f8c3 JS	46fc80

  (616) 0x46f8c9 LEA	(%RBX,%R10,8),%R11

  (616) 0x46f8cd CMP	(%R11),%R15

  (616) 0x46f8d0 JE	46f8e0

  (616) 0x46f8d2 MOV	-0x60(%RBP),%R13

  (616) 0x46f8d6 INC	%RDX

  (616) 0x46f8d9 INCQ	(%R13)

  (616) 0x46f8dd MOV	%R15,(%R11)

  (616) 0x46f8e0 ADD	$0x8,%RSI

  (616) 0x46f8e4 MOV	(%RSI),%R13

  (616) 0x46f8e7 TEST	%R13,%R13

  (616) 0x46f8ea JS	46fc50

  (616) 0x46f8f0 LEA	(%RBX,%R13,8),%R11

  (616) 0x46f8f4 CMP	(%R11),%R15

  (616) 0x46f8f7 JE	46f906

  (616) 0x46f8f9 MOV	-0x60(%RBP),%R10

  (616) 0x46f8fd INC	%RDX

  (616) 0x46f900 INCQ	(%R10)

  (616) 0x46f903 MOV	%R15,(%R11)

  (616) 0x46f906 ADD	$0x8,%RSI

  (616) 0x46f90a MOV	(%RSI),%R10

  (616) 0x46f90d TEST	%R10,%R10

  (616) 0x46f910 JS	46fc20

  (616) 0x46f916 LEA	(%RBX,%R10,8),%R13

  (616) 0x46f91a CMP	(%R13),%R15

  (616) 0x46f91e JE	46f92e

  (616) 0x46f920 MOV	-0x60(%RBP),%R11

  (616) 0x46f924 INC	%RDX

  (616) 0x46f927 INCQ	(%R11)

  (616) 0x46f92a MOV	%R15,(%R13)

  (616) 0x46f92e ADD	$0x8,%RSI

  (616) 0x46f932 CMP	%R14,%RSI

  (616) 0x46f935 JE	46fa9c

  (616) 0x46f93b MOV	%RAX,-0x90(%RBP)

  (616) 0x46f942 MOV	-0x60(%RBP),%R11

  (616) 0x46f946 MOV	%R14,%RAX

  (616) 0x46f949 VMOVQ	%XMM10,%R10

  (616) 0x46f94e VMOVQ	%XMM12,%R14

  (616) 0x46f953 JMP	46f9e2

0x46f958 NOPL	(%RAX,%RAX,1)

    (617) 0x46f960 LEA	(%RBX,%R13,8),%R13

    (617) 0x46f964 CMP	(%R13),%R15

    (617) 0x46f968 JE	46f974

    (617) 0x46f96a INC	%RDX

    (617) 0x46f96d INCQ	(%R11)

    (617) 0x46f970 MOV	%R15,(%R13)

    (617) 0x46f974 LEA	0x8(%RSI),%R13

    (617) 0x46f978 MOV	0x8(%RSI),%RSI

    (617) 0x46f97c TEST	%RSI,%RSI

    (617) 0x46f97f JS	46fa1a

    (617) 0x46f985 LEA	(%RBX,%RSI,8),%RSI

    (617) 0x46f989 CMP	(%RSI),%R15

    (617) 0x46f98c JE	46f997

    (617) 0x46f98e INC	%RDX

    (617) 0x46f991 INCQ	(%R11)

    (617) 0x46f994 MOV	%R15,(%RSI)

    (617) 0x46f997 MOV	0x8(%R13),%RSI

    (617) 0x46f99b TEST	%RSI,%RSI

    (617) 0x46f99e JS	46fa40

    (617) 0x46f9a4 LEA	(%RBX,%RSI,8),%RSI

    (617) 0x46f9a8 CMP	(%RSI),%R15

    (617) 0x46f9ab JE	46f9b6

    (617) 0x46f9ad INC	%RDX

    (617) 0x46f9b0 INCQ	(%R11)

    (617) 0x46f9b3 MOV	%R15,(%RSI)

    (617) 0x46f9b6 MOV	0x10(%R13),%RSI

    (617) 0x46f9ba TEST	%RSI,%RSI

    (617) 0x46f9bd JS	46fa66

    (617) 0x46f9c3 LEA	(%RBX,%RSI,8),%RSI

    (617) 0x46f9c7 CMP	(%RSI),%R15

    (617) 0x46f9ca JE	46f9d5

    (617) 0x46f9cc INC	%RDX

    (617) 0x46f9cf INCQ	(%R11)

    (617) 0x46f9d2 MOV	%R15,(%RSI)

    (617) 0x46f9d5 LEA	0x18(%R13),%RSI

    (617) 0x46f9d9 CMP	%RAX,%RSI

    (617) 0x46f9dc JE	46fa8c

    (617) 0x46f9e2 MOV	(%RSI),%R13

    (617) 0x46f9e5 TEST	%R13,%R13

    (617) 0x46f9e8 JNS	46f960

    (617) 0x46f9ee NOT	%R13

    (617) 0x46f9f1 LEA	(%R8,%R13,8),%R13

    (617) 0x46f9f5 CMP	(%R13),%R15

    (617) 0x46f9f9 JE	46f974

    (617) 0x46f9ff INCQ	(%R14)

    (617) 0x46fa02 MOV	%R15,(%R13)

    (617) 0x46fa06 LEA	0x8(%RSI),%R13

    (617) 0x46fa0a MOV	0x8(%RSI),%RSI

    (617) 0x46fa0e INC	%R12

    (617) 0x46fa11 TEST	%RSI,%RSI

    (617) 0x46fa14 JNS	46f985

    (617) 0x46fa1a NOT	%RSI

    (617) 0x46fa1d LEA	(%R8,%RSI,8),%RSI

    (617) 0x46fa21 CMP	(%RSI),%R15

    (617) 0x46fa24 JE	46f997

    (617) 0x46fa2a INCQ	(%R14)

    (617) 0x46fa2d MOV	%R15,(%RSI)

    (617) 0x46fa30 MOV	0x8(%R13),%RSI

    (617) 0x46fa34 INC	%R12

    (617) 0x46fa37 TEST	%RSI,%RSI

    (617) 0x46fa3a JNS	46f9a4

    (617) 0x46fa40 NOT	%RSI

    (617) 0x46fa43 LEA	(%R8,%RSI,8),%RSI

    (617) 0x46fa47 CMP	(%RSI),%R15

    (617) 0x46fa4a JE	46f9b6

    (617) 0x46fa50 INCQ	(%R14)

    (617) 0x46fa53 MOV	%R15,(%RSI)

    (617) 0x46fa56 MOV	0x10(%R13),%RSI

    (617) 0x46fa5a INC	%R12

    (617) 0x46fa5d TEST	%RSI,%RSI

    (617) 0x46fa60 JNS	46f9c3

    (617) 0x46fa66 NOT	%RSI

    (617) 0x46fa69 LEA	(%R8,%RSI,8),%RSI

    (617) 0x46fa6d CMP	(%RSI),%R15

    (617) 0x46fa70 JE	46f9d5

    (617) 0x46fa76 INCQ	(%R14)

    (617) 0x46fa79 MOV	%R15,(%RSI)

    (617) 0x46fa7c LEA	0x18(%R13),%RSI

    (617) 0x46fa80 INC	%R12

    (617) 0x46fa83 CMP	%RAX,%RSI

    (617) 0x46fa86 JNE	46f9e2

  (616) 0x46fa8c MOV	-0x90(%RBP),%RAX

  (616) 0x46fa93 VMOVQ	%R10,%XMM10

  (616) 0x46fa98 MOV	%R11,-0x60(%RBP)

  (616) 0x46fa9c VMOVQ	%XMM11,%R10

  (616) 0x46faa1 INC	%RAX

  (616) 0x46faa4 MOV	(%R10),%R13

  (616) 0x46faa7 CMP	%R13,%RAX

  (616) 0x46faaa JL	46f84c

(615) 0x46fab0 MOV	%R12,%RCX

(615) 0x46fab3 VMOVQ	%XMM10,%R10

(615) 0x46fab8 MOV	%R8,%R12

(615) 0x46fabb INCQ	-0x40(%RBP)

(615) 0x46fabf MOV	-0x40(%RBP),%R14

(615) 0x46fac3 CMP	%R14,-0xc8(%RBP)

(615) 0x46faca JG	46f290

0x46fad0 MOV	-0x110(%RBP),%R9

0x46fad7 MOV	%R10,%R14

0x46fada VMOVQ	%XMM8,%R11

0x46fadf VMOVQ	%XMM9,%R10

0x46fae4 VMOVQ	%XMM6,%R13

0x46fae9 MOV	-0x108(%RBP),%R15

0x46faf0 TEST	%R15,%R15

0x46faf3 JNE	46fca3

0x46faf9 MOV	-0xf0(%RBP),%R15

0x46fb00 MOV	-0x120(%RBP),%RSI

0x46fb07 MOV	%R9,-0x90(%RBP)

0x46fb0e MOV	%R10,-0x40(%RBP)

0x46fb12 MOV	%R11,-0x60(%RBP)

0x46fb16 MOV	%RSI,(%R15)

0x46fb19 MOV	%RDX,(%R11)

0x46fb1c MOV	%RCX,(%R10)

0x46fb1f CALL	411290 <GOMP_barrier@plt>

0x46fb24 CMPQ	$0x1,(%R15)

0x46fb28 MOV	-0xf0(%RBP),%RCX

0x46fb2f MOV	-0x40(%RBP),%R10

0x46fb33 MOV	$0x1,%R8D

0x46fb39 MOV	-0x60(%RBP),%RAX

0x46fb3d MOV	-0x90(%RBP),%R9

0x46fb44 JLE	46fb7a

0x46fb46 NOPW	%CS:(%RAX,%RAX,1)

0x46fb51 NOPW	%CS:(%RAX,%RAX,1)

0x46fb5c NOPL	(%RAX)

(614) 0x46fb60 MOV	-0x8(%RAX,%R8,8),%RDX

(614) 0x46fb65 ADD	%RDX,(%RAX,%R8,8)

(614) 0x46fb69 MOV	-0x8(%R10,%R8,8),%RDI

(614) 0x46fb6e ADD	%RDI,(%R10,%R8,8)

(614) 0x46fb72 INC	%R8

(614) 0x46fb75 CMP	%R8,(%RCX)

(614) 0x46fb78 JG	46fb60

0x46fb7a MOV	%R9,-0x90(%RBP)

0x46fb81 MOV	%R10,-0x60(%RBP)

0x46fb85 MOV	%RAX,-0x40(%RBP)

0x46fb89 CALL	411290 <GOMP_barrier@plt>

0x46fb8e MOV	-0x40(%RBP),%R11

0x46fb92 MOV	-0x60(%RBP),%R15

0x46fb96 MOV	-0x90(%RBP),%RSI

0x46fb9d MOV	-0xf0(%RBP),%R8

0x46fba4 MOV	-0x80(%RBP),%R9

0x46fba8 MOV	%RSI,-0x60(%RBP)

0x46fbac MOV	(%R8),%RCX

0x46fbaf LEA	-0x8(,%RCX,8),%R10

0x46fbb7 MOV	(%R15,%R10,1),%RDI

0x46fbbb MOV	(%R11,%R10,1),%RAX

0x46fbbf LEA	(%R9,%R13,1),%R15

0x46fbc3 ADD	%RDI,0x78(%RSI)

0x46fbc7 ADD	%RAX,0xb0(%RSI)

0x46fbce MOV	$0x8,%ESI

0x46fbd3 MOV	%RAX,-0x40(%RBP)

0x46fbd7 CALL	5a6c20 <hypre_CAlloc>

0x46fbdc MOV	-0x40(%RBP),%RDX

0x46fbe0 MOV	%RAX,(%R15)

0x46fbe3 TEST	%RDX,%RDX

0x46fbe6 JNE	47079a

0x46fbec MOV	-0x60(%RBP),%RDI

0x46fbf0 MOV	0xa8(%RDI),%R11

0x46fbf7 CMPQ	$0x1,(%R11)

0x46fbfb JLE	4707b2

0x46fc01 MOV	-0x78(%RBP),%RSI

0x46fc05 MOVQ	$0,(%RSI,%R13,1)

0x46fc0d CALL	411290 <GOMP_barrier@plt>

0x46fc12 XOR	%EDX,%EDX

0x46fc14 XOR	%ESI,%ESI

0x46fc16 JMP	46fe3b

0x46fc1b NOPL	(%RAX,%RAX,1)

  (616) 0x46fc20 NOT	%R10

  (616) 0x46fc23 LEA	(%R8,%R10,8),%R10

  (616) 0x46fc27 CMP	(%R10),%R15

  (616) 0x46fc2a JE	46f92e

  (616) 0x46fc30 VMOVQ	%XMM12,%R13

  (616) 0x46fc35 INC	%R12

  (616) 0x46fc38 INCQ	(%R13)

  (616) 0x46fc3c MOV	%R15,(%R10)

  (616) 0x46fc3f JMP	46f92e

0x46fc44 NOPW	%CS:(%RAX,%RAX,1)

0x46fc4f NOP

  (616) 0x46fc50 NOT	%R13

  (616) 0x46fc53 LEA	(%R8,%R13,8),%R13

  (616) 0x46fc57 CMP	(%R13),%R15

  (616) 0x46fc5b JE	46f906

  (616) 0x46fc61 VMOVQ	%XMM12,%R11

  (616) 0x46fc66 INC	%R12

  (616) 0x46fc69 INCQ	(%R11)

  (616) 0x46fc6c MOV	%R15,(%R13)

  (616) 0x46fc70 JMP	46f906

0x46fc75 NOPW	%CS:(%RAX,%RAX,1)

  (616) 0x46fc80 NOT	%R10

  (616) 0x46fc83 LEA	(%R8,%R10,8),%R11

  (616) 0x46fc87 CMP	(%R11),%R15

  (616) 0x46fc8a JE	46f8e0

  (616) 0x46fc90 VMOVQ	%XMM12,%R10

  (616) 0x46fc95 INC	%R12

  (616) 0x46fc98 INCQ	(%R10)

  (616) 0x46fc9b MOV	%R15,(%R11)

  (616) 0x46fc9e JMP	46f8e0

0x46fca3 LEA	(,%R15,8),%RSI

0x46fcab MOV	%R11,-0x90(%RBP)

0x46fcb2 MOV	%R9,-0x108(%RBP)

0x46fcb9 MOV	%R10,-0x40(%RBP)

0x46fcbd MOV	%RDX,(%R11,%RSI,1)

0x46fcc1 MOV	%RSI,-0x60(%RBP)

0x46fcc5 MOV	%RCX,(%R10,%RSI,1)

0x46fcc9 CALL	411290 <GOMP_barrier@plt>

0x46fcce CALL	411290 <GOMP_barrier@plt>

0x46fcd3 TEST	%R15,%R15

0x46fcd6 MOV	-0x60(%RBP),%RDX

0x46fcda MOV	-0x40(%RBP),%R15

0x46fcde MOV	-0x90(%RBP),%R11

0x46fce5 MOV	-0x108(%RBP),%RSI

0x46fcec JLE	46fb9d

0x46fcf2 LEA	-0x8(%R15,%RDX,1),%R15

0x46fcf7 LEA	-0x8(%R11,%RDX,1),%RDX

0x46fcfc MOV	-0xe0(%RBP),%R11

0x46fd03 CMP	%R11,-0xe8(%RBP)

0x46fd0a JLE	4707bc

0x46fd10 MOV	-0x58(%RBP),%RDI

0x46fd14 MOV	-0xc0(%RBP),%RAX

0x46fd1b MOV	-0x70(%RBP),%R10

0x46fd1f MOV	(%R15),%RSI

0x46fd22 MOV	-0xc8(%RBP),%R8

0x46fd29 MOV	(%RAX,%RDI,8),%R9

0x46fd2d MOV	%RDI,%RCX

0x46fd30 NOT	%RCX

0x46fd33 ADD	%R8,%RCX

0x46fd36 AND	$0x3,%ECX

0x46fd39 ADD	%RSI,(%R10,%R9,8)

0x46fd3d MOV	-0x68(%RBP),%RSI

0x46fd41 MOV	(%RDX),%R11

0x46fd44 ADD	%R11,(%RSI,%R9,8)

0x46fd48 LEA	0x1(%RDI),%R11

0x46fd4c CMP	%R11,%R8

0x46fd4f JLE	46fe28

0x46fd55 TEST	%RCX,%RCX

0x46fd58 JE	470752

0x46fd5e CMP	$0x1,%RCX

0x46fd62 JE	46fd92

0x46fd64 CMP	$0x2,%RCX

0x46fd68 JNE	47076c

0x46fd6e MOV	-0xc0(%RBP),%RSI

0x46fd75 MOV	-0x70(%RBP),%RDI

0x46fd79 MOV	-0x68(%RBP),%R9

0x46fd7d MOV	(%R15),%RCX

0x46fd80 MOV	(%RSI,%R11,8),%R8

0x46fd84 INC	%R11

0x46fd87 ADD	%RCX,(%RDI,%R8,8)

0x46fd8b MOV	(%RDX),%RAX

0x46fd8e ADD	%RAX,(%R9,%R8,8)

0x46fd92 MOV	-0xc0(%RBP),%R10

0x46fd99 MOV	-0x70(%RBP),%RCX

0x46fd9d MOV	-0x68(%RBP),%RDI

0x46fda1 MOV	(%R15),%R8

0x46fda4 MOV	(%R10,%R11,8),%RSI

0x46fda8 INC	%R11

0x46fdab ADD	%R8,(%RCX,%RSI,8)

0x46fdaf MOV	(%RDX),%RAX

0x46fdb2 ADD	%RAX,(%RDI,%RSI,8)

0x46fdb6 CMP	%R11,-0xc8(%RBP)

0x46fdbd JLE	46fe28

0x46fdbf MOV	-0x70(%RBP),%RSI

0x46fdc3 MOV	-0xc0(%RBP),%R8

0x46fdca MOV	-0xc8(%RBP),%R10

0x46fdd1 MOV	%RDI,%RCX

(613) 0x46fdd4 MOV	(%R8,%R11,8),%RAX

(613) 0x46fdd8 MOV	(%R15),%R9

(613) 0x46fddb ADD	%R9,(%RSI,%RAX,8)

(613) 0x46fddf MOV	(%RDX),%RDI

(613) 0x46fde2 ADD	%RDI,(%RCX,%RAX,8)

(613) 0x46fde6 MOV	0x8(%R8,%R11,8),%RAX

(613) 0x46fdeb MOV	(%R15),%R9

(613) 0x46fdee ADD	%R9,(%RSI,%RAX,8)

(613) 0x46fdf2 MOV	(%RDX),%RDI

(613) 0x46fdf5 ADD	%RDI,(%RCX,%RAX,8)

(613) 0x46fdf9 MOV	0x10(%R8,%R11,8),%RAX

(613) 0x46fdfe MOV	(%R15),%R9

(613) 0x46fe01 ADD	%R9,(%RSI,%RAX,8)

(613) 0x46fe05 MOV	(%RDX),%RDI

(613) 0x46fe08 ADD	%RDI,(%RCX,%RAX,8)

(613) 0x46fe0c MOV	0x18(%R8,%R11,8),%RAX

(613) 0x46fe11 MOV	(%R15),%R9

(613) 0x46fe14 ADD	$0x4,%R11

(613) 0x46fe18 ADD	%R9,(%RSI,%RAX,8)

(613) 0x46fe1c MOV	(%RDX),%RDI

(613) 0x46fe1f ADD	%RDI,(%RCX,%RAX,8)

(613) 0x46fe23 CMP	%R11,%R10

(613) 0x46fe26 JG	46fdd4

0x46fe28 MOV	%RDX,-0x40(%RBP)

0x46fe2c CALL	411290 <GOMP_barrier@plt>

0x46fe31 MOV	-0x40(%RBP),%R11

0x46fe35 MOV	(%R15),%RSI

0x46fe38 MOV	(%R11),%RDX

0x46fe3b MOV	-0xd8(%RBP),%R8

0x46fe42 MOV	-0xe0(%RBP),%RCX

0x46fe49 DEC	%R8

0x46fe4c CMP	%RCX,-0xe8(%RBP)

0x46fe53 JLE	47057c

0x46fe59 MOV	%R12,-0x90(%RBP)

0x46fe60 VMOVQ	%R14,%XMM6

0x46fe65 MOV	%R13,%R12

0x46fe68 NOPL	(%RAX,%RAX,1)

(607) 0x46fe70 MOV	-0xc0(%RBP),%R13

(607) 0x46fe77 MOV	-0x58(%RBP),%R14

(607) 0x46fe7b MOV	-0xd0(%RBP),%R10

(607) 0x46fe82 MOV	(%R13,%R14,8),%R14

(607) 0x46fe87 LEA	(,%R14,8),%RDI

(607) 0x46fe8f LEA	0x8(%R10,%RDI,1),%RAX

(607) 0x46fe94 MOV	(%R10,%RDI,1),%RCX

(607) 0x46fe98 LEA	0x8(%RDI),%R13

(607) 0x46fe9c MOV	(%RAX),%R9

(607) 0x46fe9f VMOVQ	%RAX,%XMM13

(607) 0x46fea4 MOV	%R14,%RAX

(607) 0x46fea7 NOT	%RAX

(607) 0x46feaa CMP	%R9,%RCX

(607) 0x46fead JGE	470269

(607) 0x46feb3 VMOVQ	%RDI,%XMM14

(607) 0x46feb8 MOV	-0x90(%RBP),%RDI

(607) 0x46febf MOV	%R8,%R11

(607) 0x46fec2 MOV	%R14,-0xd8(%RBP)

(607) 0x46fec9 MOV	-0x78(%RBP),%R10

(607) 0x46fecd MOV	-0x80(%RBP),%R15

(607) 0x46fed1 VMOVQ	%XMM6,%R14

(607) 0x46fed6 MOV	%RDX,%R8

(607) 0x46fed9 MOV	%R13,-0xe0(%RBP)

(607) 0x46fee0 MOV	%RDI,-0x40(%RBP)

(607) 0x46fee4 MOV	%R9,%RDI

(607) 0x46fee7 JMP	46ff0c

0x46fee9 NOPW	%CS:(%RAX,%RAX,1)

0x46fef4 NOPW	%CS:(%RAX,%RAX,1)

0x46feff NOP

  (610) 0x46ff00 INC	%RCX

  (610) 0x46ff03 CMP	%RDI,%RCX

  (610) 0x46ff06 JGE	470250

  (610) 0x46ff0c MOV	(%R14,%RCX,8),%RDX

  (610) 0x46ff10 MOV	-0x38(%RBP),%R13

  (610) 0x46ff14 LEA	(,%RDX,8),%R9

  (610) 0x46ff1c CMP	%R11,(%R13,%RDX,8)

  (610) 0x46ff21 JNE	46ff00

  (610) 0x46ff23 MOV	-0x70(%RBP),%RDI

  (610) 0x46ff27 LEA	0x8(%R9),%R13

  (610) 0x46ff2b VMOVQ	%R13,%XMM15

  (610) 0x46ff30 MOV	(%RDI,%R9,1),%RDX

  (610) 0x46ff34 MOV	-0x50(%RBP),%RDI

  (610) 0x46ff38 MOV	0x8(%RDI,%R9,1),%RDI

  (610) 0x46ff3d ADD	%RDX,%RDI

  (610) 0x46ff40 CMP	%RDI,%RDX

  (610) 0x46ff43 JGE	4700bf

  (610) 0x46ff49 MOV	-0x8(%R15,%R12,1),%R13

  (610) 0x46ff4e LEA	(%R13,%RDX,8),%RDX

  (610) 0x46ff53 LEA	(%R13,%RDI,8),%R13

  (610) 0x46ff58 MOV	%R13,-0x60(%RBP)

  (610) 0x46ff5c SUB	%RDX,%R13

  (610) 0x46ff5f SUB	$0x8,%R13

  (610) 0x46ff63 SHR	$0x3,%R13

  (610) 0x46ff67 INC	%R13

  (610) 0x46ff6a AND	$0x3,%R13D

  (610) 0x46ff6e JE	47000b

  (610) 0x46ff74 CMP	$0x1,%R13

  (610) 0x46ff78 JE	46ffd6

  (610) 0x46ff7a CMP	$0x2,%R13

  (610) 0x46ff7e JE	46ffab

  (610) 0x46ff80 VMOVQ	(%RDX),%XMM0

  (610) 0x46ff84 MOV	-0x40(%RBP),%RDI

  (610) 0x46ff88 VMOVQ	%XMM0,%R13

  (610) 0x46ff8d LEA	(%RDI,%R13,8),%R13

  (610) 0x46ff91 CMP	%RAX,(%R13)

  (610) 0x46ff95 JE	46ffa7

  (610) 0x46ff97 MOV	(%R15,%R12,1),%RDI

  (610) 0x46ff9b VMOVQ	%XMM0,(%RDI,%RSI,8)

  (610) 0x46ffa0 INC	%RSI

  (610) 0x46ffa3 MOV	%RAX,(%R13)

  (610) 0x46ffa7 ADD	$0x8,%RDX

  (610) 0x46ffab VMOVQ	(%RDX),%XMM3

  (610) 0x46ffaf MOV	-0x40(%RBP),%RDI

  (610) 0x46ffb3 VMOVQ	%XMM3,%R13

  (610) 0x46ffb8 LEA	(%RDI,%R13,8),%R13

  (610) 0x46ffbc CMP	%RAX,(%R13)

  (610) 0x46ffc0 JE	46ffd2

  (610) 0x46ffc2 MOV	(%R15,%R12,1),%RDI

  (610) 0x46ffc6 VMOVQ	%XMM3,(%RDI,%RSI,8)

  (610) 0x46ffcb INC	%RSI

  (610) 0x46ffce MOV	%RAX,(%R13)

  (610) 0x46ffd2 ADD	$0x8,%RDX

  (610) 0x46ffd6 VMOVQ	(%RDX),%XMM5

  (610) 0x46ffda MOV	-0x40(%RBP),%RDI

  (610) 0x46ffde VMOVQ	%XMM5,%R13

  (610) 0x46ffe3 LEA	(%RDI,%R13,8),%R13

  (610) 0x46ffe7 CMP	%RAX,(%R13)

  (610) 0x46ffeb JE	46fffd

  (610) 0x46ffed MOV	(%R15,%R12,1),%RDI

  (610) 0x46fff1 VMOVQ	%XMM5,(%RDI,%RSI,8)

  (610) 0x46fff6 INC	%RSI

  (610) 0x46fff9 MOV	%RAX,(%R13)

  (610) 0x46fffd ADD	$0x8,%RDX

  (610) 0x470001 CMP	%RDX,-0x60(%RBP)

  (610) 0x470005 JE	4700bf

  (610) 0x47000b MOV	%R11,-0xf0(%RBP)

  (610) 0x470012 MOV	-0x40(%RBP),%R13

  (610) 0x470016 MOV	%R8,%R11

  (610) 0x470019 MOV	-0x60(%RBP),%R8

  (610) 0x47001d VMOVQ	%R9,%XMM2

  (610) 0x470022 MOV	%RCX,-0xe8(%RBP)

    (612) 0x470029 MOV	(%RDX),%RDI

    (612) 0x47002c LEA	(%R13,%RDI,8),%RCX

    (612) 0x470031 CMP	%RAX,(%RCX)

    (612) 0x470034 JE	470044

    (612) 0x470036 MOV	(%R15,%R12,1),%R9

    (612) 0x47003a MOV	%RDI,(%R9,%RSI,8)

    (612) 0x47003e INC	%RSI

    (612) 0x470041 MOV	%RAX,(%RCX)

    (612) 0x470044 MOV	0x8(%RDX),%RCX

    (612) 0x470048 LEA	0x8(%RDX),%RDI

    (612) 0x47004c LEA	(%R13,%RCX,8),%RDX

    (612) 0x470051 CMP	%RAX,(%RDX)

    (612) 0x470054 JE	470064

    (612) 0x470056 MOV	(%R15,%R12,1),%R9

    (612) 0x47005a MOV	%RCX,(%R9,%RSI,8)

    (612) 0x47005e INC	%RSI

    (612) 0x470061 MOV	%RAX,(%RDX)

    (612) 0x470064 MOV	0x8(%RDI),%RCX

    (612) 0x470068 LEA	(%R13,%RCX,8),%RDX

    (612) 0x47006d CMP	%RAX,(%RDX)

    (612) 0x470070 JE	470080

    (612) 0x470072 MOV	(%R15,%R12,1),%R9

    (612) 0x470076 MOV	%RCX,(%R9,%RSI,8)

    (612) 0x47007a INC	%RSI

    (612) 0x47007d MOV	%RAX,(%RDX)

    (612) 0x470080 MOV	0x10(%RDI),%RCX

    (612) 0x470084 LEA	(%R13,%RCX,8),%RDX

    (612) 0x470089 CMP	%RAX,(%RDX)

    (612) 0x47008c JE	47009c

    (612) 0x47008e MOV	(%R15,%R12,1),%R9

    (612) 0x470092 MOV	%RCX,(%R9,%RSI,8)

    (612) 0x470096 INC	%RSI

    (612) 0x470099 MOV	%RAX,(%RDX)

    (612) 0x47009c LEA	0x18(%RDI),%RDX

    (612) 0x4700a0 CMP	%RDX,%R8

    (612) 0x4700a3 JNE	470029

  (610) 0x4700a5 MOV	%R11,%R8

  (610) 0x4700a8 MOV	-0xe8(%RBP),%RCX

  (610) 0x4700af MOV	-0xf0(%RBP),%R11

  (610) 0x4700b6 VMOVQ	%XMM2,%R9

  (610) 0x4700bb MOV	%R13,-0x40(%RBP)

  (610) 0x4700bf MOV	-0x68(%RBP),%R13

  (610) 0x4700c3 MOV	-0x48(%RBP),%RDI

  (610) 0x4700c7 MOV	(%R13,%R9,1),%RDX

  (610) 0x4700cc VMOVQ	%XMM15,%R9

  (610) 0x4700d1 MOV	(%RDI,%R9,1),%R13

  (610) 0x4700d5 ADD	%RDX,%R13

  (610) 0x4700d8 CMP	%R13,%RDX

  (610) 0x4700db JGE	470232

  (610) 0x4700e1 MOV	-0x8(%R10,%R12,1),%RDI

  (610) 0x4700e6 LEA	(%RDI,%RDX,8),%RDX

  (610) 0x4700ea LEA	(%RDI,%R13,8),%RDI

  (610) 0x4700ee MOV	%RDI,%R9

  (610) 0x4700f1 SUB	%RDX,%R9

  (610) 0x4700f4 SUB	$0x8,%R9

  (610) 0x4700f8 SHR	$0x3,%R9

  (610) 0x4700fc INC	%R9

  (610) 0x4700ff AND	$0x3,%R9D

  (610) 0x470103 JE	470193

  (610) 0x470109 CMP	$0x1,%R9

  (610) 0x47010d JE	470163

  (610) 0x47010f CMP	$0x2,%R9

  (610) 0x470113 JE	47013c

  (610) 0x470115 VMOVQ	(%RDX),%XMM10

  (610) 0x470119 VMOVQ	%XMM10,%R13

  (610) 0x47011e LEA	(%RBX,%R13,8),%R9

  (610) 0x470122 CMP	%RAX,(%R9)

  (610) 0x470125 JE	470138

  (610) 0x470127 MOV	(%R10,%R12,1),%R13

  (610) 0x47012b VMOVQ	%XMM10,(%R13,%R8,8)

  (610) 0x470132 INC	%R8

  (610) 0x470135 MOV	%RAX,(%R9)

  (610) 0x470138 ADD	$0x8,%RDX

  (610) 0x47013c VMOVQ	(%RDX),%XMM11

  (610) 0x470140 VMOVQ	%XMM11,%R9

  (610) 0x470145 LEA	(%RBX,%R9,8),%R9

  (610) 0x470149 CMP	%RAX,(%R9)

  (610) 0x47014c JE	47015f

  (610) 0x47014e MOV	(%R10,%R12,1),%R13

  (610) 0x470152 VMOVQ	%XMM11,(%R13,%R8,8)

  (610) 0x470159 INC	%R8

  (610) 0x47015c MOV	%RAX,(%R9)

  (610) 0x47015f ADD	$0x8,%RDX

  (610) 0x470163 VMOVQ	(%RDX),%XMM12

  (610) 0x470167 VMOVQ	%XMM12,%R9

  (610) 0x47016c LEA	(%RBX,%R9,8),%R9

  (610) 0x470170 CMP	%RAX,(%R9)

  (610) 0x470173 JE	470186

  (610) 0x470175 MOV	(%R10,%R12,1),%R13

  (610) 0x470179 VMOVQ	%XMM12,(%R13,%R8,8)

  (610) 0x470180 INC	%R8

  (610) 0x470183 MOV	%RAX,(%R9)

  (610) 0x470186 ADD	$0x8,%RDX

  (610) 0x47018a CMP	%RDI,%RDX

  (610) 0x47018d JE	470232

  (610) 0x470193 MOV	-0x40(%RBP),%R13

  (610) 0x470197 MOV	%R11,-0xe8(%RBP)

  (610) 0x47019e MOV	%RCX,%R11

  (610) 0x4701a1 MOV	%RDI,%RCX

  (610) 0x4701a4 MOV	%RSI,-0x60(%RBP)

    (611) 0x4701a8 MOV	(%RDX),%R9

    (611) 0x4701ab LEA	(%RBX,%R9,8),%RDI

    (611) 0x4701af CMP	%RAX,(%RDI)

    (611) 0x4701b2 JE	4701c2

    (611) 0x4701b4 MOV	(%R10,%R12,1),%RSI

    (611) 0x4701b8 MOV	%R9,(%RSI,%R8,8)

    (611) 0x4701bc INC	%R8

    (611) 0x4701bf MOV	%RAX,(%RDI)

    (611) 0x4701c2 MOV	0x8(%RDX),%RDI

    (611) 0x4701c6 LEA	0x8(%RDX),%R9

    (611) 0x4701ca LEA	(%RBX,%RDI,8),%RDX

    (611) 0x4701ce CMP	%RAX,(%RDX)

    (611) 0x4701d1 JE	4701e1

    (611) 0x4701d3 MOV	(%R10,%R12,1),%RSI

    (611) 0x4701d7 MOV	%RDI,(%RSI,%R8,8)

    (611) 0x4701db INC	%R8

    (611) 0x4701de MOV	%RAX,(%RDX)

    (611) 0x4701e1 MOV	0x8(%R9),%RDI

    (611) 0x4701e5 LEA	(%RBX,%RDI,8),%RDX

    (611) 0x4701e9 CMP	%RAX,(%RDX)

    (611) 0x4701ec JE	4701fc

    (611) 0x4701ee MOV	(%R10,%R12,1),%RSI

    (611) 0x4701f2 MOV	%RDI,(%RSI,%R8,8)

    (611) 0x4701f6 INC	%R8

    (611) 0x4701f9 MOV	%RAX,(%RDX)

    (611) 0x4701fc MOV	0x10(%R9),%RDI

    (611) 0x470200 LEA	(%RBX,%RDI,8),%RDX

    (611) 0x470204 CMP	%RAX,(%RDX)

    (611) 0x470207 JE	470217

    (611) 0x470209 MOV	(%R10,%R12,1),%RSI

    (611) 0x47020d MOV	%RDI,(%RSI,%R8,8)

    (611) 0x470211 INC	%R8

    (611) 0x470214 MOV	%RAX,(%RDX)

    (611) 0x470217 LEA	0x18(%R9),%RDX

    (611) 0x47021b CMP	%RCX,%RDX

    (611) 0x47021e JNE	4701a8

  (610) 0x470220 MOV	%R11,%RCX

  (610) 0x470223 MOV	-0x60(%RBP),%RSI

  (610) 0x470227 MOV	-0xe8(%RBP),%R11

  (610) 0x47022e MOV	%R13,-0x40(%RBP)

  (610) 0x470232 VMOVQ	%XMM13,%R13

  (610) 0x470237 INC	%RCX

  (610) 0x47023a MOV	(%R13),%RDI

  (610) 0x47023e CMP	%RDI,%RCX

  (610) 0x470241 JL	46ff0c

(607) 0x470247 NOPW	(%RAX,%RAX,1)

(607) 0x470250 MOV	-0xd8(%RBP),%R14

(607) 0x470257 MOV	-0xe0(%RBP),%R13

(607) 0x47025e MOV	%R8,%RDX

(607) 0x470261 VMOVQ	%XMM14,%RDI

(607) 0x470266 MOV	%R11,%R8

(607) 0x470269 MOV	-0x88(%RBP),%R10

(607) 0x470270 LEA	(%R10,%R13,1),%R15

(607) 0x470274 MOV	(%R10,%RDI,1),%RAX

(607) 0x470278 MOV	%R14,%RDI

(607) 0x47027b MOV	(%R15),%R11

(607) 0x47027e NOT	%RDI

(607) 0x470281 MOV	%R15,-0x40(%RBP)

(607) 0x470285 CMP	%RAX,%R11

(607) 0x470288 JLE	470560

(607) 0x47028e MOV	-0x98(%RBP),%R14

(607) 0x470295 MOV	-0xa0(%RBP),%R15

(607) 0x47029c MOV	%R11,%R9

(607) 0x47029f JMP	4702cc

0x4702a1 NOPW	%CS:(%RAX,%RAX,1)

0x4702ac NOPW	%CS:(%RAX,%RAX,1)

0x4702b7 NOPW	(%RAX,%RAX,1)

  (608) 0x4702c0 INC	%RAX

  (608) 0x4702c3 CMP	%R9,%RAX

  (608) 0x4702c6 JGE	470560

  (608) 0x4702cc MOV	(%R15,%RAX,8),%RCX

  (608) 0x4702d0 LEA	(,%RCX,8),%R13

  (608) 0x4702d8 CMP	%R8,(%R14,%RCX,8)

  (608) 0x4702dc JNE	4702c0

  (608) 0x4702de MOV	-0xb0(%RBP),%R10

  (608) 0x4702e5 MOV	-0xa8(%RBP),%R11

  (608) 0x4702ec MOV	(%R10,%R13,1),%RCX

  (608) 0x4702f0 MOV	0x8(%R11,%R13,1),%R13

  (608) 0x4702f5 ADD	%RCX,%R13

  (608) 0x4702f8 CMP	%R13,%RCX

  (608) 0x4702fb JGE	4702c0

  (608) 0x4702fd MOV	-0xb8(%RBP),%R9

  (608) 0x470304 MOV	(%R9,%R12,1),%R10

  (608) 0x470308 LEA	(%R10,%R13,8),%R9

  (608) 0x47030c LEA	(%R10,%RCX,8),%RCX

  (608) 0x470310 MOV	%R9,%R11

  (608) 0x470313 SUB	%RCX,%R11

  (608) 0x470316 SUB	$0x8,%R11

  (608) 0x47031a SHR	$0x3,%R11

  (608) 0x47031e INC	%R11

  (608) 0x470321 AND	$0x3,%R11D

  (608) 0x470325 JE	4703d7

  (608) 0x47032b CMP	$0x1,%R11

  (608) 0x47032f JE	470398

  (608) 0x470331 CMP	$0x2,%R11

  (608) 0x470335 JE	47036d

  (608) 0x470337 MOV	(%RCX),%R13

  (608) 0x47033a TEST	%R13,%R13

  (608) 0x47033d JS	470680

  (608) 0x470343 LEA	(%RBX,%R13,8),%R10

  (608) 0x470347 VMOVQ	%R10,%XMM8

  (608) 0x47034c CMP	%RDI,(%R10)

  (608) 0x47034f JE	470369

  (608) 0x470351 MOV	-0x78(%RBP),%R11

  (608) 0x470355 MOV	(%R11,%R12,1),%R10

  (608) 0x470359 MOV	%R13,(%R10,%RDX,8)

  (608) 0x47035d VMOVQ	%XMM8,%R13

  (608) 0x470362 INC	%RDX

  (608) 0x470365 MOV	%RDI,(%R13)

  (608) 0x470369 ADD	$0x8,%RCX

  (608) 0x47036d MOV	(%RCX),%R13

  (608) 0x470370 TEST	%R13,%R13

  (608) 0x470373 JS	470640

  (608) 0x470379 LEA	(%RBX,%R13,8),%R10

  (608) 0x47037d CMP	%RDI,(%R10)

  (608) 0x470380 JE	470394

  (608) 0x470382 MOV	-0x78(%RBP),%R11

  (608) 0x470386 MOV	(%R11,%R12,1),%R11

  (608) 0x47038a MOV	%R13,(%R11,%RDX,8)

  (608) 0x47038e INC	%RDX

  (608) 0x470391 MOV	%RDI,(%R10)

  (608) 0x470394 ADD	$0x8,%RCX

  (608) 0x470398 MOV	(%RCX),%R13

  (608) 0x47039b TEST	%R13,%R13

  (608) 0x47039e JS	470600

  (608) 0x4703a4 LEA	(%RBX,%R13,8),%R10

  (608) 0x4703a8 VMOVQ	%R10,%XMM15

  (608) 0x4703ad CMP	%RDI,(%R10)

  (608) 0x4703b0 JE	4703ca

  (608) 0x4703b2 MOV	-0x78(%RBP),%R11

  (608) 0x4703b6 MOV	(%R11,%R12,1),%R10

  (608) 0x4703ba MOV	%R13,(%R10,%RDX,8)

  (608) 0x4703be VMOVQ	%XMM15,%R13

  (608) 0x4703c3 INC	%RDX

  (608) 0x4703c6 MOV	%RDI,(%R13)

  (608) 0x4703ca ADD	$0x8,%RCX

  (608) 0x4703ce CMP	%R9,%RCX

  (608) 0x4703d1 JE	470543

  (608) 0x4703d7 VMOVQ	%R14,%XMM7

  (608) 0x4703dc MOV	%RAX,-0x60(%RBP)

  (608) 0x4703e0 MOV	-0x78(%RBP),%R11

  (608) 0x4703e4 MOV	%R9,%RAX

  (608) 0x4703e7 MOV	-0x80(%RBP),%R14

  (608) 0x4703eb MOV	-0x90(%RBP),%R9

  (608) 0x4703f2 MOV	%R8,-0xd8(%RBP)

  (608) 0x4703f9 JMP	47046c

0x4703fb NOPL	(%RAX,%RAX,1)

    (609) 0x470400 LEA	(%RBX,%RCX,8),%R10

    (609) 0x470404 CMP	%RDI,(%R10)

    (609) 0x470407 JE	470417

    (609) 0x470409 MOV	(%R11,%R12,1),%R8

    (609) 0x47040d MOV	%RCX,(%R8,%RDX,8)

    (609) 0x470411 INC	%RDX

    (609) 0x470414 MOV	%RDI,(%R10)

    (609) 0x470417 MOV	0x8(%R13),%RCX

    (609) 0x47041b TEST	%RCX,%RCX

    (609) 0x47041e JS	4704d1

    (609) 0x470424 LEA	(%RBX,%RCX,8),%R10

    (609) 0x470428 CMP	%RDI,(%R10)

    (609) 0x47042b JE	47043b

    (609) 0x47042d MOV	(%R11,%R12,1),%R8

    (609) 0x470431 MOV	%RCX,(%R8,%RDX,8)

    (609) 0x470435 INC	%RDX

    (609) 0x470438 MOV	%RDI,(%R10)

    (609) 0x47043b MOV	0x10(%R13),%RCX

    (609) 0x47043f TEST	%RCX,%RCX

    (609) 0x470442 JS	470502

    (609) 0x470448 LEA	(%RBX,%RCX,8),%R10

    (609) 0x47044c CMP	%RDI,(%R10)

    (609) 0x47044f JE	47045f

    (609) 0x470451 MOV	(%R11,%R12,1),%R8

    (609) 0x470455 MOV	%RCX,(%R8,%RDX,8)

    (609) 0x470459 INC	%RDX

    (609) 0x47045c MOV	%RDI,(%R10)

    (609) 0x47045f LEA	0x18(%R13),%RCX

    (609) 0x470463 CMP	%RAX,%RCX

    (609) 0x470466 JE	470533

    (609) 0x47046c MOV	(%RCX),%R13

    (609) 0x47046f TEST	%R13,%R13

    (609) 0x470472 JS	4705d0

    (609) 0x470478 LEA	(%RBX,%R13,8),%R10

    (609) 0x47047c CMP	%RDI,(%R10)

    (609) 0x47047f JE	47048f

    (609) 0x470481 MOV	(%R11,%R12,1),%R8

    (609) 0x470485 MOV	%R13,(%R8,%RDX,8)

    (609) 0x470489 INC	%RDX

    (609) 0x47048c MOV	%RDI,(%R10)

    (609) 0x47048f LEA	0x8(%RCX),%R13

    (609) 0x470493 MOV	0x8(%RCX),%RCX

    (609) 0x470497 TEST	%RCX,%RCX

    (609) 0x47049a JNS	470400

    (609) 0x4704a0 MOV	%RCX,%R10

    (609) 0x4704a3 NOT	%R10

    (609) 0x4704a6 LEA	(%R9,%R10,8),%R10

    (609) 0x4704aa CMP	%RDI,(%R10)

    (609) 0x4704ad JE	470417

    (609) 0x4704b3 MOV	(%R14,%R12,1),%R8

    (609) 0x4704b7 NOT	%RCX

    (609) 0x4704ba MOV	%RCX,(%R8,%RSI,8)

    (609) 0x4704be MOV	%RDI,(%R10)

    (609) 0x4704c1 MOV	0x8(%R13),%RCX

    (609) 0x4704c5 INC	%RSI

    (609) 0x4704c8 TEST	%RCX,%RCX

    (609) 0x4704cb JNS	470424

    (609) 0x4704d1 MOV	%RCX,%R10

    (609) 0x4704d4 NOT	%R10

    (609) 0x4704d7 LEA	(%R9,%R10,8),%R10

    (609) 0x4704db CMP	%RDI,(%R10)

    (609) 0x4704de JE	47043b

    (609) 0x4704e4 MOV	(%R14,%R12,1),%R8

    (609) 0x4704e8 NOT	%RCX

    (609) 0x4704eb MOV	%RCX,(%R8,%RSI,8)

    (609) 0x4704ef MOV	%RDI,(%R10)

    (609) 0x4704f2 MOV	0x10(%R13),%RCX

    (609) 0x4704f6 INC	%RSI

    (609) 0x4704f9 TEST	%RCX,%RCX

    (609) 0x4704fc JNS	470448

    (609) 0x470502 MOV	%RCX,%R10

    (609) 0x470505 NOT	%R10

    (609) 0x470508 LEA	(%R9,%R10,8),%R10

    (609) 0x47050c CMP	%RDI,(%R10)

    (609) 0x47050f JE	47045f

    (609) 0x470515 MOV	(%R14,%R12,1),%R8

    (609) 0x470519 NOT	%RCX

    (609) 0x47051c MOV	%RCX,(%R8,%RSI,8)

    (609) 0x470520 LEA	0x18(%R13),%RCX

    (609) 0x470524 INC	%RSI

    (609) 0x470527 MOV	%RDI,(%R10)

    (609) 0x47052a CMP	%RAX,%RCX

    (609) 0x47052d JNE	47046c

  (608) 0x470533 MOV	-0x60(%RBP),%RAX

  (608) 0x470537 MOV	-0xd8(%RBP),%R8

  (608) 0x47053e VMOVQ	%XMM7,%R14

  (608) 0x470543 MOV	-0x40(%RBP),%R11

  (608) 0x470547 INC	%RAX

  (608) 0x47054a MOV	(%R11),%R9

  (608) 0x47054d CMP	%R9,%RAX

  (608) 0x470550 JL	4702cc

(607) 0x470556 NOPW	%CS:(%RAX,%RAX,1)

(607) 0x470560 INCQ	-0x58(%RBP)

(607) 0x470564 MOV	-0x58(%RBP),%R13

(607) 0x470568 CMP	%R13,-0xc8(%RBP)

(607) 0x47056f JG	46fe70

0x470575 MOV	-0x90(%RBP),%R12

0x47057c MOV	%R12,%RDI

0x47057f CALL	5a6cb0 <hypre_Free>

0x470584 CMPQ	$0,-0xf8(%RBP)

0x47058c JNE	4705b0

0x47058e MOV	-0x118(%RBP),%RDX

0x470595 CMP	%RDX,-0x100(%RBP)

0x47059c JE	4705b0

0x47059e ADD	$0xf8,%RSP

0x4705a5 POP	%RBX

0x4705a6 POP	%R12

0x4705a8 POP	%R13

0x4705aa POP	%R14

0x4705ac POP	%R15

0x4705ae POP	%RBP

0x4705af RET

0x4705b0 ADD	$0xf8,%RSP

0x4705b7 MOV	%RBX,%RDI

0x4705ba POP	%RBX

0x4705bb POP	%R12

0x4705bd POP	%R13

0x4705bf POP	%R14

0x4705c1 POP	%R15

0x4705c3 POP	%RBP

0x4705c4 JMP	5a6cb0

0x4705c9 NOPL	(%RAX)

    (609) 0x4705d0 MOV	%R13,%R10

    (609) 0x4705d3 NOT	%R10

    (609) 0x4705d6 LEA	(%R9,%R10,8),%R10

    (609) 0x4705da CMP	%RDI,(%R10)

    (609) 0x4705dd JE	47048f

    (609) 0x4705e3 MOV	(%R14,%R12,1),%R8

    (609) 0x4705e7 NOT	%R13

    (609) 0x4705ea MOV	%R13,(%R8,%RSI,8)

    (609) 0x4705ee INC	%RSI

    (609) 0x4705f1 MOV	%RDI,(%R10)

    (609) 0x4705f4 JMP	47048f

0x4705f9 NOPL	(%RAX)

  (608) 0x470600 MOV	-0x90(%RBP),%R11

  (608) 0x470607 NOT	%R13

  (608) 0x47060a LEA	(%R11,%R13,8),%R10

  (608) 0x47060e VMOVQ	%R10,%XMM0

  (608) 0x470613 CMP	%RDI,(%R10)

  (608) 0x470616 JE	4703ca

  (608) 0x47061c MOV	-0x80(%RBP),%R11

  (608) 0x470620 MOV	(%R11,%R12,1),%R10

  (608) 0x470624 MOV	%R13,(%R10,%RSI,8)

  (608) 0x470628 VMOVQ	%XMM0,%R13

  (608) 0x47062d INC	%RSI

  (608) 0x470630 MOV	%RDI,(%R13)

  (608) 0x470634 JMP	4703ca

0x470639 NOPL	(%RAX)

  (608) 0x470640 MOV	-0x90(%RBP),%R10

  (608) 0x470647 MOV	%R13,%R11

  (608) 0x47064a NOT	%R11

  (608) 0x47064d LEA	(%R10,%R11,8),%R11

  (608) 0x470651 VMOVQ	%R11,%XMM14

  (608) 0x470656 CMP	%RDI,(%R11)

  (608) 0x470659 JE	470394

  (608) 0x47065f MOV	-0x80(%RBP),%R10

  (608) 0x470663 NOT	%R13

  (608) 0x470666 MOV	(%R10,%R12,1),%R11

  (608) 0x47066a MOV	%R13,(%R11,%RSI,8)

  (608) 0x47066e VMOVQ	%XMM14,%R13

  (608) 0x470673 INC	%RSI

  (608) 0x470676 MOV	%RDI,(%R13)

  (608) 0x47067a JMP	470394

0x47067f NOP

  (608) 0x470680 MOV	-0x90(%RBP),%R10

  (608) 0x470687 MOV	%R13,%R11

  (608) 0x47068a NOT	%R11

  (608) 0x47068d LEA	(%R10,%R11,8),%R11

  (608) 0x470691 VMOVQ	%R11,%XMM9

  (608) 0x470696 CMP	%RDI,(%R11)

  (608) 0x470699 JE	470369

  (608) 0x47069f MOV	-0x80(%RBP),%R10

  (608) 0x4706a3 NOT	%R13

  (608) 0x4706a6 MOV	(%R10,%R12,1),%R11

  (608) 0x4706aa MOV	%R13,(%R11,%RSI,8)

  (608) 0x4706ae VMOVQ	%XMM9,%R13

  (608) 0x4706b3 INC	%RSI

  (608) 0x4706b6 MOV	%RDI,(%R13)

  (608) 0x4706ba JMP	470369

0x4706bf MOV	-0xf8(%RBP),%RDI

0x4706c6 MOV	$0x8,%ESI

0x4706cb MOV	%R9,-0x90(%RBP)

0x4706d2 MOV	%R10,-0x60(%RBP)

0x4706d6 MOV	%R11,-0x40(%RBP)

0x4706da CALL	5a6c20 <hypre_CAlloc>

0x4706df MOV	-0xf8(%RBP),%R15

0x4706e6 MOV	%RAX,%RBX

0x4706e9 TEST	%R15,%R15

0x4706ec MOV	-0x40(%RBP),%R11

0x4706f0 MOV	-0x60(%RBP),%R10

0x4706f4 MOV	-0x90(%RBP),%R9

0x4706fb JLE	46f23c

0x470701 LEA	(,%R15,8),%RDX

0x470709 MOV	$0xff,%ESI

0x47070e MOV	%RBX,%RDI

0x470711 CALL	4110a0 <memset@plt>

0x470716 MOV	-0x40(%RBP),%R11

0x47071a MOV	-0x60(%RBP),%R10

0x47071e MOV	-0x90(%RBP),%R9

0x470725 JMP	46f23c

0x47072a MOV	-0x100(%RBP),%R15

0x470731 MOV	$0x8,%ESI

0x470736 MOV	%R9,-0x90(%RBP)

0x47073d MOV	%R10,-0x60(%RBP)

0x470741 MOV	%R11,-0x40(%RBP)

0x470745 MOV	%R15,%RDI

0x470748 CALL	5a6c20 <hypre_CAlloc>

0x47074d MOV	%RAX,%RBX

0x470750 JMP	4706e9

0x470752 MOV	%RSI,%RCX

0x470755 MOV	-0xc0(%RBP),%R8

0x47075c MOV	-0x70(%RBP),%RSI

0x470760 MOV	-0xc8(%RBP),%R10

0x470767 JMP	46fdd4

0x47076c MOV	-0xc0(%RBP),%RDI

0x470773 MOV	-0x70(%RBP),%RAX

0x470777 MOV	-0x68(%RBP),%R10

0x47077b MOV	(%R15),%RCX

0x47077e MOV	(%RDI,%R11,8),%R8

0x470782 MOV	-0x58(%RBP),%R11

0x470786 ADD	%RCX,(%RAX,%R8,8)

0x47078a MOV	(%RDX),%R9

0x47078d ADD	$0x2,%R11

0x470791 ADD	%R9,(%R10,%R8,8)

0x470795 JMP	46fd6e

0x47079a MOV	-0x78(%RBP),%R8

0x47079e MOV	$0x8,%ESI

0x4707a3 MOV	%RDX,%RDI

0x4707a6 LEA	(%R8,%R13,1),%R15

0x4707aa CALL	5a6c20 <hypre_CAlloc>

0x4707af MOV	%RAX,(%R15)

0x4707b2 CALL	411290 <GOMP_barrier@plt>

0x4707b7 JMP	46fc12

0x4707bc CALL	411290 <GOMP_barrier@plt>

0x4707c1 JMP	47057c

0x4707c6 NOPW	%CS:(%RAX,%RAX,1)

Coverage (%)	Name	Source Location	Module
►97.07+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►2.91+	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	hypre_BoomerAMGBuildMultipass	par_multi_interp.c:891	exec
○	hypre_BoomerAMGSetup	par_amg_setup.c:737	exec
○	hypre_PCGSetup	pcg.c:234	exec
○	main	amg.c:398	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	amg.c:253	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_3

Source file and lines	par_multi_interp.c:891-1134
Module	exec

The function is defined in /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:891,900-928,939-970,976-999,1008-1034,1040-1125,1132-1134.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 54.75 to 6.33 cycles (8.64x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is not vectorized. Only 12% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 54.75 to 4.78 cycles (11.45x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Performance is limited by:

reading data from caches/RAM (load units are a bottleneck)
writing data to caches/RAM (the store unit is a bottleneck)

By removing all these bottlenecks, you can lower the cost of an iteration from 54.75 to 45.50 cycles (1.20x speedup).

Workaround

Read less array elements
Write less array elements
Provide more information to your compiler:
- use the 'restrict' C99 keyword

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

GOMP_barrier@plt: 8 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1013
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1024
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1055
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1013
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1024
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1055
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1055
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1055
hypre_CAlloc: 5 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:916
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1048
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:927
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:921
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1050
hypre_Free: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1132
hypre_GetThreadNum: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:900
hypre_NumActiveThreads: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:901
memset@plt: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:918
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:923

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

IDIV: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:902
LEA: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1062
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1063

Conversion instructions

Detected expensive conversion instructions.

Details

CQTO: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:902

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 1080 bytes. The binary function is storing 592 bytes.

General properties

nb instructions	371
nb uops	364
loop length	1829
used x86 registers	16
used mmx registers	0
used xmm registers	3
used ymm registers	0
used zmm registers	0
nb stack references	30

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	45.50 cycles
front end	45.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	19.67	19.67	19.67	19.67	19.67	19.67	54.75	54.75	54.75	54.75	0.00	0.00	0.00	0.00	1.50	1.50
cycles	19.67	19.67	19.67	19.67	19.67	19.67	54.75	54.75	54.75	54.75	0.00	0.00	0.00	0.00	1.50	1.50

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

7.00-12.00

Cycles summary

Front-end	45.50
Dispatch	54.75
DIV/SQRT	7.00-12.00
Overall L1	54.75

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	0%

Vector efficiency ratios

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	12%
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 54.75 cycles. At this rate:

7% of peak load performance is reached (19.73 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
8% of peak store performance is reached (10.81 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 46f010

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0xf8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV 0xe0(%RDI),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xd8(%RDI),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xd0(%RDI),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xc0(%RDI),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xb8(%RDI),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xa0(%RDI),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x98(%RDI),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x90(%RDI),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x88(%RDI),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xc8(%RDI),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV %R11,-0x118(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,-0x110(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,-0xf0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDX,-0x100(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RCX,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RSI,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R8,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R9,-0xf8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R15,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x80(%RDI),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x70(%RDI),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x68(%RDI),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x60(%RDI),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x28(%RDI),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x50(%RDI),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x48(%RDI),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x38(%RDI),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x30(%RDI),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x58(%RDI),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x40(%RDI),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDI,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R13,-0xd8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R14,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x20(%RDI),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x18(%RDI),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV %R11,-0xb8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x10(%RDI),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDI),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R9,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDX,-0x68(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RCX,-0x70(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RSI,-0xc0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R8,-0xb0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R13,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R14,-0xa0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x8(%RDI),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV %R11,-0x88(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,-0xd0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 5a9ce0 <hypre_GetThreadNum>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,-0x108(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 5a9cd0 <hypre_NumActiveThreads>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0xd8(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,-0x120(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R12,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R13,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CQTO																				scal (12.5%)
LEA -0x1(%RDI),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
IDIV %RDI	2	0	0	0	2	0	0	0	0	0	0	0	0	0	0	0	0	9-19	7-12	scal (12.5%)
IMUL %RAX,%RCX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
ADD %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RSI,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
LEA (,%R8,8),%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RCX,-0xe0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%R15,%R13,1),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMOVNE %RAX,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R12,-0xe8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
ADD %R15,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %R12,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R15,-0xc8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x40(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RCX,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R15,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 5a6c20 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
TEST %R15,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x90(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x110(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x118(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
JLE 46f213 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x203>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x40(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV $0xff,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R9,-0x118(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,-0x110(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R11,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
SAL $0x3,%RDX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
CALL 4110a0 <memset@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0x90(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x110(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x118(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x60(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
INC %RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDI,-0x118(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CMP %RDI,-0x100(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JE 47072a <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x171a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
CMPQ $0,-0xf8(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JNE 4706bf <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x16af>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0xd8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xe0(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x58(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
DEC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %R8,-0xe8(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JLE 46fae9 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xad9>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
VMOVQ %R10,%XMM9	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
MOV %R9,-0x110(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVQ %R11,%XMM8	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
MOV %R14,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VMOVQ %R13,%XMM6	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
MOV %RAX,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSI,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV -0x110(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R10,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
VMOVQ %XMM8,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM9,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM6,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV -0x108(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
TEST %R15,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 46fca3 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xc93>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0xf0(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x120(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R9,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R11,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RSI,(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDX,(%R11)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RCX,(%R10)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 411290 <GOMP_barrier@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
CMPQ $0x1,(%R15)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOV -0xf0(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x40(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV $0x1,%R8D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x60(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x90(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JLE 46fb7a <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xb6a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV %R9,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 411290 <GOMP_barrier@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0x40(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x60(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x90(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xf0(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x80(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RSI,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%R8),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA -0x8(,%RCX,8),%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV (%R15,%R10,1),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R11,%R10,1),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%R9,%R13,1),%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %RDI,0x78(%RSI)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
ADD %RAX,0xb0(%RSI)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 5a6c20 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0x40(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
TEST %RDX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 47079a <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x178a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x60(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xa8(%RDI),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMPQ $0x1,(%R11)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JLE 4707b2 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x17a2>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x78(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOVQ $0,(%RSI,%R13,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
CALL 411290 <GOMP_barrier@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 46fe3b <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xe2b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
LEA (,%R15,8),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R11,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R9,-0x108(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDX,(%R11,%RSI,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RSI,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RCX,(%R10,%RSI,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 411290 <GOMP_barrier@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
CALL 411290 <GOMP_barrier@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
TEST %R15,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x60(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x40(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x90(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x108(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JLE 46fb9d <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xb8d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
LEA -0x8(%R15,%RDX,1),%R15	2	0	0	0.50	0.50	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	2	0.50	N/A
LEA -0x8(%R11,%RDX,1),%RDX	2	0	0	0.50	0.50	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	2	0.50	N/A
MOV -0xe0(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMP %R11,-0xe8(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JLE 4707bc <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x17ac>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x58(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xc0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x70(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R15),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xc8(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX,%RDI,8),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOT %RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %R8,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $0x3,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RSI,(%R10,%R9,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV -0x68(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDX),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %R11,(%RSI,%R9,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
LEA 0x1(%RDI),%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP %R11,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JLE 46fe28 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xe18>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
TEST %RCX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 470752 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x1742>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x1,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 46fd92 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xd82>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x2,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 47076c <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x175c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0xc0(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x70(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x68(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R15),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RSI,%R11,8),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
INC %R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RCX,(%RDI,%R8,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV (%RDX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %RAX,(%R9,%R8,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV -0xc0(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x70(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x68(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R15),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R10,%R11,8),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
INC %R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %R8,(%RCX,%RSI,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV (%RDX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %RAX,(%RDI,%RSI,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
CMP %R11,-0xc8(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JLE 46fe28 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xe18>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x70(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xc0(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xc8(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 411290 <GOMP_barrier@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0x40(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R15),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R11),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xd8(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xe0(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
DEC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RCX,-0xe8(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JLE 47057c <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x156c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R12,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVQ %R14,%XMM6	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
MOV %R13,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV -0x90(%RBP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV %R12,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 5a6cb0 <hypre_Free>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
CMPQ $0,-0xf8(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JNE 4705b0 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x15a0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x118(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMP %RDX,-0x100(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JE 4705b0 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x15a0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
ADD $0xf8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD $0xf8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 5a6cb0 <hypre_Free>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV -0xf8(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R9,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R11,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 5a6c20 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0xf8(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
TEST %R15,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x40(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x60(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x90(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JLE 46f23c <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x22c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
LEA (,%R15,8),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV $0xff,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 4110a0 <memset@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0x40(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x60(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x90(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JMP 46f23c <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x22c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV -0x100(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R9,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R11,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R15,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 5a6c20 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
JMP 4706e9 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x16d9>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV %RSI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0xc0(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x70(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xc8(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JMP 46fdd4 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xdc4>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV -0xc0(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x70(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x68(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R15),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDI,%R11,8),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x58(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %RCX,(%RAX,%R8,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV (%RDX),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD $0x2,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %R9,(%R10,%R8,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	N/A
JMP 46fd6e <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xd5e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV -0x78(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R8,%R13,1),%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CALL 5a6c20 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 411290 <GOMP_barrier@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 46fc12 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xc02>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
CALL 411290 <GOMP_barrier@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 47057c <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x156c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_3

Source file and lines	par_multi_interp.c:891-1134
Module	exec

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 54.75 to 6.33 cycles (8.64x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Performance is limited by:

reading data from caches/RAM (load units are a bottleneck)
writing data to caches/RAM (the store unit is a bottleneck)

By removing all these bottlenecks, you can lower the cost of an iteration from 54.75 to 45.50 cycles (1.20x speedup).

Workaround

Read less array elements
Write less array elements
Provide more information to your compiler:
- use the 'restrict' C99 keyword

No data for this section

CALL instructions

Detected function call instructions.

Details

GOMP_barrier@plt: 8 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1013
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1024
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1055
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1013
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1024
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1055
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1055
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1055
hypre_CAlloc: 5 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:916
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1048
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:927
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:921
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1050
hypre_Free: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1132
hypre_GetThreadNum: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:900
hypre_NumActiveThreads: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:901
memset@plt: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:918
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:923

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

IDIV: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:902
LEA: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1062
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1063

Conversion instructions

Detected expensive conversion instructions.

Details

CQTO: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:902

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 1080 bytes. The binary function is storing 592 bytes.

General properties

nb instructions	371
nb uops	364
loop length	1829
used x86 registers	16
used mmx registers	0
used xmm registers	3
used ymm registers	0
used zmm registers	0
nb stack references	30

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	45.50 cycles
front end	45.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	19.67	19.67	19.67	19.67	19.67	19.67	54.75	54.75	54.75	54.75	0.00	0.00	0.00	0.00	1.50	1.50
cycles	19.67	19.67	19.67	19.67	19.67	19.67	54.75	54.75	54.75	54.75	0.00	0.00	0.00	0.00	1.50	1.50

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

7.00-12.00

Cycles summary

Front-end	45.50
Dispatch	54.75
DIV/SQRT	7.00-12.00
Overall L1	54.75

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	0%

Vector efficiency ratios

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	12%
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 54.75 cycles. At this rate:

7% of peak load performance is reached (19.73 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
8% of peak store performance is reached (10.81 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 46f010

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0xf8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV 0xe0(%RDI),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xd8(%RDI),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xd0(%RDI),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xc0(%RDI),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xb8(%RDI),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xa0(%RDI),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x98(%RDI),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x90(%RDI),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x88(%RDI),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xc8(%RDI),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV %R11,-0x118(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,-0x110(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,-0xf0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDX,-0x100(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RCX,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RSI,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R8,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R9,-0xf8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R15,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x80(%RDI),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x70(%RDI),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x68(%RDI),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x60(%RDI),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x28(%RDI),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x50(%RDI),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x48(%RDI),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x38(%RDI),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x30(%RDI),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x58(%RDI),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x40(%RDI),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDI,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R13,-0xd8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R14,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x20(%RDI),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x18(%RDI),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV %R11,-0xb8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x10(%RDI),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDI),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R9,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDX,-0x68(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RCX,-0x70(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RSI,-0xc0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R8,-0xb0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R13,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R14,-0xa0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x8(%RDI),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV %R11,-0x88(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,-0xd0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 5a9ce0 <hypre_GetThreadNum>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,-0x108(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 5a9cd0 <hypre_NumActiveThreads>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0xd8(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,-0x120(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R12,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R13,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CQTO																				scal (12.5%)
LEA -0x1(%RDI),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
IDIV %RDI	2	0	0	0	2	0	0	0	0	0	0	0	0	0	0	0	0	9-19	7-12	scal (12.5%)
IMUL %RAX,%RCX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
ADD %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RSI,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
LEA (,%R8,8),%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RCX,-0xe0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%R15,%R13,1),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMOVNE %RAX,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R12,-0xe8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
ADD %R15,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %R12,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R15,-0xc8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x40(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RCX,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R15,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 5a6c20 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
TEST %R15,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x90(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x110(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x118(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
JLE 46f213 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x203>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x40(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV $0xff,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R9,-0x118(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,-0x110(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R11,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
SAL $0x3,%RDX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
CALL 4110a0 <memset@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0x90(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x110(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x118(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x60(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
INC %RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDI,-0x118(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CMP %RDI,-0x100(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JE 47072a <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x171a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
CMPQ $0,-0xf8(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JNE 4706bf <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x16af>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0xd8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xe0(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x58(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
DEC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %R8,-0xe8(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JLE 46fae9 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xad9>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
VMOVQ %R10,%XMM9	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
MOV %R9,-0x110(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVQ %R11,%XMM8	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
MOV %R14,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VMOVQ %R13,%XMM6	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
MOV %RAX,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSI,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV -0x110(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R10,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
VMOVQ %XMM8,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM9,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM6,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV -0x108(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
TEST %R15,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 46fca3 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xc93>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0xf0(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x120(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R9,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R11,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RSI,(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDX,(%R11)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RCX,(%R10)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 411290 <GOMP_barrier@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
CMPQ $0x1,(%R15)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOV -0xf0(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x40(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV $0x1,%R8D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x60(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x90(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JLE 46fb7a <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xb6a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV %R9,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 411290 <GOMP_barrier@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0x40(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x60(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x90(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xf0(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x80(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RSI,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%R8),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA -0x8(,%RCX,8),%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV (%R15,%R10,1),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R11,%R10,1),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%R9,%R13,1),%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %RDI,0x78(%RSI)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
ADD %RAX,0xb0(%RSI)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 5a6c20 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0x40(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
TEST %RDX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 47079a <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x178a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x60(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xa8(%RDI),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMPQ $0x1,(%R11)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JLE 4707b2 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x17a2>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x78(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOVQ $0,(%RSI,%R13,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
CALL 411290 <GOMP_barrier@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 46fe3b <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xe2b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
LEA (,%R15,8),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R11,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R9,-0x108(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDX,(%R11,%RSI,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RSI,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RCX,(%R10,%RSI,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 411290 <GOMP_barrier@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
CALL 411290 <GOMP_barrier@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
TEST %R15,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x60(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x40(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x90(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x108(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JLE 46fb9d <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xb8d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
LEA -0x8(%R15,%RDX,1),%R15	2	0	0	0.50	0.50	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	2	0.50	N/A
LEA -0x8(%R11,%RDX,1),%RDX	2	0	0	0.50	0.50	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	2	0.50	N/A
MOV -0xe0(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMP %R11,-0xe8(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JLE 4707bc <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x17ac>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x58(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xc0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x70(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R15),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xc8(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX,%RDI,8),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOT %RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %R8,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $0x3,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RSI,(%R10,%R9,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV -0x68(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDX),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %R11,(%RSI,%R9,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
LEA 0x1(%RDI),%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP %R11,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JLE 46fe28 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xe18>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
TEST %RCX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 470752 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x1742>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x1,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 46fd92 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xd82>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x2,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 47076c <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x175c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0xc0(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x70(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x68(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R15),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RSI,%R11,8),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
INC %R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RCX,(%RDI,%R8,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV (%RDX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %RAX,(%R9,%R8,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV -0xc0(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x70(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x68(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R15),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R10,%R11,8),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
INC %R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %R8,(%RCX,%RSI,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV (%RDX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %RAX,(%RDI,%RSI,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
CMP %R11,-0xc8(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JLE 46fe28 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xe18>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x70(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xc0(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xc8(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 411290 <GOMP_barrier@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0x40(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R15),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R11),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xd8(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xe0(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
DEC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RCX,-0xe8(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JLE 47057c <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x156c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R12,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVQ %R14,%XMM6	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
MOV %R13,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV -0x90(%RBP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV %R12,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 5a6cb0 <hypre_Free>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
CMPQ $0,-0xf8(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JNE 4705b0 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x15a0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x118(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMP %RDX,-0x100(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JE 4705b0 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x15a0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
ADD $0xf8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD $0xf8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 5a6cb0 <hypre_Free>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV -0xf8(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R9,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R11,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 5a6c20 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0xf8(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
TEST %R15,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x40(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x60(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x90(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JLE 46f23c <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x22c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
LEA (,%R15,8),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV $0xff,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 4110a0 <memset@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0x40(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x60(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x90(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JMP 46f23c <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x22c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV -0x100(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R9,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R11,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R15,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 5a6c20 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
JMP 4706e9 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x16d9>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV %RSI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0xc0(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x70(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xc8(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JMP 46fdd4 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xdc4>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV -0xc0(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x70(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x68(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R15),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDI,%R11,8),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x58(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %RCX,(%RAX,%R8,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV (%RDX),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD $0x2,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %R9,(%R10,%R8,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	N/A
JMP 46fd6e <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xd5e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV -0x78(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R8,%R13,1),%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CALL 5a6c20 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 411290 <GOMP_barrier@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 46fc12 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0xc02>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
CALL 411290 <GOMP_barrier@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 47057c <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x156c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼hypre_BoomerAMGBuildMultipass._omp_fn.5–	1.67	0.87
▼Loop 615 - par_multi_interp.c:939-999 - exec–	0.06	0.03
▼Loop 618 - par_multi_interp.c:944-970 - exec–	0.74	0.35
○Loop 619 - par_multi_interp.c:963-970 - exec	0.00	0.00
○Loop 620 - par_multi_interp.c:951-958 - exec	0.00	0.00
▼Loop 616 - par_multi_interp.c:976-999 - exec–	0.00	0.01
○Loop 617 - par_multi_interp.c:983-999 - exec	0.00	0.00
▼Loop 607 - par_multi_interp.c:1072-1125 - exec–	0.05	0.02
▼Loop 610 - par_multi_interp.c:1075-1099 - exec–	0.78	0.37
○Loop 612 - par_multi_interp.c:1082-1088 - exec	0.00	0.01
○Loop 611 - par_multi_interp.c:1093-1099 - exec	0.00	0.00
▼Loop 608 - par_multi_interp.c:1104-1125 - exec–	0.00	0.01
○Loop 609 - par_multi_interp.c:1111-1125 - exec	0.00	0.00
○Loop 613 - par_multi_interp.c:1030-1034 - exec	0.04	0.02
○Loop 614 - par_multi_interp.c:1017-1020 - exec	0.00	0.00

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