OV - exec - Function hypre_ParMatmul.extracted.12

	Function: hypre_ParMatmul.extracted.12	Module: exec	Source: par_csr_matop.c:829-995 [...]	Coverage (incl. loops): 1.31% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_mv/par_csr_matop.c: 829 - 995

--------------------------------------------------------------------------------

829: #pragma omp parallel

[...]

840:     ii = hypre_GetThreadNum();

841:     num_threads = hypre_NumActiveThreads();

842:     size = num_rows_diag_A/num_threads;

843:     rest = num_rows_diag_A - size*num_threads;

844:     if (ii < rest)

845:     {

846:        ns = ii*size+ii;

847:        ne = (ii+1)*size+ii+1;

848:     }

849:     else

850:     {

851:        ns = ii*size+rest;

852:        ne = (ii+1)*size+rest;

853:     }

854:     jj_count_diag = C_diag_i[ns];

855:     jj_count_offd = C_offd_i[ns];

856:     if (num_cols_diag_B || num_cols_offd_C)

857:     B_marker = hypre_CTAlloc(HYPRE_Int, num_cols_diag_B+num_cols_offd_C);

858:     for (i1 = 0; i1 < num_cols_diag_B+num_cols_offd_C; i1++)

859:       B_marker[i1] = -1;

[...]

865:     for (i1 = ns; i1 < ne; i1++)

[...]

874:       if ( allsquare )

875:       {

876:          B_marker[i1] = jj_count_diag;

877:          C_diag_data[jj_count_diag] = zero;

878:          C_diag_j[jj_count_diag] = i1;

879:          jj_count_diag++;

[...]

886:       if (num_cols_offd_A)

887:       {

888:          for (jj2 = A_offd_i[i1]; jj2 < A_offd_i[i1+1]; jj2++)

889:          {

890:             i2 = A_offd_j[jj2];

891:             a_entry = A_offd_data[jj2];

[...]

897:             for (jj3 = B_ext_offd_i[i2]; jj3 < B_ext_offd_i[i2+1]; jj3++)

898:             {

899:                i3 = num_cols_diag_B+B_ext_offd_j[jj3];

[...]

907:                if (B_marker[i3] < jj_row_begin_offd)

908:                {

909:                   B_marker[i3] = jj_count_offd;

910:                   C_offd_data[jj_count_offd] = a_entry*B_ext_offd_data[jj3];

911:                   C_offd_j[jj_count_offd] = i3-num_cols_diag_B;

912:                   jj_count_offd++;

913:                }

914:                else

915:                   C_offd_data[B_marker[i3]] += a_entry*B_ext_offd_data[jj3];

916:             }

917:             for (jj3 = B_ext_diag_i[i2]; jj3 < B_ext_diag_i[i2+1]; jj3++)

918:             {

919:                i3 = B_ext_diag_j[jj3];

920:                if (B_marker[i3] < jj_row_begin_diag)

921:                {

922:                   B_marker[i3] = jj_count_diag;

923:                   C_diag_data[jj_count_diag] = a_entry*B_ext_diag_data[jj3];

924:                   C_diag_j[jj_count_diag] = i3;

925:                   jj_count_diag++;

926:                }

927:                else

928:                   C_diag_data[B_marker[i3]] += a_entry*B_ext_diag_data[jj3];

[...]

937:       for (jj2 = A_diag_i[i1]; jj2 < A_diag_i[i1+1]; jj2++)

938:       {

939:          i2 = A_diag_j[jj2];

940:          a_entry = A_diag_data[jj2];

[...]

946:          for (jj3 = B_diag_i[i2]; jj3 < B_diag_i[i2+1]; jj3++)

947:          {

948:             i3 = B_diag_j[jj3];

[...]

956:             if (B_marker[i3] < jj_row_begin_diag)

957:             {

958:                B_marker[i3] = jj_count_diag;

959:                C_diag_data[jj_count_diag] = a_entry*B_diag_data[jj3];

960:                C_diag_j[jj_count_diag] = i3;

961:                jj_count_diag++;

962:             }

963:             else

964:             {

965:                C_diag_data[B_marker[i3]] += a_entry*B_diag_data[jj3];

966:             }

967:          }

968:          if (num_cols_offd_B)

969:          {

970:             for (jj3 = B_offd_i[i2]; jj3 < B_offd_i[i2+1]; jj3++)

971:             {

972:                i3 = num_cols_diag_B+map_B_to_C[B_offd_j[jj3]];

[...]

980:                if (B_marker[i3] < jj_row_begin_offd)

981:                {

982:                   B_marker[i3] = jj_count_offd;

983:                   C_offd_data[jj_count_offd] = a_entry*B_offd_data[jj3];

984:                   C_offd_j[jj_count_offd] = i3-num_cols_diag_B;

985:                   jj_count_offd++;

986:                }

987:                else

988:                {

989:                   C_offd_data[B_marker[i3]] += a_entry*B_offd_data[jj3];

[...]

995:     hypre_TFree(B_marker);

0x55a870 PUSH	%RBP

0x55a871 MOV	%RSP,%RBP

0x55a874 PUSH	%R15

0x55a876 PUSH	%R14

0x55a878 PUSH	%R13

0x55a87a PUSH	%R12

0x55a87c PUSH	%RBX

0x55a87d SUB	$0xe8,%RSP

0x55a884 MOV	%R9,-0xa8(%RBP)

0x55a88b MOV	%R8,-0xc8(%RBP)

0x55a892 MOV	%RCX,-0x60(%RBP)

0x55a896 MOV	%RDX,-0xc0(%RBP)

0x55a89d MOV	0xe0(%RBP),%RAX

0x55a8a4 MOV	%RAX,-0x98(%RBP)

0x55a8ab MOV	0xd8(%RBP),%RAX

0x55a8b2 MOV	%RAX,-0x100(%RBP)

0x55a8b9 MOV	0xd0(%RBP),%RAX

0x55a8c0 MOV	%RAX,-0x78(%RBP)

0x55a8c4 MOV	0xc8(%RBP),%RAX

0x55a8cb MOV	%RAX,-0xf8(%RBP)

0x55a8d2 MOV	0xc0(%RBP),%RAX

0x55a8d9 MOV	%RAX,-0xf0(%RBP)

0x55a8e0 MOV	0xb8(%RBP),%RAX

0x55a8e7 MOV	%RAX,-0x70(%RBP)

0x55a8eb MOV	0xb0(%RBP),%RAX

0x55a8f2 MOV	%RAX,-0xe8(%RBP)

0x55a8f9 MOV	0xa8(%RBP),%RAX

0x55a900 MOV	%RAX,-0x40(%RBP)

0x55a904 MOV	0xa0(%RBP),%RAX

0x55a90b MOV	%RAX,-0x88(%RBP)

0x55a912 MOV	0x98(%RBP),%RAX

0x55a919 MOV	%RAX,-0x30(%RBP)

0x55a91d MOV	0x90(%RBP),%R13

0x55a924 MOV	0x88(%RBP),%RAX

0x55a92b MOV	%RAX,-0x50(%RBP)

0x55a92f MOV	0x80(%RBP),%RAX

0x55a936 MOV	%RAX,-0x38(%RBP)

0x55a93a MOV	0x78(%RBP),%R12

0x55a93e MOV	0x70(%RBP),%RAX

0x55a942 MOV	%RAX,-0xe0(%RBP)

0x55a949 MOV	0x68(%RBP),%RAX

0x55a94d MOV	%RAX,-0xb8(%RBP)

0x55a954 MOV	0x60(%RBP),%R15

0x55a958 MOV	0x58(%RBP),%RAX

0x55a95c MOV	%RAX,-0xd8(%RBP)

0x55a963 MOV	0x50(%RBP),%RAX

0x55a967 MOV	%RAX,-0x68(%RBP)

0x55a96b MOV	0x48(%RBP),%RAX

0x55a96f MOV	%RAX,-0xd0(%RBP)

0x55a976 MOV	0x40(%RBP),%RAX

0x55a97a MOV	%RAX,-0x110(%RBP)

0x55a981 MOV	0x38(%RBP),%RAX

0x55a985 MOV	%RAX,-0x80(%RBP)

0x55a989 MOV	0x30(%RBP),%RAX

0x55a98d MOV	%RAX,-0x108(%RBP)

0x55a994 MOV	0x28(%RBP),%RAX

0x55a998 MOV	%RAX,-0x90(%RBP)

0x55a99f MOV	0x20(%RBP),%R14

0x55a9a3 MOV	0x18(%RBP),%RAX

0x55a9a7 MOV	%RAX,-0xa0(%RBP)

0x55a9ae MOV	0x10(%RBP),%RAX

0x55a9b2 MOV	%RAX,-0x58(%RBP)

0x55a9b6 CALL	5ac1c0 <hypre_GetThreadNum>

0x55a9bb MOV	%RAX,%RBX

0x55a9be CALL	5ac1b0 <hypre_NumActiveThreads>

0x55a9c3 MOV	%RAX,%RCX

0x55a9c6 OR	%R14,%RAX

0x55a9c9 SHR	$0x20,%RAX

0x55a9cd JE	55a9f5

0x55a9cf MOV	%R14,%RAX

0x55a9d2 CQTO

0x55a9d4 IDIV	%RCX

0x55a9d7 MOV	%RAX,%R9

0x55a9da LEA	0x1(%RBX),%RAX

0x55a9de CMP	%RDX,%RBX

0x55a9e1 MOV	-0x40(%RBP),%RSI

0x55a9e5 JGE	55aa0c

0x55a9e7 LEA	0x1(%R9),%R8

0x55a9eb IMUL	%RBX,%R8

0x55a9ef MOV	%RAX,-0x48(%RBP)

0x55a9f3 JMP	55aa1a

0x55a9f5 MOV	%R14D,%EAX

0x55a9f8 XOR	%EDX,%EDX

0x55a9fa DIV	%ECX

0x55a9fc MOV	%EAX,%R9D

0x55a9ff LEA	0x1(%RBX),%RAX

0x55aa03 CMP	%RDX,%RBX

0x55aa06 MOV	-0x40(%RBP),%RSI

0x55aa0a JL	55a9e7

0x55aa0c IMUL	%R9,%RBX

0x55aa10 MOV	%RDX,-0x48(%RBP)

0x55aa14 ADD	%RDX,%RBX

0x55aa17 MOV	%RBX,%R8

0x55aa1a MOV	-0x30(%RBP),%RCX

0x55aa1e MOV	-0x38(%RBP),%RBX

0x55aa22 IMUL	%RAX,%R9

0x55aa26 MOV	(%RBX),%RAX

0x55aa29 MOV	(%RAX,%R8,8),%RBX

0x55aa2d MOV	(%RCX),%RAX

0x55aa30 MOV	(%RAX,%R8,8),%RAX

0x55aa34 MOV	%RAX,-0x30(%RBP)

0x55aa38 MOV	(%RSI),%RAX

0x55aa3b XOR	%ECX,%ECX

0x55aa3d MOV	%R15,%RDX

0x55aa40 OR	%RAX,%RDX

0x55aa43 MOV	$0,%EDI

0x55aa48 JE	55aa72

0x55aa4a ADD	%R15,%RAX

0x55aa4d MOV	$0x8,%ESI

0x55aa52 MOV	%RAX,%RDI

0x55aa55 MOV	%R8,%R14

0x55aa58 MOV	%R9,-0x38(%RBP)

0x55aa5c CALL	5a8860 <hypre_CAlloc>

0x55aa61 MOV	-0x38(%RBP),%R9

0x55aa65 MOV	-0x40(%RBP),%RSI

0x55aa69 MOV	%R14,%R8

0x55aa6c MOV	%RAX,%RDI

0x55aa6f MOV	(%RSI),%RCX

0x55aa72 ADD	%R9,-0x48(%RBP)

0x55aa76 ADD	%R15,%RCX

0x55aa79 JLE	55aa96

0x55aa7b XOR	%EAX,%EAX

0x55aa7d NOPL	(%RAX)

(4676) 0x55aa80 MOVQ	$-0x1,(%RDI,%RAX,8)

(4676) 0x55aa88 INC	%RAX

(4676) 0x55aa8b MOV	(%RSI),%RCX

(4676) 0x55aa8e ADD	%R15,%RCX

(4676) 0x55aa91 CMP	%RCX,%RAX

(4676) 0x55aa94 JL	55aa80

0x55aa96 CMP	-0x48(%RBP),%R8

0x55aa9a JGE	55adf5

0x55aaa0 MOV	%RBX,%RAX

0x55aaa3 MOV	%R15,%R14

0x55aaa6 JMP	55aac1

0x55aaa8 NOPL	(%RAX,%RAX,1)

(4669) 0x55aab0 MOV	%RCX,-0x30(%RBP)

(4669) 0x55aab4 MOV	%RAX,%RBX

(4669) 0x55aab7 CMP	-0x48(%RBP),%R8

(4669) 0x55aabb JGE	55adf5

(4669) 0x55aac1 MOV	%R8,%RDX

(4669) 0x55aac4 CMPQ	$0,-0x98(%RBP)

(4669) 0x55aacc JE	55aae6

(4669) 0x55aace MOV	%RBX,(%RDI,%RDX,8)

(4669) 0x55aad2 MOVQ	$0,(%R12,%RBX,8)

(4669) 0x55aada MOV	-0x50(%RBP),%RAX

(4669) 0x55aade MOV	%RDX,(%RAX,%RBX,8)

(4669) 0x55aae2 LEA	0x1(%RBX),%RAX

(4669) 0x55aae6 CMPQ	$0,-0x90(%RBP)

(4669) 0x55aaee JE	55ac70

(4669) 0x55aaf4 MOV	-0x58(%RBP),%RCX

(4669) 0x55aaf8 MOV	(%RCX,%RDX,8),%R9

(4669) 0x55aafc LEA	0x1(%RDX),%R8

(4669) 0x55ab00 CMP	0x8(%RCX,%RDX,8),%R9

(4669) 0x55ab05 JGE	55ac74

(4669) 0x55ab0b MOV	%R8,-0x38(%RBP)

(4669) 0x55ab0f MOV	-0x30(%RBP),%RCX

(4669) 0x55ab13 MOV	%RDX,-0xb0(%RBP)

(4669) 0x55ab1a JMP	55ab3d

0x55ab1c NOPL	(%RAX)

  (4673) 0x55ab20 MOV	-0x40(%RBP),%R9

  (4673) 0x55ab24 INC	%R9

  (4673) 0x55ab27 MOV	-0x58(%RBP),%RDX

  (4673) 0x55ab2b MOV	-0xb0(%RBP),%RSI

  (4673) 0x55ab32 CMP	0x8(%RDX,%RSI,8),%R9

  (4673) 0x55ab37 JGE	55ac90

  (4673) 0x55ab3d MOV	-0xa0(%RBP),%RDX

  (4673) 0x55ab44 MOV	(%RDX,%R9,8),%R8

  (4673) 0x55ab48 MOV	-0xa8(%RBP),%RDX

  (4673) 0x55ab4f MOV	%R9,-0x40(%RBP)

  (4673) 0x55ab53 MOVSD	(%RDX,%R9,8),%XMM0

  (4673) 0x55ab59 MOV	-0x78(%RBP),%RDX

  (4673) 0x55ab5d MOV	(%RDX,%R8,8),%R9

  (4673) 0x55ab61 MOV	0x8(%RDX,%R8,8),%R10

  (4673) 0x55ab66 JMP	55ab84

0x55ab68 NOPL	(%RAX,%RAX,1)

    (4675) 0x55ab70 ADDSD	(%R13,%RDX,8),%XMM1

    (4675) 0x55ab77 MOVSD	%XMM1,(%R13,%RDX,8)

    (4675) 0x55ab7e MOV	%R14,%R15

    (4675) 0x55ab81 INC	%R9

    (4675) 0x55ab84 CMP	%R10,%R9

    (4675) 0x55ab87 JGE	55abe0

    (4675) 0x55ab89 MOV	-0x100(%RBP),%RDX

    (4675) 0x55ab90 MOV	(%RDX,%R9,8),%R11

    (4675) 0x55ab94 LEA	(%R11,%R15,1),%RSI

    (4675) 0x55ab98 MOV	(%RDI,%RSI,8),%RDX

    (4675) 0x55ab9c MOV	-0xf8(%RBP),%R15

    (4675) 0x55aba3 MOVSD	(%R15,%R9,8),%XMM1

    (4675) 0x55aba9 MULSD	%XMM0,%XMM1

    (4675) 0x55abad CMP	-0x30(%RBP),%RDX

    (4675) 0x55abb1 JGE	55ab70

    (4675) 0x55abb3 MOV	%RCX,(%RDI,%RSI,8)

    (4675) 0x55abb7 MOVSD	%XMM1,(%R13,%RCX,8)

    (4675) 0x55abbe MOV	-0x88(%RBP),%RDX

    (4675) 0x55abc5 MOV	%R11,(%RDX,%RCX,8)

    (4675) 0x55abc9 INC	%RCX

    (4675) 0x55abcc MOV	-0x78(%RBP),%RDX

    (4675) 0x55abd0 MOV	0x8(%RDX,%R8,8),%R10

    (4675) 0x55abd5 JMP	55ab7e

0x55abd7 NOPW	(%RAX,%RAX,1)

  (4673) 0x55abe0 MOV	-0x70(%RBP),%RDX

  (4673) 0x55abe4 MOV	(%RDX,%R8,8),%R9

  (4673) 0x55abe8 MOV	0x8(%RDX,%R8,8),%R10

  (4673) 0x55abed CMP	%R10,%R9

  (4673) 0x55abf0 JL	55ac2a

  (4673) 0x55abf2 JMP	55ab20

0x55abf7 NOPW	(%RAX,%RAX,1)

    (4674) 0x55ac00 MOV	%RAX,(%RDI,%R11,8)

    (4674) 0x55ac04 MOVSD	%XMM1,(%R12,%RAX,8)

    (4674) 0x55ac0a MOV	-0x50(%RBP),%RDX

    (4674) 0x55ac0e MOV	%R11,(%RDX,%RAX,8)

    (4674) 0x55ac12 INC	%RAX

    (4674) 0x55ac15 MOV	-0x70(%RBP),%RDX

    (4674) 0x55ac19 MOV	0x8(%RDX,%R8,8),%R10

    (4674) 0x55ac1e INC	%R9

    (4674) 0x55ac21 CMP	%R10,%R9

    (4674) 0x55ac24 JGE	55ab20

    (4674) 0x55ac2a MOV	-0xf0(%RBP),%RDX

    (4674) 0x55ac31 MOV	(%RDX,%R9,8),%R11

    (4674) 0x55ac35 MOV	(%RDI,%R11,8),%RDX

    (4674) 0x55ac39 MOV	-0xe8(%RBP),%RSI

    (4674) 0x55ac40 MOVSD	(%RSI,%R9,8),%XMM1

    (4674) 0x55ac46 MULSD	%XMM0,%XMM1

    (4674) 0x55ac4a CMP	%RBX,%RDX

    (4674) 0x55ac4d JL	55ac00

    (4674) 0x55ac4f ADDSD	(%R12,%RDX,8),%XMM1

    (4674) 0x55ac55 MOVSD	%XMM1,(%R12,%RDX,8)

    (4674) 0x55ac5b INC	%R9

    (4674) 0x55ac5e CMP	%R10,%R9

    (4674) 0x55ac61 JL	55ac2a

  (4673) 0x55ac63 JMP	55ab20

0x55ac68 NOPL	(%RAX,%RAX,1)

(4669) 0x55ac70 LEA	0x1(%RDX),%R8

(4669) 0x55ac74 MOV	-0x30(%RBP),%RCX

(4669) 0x55ac78 MOV	-0x60(%RBP),%RSI

(4669) 0x55ac7c MOV	(%RSI,%RDX,8),%RDX

(4669) 0x55ac80 CMP	(%RSI,%R8,8),%RDX

(4669) 0x55ac84 JGE	55aab0

(4669) 0x55ac8a JMP	55aca9

0x55ac8c NOPL	(%RAX)

(4669) 0x55ac90 MOV	%RSI,%RDX

(4669) 0x55ac93 MOV	-0x38(%RBP),%R8

(4669) 0x55ac97 MOV	-0x60(%RBP),%RSI

(4669) 0x55ac9b MOV	(%RSI,%RDX,8),%RDX

(4669) 0x55ac9f CMP	(%RSI,%R8,8),%RDX

(4669) 0x55aca3 JGE	55aab0

(4669) 0x55aca9 MOV	%R8,-0x38(%RBP)

(4669) 0x55acad JMP	55acc9

0x55acaf NOP

  (4670) 0x55acb0 MOV	-0x40(%RBP),%RDX

  (4670) 0x55acb4 INC	%RDX

  (4670) 0x55acb7 MOV	-0x60(%RBP),%RSI

  (4670) 0x55acbb MOV	-0x38(%RBP),%R8

  (4670) 0x55acbf CMP	(%RSI,%R8,8),%RDX

  (4670) 0x55acc3 JGE	55aab0

  (4670) 0x55acc9 MOV	-0xc8(%RBP),%RSI

  (4670) 0x55acd0 MOV	(%RSI,%RDX,8),%RSI

  (4670) 0x55acd4 MOV	-0xc0(%RBP),%R8

  (4670) 0x55acdb MOV	%RDX,-0x40(%RBP)

  (4670) 0x55acdf MOVSD	(%R8,%RDX,8),%XMM0

  (4670) 0x55ace5 MOV	-0x80(%RBP),%RDX

  (4670) 0x55ace9 MOV	(%RDX,%RSI,8),%R8

  (4670) 0x55aced MOV	0x8(%RDX,%RSI,8),%R9

  (4670) 0x55acf2 CMP	%R9,%R8

  (4670) 0x55acf5 JL	55ad26

  (4670) 0x55acf7 JMP	55ad5f

0x55acf9 NOPL	(%RAX)

    (4672) 0x55ad00 MOV	%RAX,(%RDI,%R10,8)

    (4672) 0x55ad04 MOVSD	%XMM1,(%R12,%RAX,8)

    (4672) 0x55ad0a MOV	-0x50(%RBP),%R9

    (4672) 0x55ad0e MOV	%R10,(%R9,%RAX,8)

    (4672) 0x55ad12 INC	%RAX

    (4672) 0x55ad15 MOV	-0x80(%RBP),%RDX

    (4672) 0x55ad19 MOV	0x8(%RDX,%RSI,8),%R9

    (4672) 0x55ad1e INC	%R8

    (4672) 0x55ad21 CMP	%R9,%R8

    (4672) 0x55ad24 JGE	55ad5f

    (4672) 0x55ad26 MOV	-0x110(%RBP),%RDX

    (4672) 0x55ad2d MOV	(%RDX,%R8,8),%R10

    (4672) 0x55ad31 MOV	(%RDI,%R10,8),%R11

    (4672) 0x55ad35 MOV	-0x108(%RBP),%RDX

    (4672) 0x55ad3c MOVSD	(%RDX,%R8,8),%XMM1

    (4672) 0x55ad42 MULSD	%XMM0,%XMM1

    (4672) 0x55ad46 CMP	%RBX,%R11

    (4672) 0x55ad49 JL	55ad00

    (4672) 0x55ad4b ADDSD	(%R12,%R11,8),%XMM1

    (4672) 0x55ad51 MOVSD	%XMM1,(%R12,%R11,8)

    (4672) 0x55ad57 INC	%R8

    (4672) 0x55ad5a CMP	%R9,%R8

    (4672) 0x55ad5d JL	55ad26

  (4670) 0x55ad5f CMPQ	$0,-0xb8(%RBP)

  (4670) 0x55ad67 JE	55acb0

  (4670) 0x55ad6d MOV	-0x68(%RBP),%R9

  (4670) 0x55ad71 MOV	(%R9,%RSI,8),%R8

  (4670) 0x55ad75 MOV	0x8(%R9,%RSI,8),%R9

  (4670) 0x55ad7a JMP	55ad94

0x55ad7c NOPL	(%RAX)

    (4671) 0x55ad80 ADDSD	(%R13,%R11,8),%XMM1

    (4671) 0x55ad87 MOVSD	%XMM1,(%R13,%R11,8)

    (4671) 0x55ad8e MOV	%R14,%R15

    (4671) 0x55ad91 INC	%R8

    (4671) 0x55ad94 CMP	%R9,%R8

    (4671) 0x55ad97 JGE	55acb0

    (4671) 0x55ad9d MOV	-0xd8(%RBP),%R10

    (4671) 0x55ada4 MOV	(%R10,%R8,8),%R10

    (4671) 0x55ada8 MOV	-0xe0(%RBP),%R11

    (4671) 0x55adaf MOV	(%R11,%R10,8),%R10

    (4671) 0x55adb3 ADD	%R10,%R15

    (4671) 0x55adb6 MOV	(%RDI,%R15,8),%R11

    (4671) 0x55adba MOV	-0xd0(%RBP),%RDX

    (4671) 0x55adc1 MOVSD	(%RDX,%R8,8),%XMM1

    (4671) 0x55adc7 MULSD	%XMM0,%XMM1

    (4671) 0x55adcb CMP	-0x30(%RBP),%R11

    (4671) 0x55adcf JGE	55ad80

    (4671) 0x55add1 MOV	%RCX,(%RDI,%R15,8)

    (4671) 0x55add5 MOVSD	%XMM1,(%R13,%RCX,8)

    (4671) 0x55addc MOV	-0x88(%RBP),%R9

    (4671) 0x55ade3 MOV	%R10,(%R9,%RCX,8)

    (4671) 0x55ade7 INC	%RCX

    (4671) 0x55adea MOV	-0x68(%RBP),%R9

    (4671) 0x55adee MOV	0x8(%R9,%RSI,8),%R9

    (4671) 0x55adf3 JMP	55ad8e

0x55adf5 ADD	$0xe8,%RSP

0x55adfc POP	%RBX

0x55adfd POP	%R12

0x55adff POP	%R13

0x55ae01 POP	%R14

0x55ae03 POP	%R15

0x55ae05 POP	%RBP

0x55ae06 JMP	5a8930

0x55ae0b NOPL	(%RAX,%RAX,1)

Coverage (%)	Name	Source Location	Module
►96.77+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
○	__kmp_launch_thread		libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]		libiomp5.so
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►2.94+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
○	__kmp_fork_call		libiomp5.so
○	__kmpc_fork_call		libiomp5.so
○	hypre_ParMatmul	par_csr_matop.c:829	exec
○	hypre_BoomerAMGSetup	par_amg_setup.c:1226	exec
○	hypre_PCGSetup	pcg.c:234	exec
○	main	amg.c:398	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start		exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_5

Source file and lines	par_csr_matop.c:829-995
Module	exec

The function is defined in /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_mv/par_csr_matop.c:829,840-859,865,874-879,886-891,897-899,907-928,937-940,946-948,956-972,980-989,995.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 12% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 18.75 to 1.87 cycles (10.00x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Performance is limited by:

reading data from caches/RAM (load units are a bottleneck)
writing data to caches/RAM (the store unit is a bottleneck)

Workaround

Read less array elements
Write less array elements
Provide more information to your compiler:
- use the 'restrict' C99 keyword

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

hypre_CAlloc: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_mv/par_csr_matop.c:857
hypre_GetThreadNum: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_mv/par_csr_matop.c:840
hypre_NumActiveThreads: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_mv/par_csr_matop.c:841

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

DIV: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_mv/par_csr_matop.c:842
IDIV: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_mv/par_csr_matop.c:842

Conversion instructions

Detected expensive conversion instructions.

Details

CQTO: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_mv/par_csr_matop.c:842

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 328 bytes. The binary function is storing 256 bytes.

General properties

nb instructions	147
nb uops	139
loop length	635
used x86 registers	14
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	55

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	17.38 cycles
front end	17.38 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	6.00	6.00	6.00	6.00	6.00	6.00	18.75	18.75	18.75	18.75	0.00	0.00	0.00	0.00	0.00	0.00
cycles	6.00	6.00	6.00	6.00	6.00	6.00	18.75	18.75	18.75	18.75	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

13.00-18.00

Cycles summary

Front-end	17.38
Dispatch	18.75
DIV/SQRT	13.00-18.00
Overall L1	18.75

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	0%

Vector efficiency ratios

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	9%
other	11%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 18.75 cycles. At this rate:

6% of peak load performance is reached (17.49 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
10% of peak store performance is reached (13.65 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 55a870

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0xe8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R9,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R8,-0xc8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RCX,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDX,-0xc0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xe0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xd8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x100(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xd0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xc8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xf8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xc0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xf0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xb8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x70(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xb0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xe8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xa8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xa0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x88(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x98(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x90(%RBP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x88(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x80(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x78(%RBP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x70(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xe0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x68(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xb8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x60(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x58(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xd8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x50(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x68(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x48(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xd0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x40(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x110(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x38(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x30(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x108(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x28(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x20(%RBP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x18(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xa0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x10(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 5ac1c0 <hypre_GetThreadNum>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 5ac1b0 <hypre_NumActiveThreads>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
OR %R14,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SHR $0x20,%RAX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JE 55a9f5 <hypre_ParMatmul.extracted.12+0x185>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R14,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CQTO																				scal (12.5%)
IDIV %RCX	2	0	0	0	2	0	0	0	0	0	0	0	0	0	0	0	0	9-19	7-12	scal (12.5%)
MOV %RAX,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA 0x1(%RBX),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP %RDX,%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x40(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JGE 55aa0c <hypre_ParMatmul.extracted.12+0x19c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
LEA 0x1(%R9),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
IMUL %RBX,%R8	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
MOV %RAX,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JMP 55aa1a <hypre_ParMatmul.extracted.12+0x1aa>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV %R14D,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
DIV %ECX	2	0	0	0	2	0	0	0	0	0	0	0	0	0	0	0	0	10-17	6	scal (6.3%)
MOV %EAX,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA 0x1(%RBX),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP %RDX,%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x40(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JL 55a9e7 <hypre_ParMatmul.extracted.12+0x177>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
IMUL %R9,%RBX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
MOV %RDX,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
ADD %RDX,%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RBX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x30(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x38(%RBP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
IMUL %RAX,%R9	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
MOV (%RBX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX,%R8,8),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RCX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX,%R8,8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%RSI),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %R15,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
OR %RAX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV $0,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JE 55aa72 <hypre_ParMatmul.extracted.12+0x202>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
ADD %R15,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %R8,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %R9,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 5a8860 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x40(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R14,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV (%RSI),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %R9,-0x48(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
ADD %R15,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JLE 55aa96 <hypre_ParMatmul.extracted.12+0x226>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMP -0x48(%RBP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JGE 55adf5 <hypre_ParMatmul.extracted.12+0x585>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RBX,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R15,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
JMP 55aac1 <hypre_ParMatmul.extracted.12+0x251>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
ADD $0xe8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 5a8930 <hypre_Free>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_5

Source file and lines	par_csr_matop.c:829-995
Module	exec

gain
potential
hint
expert

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Performance is limited by:

reading data from caches/RAM (load units are a bottleneck)
writing data to caches/RAM (the store unit is a bottleneck)

Workaround

Read less array elements
Write less array elements
Provide more information to your compiler:
- use the 'restrict' C99 keyword

No data for this section

CALL instructions

Detected function call instructions.

Details

hypre_CAlloc: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_mv/par_csr_matop.c:857
hypre_GetThreadNum: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_mv/par_csr_matop.c:840
hypre_NumActiveThreads: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_mv/par_csr_matop.c:841

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

DIV: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_mv/par_csr_matop.c:842
IDIV: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_mv/par_csr_matop.c:842

Conversion instructions

Detected expensive conversion instructions.

Details

CQTO: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_mv/par_csr_matop.c:842

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 328 bytes. The binary function is storing 256 bytes.

General properties

nb instructions	147
nb uops	139
loop length	635
used x86 registers	14
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	55

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	17.38 cycles
front end	17.38 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	6.00	6.00	6.00	6.00	6.00	6.00	18.75	18.75	18.75	18.75	0.00	0.00	0.00	0.00	0.00	0.00
cycles	6.00	6.00	6.00	6.00	6.00	6.00	18.75	18.75	18.75	18.75	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

13.00-18.00

Cycles summary

Front-end	17.38
Dispatch	18.75
DIV/SQRT	13.00-18.00
Overall L1	18.75

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	0%

Vector efficiency ratios

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	9%
other	11%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 18.75 cycles. At this rate:

6% of peak load performance is reached (17.49 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
10% of peak store performance is reached (13.65 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 55a870

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0xe8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R9,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R8,-0xc8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RCX,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDX,-0xc0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xe0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xd8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x100(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xd0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xc8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xf8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xc0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xf0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xb8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x70(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xb0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xe8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xa8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xa0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x88(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x98(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x90(%RBP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x88(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x80(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x78(%RBP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x70(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xe0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x68(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xb8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x60(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x58(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xd8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x50(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x68(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x48(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xd0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x40(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x110(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x38(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x30(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x108(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x28(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x20(%RBP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x18(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xa0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x10(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 5ac1c0 <hypre_GetThreadNum>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 5ac1b0 <hypre_NumActiveThreads>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
OR %R14,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SHR $0x20,%RAX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JE 55a9f5 <hypre_ParMatmul.extracted.12+0x185>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R14,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CQTO																				scal (12.5%)
IDIV %RCX	2	0	0	0	2	0	0	0	0	0	0	0	0	0	0	0	0	9-19	7-12	scal (12.5%)
MOV %RAX,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA 0x1(%RBX),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP %RDX,%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x40(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JGE 55aa0c <hypre_ParMatmul.extracted.12+0x19c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
LEA 0x1(%R9),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
IMUL %RBX,%R8	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
MOV %RAX,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JMP 55aa1a <hypre_ParMatmul.extracted.12+0x1aa>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV %R14D,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
DIV %ECX	2	0	0	0	2	0	0	0	0	0	0	0	0	0	0	0	0	10-17	6	scal (6.3%)
MOV %EAX,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA 0x1(%RBX),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP %RDX,%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x40(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JL 55a9e7 <hypre_ParMatmul.extracted.12+0x177>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
IMUL %R9,%RBX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
MOV %RDX,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
ADD %RDX,%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RBX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x30(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x38(%RBP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
IMUL %RAX,%R9	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
MOV (%RBX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX,%R8,8),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RCX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX,%R8,8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%RSI),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %R15,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
OR %RAX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV $0,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JE 55aa72 <hypre_ParMatmul.extracted.12+0x202>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
ADD %R15,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %R8,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %R9,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 5a8860 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x40(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R14,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV (%RSI),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %R9,-0x48(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
ADD %R15,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JLE 55aa96 <hypre_ParMatmul.extracted.12+0x226>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMP -0x48(%RBP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JGE 55adf5 <hypre_ParMatmul.extracted.12+0x585>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RBX,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R15,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
JMP 55aac1 <hypre_ParMatmul.extracted.12+0x251>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
ADD $0xe8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 5a8930 <hypre_Free>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼hypre_ParMatmul.extracted.12–	1.31	0.69
▼Loop 4669 - par_csr_matop.c:865-989 - exec–	0.02	0.01
▼Loop 4670 - par_csr_matop.c:937-989 - exec–	0.26	0.13
○Loop 4672 - par_csr_matop.c:946-965 - exec	0.99	0.48
○Loop 4671 - par_csr_matop.c:970-989 - exec	0.03	0.02
▼Loop 4673 - par_csr_matop.c:888-928 - exec–	0.00	0.01
○Loop 4675 - par_csr_matop.c:897-915 - exec	0.00	0.01
○Loop 4674 - par_csr_matop.c:917-928 - exec	0.00	0.01
○Loop 4676 - par_csr_matop.c:858-859 - exec	0.01	0.01

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Matching between your function (in the source code) and the binary function

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Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Vectorization

Details

Workaround

Execution units bottlenecks

Workaround

CALL instructions

Details

Complex instructions

Details

Conversion instructions

Details

Workaround

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code