OV - exec - Function hypre_BoomerAMGCreate2ndS.extracted.17

	Function: hypre_BoomerAMGCreate2ndS.extracted.17	Module: exec	Source: par_strength.c:1668-2230 [...]	Coverage (incl. loops): 1.65% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c: 1668 - 2230

--------------------------------------------------------------------------------

1668: #pragma omp parallel private(i1,i2,i3,jj1,jj2,index)

1669: #endif

1670:    {

1671:       HYPRE_Int my_thread_num = hypre_GetThreadNum();

1672:

1673:       HYPRE_Int i1_begin, i1_end;

1674:       hypre_GetSimpleThreadPartition(&i1_begin, &i1_end, num_cols_diag_S);

1675:

1676:       HYPRE_Int *C_temp_diag_j = NULL, *C_temp_offd_j = NULL;

1677:       HYPRE_Int *C_temp_diag_data = NULL, *C_temp_offd_data = NULL;

1678:

1679:       if (num_paths > 1)

1680:       {

1681:          C_temp_diag_j = C_temp_diag_j_array + num_coarse*my_thread_num;

1682:          C_temp_offd_j = C_temp_offd_j_array + num_cols_offd_C*my_thread_num;

1683:

1684:          C_temp_diag_data = C_temp_diag_data_array + num_coarse*my_thread_num;

1685:          C_temp_offd_data = C_temp_offd_data_array + num_cols_offd_C*my_thread_num;

1686:       }

1687:

1688:       HYPRE_Int *S_marker = NULL, *S_marker_offd = NULL;

1689:       if (num_coarse) S_marker = S_marker_array + num_coarse*my_thread_num;

1690:       if (num_cols_offd_C) S_marker_offd = S_marker_offd_array + num_cols_offd_C*my_thread_num;

1691:       for (i1 = 0; i1 < num_coarse; i1++)

1692:       {

1693:          S_marker[i1] = -1;

1694:       }

1695:       for (i1 = 0; i1 < num_cols_offd_C; i1++)

1696:       {

1697:          S_marker_offd[i1] = -1;

[...]

1705:       HYPRE_Int num_nonzeros_diag = 0;

1706:       HYPRE_Int num_nonzeros_offd = 0;

1707:

1708:       HYPRE_Int ic_begin = num_coarse_prefix_sum[my_thread_num];

1709:       HYPRE_Int ic_end = num_coarse_prefix_sum[my_thread_num + 1];

1710:       HYPRE_Int ic;

1711:

1712:       if (num_paths == 1)

1713:       {

1714:          for (ic = ic_begin; ic < ic_end; ic++)

[...]

1720:              HYPRE_Int i1 = coarse_to_fine[ic];

1721:

1722:              HYPRE_Int jj_row_begin_diag = num_nonzeros_diag;

1723:              HYPRE_Int jj_row_begin_offd = num_nonzeros_offd;

1724:

1725:              C_diag_i[ic] = num_nonzeros_diag;

1726:              if (num_cols_offd_C)

1727:              {

1728:                 C_offd_i[ic] = num_nonzeros_offd;

1729:              }

1730:

1731:              for (jj1 = S_diag_i[i1]; jj1 < S_diag_i[i1+1]; jj1++)

1732:              {

1733:                  i2 = S_diag_j[jj1];

1734:                  if (CF_marker[i2] > 0)

1735:                  {

1736:                     index = fine_to_coarse[i2];

1737:                     if (S_marker[index] < jj_row_begin_diag)

1738:                     {

1739:                        S_marker[index] = num_nonzeros_diag;

1740:                        num_nonzeros_diag++;

1741:                     }

1742:                  }

1743:                  for (jj2 = S_diag_i[i2]; jj2 < S_diag_i[i2+1]; jj2++)

1744:                  {

1745:                     i3 = S_diag_j[jj2];

1746:                     if (CF_marker[i3] > 0)

1747:                     {

1748:                        index = fine_to_coarse[i3];

1749:                        if (index != ic && S_marker[index] < jj_row_begin_diag)

1750:                        {

1751:                           S_marker[index] = num_nonzeros_diag;

1752:                           num_nonzeros_diag++;

1753:                        }

1754:                     }

1755:                  }

1756:                  for (jj2 = S_offd_i[i2]; jj2 < S_offd_i[i2+1]; jj2++)

1757:                  {

1758:                     i3 = S_offd_j[jj2];

1759:                     if (CF_marker_offd[i3] > 0)

1760:                     {

1761:                        index = map_S_to_C[i3];

1762:                        if (S_marker_offd[index] < jj_row_begin_offd)

1763:                        {

1764:                           S_marker_offd[index] = num_nonzeros_offd;

1765:                           num_nonzeros_offd++;

1766:                        }

1767:                     }

1768:                  }

1769:              }

1770:              for (jj1 = S_offd_i[i1]; jj1 < S_offd_i[i1+1]; jj1++)

1771:              {

1772:                  i2 = S_offd_j[jj1];

1773:                  if (CF_marker_offd[i2] > 0)

1774:                  {

1775:                     index = map_S_to_C[i2];

1776:                     if (S_marker_offd[index] < jj_row_begin_offd)

1777:                     {

1778:                        S_marker_offd[index] = num_nonzeros_offd;

1779:                        num_nonzeros_offd++;

1780:                     }

1781:                  }

1782:                  for (jj2 = S_ext_diag_i[i2]; jj2 < S_ext_diag_i[i2+1]; jj2++)

1783:                  {

1784:                     i3 = S_ext_diag_j[jj2];

1785:                     if (i3 != ic && S_marker[i3] < jj_row_begin_diag)

1786:                     {

1787:                        S_marker[i3] = num_nonzeros_diag;

1788:                        num_nonzeros_diag++;

1789:                     }

1790:                  }

1791:                  for (jj2 = S_ext_offd_i[i2]; jj2 < S_ext_offd_i[i2+1]; jj2++)

1792:                  {

1793:                     i3 = S_ext_offd_j[jj2];

1794:                     if (S_marker_offd[i3] < jj_row_begin_offd)

1795:                     {

1796:                        S_marker_offd[i3] = num_nonzeros_offd;

1797:                        num_nonzeros_offd++;

[...]

1806:          for (ic = ic_begin; ic < ic_end; ic++)

[...]

1812:              HYPRE_Int i1 = coarse_to_fine[ic];

1813:

1814:              HYPRE_Int jj_row_begin_diag = jj_count_diag;

1815:              HYPRE_Int jj_row_begin_offd = jj_count_offd;

1816:

1817:              C_diag_i[ic] = num_nonzeros_diag;

1818:              if (num_cols_offd_C)

1819:              {

1820:                 C_offd_i[ic] = num_nonzeros_offd;

1821:              }

1822:

1823:              for (jj1 = S_diag_i[i1]; jj1 < S_diag_i[i1+1]; jj1++)

1824:              {

1825:                  i2 = S_diag_j[jj1];

1826:                  if (CF_marker[i2] > 0)

1827:                  {

1828:                     index = fine_to_coarse[i2];

1829:                     if (S_marker[index] < jj_row_begin_diag)

1830:                     {

1831:                        S_marker[index] = jj_count_diag;

1832:                        C_temp_diag_data[jj_count_diag - jj_row_begin_diag] = 2;

1833:                        jj_count_diag++;

1834:                     }

1835:                     else

1836:                     {

1837:                        C_temp_diag_data[S_marker[index] - jj_row_begin_diag] += 2;

1838:                     }

1839:                  }

1840:                  for (jj2 = S_diag_i[i2]; jj2 < S_diag_i[i2+1]; jj2++)

1841:                  {

1842:                     i3 = S_diag_j[jj2];

1843:                     if (CF_marker[i3] > 0 && fine_to_coarse[i3] != ic)

1844:                     {

1845:                        index = fine_to_coarse[i3];

1846:                        if (S_marker[index] < jj_row_begin_diag)

1847:                        {

1848:                           S_marker[index] = jj_count_diag;

1849:                           C_temp_diag_data[jj_count_diag - jj_row_begin_diag] = 1;

1850:                           jj_count_diag++;

1851:                        }

1852:                        else

1853:                        {

1854:                           C_temp_diag_data[S_marker[index] - jj_row_begin_diag]++;

1855:                        }

1856:                     }

1857:                  }

1858:                  for (jj2 = S_offd_i[i2]; jj2 < S_offd_i[i2+1]; jj2++)

1859:                  {

1860:                     i3 = S_offd_j[jj2];

1861:                     if (CF_marker_offd[i3] > 0)

1862:                     {

1863:                        index = map_S_to_C[i3];

1864:                        if (S_marker_offd[index] < jj_row_begin_offd)

1865:                        {

1866:                           S_marker_offd[index] = jj_count_offd;

1867:                           C_temp_offd_data[jj_count_offd - jj_row_begin_offd] = 1;

1868:                           jj_count_offd++;

1869:                        }

1870:                        else

1871:                        {

1872:                           C_temp_offd_data[S_marker_offd[index] - jj_row_begin_offd]++;

1873:                        }

1874:                     }

1875:                  }

1876:              }

1877:              for (jj1 = S_offd_i[i1]; jj1 < S_offd_i[i1+1]; jj1++)

1878:              {

1879:                  i2 = S_offd_j[jj1];

1880:                  if (CF_marker_offd[i2] > 0)

1881:                  {

1882:                     index = map_S_to_C[i2];

1883:                     if (S_marker_offd[index] < jj_row_begin_offd)

1884:                     {

1885:                        S_marker_offd[index] = jj_count_offd;

1886:                        C_temp_offd_data[jj_count_offd - jj_row_begin_offd] = 2;

1887:                        jj_count_offd++;

1888:                     }

1889:                     else

1890:                     {

1891:                        C_temp_offd_data[S_marker_offd[index] - jj_row_begin_offd] += 2;

1892:                     }

1893:                  }

1894:                  for (jj2 = S_ext_diag_i[i2]; jj2 < S_ext_diag_i[i2+1]; jj2++)

1895:                  {

1896:                     i3 = S_ext_diag_j[jj2];

1897:                     if (i3 != ic)

1898:                     {

1899:                        if (S_marker[i3] < jj_row_begin_diag)

1900:                        {

1901:                           S_marker[i3] = jj_count_diag;

1902:                           C_temp_diag_data[jj_count_diag - jj_row_begin_diag] = 1;

1903:                           jj_count_diag++;

1904:                        }

1905:                        else

1906:                        {

1907:                           C_temp_diag_data[S_marker[i3] - jj_row_begin_diag]++;

1908:                        }

1909:                     }

1910:                  }

1911:                  for (jj2 = S_ext_offd_i[i2]; jj2 < S_ext_offd_i[i2+1]; jj2++)

1912:                  {

1913:                     i3 = S_ext_offd_j[jj2];

1914:                     if (S_marker_offd[i3] < jj_row_begin_offd)

1915:                     {

1916:                        S_marker_offd[i3] = jj_count_offd;

1917:                        C_temp_offd_data[jj_count_offd - jj_row_begin_offd] = 1;

1918:                        jj_count_offd++;

1919:                     }

1920:                     else

1921:                     {

1922:                        C_temp_offd_data[S_marker_offd[i3] - jj_row_begin_offd]++;

1923:                     }

1924:                  }

1925:              }

1926:

1927:              for (jj1 = jj_row_begin_diag; jj1 < jj_count_diag; jj1++)

1928:              {

1929:                  if (C_temp_diag_data[jj1 - jj_row_begin_diag] >= num_paths)

1930:                  {

1931:                     ++num_nonzeros_diag;

1932:                  }

1933:                  C_temp_diag_data[jj1 - jj_row_begin_diag] = 0;

1934:              }

1935:              for (jj1 = jj_row_begin_offd; jj1 < jj_count_offd; jj1++)

1936:              {

1937:                  if (C_temp_offd_data[jj1 - jj_row_begin_offd] >= num_paths)

1938:                  {

1939:                     ++num_nonzeros_offd;

1940:                  }

1941:                  C_temp_offd_data[jj1 - jj_row_begin_offd] = 0;

1942:              }

1943:          } /* for each row */

1944:       } /* num_paths > 1 */

1945:

1946:       hypre_prefix_sum_pair(

1947:          &num_nonzeros_diag, &C_diag_i[num_coarse],

1948:          &num_nonzeros_offd, &C_offd_i[num_coarse],

1949:          prefix_sum_workspace);

1950:

1951:       for (i1 = 0; i1 < num_coarse; i1++)

1952:       {

1953:          S_marker[i1] = -1;

1954:       }

1955:       for (i1 = 0; i1 < num_cols_offd_C; i1++)

1956:       {

1957:          S_marker_offd[i1] = -1;

1958:       }

1959:

1960: #ifdef HYPRE_USING_OPENMP

1961: #pragma omp barrier

1962: #pragma omp master

1963: #endif

1964:       {

1965:          if (C_diag_i[num_coarse])

1966:          {

1967:             C_diag_j = hypre_TAlloc(HYPRE_Int, C_diag_i[num_coarse]);

1968:          }

1969:          if (C_offd_i[num_coarse])

1970:          {

1971:             C_offd_j = hypre_TAlloc(HYPRE_Int, C_offd_i[num_coarse]);

[...]

1978:       for (ic = ic_begin; ic < ic_end - 1; ic++)

1979:       {

1980:          if (C_diag_i[ic+1] == C_diag_i[ic] && C_offd_i[ic+1] == C_offd_i[ic])

1981:             CF_marker[coarse_to_fine[ic]] = 2;

1982:

1983:          C_diag_i[ic] += num_nonzeros_diag;

1984:          C_offd_i[ic] += num_nonzeros_offd;

1985:       }

1986:       if (ic_begin < ic_end)

1987:       {

1988:          C_diag_i[ic] += num_nonzeros_diag;

1989:          C_offd_i[ic] += num_nonzeros_offd;

1990:

1991:          HYPRE_Int next_C_diag_i = prefix_sum_workspace[2*(my_thread_num + 1)];

1992:          HYPRE_Int next_C_offd_i = prefix_sum_workspace[2*(my_thread_num + 1) + 1];

1993:

1994:          if (next_C_diag_i == C_diag_i[ic] && next_C_offd_i == C_offd_i[ic])

1995:             CF_marker[coarse_to_fine[ic]] = 2;

1996:       }

1997:

1998:       if (num_paths == 1)

1999:       {

2000:          for (ic = ic_begin; ic < ic_end; ic++)

[...]

2006:              HYPRE_Int i1 = coarse_to_fine[ic];

2007:

2008:              HYPRE_Int jj_row_begin_diag = num_nonzeros_diag;

2009:              HYPRE_Int jj_row_begin_offd = num_nonzeros_offd;

2010:

2011:              for (jj1 = S_diag_i[i1]; jj1 < S_diag_i[i1+1]; jj1++)

2012:              {

2013:                  i2 = S_diag_j[jj1];

2014:                  if (CF_marker[i2] > 0)

2015:                  {

2016:                     index = fine_to_coarse[i2];

2017:                     if (S_marker[index] < jj_row_begin_diag)

2018:                     {

2019:                        S_marker[index] = num_nonzeros_diag;

2020:                        C_diag_j[num_nonzeros_diag] = index;

2021:                        num_nonzeros_diag++;

2022:                     }

2023:                  }

2024:                  for (jj2 = S_diag_i[i2]; jj2 < S_diag_i[i2+1]; jj2++)

2025:                  {

2026:                     i3 = S_diag_j[jj2];

2027:                     if (CF_marker[i3] > 0)

2028:                     {

2029:                        index = fine_to_coarse[i3];

2030:                        if (index != ic && S_marker[index] < jj_row_begin_diag)

2031:                        {

2032:                           S_marker[index] = num_nonzeros_diag;

2033:                           C_diag_j[num_nonzeros_diag] = index;

2034:                           num_nonzeros_diag++;

2035:                        }

2036:                     }

2037:                  }

2038:                  for (jj2 = S_offd_i[i2]; jj2 < S_offd_i[i2+1]; jj2++)

2039:                  {

2040:                     i3 = S_offd_j[jj2];

2041:                     if (CF_marker_offd[i3] > 0)

2042:                     {

2043:                        index = map_S_to_C[i3];

2044:                        if (S_marker_offd[index] < jj_row_begin_offd)

2045:                        {

2046:                           S_marker_offd[index] = num_nonzeros_offd;

2047:                           C_offd_j[num_nonzeros_offd] = index;

2048:                           num_nonzeros_offd++;

2049:                        }

2050:                     }

2051:                  }

2052:              }

2053:              for (jj1 = S_offd_i[i1]; jj1 < S_offd_i[i1+1]; jj1++)

2054:              {

2055:                  i2 = S_offd_j[jj1];

2056:                  if (CF_marker_offd[i2] > 0)

2057:                  {

2058:                     index = map_S_to_C[i2];

2059:                     if (S_marker_offd[index] < jj_row_begin_offd)

2060:                     {

2061:                        S_marker_offd[index] = num_nonzeros_offd;

2062:                        C_offd_j[num_nonzeros_offd] = index;

2063:                        num_nonzeros_offd++;

2064:                     }

2065:                  }

2066:                  for (jj2 = S_ext_diag_i[i2]; jj2 < S_ext_diag_i[i2+1]; jj2++)

2067:                  {

2068:                     i3 = S_ext_diag_j[jj2];

2069:                     if (i3 != ic && S_marker[i3] < jj_row_begin_diag)

2070:                     {

2071:                        S_marker[i3] = num_nonzeros_diag;

2072:                        C_diag_j[num_nonzeros_diag] = i3;

2073:                        num_nonzeros_diag++;

2074:                     }

2075:                  }

2076:                  for (jj2 = S_ext_offd_i[i2]; jj2 < S_ext_offd_i[i2+1]; jj2++)

2077:                  {

2078:                     i3 = S_ext_offd_j[jj2];

2079:                     if (S_marker_offd[i3] < jj_row_begin_offd)

2080:                     {

2081:                        S_marker_offd[i3] = num_nonzeros_offd;

2082:                        C_offd_j[num_nonzeros_offd] = i3;

2083:                        num_nonzeros_offd++;

[...]

2095:          for (ic = ic_begin; ic < ic_end; ic++)

[...]

2101:              HYPRE_Int i1 = coarse_to_fine[ic];

2102:

2103:              HYPRE_Int jj_row_begin_diag = jj_count_diag;

2104:              HYPRE_Int jj_row_begin_offd = jj_count_offd;

2105:

2106:              for (jj1 = S_diag_i[i1]; jj1 < S_diag_i[i1+1]; jj1++)

2107:              {

2108:                  i2 = S_diag_j[jj1];

2109:                  if (CF_marker[i2] > 0)

2110:                  {

2111:                     index = fine_to_coarse[i2];

2112:                     if (S_marker[index] < jj_row_begin_diag)

2113:                     {

2114:                        S_marker[index] = jj_count_diag;

2115:                        C_temp_diag_j[jj_count_diag - jj_row_begin_diag] = index;

2116:                        C_temp_diag_data[jj_count_diag - jj_row_begin_diag] = 2;

2117:                        jj_count_diag++;

2118:                     }

2119:                     else

2120:                     {

2121:                        C_temp_diag_data[S_marker[index] - jj_row_begin_diag] += 2;

2122:                     }

2123:                  }

2124:                  for (jj2 = S_diag_i[i2]; jj2 < S_diag_i[i2+1]; jj2++)

2125:                  {

2126:                     i3 = S_diag_j[jj2];

2127:                     if (CF_marker[i3] > 0 && fine_to_coarse[i3] != ic)

2128:                     {

2129:                        index = fine_to_coarse[i3];

2130:                        if (S_marker[index] < jj_row_begin_diag)

2131:                        {

2132:                           S_marker[index] = jj_count_diag;

2133:                           C_temp_diag_j[jj_count_diag - jj_row_begin_diag] = index;

2134:                           C_temp_diag_data[jj_count_diag - jj_row_begin_diag] = 1;

2135:                           jj_count_diag++;

2136:                        }

2137:                        else

2138:                        {

2139:                           C_temp_diag_data[S_marker[index] - jj_row_begin_diag]++;

2140:                        }

2141:                     }

2142:                  }

2143:                  for (jj2 = S_offd_i[i2]; jj2 < S_offd_i[i2+1]; jj2++)

2144:                  {

2145:                     i3 = S_offd_j[jj2];

2146:                     if (CF_marker_offd[i3] > 0)

2147:                     {

2148:                        index = map_S_to_C[i3];

2149:                        if (S_marker_offd[index] < jj_row_begin_offd)

2150:                        {

2151:                           S_marker_offd[index] = jj_count_offd;

2152:                           C_temp_offd_j[jj_count_offd - jj_row_begin_offd] = index;

2153:                           C_temp_offd_data[jj_count_offd - jj_row_begin_offd] = 1;

2154:                           jj_count_offd++;

2155:                        }

2156:                        else

2157:                        {

2158:                           C_temp_offd_data[S_marker_offd[index] - jj_row_begin_offd]++;

2159:                        }

2160:                     }

2161:                  }

2162:              }

2163:              for (jj1 = S_offd_i[i1]; jj1 < S_offd_i[i1+1]; jj1++)

2164:              {

2165:                  i2 = S_offd_j[jj1];

2166:                  if (CF_marker_offd[i2] > 0)

2167:                  {

2168:                     index = map_S_to_C[i2];

2169:                     if (S_marker_offd[index] < jj_row_begin_offd)

2170:                     {

2171:                        S_marker_offd[index] = jj_count_offd;

2172:                        C_temp_offd_j[jj_count_offd - jj_row_begin_offd] = index;

2173:                        C_temp_offd_data[jj_count_offd - jj_row_begin_offd] = 2;

2174:                        jj_count_offd++;

2175:                     }

2176:                     else

2177:                     {

2178:                        C_temp_offd_data[S_marker_offd[index] - jj_row_begin_offd] += 2;

2179:                     }

2180:                  }

2181:                  for (jj2 = S_ext_diag_i[i2]; jj2 < S_ext_diag_i[i2+1]; jj2++)

2182:                  {

2183:                     i3 = S_ext_diag_j[jj2];

2184:                     if (i3 != ic)

2185:                     {

2186:                        if (S_marker[i3] < jj_row_begin_diag)

2187:                        {

2188:                           S_marker[i3] = jj_count_diag;

2189:                           C_temp_diag_j[jj_count_diag - jj_row_begin_diag] = i3;

2190:                           C_temp_diag_data[jj_count_diag - jj_row_begin_diag] = 1;

2191:                           jj_count_diag++;

2192:                        }

2193:                        else

2194:                        {

2195:                           C_temp_diag_data[S_marker[i3] - jj_row_begin_diag]++;

2196:                        }

2197:                     }

2198:                  }

2199:                  for (jj2 = S_ext_offd_i[i2]; jj2 < S_ext_offd_i[i2+1]; jj2++)

2200:                  {

2201:                     i3 = S_ext_offd_j[jj2];

2202:                     if (S_marker_offd[i3] < jj_row_begin_offd)

2203:                     {

2204:                        S_marker_offd[i3] = jj_count_offd;

2205:                        C_temp_offd_j[jj_count_offd - jj_row_begin_offd] = i3;

2206:                        C_temp_offd_data[jj_count_offd - jj_row_begin_offd] = 1;

2207:                        jj_count_offd++;

2208:                     }

2209:                     else

2210:                     {

2211:                        C_temp_offd_data[S_marker_offd[i3] - jj_row_begin_offd]++;

2212:                     }

2213:                  }

2214:              }

2215:

2216:              for (jj1 = jj_row_begin_diag; jj1 < jj_count_diag; jj1++)

2217:              {

2218:                  if (C_temp_diag_data[jj1 - jj_row_begin_diag] >= num_paths)

2219:                  {

2220:                     C_diag_j[num_nonzeros_diag++] = C_temp_diag_j[jj1 - jj_row_begin_diag];

2221:                  }

2222:                  C_temp_diag_data[jj1 - jj_row_begin_diag] = 0;

2223:              }

2224:              for (jj1 = jj_row_begin_offd; jj1 < jj_count_offd; jj1++)

2225:              {

2226:                  if (C_temp_offd_data[jj1 - jj_row_begin_offd] >= num_paths)

2227:                  {

2228:                     C_offd_j[num_nonzeros_offd++] = C_temp_offd_j[jj1 - jj_row_begin_offd];

2229:                  }

2230:                  C_temp_offd_data[jj1 - jj_row_begin_offd] = 0;

0x500410 PUSH	%RBP

0x500411 MOV	%RSP,%RBP

0x500414 PUSH	%R15

0x500416 PUSH	%R14

0x500418 PUSH	%R13

0x50041a PUSH	%R12

0x50041c PUSH	%RBX

0x50041d SUB	$0xa8,%RSP

0x500424 MOV	%R9,-0xa0(%RBP)

0x50042b MOV	%R8,-0x40(%RBP)

0x50042f MOV	%RCX,%R15

0x500432 MOV	%RDX,-0x70(%RBP)

0x500436 MOV	%RDI,-0xa8(%RBP)

0x50043d MOV	0x88(%RBP),%RBX

0x500444 MOV	0x48(%RBP),%R14

0x500448 MOV	0x20(%RBP),%R12

0x50044c CALL	5ac1c0 <hypre_GetThreadNum>

0x500451 MOV	%RAX,%R13

0x500454 LEA	-0xc8(%RBP),%RDI

0x50045b LEA	-0xd0(%RBP),%RSI

0x500462 MOV	%R12,%RDX

0x500465 CALL	41d3a0 <@plt>

0x50046a MOV	%R15,%R10

0x50046d MOV	%R13,%R15

0x500470 MOV	(%RBX),%RCX

0x500473 MOV	%RCX,%RDX

0x500476 IMUL	%R15,%RDX

0x50047a MOV	(%R14),%RAX

0x50047d CMP	$0x1,%R10

0x500481 JLE	5004c0

0x500483 MOV	0xd0(%RBP),%RDI

0x50048a MOV	0xc8(%RBP),%R8

0x500491 MOV	0xc0(%RBP),%RSI

0x500498 MOV	0xb8(%RBP),%R9

0x50049f LEA	(%RSI,%RDX,8),%RSI

0x5004a3 MOV	%RSI,-0x78(%RBP)

0x5004a7 MOV	%RAX,%RSI

0x5004aa IMUL	%R15,%RSI

0x5004ae LEA	(%R9,%RSI,8),%R9

0x5004b2 MOV	%R9,-0x80(%RBP)

0x5004b6 LEA	(%RDI,%RDX,8),%R11

0x5004ba LEA	(%R8,%RSI,8),%RDI

0x5004be JMP	5004d8

0x5004c0 MOV	%RAX,%RSI

0x5004c3 IMUL	%R15,%RSI

0x5004c7 XOR	%EDI,%EDI

0x5004c9 MOV	%RDI,-0x78(%RBP)

0x5004cd XOR	%EDI,%EDI

0x5004cf MOV	%RDI,-0x80(%RBP)

0x5004d3 XOR	%R11D,%R11D

0x5004d6 XOR	%EDI,%EDI

0x5004d8 TEST	%RAX,%RAX

0x5004db MOV	0xb0(%RBP),%R8

0x5004e2 LEA	(%R8,%RSI,8),%R13

0x5004e6 CMOVE	%RAX,%R13

0x5004ea MOV	0xa8(%RBP),%RSI

0x5004f1 LEA	(%RSI,%RDX,8),%R14

0x5004f5 TEST	%RCX,%RCX

0x5004f8 CMOVE	%RCX,%R14

0x5004fc MOV	0x48(%RBP),%RDX

0x500500 JLE	500523

0x500502 XOR	%EAX,%EAX

0x500504 NOPW	%CS:(%RAX,%RAX,1)

(3302) 0x500510 MOVQ	$-0x1,(%R14,%RAX,8)

(3302) 0x500518 INC	%RAX

(3302) 0x50051b CMP	(%RBX),%RAX

(3302) 0x50051e JL	500510

0x500520 MOV	(%RDX),%RAX

0x500523 MOV	0x98(%RBP),%RCX

0x50052a TEST	%RAX,%RAX

0x50052d JLE	500551

0x50052f XOR	%EAX,%EAX

0x500531 NOPW	%CS:(%RAX,%RAX,1)

(3301) 0x500540 MOVQ	$-0x1,(%R13,%RAX,8)

(3301) 0x500549 INC	%RAX

(3301) 0x50054c CMP	(%RDX),%RAX

(3301) 0x50054f JL	500540

0x500551 MOV	%RDI,-0x58(%RBP)

0x500555 MOV	0x28(%RBP),%RDI

0x500559 MOVQ	$0,-0x30(%RBP)

0x500561 MOVQ	$0,-0x38(%RBP)

0x500569 MOV	(%RCX,%R15,8),%RBX

0x50056d MOV	%R15,-0xb0(%RBP)

0x500574 MOV	0x8(%RCX,%R15,8),%RAX

0x500579 CMP	$0x1,%R10

0x50057d MOV	%RBX,-0x68(%RBP)

0x500581 MOV	%R10,-0x60(%RBP)

0x500585 MOV	%R11,-0x50(%RBP)

0x500589 MOV	%RAX,-0x90(%RBP)

0x500590 JNE	500822

0x500596 CMP	%RAX,%RBX

0x500599 JGE	500e9b

0x50059f XOR	%ECX,%ECX

0x5005a1 MOV	%RBX,%RAX

0x5005a4 XOR	%EDX,%EDX

0x5005a6 JMP	5005ca

0x5005a8 NOPL	(%RAX,%RAX,1)

(3294) 0x5005b0 INC	%RAX

(3294) 0x5005b3 MOV	%R8,%RCX

(3294) 0x5005b6 MOV	%RSI,%RDX

(3294) 0x5005b9 CMP	-0x90(%RBP),%RAX

(3294) 0x5005c0 MOV	0x28(%RBP),%RDI

(3294) 0x5005c4 JE	500e9b

(3294) 0x5005ca MOV	0xa0(%RBP),%RSI

(3294) 0x5005d1 MOV	(%RSI,%RAX,8),%R11

(3294) 0x5005d5 MOV	%RCX,(%RDI,%RAX,8)

(3294) 0x5005d9 MOV	0x48(%RBP),%RSI

(3294) 0x5005dd CMPQ	$0,(%RSI)

(3294) 0x5005e1 JE	5005eb

(3294) 0x5005e3 MOV	0x38(%RBP),%RSI

(3294) 0x5005e7 MOV	%RDX,(%RSI,%RAX,8)

(3294) 0x5005eb MOV	-0x40(%RBP),%R10

(3294) 0x5005ef MOV	(%R10,%R11,8),%R9

(3294) 0x5005f3 MOV	%RDX,%RSI

(3294) 0x5005f6 MOV	%RCX,%R8

(3294) 0x5005f9 MOV	%R11,-0x48(%RBP)

(3294) 0x5005fd CMP	0x8(%R10,%R11,8),%R9

(3294) 0x500602 MOV	-0xa0(%RBP),%R12

(3294) 0x500609 JGE	500720

(3294) 0x50060f MOV	%RDX,%RSI

(3294) 0x500612 MOV	%RCX,%R8

(3294) 0x500615 JMP	50063a

0x500617 NOPW	(%RAX,%RAX,1)

  (3298) 0x500620 INC	%R9

  (3298) 0x500623 MOV	-0x40(%RBP),%R10

  (3298) 0x500627 MOV	-0x48(%RBP),%RDI

  (3298) 0x50062b CMP	0x8(%R10,%RDI,8),%R9

  (3298) 0x500630 MOV	-0x68(%RBP),%RBX

  (3298) 0x500634 JGE	500720

  (3298) 0x50063a MOV	(%R12,%R9,8),%R10

  (3298) 0x50063e MOV	-0x70(%RBP),%R11

  (3298) 0x500642 CMPQ	$0,(%R11,%R10,8)

  (3298) 0x500647 JLE	500662

  (3298) 0x500649 MOV	0x78(%RBP),%RDI

  (3298) 0x50064d MOV	(%RDI,%R10,8),%R11

  (3298) 0x500651 CMP	%RCX,(%R14,%R11,8)

  (3298) 0x500655 JGE	500662

  (3298) 0x500657 MOV	%R8,(%R14,%R11,8)

  (3298) 0x50065b INC	%R8

  (3298) 0x50065e MOV	%R8,-0x30(%RBP)

  (3298) 0x500662 MOV	-0x40(%RBP),%RBX

  (3298) 0x500666 MOV	(%RBX,%R10,8),%R11

  (3298) 0x50066a MOV	0x8(%RBX,%R10,8),%RBX

  (3298) 0x50066f JMP	500683

0x500671 NOPW	%CS:(%RAX,%RAX,1)

    (3300) 0x500680 INC	%R11

    (3300) 0x500683 CMP	%RBX,%R11

    (3300) 0x500686 JGE	5006c0

    (3300) 0x500688 MOV	(%R12,%R11,8),%R15

    (3300) 0x50068c MOV	-0x70(%RBP),%RDI

    (3300) 0x500690 CMPQ	$0,(%RDI,%R15,8)

    (3300) 0x500695 JLE	500680

    (3300) 0x500697 MOV	0x78(%RBP),%RDI

    (3300) 0x50069b MOV	(%RDI,%R15,8),%R15

    (3300) 0x50069f CMP	%RAX,%R15

    (3300) 0x5006a2 JE	500680

    (3300) 0x5006a4 CMP	%RCX,(%R14,%R15,8)

    (3300) 0x5006a8 JGE	500680

    (3300) 0x5006aa MOV	%R8,(%R14,%R15,8)

    (3300) 0x5006ae INC	%R8

    (3300) 0x5006b1 MOV	%R8,-0x30(%RBP)

    (3300) 0x5006b5 MOV	-0x40(%RBP),%RBX

    (3300) 0x5006b9 MOV	0x8(%RBX,%R10,8),%RBX

    (3300) 0x5006be JMP	500680

  (3298) 0x5006c0 MOV	0x10(%RBP),%RDI

  (3298) 0x5006c4 MOV	(%RDI,%R10,8),%R11

  (3298) 0x5006c8 MOV	0x8(%RDI,%R10,8),%RBX

  (3298) 0x5006cd JMP	5006d3

0x5006cf NOP

    (3299) 0x5006d0 INC	%R11

    (3299) 0x5006d3 CMP	%RBX,%R11

    (3299) 0x5006d6 JGE	500620

    (3299) 0x5006dc MOV	0x18(%RBP),%RDI

    (3299) 0x5006e0 MOV	(%RDI,%R11,8),%R15

    (3299) 0x5006e4 MOV	0x70(%RBP),%RDI

    (3299) 0x5006e8 CMPQ	$0,(%RDI,%R15,8)

    (3299) 0x5006ed JLE	5006d0

    (3299) 0x5006ef MOV	0x80(%RBP),%RDI

    (3299) 0x5006f6 MOV	(%RDI,%R15,8),%R15

    (3299) 0x5006fa CMP	%RDX,(%R13,%R15,8)

    (3299) 0x5006ff JGE	5006d0

    (3299) 0x500701 MOV	%RSI,(%R13,%R15,8)

    (3299) 0x500706 INC	%RSI

    (3299) 0x500709 MOV	%RSI,-0x38(%RBP)

    (3299) 0x50070d MOV	0x10(%RBP),%RDI

    (3299) 0x500711 MOV	0x8(%RDI,%R10,8),%RBX

    (3299) 0x500716 JMP	5006d0

0x500718 NOPL	(%RAX,%RAX,1)

(3294) 0x500720 MOV	0x10(%RBP),%RDI

(3294) 0x500724 MOV	-0x48(%RBP),%R12

(3294) 0x500728 MOV	(%RDI,%R12,8),%R9

(3294) 0x50072c CMP	0x8(%RDI,%R12,8),%R9

(3294) 0x500731 JL	500756

(3294) 0x500733 JMP	5005b0

0x500738 NOPL	(%RAX,%RAX,1)

  (3295) 0x500740 INC	%R9

  (3295) 0x500743 MOV	0x10(%RBP),%RDI

  (3295) 0x500747 CMP	0x8(%RDI,%R12,8),%R9

  (3295) 0x50074c MOV	-0x68(%RBP),%RBX

  (3295) 0x500750 JGE	5005b0

  (3295) 0x500756 MOV	0x18(%RBP),%RDI

  (3295) 0x50075a MOV	(%RDI,%R9,8),%R10

  (3295) 0x50075e MOV	0x70(%RBP),%RDI

  (3295) 0x500762 CMPQ	$0,(%RDI,%R10,8)

  (3295) 0x500767 JLE	500787

  (3295) 0x500769 MOV	0x80(%RBP),%RDI

  (3295) 0x500770 MOV	(%RDI,%R10,8),%R11

  (3295) 0x500774 CMP	%RDX,(%R13,%R11,8)

  (3295) 0x500779 JGE	500787

  (3295) 0x50077b MOV	%RSI,(%R13,%R11,8)

  (3295) 0x500780 INC	%RSI

  (3295) 0x500783 MOV	%RSI,-0x38(%RBP)

  (3295) 0x500787 MOV	0x50(%RBP),%RDI

  (3295) 0x50078b MOV	(%RDI,%R10,8),%R11

  (3295) 0x50078f MOV	0x8(%RDI,%R10,8),%RBX

  (3295) 0x500794 JMP	5007a3

0x500796 NOPW	%CS:(%RAX,%RAX,1)

    (3297) 0x5007a0 INC	%R11

    (3297) 0x5007a3 CMP	%RBX,%R11

    (3297) 0x5007a6 JGE	5007e0

    (3297) 0x5007a8 MOV	0x58(%RBP),%RDI

    (3297) 0x5007ac MOV	(%RDI,%R11,8),%R15

    (3297) 0x5007b0 CMP	%RAX,%R15

    (3297) 0x5007b3 JE	5007a0

    (3297) 0x5007b5 CMP	%RCX,(%R14,%R15,8)

    (3297) 0x5007b9 JGE	5007a0

    (3297) 0x5007bb MOV	%R8,(%R14,%R15,8)

    (3297) 0x5007bf INC	%R8

    (3297) 0x5007c2 MOV	%R8,-0x30(%RBP)

    (3297) 0x5007c6 MOV	0x50(%RBP),%RDI

    (3297) 0x5007ca MOV	0x8(%RDI,%R10,8),%RBX

    (3297) 0x5007cf JMP	5007a0

0x5007d1 NOPW	%CS:(%RAX,%RAX,1)

  (3295) 0x5007e0 MOV	0x60(%RBP),%RDI

  (3295) 0x5007e4 MOV	(%RDI,%R10,8),%R11

  (3295) 0x5007e8 MOV	0x8(%RDI,%R10,8),%RBX

  (3295) 0x5007ed JMP	5007f3

0x5007ef NOP

    (3296) 0x5007f0 INC	%R11

    (3296) 0x5007f3 CMP	%RBX,%R11

    (3296) 0x5007f6 JGE	500740

    (3296) 0x5007fc MOV	0x68(%RBP),%RDI

    (3296) 0x500800 MOV	(%RDI,%R11,8),%R15

    (3296) 0x500804 CMP	%RDX,(%R13,%R15,8)

    (3296) 0x500809 JGE	5007f0

    (3296) 0x50080b MOV	%RSI,(%R13,%R15,8)

    (3296) 0x500810 INC	%RSI

    (3296) 0x500813 MOV	%RSI,-0x38(%RBP)

    (3296) 0x500817 MOV	0x60(%RBP),%RDI

    (3296) 0x50081b MOV	0x8(%RDI,%R10,8),%RBX

    (3296) 0x500820 JMP	5007f0

0x500822 CMP	%RAX,%RBX

0x500825 JGE	500e9b

0x50082b LEA	0x38(%R11),%RAX

0x50082f MOV	%RAX,-0xc0(%RBP)

0x500836 MOV	-0x58(%RBP),%RAX

0x50083a ADD	$0x38,%RAX

0x50083e MOV	%RAX,-0xb8(%RBP)

0x500845 XOR	%R12D,%R12D

0x500848 MOV	%RBX,%R8

0x50084b XOR	%R15D,%R15D

0x50084e XOR	%ESI,%ESI

0x500850 XOR	%EAX,%EAX

0x500852 MOV	%RAX,-0x98(%RBP)

0x500859 JMP	500874

0x50085b NOPL	(%RAX,%RAX,1)

(3281) 0x500860 MOV	-0x68(%RBP),%RBX

(3281) 0x500864 INC	%R8

(3281) 0x500867 CMP	-0x90(%RBP),%R8

(3281) 0x50086e JE	500e9b

(3281) 0x500874 MOV	%R15,%RAX

(3281) 0x500877 MOV	%R12,%RBX

(3281) 0x50087a MOV	0xa0(%RBP),%RCX

(3281) 0x500881 MOV	(%RCX,%R8,8),%RCX

(3281) 0x500885 MOV	%RSI,-0x88(%RBP)

(3281) 0x50088c MOV	%RSI,(%RDI,%R8,8)

(3281) 0x500890 MOV	0x48(%RBP),%RDX

(3281) 0x500894 CMPQ	$0,(%RDX)

(3281) 0x500898 JE	5008a9

(3281) 0x50089a MOV	0x38(%RBP),%RDX

(3281) 0x50089e MOV	-0x98(%RBP),%RSI

(3281) 0x5008a5 MOV	%RSI,(%RDX,%R8,8)

(3281) 0x5008a9 MOV	-0x40(%RBP),%RSI

(3281) 0x5008ad MOV	(%RSI,%RCX,8),%RDX

(3281) 0x5008b1 MOV	%RAX,%R15

(3281) 0x5008b4 MOV	%RBX,%R12

(3281) 0x5008b7 CMP	0x8(%RSI,%RCX,8),%RDX

(3281) 0x5008bc MOV	%R8,-0x48(%RBP)

(3281) 0x5008c0 JGE	500a10

(3281) 0x5008c6 MOV	%RBX,%R12

(3281) 0x5008c9 MOV	%RAX,%R15

(3281) 0x5008cc JMP	5008e2

0x5008ce XCHG	%AX,%AX

  (3291) 0x5008d0 INC	%RDX

  (3291) 0x5008d3 MOV	-0x40(%RBP),%RSI

  (3291) 0x5008d7 CMP	0x8(%RSI,%RCX,8),%RDX

  (3291) 0x5008dc JGE	500a10

  (3291) 0x5008e2 MOV	-0xa0(%RBP),%RSI

  (3291) 0x5008e9 MOV	(%RSI,%RDX,8),%RSI

  (3291) 0x5008ed MOV	-0x70(%RBP),%RDI

  (3291) 0x5008f1 CMPQ	$0,(%RDI,%RSI,8)

  (3291) 0x5008f6 JLE	500925

  (3291) 0x5008f8 MOV	0x78(%RBP),%RDI

  (3291) 0x5008fc MOV	(%RDI,%RSI,8),%RDI

  (3291) 0x500900 MOV	(%R14,%RDI,8),%R8

  (3291) 0x500904 SUB	%RAX,%R8

  (3291) 0x500907 JGE	500920

  (3291) 0x500909 MOV	%R15,(%R14,%RDI,8)

  (3291) 0x50090d MOV	%R15,%RDI

  (3291) 0x500910 SUB	%RAX,%RDI

  (3291) 0x500913 MOVQ	$0x2,(%R11,%RDI,8)

  (3291) 0x50091b INC	%R15

  (3291) 0x50091e JMP	500925

  (3291) 0x500920 ADDQ	$0x2,(%R11,%R8,8)

  (3291) 0x500925 MOV	-0x40(%RBP),%R8

  (3291) 0x500929 MOV	(%R8,%RSI,8),%RDI

  (3291) 0x50092d JMP	500947

    (3293) 0x50092f INCQ	(%R11,%R9,8)

    (3293) 0x500933 NOPW	%CS:(%RAX,%RAX,1)

    (3293) 0x500940 INC	%RDI

    (3293) 0x500943 MOV	-0x40(%RBP),%R8

    (3293) 0x500947 CMP	0x8(%R8,%RSI,8),%RDI

    (3293) 0x50094c JGE	5009a0

    (3293) 0x50094e MOV	-0xa0(%RBP),%R8

    (3293) 0x500955 MOV	(%R8,%RDI,8),%R8

    (3293) 0x500959 MOV	-0x70(%RBP),%R9

    (3293) 0x50095d CMPQ	$0,(%R9,%R8,8)

    (3293) 0x500962 JLE	500940

    (3293) 0x500964 MOV	0x78(%RBP),%R9

    (3293) 0x500968 MOV	(%R9,%R8,8),%R8

    (3293) 0x50096c CMP	-0x48(%RBP),%R8

    (3293) 0x500970 JE	500940

    (3293) 0x500972 MOV	(%R14,%R8,8),%R9

    (3293) 0x500976 SUB	%RAX,%R9

    (3293) 0x500979 JGE	50092f

    (3293) 0x50097b MOV	%R15,(%R14,%R8,8)

    (3293) 0x50097f MOV	%R15,%R8

    (3293) 0x500982 SUB	%RAX,%R8

    (3293) 0x500985 MOVQ	$0x1,(%R11,%R8,8)

    (3293) 0x50098d INC	%R15

    (3293) 0x500990 JMP	500940

0x500992 NOPW	%CS:(%RAX,%RAX,1)

  (3291) 0x5009a0 MOV	0x10(%RBP),%R8

  (3291) 0x5009a4 MOV	(%R8,%RSI,8),%RDI

  (3291) 0x5009a8 JMP	5009bf

0x5009aa NOPW	(%RAX,%RAX,1)

    (3292) 0x5009b0 MOV	-0x58(%RBP),%R8

    (3292) 0x5009b4 INCQ	(%R8,%R9,8)

    (3292) 0x5009b8 INC	%RDI

    (3292) 0x5009bb MOV	0x10(%RBP),%R8

    (3292) 0x5009bf CMP	0x8(%R8,%RSI,8),%RDI

    (3292) 0x5009c4 JGE	5008d0

    (3292) 0x5009ca MOV	0x18(%RBP),%R8

    (3292) 0x5009ce MOV	(%R8,%RDI,8),%R8

    (3292) 0x5009d2 MOV	0x70(%RBP),%R9

    (3292) 0x5009d6 CMPQ	$0,(%R9,%R8,8)

    (3292) 0x5009db JLE	5009b8

    (3292) 0x5009dd MOV	0x80(%RBP),%R9

    (3292) 0x5009e4 MOV	(%R9,%R8,8),%R8

    (3292) 0x5009e8 MOV	(%R13,%R8,8),%R9

    (3292) 0x5009ed SUB	%RBX,%R9

    (3292) 0x5009f0 JGE	5009b0

    (3292) 0x5009f2 MOV	%R12,(%R13,%R8,8)

    (3292) 0x5009f7 MOV	%R12,%R8

    (3292) 0x5009fa SUB	%RBX,%R8

    (3292) 0x5009fd MOV	-0x58(%RBP),%R9

    (3292) 0x500a01 MOVQ	$0x1,(%R9,%R8,8)

    (3292) 0x500a09 INC	%R12

    (3292) 0x500a0c JMP	5009b8

0x500a0e XCHG	%AX,%AX

(3281) 0x500a10 MOV	0x10(%RBP),%RSI

(3281) 0x500a14 MOV	(%RSI,%RCX,8),%RDX

(3281) 0x500a18 JMP	500a27

0x500a1a NOPW	(%RAX,%RAX,1)

  (3288) 0x500a20 INC	%RDX

  (3288) 0x500a23 MOV	0x10(%RBP),%RSI

  (3288) 0x500a27 CMP	0x8(%RSI,%RCX,8),%RDX

  (3288) 0x500a2c JGE	500b60

  (3288) 0x500a32 MOV	0x18(%RBP),%RSI

  (3288) 0x500a36 MOV	(%RSI,%RDX,8),%RSI

  (3288) 0x500a3a MOV	0x70(%RBP),%RDI

  (3288) 0x500a3e CMPQ	$0,(%RDI,%RSI,8)

  (3288) 0x500a43 JLE	500a80

  (3288) 0x500a45 MOV	0x80(%RBP),%RDI

  (3288) 0x500a4c MOV	(%RDI,%RSI,8),%RDI

  (3288) 0x500a50 MOV	(%R13,%RDI,8),%R8

  (3288) 0x500a55 SUB	%RBX,%R8

  (3288) 0x500a58 MOV	-0x48(%RBP),%R9

  (3288) 0x500a5c JGE	500a90

  (3288) 0x500a5e MOV	%R12,(%R13,%RDI,8)

  (3288) 0x500a63 MOV	%R12,%RDI

  (3288) 0x500a66 SUB	%RBX,%RDI

  (3288) 0x500a69 MOV	-0x58(%RBP),%R8

  (3288) 0x500a6d MOVQ	$0x2,(%R8,%RDI,8)

  (3288) 0x500a75 INC	%R12

  (3288) 0x500a78 JMP	500a99

0x500a7a NOPW	(%RAX,%RAX,1)

  (3288) 0x500a80 MOV	-0x48(%RBP),%R9

  (3288) 0x500a84 JMP	500a99

0x500a86 NOPW	%CS:(%RAX,%RAX,1)

  (3288) 0x500a90 MOV	-0x58(%RBP),%RDI

  (3288) 0x500a94 ADDQ	$0x2,(%RDI,%R8,8)

  (3288) 0x500a99 MOV	0x50(%RBP),%R8

  (3288) 0x500a9d MOV	(%R8,%RSI,8),%RDI

  (3288) 0x500aa1 JMP	500abf

0x500aa3 NOPW	%CS:(%RAX,%RAX,1)

    (3290) 0x500ab0 INCQ	(%R11,%R9,8)

    (3290) 0x500ab4 MOV	-0x48(%RBP),%R9

    (3290) 0x500ab8 INC	%RDI

    (3290) 0x500abb MOV	0x50(%RBP),%R8

    (3290) 0x500abf CMP	0x8(%R8,%RSI,8),%RDI

    (3290) 0x500ac4 JGE	500b00

    (3290) 0x500ac6 MOV	0x58(%RBP),%R8

    (3290) 0x500aca MOV	(%R8,%RDI,8),%R8

    (3290) 0x500ace CMP	%R9,%R8

    (3290) 0x500ad1 JE	500ab8

    (3290) 0x500ad3 MOV	(%R14,%R8,8),%R9

    (3290) 0x500ad7 SUB	%RAX,%R9

    (3290) 0x500ada JGE	500ab0

    (3290) 0x500adc MOV	%R15,(%R14,%R8,8)

    (3290) 0x500ae0 MOV	%R15,%R8

    (3290) 0x500ae3 SUB	%RAX,%R8

    (3290) 0x500ae6 MOVQ	$0x1,(%R11,%R8,8)

    (3290) 0x500aee INC	%R15

    (3290) 0x500af1 JMP	500ab4

0x500af3 NOPW	%CS:(%RAX,%RAX,1)

  (3288) 0x500b00 MOV	0x60(%RBP),%R8

  (3288) 0x500b04 MOV	(%R8,%RSI,8),%RDI

  (3288) 0x500b08 JMP	500b1f

0x500b0a NOPW	(%RAX,%RAX,1)

    (3289) 0x500b10 MOV	-0x58(%RBP),%R8

    (3289) 0x500b14 INCQ	(%R8,%R9,8)

    (3289) 0x500b18 INC	%RDI

    (3289) 0x500b1b MOV	0x60(%RBP),%R8

    (3289) 0x500b1f CMP	0x8(%R8,%RSI,8),%RDI

    (3289) 0x500b24 JGE	500a20

    (3289) 0x500b2a MOV	0x68(%RBP),%R8

    (3289) 0x500b2e MOV	(%R8,%RDI,8),%R8

    (3289) 0x500b32 MOV	(%R13,%R8,8),%R9

    (3289) 0x500b37 SUB	%RBX,%R9

    (3289) 0x500b3a JGE	500b10

    (3289) 0x500b3c MOV	%R12,(%R13,%R8,8)

    (3289) 0x500b41 MOV	%R12,%R8

    (3289) 0x500b44 SUB	%RBX,%R8

    (3289) 0x500b47 MOV	-0x58(%RBP),%R9

    (3289) 0x500b4b MOVQ	$0x1,(%R9,%R8,8)

    (3289) 0x500b53 INC	%R12

    (3289) 0x500b56 JMP	500b18

0x500b58 NOPL	(%RAX,%RAX,1)

(3281) 0x500b60 MOV	%R15,%RDX

(3281) 0x500b63 SUB	%RAX,%RDX

(3281) 0x500b66 JLE	500c50

(3281) 0x500b6c CMP	$0xd,%RDX

(3281) 0x500b70 MOV	0x28(%RBP),%RDI

(3281) 0x500b74 MOV	-0x48(%RBP),%R8

(3281) 0x500b78 MOV	-0x88(%RBP),%RSI

(3281) 0x500b7f JB	500c70

(3281) 0x500b85 MOV	%RDX,%RAX

(3281) 0x500b88 SHR	$0x3,%RAX

(3281) 0x500b8c MOV	-0xc0(%RBP),%RCX

(3281) 0x500b93 JMP	500bad

0x500b95 NOPW	%CS:(%RAX,%RAX,1)

  (3287) 0x500ba0 ADD	$0x40,%RCX

  (3287) 0x500ba4 DEC	%RAX

  (3287) 0x500ba7 JE	500ca0

  (3287) 0x500bad CMP	%R10,-0x38(%RCX)

  (3287) 0x500bb1 JGE	500be0

  (3287) 0x500bb3 CMP	%R10,-0x30(%RCX)

  (3287) 0x500bb7 JGE	500bed

  (3287) 0x500bb9 CMP	%R10,-0x28(%RCX)

  (3287) 0x500bbd JGE	500bfa

  (3287) 0x500bbf CMP	%R10,-0x20(%RCX)

  (3287) 0x500bc3 JGE	500c07

  (3287) 0x500bc5 CMP	%R10,-0x18(%RCX)

  (3287) 0x500bc9 JGE	500c14

  (3287) 0x500bcb CMP	%R10,-0x10(%RCX)

  (3287) 0x500bcf JGE	500c21

  (3287) 0x500bd1 CMP	%R10,-0x8(%RCX)

  (3287) 0x500bd5 JGE	500c2e

  (3287) 0x500bd7 CMP	%R10,(%RCX)

  (3287) 0x500bda JL	500ba0

  (3287) 0x500bdc JMP	500c3e

0x500bde XCHG	%AX,%AX

  (3287) 0x500be0 INC	%RSI

  (3287) 0x500be3 MOV	%RSI,-0x30(%RBP)

  (3287) 0x500be7 CMP	%R10,-0x30(%RCX)

  (3287) 0x500beb JL	500bb9

  (3287) 0x500bed INC	%RSI

  (3287) 0x500bf0 MOV	%RSI,-0x30(%RBP)

  (3287) 0x500bf4 CMP	%R10,-0x28(%RCX)

  (3287) 0x500bf8 JL	500bbf

  (3287) 0x500bfa INC	%RSI

  (3287) 0x500bfd MOV	%RSI,-0x30(%RBP)

  (3287) 0x500c01 CMP	%R10,-0x20(%RCX)

  (3287) 0x500c05 JL	500bc5

  (3287) 0x500c07 INC	%RSI

  (3287) 0x500c0a MOV	%RSI,-0x30(%RBP)

  (3287) 0x500c0e CMP	%R10,-0x18(%RCX)

  (3287) 0x500c12 JL	500bcb

  (3287) 0x500c14 INC	%RSI

  (3287) 0x500c17 MOV	%RSI,-0x30(%RBP)

  (3287) 0x500c1b CMP	%R10,-0x10(%RCX)

  (3287) 0x500c1f JL	500bd1

  (3287) 0x500c21 INC	%RSI

  (3287) 0x500c24 MOV	%RSI,-0x30(%RBP)

  (3287) 0x500c28 CMP	%R10,-0x8(%RCX)

  (3287) 0x500c2c JL	500bd7

  (3287) 0x500c2e INC	%RSI

  (3287) 0x500c31 MOV	%RSI,-0x30(%RBP)

  (3287) 0x500c35 CMP	%R10,(%RCX)

  (3287) 0x500c38 JL	500ba0

  (3287) 0x500c3e INC	%RSI

  (3287) 0x500c41 MOV	%RSI,-0x30(%RBP)

  (3287) 0x500c45 JMP	500ba0

0x500c4a NOPW	(%RAX,%RAX,1)

(3281) 0x500c50 MOV	0x28(%RBP),%RDI

(3281) 0x500c54 MOV	-0x48(%RBP),%R8

(3281) 0x500c58 MOV	-0x88(%RBP),%RSI

(3281) 0x500c5f JMP	500cdc

0x500c61 NOPW	%CS:(%RAX,%RAX,1)

(3281) 0x500c70 XOR	%EAX,%EAX

(3281) 0x500c72 JMP	500c90

0x500c74 NOPW	%CS:(%RAX,%RAX,1)

  (3285) 0x500c80 MOVQ	$0,(%R11,%RAX,8)

  (3285) 0x500c88 INC	%RAX

  (3285) 0x500c8b CMP	%RAX,%RDX

  (3285) 0x500c8e JE	500cdc

  (3285) 0x500c90 CMP	%R10,(%R11,%RAX,8)

  (3285) 0x500c94 JL	500c80

  (3285) 0x500c96 INC	%RSI

  (3285) 0x500c99 MOV	%RSI,-0x30(%RBP)

  (3285) 0x500c9d JMP	500c80

0x500c9f NOP

(3281) 0x500ca0 MOV	%RDX,%RAX

(3281) 0x500ca3 AND	$-0x8,%RAX

(3281) 0x500ca7 CMP	%RDX,%RAX

(3281) 0x500caa JB	500dcc

(3281) 0x500cb0 MOV	%RSI,-0x88(%RBP)

(3281) 0x500cb7 SAL	$0x3,%RDX

(3281) 0x500cbb MOV	%R11,%RDI

(3281) 0x500cbe XOR	%ESI,%ESI

(3281) 0x500cc0 CALL	5b5350 <_intel_fast_memset>

(3281) 0x500cc5 MOV	-0x88(%RBP),%RSI

(3281) 0x500ccc MOV	-0x50(%RBP),%R11

(3281) 0x500cd0 MOV	-0x60(%RBP),%R10

(3281) 0x500cd4 MOV	0x28(%RBP),%RDI

(3281) 0x500cd8 MOV	-0x48(%RBP),%R8

(3281) 0x500cdc MOV	%R12,%RDX

(3281) 0x500cdf SUB	%RBX,%RDX

(3281) 0x500ce2 JLE	500860

(3281) 0x500ce8 CMP	$0xd,%RDX

(3281) 0x500cec MOV	-0x68(%RBP),%RBX

(3281) 0x500cf0 JB	500de0

(3281) 0x500cf6 MOV	%RDX,%RAX

(3281) 0x500cf9 SHR	$0x3,%RAX

(3281) 0x500cfd MOV	-0xb8(%RBP),%RCX

(3281) 0x500d04 MOV	-0x98(%RBP),%RDI

(3281) 0x500d0b JMP	500d1d

0x500d0d NOPL	(%RAX)

  (3284) 0x500d10 ADD	$0x40,%RCX

  (3284) 0x500d14 DEC	%RAX

  (3284) 0x500d17 JE	500e30

  (3284) 0x500d1d CMP	%R10,-0x38(%RCX)

  (3284) 0x500d21 JGE	500d50

  (3284) 0x500d23 CMP	%R10,-0x30(%RCX)

  (3284) 0x500d27 JGE	500d5d

  (3284) 0x500d29 CMP	%R10,-0x28(%RCX)

  (3284) 0x500d2d JGE	500d6a

  (3284) 0x500d2f CMP	%R10,-0x20(%RCX)

  (3284) 0x500d33 JGE	500d77

  (3284) 0x500d35 CMP	%R10,-0x18(%RCX)

  (3284) 0x500d39 JGE	500d84

  (3284) 0x500d3b CMP	%R10,-0x10(%RCX)

  (3284) 0x500d3f JGE	500d91

  (3284) 0x500d41 CMP	%R10,-0x8(%RCX)

  (3284) 0x500d45 JGE	500d9e

  (3284) 0x500d47 CMP	%R10,(%RCX)

  (3284) 0x500d4a JL	500d10

  (3284) 0x500d4c JMP	500dae

0x500d4e XCHG	%AX,%AX

  (3284) 0x500d50 INC	%RDI

  (3284) 0x500d53 MOV	%RDI,-0x38(%RBP)

  (3284) 0x500d57 CMP	%R10,-0x30(%RCX)

  (3284) 0x500d5b JL	500d29

  (3284) 0x500d5d INC	%RDI

  (3284) 0x500d60 MOV	%RDI,-0x38(%RBP)

  (3284) 0x500d64 CMP	%R10,-0x28(%RCX)

  (3284) 0x500d68 JL	500d2f

  (3284) 0x500d6a INC	%RDI

  (3284) 0x500d6d MOV	%RDI,-0x38(%RBP)

  (3284) 0x500d71 CMP	%R10,-0x20(%RCX)

  (3284) 0x500d75 JL	500d35

  (3284) 0x500d77 INC	%RDI

  (3284) 0x500d7a MOV	%RDI,-0x38(%RBP)

  (3284) 0x500d7e CMP	%R10,-0x18(%RCX)

  (3284) 0x500d82 JL	500d3b

  (3284) 0x500d84 INC	%RDI

  (3284) 0x500d87 MOV	%RDI,-0x38(%RBP)

  (3284) 0x500d8b CMP	%R10,-0x10(%RCX)

  (3284) 0x500d8f JL	500d41

  (3284) 0x500d91 INC	%RDI

  (3284) 0x500d94 MOV	%RDI,-0x38(%RBP)

  (3284) 0x500d98 CMP	%R10,-0x8(%RCX)

  (3284) 0x500d9c JL	500d47

  (3284) 0x500d9e INC	%RDI

  (3284) 0x500da1 MOV	%RDI,-0x38(%RBP)

  (3284) 0x500da5 CMP	%R10,(%RCX)

  (3284) 0x500da8 JL	500d10

  (3284) 0x500dae INC	%RDI

  (3284) 0x500db1 MOV	%RDI,-0x38(%RBP)

  (3284) 0x500db5 JMP	500d10

0x500dba NOPW	(%RAX,%RAX,1)

  (3286) 0x500dc0 INC	%RAX

  (3286) 0x500dc3 CMP	%RAX,%RDX

  (3286) 0x500dc6 JE	500cb0

  (3286) 0x500dcc CMP	%R10,(%R11,%RAX,8)

  (3286) 0x500dd0 JL	500dc0

  (3286) 0x500dd2 INC	%RSI

  (3286) 0x500dd5 MOV	%RSI,-0x30(%RBP)

  (3286) 0x500dd9 JMP	500dc0

0x500ddb NOPL	(%RAX,%RAX,1)

(3281) 0x500de0 XOR	%EAX,%EAX

(3281) 0x500de2 MOV	-0x58(%RBP),%RCX

(3281) 0x500de6 JMP	500e08

0x500de8 NOPL	(%RAX,%RAX,1)

  (3282) 0x500df0 MOV	-0x58(%RBP),%RCX

  (3282) 0x500df4 MOVQ	$0,(%RCX,%RAX,8)

  (3282) 0x500dfc INC	%RAX

  (3282) 0x500dff CMP	%RAX,%RDX

  (3282) 0x500e02 JE	500864

  (3282) 0x500e08 CMP	%R10,(%RCX,%RAX,8)

  (3282) 0x500e0c JL	500df0

  (3282) 0x500e0e MOV	-0x98(%RBP),%R9

  (3282) 0x500e15 INC	%R9

  (3282) 0x500e18 MOV	%R9,%RCX

  (3282) 0x500e1b MOV	%R9,-0x98(%RBP)

  (3282) 0x500e22 MOV	%R9,-0x38(%RBP)

  (3282) 0x500e26 JMP	500df0

0x500e28 NOPL	(%RAX,%RAX,1)

(3281) 0x500e30 MOV	%RDX,%RAX

(3281) 0x500e33 AND	$-0x8,%RAX

(3281) 0x500e37 CMP	%RDX,%RAX

(3281) 0x500e3a MOV	%RSI,-0x88(%RBP)

(3281) 0x500e41 JB	500e88

(3281) 0x500e43 MOV	%RDI,-0x98(%RBP)

(3281) 0x500e4a SAL	$0x3,%RDX

(3281) 0x500e4e MOV	-0x58(%RBP),%RDI

(3281) 0x500e52 XOR	%ESI,%ESI

(3281) 0x500e54 CALL	5b5350 <_intel_fast_memset>

(3281) 0x500e59 MOV	-0x60(%RBP),%R10

(3281) 0x500e5d MOV	-0x50(%RBP),%R11

(3281) 0x500e61 MOV	0x28(%RBP),%RDI

(3281) 0x500e65 MOV	-0x48(%RBP),%R8

(3281) 0x500e69 MOV	-0x88(%RBP),%RSI

(3281) 0x500e70 JMP	500864

0x500e75 NOPW	%CS:(%RAX,%RAX,1)

  (3283) 0x500e80 INC	%RAX

  (3283) 0x500e83 CMP	%RAX,%RDX

  (3283) 0x500e86 JE	500e43

  (3283) 0x500e88 MOV	-0x58(%RBP),%RCX

  (3283) 0x500e8c CMP	%R10,(%RCX,%RAX,8)

  (3283) 0x500e90 JL	500e80

  (3283) 0x500e92 INC	%RDI

  (3283) 0x500e95 MOV	%RDI,-0x38(%RBP)

  (3283) 0x500e99 JMP	500e80

0x500e9b MOV	0x88(%RBP),%R15

0x500ea2 MOV	(%R15),%RAX

0x500ea5 LEA	(%RDI,%RAX,8),%RSI

0x500ea9 MOV	0x38(%RBP),%RCX

0x500ead LEA	(%RCX,%RAX,8),%RCX

0x500eb1 LEA	-0x30(%RBP),%RDI

0x500eb5 LEA	-0x38(%RBP),%RDX

0x500eb9 MOV	0x90(%RBP),%R8

0x500ec0 CALL	41e240 <@plt>

0x500ec5 CMPQ	$0,(%R15)

0x500ec9 JLE	500ee0

0x500ecb XOR	%EAX,%EAX

0x500ecd NOPL	(%RAX)

(3280) 0x500ed0 MOVQ	$-0x1,(%R14,%RAX,8)

(3280) 0x500ed8 INC	%RAX

(3280) 0x500edb CMP	(%R15),%RAX

(3280) 0x500ede JL	500ed0

0x500ee0 MOV	0x48(%RBP),%RCX

0x500ee4 CMPQ	$0,(%RCX)

0x500ee8 MOV	-0x58(%RBP),%R12

0x500eec MOV	-0xa8(%RBP),%R15

0x500ef3 JLE	500f11

0x500ef5 XOR	%EAX,%EAX

0x500ef7 NOPW	(%RAX,%RAX,1)

(3279) 0x500f00 MOVQ	$-0x1,(%R13,%RAX,8)

(3279) 0x500f09 INC	%RAX

(3279) 0x500f0c CMP	(%RCX),%RAX

(3279) 0x500f0f JL	500f00

0x500f11 MOV	(%R15),%ESI

0x500f14 MOV	$0x609a50,%EDI

0x500f19 CALL	41de50 <__kmpc_barrier@plt>

0x500f1e MOV	(%R15),%ESI

0x500f21 MOV	$0x609a70,%EDI

0x500f26 XOR	%EDX,%EDX

0x500f28 CALL	41e210 <__kmpc_masked@plt>

0x500f2d CMP	$0x1,%EAX

0x500f30 MOV	%R15,%RAX

0x500f33 MOV	-0xa0(%RBP),%R15

0x500f3a JNE	500fa4

0x500f3c MOV	0x88(%RBP),%RAX

0x500f43 MOV	(%RAX),%RAX

0x500f46 MOV	0x28(%RBP),%RCX

0x500f4a MOV	(%RCX,%RAX,8),%RDI

0x500f4e TEST	%RDI,%RDI

0x500f51 JE	500f6d

0x500f53 SAL	$0x3,%RDI

0x500f57 CALL	5a8800 <hypre_MAlloc>

0x500f5c MOV	0x30(%RBP),%RCX

0x500f60 MOV	%RAX,(%RCX)

0x500f63 MOV	0x88(%RBP),%RAX

0x500f6a MOV	(%RAX),%RAX

0x500f6d MOV	0x38(%RBP),%RCX

0x500f71 MOV	(%RCX,%RAX,8),%RDI

0x500f75 TEST	%RDI,%RDI

0x500f78 JE	500f8a

0x500f7a SAL	$0x3,%RDI

0x500f7e CALL	5a8800 <hypre_MAlloc>

0x500f83 MOV	0x40(%RBP),%RCX

0x500f87 MOV	%RAX,(%RCX)

0x500f8a MOV	-0xa8(%RBP),%RAX

0x500f91 MOV	(%RAX),%ESI

0x500f93 MOV	$0x609a90,%EDI

0x500f98 CALL	41dda0 <__kmpc_end_masked@plt>

0x500f9d MOV	-0xa8(%RBP),%RAX

0x500fa4 MOV	(%RAX),%ESI

0x500fa6 MOV	$0x609ab0,%EDI

0x500fab CALL	41de50 <__kmpc_barrier@plt>

0x500fb0 MOV	-0x90(%RBP),%RAX

0x500fb7 DEC	%RAX

0x500fba MOV	%RBX,%RDX

0x500fbd CMP	%RAX,%RBX

0x500fc0 MOV	0x90(%RBP),%RCX

0x500fc7 MOV	0x28(%RBP),%R11

0x500fcb JGE	501042

0x500fcd MOV	-0x30(%RBP),%RCX

0x500fd1 MOV	-0x38(%RBP),%RDX

0x500fd5 MOV	%RBX,%RSI

0x500fd8 JMP	500ffb

0x500fda NOPW	(%RAX,%RAX,1)

(3278) 0x500fe0 ADD	%RCX,%RDI

(3278) 0x500fe3 MOV	%RDI,(%R11,%RSI,8)

(3278) 0x500fe7 MOV	0x38(%RBP),%RDI

(3278) 0x500feb ADD	%RDX,(%RDI,%RSI,8)

(3278) 0x500fef LEA	0x1(%RSI),%RDI

(3278) 0x500ff3 MOV	%RDI,%RSI

(3278) 0x500ff6 CMP	%RDI,%RAX

(3278) 0x500ff9 JE	501038

(3278) 0x500ffb MOV	(%R11,%RSI,8),%RDI

(3278) 0x500fff MOV	0x8(%R11,%RSI,8),%R8

(3278) 0x501004 CMP	%RDI,%R8

(3278) 0x501007 JNE	500fe0

(3278) 0x501009 MOV	0x38(%RBP),%R10

(3278) 0x50100d MOV	0x8(%R10,%RSI,8),%R9

(3278) 0x501012 MOV	%R8,%RDI

(3278) 0x501015 CMP	(%R10,%RSI,8),%R9

(3278) 0x501019 JNE	500fe0

(3278) 0x50101b MOV	0xa0(%RBP),%RDI

(3278) 0x501022 MOV	(%RDI,%RSI,8),%RDI

(3278) 0x501026 MOV	-0x70(%RBP),%R8

(3278) 0x50102a MOVQ	$0x2,(%R8,%RDI,8)

(3278) 0x501032 MOV	(%R11,%RSI,8),%RDI

(3278) 0x501036 JMP	500fe0

0x501038 MOV	%RAX,%RDX

0x50103b MOV	0x90(%RBP),%RCX

0x501042 CMP	-0x90(%RBP),%RBX

0x501049 JGE	5019bb

0x50104f MOV	-0x30(%RBP),%RAX

0x501053 ADD	%RAX,(%R11,%RDX,8)

0x501057 MOV	%RCX,%R9

0x50105a MOV	-0x38(%RBP),%RCX

0x50105e MOV	0x38(%RBP),%RDI

0x501062 MOV	(%RDI,%RDX,8),%RSI

0x501066 ADD	%RCX,%RSI

0x501069 MOV	%RSI,(%RDI,%RDX,8)

0x50106d MOV	-0xb0(%RBP),%R8

0x501074 SAL	$0x4,%R8

0x501078 MOV	0x10(%R8,%R9,1),%RDI

0x50107d CMP	(%R11,%RDX,8),%RDI

0x501081 JNE	5010a1

0x501083 CMP	%RSI,0x18(%R8,%R9,1)

0x501088 JNE	5010a1

0x50108a MOV	0xa0(%RBP),%RSI

0x501091 MOV	(%RSI,%RDX,8),%RDX

0x501095 MOV	-0x70(%RBP),%RSI

0x501099 MOVQ	$0x2,(%RSI,%RDX,8)

0x5010a1 CMPQ	$0x1,-0x60(%RBP)

0x5010a6 JE	5010d0

0x5010a8 MOV	%R14,-0x48(%RBP)

0x5010ac JMP	501330

0x5010b1 NOPW	%CS:(%RAX,%RAX,1)

(3260) 0x5010c0 INC	%RBX

(3260) 0x5010c3 CMP	-0x90(%RBP),%RBX

(3260) 0x5010ca JE	5019bb

(3260) 0x5010d0 MOV	0xa0(%RBP),%RAX

(3260) 0x5010d7 MOV	(%RAX,%RBX,8),%RAX

(3260) 0x5010db MOV	-0x30(%RBP),%RCX

(3260) 0x5010df MOV	-0x38(%RBP),%RDX

(3260) 0x5010e3 MOV	-0x40(%RBP),%RDI

(3260) 0x5010e7 MOV	(%RDI,%RAX,8),%RSI

(3260) 0x5010eb CMP	0x8(%RDI,%RAX,8),%RSI

(3260) 0x5010f0 MOV	0x40(%RBP),%R12

(3260) 0x5010f4 JL	50111e

(3260) 0x5010f6 MOV	0x10(%RBP),%RDI

(3260) 0x5010fa MOV	(%RDI,%RAX,8),%RSI

(3260) 0x5010fe JMP	501237

0x501103 NOPW	%CS:(%RAX,%RAX,1)

  (3264) 0x501110 INC	%RSI

  (3264) 0x501113 MOV	-0x40(%RBP),%RDI

  (3264) 0x501117 CMP	0x8(%RDI,%RAX,8),%RSI

  (3264) 0x50111c JGE	5010f6

  (3264) 0x50111e MOV	(%R15,%RSI,8),%RDI

  (3264) 0x501122 MOV	-0x70(%RBP),%R8

  (3264) 0x501126 CMPQ	$0,(%R8,%RDI,8)

  (3264) 0x50112b JLE	501152

  (3264) 0x50112d MOV	0x78(%RBP),%R8

  (3264) 0x501131 MOV	(%R8,%RDI,8),%R8

  (3264) 0x501135 CMP	%RCX,(%R14,%R8,8)

  (3264) 0x501139 JGE	501152

  (3264) 0x50113b MOV	-0x30(%RBP),%R9

  (3264) 0x50113f MOV	%R9,(%R14,%R8,8)

  (3264) 0x501143 MOV	0x30(%RBP),%R10

  (3264) 0x501147 MOV	(%R10),%R10

  (3264) 0x50114a MOV	%R8,(%R10,%R9,8)

  (3264) 0x50114e INCQ	-0x30(%RBP)

  (3264) 0x501152 MOV	-0x40(%RBP),%R9

  (3264) 0x501156 MOV	(%R9,%RDI,8),%R8

  (3264) 0x50115a MOV	0x8(%R9,%RDI,8),%R9

  (3264) 0x50115f JMP	501173

0x501161 NOPW	%CS:(%RAX,%RAX,1)

    (3266) 0x501170 INC	%R8

    (3266) 0x501173 CMP	%R9,%R8

    (3266) 0x501176 JGE	5011c0

    (3266) 0x501178 MOV	(%R15,%R8,8),%R10

    (3266) 0x50117c MOV	-0x70(%RBP),%R11

    (3266) 0x501180 CMPQ	$0,(%R11,%R10,8)

    (3266) 0x501185 JLE	501170

    (3266) 0x501187 MOV	0x78(%RBP),%R11

    (3266) 0x50118b MOV	(%R11,%R10,8),%R10

    (3266) 0x50118f CMP	%RBX,%R10

    (3266) 0x501192 JE	501170

    (3266) 0x501194 CMP	%RCX,(%R14,%R10,8)

    (3266) 0x501198 JGE	501170

    (3266) 0x50119a MOV	-0x30(%RBP),%R9

    (3266) 0x50119e MOV	%R9,(%R14,%R10,8)

    (3266) 0x5011a2 MOV	0x30(%RBP),%R11

    (3266) 0x5011a6 MOV	(%R11),%R11

    (3266) 0x5011a9 MOV	%R10,(%R11,%R9,8)

    (3266) 0x5011ad INCQ	-0x30(%RBP)

    (3266) 0x5011b1 MOV	-0x40(%RBP),%R9

    (3266) 0x5011b5 MOV	0x8(%R9,%RDI,8),%R9

    (3266) 0x5011ba JMP	501170

0x5011bc NOPL	(%RAX)

  (3264) 0x5011c0 MOV	0x10(%RBP),%R9

  (3264) 0x5011c4 MOV	(%R9,%RDI,8),%R8

  (3264) 0x5011c8 MOV	0x8(%R9,%RDI,8),%R9

  (3264) 0x5011cd JMP	5011d3

0x5011cf NOP

    (3265) 0x5011d0 INC	%R8

    (3265) 0x5011d3 CMP	%R9,%R8

    (3265) 0x5011d6 JGE	501110

    (3265) 0x5011dc MOV	0x18(%RBP),%R10

    (3265) 0x5011e0 MOV	(%R10,%R8,8),%R10

    (3265) 0x5011e4 MOV	0x70(%RBP),%R11

    (3265) 0x5011e8 CMPQ	$0,(%R11,%R10,8)

    (3265) 0x5011ed JLE	5011d0

    (3265) 0x5011ef MOV	0x80(%RBP),%R11

    (3265) 0x5011f6 MOV	(%R11,%R10,8),%R10

    (3265) 0x5011fa CMP	%RDX,(%R13,%R10,8)

    (3265) 0x5011ff JGE	5011d0

    (3265) 0x501201 MOV	-0x38(%RBP),%R9

    (3265) 0x501205 MOV	%R9,(%R13,%R10,8)

    (3265) 0x50120a MOV	(%R12),%R11

    (3265) 0x50120e MOV	%R10,(%R11,%R9,8)

    (3265) 0x501212 INCQ	-0x38(%RBP)

    (3265) 0x501216 MOV	0x10(%RBP),%R9

    (3265) 0x50121a MOV	0x8(%R9,%RDI,8),%R9

    (3265) 0x50121f JMP	5011d0

0x501221 NOPW	%CS:(%RAX,%RAX,1)

  (3261) 0x501230 INC	%RSI

  (3261) 0x501233 MOV	0x10(%RBP),%RDI

  (3261) 0x501237 CMP	0x8(%RDI,%RAX,8),%RSI

  (3261) 0x50123c JGE	5010c0

  (3261) 0x501242 MOV	0x18(%RBP),%RDI

  (3261) 0x501246 MOV	(%RDI,%RSI,8),%RDI

  (3261) 0x50124a MOV	0x70(%RBP),%R8

  (3261) 0x50124e CMPQ	$0,(%R8,%RDI,8)

  (3261) 0x501253 JLE	50127c

  (3261) 0x501255 MOV	0x80(%RBP),%R8

  (3261) 0x50125c MOV	(%R8,%RDI,8),%R8

  (3261) 0x501260 CMP	%RDX,(%R13,%R8,8)

  (3261) 0x501265 JGE	50127c

  (3261) 0x501267 MOV	-0x38(%RBP),%R9

  (3261) 0x50126b MOV	%R9,(%R13,%R8,8)

  (3261) 0x501270 MOV	(%R12),%R10

  (3261) 0x501274 MOV	%R8,(%R10,%R9,8)

  (3261) 0x501278 INCQ	-0x38(%RBP)

  (3261) 0x50127c MOV	0x50(%RBP),%R9

  (3261) 0x501280 MOV	(%R9,%RDI,8),%R8

  (3261) 0x501284 MOV	0x8(%R9,%RDI,8),%R9

  (3261) 0x501289 JMP	501293

0x50128b NOPL	(%RAX,%RAX,1)

    (3263) 0x501290 INC	%R8

    (3263) 0x501293 CMP	%R9,%R8

    (3263) 0x501296 JGE	5012d0

    (3263) 0x501298 MOV	0x58(%RBP),%R10

    (3263) 0x50129c MOV	(%R10,%R8,8),%R10

    (3263) 0x5012a0 CMP	%RBX,%R10

    (3263) 0x5012a3 JE	501290

    (3263) 0x5012a5 CMP	%RCX,(%R14,%R10,8)

    (3263) 0x5012a9 JGE	501290

    (3263) 0x5012ab MOV	-0x30(%RBP),%R9

    (3263) 0x5012af MOV	%R9,(%R14,%R10,8)

    (3263) 0x5012b3 MOV	0x30(%RBP),%R11

    (3263) 0x5012b7 MOV	(%R11),%R11

    (3263) 0x5012ba MOV	%R10,(%R11,%R9,8)

    (3263) 0x5012be INCQ	-0x30(%RBP)

    (3263) 0x5012c2 MOV	0x50(%RBP),%R9

    (3263) 0x5012c6 MOV	0x8(%R9,%RDI,8),%R9

    (3263) 0x5012cb JMP	501290

0x5012cd NOPL	(%RAX)

  (3261) 0x5012d0 MOV	0x60(%RBP),%R9

  (3261) 0x5012d4 MOV	(%R9,%RDI,8),%R8

  (3261) 0x5012d8 MOV	0x8(%R9,%RDI,8),%R9

  (3261) 0x5012dd JMP	5012e3

0x5012df NOP

    (3262) 0x5012e0 INC	%R8

    (3262) 0x5012e3 CMP	%R9,%R8

    (3262) 0x5012e6 JGE	501230

    (3262) 0x5012ec MOV	0x68(%RBP),%R10

    (3262) 0x5012f0 MOV	(%R10,%R8,8),%R10

    (3262) 0x5012f4 CMP	%RDX,(%R13,%R10,8)

    (3262) 0x5012f9 JGE	5012e0

    (3262) 0x5012fb MOV	-0x38(%RBP),%R9

    (3262) 0x5012ff MOV	%R9,(%R13,%R10,8)

    (3262) 0x501304 MOV	(%R12),%R11

    (3262) 0x501308 MOV	%R10,(%R11,%R9,8)

    (3262) 0x50130c INCQ	-0x38(%RBP)

    (3262) 0x501310 MOV	0x60(%RBP),%R9

    (3262) 0x501314 MOV	0x8(%R9,%RDI,8),%R9

    (3262) 0x501319 JMP	5012e0

0x50131b NOPL	(%RAX,%RAX,1)

(3267) 0x501320 INC	%RBX

(3267) 0x501323 CMP	-0x90(%RBP),%RBX

(3267) 0x50132a JE	5019bb

(3267) 0x501330 MOV	%RAX,%RSI

(3267) 0x501333 MOV	%RCX,%RDX

(3267) 0x501336 MOV	0xa0(%RBP),%RDI

(3267) 0x50133d MOV	(%RDI,%RBX,8),%RDI

(3267) 0x501341 MOV	-0x40(%RBP),%R9

(3267) 0x501345 MOV	(%R9,%RDI,8),%R8

(3267) 0x501349 MOV	%RDI,-0x68(%RBP)

(3267) 0x50134d CMP	0x8(%R9,%RDI,8),%R8

(3267) 0x501352 MOV	%RBX,%RDI

(3267) 0x501355 JGE	5014d0

(3267) 0x50135b MOV	%RDX,%RCX

(3267) 0x50135e MOV	%RSI,%RAX

(3267) 0x501361 JMP	501386

0x501363 NOPW	%CS:(%RAX,%RAX,1)

  (3275) 0x501370 INC	%R8

  (3275) 0x501373 MOV	-0x40(%RBP),%R9

  (3275) 0x501377 MOV	-0x68(%RBP),%R10

  (3275) 0x50137b CMP	0x8(%R9,%R10,8),%R8

  (3275) 0x501380 JGE	5014d0

  (3275) 0x501386 MOV	(%R15,%R8,8),%R9

  (3275) 0x50138a MOV	-0x70(%RBP),%R10

  (3275) 0x50138e CMPQ	$0,(%R10,%R9,8)

  (3275) 0x501393 JLE	5013d9

  (3275) 0x501395 MOV	0x78(%RBP),%R10

  (3275) 0x501399 MOV	(%R10,%R9,8),%R10

  (3275) 0x50139d MOV	(%R14,%R10,8),%R11

  (3275) 0x5013a1 SUB	%RSI,%R11

  (3275) 0x5013a4 JGE	5013d0

  (3275) 0x5013a6 MOV	%RAX,(%R14,%R10,8)

  (3275) 0x5013aa MOV	%RAX,%R11

  (3275) 0x5013ad SUB	%RSI,%R11

  (3275) 0x5013b0 MOV	-0x78(%RBP),%RBX

  (3275) 0x5013b4 MOV	%R10,(%RBX,%R11,8)

  (3275) 0x5013b8 MOV	-0x50(%RBP),%R10

  (3275) 0x5013bc MOVQ	$0x2,(%R10,%R11,8)

  (3275) 0x5013c4 INC	%RAX

  (3275) 0x5013c7 JMP	5013d9

0x5013c9 NOPL	(%RAX)

  (3275) 0x5013d0 MOV	-0x50(%RBP),%R10

  (3275) 0x5013d4 ADDQ	$0x2,(%R10,%R11,8)

  (3275) 0x5013d9 MOV	-0x40(%RBP),%R11

  (3275) 0x5013dd MOV	(%R11,%R9,8),%R10

  (3275) 0x5013e1 JMP	5013f7

    (3277) 0x5013e3 MOV	-0x50(%RBP),%R11

    (3277) 0x5013e7 INCQ	(%R11,%RBX,8)

    (3277) 0x5013eb NOPL	(%RAX,%RAX,1)

    (3277) 0x5013f0 INC	%R10

    (3277) 0x5013f3 MOV	-0x40(%RBP),%R11

    (3277) 0x5013f7 CMP	0x8(%R11,%R9,8),%R10

    (3277) 0x5013fc JGE	501450

    (3277) 0x5013fe MOV	(%R15,%R10,8),%R11

    (3277) 0x501402 MOV	-0x70(%RBP),%RBX

    (3277) 0x501406 CMPQ	$0,(%RBX,%R11,8)

    (3277) 0x50140b JLE	5013f0

    (3277) 0x50140d MOV	0x78(%RBP),%RBX

    (3277) 0x501411 MOV	(%RBX,%R11,8),%R11

    (3277) 0x501415 MOV	%RDI,%RBX

    (3277) 0x501418 CMP	%RDI,%R11

    (3277) 0x50141b JE	5013f0

    (3277) 0x50141d MOV	(%R14,%R11,8),%RBX

    (3277) 0x501421 SUB	%RSI,%RBX

    (3277) 0x501424 JGE	5013e3

    (3277) 0x501426 MOV	%RAX,(%R14,%R11,8)

    (3277) 0x50142a MOV	%RAX,%RBX

    (3277) 0x50142d SUB	%RSI,%RBX

    (3277) 0x501430 MOV	-0x78(%RBP),%R14

    (3277) 0x501434 MOV	%R11,(%R14,%RBX,8)

    (3277) 0x501438 MOV	-0x48(%RBP),%R14

    (3277) 0x50143c MOV	-0x50(%RBP),%R11

    (3277) 0x501440 MOVQ	$0x1,(%R11,%RBX,8)

    (3277) 0x501448 INC	%RAX

    (3277) 0x50144b JMP	5013f0

0x50144d NOPL	(%RAX)

  (3275) 0x501450 MOV	0x10(%RBP),%R11

  (3275) 0x501454 MOV	(%R11,%R9,8),%R10

  (3275) 0x501458 JMP	50146b

0x50145a NOPW	(%RAX,%RAX,1)

    (3276) 0x501460 INCQ	(%R12,%RBX,8)

    (3276) 0x501464 INC	%R10

    (3276) 0x501467 MOV	0x10(%RBP),%R11

    (3276) 0x50146b CMP	0x8(%R11,%R9,8),%R10

    (3276) 0x501470 JGE	501370

    (3276) 0x501476 MOV	0x18(%RBP),%R11

    (3276) 0x50147a MOV	(%R11,%R10,8),%R11

    (3276) 0x50147e MOV	0x70(%RBP),%RBX

    (3276) 0x501482 CMPQ	$0,(%RBX,%R11,8)

    (3276) 0x501487 JLE	501464

    (3276) 0x501489 MOV	0x80(%RBP),%RBX

    (3276) 0x501490 MOV	(%RBX,%R11,8),%R11

    (3276) 0x501494 MOV	(%R13,%R11,8),%RBX

    (3276) 0x501499 SUB	%RDX,%RBX

    (3276) 0x50149c JGE	501460

    (3276) 0x50149e MOV	%RCX,(%R13,%R11,8)

    (3276) 0x5014a3 MOV	%RCX,%RBX

    (3276) 0x5014a6 SUB	%RDX,%RBX

    (3276) 0x5014a9 MOV	-0x80(%RBP),%R12

    (3276) 0x5014ad MOV	%R11,(%R12,%RBX,8)

    (3276) 0x5014b1 MOV	-0x58(%RBP),%R12

    (3276) 0x5014b5 MOVQ	$0x1,(%R12,%RBX,8)

    (3276) 0x5014bd INC	%RCX

    (3276) 0x5014c0 JMP	501464

0x5014c2 NOPW	%CS:(%RAX,%RAX,1)

(3267) 0x5014d0 MOV	0x10(%RBP),%R9

(3267) 0x5014d4 MOV	-0x68(%RBP),%R10

(3267) 0x5014d8 MOV	(%R9,%R10,8),%R8

(3267) 0x5014dc JMP	5014eb

0x5014de XCHG	%AX,%AX

  (3272) 0x5014e0 INC	%R8

  (3272) 0x5014e3 MOV	0x10(%RBP),%R9

  (3272) 0x5014e7 MOV	-0x68(%RBP),%R10

  (3272) 0x5014eb CMP	0x8(%R9,%R10,8),%R8

  (3272) 0x5014f0 JGE	501620

  (3272) 0x5014f6 MOV	0x18(%RBP),%R9

  (3272) 0x5014fa MOV	(%R9,%R8,8),%R9

  (3272) 0x5014fe MOV	0x70(%RBP),%R10

  (3272) 0x501502 CMPQ	$0,(%R10,%R9,8)

  (3272) 0x501507 JLE	501545

  (3272) 0x501509 MOV	0x80(%RBP),%R10

  (3272) 0x501510 MOV	(%R10,%R9,8),%R10

  (3272) 0x501514 MOV	(%R13,%R10,8),%R11

  (3272) 0x501519 SUB	%RDX,%R11

  (3272) 0x50151c JGE	501540

  (3272) 0x50151e MOV	%RCX,(%R13,%R10,8)

  (3272) 0x501523 MOV	%RCX,%R11

  (3272) 0x501526 SUB	%RDX,%R11

  (3272) 0x501529 MOV	-0x80(%RBP),%RBX

  (3272) 0x50152d MOV	%R10,(%RBX,%R11,8)

  (3272) 0x501531 MOVQ	$0x2,(%R12,%R11,8)

  (3272) 0x501539 INC	%RCX

  (3272) 0x50153c JMP	501545

0x50153e XCHG	%AX,%AX

  (3272) 0x501540 ADDQ	$0x2,(%R12,%R11,8)

  (3272) 0x501545 MOV	%RDI,%RBX

  (3272) 0x501548 MOV	0x50(%RBP),%R11

  (3272) 0x50154c MOV	(%R11,%R9,8),%R10

  (3272) 0x501550 JMP	501572

0x501552 NOPW	%CS:(%RAX,%RAX,1)

    (3274) 0x501560 MOV	-0x50(%RBP),%R11

    (3274) 0x501564 INCQ	(%R11,%RBX,8)

    (3274) 0x501568 MOV	%RDI,%RBX

    (3274) 0x50156b INC	%R10

    (3274) 0x50156e MOV	0x50(%RBP),%R11

    (3274) 0x501572 CMP	0x8(%R11,%R9,8),%R10

    (3274) 0x501577 JGE	5015c0

    (3274) 0x501579 MOV	0x58(%RBP),%R11

    (3274) 0x50157d MOV	(%R11,%R10,8),%R11

    (3274) 0x501581 CMP	%RBX,%R11

    (3274) 0x501584 JE	50156b

    (3274) 0x501586 MOV	(%R14,%R11,8),%RBX

    (3274) 0x50158a SUB	%RSI,%RBX

    (3274) 0x50158d JGE	501560

    (3274) 0x50158f MOV	%RAX,(%R14,%R11,8)

    (3274) 0x501593 MOV	%RAX,%RBX

    (3274) 0x501596 SUB	%RSI,%RBX

    (3274) 0x501599 MOV	-0x78(%RBP),%R14

    (3274) 0x50159d MOV	%R11,(%R14,%RBX,8)

    (3274) 0x5015a1 MOV	-0x48(%RBP),%R14

    (3274) 0x5015a5 MOV	-0x50(%RBP),%R11

    (3274) 0x5015a9 MOVQ	$0x1,(%R11,%RBX,8)

    (3274) 0x5015b1 INC	%RAX

    (3274) 0x5015b4 JMP	501568

0x5015b6 NOPW	%CS:(%RAX,%RAX,1)

  (3272) 0x5015c0 MOV	0x60(%RBP),%R11

  (3272) 0x5015c4 MOV	(%R11,%R9,8),%R10

  (3272) 0x5015c8 JMP	5015db

0x5015ca NOPW	(%RAX,%RAX,1)

    (3273) 0x5015d0 INCQ	(%R12,%RBX,8)

    (3273) 0x5015d4 INC	%R10

    (3273) 0x5015d7 MOV	0x60(%RBP),%R11

    (3273) 0x5015db CMP	0x8(%R11,%R9,8),%R10

    (3273) 0x5015e0 JGE	5014e0

    (3273) 0x5015e6 MOV	0x68(%RBP),%R11

    (3273) 0x5015ea MOV	(%R11,%R10,8),%R11

    (3273) 0x5015ee MOV	(%R13,%R11,8),%RBX

    (3273) 0x5015f3 SUB	%RDX,%RBX

    (3273) 0x5015f6 JGE	5015d0

    (3273) 0x5015f8 MOV	%RCX,(%R13,%R11,8)

    (3273) 0x5015fd MOV	%RCX,%RBX

    (3273) 0x501600 SUB	%RDX,%RBX

    (3273) 0x501603 MOV	-0x80(%RBP),%R12

    (3273) 0x501607 MOV	%R11,(%R12,%RBX,8)

    (3273) 0x50160b MOV	-0x58(%RBP),%R12

    (3273) 0x50160f MOVQ	$0x1,(%R12,%RBX,8)

    (3273) 0x501617 INC	%RCX

    (3273) 0x50161a JMP	5015d4

0x50161c NOPL	(%RAX)

(3267) 0x501620 MOV	%RAX,%R8

(3267) 0x501623 SUB	%RSI,%R8

(3267) 0x501626 MOV	%RDI,%RBX

(3267) 0x501629 MOV	-0x60(%RBP),%R11

(3267) 0x50162d MOV	-0x50(%RBP),%R9

(3267) 0x501631 JLE	501651

(3267) 0x501633 MOV	%R8,-0x68(%RBP)

(3267) 0x501637 CMP	$0x4,%R8

(3267) 0x50163b JAE	501710

(3267) 0x501641 MOV	-0x68(%RBP),%RDI

(3267) 0x501645 MOV	%RDI,%RSI

(3267) 0x501648 AND	$-0x4,%RSI

(3267) 0x50164c CMP	%RDI,%RSI

(3267) 0x50164f JB	501694

(3267) 0x501651 MOV	%RCX,%RSI

(3267) 0x501654 SUB	%RDX,%RSI

(3267) 0x501657 JLE	501320

(3267) 0x50165d CMP	$0x4,%RSI

(3267) 0x501661 JAE	501880

(3267) 0x501667 MOV	%RSI,%RDX

(3267) 0x50166a AND	$-0x4,%RDX

(3267) 0x50166e CMP	%RSI,%RDX

(3267) 0x501671 JB	5016e4

(3267) 0x501673 JMP	501320

0x501678 NOPL	(%RAX,%RAX,1)

  (3270) 0x501680 MOV	-0x50(%RBP),%R9

  (3270) 0x501684 MOVQ	$0,(%R9,%RSI,8)

  (3270) 0x50168c INC	%RSI

  (3270) 0x50168f CMP	%RSI,%RDI

  (3270) 0x501692 JE	501651

  (3270) 0x501694 CMP	%R11,(%R9,%RSI,8)

  (3270) 0x501698 JL	501680

  (3270) 0x50169a MOV	-0x78(%RBP),%RDI

  (3270) 0x50169e MOV	(%RDI,%RSI,8),%R8

  (3270) 0x5016a2 MOV	0x30(%RBP),%RDI

  (3270) 0x5016a6 MOV	(%RDI),%R9

  (3270) 0x5016a9 MOV	-0x30(%RBP),%R10

  (3270) 0x5016ad LEA	0x1(%R10),%R11

  (3270) 0x5016b1 MOV	%R11,-0x30(%RBP)

  (3270) 0x5016b5 MOV	-0x60(%RBP),%R11

  (3270) 0x5016b9 MOV	%R8,(%R9,%R10,8)

  (3270) 0x5016bd MOV	-0x68(%RBP),%RDI

  (3270) 0x5016c1 JMP	501680

0x5016c3 NOPW	%CS:(%RAX,%RAX,1)

  (3268) 0x5016d0 MOVQ	$0,(%R12,%RDX,8)

  (3268) 0x5016d8 INC	%RDX

  (3268) 0x5016db CMP	%RDX,%RSI

  (3268) 0x5016de JE	501320

  (3268) 0x5016e4 CMP	%R11,(%R12,%RDX,8)

  (3268) 0x5016e8 JL	5016d0

  (3268) 0x5016ea MOV	-0x80(%RBP),%RDI

  (3268) 0x5016ee MOV	(%RDI,%RDX,8),%RDI

  (3268) 0x5016f2 MOV	0x40(%RBP),%R8

  (3268) 0x5016f6 MOV	(%R8),%R8

  (3268) 0x5016f9 MOV	-0x38(%RBP),%R9

  (3268) 0x5016fd LEA	0x1(%R9),%R10

  (3268) 0x501701 MOV	%R10,-0x38(%RBP)

  (3268) 0x501705 MOV	%RDI,(%R8,%R9,8)

  (3268) 0x501709 JMP	5016d0

0x50170b NOPL	(%RAX,%RAX,1)

(3267) 0x501710 MOV	-0x68(%RBP),%RSI

(3267) 0x501714 SHR	$0x2,%RSI

(3267) 0x501718 MOV	$0x18,%R8D

(3267) 0x50171e JMP	501739

  (3271) 0x501720 MOV	-0x50(%RBP),%R9

  (3271) 0x501724 MOVQ	$0,(%R9,%R8,1)

  (3271) 0x50172c ADD	$0x20,%R8

  (3271) 0x501730 DEC	%RSI

  (3271) 0x501733 JE	501641

  (3271) 0x501739 CMP	%R11,-0x18(%R9,%R8,1)

  (3271) 0x50173e JGE	501790

  (3271) 0x501740 MOV	-0x50(%RBP),%R9

  (3271) 0x501744 MOVQ	$0,-0x18(%R9,%R8,1)

  (3271) 0x50174d CMP	%R11,-0x10(%R9,%R8,1)

  (3271) 0x501752 JGE	5017cb

  (3271) 0x501754 MOV	-0x50(%RBP),%R9

  (3271) 0x501758 MOVQ	$0,-0x10(%R9,%R8,1)

  (3271) 0x501761 CMP	%R11,-0x8(%R9,%R8,1)

  (3271) 0x501766 JGE	50180a

  (3271) 0x50176c MOV	-0x50(%RBP),%R9

  (3271) 0x501770 MOVQ	$0,-0x8(%R9,%R8,1)

  (3271) 0x501779 CMP	%R11,(%R9,%R8,1)

  (3271) 0x50177d JL	501720

  (3271) 0x50177f JMP	501848

0x501784 NOPW	%CS:(%RAX,%RAX,1)

  (3271) 0x501790 MOV	-0x78(%RBP),%R9

  (3271) 0x501794 MOV	-0x18(%R9,%R8,1),%R9

  (3271) 0x501799 MOV	0x30(%RBP),%R10

  (3271) 0x50179d MOV	(%R10),%R10

  (3271) 0x5017a0 MOV	-0x30(%RBP),%R11

  (3271) 0x5017a4 LEA	0x1(%R11),%RBX

  (3271) 0x5017a8 MOV	%RBX,-0x30(%RBP)

  (3271) 0x5017ac MOV	%RDI,%RBX

  (3271) 0x5017af MOV	%R9,(%R10,%R11,8)

  (3271) 0x5017b3 MOV	-0x60(%RBP),%R11

  (3271) 0x5017b7 MOV	-0x50(%RBP),%R9

  (3271) 0x5017bb MOVQ	$0,-0x18(%R9,%R8,1)

  (3271) 0x5017c4 CMP	%R11,-0x10(%R9,%R8,1)

  (3271) 0x5017c9 JL	501754

  (3271) 0x5017cb MOV	-0x78(%RBP),%R9

  (3271) 0x5017cf MOV	-0x10(%R9,%R8,1),%R9

  (3271) 0x5017d4 MOV	0x30(%RBP),%R10

  (3271) 0x5017d8 MOV	(%R10),%R10

  (3271) 0x5017db MOV	-0x30(%RBP),%R11

  (3271) 0x5017df LEA	0x1(%R11),%RBX

  (3271) 0x5017e3 MOV	%RBX,-0x30(%RBP)

  (3271) 0x5017e7 MOV	%RDI,%RBX

  (3271) 0x5017ea MOV	%R9,(%R10,%R11,8)

  (3271) 0x5017ee MOV	-0x60(%RBP),%R11

  (3271) 0x5017f2 MOV	-0x50(%RBP),%R9

  (3271) 0x5017f6 MOVQ	$0,-0x10(%R9,%R8,1)

  (3271) 0x5017ff CMP	%R11,-0x8(%R9,%R8,1)

  (3271) 0x501804 JL	50176c

  (3271) 0x50180a MOV	-0x78(%RBP),%R9

  (3271) 0x50180e MOV	-0x8(%R9,%R8,1),%R9

  (3271) 0x501813 MOV	0x30(%RBP),%R10

  (3271) 0x501817 MOV	(%R10),%R10

  (3271) 0x50181a MOV	-0x30(%RBP),%R11

  (3271) 0x50181e LEA	0x1(%R11),%RBX

  (3271) 0x501822 MOV	%RBX,-0x30(%RBP)

  (3271) 0x501826 MOV	%RDI,%RBX

  (3271) 0x501829 MOV	%R9,(%R10,%R11,8)

  (3271) 0x50182d MOV	-0x60(%RBP),%R11

  (3271) 0x501831 MOV	-0x50(%RBP),%R9

  (3271) 0x501835 MOVQ	$0,-0x8(%R9,%R8,1)

  (3271) 0x50183e CMP	%R11,(%R9,%R8,1)

  (3271) 0x501842 JL	501720

  (3271) 0x501848 MOV	-0x78(%RBP),%R9

  (3271) 0x50184c MOV	(%R9,%R8,1),%R9

  (3271) 0x501850 MOV	0x30(%RBP),%R10

  (3271) 0x501854 MOV	(%R10),%R10

  (3271) 0x501857 MOV	-0x30(%RBP),%R11

  (3271) 0x50185b LEA	0x1(%R11),%RBX

  (3271) 0x50185f MOV	%RBX,-0x30(%RBP)

  (3271) 0x501863 MOV	%RDI,%RBX

  (3271) 0x501866 MOV	%R9,(%R10,%R11,8)

  (3271) 0x50186a MOV	-0x60(%RBP),%R11

  (3271) 0x50186e JMP	501720

0x501873 NOPW	%CS:(%RAX,%RAX,1)

(3267) 0x501880 MOV	%RSI,%RDX

(3267) 0x501883 SHR	$0x2,%RDX

(3267) 0x501887 MOV	$0x18,%EDI

(3267) 0x50188c JMP	5018a5

0x50188e XCHG	%AX,%AX

  (3269) 0x501890 MOVQ	$0,(%R12,%RDI,1)

  (3269) 0x501898 ADD	$0x20,%RDI

  (3269) 0x50189c DEC	%RDX

  (3269) 0x50189f JE	501667

  (3269) 0x5018a5 CMP	%R11,-0x18(%R12,%RDI,1)

  (3269) 0x5018aa JGE	5018f0

  (3269) 0x5018ac MOVQ	$0,-0x18(%R12,%RDI,1)

  (3269) 0x5018b5 CMP	%R11,-0x10(%R12,%RDI,1)

  (3269) 0x5018ba JGE	501924

  (3269) 0x5018bc MOVQ	$0,-0x10(%R12,%RDI,1)

  (3269) 0x5018c5 CMP	%R11,-0x8(%R12,%RDI,1)

  (3269) 0x5018ca JGE	50195c

  (3269) 0x5018d0 MOVQ	$0,-0x8(%R12,%RDI,1)

  (3269) 0x5018d9 CMP	%R11,(%R12,%RDI,1)

  (3269) 0x5018dd JL	501890

  (3269) 0x5018df JMP	501993

0x5018e4 NOPW	%CS:(%RAX,%RAX,1)

  (3269) 0x5018f0 MOV	-0x80(%RBP),%R8

  (3269) 0x5018f4 MOV	-0x18(%R8,%RDI,1),%R8

  (3269) 0x5018f9 MOV	0x40(%RBP),%R9

  (3269) 0x5018fd MOV	(%R9),%R9

  (3269) 0x501900 MOV	-0x38(%RBP),%R10

  (3269) 0x501904 LEA	0x1(%R10),%R11

  (3269) 0x501908 MOV	%R11,-0x38(%RBP)

  (3269) 0x50190c MOV	-0x60(%RBP),%R11

  (3269) 0x501910 MOV	%R8,(%R9,%R10,8)

  (3269) 0x501914 MOVQ	$0,-0x18(%R12,%RDI,1)

  (3269) 0x50191d CMP	%R11,-0x10(%R12,%RDI,1)

  (3269) 0x501922 JL	5018bc

  (3269) 0x501924 MOV	-0x80(%RBP),%R8

  (3269) 0x501928 MOV	-0x10(%R8,%RDI,1),%R8

  (3269) 0x50192d MOV	0x40(%RBP),%R9

  (3269) 0x501931 MOV	(%R9),%R9

  (3269) 0x501934 MOV	-0x38(%RBP),%R10

  (3269) 0x501938 LEA	0x1(%R10),%R11

  (3269) 0x50193c MOV	%R11,-0x38(%RBP)

  (3269) 0x501940 MOV	-0x60(%RBP),%R11

  (3269) 0x501944 MOV	%R8,(%R9,%R10,8)

  (3269) 0x501948 MOVQ	$0,-0x10(%R12,%RDI,1)

  (3269) 0x501951 CMP	%R11,-0x8(%R12,%RDI,1)

  (3269) 0x501956 JL	5018d0

  (3269) 0x50195c MOV	-0x80(%RBP),%R8

  (3269) 0x501960 MOV	-0x8(%R8,%RDI,1),%R8

  (3269) 0x501965 MOV	0x40(%RBP),%R9

  (3269) 0x501969 MOV	(%R9),%R9

  (3269) 0x50196c MOV	-0x38(%RBP),%R10

  (3269) 0x501970 LEA	0x1(%R10),%R11

  (3269) 0x501974 MOV	%R11,-0x38(%RBP)

  (3269) 0x501978 MOV	-0x60(%RBP),%R11

  (3269) 0x50197c MOV	%R8,(%R9,%R10,8)

  (3269) 0x501980 MOVQ	$0,-0x8(%R12,%RDI,1)

  (3269) 0x501989 CMP	%R11,(%R12,%RDI,1)

  (3269) 0x50198d JL	501890

  (3269) 0x501993 MOV	-0x80(%RBP),%R8

  (3269) 0x501997 MOV	(%R8,%RDI,1),%R8

  (3269) 0x50199b MOV	0x40(%RBP),%R9

  (3269) 0x50199f MOV	(%R9),%R9

  (3269) 0x5019a2 MOV	-0x38(%RBP),%R10

  (3269) 0x5019a6 LEA	0x1(%R10),%R11

  (3269) 0x5019aa MOV	%R11,-0x38(%RBP)

  (3269) 0x5019ae MOV	-0x60(%RBP),%R11

  (3269) 0x5019b2 MOV	%R8,(%R9,%R10,8)

  (3269) 0x5019b6 JMP	501890

0x5019bb ADD	$0xa8,%RSP

0x5019c2 POP	%RBX

0x5019c3 POP	%R12

0x5019c5 POP	%R13

0x5019c7 POP	%R14

0x5019c9 POP	%R15

0x5019cb POP	%RBP

0x5019cc RET

0x5019cd NOPL	(%RAX)

Coverage (%)	Name	Source Location	Module
►96.83+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
○	__kmp_launch_thread		libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]		libiomp5.so
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►3.00+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
○	__kmp_fork_call		libiomp5.so
○	__kmpc_fork_call		libiomp5.so
○	hypre_BoomerAMGCreate2ndS	par_strength.c:1668	exec
○	hypre_BoomerAMGSetup	par_amg_setup.c:617	exec
○	hypre_PCGSetup	pcg.c:234	exec
○	main	amg.c:398	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start		exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_5

Source file and lines	par_strength.c:1668-2230
Module	exec

The function is defined in /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1668-1697,1705-1714,1720-1797,1806,1812-1971,1978-2000,2006-2083,2095,2101-2230.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 11% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 26.50 to 1.98 cycles (13.35x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

__kmpc_barrier@plt: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1955
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1962
__kmpc_end_masked@plt: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1962
__kmpc_masked@plt: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1962
hypre_GetThreadNum: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1671
hypre_MAlloc: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1967
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1971
unknown: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1674
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1946

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 496 bytes. The binary function is storing 200 bytes.

General properties

nb instructions	271
nb uops	212
loop length	1345
used x86 registers	16
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	36

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	26.50 cycles
front end	26.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	13.17	13.17	13.17	13.17	13.17	13.17	24.25	24.25	24.25	24.25	0.00	0.00	0.00	0.00	0.00	0.00
cycles	13.17	13.17	13.17	13.17	13.17	13.17	24.25	24.25	24.25	24.25	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	26.50
Dispatch	24.25
Overall L1	26.50

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	11%
load	12%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	11%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 26.50 cycles. At this rate:

7% of peak load performance is reached (18.72 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (7.55 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 26.50 to 24.25 cycles (1.09x speedup).

ASM code

In the binary file, the address of the function is: 500410

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0xa8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %R9,-0xa0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R8,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RCX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDX,-0x70(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RDI,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x88(%RBP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x48(%RBP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x20(%RBP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
CALL 5ac1c0 <hypre_GetThreadNum>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
MOV %RAX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
LEA -0xc8(%RBP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0xd0(%RBP),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %R12,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 41d3a0 <@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
MOV %R15,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %R13,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV (%RBX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
IMUL %R15,%RDX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	N/A
MOV (%R14),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP $0x1,%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JLE 5004c0 <hypre_BoomerAMGCreate2ndS.extracted.17+0xb0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV 0xd0(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0xc8(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0xc0(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0xb8(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
LEA (%RSI,%RDX,8),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %RSI,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RAX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
IMUL %R15,%RSI	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	N/A
LEA (%R9,%RSI,8),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %R9,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
LEA (%RDI,%RDX,8),%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA (%R8,%RSI,8),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
JMP 5004d8 <hypre_BoomerAMGCreate2ndS.extracted.17+0xc8>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
MOV %RAX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
IMUL %R15,%RSI	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	N/A
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %RDI,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %RDI,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
XOR %R11D,%R11D	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
TEST %RAX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV 0xb0(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
LEA (%R8,%RSI,8),%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
CMOVE %RAX,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV 0xa8(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
LEA (%RSI,%RDX,8),%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
TEST %RCX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMOVE %RCX,%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV 0x48(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
JLE 500523 <hypre_BoomerAMGCreate2ndS.extracted.17+0x113>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV (%RDX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x98(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
TEST %RAX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JLE 500551 <hypre_BoomerAMGCreate2ndS.extracted.17+0x141>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV %RDI,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOVQ $0,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOVQ $0,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV (%RCX,%R15,8),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R15,-0xb0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x8(%RCX,%R15,8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP $0x1,%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV %RBX,-0x68(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R10,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R11,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RAX,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
JNE 500822 <hypre_BoomerAMGCreate2ndS.extracted.17+0x412>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
CMP %RAX,%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JGE 500e9b <hypre_BoomerAMGCreate2ndS.extracted.17+0xa8b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %RBX,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 5005ca <hypre_BoomerAMGCreate2ndS.extracted.17+0x1ba>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMP %RAX,%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JGE 500e9b <hypre_BoomerAMGCreate2ndS.extracted.17+0xa8b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
LEA 0x38(%R11),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %RAX,-0xc0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV -0x58(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
ADD $0x38,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RAX,-0xb8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
XOR %R12D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
MOV %RBX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %R15D,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %RAX,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
JMP 500874 <hypre_BoomerAMGCreate2ndS.extracted.17+0x464>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV 0x88(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%R15),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
LEA (%RDI,%RAX,8),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV 0x38(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
LEA (%RCX,%RAX,8),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x30(%RBP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x38(%RBP),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV 0x90(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CALL 41e240 <@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
CMPQ $0,(%R15)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JLE 500ee0 <hypre_BoomerAMGCreate2ndS.extracted.17+0xad0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV 0x48(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMPQ $0,(%RCX)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
MOV -0x58(%RBP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV -0xa8(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
JLE 500f11 <hypre_BoomerAMGCreate2ndS.extracted.17+0xb01>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV (%R15),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV $0x609a50,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CALL 41de50 <__kmpc_barrier@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
MOV (%R15),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV $0x609a70,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
CALL 41e210 <__kmpc_masked@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
CMP $0x1,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
MOV %R15,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0xa0(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
JNE 500fa4 <hypre_BoomerAMGCreate2ndS.extracted.17+0xb94>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV 0x88(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x28(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RCX,%RAX,8),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
TEST %RDI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 500f6d <hypre_BoomerAMGCreate2ndS.extracted.17+0xb5d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
SAL $0x3,%RDI	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
CALL 5a8800 <hypre_MAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
MOV 0x30(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,(%RCX)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x88(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x38(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RCX,%RAX,8),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
TEST %RDI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 500f8a <hypre_BoomerAMGCreate2ndS.extracted.17+0xb7a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
SAL $0x3,%RDI	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
CALL 5a8800 <hypre_MAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
MOV 0x40(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,(%RCX)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV -0xa8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RAX),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV $0x609a90,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CALL 41dda0 <__kmpc_end_masked@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
MOV -0xa8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RAX),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV $0x609ab0,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CALL 41de50 <__kmpc_barrier@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
MOV -0x90(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
DEC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RBX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RAX,%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV 0x90(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x28(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
JGE 501042 <hypre_BoomerAMGCreate2ndS.extracted.17+0xc32>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV -0x30(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV -0x38(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RBX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 500ffb <hypre_BoomerAMGCreate2ndS.extracted.17+0xbeb>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV %RAX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x90(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP -0x90(%RBP),%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JGE 5019bb <hypre_BoomerAMGCreate2ndS.extracted.17+0x15ab>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV -0x30(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
ADD %RAX,(%R11,%RDX,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.50	scal (12.5%)
MOV %RCX,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x38(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x38(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RDI,%RDX,8),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
ADD %RCX,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RSI,(%RDI,%RDX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV -0xb0(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
SAL $0x4,%R8	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
MOV 0x10(%R8,%R9,1),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP (%R11,%RDX,8),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JNE 5010a1 <hypre_BoomerAMGCreate2ndS.extracted.17+0xc91>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
CMP %RSI,0x18(%R8,%R9,1)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JNE 5010a1 <hypre_BoomerAMGCreate2ndS.extracted.17+0xc91>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV 0xa0(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RSI,%RDX,8),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV -0x70(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOVQ $0x2,(%RSI,%RDX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
CMPQ $0x1,-0x60(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 5010d0 <hypre_BoomerAMGCreate2ndS.extracted.17+0xcc0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %R14,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
JMP 501330 <hypre_BoomerAMGCreate2ndS.extracted.17+0xf20>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
ADD $0xa8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_5

Source file and lines	par_strength.c:1668-2230
Module	exec

gain
potential
hint
expert

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

__kmpc_barrier@plt: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1955
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1962
__kmpc_end_masked@plt: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1962
__kmpc_masked@plt: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1962
hypre_GetThreadNum: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1671
hypre_MAlloc: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1967
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1971
unknown: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1674
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1946

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 496 bytes. The binary function is storing 200 bytes.

General properties

nb instructions	271
nb uops	212
loop length	1345
used x86 registers	16
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	36

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	26.50 cycles
front end	26.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	13.17	13.17	13.17	13.17	13.17	13.17	24.25	24.25	24.25	24.25	0.00	0.00	0.00	0.00	0.00	0.00
cycles	13.17	13.17	13.17	13.17	13.17	13.17	24.25	24.25	24.25	24.25	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	26.50
Dispatch	24.25
Overall L1	26.50

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	11%
load	12%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	11%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 26.50 cycles. At this rate:

7% of peak load performance is reached (18.72 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (7.55 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 500410

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0xa8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %R9,-0xa0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R8,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RCX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDX,-0x70(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RDI,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x88(%RBP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x48(%RBP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x20(%RBP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
CALL 5ac1c0 <hypre_GetThreadNum>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
MOV %RAX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
LEA -0xc8(%RBP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0xd0(%RBP),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %R12,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 41d3a0 <@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
MOV %R15,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %R13,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV (%RBX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
IMUL %R15,%RDX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	N/A
MOV (%R14),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP $0x1,%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JLE 5004c0 <hypre_BoomerAMGCreate2ndS.extracted.17+0xb0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV 0xd0(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0xc8(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0xc0(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0xb8(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
LEA (%RSI,%RDX,8),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %RSI,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RAX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
IMUL %R15,%RSI	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	N/A
LEA (%R9,%RSI,8),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %R9,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
LEA (%RDI,%RDX,8),%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA (%R8,%RSI,8),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
JMP 5004d8 <hypre_BoomerAMGCreate2ndS.extracted.17+0xc8>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
MOV %RAX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
IMUL %R15,%RSI	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	N/A
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %RDI,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %RDI,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
XOR %R11D,%R11D	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
TEST %RAX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV 0xb0(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
LEA (%R8,%RSI,8),%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
CMOVE %RAX,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV 0xa8(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
LEA (%RSI,%RDX,8),%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
TEST %RCX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMOVE %RCX,%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV 0x48(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
JLE 500523 <hypre_BoomerAMGCreate2ndS.extracted.17+0x113>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV (%RDX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x98(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
TEST %RAX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JLE 500551 <hypre_BoomerAMGCreate2ndS.extracted.17+0x141>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV %RDI,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOVQ $0,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOVQ $0,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV (%RCX,%R15,8),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R15,-0xb0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x8(%RCX,%R15,8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP $0x1,%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV %RBX,-0x68(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R10,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R11,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RAX,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
JNE 500822 <hypre_BoomerAMGCreate2ndS.extracted.17+0x412>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
CMP %RAX,%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JGE 500e9b <hypre_BoomerAMGCreate2ndS.extracted.17+0xa8b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %RBX,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 5005ca <hypre_BoomerAMGCreate2ndS.extracted.17+0x1ba>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMP %RAX,%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JGE 500e9b <hypre_BoomerAMGCreate2ndS.extracted.17+0xa8b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
LEA 0x38(%R11),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %RAX,-0xc0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV -0x58(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
ADD $0x38,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RAX,-0xb8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
XOR %R12D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
MOV %RBX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %R15D,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %RAX,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
JMP 500874 <hypre_BoomerAMGCreate2ndS.extracted.17+0x464>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV 0x88(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%R15),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
LEA (%RDI,%RAX,8),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV 0x38(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
LEA (%RCX,%RAX,8),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x30(%RBP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x38(%RBP),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV 0x90(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CALL 41e240 <@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
CMPQ $0,(%R15)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JLE 500ee0 <hypre_BoomerAMGCreate2ndS.extracted.17+0xad0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV 0x48(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMPQ $0,(%RCX)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
MOV -0x58(%RBP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV -0xa8(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
JLE 500f11 <hypre_BoomerAMGCreate2ndS.extracted.17+0xb01>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV (%R15),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV $0x609a50,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CALL 41de50 <__kmpc_barrier@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
MOV (%R15),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV $0x609a70,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
CALL 41e210 <__kmpc_masked@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
CMP $0x1,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
MOV %R15,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0xa0(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
JNE 500fa4 <hypre_BoomerAMGCreate2ndS.extracted.17+0xb94>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV 0x88(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x28(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RCX,%RAX,8),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
TEST %RDI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 500f6d <hypre_BoomerAMGCreate2ndS.extracted.17+0xb5d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
SAL $0x3,%RDI	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
CALL 5a8800 <hypre_MAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
MOV 0x30(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,(%RCX)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x88(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x38(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RCX,%RAX,8),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
TEST %RDI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 500f8a <hypre_BoomerAMGCreate2ndS.extracted.17+0xb7a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
SAL $0x3,%RDI	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
CALL 5a8800 <hypre_MAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
MOV 0x40(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,(%RCX)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV -0xa8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RAX),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV $0x609a90,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CALL 41dda0 <__kmpc_end_masked@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
MOV -0xa8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RAX),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV $0x609ab0,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CALL 41de50 <__kmpc_barrier@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
MOV -0x90(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
DEC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RBX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RAX,%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV 0x90(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x28(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
JGE 501042 <hypre_BoomerAMGCreate2ndS.extracted.17+0xc32>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV -0x30(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV -0x38(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RBX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 500ffb <hypre_BoomerAMGCreate2ndS.extracted.17+0xbeb>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV %RAX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x90(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP -0x90(%RBP),%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JGE 5019bb <hypre_BoomerAMGCreate2ndS.extracted.17+0x15ab>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV -0x30(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
ADD %RAX,(%R11,%RDX,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.50	scal (12.5%)
MOV %RCX,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x38(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x38(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RDI,%RDX,8),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
ADD %RCX,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RSI,(%RDI,%RDX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV -0xb0(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
SAL $0x4,%R8	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
MOV 0x10(%R8,%R9,1),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP (%R11,%RDX,8),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JNE 5010a1 <hypre_BoomerAMGCreate2ndS.extracted.17+0xc91>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
CMP %RSI,0x18(%R8,%R9,1)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JNE 5010a1 <hypre_BoomerAMGCreate2ndS.extracted.17+0xc91>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV 0xa0(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RSI,%RDX,8),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV -0x70(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOVQ $0x2,(%RSI,%RDX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
CMPQ $0x1,-0x60(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 5010d0 <hypre_BoomerAMGCreate2ndS.extracted.17+0xcc0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %R14,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
JMP 501330 <hypre_BoomerAMGCreate2ndS.extracted.17+0xf20>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
ADD $0xa8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼hypre_BoomerAMGCreate2ndS.extracted.17–	1.65	0.86
○Loop 3280 - par_strength.c:1951-1953 - exec	0.04	0.02
○Loop 3302 - par_strength.c:1691-1693 - exec	0.01	0.01
▼Loop 3294 - par_strength.c:1714-1797 - exec–	0.01	0.01
▼Loop 3298 - par_strength.c:1731-1765 - exec–	0.08	0.04
○Loop 3300 - par_strength.c:1743-1752 - exec	0.70	0.34
○Loop 3299 - par_strength.c:1756-1765 - exec	0.00	0.01
▼Loop 3295 - par_strength.c:1770-1797 - exec–	0.00	0.00
○Loop 3296 - par_strength.c:1791-1797 - exec	0.00	0.00
○Loop 3297 - par_strength.c:1782-1788 - exec	0.00	0.00
▼Loop 3260 - par_strength.c:2000-2083 - exec–	0.01	0.01
▼Loop 3264 - par_strength.c:2011-2048 - exec–	0.07	0.04
○Loop 3266 - par_strength.c:2024-2034 - exec	0.73	0.36
○Loop 3265 - par_strength.c:2038-2048 - exec	0.00	0.01
▼Loop 3261 - par_strength.c:2053-2083 - exec–	0.00	0.00
○Loop 3262 - par_strength.c:2076-2083 - exec	0.00	0.00
○Loop 3263 - par_strength.c:2066-2073 - exec	0.00	0.00
○Loop 3278 - par_strength.c:1978-1984 - exec	0.00	0.00
○Loop 3279 - par_strength.c:1955-1957 - exec	0.00	0.00
○Loop 3301 - par_strength.c:1695-1697 - exec	0.00	0.00
▼Loop 3281 - par_strength.c:1679-1941 - exec–	0.00	0.00
○Loop 3283 - par_strength.c:1935-1939 - exec	0.00	0.00
○Loop 3282 - par_strength.c:1931-1941 - exec	0.00	0.00
○Loop 3286 - par_strength.c:1927-1931 - exec	0.00	0.00
○Loop 3284 - par_strength.c:1935-1939 - exec	0.00	0.00
○Loop 3285 - par_strength.c:1927-1933 - exec	0.00	0.00
▼Loop 3288 - par_strength.c:1877-1922 - exec–	0.00	0.00
○Loop 3290 - par_strength.c:1894-1907 - exec	0.00	0.00
○Loop 3289 - par_strength.c:1911-1922 - exec	0.00	0.00
○Loop 3287 - par_strength.c:1927-1931 - exec	0.00	0.00
▼Loop 3291 - par_strength.c:1823-1872 - exec–	0.00	0.00
○Loop 3292 - par_strength.c:1858-1872 - exec	0.00	0.00
○Loop 3293 - par_strength.c:1840-1854 - exec	0.00	0.00
▼Loop 3267 - par_strength.c:1679-2230 - exec–	0.00	0.00
○Loop 3270 - par_strength.c:2216-2224 - exec	0.00	0.00
○Loop 3269 - par_strength.c:2224-2230 - exec	0.00	0.00
▼Loop 3272 - par_strength.c:2163-2211 - exec–	0.00	0.00
○Loop 3274 - par_strength.c:2181-2195 - exec	0.00	0.00
○Loop 3273 - par_strength.c:2199-2211 - exec	0.00	0.00
▼Loop 3275 - par_strength.c:2106-2158 - exec–	0.00	0.00
○Loop 3276 - par_strength.c:2143-2158 - exec	0.00	0.00
○Loop 3277 - par_strength.c:2124-2139 - exec	0.00	0.00
○Loop 3268 - par_strength.c:2224-2230 - exec	0.00	0.00
○Loop 3271 - par_strength.c:1679-2222 - exec	0.00	0.00

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Matching between your function (in the source code) and the binary function

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ASM code