OV - exec - Function hypre_BoomerAMGCreateS.extracted

	Function: hypre_BoomerAMGCreateS.extracted	Module: exec	Source: par_strength.c:246-513 [...]	Coverage (incl. loops): 1.13% \| (excl. loops): 0.03%

/home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c: 246 - 513

--------------------------------------------------------------------------------

246: #pragma omp parallel private(i,diag,row_scale,row_sum,jA,jS)

247: #endif

248:    {

249:    HYPRE_Int start, stop;

250:    hypre_GetSimpleThreadPartition(&start, &stop, num_variables);

251:    HYPRE_Int jS_diag = 0, jS_offd = 0;

252:

253:    for (i = start; i < stop; i++)

254:    {

255:       S_diag_i[i] = jS_diag;

256:       if (num_cols_offd)

257:       {

258:          S_offd_i[i] = jS_offd;

259:       }

260:

261:       diag = A_diag_data[A_diag_i[i]];

262:

263:       /* compute scaling factor and row sum */

264:       row_scale = 0.0;

265:       row_sum = diag;

266:       if (num_functions > 1)

267:       {

268:          if (diag < 0)

269:          {

270:             for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

271:             {

272:                if (dof_func[i] == dof_func[A_diag_j[jA]])

273:                {

274:                   row_scale = hypre_max(row_scale, A_diag_data[jA]);

275:                   row_sum += A_diag_data[jA];

276:                }

277:             }

278:             for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

279:             {

280:                if (dof_func[i] == dof_func_offd[A_offd_j[jA]])

281:                {

282:                   row_scale = hypre_max(row_scale, A_offd_data[jA]);

283:                   row_sum += A_offd_data[jA];

[...]

289:             for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

290:             {

291:                if (dof_func[i] == dof_func[A_diag_j[jA]])

292:                {

293:                   row_scale = hypre_min(row_scale, A_diag_data[jA]);

294:                   row_sum += A_diag_data[jA];

295:                }

296:             }

297:             for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

298:             {

299:                if (dof_func[i] == dof_func_offd[A_offd_j[jA]])

300:                {

301:                   row_scale = hypre_min(row_scale, A_offd_data[jA]);

302:                   row_sum += A_offd_data[jA];

[...]

309:          if (diag < 0)

310:          {

311:             for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

312:             {

313:                row_scale = hypre_max(row_scale, A_diag_data[jA]);

314:                row_sum += A_diag_data[jA];

315:             }

316:             for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

317:             {

318:                row_scale = hypre_max(row_scale, A_offd_data[jA]);

319:                row_sum += A_offd_data[jA];

320:             }

321:          }

322:          else

323:          {

324:             for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

325:             {

326:                row_scale = hypre_min(row_scale, A_diag_data[jA]);

327:                row_sum += A_diag_data[jA];

328:             }

329:             for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

330:             {

331:                row_scale = hypre_min(row_scale, A_offd_data[jA]);

332:                row_sum += A_offd_data[jA];

333:             }

334:          } /* diag >= 0*/

335:       } /* num_functions <= 1 */

336:

337:       jS_diag += A_diag_i[i + 1] - A_diag_i[i] - 1;

338:       jS_offd += A_offd_i[i + 1] - A_offd_i[i];

339:

340:       /* compute row entries of S */

341:       S_temp_diag_j[A_diag_i[i]] = -1;

342:       if ((fabs(row_sum) > fabs(diag)*max_row_sum) && (max_row_sum < 1.0))

343:       {

344:          /* make all dependencies weak */

345:          for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

346:          {

347:             S_temp_diag_j[jA] = -1;

348:          }

349:          jS_diag -= A_diag_i[i + 1] - (A_diag_i[i] + 1);

350:

351:          for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

352:          {

353:             S_temp_offd_j[jA] = -1;

354:          }

355:          jS_offd -= A_offd_i[i + 1] - A_offd_i[i];

356:       }

357:       else

358:       {

359:          if (num_functions > 1)

360:          {

361:             if (diag < 0)

362:             {

363:                for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

364:                {

365:                   if (A_diag_data[jA] <= strength_threshold * row_scale

366:                       || dof_func[i] != dof_func[A_diag_j[jA]])

367:                   {

368:                      S_temp_diag_j[jA] = -1;

369:                      --jS_diag;

370:                   }

371:                   else

372:                   {

373:                      S_temp_diag_j[jA] = A_diag_j[jA];

374:                   }

375:                }

376:                for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

377:                {

378:                   if (A_offd_data[jA] <= strength_threshold * row_scale

379:                       || dof_func[i] != dof_func_offd[A_offd_j[jA]])

380:                   {

381:                      S_temp_offd_j[jA] = -1;

382:                      --jS_offd;

383:                   }

384:                   else

385:                   {

386:                      S_temp_offd_j[jA] = A_offd_j[jA];

[...]

392:                for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

393:                {

394:                   if (A_diag_data[jA] >= strength_threshold * row_scale

395:                       || dof_func[i] != dof_func[A_diag_j[jA]])

396:                   {

397:                      S_temp_diag_j[jA] = -1;

398:                      --jS_diag;

399:                   }

400:                   else

401:                   {

402:                      S_temp_diag_j[jA] = A_diag_j[jA];

403:                   }

404:                }

405:                for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

406:                {

407:                   if (A_offd_data[jA] >= strength_threshold * row_scale

408:                       || dof_func[i] != dof_func_offd[A_offd_j[jA]])

409:                   {

410:                      S_temp_offd_j[jA] = -1;

411:                      --jS_offd;

412:                   }

413:                   else

414:                   {

415:                      S_temp_offd_j[jA] = A_offd_j[jA];

[...]

422:             if (diag < 0)

423:             {

424:                for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

425:                {

426:                   if (A_diag_data[jA] <= strength_threshold * row_scale)

427:                   {

428:                      S_temp_diag_j[jA] = -1;

429:                      --jS_diag;

430:                   }

431:                   else

432:                   {

433:                      S_temp_diag_j[jA] = A_diag_j[jA];

434:                   }

435:                }

436:                for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

437:                {

438:                   if (A_offd_data[jA] <= strength_threshold * row_scale)

439:                   {

440:                      S_temp_offd_j[jA] = -1;

441:                      --jS_offd;

442:                   }

443:                   else

444:                   {

445:                      S_temp_offd_j[jA] = A_offd_j[jA];

[...]

451:                for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

452:                {

453:                   if (A_diag_data[jA] >= strength_threshold * row_scale)

454:                   {

455:                      S_temp_diag_j[jA] = -1;

456:                      --jS_diag;

457:                   }

458:                   else

459:                   {

460:                      S_temp_diag_j[jA] = A_diag_j[jA];

461:                   }

462:                }

463:                for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

464:                {

465:                   if (A_offd_data[jA] >= strength_threshold * row_scale)

466:                   {

467:                      S_temp_offd_j[jA] = -1;

468:                      --jS_offd;

469:                   }

470:                   else

471:                   {

472:                      S_temp_offd_j[jA] = A_offd_j[jA];

[...]

480:    hypre_prefix_sum_pair(&jS_diag, S_diag_i + num_variables, &jS_offd, S_offd_i + num_variables, prefix_sum_workspace);

[...]

492:    for (i = start; i < stop; i++)

493:    {

494:       S_diag_i[i] += jS_diag;

495:       S_offd_i[i] += jS_offd;

496:

497:       jS = S_diag_i[i];

498:       for (jA = A_diag_i[i]; jA < A_diag_i[i+1]; jA++)

499:       {

500:          if (S_temp_diag_j[jA] > -1)

501:          {

502:             S_diag_j[jS]    = S_temp_diag_j[jA];

503:             jS++;

504:          }

505:       }

506:

507:       jS = S_offd_i[i];

508:       for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

509:       {

510:          if (S_temp_offd_j[jA] > -1)

511:          {

512:             S_offd_j[jS]    = S_temp_offd_j[jA];

513:             jS++;

0x4fdff0 PUSH	%RBP

0x4fdff1 MOV	%RSP,%RBP

0x4fdff4 PUSH	%R15

0x4fdff6 PUSH	%R14

0x4fdff8 PUSH	%R13

0x4fdffa PUSH	%R12

0x4fdffc PUSH	%RBX

0x4fdffd SUB	$0x78,%RSP

0x4fe001 MOV	%R9,%R15

0x4fe004 MOV	%R8,%R14

0x4fe007 MOV	%RCX,-0x30(%RBP)

0x4fe00b MOV	%RDX,-0x50(%RBP)

0x4fe00f MOV	0x80(%RBP),%R12

0x4fe016 MOV	0x40(%RBP),%RDX

0x4fe01a MOV	0x20(%RBP),%RBX

0x4fe01e MOV	0x10(%RBP),%R13

0x4fe022 LEA	-0x70(%RBP),%RDI

0x4fe026 LEA	-0x78(%RBP),%RSI

0x4fe02a CALL	41d3a0 <@plt>

0x4fe02f MOV	-0x70(%RBP),%R8

0x4fe033 MOV	-0x78(%RBP),%RAX

0x4fe037 MOV	%RAX,-0x90(%RBP)

0x4fe03e CMP	%RAX,%R8

0x4fe041 JGE	4ff3dc

0x4fe047 MOV	0x28(%RBP),%RDI

0x4fe04b MOV	0x18(%RBP),%RSI

0x4fe04f MOVSD	-0x30(%RBP),%XMM0

0x4fe054 MOVSD	-0x50(%RBP),%XMM1

0x4fe059 LEA	0x40(%RSI),%RAX

0x4fe05d MOV	%RAX,-0x68(%RBP)

0x4fe061 LEA	0x38(%RDI),%RAX

0x4fe065 MOV	%RAX,-0x60(%RBP)

0x4fe069 XOR	%R10D,%R10D

0x4fe06c XORPD	%XMM2,%XMM2

0x4fe070 MOVAPD	0xc7868(%RIP),%XMM3

0x4fe078 MOVSD	0xc5fb0(%RIP),%XMM4

0x4fe080 XOR	%R9D,%R9D

0x4fe083 MOV	0x88(%RBP),%R11

0x4fe08a MOV	%R14,-0x38(%RBP)

0x4fe08e JMP	4fe0a1

  (3225) 0x4fe090 MOV	-0x50(%RBP),%R9

  (3225) 0x4fe094 CMP	-0x90(%RBP),%R8

  (3225) 0x4fe09b JE	4ff3e2

  (3225) 0x4fe0a1 MOV	%R8,%RDX

  (3225) 0x4fe0a4 MOV	0x50(%RBP),%RCX

  (3225) 0x4fe0a8 MOV	%R10,(%RCX,%R8,8)

  (3225) 0x4fe0ac CMPQ	$0,0x48(%RBP)

  (3225) 0x4fe0b1 JE	4fe0bb

  (3225) 0x4fe0b3 MOV	0x60(%RBP),%RCX

  (3225) 0x4fe0b7 MOV	%R9,(%RCX,%RDX,8)

  (3225) 0x4fe0bb MOV	%R9,-0x50(%RBP)

  (3225) 0x4fe0bf LEA	0x1(%RDX),%R8

  (3225) 0x4fe0c3 MOV	(%R13,%RDX,8),%R9

  (3225) 0x4fe0c8 MOV	0x8(%R13,%RDX,8),%RCX

  (3225) 0x4fe0cd LEA	0x1(%R9),%RAX

  (3225) 0x4fe0d1 MOVSD	(%RSI,%R9,8),%XMM6

  (3225) 0x4fe0d7 CMP	$0x2,%R14

  (3225) 0x4fe0db MOV	%RCX,-0x98(%RBP)

  (3225) 0x4fe0e2 MOV	%R9,-0x30(%RBP)

  (3225) 0x4fe0e6 XORPD	%XMM5,%XMM5

  (3225) 0x4fe0ea MOVAPD	%XMM6,%XMM7

  (3225) 0x4fe0ee JL	4fe160

  (3225) 0x4fe0f0 UCOMISD	%XMM2,%XMM6

  (3225) 0x4fe0f4 JAE	4fe260

  (3225) 0x4fe0fa CMP	%RCX,%RAX

  (3225) 0x4fe0fd JGE	4fe710

  (3225) 0x4fe103 MOV	(%R15,%RDX,8),%R11

  (3225) 0x4fe107 SUB	%R9,%RCX

  (3225) 0x4fe10a LEA	-0x1(%RCX),%RSI

  (3225) 0x4fe10e MOVAPD	%XMM6,%XMM7

  (3225) 0x4fe112 MOV	%RSI,%R14

  (3225) 0x4fe115 CMP	$0x4,%RSI

  (3225) 0x4fe119 JAE	4fe3c0

  (3225) 0x4fe11f AND	$-0x4,%R14

  (3225) 0x4fe123 SUB	%R14,%RCX

  (3225) 0x4fe126 CMP	$0x2,%RCX

  (3225) 0x4fe12a JE	4fe5be

  (3225) 0x4fe130 CMP	$0x4,%RCX

  (3225) 0x4fe134 JE	4fe5d7

  (3225) 0x4fe13a CMP	$0x3,%RCX

  (3225) 0x4fe13e MOV	0x28(%RBP),%RDI

  (3225) 0x4fe142 MOV	-0x30(%RBP),%R9

  (3225) 0x4fe146 JNE	4fe63c

  (3225) 0x4fe14c MOV	%R14,-0x48(%RBP)

  (3225) 0x4fe150 LEA	(%R9,%R14,1),%RCX

  (3225) 0x4fe154 JMP	4fe60b

0x4fe159 NOPL	(%RAX)

  (3225) 0x4fe160 UCOMISD	%XMM2,%XMM6

  (3225) 0x4fe164 JAE	4fe2c0

  (3225) 0x4fe16a CMP	%RCX,%RAX

  (3225) 0x4fe16d JGE	4febfb

  (3225) 0x4fe173 SUB	%R9,%RCX

  (3225) 0x4fe176 LEA	-0x1(%RCX),%R11

  (3225) 0x4fe17a MOVAPD	%XMM6,%XMM7

  (3225) 0x4fe17e CMP	$0x8,%R11

  (3225) 0x4fe182 JB	4fe237

  (3225) 0x4fe188 MOV	%R11,%RSI

  (3225) 0x4fe18b SHR	$0x3,%RSI

  (3225) 0x4fe18f MOV	-0x68(%RBP),%RDI

  (3225) 0x4fe193 LEA	(%RDI,%R9,8),%RDI

  (3225) 0x4fe197 MOVAPD	%XMM6,%XMM7

  (3225) 0x4fe19b NOPL	(%RAX,%RAX,1)

    (3229) 0x4fe1a0 MOVSD	-0x38(%RDI),%XMM8

    (3229) 0x4fe1a6 MOVSD	-0x30(%RDI),%XMM9

    (3229) 0x4fe1ac MAXSD	%XMM8,%XMM5

    (3229) 0x4fe1b1 ADDSD	%XMM8,%XMM7

    (3229) 0x4fe1b6 MOVSD	-0x28(%RDI),%XMM8

    (3229) 0x4fe1bc MOVAPD	%XMM8,%XMM10

    (3229) 0x4fe1c1 MAXSD	%XMM9,%XMM10

    (3229) 0x4fe1c6 MAXSD	%XMM5,%XMM10

    (3229) 0x4fe1cb ADDSD	%XMM9,%XMM8

    (3229) 0x4fe1d0 ADDSD	%XMM7,%XMM8

    (3229) 0x4fe1d5 MOVSD	-0x20(%RDI),%XMM5

    (3229) 0x4fe1da MOVSD	-0x18(%RDI),%XMM9

    (3229) 0x4fe1e0 MOVAPD	%XMM9,%XMM11

    (3229) 0x4fe1e5 MAXSD	%XMM5,%XMM11

    (3229) 0x4fe1ea ADDSD	%XMM5,%XMM9

    (3229) 0x4fe1ef MOVSD	-0x10(%RDI),%XMM5

    (3229) 0x4fe1f4 MAXSD	%XMM5,%XMM11

    (3229) 0x4fe1f9 MAXSD	%XMM10,%XMM11

    (3229) 0x4fe1fe ADDSD	%XMM5,%XMM9

    (3229) 0x4fe203 ADDSD	%XMM8,%XMM9

    (3229) 0x4fe208 MOVSD	-0x8(%RDI),%XMM8

    (3229) 0x4fe20e MOVSD	(%RDI),%XMM7

    (3229) 0x4fe212 MOVAPD	%XMM7,%XMM5

    (3229) 0x4fe216 MAXSD	%XMM8,%XMM5

    (3229) 0x4fe21b MAXSD	%XMM11,%XMM5

    (3229) 0x4fe220 ADDSD	%XMM8,%XMM7

    (3229) 0x4fe225 ADDSD	%XMM9,%XMM7

    (3229) 0x4fe22a ADD	$0x40,%RDI

    (3229) 0x4fe22e DEC	%RSI

    (3229) 0x4fe231 JNE	4fe1a0

  (3225) 0x4fe237 AND	$-0x8,%R11

  (3225) 0x4fe23b SUB	%R11,%RCX

  (3225) 0x4fe23e ADD	$-0x2,%RCX

  (3225) 0x4fe242 CMP	$0x6,%RCX

  (3225) 0x4fe246 JA	4feb35

0x4fe24c MOV	0x18(%RBP),%RSI

0x4fe250 JMP	0x5d7310(,%RCX,8)

0x4fe257 MOV	0x28(%RBP),%RDI

0x4fe25b JMP	4febe1

  (3225) 0x4fe260 CMP	%RCX,%RAX

  (3225) 0x4fe263 JGE	4fe86d

  (3225) 0x4fe269 MOV	(%R15,%RDX,8),%R11

  (3225) 0x4fe26d SUB	%R9,%RCX

  (3225) 0x4fe270 LEA	-0x1(%RCX),%RSI

  (3225) 0x4fe274 MOVAPD	%XMM6,%XMM7

  (3225) 0x4fe278 MOV	%RSI,%R14

  (3225) 0x4fe27b CMP	$0x4,%RSI

  (3225) 0x4fe27f JAE	4fe4be

  (3225) 0x4fe285 AND	$-0x4,%R14

  (3225) 0x4fe289 SUB	%R14,%RCX

  (3225) 0x4fe28c CMP	$0x2,%RCX

  (3225) 0x4fe290 JE	4fe649

  (3225) 0x4fe296 CMP	$0x4,%RCX

  (3225) 0x4fe29a JE	4fe662

  (3225) 0x4fe2a0 CMP	$0x3,%RCX

  (3225) 0x4fe2a4 MOV	0x28(%RBP),%RDI

  (3225) 0x4fe2a8 MOV	-0x30(%RBP),%R9

  (3225) 0x4fe2ac JNE	4fe6c7

  (3225) 0x4fe2b2 MOV	%R14,-0x48(%RBP)

  (3225) 0x4fe2b6 LEA	(%R9,%R14,1),%RCX

  (3225) 0x4fe2ba JMP	4fe696

0x4fe2bf NOP

  (3225) 0x4fe2c0 CMP	%RCX,%RAX

  (3225) 0x4fe2c3 JGE	4fedba

  (3225) 0x4fe2c9 SUB	%R9,%RCX

  (3225) 0x4fe2cc LEA	-0x1(%RCX),%R11

  (3225) 0x4fe2d0 MOVAPD	%XMM6,%XMM7

  (3225) 0x4fe2d4 CMP	$0x8,%R11

  (3225) 0x4fe2d8 JB	4fe397

  (3225) 0x4fe2de MOV	%R11,%RSI

  (3225) 0x4fe2e1 SHR	$0x3,%RSI

  (3225) 0x4fe2e5 MOV	-0x68(%RBP),%RDI

  (3225) 0x4fe2e9 LEA	(%RDI,%R9,8),%RDI

  (3225) 0x4fe2ed MOVAPD	%XMM6,%XMM7

  (3225) 0x4fe2f1 NOPW	%CS:(%RAX,%RAX,1)

    (3227) 0x4fe300 MOVSD	-0x38(%RDI),%XMM8

    (3227) 0x4fe306 MOVSD	-0x30(%RDI),%XMM9

    (3227) 0x4fe30c MINSD	%XMM8,%XMM5

    (3227) 0x4fe311 ADDSD	%XMM8,%XMM7

    (3227) 0x4fe316 MOVSD	-0x28(%RDI),%XMM8

    (3227) 0x4fe31c MOVAPD	%XMM9,%XMM10

    (3227) 0x4fe321 MINSD	%XMM8,%XMM10

    (3227) 0x4fe326 MINSD	%XMM5,%XMM10

    (3227) 0x4fe32b ADDSD	%XMM9,%XMM8

    (3227) 0x4fe330 ADDSD	%XMM7,%XMM8

    (3227) 0x4fe335 MOVSD	-0x20(%RDI),%XMM5

    (3227) 0x4fe33a MOVSD	-0x18(%RDI),%XMM9

    (3227) 0x4fe340 MOVAPD	%XMM5,%XMM11

    (3227) 0x4fe345 MINSD	%XMM9,%XMM11

    (3227) 0x4fe34a ADDSD	%XMM5,%XMM9

    (3227) 0x4fe34f MOVSD	-0x10(%RDI),%XMM5

    (3227) 0x4fe354 MINSD	%XMM5,%XMM11

    (3227) 0x4fe359 MINSD	%XMM10,%XMM11

    (3227) 0x4fe35e ADDSD	%XMM5,%XMM9

    (3227) 0x4fe363 ADDSD	%XMM8,%XMM9

    (3227) 0x4fe368 MOVSD	-0x8(%RDI),%XMM8

    (3227) 0x4fe36e MOVSD	(%RDI),%XMM7

    (3227) 0x4fe372 MOVAPD	%XMM8,%XMM5

    (3227) 0x4fe377 MINSD	%XMM7,%XMM5

    (3227) 0x4fe37b MINSD	%XMM11,%XMM5

    (3227) 0x4fe380 ADDSD	%XMM8,%XMM7

    (3227) 0x4fe385 ADDSD	%XMM9,%XMM7

    (3227) 0x4fe38a ADD	$0x40,%RDI

    (3227) 0x4fe38e DEC	%RSI

    (3227) 0x4fe391 JNE	4fe300

  (3225) 0x4fe397 AND	$-0x8,%R11

  (3225) 0x4fe39b SUB	%R11,%RCX

  (3225) 0x4fe39e ADD	$-0x2,%RCX

  (3225) 0x4fe3a2 CMP	$0x6,%RCX

  (3225) 0x4fe3a6 JA	4fecf4

0x4fe3ac MOV	0x18(%RBP),%RSI

0x4fe3b0 JMP	0x5d72a0(,%RCX,8)

0x4fe3b7 MOV	0x28(%RBP),%RDI

0x4fe3bb JMP	4feda0

  (3225) 0x4fe3c0 MOV	%R14,%R9

  (3225) 0x4fe3c3 SHR	$0x2,%R9

  (3225) 0x4fe3c7 MOV	-0x30(%RBP),%RSI

  (3225) 0x4fe3cb LEA	0x20(,%RSI,8),%RSI

  (3225) 0x4fe3d3 MOVAPD	%XMM6,%XMM7

  (3225) 0x4fe3d7 JMP	4fe3ed

0x4fe3d9 NOPL	(%RAX)

    (3233) 0x4fe3e0 ADD	$0x20,%RSI

    (3233) 0x4fe3e4 DEC	%R9

    (3233) 0x4fe3e7 JE	4fe11f

    (3233) 0x4fe3ed MOV	0x30(%RBP),%RDI

    (3233) 0x4fe3f1 MOV	-0x18(%RDI,%RSI,1),%RDI

    (3233) 0x4fe3f6 CMP	(%R15,%RDI,8),%R11

    (3233) 0x4fe3fa JNE	4fe460

    (3233) 0x4fe3fc MOV	0x18(%RBP),%RDI

    (3233) 0x4fe400 MOVSD	-0x18(%RDI,%RSI,1),%XMM8

    (3233) 0x4fe407 MAXSD	%XMM8,%XMM5

    (3233) 0x4fe40c ADDSD	%XMM8,%XMM7

    (3233) 0x4fe411 MOV	0x30(%RBP),%RDI

    (3233) 0x4fe415 MOV	-0x10(%RDI,%RSI,1),%RDI

    (3233) 0x4fe41a CMP	(%R15,%RDI,8),%R11

    (3233) 0x4fe41e JE	4fe46f

    (3233) 0x4fe420 MOV	0x30(%RBP),%RDI

    (3233) 0x4fe424 MOV	-0x8(%RDI,%RSI,1),%RDI

    (3233) 0x4fe429 CMP	(%R15,%RDI,8),%R11

    (3233) 0x4fe42d JNE	4fe493

    (3233) 0x4fe42f MOV	0x18(%RBP),%RDI

    (3233) 0x4fe433 MOVSD	-0x8(%RDI,%RSI,1),%XMM8

    (3233) 0x4fe43a MAXSD	%XMM8,%XMM5

    (3233) 0x4fe43f ADDSD	%XMM8,%XMM7

    (3233) 0x4fe444 MOV	0x30(%RBP),%RDI

    (3233) 0x4fe448 MOV	(%RDI,%RSI,1),%RDI

    (3233) 0x4fe44c CMP	(%R15,%RDI,8),%R11

    (3233) 0x4fe450 JNE	4fe3e0

    (3233) 0x4fe452 JMP	4fe4a5

0x4fe454 NOPW	%CS:(%RAX,%RAX,1)

    (3233) 0x4fe460 MOV	0x30(%RBP),%RDI

    (3233) 0x4fe464 MOV	-0x10(%RDI,%RSI,1),%RDI

    (3233) 0x4fe469 CMP	(%R15,%RDI,8),%R11

    (3233) 0x4fe46d JNE	4fe420

    (3233) 0x4fe46f MOV	0x18(%RBP),%RDI

    (3233) 0x4fe473 MOVSD	-0x10(%RDI,%RSI,1),%XMM8

    (3233) 0x4fe47a MAXSD	%XMM8,%XMM5

    (3233) 0x4fe47f ADDSD	%XMM8,%XMM7

    (3233) 0x4fe484 MOV	0x30(%RBP),%RDI

    (3233) 0x4fe488 MOV	-0x8(%RDI,%RSI,1),%RDI

    (3233) 0x4fe48d CMP	(%R15,%RDI,8),%R11

    (3233) 0x4fe491 JE	4fe42f

    (3233) 0x4fe493 MOV	0x30(%RBP),%RDI

    (3233) 0x4fe497 MOV	(%RDI,%RSI,1),%RDI

    (3233) 0x4fe49b CMP	(%R15,%RDI,8),%R11

    (3233) 0x4fe49f JNE	4fe3e0

    (3233) 0x4fe4a5 MOV	0x18(%RBP),%RDI

    (3233) 0x4fe4a9 MOVSD	(%RDI,%RSI,1),%XMM8

    (3233) 0x4fe4af MAXSD	%XMM8,%XMM5

    (3233) 0x4fe4b4 ADDSD	%XMM8,%XMM7

    (3233) 0x4fe4b9 JMP	4fe3e0

  (3225) 0x4fe4be MOV	%R14,%R9

  (3225) 0x4fe4c1 SHR	$0x2,%R9

  (3225) 0x4fe4c5 MOV	-0x30(%RBP),%RSI

  (3225) 0x4fe4c9 LEA	0x20(,%RSI,8),%RSI

  (3225) 0x4fe4d1 MOVAPD	%XMM6,%XMM7

  (3225) 0x4fe4d5 JMP	4fe4ed

0x4fe4d7 NOPW	(%RAX,%RAX,1)

    (3231) 0x4fe4e0 ADD	$0x20,%RSI

    (3231) 0x4fe4e4 DEC	%R9

    (3231) 0x4fe4e7 JE	4fe285

    (3231) 0x4fe4ed MOV	0x30(%RBP),%RDI

    (3231) 0x4fe4f1 MOV	-0x18(%RDI,%RSI,1),%RDI

    (3231) 0x4fe4f6 CMP	(%R15,%RDI,8),%R11

    (3231) 0x4fe4fa JNE	4fe560

    (3231) 0x4fe4fc MOV	0x18(%RBP),%RDI

    (3231) 0x4fe500 MOVSD	-0x18(%RDI,%RSI,1),%XMM8

    (3231) 0x4fe507 MINSD	%XMM8,%XMM5

    (3231) 0x4fe50c ADDSD	%XMM8,%XMM7

    (3231) 0x4fe511 MOV	0x30(%RBP),%RDI

    (3231) 0x4fe515 MOV	-0x10(%RDI,%RSI,1),%RDI

    (3231) 0x4fe51a CMP	(%R15,%RDI,8),%R11

    (3231) 0x4fe51e JE	4fe56f

    (3231) 0x4fe520 MOV	0x30(%RBP),%RDI

    (3231) 0x4fe524 MOV	-0x8(%RDI,%RSI,1),%RDI

    (3231) 0x4fe529 CMP	(%R15,%RDI,8),%R11

    (3231) 0x4fe52d JNE	4fe593

    (3231) 0x4fe52f MOV	0x18(%RBP),%RDI

    (3231) 0x4fe533 MOVSD	-0x8(%RDI,%RSI,1),%XMM8

    (3231) 0x4fe53a MINSD	%XMM8,%XMM5

    (3231) 0x4fe53f ADDSD	%XMM8,%XMM7

    (3231) 0x4fe544 MOV	0x30(%RBP),%RDI

    (3231) 0x4fe548 MOV	(%RDI,%RSI,1),%RDI

    (3231) 0x4fe54c CMP	(%R15,%RDI,8),%R11

    (3231) 0x4fe550 JNE	4fe4e0

    (3231) 0x4fe552 JMP	4fe5a5

0x4fe554 NOPW	%CS:(%RAX,%RAX,1)

    (3231) 0x4fe560 MOV	0x30(%RBP),%RDI

    (3231) 0x4fe564 MOV	-0x10(%RDI,%RSI,1),%RDI

    (3231) 0x4fe569 CMP	(%R15,%RDI,8),%R11

    (3231) 0x4fe56d JNE	4fe520

    (3231) 0x4fe56f MOV	0x18(%RBP),%RDI

    (3231) 0x4fe573 MOVSD	-0x10(%RDI,%RSI,1),%XMM8

    (3231) 0x4fe57a MINSD	%XMM8,%XMM5

    (3231) 0x4fe57f ADDSD	%XMM8,%XMM7

    (3231) 0x4fe584 MOV	0x30(%RBP),%RDI

    (3231) 0x4fe588 MOV	-0x8(%RDI,%RSI,1),%RDI

    (3231) 0x4fe58d CMP	(%R15,%RDI,8),%R11

    (3231) 0x4fe591 JE	4fe52f

    (3231) 0x4fe593 MOV	0x30(%RBP),%RDI

    (3231) 0x4fe597 MOV	(%RDI,%RSI,1),%RDI

    (3231) 0x4fe59b CMP	(%R15,%RDI,8),%R11

    (3231) 0x4fe59f JNE	4fe4e0

    (3231) 0x4fe5a5 MOV	0x18(%RBP),%RDI

    (3231) 0x4fe5a9 MOVSD	(%RDI,%RSI,1),%XMM8

    (3231) 0x4fe5af MINSD	%XMM8,%XMM5

    (3231) 0x4fe5b4 ADDSD	%XMM8,%XMM7

    (3231) 0x4fe5b9 JMP	4fe4e0

  (3225) 0x4fe5be MOV	%R14,-0x48(%RBP)

  (3225) 0x4fe5c2 MOV	0x28(%RBP),%RDI

  (3225) 0x4fe5c6 MOV	0x18(%RBP),%RSI

  (3225) 0x4fe5ca MOV	-0x30(%RBP),%R9

  (3225) 0x4fe5ce MOV	-0x38(%RBP),%R14

  (3225) 0x4fe5d2 JMP	4fe6df

  (3225) 0x4fe5d7 MOV	-0x30(%RBP),%R9

  (3225) 0x4fe5db MOV	%R14,-0x48(%RBP)

  (3225) 0x4fe5df LEA	(%R9,%R14,1),%RCX

  (3225) 0x4fe5e3 MOV	0x30(%RBP),%RSI

  (3225) 0x4fe5e7 MOV	0x18(%RSI,%RCX,8),%RSI

  (3225) 0x4fe5ec CMP	(%R15,%RSI,8),%R11

  (3225) 0x4fe5f0 MOV	0x28(%RBP),%RDI

  (3225) 0x4fe5f4 JNE	4fe60b

  (3225) 0x4fe5f6 MOV	0x18(%RBP),%RSI

  (3225) 0x4fe5fa MOVSD	0x18(%RSI,%RCX,8),%XMM8

  (3225) 0x4fe601 MAXSD	%XMM8,%XMM5

  (3225) 0x4fe606 ADDSD	%XMM8,%XMM7

  (3225) 0x4fe60b MOV	-0x38(%RBP),%R14

  (3225) 0x4fe60f MOV	0x30(%RBP),%RSI

  (3225) 0x4fe613 MOV	0x10(%RSI,%RCX,8),%RSI

  (3225) 0x4fe618 CMP	(%R15,%RSI,8),%R11

  (3225) 0x4fe61c JNE	4fe6db

  (3225) 0x4fe622 MOV	0x18(%RBP),%RSI

  (3225) 0x4fe626 MOVSD	0x10(%RSI,%RCX,8),%XMM8

  (3225) 0x4fe62d MAXSD	%XMM8,%XMM5

  (3225) 0x4fe632 ADDSD	%XMM8,%XMM7

  (3225) 0x4fe637 JMP	4fe6df

  (3225) 0x4fe63c MOV	0x18(%RBP),%RSI

  (3225) 0x4fe640 MOV	-0x38(%RBP),%R14

  (3225) 0x4fe644 JMP	4fe710

  (3225) 0x4fe649 MOV	%R14,-0x48(%RBP)

  (3225) 0x4fe64d MOV	0x28(%RBP),%RDI

  (3225) 0x4fe651 MOV	0x18(%RBP),%RSI

  (3225) 0x4fe655 MOV	-0x30(%RBP),%R9

  (3225) 0x4fe659 MOV	-0x38(%RBP),%R14

  (3225) 0x4fe65d JMP	4fe844

  (3225) 0x4fe662 MOV	-0x30(%RBP),%R9

  (3225) 0x4fe666 MOV	%R14,-0x48(%RBP)

  (3225) 0x4fe66a LEA	(%R9,%R14,1),%RCX

  (3225) 0x4fe66e MOV	0x30(%RBP),%RSI

  (3225) 0x4fe672 MOV	0x18(%RSI,%RCX,8),%RSI

  (3225) 0x4fe677 CMP	(%R15,%RSI,8),%R11

  (3225) 0x4fe67b MOV	0x28(%RBP),%RDI

  (3225) 0x4fe67f JNE	4fe696

  (3225) 0x4fe681 MOV	0x18(%RBP),%RSI

  (3225) 0x4fe685 MOVSD	0x18(%RSI,%RCX,8),%XMM8

  (3225) 0x4fe68c MINSD	%XMM8,%XMM5

  (3225) 0x4fe691 ADDSD	%XMM8,%XMM7

  (3225) 0x4fe696 MOV	-0x38(%RBP),%R14

  (3225) 0x4fe69a MOV	0x30(%RBP),%RSI

  (3225) 0x4fe69e MOV	0x10(%RSI,%RCX,8),%RSI

  (3225) 0x4fe6a3 CMP	(%R15,%RSI,8),%R11

  (3225) 0x4fe6a7 JNE	4fe840

  (3225) 0x4fe6ad MOV	0x18(%RBP),%RSI

  (3225) 0x4fe6b1 MOVSD	0x10(%RSI,%RCX,8),%XMM8

  (3225) 0x4fe6b8 MINSD	%XMM8,%XMM5

  (3225) 0x4fe6bd ADDSD	%XMM8,%XMM7

  (3225) 0x4fe6c2 JMP	4fe844

  (3225) 0x4fe6c7 MOV	0x88(%RBP),%R11

  (3225) 0x4fe6ce MOV	0x18(%RBP),%RSI

  (3225) 0x4fe6d2 MOV	-0x38(%RBP),%R14

  (3225) 0x4fe6d6 JMP	4fe86d

  (3225) 0x4fe6db MOV	0x18(%RBP),%RSI

  (3225) 0x4fe6df ADD	-0x48(%RBP),%RAX

  (3225) 0x4fe6e3 MOV	0x30(%RBP),%RCX

  (3225) 0x4fe6e7 MOV	(%RCX,%RAX,8),%RCX

  (3225) 0x4fe6eb CMP	(%R15,%RCX,8),%R11

  (3225) 0x4fe6ef JNE	4fe710

  (3225) 0x4fe6f1 MOVSD	(%RSI,%RAX,8),%XMM8

  (3225) 0x4fe6f7 MAXSD	%XMM8,%XMM5

  (3225) 0x4fe6fc ADDSD	%XMM8,%XMM7

  (3225) 0x4fe701 NOPW	%CS:(%RAX,%RAX,1)

  (3225) 0x4fe710 MOV	(%RBX,%RDX,8),%RCX

  (3225) 0x4fe714 MOV	(%RBX,%R8,8),%R11

  (3225) 0x4fe718 MOV	%R11,-0x48(%RBP)

  (3225) 0x4fe71c SUB	%RCX,%R11

  (3225) 0x4fe71f JLE	4fe765

  (3225) 0x4fe721 MOV	%RCX,-0x40(%RBP)

  (3225) 0x4fe725 MOV	(%R15,%RDX,8),%R9

  (3225) 0x4fe729 CMP	$0x4,%R11

  (3225) 0x4fe72d JAE	4fe774

  (3225) 0x4fe72f MOV	%R11,%RCX

  (3225) 0x4fe732 AND	$-0x4,%RCX

  (3225) 0x4fe736 AND	$0x3,%R11D

  (3225) 0x4fe73a CMP	$0x1,%R11

  (3225) 0x4fe73e JE	4fe9e8

  (3225) 0x4fe744 CMP	$0x3,%R11D

  (3225) 0x4fe748 MOV	-0x38(%RBP),%RAX

  (3225) 0x4fe74c JE	4fe9f9

  (3225) 0x4fe752 CMP	$0x2,%R11D

  (3225) 0x4fe756 JNE	4fea7e

  (3225) 0x4fe75c ADD	-0x40(%RBP),%RCX

  (3225) 0x4fe760 JMP	4fea25

  (3225) 0x4fe765 MOV	%R14,%RAX

  (3225) 0x4fe768 MOV	0x88(%RBP),%R11

  (3225) 0x4fe76f JMP	4ff014

  (3225) 0x4fe774 MOV	%R11,%RCX

  (3225) 0x4fe777 SHR	$0x2,%RCX

  (3225) 0x4fe77b MOV	%RDX,%RAX

  (3225) 0x4fe77e MOV	-0x40(%RBP),%RDX

  (3225) 0x4fe782 LEA	0x18(,%RDX,8),%RDI

  (3225) 0x4fe78a MOV	%RAX,%RDX

  (3225) 0x4fe78d JMP	4fe799

0x4fe78f NOP

    (3232) 0x4fe790 ADD	$0x20,%RDI

    (3232) 0x4fe794 DEC	%RCX

    (3232) 0x4fe797 JE	4fe72f

    (3232) 0x4fe799 MOV	0x38(%RBP),%RSI

    (3232) 0x4fe79d MOV	-0x18(%RSI,%RDI,1),%R14

    (3232) 0x4fe7a2 MOV	0x70(%RBP),%RSI

    (3232) 0x4fe7a6 CMP	(%RSI,%R14,8),%R9

    (3232) 0x4fe7aa JNE	4fe7c1

    (3232) 0x4fe7ac MOV	0x28(%RBP),%RSI

    (3232) 0x4fe7b0 MOVSD	-0x18(%RSI,%RDI,1),%XMM8

    (3232) 0x4fe7b7 MAXSD	%XMM8,%XMM5

    (3232) 0x4fe7bc ADDSD	%XMM8,%XMM7

    (3232) 0x4fe7c1 MOV	0x38(%RBP),%RSI

    (3232) 0x4fe7c5 MOV	-0x10(%RSI,%RDI,1),%R14

    (3232) 0x4fe7ca MOV	0x70(%RBP),%RSI

    (3232) 0x4fe7ce CMP	(%RSI,%R14,8),%R9

    (3232) 0x4fe7d2 JNE	4fe7e9

    (3232) 0x4fe7d4 MOV	0x28(%RBP),%RSI

    (3232) 0x4fe7d8 MOVSD	-0x10(%RSI,%RDI,1),%XMM8

    (3232) 0x4fe7df MAXSD	%XMM8,%XMM5

    (3232) 0x4fe7e4 ADDSD	%XMM8,%XMM7

    (3232) 0x4fe7e9 MOV	0x38(%RBP),%RSI

    (3232) 0x4fe7ed MOV	-0x8(%RSI,%RDI,1),%R14

    (3232) 0x4fe7f2 MOV	0x70(%RBP),%RSI

    (3232) 0x4fe7f6 CMP	(%RSI,%R14,8),%R9

    (3232) 0x4fe7fa JNE	4fe811

    (3232) 0x4fe7fc MOV	0x28(%RBP),%RSI

    (3232) 0x4fe800 MOVSD	-0x8(%RSI,%RDI,1),%XMM8

    (3232) 0x4fe807 MAXSD	%XMM8,%XMM5

    (3232) 0x4fe80c ADDSD	%XMM8,%XMM7

    (3232) 0x4fe811 MOV	0x38(%RBP),%RSI

    (3232) 0x4fe815 MOV	(%RSI,%RDI,1),%R14

    (3232) 0x4fe819 MOV	0x70(%RBP),%RSI

    (3232) 0x4fe81d CMP	(%RSI,%R14,8),%R9

    (3232) 0x4fe821 JNE	4fe790

    (3232) 0x4fe827 MOV	0x28(%RBP),%RSI

    (3232) 0x4fe82b MOVSD	(%RSI,%RDI,1),%XMM8

    (3232) 0x4fe831 MAXSD	%XMM8,%XMM5

    (3232) 0x4fe836 ADDSD	%XMM8,%XMM7

    (3232) 0x4fe83b JMP	4fe790

  (3225) 0x4fe840 MOV	0x18(%RBP),%RSI

  (3225) 0x4fe844 ADD	-0x48(%RBP),%RAX

  (3225) 0x4fe848 MOV	0x30(%RBP),%RCX

  (3225) 0x4fe84c MOV	(%RCX,%RAX,8),%RCX

  (3225) 0x4fe850 CMP	(%R15,%RCX,8),%R11

  (3225) 0x4fe854 JNE	4fe866

  (3225) 0x4fe856 MOVSD	(%RSI,%RAX,8),%XMM8

  (3225) 0x4fe85c MINSD	%XMM8,%XMM5

  (3225) 0x4fe861 ADDSD	%XMM8,%XMM7

  (3225) 0x4fe866 MOV	0x88(%RBP),%R11

  (3225) 0x4fe86d MOV	%R10,-0x58(%RBP)

  (3225) 0x4fe871 MOV	%R12,%R10

  (3225) 0x4fe874 MOV	%R13,%R12

  (3225) 0x4fe877 MOV	%R14,%RAX

  (3225) 0x4fe87a MOV	(%RBX,%RDX,8),%R14

  (3225) 0x4fe87e MOV	%RBX,%R13

  (3225) 0x4fe881 MOV	(%RBX,%R8,8),%RCX

  (3225) 0x4fe885 MOV	%RCX,-0x48(%RBP)

  (3225) 0x4fe889 MOV	%RDX,%RBX

  (3225) 0x4fe88c MOV	%R14,%RDX

  (3225) 0x4fe88f MOV	%R14,-0x40(%RBP)

  (3225) 0x4fe893 SUB	%R14,%RCX

  (3225) 0x4fe896 JLE	4fe8ec

  (3225) 0x4fe898 MOV	(%R15,%RBX,8),%R9

  (3225) 0x4fe89c CMP	$0x4,%RCX

  (3225) 0x4fe8a0 MOV	%RBX,%RDX

  (3225) 0x4fe8a3 JAE	4fe905

  (3225) 0x4fe8a5 MOV	%R13,%RBX

  (3225) 0x4fe8a8 MOV	%R12,%R13

  (3225) 0x4fe8ab MOV	%R10,%R12

  (3225) 0x4fe8ae MOV	-0x58(%RBP),%R10

  (3225) 0x4fe8b2 MOV	%RCX,%RDI

  (3225) 0x4fe8b5 AND	$-0x4,%RDI

  (3225) 0x4fe8b9 AND	$0x3,%ECX

  (3225) 0x4fe8bc CMP	$0x1,%RCX

  (3225) 0x4fe8c0 JE	4fea8a

  (3225) 0x4fe8c6 CMP	$0x3,%ECX

  (3225) 0x4fe8c9 MOV	0x88(%RBP),%R11

  (3225) 0x4fe8d0 MOV	-0x38(%RBP),%RAX

  (3225) 0x4fe8d4 JE	4fea9b

  (3225) 0x4fe8da CMP	$0x2,%ECX

  (3225) 0x4fe8dd JNE	4feb2f

  (3225) 0x4fe8e3 ADD	-0x40(%RBP),%RDI

  (3225) 0x4fe8e7 JMP	4feac7

  (3225) 0x4fe8ec MOV	%RBX,%RDX

  (3225) 0x4fe8ef MOV	-0x40(%RBP),%RCX

  (3225) 0x4fe8f3 MOV	%R13,%RBX

  (3225) 0x4fe8f6 MOV	%R12,%R13

  (3225) 0x4fe8f9 MOV	%R10,%R12

  (3225) 0x4fe8fc MOV	-0x58(%RBP),%R10

  (3225) 0x4fe900 JMP	4ff014

  (3225) 0x4fe905 MOV	%RCX,%R11

  (3225) 0x4fe908 SHR	$0x2,%R11

  (3225) 0x4fe90c MOV	%RDX,%RAX

  (3225) 0x4fe90f MOV	-0x40(%RBP),%RDX

  (3225) 0x4fe913 LEA	0x18(,%RDX,8),%RDI

  (3225) 0x4fe91b MOV	%RAX,%RDX

  (3225) 0x4fe91e MOV	%R13,%RBX

  (3225) 0x4fe921 MOV	%R12,%R13

  (3225) 0x4fe924 MOV	%R10,%R12

  (3225) 0x4fe927 MOV	-0x58(%RBP),%R10

  (3225) 0x4fe92b JMP	4fe941

0x4fe92d NOPL	(%RAX)

    (3230) 0x4fe930 MOV	0x18(%RBP),%RSI

    (3230) 0x4fe934 ADD	$0x20,%RDI

    (3230) 0x4fe938 DEC	%R11

    (3230) 0x4fe93b JE	4fe8b2

    (3230) 0x4fe941 MOV	0x38(%RBP),%RSI

    (3230) 0x4fe945 MOV	-0x18(%RSI,%RDI,1),%R14

    (3230) 0x4fe94a MOV	0x70(%RBP),%RSI

    (3230) 0x4fe94e CMP	(%RSI,%R14,8),%R9

    (3230) 0x4fe952 JNE	4fe969

    (3230) 0x4fe954 MOV	0x28(%RBP),%RSI

    (3230) 0x4fe958 MOVSD	-0x18(%RSI,%RDI,1),%XMM8

    (3230) 0x4fe95f MINSD	%XMM8,%XMM5

    (3230) 0x4fe964 ADDSD	%XMM8,%XMM7

    (3230) 0x4fe969 MOV	0x38(%RBP),%RSI

    (3230) 0x4fe96d MOV	-0x10(%RSI,%RDI,1),%R14

    (3230) 0x4fe972 MOV	0x70(%RBP),%RSI

    (3230) 0x4fe976 CMP	(%RSI,%R14,8),%R9

    (3230) 0x4fe97a JNE	4fe991

    (3230) 0x4fe97c MOV	0x28(%RBP),%RSI

    (3230) 0x4fe980 MOVSD	-0x10(%RSI,%RDI,1),%XMM8

    (3230) 0x4fe987 MINSD	%XMM8,%XMM5

    (3230) 0x4fe98c ADDSD	%XMM8,%XMM7

    (3230) 0x4fe991 MOV	0x38(%RBP),%RSI

    (3230) 0x4fe995 MOV	-0x8(%RSI,%RDI,1),%R14

    (3230) 0x4fe99a MOV	0x70(%RBP),%RSI

    (3230) 0x4fe99e CMP	(%RSI,%R14,8),%R9

    (3230) 0x4fe9a2 JNE	4fe9b9

    (3230) 0x4fe9a4 MOV	0x28(%RBP),%RSI

    (3230) 0x4fe9a8 MOVSD	-0x8(%RSI,%RDI,1),%XMM8

    (3230) 0x4fe9af MINSD	%XMM8,%XMM5

    (3230) 0x4fe9b4 ADDSD	%XMM8,%XMM7

    (3230) 0x4fe9b9 MOV	0x38(%RBP),%RSI

    (3230) 0x4fe9bd MOV	(%RSI,%RDI,1),%R14

    (3230) 0x4fe9c1 MOV	0x70(%RBP),%RSI

    (3230) 0x4fe9c5 CMP	(%RSI,%R14,8),%R9

    (3230) 0x4fe9c9 JNE	4fe930

    (3230) 0x4fe9cf MOV	0x28(%RBP),%RSI

    (3230) 0x4fe9d3 MOVSD	(%RSI,%RDI,1),%XMM8

    (3230) 0x4fe9d9 MINSD	%XMM8,%XMM5

    (3230) 0x4fe9de ADDSD	%XMM8,%XMM7

    (3230) 0x4fe9e3 JMP	4fe930

  (3225) 0x4fe9e8 ADD	-0x40(%RBP),%RCX

  (3225) 0x4fe9ec MOV	0x88(%RBP),%R11

  (3225) 0x4fe9f3 MOV	-0x38(%RBP),%RAX

  (3225) 0x4fe9f7 JMP	4fea54

  (3225) 0x4fe9f9 ADD	-0x40(%RBP),%RCX

  (3225) 0x4fe9fd MOV	0x38(%RBP),%RSI

  (3225) 0x4fea01 MOV	0x10(%RSI,%RCX,8),%RDI

  (3225) 0x4fea06 MOV	0x70(%RBP),%RSI

  (3225) 0x4fea0a CMP	(%RSI,%RDI,8),%R9

  (3225) 0x4fea0e JNE	4fea25

  (3225) 0x4fea10 MOV	0x28(%RBP),%RSI

  (3225) 0x4fea14 MOVSD	0x10(%RSI,%RCX,8),%XMM8

  (3225) 0x4fea1b MAXSD	%XMM8,%XMM5

  (3225) 0x4fea20 ADDSD	%XMM8,%XMM7

  (3225) 0x4fea25 MOV	0x88(%RBP),%R11

  (3225) 0x4fea2c MOV	0x38(%RBP),%RSI

  (3225) 0x4fea30 MOV	0x8(%RSI,%RCX,8),%RDI

  (3225) 0x4fea35 MOV	0x70(%RBP),%RSI

  (3225) 0x4fea39 CMP	(%RSI,%RDI,8),%R9

  (3225) 0x4fea3d JNE	4fea54

  (3225) 0x4fea3f MOV	0x28(%RBP),%RSI

  (3225) 0x4fea43 MOVSD	0x8(%RSI,%RCX,8),%XMM8

  (3225) 0x4fea4a MAXSD	%XMM8,%XMM5

  (3225) 0x4fea4f ADDSD	%XMM8,%XMM7

  (3225) 0x4fea54 MOV	0x38(%RBP),%RSI

  (3225) 0x4fea58 MOV	(%RSI,%RCX,8),%RDI

  (3225) 0x4fea5c MOV	0x70(%RBP),%RSI

  (3225) 0x4fea60 CMP	(%RSI,%RDI,8),%R9

  (3225) 0x4fea64 JNE	4feb1a

  (3225) 0x4fea6a MOV	0x28(%RBP),%RDI

  (3225) 0x4fea6e MOVSD	(%RDI,%RCX,8),%XMM8

  (3225) 0x4fea74 MAXSD	%XMM8,%XMM5

  (3225) 0x4fea79 JMP	4feb13

  (3225) 0x4fea7e MOV	0x88(%RBP),%R11

  (3225) 0x4fea85 JMP	4feb1a

  (3225) 0x4fea8a ADD	-0x40(%RBP),%RDI

  (3225) 0x4fea8e MOV	0x88(%RBP),%R11

  (3225) 0x4fea95 MOV	-0x38(%RBP),%RAX

  (3225) 0x4fea99 JMP	4feaef

  (3225) 0x4fea9b ADD	-0x40(%RBP),%RDI

  (3225) 0x4fea9f MOV	0x38(%RBP),%RCX

  (3225) 0x4feaa3 MOV	0x10(%RCX,%RDI,8),%RCX

  (3225) 0x4feaa8 MOV	0x70(%RBP),%RSI

  (3225) 0x4feaac CMP	(%RSI,%RCX,8),%R9

  (3225) 0x4feab0 JNE	4feac7

  (3225) 0x4feab2 MOV	0x28(%RBP),%RCX

  (3225) 0x4feab6 MOVSD	0x10(%RCX,%RDI,8),%XMM8

  (3225) 0x4feabd MINSD	%XMM8,%XMM5

  (3225) 0x4feac2 ADDSD	%XMM8,%XMM7

  (3225) 0x4feac7 MOV	0x38(%RBP),%RCX

  (3225) 0x4feacb MOV	0x8(%RCX,%RDI,8),%RCX

  (3225) 0x4fead0 MOV	0x70(%RBP),%RSI

  (3225) 0x4fead4 CMP	(%RSI,%RCX,8),%R9

  (3225) 0x4fead8 JNE	4feaef

  (3225) 0x4feada MOV	0x28(%RBP),%RCX

  (3225) 0x4feade MOVSD	0x8(%RCX,%RDI,8),%XMM8

  (3225) 0x4feae5 MINSD	%XMM8,%XMM5

  (3225) 0x4feaea ADDSD	%XMM8,%XMM7

  (3225) 0x4feaef MOV	0x38(%RBP),%RCX

  (3225) 0x4feaf3 MOV	(%RCX,%RDI,8),%RCX

  (3225) 0x4feaf7 MOV	0x70(%RBP),%RSI

  (3225) 0x4feafb CMP	(%RSI,%RCX,8),%R9

  (3225) 0x4feaff JNE	4feb1a

  (3225) 0x4feb01 MOV	0x28(%RBP),%RCX

  (3225) 0x4feb05 MOVSD	(%RCX,%RDI,8),%XMM8

  (3225) 0x4feb0b MOV	%RCX,%RDI

  (3225) 0x4feb0e MINSD	%XMM8,%XMM5

  (3225) 0x4feb13 ADDSD	%XMM8,%XMM7

  (3225) 0x4feb18 JMP	4feb1e

  (3225) 0x4feb1a MOV	0x28(%RBP),%RDI

  (3225) 0x4feb1e MOV	0x18(%RBP),%RSI

  (3225) 0x4feb22 MOV	-0x30(%RBP),%R9

  (3225) 0x4feb26 MOV	-0x40(%RBP),%RCX

  (3225) 0x4feb2a JMP	4ff014

  (3225) 0x4feb2f MOV	0x28(%RBP),%RDI

  (3225) 0x4feb33 JMP	4feb22

  (3225) 0x4feb35 MOV	0x88(%RBP),%R11

  (3225) 0x4feb3c MOV	0x28(%RBP),%RDI

  (3225) 0x4feb40 MOV	0x18(%RBP),%RSI

  (3225) 0x4feb44 JMP	4febfb

0x4feb49 LEA	(%R9,%R11,1),%RCX

0x4feb4d MOV	0x28(%RBP),%RDI

0x4feb51 JMP	4febd0

0x4feb53 LEA	(%R9,%R11,1),%RCX

0x4feb57 MOV	0x28(%RBP),%RDI

0x4feb5b JMP	4febbf

0x4feb5d LEA	(%R9,%R11,1),%RCX

0x4feb61 MOV	0x28(%RBP),%RDI

0x4feb65 JMP	4febae

0x4feb67 LEA	(%R9,%R11,1),%RCX

0x4feb6b JMP	4feb99

0x4feb6d LEA	(%R9,%R11,1),%RCX

0x4feb71 JMP	4feb88

0x4feb73 LEA	(%R9,%R11,1),%RCX

0x4feb77 MOVSD	0x38(%RSI,%RCX,8),%XMM8

0x4feb7e MAXSD	%XMM8,%XMM5

0x4feb83 ADDSD	%XMM8,%XMM7

0x4feb88 MOVSD	0x30(%RSI,%RCX,8),%XMM8

0x4feb8f MAXSD	%XMM8,%XMM5

0x4feb94 ADDSD	%XMM8,%XMM7

0x4feb99 MOV	0x28(%RBP),%RDI

0x4feb9d MOVSD	0x28(%RSI,%RCX,8),%XMM8

0x4feba4 MAXSD	%XMM8,%XMM5

0x4feba9 ADDSD	%XMM8,%XMM7

0x4febae MOVSD	0x20(%RSI,%RCX,8),%XMM8

0x4febb5 MAXSD	%XMM8,%XMM5

0x4febba ADDSD	%XMM8,%XMM7

0x4febbf MOVSD	0x18(%RSI,%RCX,8),%XMM8

0x4febc6 MAXSD	%XMM8,%XMM5

0x4febcb ADDSD	%XMM8,%XMM7

0x4febd0 MOVSD	0x10(%RSI,%RCX,8),%XMM8

0x4febd7 MAXSD	%XMM8,%XMM5

0x4febdc ADDSD	%XMM8,%XMM7

0x4febe1 ADD	%R11,%RAX

0x4febe4 MOVSD	(%RSI,%RAX,8),%XMM8

0x4febea MAXSD	%XMM8,%XMM5

0x4febef ADDSD	%XMM8,%XMM7

0x4febf4 MOV	0x88(%RBP),%R11

  (3225) 0x4febfb MOV	(%RBX,%RDX,8),%RCX

  (3225) 0x4febff MOV	(%RBX,%R8,8),%R9

  (3225) 0x4fec03 MOV	%R9,-0x48(%RBP)

  (3225) 0x4fec07 SUB	%RCX,%R9

  (3225) 0x4fec0a JLE	4ff00c

  (3225) 0x4fec10 MOV	%RCX,%R14

  (3225) 0x4fec13 CMP	$0x8,%R9

  (3225) 0x4fec17 JB	4fecc7

  (3225) 0x4fec1d MOV	%R9,%RCX

  (3225) 0x4fec20 SHR	$0x3,%RCX

  (3225) 0x4fec24 MOV	-0x60(%RBP),%RDI

  (3225) 0x4fec28 LEA	(%RDI,%R14,8),%RDI

  (3225) 0x4fec2c NOPL	(%RAX)

    (3228) 0x4fec30 MOVSD	-0x38(%RDI),%XMM8

    (3228) 0x4fec36 MOVSD	-0x30(%RDI),%XMM9

    (3228) 0x4fec3c MAXSD	%XMM8,%XMM5

    (3228) 0x4fec41 ADDSD	%XMM8,%XMM7

    (3228) 0x4fec46 MOVSD	-0x28(%RDI),%XMM8

    (3228) 0x4fec4c MOVAPD	%XMM8,%XMM10

    (3228) 0x4fec51 MAXSD	%XMM9,%XMM10

    (3228) 0x4fec56 MAXSD	%XMM5,%XMM10

    (3228) 0x4fec5b ADDSD	%XMM9,%XMM8

    (3228) 0x4fec60 ADDSD	%XMM7,%XMM8

    (3228) 0x4fec65 MOVSD	-0x20(%RDI),%XMM5

    (3228) 0x4fec6a MOVSD	-0x18(%RDI),%XMM9

    (3228) 0x4fec70 MOVAPD	%XMM9,%XMM11

    (3228) 0x4fec75 MAXSD	%XMM5,%XMM11

    (3228) 0x4fec7a ADDSD	%XMM5,%XMM9

    (3228) 0x4fec7f MOVSD	-0x10(%RDI),%XMM5

    (3228) 0x4fec84 MAXSD	%XMM5,%XMM11

    (3228) 0x4fec89 MAXSD	%XMM10,%XMM11

    (3228) 0x4fec8e ADDSD	%XMM5,%XMM9

    (3228) 0x4fec93 ADDSD	%XMM8,%XMM9

    (3228) 0x4fec98 MOVSD	-0x8(%RDI),%XMM8

    (3228) 0x4fec9e MOVSD	(%RDI),%XMM7

    (3228) 0x4feca2 MOVAPD	%XMM7,%XMM5

    (3228) 0x4feca6 MAXSD	%XMM8,%XMM5

    (3228) 0x4fecab MAXSD	%XMM11,%XMM5

    (3228) 0x4fecb0 ADDSD	%XMM8,%XMM7

    (3228) 0x4fecb5 ADDSD	%XMM9,%XMM7

    (3228) 0x4fecba ADD	$0x40,%RDI

    (3228) 0x4fecbe DEC	%RCX

    (3228) 0x4fecc1 JNE	4fec30

  (3225) 0x4fecc7 MOV	%R9D,%ECX

  (3225) 0x4fecca AND	$0x7,%ECX

  (3225) 0x4feccd DEC	%RCX

  (3225) 0x4fecd0 CMP	$0x6,%RCX

  (3225) 0x4fecd4 JA	4feeb0

0x4fecda AND	$-0x8,%R9

0x4fecde MOV	0x28(%RBP),%RDI

0x4fece2 JMP	0x5d7348(,%RCX,8)

0x4fece9 MOV	%R14,%RCX

0x4fecec ADD	%R14,%R9

0x4fecef JMP	4fef58

  (3225) 0x4fecf4 MOV	0x88(%RBP),%R11

  (3225) 0x4fecfb MOV	0x28(%RBP),%RDI

  (3225) 0x4fecff MOV	0x18(%RBP),%RSI

  (3225) 0x4fed03 JMP	4fedba

0x4fed08 LEA	(%R9,%R11,1),%RCX

0x4fed0c MOV	0x28(%RBP),%RDI

0x4fed10 JMP	4fed8f

0x4fed12 LEA	(%R9,%R11,1),%RCX

0x4fed16 MOV	0x28(%RBP),%RDI

0x4fed1a JMP	4fed7e

0x4fed1c LEA	(%R9,%R11,1),%RCX

0x4fed20 MOV	0x28(%RBP),%RDI

0x4fed24 JMP	4fed6d

0x4fed26 LEA	(%R9,%R11,1),%RCX

0x4fed2a JMP	4fed58

0x4fed2c LEA	(%R9,%R11,1),%RCX

0x4fed30 JMP	4fed47

0x4fed32 LEA	(%R9,%R11,1),%RCX

0x4fed36 MOVSD	0x38(%RSI,%RCX,8),%XMM8

0x4fed3d MINSD	%XMM8,%XMM5

0x4fed42 ADDSD	%XMM8,%XMM7

0x4fed47 MOVSD	0x30(%RSI,%RCX,8),%XMM8

0x4fed4e MINSD	%XMM8,%XMM5

0x4fed53 ADDSD	%XMM8,%XMM7

0x4fed58 MOV	0x28(%RBP),%RDI

0x4fed5c MOVSD	0x28(%RSI,%RCX,8),%XMM8

0x4fed63 MINSD	%XMM8,%XMM5

0x4fed68 ADDSD	%XMM8,%XMM7

0x4fed6d MOVSD	0x20(%RSI,%RCX,8),%XMM8

0x4fed74 MINSD	%XMM8,%XMM5

0x4fed79 ADDSD	%XMM8,%XMM7

0x4fed7e MOVSD	0x18(%RSI,%RCX,8),%XMM8

0x4fed85 MINSD	%XMM8,%XMM5

0x4fed8a ADDSD	%XMM8,%XMM7

0x4fed8f MOVSD	0x10(%RSI,%RCX,8),%XMM8

0x4fed96 MINSD	%XMM8,%XMM5

0x4fed9b ADDSD	%XMM8,%XMM7

0x4feda0 ADD	%R11,%RAX

0x4feda3 MOVSD	(%RSI,%RAX,8),%XMM8

0x4feda9 MINSD	%XMM8,%XMM5

0x4fedae ADDSD	%XMM8,%XMM7

0x4fedb3 MOV	0x88(%RBP),%R11

  (3225) 0x4fedba MOV	(%RBX,%RDX,8),%RCX

  (3225) 0x4fedbe MOV	(%RBX,%R8,8),%R9

  (3225) 0x4fedc2 MOV	%R9,-0x48(%RBP)

  (3225) 0x4fedc6 SUB	%RCX,%R9

  (3225) 0x4fedc9 JLE	4ff00c

  (3225) 0x4fedcf MOV	%RCX,%R14

  (3225) 0x4fedd2 CMP	$0x8,%R9

  (3225) 0x4fedd6 JB	4fee87

  (3225) 0x4feddc MOV	%R9,%RCX

  (3225) 0x4feddf SHR	$0x3,%RCX

  (3225) 0x4fede3 MOV	-0x60(%RBP),%RDI

  (3225) 0x4fede7 LEA	(%RDI,%R14,8),%RDI

  (3225) 0x4fedeb NOPL	(%RAX,%RAX,1)

    (3226) 0x4fedf0 MOVSD	-0x38(%RDI),%XMM8

    (3226) 0x4fedf6 MOVSD	-0x30(%RDI),%XMM9

    (3226) 0x4fedfc MINSD	%XMM8,%XMM5

    (3226) 0x4fee01 ADDSD	%XMM8,%XMM7

    (3226) 0x4fee06 MOVSD	-0x28(%RDI),%XMM8

    (3226) 0x4fee0c MOVAPD	%XMM9,%XMM10

    (3226) 0x4fee11 MINSD	%XMM8,%XMM10

    (3226) 0x4fee16 MINSD	%XMM5,%XMM10

    (3226) 0x4fee1b ADDSD	%XMM9,%XMM8

    (3226) 0x4fee20 ADDSD	%XMM7,%XMM8

    (3226) 0x4fee25 MOVSD	-0x20(%RDI),%XMM5

    (3226) 0x4fee2a MOVSD	-0x18(%RDI),%XMM9

    (3226) 0x4fee30 MOVAPD	%XMM5,%XMM11

    (3226) 0x4fee35 MINSD	%XMM9,%XMM11

    (3226) 0x4fee3a ADDSD	%XMM5,%XMM9

    (3226) 0x4fee3f MOVSD	-0x10(%RDI),%XMM5

    (3226) 0x4fee44 MINSD	%XMM5,%XMM11

    (3226) 0x4fee49 MINSD	%XMM10,%XMM11

    (3226) 0x4fee4e ADDSD	%XMM5,%XMM9

    (3226) 0x4fee53 ADDSD	%XMM8,%XMM9

    (3226) 0x4fee58 MOVSD	-0x8(%RDI),%XMM8

    (3226) 0x4fee5e MOVSD	(%RDI),%XMM7

    (3226) 0x4fee62 MOVAPD	%XMM8,%XMM5

    (3226) 0x4fee67 MINSD	%XMM7,%XMM5

    (3226) 0x4fee6b MINSD	%XMM11,%XMM5

    (3226) 0x4fee70 ADDSD	%XMM8,%XMM7

    (3226) 0x4fee75 ADDSD	%XMM9,%XMM7

    (3226) 0x4fee7a ADD	$0x40,%RDI

    (3226) 0x4fee7e DEC	%RCX

    (3226) 0x4fee81 JNE	4fedf0

  (3225) 0x4fee87 MOV	%R9D,%ECX

  (3225) 0x4fee8a AND	$0x7,%ECX

  (3225) 0x4fee8d DEC	%RCX

  (3225) 0x4fee90 CMP	$0x6,%RCX

  (3225) 0x4fee94 JA	4feeb0

0x4fee96 AND	$-0x8,%R9

0x4fee9a MOV	0x28(%RBP),%RDI

0x4fee9e JMP	0x5d72d8(,%RCX,8)

0x4feea5 MOV	%R14,%RCX

0x4feea8 ADD	%R14,%R9

0x4feeab JMP	4feffc

  (3225) 0x4feeb0 MOV	0x28(%RBP),%RDI

  (3225) 0x4feeb4 MOV	-0x30(%RBP),%R9

  (3225) 0x4feeb8 MOV	-0x38(%RBP),%RAX

  (3225) 0x4feebc MOV	%R14,%RCX

  (3225) 0x4feebf JMP	4ff014

0x4feec4 MOV	%R14,%RCX

0x4feec7 ADD	%R14,%R9

0x4feeca JMP	4fef47

0x4feecc MOV	%R14,%RCX

0x4feecf ADD	%R14,%R9

0x4feed2 JMP	4fef36

0x4feed4 MOV	%R14,%RCX

0x4feed7 ADD	%R14,%R9

0x4feeda JMP	4fef25

0x4feedc MOV	%R14,%RCX

0x4feedf ADD	%R14,%R9

0x4feee2 JMP	4fef14

0x4feee4 MOV	%R14,%RCX

0x4feee7 ADD	%R14,%R9

0x4feeea JMP	4fef03

0x4feeec MOV	%R14,%RCX

0x4feeef ADD	%R14,%R9

0x4feef2 MOVSD	0x30(%RDI,%R9,8),%XMM8

0x4feef9 MAXSD	%XMM8,%XMM5

0x4feefe ADDSD	%XMM8,%XMM7

0x4fef03 MOVSD	0x28(%RDI,%R9,8),%XMM8

0x4fef0a MAXSD	%XMM8,%XMM5

0x4fef0f ADDSD	%XMM8,%XMM7

0x4fef14 MOVSD	0x20(%RDI,%R9,8),%XMM8

0x4fef1b MAXSD	%XMM8,%XMM5

0x4fef20 ADDSD	%XMM8,%XMM7

0x4fef25 MOVSD	0x18(%RDI,%R9,8),%XMM8

0x4fef2c MAXSD	%XMM8,%XMM5

0x4fef31 ADDSD	%XMM8,%XMM7

0x4fef36 MOVSD	0x10(%RDI,%R9,8),%XMM8

0x4fef3d MAXSD	%XMM8,%XMM5

0x4fef42 ADDSD	%XMM8,%XMM7

0x4fef47 MOVSD	0x8(%RDI,%R9,8),%XMM8

0x4fef4e MAXSD	%XMM8,%XMM5

0x4fef53 ADDSD	%XMM8,%XMM7

0x4fef58 MOVSD	(%RDI,%R9,8),%XMM8

0x4fef5e MAXSD	%XMM8,%XMM5

0x4fef63 JMP	4ff007

0x4fef68 MOV	%R14,%RCX

0x4fef6b ADD	%R14,%R9

0x4fef6e JMP	4fefeb

0x4fef70 MOV	%R14,%RCX

0x4fef73 ADD	%R14,%R9

0x4fef76 JMP	4fefda

0x4fef78 MOV	%R14,%RCX

0x4fef7b ADD	%R14,%R9

0x4fef7e JMP	4fefc9

0x4fef80 MOV	%R14,%RCX

0x4fef83 ADD	%R14,%R9

0x4fef86 JMP	4fefb8

0x4fef88 MOV	%R14,%RCX

0x4fef8b ADD	%R14,%R9

0x4fef8e JMP	4fefa7

0x4fef90 MOV	%R14,%RCX

0x4fef93 ADD	%R14,%R9

0x4fef96 MOVSD	0x30(%RDI,%R9,8),%XMM8

0x4fef9d MINSD	%XMM8,%XMM5

0x4fefa2 ADDSD	%XMM8,%XMM7

0x4fefa7 MOVSD	0x28(%RDI,%R9,8),%XMM8

0x4fefae MINSD	%XMM8,%XMM5

0x4fefb3 ADDSD	%XMM8,%XMM7

0x4fefb8 MOVSD	0x20(%RDI,%R9,8),%XMM8

0x4fefbf MINSD	%XMM8,%XMM5

0x4fefc4 ADDSD	%XMM8,%XMM7

0x4fefc9 MOVSD	0x18(%RDI,%R9,8),%XMM8

0x4fefd0 MINSD	%XMM8,%XMM5

0x4fefd5 ADDSD	%XMM8,%XMM7

0x4fefda MOVSD	0x10(%RDI,%R9,8),%XMM8

0x4fefe1 MINSD	%XMM8,%XMM5

0x4fefe6 ADDSD	%XMM8,%XMM7

0x4fefeb MOVSD	0x8(%RDI,%R9,8),%XMM8

0x4feff2 MINSD	%XMM8,%XMM5

0x4feff7 ADDSD	%XMM8,%XMM7

0x4feffc MOVSD	(%RDI,%R9,8),%XMM8

0x4ff002 MINSD	%XMM8,%XMM5

0x4ff007 ADDSD	%XMM8,%XMM7

(3224) 0x4ff00c MOV	-0x30(%RBP),%R9

(3224) 0x4ff010 MOV	-0x38(%RBP),%RAX

  (3225) 0x4ff014 MOV	-0x48(%RBP),%R14

  (3225) 0x4ff018 SUB	%RCX,%R14

  (3225) 0x4ff01b MOV	%R9,%RCX

  (3225) 0x4ff01e NOT	%RCX

  (3225) 0x4ff021 ADD	-0x98(%RBP),%R10

  (3225) 0x4ff028 ADD	%RCX,%R10

  (3225) 0x4ff02b ADD	%R14,-0x50(%RBP)

  (3225) 0x4ff02f MOVQ	$-0x1,(%R12,%R9,8)

  (3225) 0x4ff037 ANDPD	%XMM3,%XMM7

  (3225) 0x4ff03b MOVAPD	%XMM6,%XMM8

  (3225) 0x4ff040 ANDPD	%XMM3,%XMM8

  (3225) 0x4ff045 MULSD	%XMM0,%XMM8

  (3225) 0x4ff04a MOV	(%R13,%RDX,8),%R9

  (3225) 0x4ff04f INC	%R9

  (3225) 0x4ff052 UCOMISD	%XMM8,%XMM7

  (3225) 0x4ff057 MOV	(%R13,%R8,8),%RCX

  (3225) 0x4ff05c JBE	4ff0e0

  (3225) 0x4ff062 UCOMISD	%XMM4,%XMM0

  (3225) 0x4ff066 JAE	4ff0e0

  (3225) 0x4ff068 CMP	%RCX,%R9

  (3225) 0x4ff06b MOV	%RAX,%R14

  (3225) 0x4ff06e JGE	4ff08d

    (3243) 0x4ff070 MOVQ	$-0x1,(%R12,%R9,8)

    (3243) 0x4ff078 INC	%R9

    (3243) 0x4ff07b MOV	(%R13,%R8,8),%RCX

    (3243) 0x4ff080 CMP	%RCX,%R9

    (3243) 0x4ff083 JL	4ff070

  (3225) 0x4ff085 MOV	(%R13,%RDX,8),%R9

  (3225) 0x4ff08a INC	%R9

  (3225) 0x4ff08d MOV	(%RBX,%RDX,8),%RSI

  (3225) 0x4ff091 MOV	(%RBX,%R8,8),%RDI

  (3225) 0x4ff095 CMP	%RDI,%RSI

  (3225) 0x4ff098 JGE	4ff0b8

  (3225) 0x4ff09a NOPW	(%RAX,%RAX,1)

    (3242) 0x4ff0a0 MOVQ	$-0x1,(%R11,%RSI,8)

    (3242) 0x4ff0a8 INC	%RSI

    (3242) 0x4ff0ab MOV	(%RBX,%R8,8),%RDI

    (3242) 0x4ff0af CMP	%RDI,%RSI

    (3242) 0x4ff0b2 JL	4ff0a0

  (3225) 0x4ff0b4 MOV	(%RBX,%RDX,8),%RSI

  (3225) 0x4ff0b8 SUB	%RCX,%R10

  (3225) 0x4ff0bb ADD	%R9,%R10

  (3225) 0x4ff0be MOV	-0x50(%RBP),%R9

  (3225) 0x4ff0c2 SUB	%RDI,%R9

  (3225) 0x4ff0c5 ADD	%RSI,%R9

  (3225) 0x4ff0c8 MOV	0x28(%RBP),%RDI

  (3225) 0x4ff0cc MOV	0x18(%RBP),%RSI

  (3225) 0x4ff0d0 JMP	4fe094

0x4ff0d5 NOPW	%CS:(%RAX,%RAX,1)

  (3225) 0x4ff0e0 MOV	%RAX,%R14

  (3225) 0x4ff0e3 CMP	$0x2,%RAX

  (3225) 0x4ff0e7 JL	4ff1d0

  (3225) 0x4ff0ed UCOMISD	%XMM2,%XMM6

  (3225) 0x4ff0f1 JAE	4ff27c

  (3225) 0x4ff0f7 CMP	%RCX,%R9

  (3225) 0x4ff0fa JGE	4ff151

  (3225) 0x4ff0fc MOVAPD	%XMM5,%XMM6

  (3225) 0x4ff100 MULSD	%XMM1,%XMM6

  (3225) 0x4ff104 JMP	4ff125

0x4ff106 NOPW	%CS:(%RAX,%RAX,1)

    (3241) 0x4ff110 MOVQ	$-0x1,(%R12,%R9,8)

    (3241) 0x4ff118 DEC	%R10

    (3241) 0x4ff11b INC	%R9

    (3241) 0x4ff11e CMP	(%R13,%R8,8),%R9

    (3241) 0x4ff123 JGE	4ff151

    (3241) 0x4ff125 UCOMISD	(%RSI,%R9,8),%XMM6

    (3241) 0x4ff12b JAE	4ff110

    (3241) 0x4ff12d MOV	(%R15,%RDX,8),%RSI

    (3241) 0x4ff131 MOV	0x30(%RBP),%RCX

    (3241) 0x4ff135 MOV	(%RCX,%R9,8),%RCX

    (3241) 0x4ff139 CMP	(%R15,%RCX,8),%RSI

    (3241) 0x4ff13d MOV	0x18(%RBP),%RSI

    (3241) 0x4ff141 JNE	4ff110

    (3241) 0x4ff143 MOV	%RCX,(%R12,%R9,8)

    (3241) 0x4ff147 INC	%R9

    (3241) 0x4ff14a CMP	(%R13,%R8,8),%R9

    (3241) 0x4ff14f JL	4ff125

  (3225) 0x4ff151 MOV	(%RBX,%RDX,8),%RCX

  (3225) 0x4ff155 CMP	(%RBX,%R8,8),%RCX

  (3225) 0x4ff159 JGE	4fe090

  (3225) 0x4ff15f MULSD	%XMM1,%XMM5

  (3225) 0x4ff163 MOV	-0x50(%RBP),%R9

  (3225) 0x4ff167 JMP	4ff188

0x4ff169 NOPL	(%RAX)

    (3240) 0x4ff170 MOVQ	$-0x1,(%R11,%RCX,8)

    (3240) 0x4ff178 DEC	%R9

    (3240) 0x4ff17b INC	%RCX

    (3240) 0x4ff17e CMP	(%RBX,%R8,8),%RCX

    (3240) 0x4ff182 JGE	4ff0cc

    (3240) 0x4ff188 UCOMISD	(%RDI,%RCX,8),%XMM5

    (3240) 0x4ff18d JAE	4ff170

    (3240) 0x4ff18f MOV	(%R15,%RDX,8),%RDI

    (3240) 0x4ff193 MOV	0x38(%RBP),%RSI

    (3240) 0x4ff197 MOV	(%RSI,%RCX,8),%RSI

    (3240) 0x4ff19b MOV	%R9,%RAX

    (3240) 0x4ff19e MOV	0x70(%RBP),%R9

    (3240) 0x4ff1a2 CMP	(%R9,%RSI,8),%RDI

    (3240) 0x4ff1a6 MOV	%RAX,%R9

    (3240) 0x4ff1a9 MOV	0x28(%RBP),%RDI

    (3240) 0x4ff1ad JNE	4ff170

    (3240) 0x4ff1af MOV	%RSI,(%R11,%RCX,8)

    (3240) 0x4ff1b3 INC	%RCX

    (3240) 0x4ff1b6 CMP	(%RBX,%R8,8),%RCX

    (3240) 0x4ff1ba JL	4ff188

  (3225) 0x4ff1bc JMP	4ff0cc

0x4ff1c1 NOPW	%CS:(%RAX,%RAX,1)

  (3225) 0x4ff1d0 UCOMISD	%XMM2,%XMM6

  (3225) 0x4ff1d4 JAE	4ff341

  (3225) 0x4ff1da CMP	%RCX,%R9

  (3225) 0x4ff1dd JGE	4ff226

  (3225) 0x4ff1df MOVAPD	%XMM5,%XMM6

  (3225) 0x4ff1e3 MULSD	%XMM1,%XMM6

  (3225) 0x4ff1e7 JMP	4ff206

0x4ff1e9 NOPL	(%RAX)

    (3237) 0x4ff1f0 MOV	0x30(%RBP),%RCX

    (3237) 0x4ff1f4 MOV	(%RCX,%R9,8),%RCX

    (3237) 0x4ff1f8 MOV	%RCX,(%R12,%R9,8)

    (3237) 0x4ff1fc INC	%R9

    (3237) 0x4ff1ff CMP	(%R13,%R8,8),%R9

    (3237) 0x4ff204 JGE	4ff226

    (3237) 0x4ff206 UCOMISD	(%RSI,%R9,8),%XMM6

    (3237) 0x4ff20c JB	4ff1f0

    (3237) 0x4ff20e DEC	%R10

    (3237) 0x4ff211 MOV	$-0x1,%RCX

    (3237) 0x4ff218 MOV	%RCX,(%R12,%R9,8)

    (3237) 0x4ff21c INC	%R9

    (3237) 0x4ff21f CMP	(%R13,%R8,8),%R9

    (3237) 0x4ff224 JL	4ff206

  (3225) 0x4ff226 MOV	(%RBX,%RDX,8),%RAX

  (3225) 0x4ff22a CMP	(%RBX,%R8,8),%RAX

  (3225) 0x4ff22e JGE	4fe090

  (3225) 0x4ff234 MULSD	%XMM1,%XMM5

  (3225) 0x4ff238 MOV	-0x50(%RBP),%R9

  (3225) 0x4ff23c JMP	4ff259

0x4ff23e XCHG	%AX,%AX

    (3236) 0x4ff240 MOV	0x38(%RBP),%RCX

    (3236) 0x4ff244 MOV	(%RCX,%RAX,8),%RCX

    (3236) 0x4ff248 MOV	%RCX,(%R11,%RAX,8)

    (3236) 0x4ff24c INC	%RAX

    (3236) 0x4ff24f CMP	(%RBX,%R8,8),%RAX

    (3236) 0x4ff253 JGE	4fe094

    (3236) 0x4ff259 UCOMISD	(%RDI,%RAX,8),%XMM5

    (3236) 0x4ff25e JB	4ff240

    (3236) 0x4ff260 DEC	%R9

    (3236) 0x4ff263 MOV	$-0x1,%RCX

    (3236) 0x4ff26a MOV	%RCX,(%R11,%RAX,8)

    (3236) 0x4ff26e INC	%RAX

    (3236) 0x4ff271 CMP	(%RBX,%R8,8),%RAX

    (3236) 0x4ff275 JL	4ff259

  (3225) 0x4ff277 JMP	4fe094

  (3225) 0x4ff27c CMP	%RCX,%R9

  (3225) 0x4ff27f JGE	4ff2d1

  (3225) 0x4ff281 MOVAPD	%XMM5,%XMM6

  (3225) 0x4ff285 MULSD	%XMM1,%XMM6

  (3225) 0x4ff289 JMP	4ff2a5

0x4ff28b NOPL	(%RAX,%RAX,1)

    (3239) 0x4ff290 MOVQ	$-0x1,(%R12,%R9,8)

    (3239) 0x4ff298 DEC	%R10

    (3239) 0x4ff29b INC	%R9

    (3239) 0x4ff29e CMP	(%R13,%R8,8),%R9

    (3239) 0x4ff2a3 JGE	4ff2d1

    (3239) 0x4ff2a5 UCOMISD	(%RSI,%R9,8),%XMM6

    (3239) 0x4ff2ab JBE	4ff290

    (3239) 0x4ff2ad MOV	(%R15,%RDX,8),%RSI

    (3239) 0x4ff2b1 MOV	0x30(%RBP),%RCX

    (3239) 0x4ff2b5 MOV	(%RCX,%R9,8),%RCX

    (3239) 0x4ff2b9 CMP	(%R15,%RCX,8),%RSI

    (3239) 0x4ff2bd MOV	0x18(%RBP),%RSI

    (3239) 0x4ff2c1 JNE	4ff290

    (3239) 0x4ff2c3 MOV	%RCX,(%R12,%R9,8)

    (3239) 0x4ff2c7 INC	%R9

    (3239) 0x4ff2ca CMP	(%R13,%R8,8),%R9

    (3239) 0x4ff2cf JL	4ff2a5

  (3225) 0x4ff2d1 MOV	(%RBX,%RDX,8),%RCX

  (3225) 0x4ff2d5 CMP	(%RBX,%R8,8),%RCX

  (3225) 0x4ff2d9 JGE	4fe090

  (3225) 0x4ff2df MULSD	%XMM1,%XMM5

  (3225) 0x4ff2e3 MOV	-0x50(%RBP),%R9

  (3225) 0x4ff2e7 JMP	4ff308

0x4ff2e9 NOPL	(%RAX)

    (3238) 0x4ff2f0 MOVQ	$-0x1,(%R11,%RCX,8)

    (3238) 0x4ff2f8 DEC	%R9

    (3238) 0x4ff2fb INC	%RCX

    (3238) 0x4ff2fe CMP	(%RBX,%R8,8),%RCX

    (3238) 0x4ff302 JGE	4ff0cc

    (3238) 0x4ff308 UCOMISD	(%RDI,%RCX,8),%XMM5

    (3238) 0x4ff30d JBE	4ff2f0

    (3238) 0x4ff30f MOV	(%R15,%RDX,8),%RDI

    (3238) 0x4ff313 MOV	0x38(%RBP),%RSI

    (3238) 0x4ff317 MOV	(%RSI,%RCX,8),%RSI

    (3238) 0x4ff31b MOV	%R9,%RAX

    (3238) 0x4ff31e MOV	0x70(%RBP),%R9

    (3238) 0x4ff322 CMP	(%R9,%RSI,8),%RDI

    (3238) 0x4ff326 MOV	%RAX,%R9

    (3238) 0x4ff329 MOV	0x28(%RBP),%RDI

    (3238) 0x4ff32d JNE	4ff2f0

    (3238) 0x4ff32f MOV	%RSI,(%R11,%RCX,8)

    (3238) 0x4ff333 INC	%RCX

    (3238) 0x4ff336 CMP	(%RBX,%R8,8),%RCX

    (3238) 0x4ff33a JL	4ff308

  (3225) 0x4ff33c JMP	4ff0cc

  (3225) 0x4ff341 MULSD	%XMM1,%XMM5

  (3225) 0x4ff345 CMP	%RCX,%R9

  (3225) 0x4ff348 JL	4ff366

  (3225) 0x4ff34a JMP	4ff386

0x4ff34c NOPL	(%RAX)

    (3235) 0x4ff350 MOV	0x30(%RBP),%RCX

    (3235) 0x4ff354 MOV	(%RCX,%R9,8),%RCX

    (3235) 0x4ff358 MOV	%RCX,(%R12,%R9,8)

    (3235) 0x4ff35c INC	%R9

    (3235) 0x4ff35f CMP	(%R13,%R8,8),%R9

    (3235) 0x4ff364 JGE	4ff386

    (3235) 0x4ff366 UCOMISD	(%RSI,%R9,8),%XMM5

    (3235) 0x4ff36c JA	4ff350

    (3235) 0x4ff36e DEC	%R10

    (3235) 0x4ff371 MOV	$-0x1,%RCX

    (3235) 0x4ff378 MOV	%RCX,(%R12,%R9,8)

    (3235) 0x4ff37c INC	%R9

    (3235) 0x4ff37f CMP	(%R13,%R8,8),%R9

    (3235) 0x4ff384 JL	4ff366

  (3225) 0x4ff386 MOV	(%RBX,%RDX,8),%RAX

  (3225) 0x4ff38a CMP	(%RBX,%R8,8),%RAX

  (3225) 0x4ff38e JGE	4fe090

  (3225) 0x4ff394 MOV	-0x50(%RBP),%R9

  (3225) 0x4ff398 JMP	4ff3b9

0x4ff39a NOPW	(%RAX,%RAX,1)

    (3234) 0x4ff3a0 MOV	0x38(%RBP),%RCX

    (3234) 0x4ff3a4 MOV	(%RCX,%RAX,8),%RCX

    (3234) 0x4ff3a8 MOV	%RCX,(%R11,%RAX,8)

    (3234) 0x4ff3ac INC	%RAX

    (3234) 0x4ff3af CMP	(%RBX,%R8,8),%RAX

    (3234) 0x4ff3b3 JGE	4fe094

    (3234) 0x4ff3b9 UCOMISD	(%RDI,%RAX,8),%XMM5

    (3234) 0x4ff3be JA	4ff3a0

    (3234) 0x4ff3c0 DEC	%R9

    (3234) 0x4ff3c3 MOV	$-0x1,%RCX

    (3234) 0x4ff3ca MOV	%RCX,(%R11,%RAX,8)

    (3234) 0x4ff3ce INC	%RAX

    (3234) 0x4ff3d1 CMP	(%RBX,%R8,8),%RAX

    (3234) 0x4ff3d5 JL	4ff3b9

  (3225) 0x4ff3d7 JMP	4fe094

0x4ff3dc XOR	%R9D,%R9D

0x4ff3df XOR	%R10D,%R10D

0x4ff3e2 MOV	%R10,-0x80(%RBP)

0x4ff3e6 MOV	%R9,-0x88(%RBP)

0x4ff3ed MOV	0x50(%RBP),%RAX

0x4ff3f1 MOV	0x40(%RBP),%RCX

0x4ff3f5 LEA	(%RAX,%RCX,8),%RSI

0x4ff3f9 MOV	0x60(%RBP),%RAX

0x4ff3fd LEA	(%RAX,%RCX,8),%RCX

0x4ff401 LEA	-0x80(%RBP),%RDI

0x4ff405 LEA	-0x88(%RBP),%RDX

0x4ff40c MOV	0x78(%RBP),%R8

0x4ff410 CALL	41e240 <@plt>

0x4ff415 MOV	-0x70(%RBP),%RCX

0x4ff419 MOV	-0x78(%RBP),%RAX

0x4ff41d CMP	%RAX,%RCX

0x4ff420 JGE	4ff4e9

0x4ff426 MOV	0x68(%RBP),%RDX

0x4ff42a MOV	0x58(%RBP),%RSI

0x4ff42e MOV	-0x80(%RBP),%RDI

0x4ff432 MOV	-0x88(%RBP),%R8

0x4ff439 JMP	4ff449

0x4ff43b NOPL	(%RAX,%RAX,1)

(3221) 0x4ff440 CMP	%RAX,%RCX

(3221) 0x4ff443 JE	4ff4e9

(3221) 0x4ff449 MOV	%RCX,%R9

(3221) 0x4ff44c MOV	0x50(%RBP),%RCX

(3221) 0x4ff450 ADD	%RDI,(%RCX,%R9,8)

(3221) 0x4ff454 MOV	0x60(%RBP),%RCX

(3221) 0x4ff458 ADD	%R8,(%RCX,%R9,8)

(3221) 0x4ff45c MOV	(%R13,%R9,8),%R10

(3221) 0x4ff461 MOV	0x8(%R13,%R9,8),%R11

(3221) 0x4ff466 LEA	0x1(%R9),%RCX

(3221) 0x4ff46a CMP	%R11,%R10

(3221) 0x4ff46d JGE	4ff4a0

(3221) 0x4ff46f MOV	0x50(%RBP),%R14

(3221) 0x4ff473 MOV	(%R14,%R9,8),%R15

(3221) 0x4ff477 JMP	4ff488

0x4ff479 NOPL	(%RAX)

  (3223) 0x4ff480 INC	%R10

  (3223) 0x4ff483 CMP	%R11,%R10

  (3223) 0x4ff486 JGE	4ff4a0

  (3223) 0x4ff488 MOV	(%R12,%R10,8),%R14

  (3223) 0x4ff48c TEST	%R14,%R14

  (3223) 0x4ff48f JS	4ff480

  (3223) 0x4ff491 MOV	%R14,(%RSI,%R15,8)

  (3223) 0x4ff495 INC	%R15

  (3223) 0x4ff498 MOV	(%R13,%RCX,8),%R11

  (3223) 0x4ff49d JMP	4ff480

0x4ff49f NOP

(3221) 0x4ff4a0 MOV	(%RBX,%R9,8),%R10

(3221) 0x4ff4a4 MOV	(%RBX,%RCX,8),%R11

(3221) 0x4ff4a8 CMP	%R11,%R10

(3221) 0x4ff4ab JGE	4ff440

(3221) 0x4ff4ad MOV	0x60(%RBP),%R14

(3221) 0x4ff4b1 MOV	(%R14,%R9,8),%R9

(3221) 0x4ff4b5 JMP	4ff4cc

0x4ff4b7 NOPW	(%RAX,%RAX,1)

  (3222) 0x4ff4c0 INC	%R10

  (3222) 0x4ff4c3 CMP	%R11,%R10

  (3222) 0x4ff4c6 JGE	4ff440

  (3222) 0x4ff4cc MOV	0x88(%RBP),%R14

  (3222) 0x4ff4d3 MOV	(%R14,%R10,8),%R14

  (3222) 0x4ff4d7 TEST	%R14,%R14

  (3222) 0x4ff4da JS	4ff4c0

  (3222) 0x4ff4dc MOV	%R14,(%RDX,%R9,8)

  (3222) 0x4ff4e0 INC	%R9

  (3222) 0x4ff4e3 MOV	(%RBX,%RCX,8),%R11

  (3222) 0x4ff4e7 JMP	4ff4c0

0x4ff4e9 ADD	$0x78,%RSP

0x4ff4ed POP	%RBX

0x4ff4ee POP	%R12

0x4ff4f0 POP	%R13

0x4ff4f2 POP	%R14

0x4ff4f4 POP	%R15

0x4ff4f6 POP	%RBP

0x4ff4f7 RET

0x4ff4f8 NOPL	(%RAX,%RAX,1)

Coverage (%)	Name	Source Location	Module
►96.94+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
○	__kmp_launch_thread		libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]		libiomp5.so
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►2.99+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
○	__kmp_fork_call		libiomp5.so
○	__kmpc_fork_call		libiomp5.so
○	hypre_BoomerAMGCreateS	par_strength.c:246	exec
○	hypre_BoomerAMGSetup	par_amg_setup.c:577	exec
○	hypre_PCGSetup	pcg.c:234	exec
○	main	amg.c:398	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start		exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.03% of application time for run icx_5

Source file and lines	par_strength.c:246-513
Module	exec

The function is defined in /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:246-283,289-302,309-386,392-415,422-445,451-472,480,492-513.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 31.00 to 27.50 cycles (1.13x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is probably not vectorized. Only 12% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 31.00 to 3.44 cycles (9.02x speedup).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

unknown: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:250
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:480

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

JMP: 4 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:311
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:324
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:316
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:329

Type of elements and instruction set

55 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).

Matching between your function (in the source code) and the binary function

The binary function is composed of 27 FP arithmetical operations:

27: addition or subtraction

The binary function is loading 576 bytes (72 double precision FP elements). The binary function is storing 64 bytes (8 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.04 FP operations per loaded or stored byte.

General properties

nb instructions	265
nb uops	248
loop length	1202
used x86 registers	16
used mmx registers	0
used xmm registers	8
used ymm registers	0
used zmm registers	0
nb stack references	22

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	31.00 cycles
front end	31.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	13.00	13.00	13.00	13.00	13.00	13.00	20.25	20.25	20.25	20.25	0.00	0.00	27.50	27.50	0.00	0.00
cycles	13.00	13.00	13.00	13.00	13.00	13.00	20.25	20.25	20.25	20.25	0.00	0.00	27.50	27.50	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	31.00
Dispatch	27.50
Overall L1	31.00

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	2%
load	3%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	3%

INT+FP

all	1%
load	2%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	2%

Vector efficiency ratios

INT

all	11%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	10%

all	12%
load	12%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

INT+FP

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 31.00 cycles. At this rate:

7% of peak load performance is reached (18.58 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
1% of peak store performance is reached (2.06 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 31.00 to 27.50 cycles (1.13x speedup).

ASM code

In the binary file, the address of the function is: 4fdff0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P12	P13	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x78,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %R9,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %R8,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %RCX,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
MOV %RDX,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
MOV 0x80(%RBP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (12.5%)
MOV 0x40(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (12.5%)
MOV 0x20(%RBP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (12.5%)
MOV 0x10(%RBP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (12.5%)
LEA -0x70(%RBP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
LEA -0x78(%RBP),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
CALL 41d3a0 <@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0.50	N/A
MOV -0x70(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (12.5%)
MOV -0x78(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV %RAX,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
CMP %RAX,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JGE 4ff3dc <hypre_BoomerAMGCreateS.extracted+0x13ec>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV 0x18(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOVSD -0x30(%RBP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MOVSD -0x50(%RBP),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
LEA 0x40(%RSI),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
MOV %RAX,-0x68(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
LEA 0x38(%RDI),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
MOV %RAX,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
XORPD %XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOVAPD 0xc7868(%RIP),%XMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.50	vect (25.0%)
MOVSD 0xc5fb0(%RIP),%XMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV 0x88(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV %R14,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
JMP 4fe0a1 <hypre_BoomerAMGCreateS.extracted+0xb1>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV 0x18(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
JMP 0x5d7310(,%RCX,8)	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	1	N/A
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
JMP 4febe1 <hypre_BoomerAMGCreateS.extracted+0xbf1>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV 0x18(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
JMP 0x5d72a0(,%RCX,8)	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	1	N/A
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
JMP 4feda0 <hypre_BoomerAMGCreateS.extracted+0xdb0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
LEA (%R9,%R11,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
JMP 4febd0 <hypre_BoomerAMGCreateS.extracted+0xbe0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
LEA (%R9,%R11,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
JMP 4febbf <hypre_BoomerAMGCreateS.extracted+0xbcf>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
LEA (%R9,%R11,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
JMP 4febae <hypre_BoomerAMGCreateS.extracted+0xbbe>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
LEA (%R9,%R11,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
JMP 4feb99 <hypre_BoomerAMGCreateS.extracted+0xba9>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
LEA (%R9,%R11,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
JMP 4feb88 <hypre_BoomerAMGCreateS.extracted+0xb98>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
LEA (%R9,%R11,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
MOVSD 0x38(%RSI,%RCX,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MAXSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x30(%RSI,%RCX,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MAXSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOVSD 0x28(%RSI,%RCX,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MAXSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x20(%RSI,%RCX,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MAXSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x18(%RSI,%RCX,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MAXSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x10(%RSI,%RCX,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MAXSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADD %R11,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOVSD (%RSI,%RAX,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MAXSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOV 0x88(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
AND $-0x8,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
JMP 0x5d7348(,%RCX,8)	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	1	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R14,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JMP 4fef58 <hypre_BoomerAMGCreateS.extracted+0xf68>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
LEA (%R9,%R11,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
JMP 4fed8f <hypre_BoomerAMGCreateS.extracted+0xd9f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
LEA (%R9,%R11,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
JMP 4fed7e <hypre_BoomerAMGCreateS.extracted+0xd8e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
LEA (%R9,%R11,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
JMP 4fed6d <hypre_BoomerAMGCreateS.extracted+0xd7d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
LEA (%R9,%R11,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
JMP 4fed58 <hypre_BoomerAMGCreateS.extracted+0xd68>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
LEA (%R9,%R11,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
JMP 4fed47 <hypre_BoomerAMGCreateS.extracted+0xd57>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
LEA (%R9,%R11,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
MOVSD 0x38(%RSI,%RCX,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MINSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x30(%RSI,%RCX,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MINSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOVSD 0x28(%RSI,%RCX,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MINSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x20(%RSI,%RCX,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MINSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x18(%RSI,%RCX,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MINSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x10(%RSI,%RCX,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MINSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADD %R11,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOVSD (%RSI,%RAX,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MINSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOV 0x88(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
AND $-0x8,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
JMP 0x5d72d8(,%RCX,8)	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	1	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R14,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JMP 4feffc <hypre_BoomerAMGCreateS.extracted+0x100c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R14,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JMP 4fef47 <hypre_BoomerAMGCreateS.extracted+0xf57>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R14,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JMP 4fef36 <hypre_BoomerAMGCreateS.extracted+0xf46>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R14,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JMP 4fef25 <hypre_BoomerAMGCreateS.extracted+0xf35>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R14,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JMP 4fef14 <hypre_BoomerAMGCreateS.extracted+0xf24>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R14,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JMP 4fef03 <hypre_BoomerAMGCreateS.extracted+0xf13>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R14,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOVSD 0x30(%RDI,%R9,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MAXSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x28(%RDI,%R9,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MAXSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x20(%RDI,%R9,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MAXSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x18(%RDI,%R9,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MAXSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x10(%RDI,%R9,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MAXSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x8(%RDI,%R9,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MAXSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD (%RDI,%R9,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MAXSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
JMP 4ff007 <hypre_BoomerAMGCreateS.extracted+0x1017>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R14,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JMP 4fefeb <hypre_BoomerAMGCreateS.extracted+0xffb>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R14,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JMP 4fefda <hypre_BoomerAMGCreateS.extracted+0xfea>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R14,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JMP 4fefc9 <hypre_BoomerAMGCreateS.extracted+0xfd9>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R14,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JMP 4fefb8 <hypre_BoomerAMGCreateS.extracted+0xfc8>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R14,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JMP 4fefa7 <hypre_BoomerAMGCreateS.extracted+0xfb7>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R14,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOVSD 0x30(%RDI,%R9,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MINSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x28(%RDI,%R9,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MINSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x20(%RDI,%R9,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MINSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x18(%RDI,%R9,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MINSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x10(%RDI,%R9,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MINSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x8(%RDI,%R9,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MINSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD (%RDI,%R9,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MINSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
MOV %R10,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
MOV %R9,-0x88(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
MOV 0x50(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV 0x40(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
LEA (%RAX,%RCX,8),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
MOV 0x60(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
LEA (%RAX,%RCX,8),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
LEA -0x80(%RBP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
LEA -0x88(%RBP),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
MOV 0x78(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (12.5%)
CALL 41e240 <@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0.50	N/A
MOV -0x70(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV -0x78(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
CMP %RAX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JGE 4ff4e9 <hypre_BoomerAMGCreateS.extracted+0x14f9>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x68(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (12.5%)
MOV 0x58(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV -0x80(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV -0x88(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (12.5%)
JMP 4ff449 <hypre_BoomerAMGCreateS.extracted+0x1459>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
ADD $0x78,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.03% of application time for run icx_5

Source file and lines	par_strength.c:246-513
Module	exec

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

unknown: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:250
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:480

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

JMP: 4 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:311
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:324
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:316
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:329

Type of elements and instruction set

55 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).

Matching between your function (in the source code) and the binary function

The binary function is composed of 27 FP arithmetical operations:

27: addition or subtraction

The binary function is loading 576 bytes (72 double precision FP elements). The binary function is storing 64 bytes (8 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.04 FP operations per loaded or stored byte.

General properties

nb instructions	265
nb uops	248
loop length	1202
used x86 registers	16
used mmx registers	0
used xmm registers	8
used ymm registers	0
used zmm registers	0
nb stack references	22

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	31.00 cycles
front end	31.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	13.00	13.00	13.00	13.00	13.00	13.00	20.25	20.25	20.25	20.25	0.00	0.00	27.50	27.50	0.00	0.00
cycles	13.00	13.00	13.00	13.00	13.00	13.00	20.25	20.25	20.25	20.25	0.00	0.00	27.50	27.50	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	31.00
Dispatch	27.50
Overall L1	31.00

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	2%
load	3%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	3%

INT+FP

all	1%
load	2%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	2%

Vector efficiency ratios

INT

all	11%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	10%

all	12%
load	12%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

INT+FP

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 31.00 cycles. At this rate:

7% of peak load performance is reached (18.58 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
1% of peak store performance is reached (2.06 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 4fdff0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P12	P13	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x78,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %R9,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %R8,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %RCX,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
MOV %RDX,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
MOV 0x80(%RBP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (12.5%)
MOV 0x40(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (12.5%)
MOV 0x20(%RBP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (12.5%)
MOV 0x10(%RBP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (12.5%)
LEA -0x70(%RBP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
LEA -0x78(%RBP),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
CALL 41d3a0 <@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0.50	N/A
MOV -0x70(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (12.5%)
MOV -0x78(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV %RAX,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
CMP %RAX,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JGE 4ff3dc <hypre_BoomerAMGCreateS.extracted+0x13ec>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV 0x18(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOVSD -0x30(%RBP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MOVSD -0x50(%RBP),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
LEA 0x40(%RSI),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
MOV %RAX,-0x68(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
LEA 0x38(%RDI),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
MOV %RAX,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
XORPD %XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOVAPD 0xc7868(%RIP),%XMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.50	vect (25.0%)
MOVSD 0xc5fb0(%RIP),%XMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV 0x88(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV %R14,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
JMP 4fe0a1 <hypre_BoomerAMGCreateS.extracted+0xb1>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV 0x18(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
JMP 0x5d7310(,%RCX,8)	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	1	N/A
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
JMP 4febe1 <hypre_BoomerAMGCreateS.extracted+0xbf1>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV 0x18(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
JMP 0x5d72a0(,%RCX,8)	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	1	N/A
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
JMP 4feda0 <hypre_BoomerAMGCreateS.extracted+0xdb0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
LEA (%R9,%R11,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
JMP 4febd0 <hypre_BoomerAMGCreateS.extracted+0xbe0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
LEA (%R9,%R11,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
JMP 4febbf <hypre_BoomerAMGCreateS.extracted+0xbcf>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
LEA (%R9,%R11,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
JMP 4febae <hypre_BoomerAMGCreateS.extracted+0xbbe>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
LEA (%R9,%R11,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
JMP 4feb99 <hypre_BoomerAMGCreateS.extracted+0xba9>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
LEA (%R9,%R11,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
JMP 4feb88 <hypre_BoomerAMGCreateS.extracted+0xb98>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
LEA (%R9,%R11,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
MOVSD 0x38(%RSI,%RCX,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MAXSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x30(%RSI,%RCX,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MAXSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOVSD 0x28(%RSI,%RCX,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MAXSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x20(%RSI,%RCX,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MAXSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x18(%RSI,%RCX,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MAXSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x10(%RSI,%RCX,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MAXSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADD %R11,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOVSD (%RSI,%RAX,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MAXSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOV 0x88(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
AND $-0x8,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
JMP 0x5d7348(,%RCX,8)	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	1	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R14,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JMP 4fef58 <hypre_BoomerAMGCreateS.extracted+0xf68>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
LEA (%R9,%R11,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
JMP 4fed8f <hypre_BoomerAMGCreateS.extracted+0xd9f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
LEA (%R9,%R11,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
JMP 4fed7e <hypre_BoomerAMGCreateS.extracted+0xd8e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
LEA (%R9,%R11,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
JMP 4fed6d <hypre_BoomerAMGCreateS.extracted+0xd7d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
LEA (%R9,%R11,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
JMP 4fed58 <hypre_BoomerAMGCreateS.extracted+0xd68>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
LEA (%R9,%R11,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
JMP 4fed47 <hypre_BoomerAMGCreateS.extracted+0xd57>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
LEA (%R9,%R11,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
MOVSD 0x38(%RSI,%RCX,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MINSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x30(%RSI,%RCX,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MINSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOVSD 0x28(%RSI,%RCX,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MINSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x20(%RSI,%RCX,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MINSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x18(%RSI,%RCX,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MINSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x10(%RSI,%RCX,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MINSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADD %R11,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOVSD (%RSI,%RAX,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MINSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOV 0x88(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
AND $-0x8,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
JMP 0x5d72d8(,%RCX,8)	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	1	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R14,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JMP 4feffc <hypre_BoomerAMGCreateS.extracted+0x100c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R14,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JMP 4fef47 <hypre_BoomerAMGCreateS.extracted+0xf57>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R14,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JMP 4fef36 <hypre_BoomerAMGCreateS.extracted+0xf46>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R14,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JMP 4fef25 <hypre_BoomerAMGCreateS.extracted+0xf35>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R14,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JMP 4fef14 <hypre_BoomerAMGCreateS.extracted+0xf24>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R14,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JMP 4fef03 <hypre_BoomerAMGCreateS.extracted+0xf13>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R14,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOVSD 0x30(%RDI,%R9,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MAXSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x28(%RDI,%R9,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MAXSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x20(%RDI,%R9,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MAXSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x18(%RDI,%R9,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MAXSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x10(%RDI,%R9,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MAXSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x8(%RDI,%R9,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MAXSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD (%RDI,%R9,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MAXSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
JMP 4ff007 <hypre_BoomerAMGCreateS.extracted+0x1017>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R14,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JMP 4fefeb <hypre_BoomerAMGCreateS.extracted+0xffb>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R14,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JMP 4fefda <hypre_BoomerAMGCreateS.extracted+0xfea>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R14,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JMP 4fefc9 <hypre_BoomerAMGCreateS.extracted+0xfd9>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R14,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JMP 4fefb8 <hypre_BoomerAMGCreateS.extracted+0xfc8>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R14,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JMP 4fefa7 <hypre_BoomerAMGCreateS.extracted+0xfb7>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R14,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOVSD 0x30(%RDI,%R9,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MINSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x28(%RDI,%R9,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MINSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x20(%RDI,%R9,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MINSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x18(%RDI,%R9,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MINSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x10(%RDI,%R9,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MINSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD 0x8(%RDI,%R9,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MINSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
MOVSD (%RDI,%R9,8),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MINSD %XMM8,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
ADDSD %XMM8,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	2	0.50	scal (12.5%)
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
MOV %R10,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
MOV %R9,-0x88(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
MOV 0x50(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV 0x40(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
LEA (%RAX,%RCX,8),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
MOV 0x60(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
LEA (%RAX,%RCX,8),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
LEA -0x80(%RBP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
LEA -0x88(%RBP),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
MOV 0x78(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (12.5%)
CALL 41e240 <@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0.50	N/A
MOV -0x70(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV -0x78(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
CMP %RAX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
JGE 4ff4e9 <hypre_BoomerAMGCreateS.extracted+0x14f9>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x68(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (12.5%)
MOV 0x58(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV -0x80(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV -0x88(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (12.5%)
JMP 4ff449 <hypre_BoomerAMGCreateS.extracted+0x1459>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
ADD $0x78,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼hypre_BoomerAMGCreateS.extracted–	1.13	0.59
▼Loop 3221 - par_strength.c:492-513 - exec–	0.08	0.04
○Loop 3223 - par_strength.c:498-503 - exec	0.31	0.15
○Loop 3222 - par_strength.c:508-513 - exec	0.00	0.01
▼Loop 3224 - par_strength.c:253-472 - exec–	0.00	0.00
▼Loop 3225 - par_strength.c:253-472 - exec–	0.08	0.04
○Loop 3235 - par_strength.c:451-460 - exec	0.40	0.20
○Loop 3227 - par_strength.c:324-327 - exec	0.22	0.11
○Loop 3234 - par_strength.c:463-472 - exec	0.00	0.00
○Loop 3226 - par_strength.c:329-332 - exec	0.00	0.00
○Loop 3228 - par_strength.c:316-319 - exec	0.00	0.00
○Loop 3231 - par_strength.c:289-294 - exec	0.00	0.00
○Loop 3229 - par_strength.c:311-314 - exec	0.00	0.00
○Loop 3238 - par_strength.c:405-415 - exec	0.00	0.00
○Loop 3233 - par_strength.c:270-275 - exec	0.00	0.00
○Loop 3243 - par_strength.c:345-347 - exec	0.00	0.00
○Loop 3236 - par_strength.c:436-445 - exec	0.00	0.00
○Loop 3232 - par_strength.c:278-283 - exec	0.00	0.00
○Loop 3240 - par_strength.c:376-386 - exec	0.00	0.00
○Loop 3241 - par_strength.c:363-373 - exec	0.00	0.00
○Loop 3239 - par_strength.c:392-402 - exec	0.00	0.00
○Loop 3242 - par_strength.c:351-353 - exec	0.00	0.00
○Loop 3237 - par_strength.c:424-433 - exec	0.00	0.00
○Loop 3230 - par_strength.c:253-302 - exec	0.00	0.00

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Cycles and memory resources usage

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