OV - exec - Function hypre_BoomerAMGBuildMultipass.extracted.28

	Function: hypre_BoomerAMGBuildMultipass.extracted.28	Module: exec	Source: par_multi_interp.c:1737-1881 [...]	Coverage (incl. loops): 1.51% \| (excl. loops): 0.01%

/home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 1737 - 1881

--------------------------------------------------------------------------------

1737: #pragma omp parallel private(thread_start,thread_stop,my_thread_num,num_threads,k,k1,i,i1,j,j1,sum_C,sum_N,j_start,j_end,cnt,tmp_marker,tmp_marker_offd,cnt_offd,diagonal,alfa,tmp_array,tmp_array_offd)

[...]

1747:              if (n_fine)

1748:              {    tmp_marker = hypre_CTAlloc(HYPRE_Int,n_fine); }

1749:              tmp_marker_offd = NULL;

1750:              if (num_cols_offd)

1751:              {    tmp_marker_offd = hypre_CTAlloc(HYPRE_Int,num_cols_offd); }

1752:              tmp_array = NULL;

1753:              if (n_coarse)

1754:              {    tmp_array = hypre_CTAlloc(HYPRE_Int,n_coarse); }

[...]

1760:              for (i=0; i < n_fine; i++)

1761:              {    tmp_marker[i] = -1; }

1762:              for (i=0; i < num_cols_offd; i++)

1763:              {    tmp_marker_offd[i] = -1; }

1764:

1765:              /* Compute this thread's range of pass_length */

1766:              my_thread_num = hypre_GetThreadNum();

1767:              num_threads = hypre_NumActiveThreads();

1768:              thread_start = pass_pointer[pass] + (pass_length/num_threads)*my_thread_num;

1769:              if (my_thread_num == num_threads-1)

1770:              {  thread_stop = pass_pointer[pass] + pass_length; }

1771:              else

1772:              {  thread_stop = pass_pointer[pass] + (pass_length/num_threads)*(my_thread_num+1); }

1773:

1774:              for (i=thread_start; i < thread_stop; i++)

1775:              {

1776:                 i1 = pass_array[i];

1777:                 sum_C = 0;

1778:                 sum_N = 0;

1779:                 j_start = P_diag_start[i1];

1780:                 j_end = j_start+P_diag_i[i1+1]-P_diag_i[i1];

1781:                 cnt = P_diag_i[i1];

1782:                 for (j=j_start; j < j_end; j++)

1783:                 {

1784:                    k1 = P_diag_pass[pass][j];

1785:                tmp_array[k1] = cnt;

1786:                P_diag_data[cnt] = 0;

1787:                P_diag_j[cnt++] = k1;

1788:                 }

1789:                 j_start = P_offd_start[i1];

1790:                 j_end = j_start+P_offd_i[i1+1]-P_offd_i[i1];

1791:                 cnt_offd = P_offd_i[i1];

1792:                 for (j=j_start; j < j_end; j++)

1793:                 {

1794:                    k1 = P_offd_pass[pass][j];

1795:                tmp_array_offd[k1] = cnt_offd;

1796:                P_offd_data[cnt_offd] = 0;

1797:                P_offd_j[cnt_offd++] = k1;

1798:                 }

1799:                 for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++)

1800:                 {

1801:                j1 = S_diag_j[j];

1802:                if (assigned[j1] == pass-1)

1803:                   tmp_marker[j1] = i1;

1804:                 }

1805:                 for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++)

1806:                 {

1807:                j1 = S_offd_j[j];

1808:                if (assigned_offd[j1] == pass-1)

1809:                   tmp_marker_offd[j1] = i1;

1810:                 }

1811:                 for (j=A_diag_i[i1]+1; j < A_diag_i[i1+1]; j++)

1812:                 {

1813:                j1 = A_diag_j[j];

1814:                if (tmp_marker[j1] == i1)

1815:                {

1816:                   for (k=P_diag_i[j1]; k < P_diag_i[j1+1]; k++)

1817:                   {

1818:                  k1 = P_diag_j[k];

1819:                      alfa = A_diag_data[j]*P_diag_data[k];

1820:                      P_diag_data[tmp_array[k1]] += alfa;

1821:                      sum_C += alfa;

1822:                      sum_N += alfa;

1823:                       }

1824:                   for (k=P_offd_i[j1]; k < P_offd_i[j1+1]; k++)

1825:                   {

1826:                  k1 = P_offd_j[k];

1827:                      alfa = A_diag_data[j]*P_offd_data[k];

1828:                      P_offd_data[tmp_array_offd[k1]] += alfa;

1829:                      sum_C += alfa;

1830:                      sum_N += alfa;

1831:                       }

1832:                    }

1833:                    else

1834:                    {

1835:                       if (CF_marker[j1] != -3 &&

1836:                 (num_functions == 1 || dof_func[i1] == dof_func[j1]))

1837:                  sum_N += A_diag_data[j];

1838:                    }

1839:                 }

1840:                 for (j=A_offd_i[i1]; j < A_offd_i[i1+1]; j++)

1841:                 {

1842:                if (col_offd_S_to_A)

1843:                   j1 = map_A_to_S[A_offd_j[j]];

1844:                else

1845:                   j1 = A_offd_j[j];

1846:

1847:                if (j1 > -1 && tmp_marker_offd[j1] == i1)

1848:                {

1849:                   j_start = Pext_start[j1];

1850:                   j_end = j_start+Pext_i[j1+1];

1851:                   for (k=j_start; k < j_end; k++)

1852:                   {

1853:                  k1 = Pext_pass[pass][k];

1854:                      alfa = A_offd_data[j]*Pext_data[k];

1855:                  if (k1 < 0)

1856:                         P_diag_data[tmp_array[-k1-1]] += alfa;

1857:                  else

1858:                         P_offd_data[tmp_array_offd[k1]] += alfa;

1859:                      sum_C += alfa;

1860:                      sum_N += alfa;

1861:                       }

1862:                    }

1863:                    else

1864:                    {

1865:                       if (CF_marker_offd[j1] != -3 &&

1866:                 (num_functions == 1 || dof_func_offd[j1] == dof_func[i1]))

1867:                  sum_N += A_offd_data[j];

1868:                    }

1869:                 }

1870:                 diagonal = A_diag_data[A_diag_i[i1]];

1871:                 if (sum_C*diagonal) alfa = -sum_N/(sum_C*diagonal);

1872:

1873:                 for (j=P_diag_i[i1]; j < P_diag_i[i1+1]; j++)

1874:                P_diag_data[j] *= alfa;

1875:                 for (j=P_offd_i[i1]; j < P_offd_i[i1+1]; j++)

1876:                P_offd_data[j] *= alfa;

1877:              }

1878:              hypre_TFree(tmp_marker);

1879:              hypre_TFree(tmp_marker_offd);

1880:              hypre_TFree(tmp_array);

1881:              hypre_TFree(tmp_array_offd);

0x46d960 PUSH	%RBP

0x46d961 MOV	%RSP,%RBP

0x46d964 PUSH	%R15

0x46d966 PUSH	%R14

0x46d968 PUSH	%R13

0x46d96a PUSH	%R12

0x46d96c PUSH	%RBX

0x46d96d SUB	$0x178,%RSP

0x46d974 MOV	%R9,-0x1a0(%RBP)

0x46d97b MOV	%R8,-0xc8(%RBP)

0x46d982 MOV	%RCX,-0xe8(%RBP)

0x46d989 MOV	%RDX,-0x158(%RBP)

0x46d990 MOV	0x138(%RBP),%RAX

0x46d997 MOV	%RAX,-0x98(%RBP)

0x46d99e MOV	0x130(%RBP),%RAX

0x46d9a5 MOV	%RAX,-0x58(%RBP)

0x46d9a9 MOV	0x128(%RBP),%RAX

0x46d9b0 MOV	%RAX,-0xa0(%RBP)

0x46d9b7 MOV	0x120(%RBP),%RAX

0x46d9be MOV	%RAX,-0x198(%RBP)

0x46d9c5 MOV	0x118(%RBP),%RAX

0x46d9cc MOV	%RAX,-0x190(%RBP)

0x46d9d3 MOV	0x110(%RBP),%R15

0x46d9da MOV	0x108(%RBP),%R12

0x46d9e1 MOV	0x100(%RBP),%RDI

0x46d9e8 MOV	0xf8(%RBP),%RAX

0x46d9ef MOV	%RAX,-0x60(%RBP)

0x46d9f3 MOV	0xf0(%RBP),%RAX

0x46d9fa MOV	%RAX,-0x160(%RBP)

0x46da01 MOV	0xe8(%RBP),%RAX

0x46da08 MOV	%RAX,-0x150(%RBP)

0x46da0f MOV	0xe0(%RBP),%RAX

0x46da16 MOV	%RAX,-0x148(%RBP)

0x46da1d MOV	0xd8(%RBP),%RAX

0x46da24 MOV	%RAX,-0xc0(%RBP)

0x46da2b MOV	0xd0(%RBP),%RAX

0x46da32 MOV	%RAX,-0xb8(%RBP)

0x46da39 MOV	0xc8(%RBP),%RAX

0x46da40 MOV	%RAX,-0x130(%RBP)

0x46da47 MOV	0xc0(%RBP),%RAX

0x46da4e MOV	%RAX,-0x128(%RBP)

0x46da55 MOV	0xb8(%RBP),%RAX

0x46da5c MOV	%RAX,-0x40(%RBP)

0x46da60 MOV	0xb0(%RBP),%RAX

0x46da67 MOV	%RAX,-0x120(%RBP)

0x46da6e MOV	0xa8(%RBP),%RAX

0x46da75 MOV	%RAX,-0x138(%RBP)

0x46da7c MOV	0xa0(%RBP),%RAX

0x46da83 MOV	%RAX,-0x168(%RBP)

0x46da8a MOV	0x98(%RBP),%RAX

0x46da91 MOV	%RAX,-0x140(%RBP)

0x46da98 MOV	0x90(%RBP),%RAX

0x46da9f MOV	%RAX,-0x30(%RBP)

0x46daa3 MOV	0x88(%RBP),%RAX

0x46daaa MOV	%RAX,-0xb0(%RBP)

0x46dab1 MOV	0x80(%RBP),%R13

0x46dab8 MOV	0x78(%RBP),%RAX

0x46dabc MOV	%RAX,-0x50(%RBP)

0x46dac0 MOV	0x70(%RBP),%RAX

0x46dac4 MOV	%RAX,-0xa8(%RBP)

0x46dacb MOV	0x68(%RBP),%R14

0x46dacf MOV	0x60(%RBP),%RCX

0x46dad3 MOV	0x58(%RBP),%RAX

0x46dad7 MOV	%RAX,-0x188(%RBP)

0x46dade MOV	0x50(%RBP),%RAX

0x46dae2 MOV	%RAX,-0xe0(%RBP)

0x46dae9 MOV	0x48(%RBP),%RAX

0x46daed MOV	%RAX,-0x180(%RBP)

0x46daf4 MOV	0x40(%RBP),%RAX

0x46daf8 MOV	%RAX,-0xd8(%RBP)

0x46daff MOV	0x38(%RBP),%RAX

0x46db03 MOV	%RAX,-0x178(%RBP)

0x46db0a MOV	0x30(%RBP),%RAX

0x46db0e MOV	%RAX,-0x118(%RBP)

0x46db15 MOV	0x28(%RBP),%RAX

0x46db19 MOV	%RAX,-0xd0(%RBP)

0x46db20 MOV	0x20(%RBP),%RAX

0x46db24 MOV	%RAX,-0x170(%RBP)

0x46db2b MOV	0x18(%RBP),%RAX

0x46db2f MOV	%RAX,-0x110(%RBP)

0x46db36 MOV	0x10(%RBP),%RBX

0x46db3a TEST	%RDI,%RDI

0x46db3d MOV	%RCX,-0x38(%RBP)

0x46db41 MOV	%RDI,-0x80(%RBP)

0x46db45 JE	46db83

0x46db47 MOV	$0x8,%ESI

0x46db4c CALL	5a8860 <hypre_CAlloc>

0x46db51 MOV	-0x38(%RBP),%RCX

0x46db55 MOV	%RAX,-0x78(%RBP)

0x46db59 TEST	%RCX,%RCX

0x46db5c JE	46db8e

0x46db5e MOV	$0x8,%ESI

0x46db63 MOV	%RCX,%RDI

0x46db66 CALL	5a8860 <hypre_CAlloc>

0x46db6b MOV	%RAX,-0x70(%RBP)

0x46db6f TEST	%R12,%R12

0x46db72 JE	46db99

0x46db74 MOV	$0x8,%ESI

0x46db79 MOV	%R12,%RDI

0x46db7c CALL	5a8860 <hypre_CAlloc>

0x46db81 JMP	46db9b

0x46db83 XOR	%EAX,%EAX

0x46db85 MOV	%RAX,-0x78(%RBP)

0x46db89 TEST	%RCX,%RCX

0x46db8c JNE	46db5e

0x46db8e XOR	%EAX,%EAX

0x46db90 MOV	%RAX,-0x70(%RBP)

0x46db94 TEST	%R12,%R12

0x46db97 JNE	46db74

0x46db99 XOR	%EAX,%EAX

0x46db9b MOV	%RAX,-0x48(%RBP)

0x46db9f MOV	-0x58(%RBP),%RAX

0x46dba3 CMP	%R15,%RAX

0x46dba6 CMOVG	%RAX,%R15

0x46dbaa MOV	$0x8,%ESI

0x46dbaf MOV	%R15,%RDI

0x46dbb2 CALL	5a8860 <hypre_CAlloc>

0x46dbb7 MOV	%RAX,%R12

0x46dbba MOV	-0x80(%RBP),%RDX

0x46dbbe TEST	%RDX,%RDX

0x46dbc1 JLE	46dbd5

0x46dbc3 SAL	$0x3,%RDX

0x46dbc7 MOV	-0x78(%RBP),%RDI

0x46dbcb MOV	$0xff,%ESI

0x46dbd0 CALL	5b5350 <_intel_fast_memset>

0x46dbd5 MOV	-0x38(%RBP),%RDX

0x46dbd9 TEST	%RDX,%RDX

0x46dbdc JLE	46dbf0

0x46dbde SAL	$0x3,%RDX

0x46dbe2 MOV	-0x70(%RBP),%RDI

0x46dbe6 MOV	$0xff,%ESI

0x46dbeb CALL	5b5350 <_intel_fast_memset>

0x46dbf0 CALL	5ac1c0 <hypre_GetThreadNum>

0x46dbf5 MOV	%RAX,%R15

0x46dbf8 CALL	5ac1b0 <hypre_NumActiveThreads>

0x46dbfd MOV	%RAX,%RCX

0x46dc00 MOV	-0x60(%RBP),%RAX

0x46dc04 MOV	(%RAX),%RAX

0x46dc07 MOV	-0x40(%RBP),%RDX

0x46dc0b MOV	(%RDX,%RAX,8),%RSI

0x46dc0f MOV	-0x98(%RBP),%R9

0x46dc16 MOV	%R9,%RAX

0x46dc19 OR	%RCX,%RAX

0x46dc1c SHR	$0x20,%RAX

0x46dc20 JE	46dc2c

0x46dc22 MOV	%R9,%RAX

0x46dc25 CQTO

0x46dc27 IDIV	%RCX

0x46dc2a JMP	46dc33

0x46dc2c MOV	%R9D,%EAX

0x46dc2f XOR	%EDX,%EDX

0x46dc31 DIV	%ECX

0x46dc33 MOV	-0x30(%RBP),%R10

0x46dc37 MOV	%RAX,%RDX

0x46dc3a IMUL	%R15,%RDX

0x46dc3e DEC	%RCX

0x46dc41 LEA	0x1(%R15),%RDI

0x46dc45 IMUL	%RAX,%RDI

0x46dc49 CMP	%RCX,%R15

0x46dc4c CMOVE	%R9,%RDI

0x46dc50 MOV	%RDI,-0x80(%RBP)

0x46dc54 CMP	%RDI,%RDX

0x46dc57 JGE	46e974

0x46dc5d ADD	%RSI,-0x80(%RBP)

0x46dc61 ADD	%RSI,%RDX

0x46dc64 MOV	-0x50(%RBP),%RAX

0x46dc68 ADD	$0x38,%RAX

0x46dc6c MOV	%RAX,-0x108(%RBP)

0x46dc73 LEA	0x38(%R10),%RAX

0x46dc77 MOV	%RAX,-0x100(%RBP)

0x46dc7e LEA	0x38(%R14),%RAX

0x46dc82 MOV	%RAX,-0xf8(%RBP)

0x46dc89 LEA	0x38(%R13),%RAX

0x46dc8d MOV	%RAX,-0xf0(%RBP)

0x46dc94 XORPD	%XMM6,%XMM6

0x46dc98 MOV	%R12,-0x58(%RBP)

0x46dc9c JMP	46dd36

0x46dca1 ADD	%RCX,%RAX

0x46dca4 MOVSD	0x30(%R13,%RAX,8),%XMM0

0x46dcab MULSD	%XMM7,%XMM0

0x46dcaf MOVSD	%XMM0,0x30(%R13,%RAX,8)

0x46dcb6 MOVSD	0x28(%R13,%RAX,8),%XMM0

0x46dcbd MULSD	%XMM7,%XMM0

0x46dcc1 MOVSD	%XMM0,0x28(%R13,%RAX,8)

0x46dcc8 MOVSD	0x20(%R13,%RAX,8),%XMM0

0x46dccf MULSD	%XMM7,%XMM0

0x46dcd3 MOVSD	%XMM0,0x20(%R13,%RAX,8)

0x46dcda MOVSD	0x18(%R13,%RAX,8),%XMM0

0x46dce1 MULSD	%XMM7,%XMM0

0x46dce5 MOVSD	%XMM0,0x18(%R13,%RAX,8)

0x46dcec MOVSD	0x10(%R13,%RAX,8),%XMM0

0x46dcf3 MULSD	%XMM7,%XMM0

0x46dcf7 MOVSD	%XMM0,0x10(%R13,%RAX,8)

0x46dcfe MOVSD	0x8(%R13,%RAX,8),%XMM0

0x46dd05 MULSD	%XMM7,%XMM0

0x46dd09 MOVSD	%XMM0,0x8(%R13,%RAX,8)

0x46dd10 MOVSD	(%R13,%RAX,8),%XMM0

0x46dd17 MULSD	%XMM7,%XMM0

0x46dd1b MOVSD	%XMM0,(%R13,%RAX,8)

(1127) 0x46dd22 MOV	-0x98(%RBP),%RDX

(1127) 0x46dd29 INC	%RDX

(1127) 0x46dd2c CMP	-0x80(%RBP),%RDX

(1127) 0x46dd30 JGE	46e974

(1127) 0x46dd36 MOV	-0x120(%RBP),%RAX

(1127) 0x46dd3d MOV	%RDX,-0x98(%RBP)

(1127) 0x46dd44 MOV	(%RAX,%RDX,8),%R9

(1127) 0x46dd48 MOV	-0x128(%RBP),%RAX

(1127) 0x46dd4f MOV	(%RAX,%R9,8),%R15

(1127) 0x46dd53 MOV	-0xa8(%RBP),%RAX

(1127) 0x46dd5a MOV	(%RAX,%R9,8),%R12

(1127) 0x46dd5e MOV	0x8(%RAX,%R9,8),%RSI

(1127) 0x46dd63 LEA	(%RSI,%R15,1),%RAX

(1127) 0x46dd67 SUB	%R12,%RAX

(1127) 0x46dd6a CMP	%RAX,%R15

(1127) 0x46dd6d MOV	%R9,-0x38(%RBP)

(1127) 0x46dd71 JGE	46df3f

(1127) 0x46dd77 MOV	-0x60(%RBP),%RAX

(1127) 0x46dd7b MOV	(%RAX),%RCX

(1127) 0x46dd7e MOV	%RSI,%RAX

(1127) 0x46dd81 SUB	%R12,%RAX

(1127) 0x46dd84 CMP	$0xd,%RAX

(1127) 0x46dd88 JB	46df00

(1127) 0x46dd8e MOV	%RSI,-0x90(%RBP)

(1127) 0x46dd95 MOVSD	%XMM7,-0x40(%RBP)

(1127) 0x46dd9a LEA	(%R14,%R12,8),%RDI

(1127) 0x46dd9e LEA	(,%RAX,8),%RDX

(1127) 0x46dda6 XOR	%ESI,%ESI

(1127) 0x46dda8 MOV	%RAX,-0x68(%RBP)

(1127) 0x46ddac MOV	%RCX,-0x88(%RBP)

(1127) 0x46ddb3 CALL	5b5350 <_intel_fast_memset>

(1127) 0x46ddb8 MOV	-0xb8(%RBP),%RAX

(1127) 0x46ddbf MOV	-0x88(%RBP),%RCX

(1127) 0x46ddc6 MOV	(%RAX,%RCX,8),%RAX

(1127) 0x46ddca MOV	-0x68(%RBP),%RCX

(1127) 0x46ddce SHR	$0x3,%RCX

(1127) 0x46ddd2 LEA	(%RAX,%R15,8),%RDX

(1127) 0x46ddd6 ADD	$0x38,%RDX

(1127) 0x46ddda MOV	-0x108(%RBP),%RSI

(1127) 0x46dde1 LEA	(%RSI,%R12,8),%RSI

(1127) 0x46dde5 MOV	%RCX,%RDI

(1127) 0x46dde8 XOR	%R8D,%R8D

(1127) 0x46ddeb MOV	-0x48(%RBP),%R11

(1127) 0x46ddef NOP

  (1143) 0x46ddf0 MOV	-0x38(%RDX,%R8,8),%R9

  (1143) 0x46ddf5 LEA	(%R12,%R8,1),%R10

  (1143) 0x46ddf9 MOV	%R10,(%R11,%R9,8)

  (1143) 0x46ddfd MOV	%R9,-0x38(%RSI,%R8,8)

  (1143) 0x46de02 MOV	-0x30(%RDX,%R8,8),%R9

  (1143) 0x46de07 LEA	0x1(%R12,%R8,1),%R10

  (1143) 0x46de0c MOV	%R10,(%R11,%R9,8)

  (1143) 0x46de10 MOV	%R9,-0x30(%RSI,%R8,8)

  (1143) 0x46de15 MOV	-0x28(%RDX,%R8,8),%R9

  (1143) 0x46de1a LEA	0x2(%R12,%R8,1),%R10

  (1143) 0x46de1f MOV	%R10,(%R11,%R9,8)

  (1143) 0x46de23 MOV	%R9,-0x28(%RSI,%R8,8)

  (1143) 0x46de28 MOV	-0x20(%RDX,%R8,8),%R9

  (1143) 0x46de2d LEA	0x3(%R12,%R8,1),%R10

  (1143) 0x46de32 MOV	%R10,(%R11,%R9,8)

  (1143) 0x46de36 MOV	%R9,-0x20(%RSI,%R8,8)

  (1143) 0x46de3b MOV	-0x18(%RDX,%R8,8),%R9

  (1143) 0x46de40 LEA	0x4(%R12,%R8,1),%R10

  (1143) 0x46de45 MOV	%R10,(%R11,%R9,8)

  (1143) 0x46de49 MOV	%R9,-0x18(%RSI,%R8,8)

  (1143) 0x46de4e MOV	-0x10(%RDX,%R8,8),%R9

  (1143) 0x46de53 LEA	0x5(%R12,%R8,1),%R10

  (1143) 0x46de58 MOV	%R10,(%R11,%R9,8)

  (1143) 0x46de5c MOV	%R9,-0x10(%RSI,%R8,8)

  (1143) 0x46de61 MOV	-0x8(%RDX,%R8,8),%R9

  (1143) 0x46de66 LEA	0x6(%R12,%R8,1),%R10

  (1143) 0x46de6b MOV	%R10,(%R11,%R9,8)

  (1143) 0x46de6f MOV	%R9,-0x8(%RSI,%R8,8)

  (1143) 0x46de74 MOV	(%RDX,%R8,8),%R9

  (1143) 0x46de78 LEA	(%R12,%R8,1),%R10

  (1143) 0x46de7c ADD	$0x7,%R10

  (1143) 0x46de80 MOV	%R10,(%R11,%R9,8)

  (1143) 0x46de84 MOV	%R9,(%RSI,%R8,8)

  (1143) 0x46de88 ADD	$0x8,%R8

  (1143) 0x46de8c DEC	%RDI

  (1143) 0x46de8f JNE	46ddf0

(1127) 0x46de95 MOV	-0x68(%RBP),%RSI

(1127) 0x46de99 MOV	%RSI,%RDX

(1127) 0x46de9c AND	$-0x8,%RDX

(1127) 0x46dea0 CMP	%RSI,%RDX

(1127) 0x46dea3 MOV	-0x30(%RBP),%R10

(1127) 0x46dea7 MOV	-0x50(%RBP),%RSI

(1127) 0x46deab XORPD	%XMM6,%XMM6

(1127) 0x46deaf MOVSD	-0x40(%RBP),%XMM7

(1127) 0x46deb4 MOV	-0x38(%RBP),%R9

(1127) 0x46deb8 MOV	-0x90(%RBP),%R8

(1127) 0x46debf JAE	46df3f

(1127) 0x46dec1 MOV	%R11,%RDI

(1127) 0x46dec4 ADD	%RDX,%R12

(1127) 0x46dec7 SAL	$0x6,%RCX

(1127) 0x46decb LEA	(%RCX,%R15,8),%RCX

(1127) 0x46decf ADD	%RCX,%RAX

(1127) 0x46ded2 NOPW	%CS:(%RAX,%RAX,1)

  (1144) 0x46dee0 MOV	(%RAX),%RCX

  (1144) 0x46dee3 MOV	%R12,(%RDI,%RCX,8)

  (1144) 0x46dee7 MOV	%RCX,(%RSI,%R12,8)

  (1144) 0x46deeb INC	%R12

  (1144) 0x46deee ADD	$0x8,%RAX

  (1144) 0x46def2 CMP	%R12,%R8

  (1144) 0x46def5 JNE	46dee0

(1127) 0x46def7 JMP	46df3f

0x46def9 NOPL	(%RAX)

(1127) 0x46df00 SAL	$0x3,%R15

(1127) 0x46df04 MOV	-0xb8(%RBP),%RAX

(1127) 0x46df0b ADD	(%RAX,%RCX,8),%R15

(1127) 0x46df0f MOV	-0x50(%RBP),%RCX

(1127) 0x46df13 MOV	-0x48(%RBP),%RDX

(1127) 0x46df17 NOPW	(%RAX,%RAX,1)

  (1142) 0x46df20 MOV	(%R15),%RAX

  (1142) 0x46df23 MOV	%R12,(%RDX,%RAX,8)

  (1142) 0x46df27 MOVQ	$0,(%R14,%R12,8)

  (1142) 0x46df2f MOV	%RAX,(%RCX,%R12,8)

  (1142) 0x46df33 INC	%R12

  (1142) 0x46df36 ADD	$0x8,%R15

  (1142) 0x46df3a CMP	%R12,%RSI

  (1142) 0x46df3d JNE	46df20

(1127) 0x46df3f MOV	-0x130(%RBP),%RAX

(1127) 0x46df46 MOV	(%RAX,%R9,8),%R15

(1127) 0x46df4a MOV	-0xb0(%RBP),%RAX

(1127) 0x46df51 MOV	(%RAX,%R9,8),%R12

(1127) 0x46df55 MOV	0x8(%RAX,%R9,8),%RCX

(1127) 0x46df5a LEA	(%RCX,%R15,1),%RAX

(1127) 0x46df5e SUB	%R12,%RAX

(1127) 0x46df61 CMP	%RAX,%R15

(1127) 0x46df64 MOV	-0x58(%RBP),%R11

(1127) 0x46df68 JGE	46e130

(1127) 0x46df6e MOV	-0x60(%RBP),%RAX

(1127) 0x46df72 MOV	(%RAX),%RDX

(1127) 0x46df75 MOV	%RCX,%RAX

(1127) 0x46df78 SUB	%R12,%RAX

(1127) 0x46df7b CMP	$0xd,%RAX

(1127) 0x46df7f JB	46e0f0

(1127) 0x46df85 MOV	%RCX,-0x90(%RBP)

(1127) 0x46df8c MOVSD	%XMM7,-0x40(%RBP)

(1127) 0x46df91 LEA	(,%R12,8),%RDI

(1127) 0x46df99 ADD	%R13,%RDI

(1127) 0x46df9c MOV	%RDX,-0x88(%RBP)

(1127) 0x46dfa3 LEA	(,%RAX,8),%RDX

(1127) 0x46dfab XOR	%ESI,%ESI

(1127) 0x46dfad MOV	%RAX,-0x68(%RBP)

(1127) 0x46dfb1 CALL	5b5350 <_intel_fast_memset>

(1127) 0x46dfb6 MOV	-0xc0(%RBP),%RAX

(1127) 0x46dfbd MOV	-0x88(%RBP),%RCX

(1127) 0x46dfc4 MOV	(%RAX,%RCX,8),%RAX

(1127) 0x46dfc8 MOV	-0x68(%RBP),%RCX

(1127) 0x46dfcc SHR	$0x3,%RCX

(1127) 0x46dfd0 LEA	(%RAX,%R15,8),%RDX

(1127) 0x46dfd4 ADD	$0x38,%RDX

(1127) 0x46dfd8 MOV	-0x100(%RBP),%RSI

(1127) 0x46dfdf LEA	(%RSI,%R12,8),%RSI

(1127) 0x46dfe3 MOV	%RCX,%RDI

(1127) 0x46dfe6 XOR	%R8D,%R8D

(1127) 0x46dfe9 MOV	-0x58(%RBP),%R11

(1127) 0x46dfed NOPL	(%RAX)

  (1140) 0x46dff0 MOV	-0x38(%RDX,%R8,8),%R9

  (1140) 0x46dff5 LEA	(%R12,%R8,1),%R10

  (1140) 0x46dff9 MOV	%R10,(%R11,%R9,8)

  (1140) 0x46dffd MOV	%R9,-0x38(%RSI,%R8,8)

  (1140) 0x46e002 MOV	-0x30(%RDX,%R8,8),%R9

  (1140) 0x46e007 LEA	0x1(%R12,%R8,1),%R10

  (1140) 0x46e00c MOV	%R10,(%R11,%R9,8)

  (1140) 0x46e010 MOV	%R9,-0x30(%RSI,%R8,8)

  (1140) 0x46e015 MOV	-0x28(%RDX,%R8,8),%R9

  (1140) 0x46e01a LEA	0x2(%R12,%R8,1),%R10

  (1140) 0x46e01f MOV	%R10,(%R11,%R9,8)

  (1140) 0x46e023 MOV	%R9,-0x28(%RSI,%R8,8)

  (1140) 0x46e028 MOV	-0x20(%RDX,%R8,8),%R9

  (1140) 0x46e02d LEA	0x3(%R12,%R8,1),%R10

  (1140) 0x46e032 MOV	%R10,(%R11,%R9,8)

  (1140) 0x46e036 MOV	%R9,-0x20(%RSI,%R8,8)

  (1140) 0x46e03b MOV	-0x18(%RDX,%R8,8),%R9

  (1140) 0x46e040 LEA	0x4(%R12,%R8,1),%R10

  (1140) 0x46e045 MOV	%R10,(%R11,%R9,8)

  (1140) 0x46e049 MOV	%R9,-0x18(%RSI,%R8,8)

  (1140) 0x46e04e MOV	-0x10(%RDX,%R8,8),%R9

  (1140) 0x46e053 LEA	0x5(%R12,%R8,1),%R10

  (1140) 0x46e058 MOV	%R10,(%R11,%R9,8)

  (1140) 0x46e05c MOV	%R9,-0x10(%RSI,%R8,8)

  (1140) 0x46e061 MOV	-0x8(%RDX,%R8,8),%R9

  (1140) 0x46e066 LEA	0x6(%R12,%R8,1),%R10

  (1140) 0x46e06b MOV	%R10,(%R11,%R9,8)

  (1140) 0x46e06f MOV	%R9,-0x8(%RSI,%R8,8)

  (1140) 0x46e074 MOV	(%RDX,%R8,8),%R9

  (1140) 0x46e078 LEA	(%R12,%R8,1),%R10

  (1140) 0x46e07c ADD	$0x7,%R10

  (1140) 0x46e080 MOV	%R10,(%R11,%R9,8)

  (1140) 0x46e084 MOV	%R9,(%RSI,%R8,8)

  (1140) 0x46e088 ADD	$0x8,%R8

  (1140) 0x46e08c DEC	%RDI

  (1140) 0x46e08f JNE	46dff0

(1127) 0x46e095 MOV	-0x68(%RBP),%RSI

(1127) 0x46e099 MOV	%RSI,%RDX

(1127) 0x46e09c AND	$-0x8,%RDX

(1127) 0x46e0a0 CMP	%RSI,%RDX

(1127) 0x46e0a3 MOV	-0x30(%RBP),%R10

(1127) 0x46e0a7 XORPD	%XMM6,%XMM6

(1127) 0x46e0ab MOVSD	-0x40(%RBP),%XMM7

(1127) 0x46e0b0 MOV	-0x38(%RBP),%R9

(1127) 0x46e0b4 MOV	-0x90(%RBP),%RSI

(1127) 0x46e0bb JAE	46e130

(1127) 0x46e0bd ADD	%RDX,%R12

(1127) 0x46e0c0 SAL	$0x6,%RCX

(1127) 0x46e0c4 LEA	(%RCX,%R15,8),%RCX

(1127) 0x46e0c8 ADD	%RCX,%RAX

(1127) 0x46e0cb NOPL	(%RAX,%RAX,1)

  (1141) 0x46e0d0 MOV	(%RAX),%RCX

  (1141) 0x46e0d3 MOV	%R12,(%R11,%RCX,8)

  (1141) 0x46e0d7 MOV	%RCX,(%R10,%R12,8)

  (1141) 0x46e0db INC	%R12

  (1141) 0x46e0de ADD	$0x8,%RAX

  (1141) 0x46e0e2 CMP	%R12,%RSI

  (1141) 0x46e0e5 JNE	46e0d0

(1127) 0x46e0e7 JMP	46e130

0x46e0e9 NOPL	(%RAX)

(1127) 0x46e0f0 SAL	$0x3,%R15

(1127) 0x46e0f4 MOV	-0xc0(%RBP),%RAX

(1127) 0x46e0fb ADD	(%RAX,%RDX,8),%R15

(1127) 0x46e0ff MOV	-0x58(%RBP),%R11

(1127) 0x46e103 NOPW	%CS:(%RAX,%RAX,1)

  (1139) 0x46e110 MOV	(%R15),%RAX

  (1139) 0x46e113 MOV	%R12,(%R11,%RAX,8)

  (1139) 0x46e117 MOVQ	$0,(%R13,%R12,8)

  (1139) 0x46e120 MOV	%RAX,(%R10,%R12,8)

  (1139) 0x46e124 INC	%R12

  (1139) 0x46e127 ADD	$0x8,%R15

  (1139) 0x46e12b CMP	%R12,%RCX

  (1139) 0x46e12e JNE	46e110

(1127) 0x46e130 MOV	-0xd8(%RBP),%RCX

(1127) 0x46e137 MOV	(%RCX,%R9,8),%RAX

(1127) 0x46e13b MOV	0x8(%RCX,%R9,8),%RCX

(1127) 0x46e140 CMP	%RCX,%RAX

(1127) 0x46e143 MOV	-0xa0(%RBP),%R15

(1127) 0x46e14a MOV	%R11,%R12

(1127) 0x46e14d JGE	46e1a0

(1127) 0x46e14f MOV	-0x60(%RBP),%RDX

(1127) 0x46e153 MOV	(%RDX),%RDX

(1127) 0x46e156 DEC	%RDX

(1127) 0x46e159 JMP	46e168

0x46e15b NOPL	(%RAX,%RAX,1)

  (1138) 0x46e160 INC	%RAX

  (1138) 0x46e163 CMP	%RCX,%RAX

  (1138) 0x46e166 JGE	46e1a0

  (1138) 0x46e168 MOV	-0x180(%RBP),%RSI

  (1138) 0x46e16f MOV	(%RSI,%RAX,8),%RSI

  (1138) 0x46e173 MOV	-0x190(%RBP),%RDI

  (1138) 0x46e17a CMP	%RDX,(%RDI,%RSI,8)

  (1138) 0x46e17e JNE	46e160

  (1138) 0x46e180 MOV	-0x78(%RBP),%RCX

  (1138) 0x46e184 MOV	%R9,(%RCX,%RSI,8)

  (1138) 0x46e188 MOV	-0xd8(%RBP),%RCX

  (1138) 0x46e18f MOV	0x8(%RCX,%R9,8),%RCX

  (1138) 0x46e194 JMP	46e160

0x46e196 NOPW	%CS:(%RAX,%RAX,1)

(1127) 0x46e1a0 MOV	-0xe0(%RBP),%RCX

(1127) 0x46e1a7 MOV	(%RCX,%R9,8),%RAX

(1127) 0x46e1ab MOV	0x8(%RCX,%R9,8),%RCX

(1127) 0x46e1b0 CMP	%RCX,%RAX

(1127) 0x46e1b3 JGE	46e210

(1127) 0x46e1b5 MOV	-0x60(%RBP),%RDX

(1127) 0x46e1b9 MOV	(%RDX),%RDX

(1127) 0x46e1bc DEC	%RDX

(1127) 0x46e1bf JMP	46e1d8

0x46e1c1 NOPW	%CS:(%RAX,%RAX,1)

  (1137) 0x46e1d0 INC	%RAX

  (1137) 0x46e1d3 CMP	%RCX,%RAX

  (1137) 0x46e1d6 JGE	46e210

  (1137) 0x46e1d8 MOV	-0x188(%RBP),%RSI

  (1137) 0x46e1df MOV	(%RSI,%RAX,8),%RSI

  (1137) 0x46e1e3 MOV	-0x198(%RBP),%RDI

  (1137) 0x46e1ea CMP	%RDX,(%RDI,%RSI,8)

  (1137) 0x46e1ee JNE	46e1d0

  (1137) 0x46e1f0 MOV	-0x70(%RBP),%RCX

  (1137) 0x46e1f4 MOV	%R9,(%RCX,%RSI,8)

  (1137) 0x46e1f8 MOV	-0xe0(%RBP),%RCX

  (1137) 0x46e1ff MOV	0x8(%RCX,%R9,8),%RCX

  (1137) 0x46e204 JMP	46e1d0

0x46e206 NOPW	%CS:(%RAX,%RAX,1)

(1127) 0x46e210 MOV	-0x110(%RBP),%RAX

(1127) 0x46e217 MOV	(%RAX,%R9,8),%RSI

(1127) 0x46e21b MOV	0x8(%RAX,%R9,8),%RCX

(1127) 0x46e220 LEA	0x1(%RSI),%RDX

(1127) 0x46e224 XORPD	%XMM1,%XMM1

(1127) 0x46e228 CMP	%RCX,%RDX

(1127) 0x46e22b MOV	%RSI,-0x40(%RBP)

(1127) 0x46e22f XORPD	%XMM0,%XMM0

(1127) 0x46e233 JGE	46e590

(1127) 0x46e239 MOV	-0x50(%RBP),%RAX

(1127) 0x46e23d JMP	46e25c

  (1132) 0x46e23f ADDSD	(%RBX,%RDX,8),%XMM0

  (1132) 0x46e244 NOPW	%CS:(%RAX,%RAX,1)

  (1132) 0x46e250 INC	%RDX

  (1132) 0x46e253 CMP	%RCX,%RDX

  (1132) 0x46e256 JE	46e590

  (1132) 0x46e25c MOV	-0x170(%RBP),%RSI

  (1132) 0x46e263 MOV	(%RSI,%RDX,8),%RSI

  (1132) 0x46e267 MOV	-0x78(%RBP),%RDI

  (1132) 0x46e26b CMP	%R9,(%RDI,%RSI,8)

  (1132) 0x46e26f JNE	46e2a0

  (1132) 0x46e271 MOV	-0xa8(%RBP),%R8

  (1132) 0x46e278 MOV	(%R8,%RSI,8),%RDI

  (1132) 0x46e27c MOV	0x8(%R8,%RSI,8),%R8

  (1132) 0x46e281 MOV	%R8,%R9

  (1132) 0x46e284 SUB	%RDI,%R9

  (1132) 0x46e287 JLE	46e410

  (1132) 0x46e28d CMP	$0x4,%R9

  (1132) 0x46e291 JAE	46e2ce

  (1132) 0x46e293 JMP	46e3a3

0x46e298 NOPL	(%RAX,%RAX,1)

  (1132) 0x46e2a0 MOV	-0x158(%RBP),%RDI

  (1132) 0x46e2a7 CMPQ	$-0x3,(%RDI,%RSI,8)

  (1132) 0x46e2ac JE	46e250

  (1132) 0x46e2ae CMPQ	$0x1,-0xe8(%RBP)

  (1132) 0x46e2b6 JE	46e23f

  (1132) 0x46e2b8 MOV	-0xc8(%RBP),%R8

  (1132) 0x46e2bf MOV	(%R8,%R9,8),%RDI

  (1132) 0x46e2c3 CMP	(%R8,%RSI,8),%RDI

  (1132) 0x46e2c7 JNE	46e250

  (1132) 0x46e2c9 JMP	46e23f

  (1132) 0x46e2ce MOV	%R9,%R10

  (1132) 0x46e2d1 SHR	$0x2,%R10

  (1132) 0x46e2d5 LEA	0x18(,%RDI,8),%R11

  (1132) 0x46e2dd MOV	-0x48(%RBP),%R12

  (1132) 0x46e2e1 NOPW	%CS:(%RAX,%RAX,1)

    (1135) 0x46e2f0 MOVSD	-0x18(%R14,%R11,1),%XMM2

    (1135) 0x46e2f7 MULSD	(%RBX,%RDX,8),%XMM2

    (1135) 0x46e2fc MOV	-0x18(%RAX,%R11,1),%R15

    (1135) 0x46e301 MOV	(%R12,%R15,8),%R15

    (1135) 0x46e305 MOVSD	(%R14,%R15,8),%XMM3

    (1135) 0x46e30b ADDSD	%XMM2,%XMM3

    (1135) 0x46e30f MOVSD	%XMM3,(%R14,%R15,8)

    (1135) 0x46e315 MOVSD	-0x10(%R14,%R11,1),%XMM3

    (1135) 0x46e31c MULSD	(%RBX,%RDX,8),%XMM3

    (1135) 0x46e321 MOV	-0x10(%RAX,%R11,1),%R15

    (1135) 0x46e326 MOV	(%R12,%R15,8),%R15

    (1135) 0x46e32a MOVSD	(%R14,%R15,8),%XMM4

    (1135) 0x46e330 ADDSD	%XMM3,%XMM4

    (1135) 0x46e334 MOVSD	%XMM4,(%R14,%R15,8)

    (1135) 0x46e33a MOVSD	-0x8(%R14,%R11,1),%XMM4

    (1135) 0x46e341 MULSD	(%RBX,%RDX,8),%XMM4

    (1135) 0x46e346 MOV	-0x8(%RAX,%R11,1),%R15

    (1135) 0x46e34b MOV	(%R12,%R15,8),%R15

    (1135) 0x46e34f MOVSD	(%R14,%R15,8),%XMM5

    (1135) 0x46e355 ADDSD	%XMM4,%XMM5

    (1135) 0x46e359 MOVSD	%XMM5,(%R14,%R15,8)

    (1135) 0x46e35f MOVSD	(%R14,%R11,1),%XMM7

    (1135) 0x46e365 MULSD	(%RBX,%RDX,8),%XMM7

    (1135) 0x46e36a MOV	(%RAX,%R11,1),%R15

    (1135) 0x46e36e MOV	(%R12,%R15,8),%R15

    (1135) 0x46e372 MOVSD	(%R14,%R15,8),%XMM5

    (1135) 0x46e378 ADDSD	%XMM7,%XMM5

    (1135) 0x46e37c MOVSD	%XMM5,(%R14,%R15,8)

    (1135) 0x46e382 ADDSD	%XMM7,%XMM4

    (1135) 0x46e386 ADDSD	%XMM2,%XMM3

    (1135) 0x46e38a ADDSD	%XMM4,%XMM3

    (1135) 0x46e38e ADDSD	%XMM3,%XMM1

    (1135) 0x46e392 ADDSD	%XMM3,%XMM0

    (1135) 0x46e396 ADD	$0x20,%R11

    (1135) 0x46e39a DEC	%R10

    (1135) 0x46e39d JNE	46e2f0

  (1132) 0x46e3a3 MOV	%R9,%R10

  (1132) 0x46e3a6 AND	$-0x4,%R10

  (1132) 0x46e3aa CMP	%R9,%R10

  (1132) 0x46e3ad JAE	46e405

  (1132) 0x46e3af ADD	%R10,%RDI

  (1132) 0x46e3b2 MOV	-0xa0(%RBP),%R15

  (1132) 0x46e3b9 MOV	-0x30(%RBP),%R10

  (1132) 0x46e3bd MOV	-0x48(%RBP),%R12

  (1132) 0x46e3c1 NOPW	%CS:(%RAX,%RAX,1)

    (1136) 0x46e3d0 MOV	(%RAX,%RDI,8),%R9

    (1136) 0x46e3d4 MOVSD	(%R14,%RDI,8),%XMM7

    (1136) 0x46e3da MULSD	(%RBX,%RDX,8),%XMM7

    (1136) 0x46e3df MOV	(%R12,%R9,8),%R9

    (1136) 0x46e3e3 MOVSD	(%R14,%R9,8),%XMM2

    (1136) 0x46e3e9 ADDSD	%XMM7,%XMM2

    (1136) 0x46e3ed MOVSD	%XMM2,(%R14,%R9,8)

    (1136) 0x46e3f3 ADDSD	%XMM7,%XMM1

    (1136) 0x46e3f7 ADDSD	%XMM7,%XMM0

    (1136) 0x46e3fb INC	%RDI

    (1136) 0x46e3fe CMP	%RDI,%R8

    (1136) 0x46e401 JNE	46e3d0

  (1132) 0x46e403 JMP	46e410

  (1132) 0x46e405 MOV	-0xa0(%RBP),%R15

  (1132) 0x46e40c MOV	-0x30(%RBP),%R10

  (1132) 0x46e410 MOV	-0xb0(%RBP),%RAX

  (1132) 0x46e417 MOV	(%RAX,%RSI,8),%RDI

  (1132) 0x46e41b MOV	0x8(%RAX,%RSI,8),%RSI

  (1132) 0x46e420 MOV	%RSI,%R8

  (1132) 0x46e423 SUB	%RDI,%R8

  (1132) 0x46e426 JLE	46e440

  (1132) 0x46e428 CMP	$0x4,%R8

  (1132) 0x46e42c MOV	-0x58(%RBP),%R12

  (1132) 0x46e430 JAE	46e44d

  (1132) 0x46e432 JMP	46e51c

0x46e437 NOPW	(%RAX,%RAX,1)

  (1132) 0x46e440 MOV	-0x50(%RBP),%RAX

  (1132) 0x46e444 MOV	-0x58(%RBP),%R12

  (1132) 0x46e448 JMP	46e583

  (1132) 0x46e44d MOV	%R8,%R9

  (1132) 0x46e450 SHR	$0x2,%R9

  (1132) 0x46e454 MOV	%R10,%RAX

  (1132) 0x46e457 LEA	0x18(,%RDI,8),%R10

  (1132) 0x46e45f NOP

    (1133) 0x46e460 MOVSD	-0x18(%R13,%R10,1),%XMM2

    (1133) 0x46e467 MULSD	(%RBX,%RDX,8),%XMM2

    (1133) 0x46e46c MOV	-0x18(%RAX,%R10,1),%R11

    (1133) 0x46e471 MOV	(%R12,%R11,8),%R11

    (1133) 0x46e475 MOVSD	(%R13,%R11,8),%XMM3

    (1133) 0x46e47c ADDSD	%XMM2,%XMM3

    (1133) 0x46e480 MOVSD	%XMM3,(%R13,%R11,8)

    (1133) 0x46e487 MOVSD	-0x10(%R13,%R10,1),%XMM3

    (1133) 0x46e48e MULSD	(%RBX,%RDX,8),%XMM3

    (1133) 0x46e493 MOV	-0x10(%RAX,%R10,1),%R11

    (1133) 0x46e498 MOV	(%R12,%R11,8),%R11

    (1133) 0x46e49c MOVSD	(%R13,%R11,8),%XMM4

    (1133) 0x46e4a3 ADDSD	%XMM3,%XMM4

    (1133) 0x46e4a7 MOVSD	%XMM4,(%R13,%R11,8)

    (1133) 0x46e4ae MOVSD	-0x8(%R13,%R10,1),%XMM4

    (1133) 0x46e4b5 MULSD	(%RBX,%RDX,8),%XMM4

    (1133) 0x46e4ba MOV	-0x8(%RAX,%R10,1),%R11

    (1133) 0x46e4bf MOV	(%R12,%R11,8),%R11

    (1133) 0x46e4c3 MOVSD	(%R13,%R11,8),%XMM5

    (1133) 0x46e4ca ADDSD	%XMM4,%XMM5

    (1133) 0x46e4ce MOVSD	%XMM5,(%R13,%R11,8)

    (1133) 0x46e4d5 MOVSD	(%R13,%R10,1),%XMM7

    (1133) 0x46e4dc MULSD	(%RBX,%RDX,8),%XMM7

    (1133) 0x46e4e1 MOV	(%RAX,%R10,1),%R11

    (1133) 0x46e4e5 MOV	(%R12,%R11,8),%R11

    (1133) 0x46e4e9 MOVSD	(%R13,%R11,8),%XMM5

    (1133) 0x46e4f0 ADDSD	%XMM7,%XMM5

    (1133) 0x46e4f4 MOVSD	%XMM5,(%R13,%R11,8)

    (1133) 0x46e4fb ADDSD	%XMM7,%XMM4

    (1133) 0x46e4ff ADDSD	%XMM2,%XMM3

    (1133) 0x46e503 ADDSD	%XMM4,%XMM3

    (1133) 0x46e507 ADDSD	%XMM3,%XMM1

    (1133) 0x46e50b ADDSD	%XMM3,%XMM0

    (1133) 0x46e50f ADD	$0x20,%R10

    (1133) 0x46e513 DEC	%R9

    (1133) 0x46e516 JNE	46e460

  (1132) 0x46e51c MOV	%R8,%R9

  (1132) 0x46e51f AND	$-0x4,%R9

  (1132) 0x46e523 CMP	%R8,%R9

  (1132) 0x46e526 JAE	46e57b

  (1132) 0x46e528 ADD	%R9,%RDI

  (1132) 0x46e52b MOV	-0x30(%RBP),%R10

  (1132) 0x46e52f MOV	-0x50(%RBP),%RAX

  (1132) 0x46e533 MOV	-0x38(%RBP),%R9

  (1132) 0x46e537 NOPW	(%RAX,%RAX,1)

    (1134) 0x46e540 MOV	(%R10,%RDI,8),%R8

    (1134) 0x46e544 MOVSD	(%R13,%RDI,8),%XMM7

    (1134) 0x46e54b MULSD	(%RBX,%RDX,8),%XMM7

    (1134) 0x46e550 MOV	(%R12,%R8,8),%R8

    (1134) 0x46e554 MOVSD	(%R13,%R8,8),%XMM2

    (1134) 0x46e55b ADDSD	%XMM7,%XMM2

    (1134) 0x46e55f MOVSD	%XMM2,(%R13,%R8,8)

    (1134) 0x46e566 ADDSD	%XMM7,%XMM1

    (1134) 0x46e56a ADDSD	%XMM7,%XMM0

    (1134) 0x46e56e INC	%RDI

    (1134) 0x46e571 CMP	%RDI,%RSI

    (1134) 0x46e574 JNE	46e540

  (1132) 0x46e576 JMP	46e250

  (1132) 0x46e57b MOV	-0x30(%RBP),%R10

  (1132) 0x46e57f MOV	-0x50(%RBP),%RAX

  (1132) 0x46e583 MOV	-0x38(%RBP),%R9

  (1132) 0x46e587 JMP	46e250

0x46e58c NOPL	(%RAX)

(1127) 0x46e590 MOV	-0x118(%RBP),%RAX

(1127) 0x46e597 MOV	(%RAX,%R9,8),%RCX

(1127) 0x46e59b MOV	0x8(%RAX,%R9,8),%RDX

(1127) 0x46e5a0 CMP	%RDX,%RCX

(1127) 0x46e5a3 JL	46e6c6

(1127) 0x46e5a9 MOV	-0x40(%RBP),%RAX

(1127) 0x46e5ad MULSD	(%RBX,%RAX,8),%XMM1

(1127) 0x46e5b2 UCOMISD	%XMM6,%XMM1

(1127) 0x46e5b6 JE	46e5c8

(1127) 0x46e5b8 XORPD	0x156b40(%RIP),%XMM0

(1127) 0x46e5c0 DIVSD	%XMM1,%XMM0

(1127) 0x46e5c4 MOVAPD	%XMM0,%XMM7

(1127) 0x46e5c8 MOV	-0xa8(%RBP),%RCX

(1127) 0x46e5cf MOV	(%RCX,%R9,8),%RAX

(1127) 0x46e5d3 MOV	0x8(%RCX,%R9,8),%RCX

(1127) 0x46e5d8 SUB	%RAX,%RCX

(1127) 0x46e5db JLE	46e879

(1127) 0x46e5e1 CMP	$0x8,%RCX

(1127) 0x46e5e5 JB	46e677

(1127) 0x46e5eb MOV	%RCX,%RDX

(1127) 0x46e5ee SHR	$0x3,%RDX

(1127) 0x46e5f2 MOV	-0xf8(%RBP),%RSI

(1127) 0x46e5f9 LEA	(%RSI,%RAX,8),%RSI

(1127) 0x46e5fd NOPL	(%RAX)

  (1129) 0x46e600 MOVSD	-0x38(%RSI),%XMM0

  (1129) 0x46e605 MULSD	%XMM7,%XMM0

  (1129) 0x46e609 MOVSD	%XMM0,-0x38(%RSI)

  (1129) 0x46e60e MOVSD	-0x30(%RSI),%XMM0

  (1129) 0x46e613 MULSD	%XMM7,%XMM0

  (1129) 0x46e617 MOVSD	%XMM0,-0x30(%RSI)

  (1129) 0x46e61c MOVSD	-0x28(%RSI),%XMM0

  (1129) 0x46e621 MULSD	%XMM7,%XMM0

  (1129) 0x46e625 MOVSD	%XMM0,-0x28(%RSI)

  (1129) 0x46e62a MOVSD	-0x20(%RSI),%XMM0

  (1129) 0x46e62f MULSD	%XMM7,%XMM0

  (1129) 0x46e633 MOVSD	%XMM0,-0x20(%RSI)

  (1129) 0x46e638 MOVSD	-0x18(%RSI),%XMM0

  (1129) 0x46e63d MULSD	%XMM7,%XMM0

  (1129) 0x46e641 MOVSD	%XMM0,-0x18(%RSI)

  (1129) 0x46e646 MOVSD	-0x10(%RSI),%XMM0

  (1129) 0x46e64b MULSD	%XMM7,%XMM0

  (1129) 0x46e64f MOVSD	%XMM0,-0x10(%RSI)

  (1129) 0x46e654 MOVSD	-0x8(%RSI),%XMM0

  (1129) 0x46e659 MULSD	%XMM7,%XMM0

  (1129) 0x46e65d MOVSD	%XMM0,-0x8(%RSI)

  (1129) 0x46e662 MOVSD	(%RSI),%XMM0

  (1129) 0x46e666 MULSD	%XMM7,%XMM0

  (1129) 0x46e66a MOVSD	%XMM0,(%RSI)

  (1129) 0x46e66e ADD	$0x40,%RSI

  (1129) 0x46e672 DEC	%RDX

  (1129) 0x46e675 JNE	46e600

(1127) 0x46e677 MOV	%ECX,%EDX

(1127) 0x46e679 AND	$0x7,%EDX

(1127) 0x46e67c DEC	%RDX

(1127) 0x46e67f CMP	$0x6,%RDX

(1127) 0x46e683 JA	46e879

0x46e689 AND	$-0x8,%RCX

0x46e68d JMP	0x5ca620(,%RDX,8)

0x46e694 ADD	%RCX,%RAX

0x46e697 JMP	46e869

0x46e69c NOPL	(%RAX)

  (1130) 0x46e6a0 MOV	-0xd0(%RBP),%RAX

  (1130) 0x46e6a7 ADDSD	(%RAX,%RCX,8),%XMM0

  (1130) 0x46e6ac MOV	%R12,%R11

  (1130) 0x46e6af INC	%RCX

  (1130) 0x46e6b2 CMP	%RDX,%RCX

  (1130) 0x46e6b5 MOV	-0x30(%RBP),%R10

  (1130) 0x46e6b9 MOV	%R11,%R12

  (1130) 0x46e6bc MOV	-0x38(%RBP),%R9

  (1130) 0x46e6c0 JE	46e5a9

  (1130) 0x46e6c6 MOV	-0x178(%RBP),%RAX

  (1130) 0x46e6cd LEA	(%RAX,%RCX,8),%RSI

  (1130) 0x46e6d1 CMPQ	$0,-0x1a0(%RBP)

  (1130) 0x46e6d9 JE	46e6e9

  (1130) 0x46e6db MOV	(%RSI),%RSI

  (1130) 0x46e6de MOV	-0x160(%RBP),%RDI

  (1130) 0x46e6e5 LEA	(%RDI,%RSI,8),%RSI

  (1130) 0x46e6e9 MOV	(%RSI),%RDI

  (1130) 0x46e6ec TEST	%RDI,%RDI

  (1130) 0x46e6ef JS	46e7a0

  (1130) 0x46e6f5 MOV	-0x70(%RBP),%RSI

  (1130) 0x46e6f9 CMP	%R9,(%RSI,%RDI,8)

  (1130) 0x46e6fd JNE	46e7a0

  (1130) 0x46e703 MOV	-0x150(%RBP),%RSI

  (1130) 0x46e70a MOV	0x8(%RSI,%RDI,8),%RSI

  (1130) 0x46e70f TEST	%RSI,%RSI

  (1130) 0x46e712 JLE	46e6ac

  (1130) 0x46e714 MOV	-0x140(%RBP),%R8

  (1130) 0x46e71b MOV	(%R8,%RDI,8),%RDI

  (1130) 0x46e71f ADD	%RDI,%RSI

  (1130) 0x46e722 MOV	-0x60(%RBP),%R8

  (1130) 0x46e726 MOV	(%R8),%R8

  (1130) 0x46e729 MOV	-0x148(%RBP),%R9

  (1130) 0x46e730 MOV	(%R9,%R8,8),%R8

  (1130) 0x46e734 MOV	%R12,%R11

  (1130) 0x46e737 MOV	-0x48(%RBP),%R12

  (1130) 0x46e73b MOV	-0xd0(%RBP),%RAX

  (1130) 0x46e742 NOPW	%CS:(%RAX,%RAX,1)

    (1131) 0x46e750 MOV	(%R8,%RDI,8),%R9

    (1131) 0x46e754 MOVSD	(%R15,%RDI,8),%XMM7

    (1131) 0x46e75a MULSD	(%RAX,%RCX,8),%XMM7

    (1131) 0x46e75f TEST	%R9,%R9

    (1131) 0x46e762 LEA	(%R11,%R9,8),%R10

    (1131) 0x46e766 NOT	%R9

    (1131) 0x46e769 LEA	(%R12,%R9,8),%R9

    (1131) 0x46e76d CMOVNS	%R10,%R9

    (1131) 0x46e771 MOV	%R13,%R10

    (1131) 0x46e774 CMOVS	%R14,%R10

    (1131) 0x46e778 MOV	(%R9),%R9

    (1131) 0x46e77b MOVSD	(%R10,%R9,8),%XMM2

    (1131) 0x46e781 ADDSD	%XMM7,%XMM2

    (1131) 0x46e785 MOVSD	%XMM2,(%R10,%R9,8)

    (1131) 0x46e78b ADDSD	%XMM7,%XMM1

    (1131) 0x46e78f ADDSD	%XMM7,%XMM0

    (1131) 0x46e793 INC	%RDI

    (1131) 0x46e796 CMP	%RSI,%RDI

    (1131) 0x46e799 JL	46e750

  (1130) 0x46e79b JMP	46e6af

  (1130) 0x46e7a0 MOV	-0x168(%RBP),%RSI

  (1130) 0x46e7a7 CMPQ	$-0x3,(%RSI,%RDI,8)

  (1130) 0x46e7ac JE	46e6ac

  (1130) 0x46e7b2 CMPQ	$0x1,-0xe8(%RBP)

  (1130) 0x46e7ba JE	46e6a0

  (1130) 0x46e7c0 MOV	-0x138(%RBP),%RSI

  (1130) 0x46e7c7 MOV	(%RSI,%RDI,8),%RSI

  (1130) 0x46e7cb MOV	-0xc8(%RBP),%RDI

  (1130) 0x46e7d2 CMP	(%RDI,%R9,8),%RSI

  (1130) 0x46e7d6 JE	46e6a0

  (1130) 0x46e7dc JMP	46e6ac

0x46e7e1 ADD	%RCX,%RAX

0x46e7e4 JMP	46e857

0x46e7e6 ADD	%RCX,%RAX

0x46e7e9 JMP	46e845

0x46e7eb ADD	%RCX,%RAX

0x46e7ee JMP	46e833

0x46e7f0 ADD	%RCX,%RAX

0x46e7f3 JMP	46e821

0x46e7f5 ADD	%RCX,%RAX

0x46e7f8 JMP	46e80f

0x46e7fa ADD	%RCX,%RAX

0x46e7fd MOVSD	0x30(%R14,%RAX,8),%XMM0

0x46e804 MULSD	%XMM7,%XMM0

0x46e808 MOVSD	%XMM0,0x30(%R14,%RAX,8)

0x46e80f MOVSD	0x28(%R14,%RAX,8),%XMM0

0x46e816 MULSD	%XMM7,%XMM0

0x46e81a MOVSD	%XMM0,0x28(%R14,%RAX,8)

0x46e821 MOVSD	0x20(%R14,%RAX,8),%XMM0

0x46e828 MULSD	%XMM7,%XMM0

0x46e82c MOVSD	%XMM0,0x20(%R14,%RAX,8)

0x46e833 MOVSD	0x18(%R14,%RAX,8),%XMM0

0x46e83a MULSD	%XMM7,%XMM0

0x46e83e MOVSD	%XMM0,0x18(%R14,%RAX,8)

0x46e845 MOVSD	0x10(%R14,%RAX,8),%XMM0

0x46e84c MULSD	%XMM7,%XMM0

0x46e850 MOVSD	%XMM0,0x10(%R14,%RAX,8)

0x46e857 MOVSD	0x8(%R14,%RAX,8),%XMM0

0x46e85e MULSD	%XMM7,%XMM0

0x46e862 MOVSD	%XMM0,0x8(%R14,%RAX,8)

0x46e869 MOVSD	(%R14,%RAX,8),%XMM0

0x46e86f MULSD	%XMM7,%XMM0

0x46e873 MOVSD	%XMM0,(%R14,%RAX,8)

(1127) 0x46e879 MOV	-0xb0(%RBP),%RCX

(1127) 0x46e880 MOV	(%RCX,%R9,8),%RAX

(1127) 0x46e884 MOV	0x8(%RCX,%R9,8),%RCX

(1127) 0x46e889 SUB	%RAX,%RCX

(1127) 0x46e88c JLE	46dd22

(1127) 0x46e892 CMP	$0x8,%RCX

(1127) 0x46e896 JB	46e927

(1127) 0x46e89c MOV	%RCX,%RDX

(1127) 0x46e89f SHR	$0x3,%RDX

(1127) 0x46e8a3 MOV	-0xf0(%RBP),%RSI

(1127) 0x46e8aa LEA	(%RSI,%RAX,8),%RSI

(1127) 0x46e8ae XCHG	%AX,%AX

  (1128) 0x46e8b0 MOVSD	-0x38(%RSI),%XMM0

  (1128) 0x46e8b5 MULSD	%XMM7,%XMM0

  (1128) 0x46e8b9 MOVSD	%XMM0,-0x38(%RSI)

  (1128) 0x46e8be MOVSD	-0x30(%RSI),%XMM0

  (1128) 0x46e8c3 MULSD	%XMM7,%XMM0

  (1128) 0x46e8c7 MOVSD	%XMM0,-0x30(%RSI)

  (1128) 0x46e8cc MOVSD	-0x28(%RSI),%XMM0

  (1128) 0x46e8d1 MULSD	%XMM7,%XMM0

  (1128) 0x46e8d5 MOVSD	%XMM0,-0x28(%RSI)

  (1128) 0x46e8da MOVSD	-0x20(%RSI),%XMM0

  (1128) 0x46e8df MULSD	%XMM7,%XMM0

  (1128) 0x46e8e3 MOVSD	%XMM0,-0x20(%RSI)

  (1128) 0x46e8e8 MOVSD	-0x18(%RSI),%XMM0

  (1128) 0x46e8ed MULSD	%XMM7,%XMM0

  (1128) 0x46e8f1 MOVSD	%XMM0,-0x18(%RSI)

  (1128) 0x46e8f6 MOVSD	-0x10(%RSI),%XMM0

  (1128) 0x46e8fb MULSD	%XMM7,%XMM0

  (1128) 0x46e8ff MOVSD	%XMM0,-0x10(%RSI)

  (1128) 0x46e904 MOVSD	-0x8(%RSI),%XMM0

  (1128) 0x46e909 MULSD	%XMM7,%XMM0

  (1128) 0x46e90d MOVSD	%XMM0,-0x8(%RSI)

  (1128) 0x46e912 MOVSD	(%RSI),%XMM0

  (1128) 0x46e916 MULSD	%XMM7,%XMM0

  (1128) 0x46e91a MOVSD	%XMM0,(%RSI)

  (1128) 0x46e91e ADD	$0x40,%RSI

  (1128) 0x46e922 DEC	%RDX

  (1128) 0x46e925 JNE	46e8b0

(1127) 0x46e927 MOV	%ECX,%EDX

(1127) 0x46e929 AND	$0x7,%EDX

(1127) 0x46e92c DEC	%RDX

(1127) 0x46e92f CMP	$0x6,%RDX

(1127) 0x46e933 JA	46dd22

0x46e939 AND	$-0x8,%RCX

0x46e93d JMP	0x5ca658(,%RDX,8)

0x46e944 ADD	%RCX,%RAX

0x46e947 JMP	46dd10

0x46e94c ADD	%RCX,%RAX

0x46e94f JMP	46dcfe

0x46e954 ADD	%RCX,%RAX

0x46e957 JMP	46dcec

0x46e95c ADD	%RCX,%RAX

0x46e95f JMP	46dcda

0x46e964 ADD	%RCX,%RAX

0x46e967 JMP	46dcc8

0x46e96c ADD	%RCX,%RAX

0x46e96f JMP	46dcb6

0x46e974 MOV	-0x78(%RBP),%RDI

0x46e978 CALL	5a8930 <hypre_Free>

0x46e97d MOV	-0x70(%RBP),%RDI

0x46e981 CALL	5a8930 <hypre_Free>

0x46e986 MOV	-0x48(%RBP),%RDI

0x46e98a CALL	5a8930 <hypre_Free>

0x46e98f MOV	%R12,%RDI

0x46e992 ADD	$0x178,%RSP

0x46e999 POP	%RBX

0x46e99a POP	%R12

0x46e99c POP	%R13

0x46e99e POP	%R14

0x46e9a0 POP	%R15

0x46e9a2 POP	%RBP

0x46e9a3 JMP	5a8930

0x46e9a8 NOPL	(%RAX,%RAX,1)

Coverage (%)	Name	Source Location	Module
►96.52+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
○	__kmp_launch_thread		libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]		libiomp5.so
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►2.98+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
○	__kmp_fork_call		libiomp5.so
○	__kmpc_fork_call		libiomp5.so
○	hypre_BoomerAMGBuildMultipass	par_multi_interp.c:1737	exec
○	hypre_BoomerAMGSetup	par_amg_setup.c:737	exec
○	hypre_PCGSetup	pcg.c:234	exec
○	main	amg.c:398	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start		exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.01% of application time for run icx_5

Source file and lines	par_multi_interp.c:1737-1881
Module	exec

The function is defined in /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1737,1747-1754,1760-1881.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 36.00 to 7.00 cycles (5.14x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is probably not vectorized. Only 12% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 36.00 to 3.64 cycles (9.89x speedup).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Performance is limited by:

reading data from caches/RAM (load units are a bottleneck)
writing data to caches/RAM (the store unit is a bottleneck)

Workaround

Read less array elements
Write less array elements
Provide more information to your compiler:
- use the 'restrict' C99 keyword

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

_intel_fast_memset: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1761
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1763
hypre_CAlloc: 4 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1748
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1751
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1754
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1753
hypre_Free: 3 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1878
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1879
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1880
hypre_GetThreadNum: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1766
hypre_NumActiveThreads: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1767

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVG: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1753
DIV: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1768
IDIV: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1768
JMP: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1873
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1875

Conversion instructions

Detected expensive conversion instructions.

Details

CQTO: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1768

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

14 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).

Matching between your function (in the source code) and the binary function

The binary function is composed of 14 FP arithmetical operations:

14: multiply

The binary function is loading 568 bytes (71 double precision FP elements). The binary function is storing 504 bytes (63 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.01 FP operations per loaded or stored byte.

General properties

nb instructions	275
nb uops	279
loop length	1331
used x86 registers	15
used mmx registers	0
used xmm registers	3
used ymm registers	0
used zmm registers	0
nb stack references	82

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	34.88 cycles
front end	34.88 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	15.50	15.50	15.50	15.50	15.50	15.50	36.00	36.00	36.00	36.00	7.00	7.00	0.00	0.00	7.00	7.00
cycles	15.50	15.50	15.50	15.50	15.50	15.50	36.00	36.00	36.00	36.00	7.00	7.00	0.00	0.00	7.00	7.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

13.00-18.00

Cycles summary

Front-end	34.88
Dispatch	36.00
DIV/SQRT	13.00-18.00
Overall L1	36.00

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	2%
load	0%
store	0%
mul	0%
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	100%

INT+FP

all	0%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	3%

Vector efficiency ratios

INT

all	12%
load	12%
store	12%
mul	12%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
other	10%

all	12%
load	12%
store	12%
mul	12%
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

INT+FP

all	12%
load	12%
store	12%
mul	12%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	9%
other	11%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 36.00 cycles. At this rate:

6% of peak load performance is reached (15.78 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
10% of peak store performance is reached (14.00 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 46d960

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x178,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R9,-0x1a0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R8,-0xc8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RCX,-0xe8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDX,-0x158(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x138(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x130(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x128(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xa0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x120(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x198(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x118(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x190(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x110(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x108(%RBP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x100(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0xf8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xf0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x160(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xe8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x150(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xe0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x148(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xd8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xc0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xd0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xb8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xc8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x130(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xc0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x128(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xb8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xb0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x120(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xa8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x138(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xa0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x168(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x98(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x140(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x90(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x88(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xb0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x80(%RBP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x78(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x70(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x68(%RBP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x60(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x58(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x188(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x50(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xe0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x48(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x180(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x40(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xd8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x38(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x178(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x30(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x118(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x28(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xd0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x20(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x170(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x18(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x110(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x10(%RBP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
TEST %RDI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RCX,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDI,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JE 46db83 <hypre_BoomerAMGBuildMultipass.extracted.28+0x223>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
CALL 5a8860 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV %RAX,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
TEST %RCX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 46db8e <hypre_BoomerAMGBuildMultipass.extracted.28+0x22e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV %RCX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 5a8860 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,-0x70(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
TEST %R12,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 46db99 <hypre_BoomerAMGBuildMultipass.extracted.28+0x239>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV %R12,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 5a8860 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 46db9b <hypre_BoomerAMGBuildMultipass.extracted.28+0x23b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %RAX,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
TEST %RCX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 46db5e <hypre_BoomerAMGBuildMultipass.extracted.28+0x1fe>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %RAX,-0x70(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
TEST %R12,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 46db74 <hypre_BoomerAMGBuildMultipass.extracted.28+0x214>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %RAX,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x58(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMP %R15,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
CMOVG %RAX,%R15	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV %R15,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 5a8860 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV -0x80(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
TEST %RDX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JLE 46dbd5 <hypre_BoomerAMGBuildMultipass.extracted.28+0x275>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
SAL $0x3,%RDX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV -0x78(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV $0xff,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
CALL 5b5350 <_intel_fast_memset>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
TEST %RDX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JLE 46dbf0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x290>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
SAL $0x3,%RDX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV -0x70(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV $0xff,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
CALL 5b5350 <_intel_fast_memset>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
CALL 5ac1c0 <hypre_GetThreadNum>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 5ac1b0 <hypre_NumActiveThreads>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV -0x60(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x40(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDX,%RAX,8),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV -0x98(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV %R9,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
OR %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SHR $0x20,%RAX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JE 46dc2c <hypre_BoomerAMGBuildMultipass.extracted.28+0x2cc>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R9,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CQTO																				scal (12.5%)
IDIV %RCX	2	0	0	0	2	0	0	0	0	0	0	0	0	0	0	0	0	9-19	7-12	scal (12.5%)
JMP 46dc33 <hypre_BoomerAMGBuildMultipass.extracted.28+0x2d3>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV %R9D,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
DIV %ECX	2	0	0	0	2	0	0	0	0	0	0	0	0	0	0	0	0	10-17	6	scal (6.3%)
MOV -0x30(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
IMUL %R15,%RDX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
DEC %RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
LEA 0x1(%R15),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
IMUL %RAX,%RDI	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	scal (12.5%)
CMP %RCX,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
CMOVE %R9,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RDI,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CMP %RDI,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JGE 46e974 <hypre_BoomerAMGBuildMultipass.extracted.28+0x1014>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
ADD %RSI,-0x80(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
ADD %RSI,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x50(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD $0x38,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,-0x108(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA 0x38(%R10),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RAX,-0x100(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA 0x38(%R14),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RAX,-0xf8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA 0x38(%R13),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RAX,-0xf0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
XORPD %XMM6,%XMM6	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV %R12,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JMP 46dd36 <hypre_BoomerAMGBuildMultipass.extracted.28+0x3d6>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVSD 0x30(%R13,%RAX,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MULSD %XMM7,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
MOVSD %XMM0,0x30(%R13,%RAX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOVSD 0x28(%R13,%RAX,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MULSD %XMM7,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
MOVSD %XMM0,0x28(%R13,%RAX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOVSD 0x20(%R13,%RAX,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MULSD %XMM7,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
MOVSD %XMM0,0x20(%R13,%RAX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOVSD 0x18(%R13,%RAX,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MULSD %XMM7,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
MOVSD %XMM0,0x18(%R13,%RAX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOVSD 0x10(%R13,%RAX,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MULSD %XMM7,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
MOVSD %XMM0,0x10(%R13,%RAX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOVSD 0x8(%R13,%RAX,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MULSD %XMM7,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
MOVSD %XMM0,0x8(%R13,%RAX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOVSD (%R13,%RAX,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MULSD %XMM7,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
MOVSD %XMM0,(%R13,%RAX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
AND $-0x8,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JMP 0x5ca620(,%RDX,8)	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	N/A
ADD %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 46e869 <hypre_BoomerAMGBuildMultipass.extracted.28+0xf09>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
ADD %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 46e857 <hypre_BoomerAMGBuildMultipass.extracted.28+0xef7>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 46e845 <hypre_BoomerAMGBuildMultipass.extracted.28+0xee5>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 46e833 <hypre_BoomerAMGBuildMultipass.extracted.28+0xed3>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 46e821 <hypre_BoomerAMGBuildMultipass.extracted.28+0xec1>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 46e80f <hypre_BoomerAMGBuildMultipass.extracted.28+0xeaf>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVSD 0x30(%R14,%RAX,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MULSD %XMM7,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
MOVSD %XMM0,0x30(%R14,%RAX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOVSD 0x28(%R14,%RAX,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MULSD %XMM7,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
MOVSD %XMM0,0x28(%R14,%RAX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOVSD 0x20(%R14,%RAX,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MULSD %XMM7,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
MOVSD %XMM0,0x20(%R14,%RAX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOVSD 0x18(%R14,%RAX,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MULSD %XMM7,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
MOVSD %XMM0,0x18(%R14,%RAX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOVSD 0x10(%R14,%RAX,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MULSD %XMM7,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
MOVSD %XMM0,0x10(%R14,%RAX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOVSD 0x8(%R14,%RAX,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MULSD %XMM7,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
MOVSD %XMM0,0x8(%R14,%RAX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOVSD (%R14,%RAX,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MULSD %XMM7,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
MOVSD %XMM0,(%R14,%RAX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
AND $-0x8,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JMP 0x5ca658(,%RDX,8)	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	N/A
ADD %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 46dd10 <hypre_BoomerAMGBuildMultipass.extracted.28+0x3b0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 46dcfe <hypre_BoomerAMGBuildMultipass.extracted.28+0x39e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 46dcec <hypre_BoomerAMGBuildMultipass.extracted.28+0x38c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 46dcda <hypre_BoomerAMGBuildMultipass.extracted.28+0x37a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 46dcc8 <hypre_BoomerAMGBuildMultipass.extracted.28+0x368>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 46dcb6 <hypre_BoomerAMGBuildMultipass.extracted.28+0x356>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV -0x78(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
CALL 5a8930 <hypre_Free>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0x70(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
CALL 5a8930 <hypre_Free>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0x48(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
CALL 5a8930 <hypre_Free>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %R12,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
ADD $0x178,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 5a8930 <hypre_Free>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.01% of application time for run icx_5

Source file and lines	par_multi_interp.c:1737-1881
Module	exec

The function is defined in /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1737,1747-1754,1760-1881.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 36.00 to 7.00 cycles (5.14x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Performance is limited by:

reading data from caches/RAM (load units are a bottleneck)
writing data to caches/RAM (the store unit is a bottleneck)

Workaround

Read less array elements
Write less array elements
Provide more information to your compiler:
- use the 'restrict' C99 keyword

No data for this section

CALL instructions

Detected function call instructions.

Details

_intel_fast_memset: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1761
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1763
hypre_CAlloc: 4 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1748
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1751
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1754
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1753
hypre_Free: 3 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1878
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1879
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1880
hypre_GetThreadNum: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1766
hypre_NumActiveThreads: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1767

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVG: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1753
DIV: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1768
IDIV: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1768
JMP: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1873
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1875

Conversion instructions

Detected expensive conversion instructions.

Details

CQTO: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1768

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

14 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).

Matching between your function (in the source code) and the binary function

The binary function is composed of 14 FP arithmetical operations:

14: multiply

The binary function is loading 568 bytes (71 double precision FP elements). The binary function is storing 504 bytes (63 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.01 FP operations per loaded or stored byte.

General properties

nb instructions	275
nb uops	279
loop length	1331
used x86 registers	15
used mmx registers	0
used xmm registers	3
used ymm registers	0
used zmm registers	0
nb stack references	82

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	34.88 cycles
front end	34.88 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	15.50	15.50	15.50	15.50	15.50	15.50	36.00	36.00	36.00	36.00	7.00	7.00	0.00	0.00	7.00	7.00
cycles	15.50	15.50	15.50	15.50	15.50	15.50	36.00	36.00	36.00	36.00	7.00	7.00	0.00	0.00	7.00	7.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

13.00-18.00

Cycles summary

Front-end	34.88
Dispatch	36.00
DIV/SQRT	13.00-18.00
Overall L1	36.00

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	2%
load	0%
store	0%
mul	0%
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	100%

INT+FP

all	0%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	3%

Vector efficiency ratios

INT

all	12%
load	12%
store	12%
mul	12%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
other	10%

all	12%
load	12%
store	12%
mul	12%
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

INT+FP

all	12%
load	12%
store	12%
mul	12%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	9%
other	11%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 36.00 cycles. At this rate:

6% of peak load performance is reached (15.78 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
10% of peak store performance is reached (14.00 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 46d960

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x178,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R9,-0x1a0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R8,-0xc8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RCX,-0xe8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDX,-0x158(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x138(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x130(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x128(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xa0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x120(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x198(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x118(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x190(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x110(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x108(%RBP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x100(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0xf8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xf0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x160(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xe8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x150(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xe0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x148(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xd8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xc0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xd0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xb8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xc8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x130(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xc0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x128(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xb8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xb0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x120(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xa8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x138(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xa0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x168(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x98(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x140(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x90(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x88(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xb0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x80(%RBP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x78(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x70(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x68(%RBP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x60(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x58(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x188(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x50(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xe0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x48(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x180(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x40(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xd8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x38(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x178(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x30(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x118(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x28(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xd0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x20(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x170(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x18(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x110(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x10(%RBP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
TEST %RDI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RCX,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDI,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JE 46db83 <hypre_BoomerAMGBuildMultipass.extracted.28+0x223>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
CALL 5a8860 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV %RAX,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
TEST %RCX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 46db8e <hypre_BoomerAMGBuildMultipass.extracted.28+0x22e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV %RCX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 5a8860 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,-0x70(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
TEST %R12,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 46db99 <hypre_BoomerAMGBuildMultipass.extracted.28+0x239>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV %R12,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 5a8860 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 46db9b <hypre_BoomerAMGBuildMultipass.extracted.28+0x23b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %RAX,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
TEST %RCX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 46db5e <hypre_BoomerAMGBuildMultipass.extracted.28+0x1fe>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %RAX,-0x70(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
TEST %R12,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 46db74 <hypre_BoomerAMGBuildMultipass.extracted.28+0x214>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %RAX,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x58(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMP %R15,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
CMOVG %RAX,%R15	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV %R15,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 5a8860 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV -0x80(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
TEST %RDX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JLE 46dbd5 <hypre_BoomerAMGBuildMultipass.extracted.28+0x275>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
SAL $0x3,%RDX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV -0x78(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV $0xff,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
CALL 5b5350 <_intel_fast_memset>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
TEST %RDX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JLE 46dbf0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x290>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
SAL $0x3,%RDX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV -0x70(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV $0xff,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
CALL 5b5350 <_intel_fast_memset>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
CALL 5ac1c0 <hypre_GetThreadNum>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 5ac1b0 <hypre_NumActiveThreads>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV -0x60(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x40(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDX,%RAX,8),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV -0x98(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV %R9,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
OR %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SHR $0x20,%RAX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JE 46dc2c <hypre_BoomerAMGBuildMultipass.extracted.28+0x2cc>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R9,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CQTO																				scal (12.5%)
IDIV %RCX	2	0	0	0	2	0	0	0	0	0	0	0	0	0	0	0	0	9-19	7-12	scal (12.5%)
JMP 46dc33 <hypre_BoomerAMGBuildMultipass.extracted.28+0x2d3>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV %R9D,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
DIV %ECX	2	0	0	0	2	0	0	0	0	0	0	0	0	0	0	0	0	10-17	6	scal (6.3%)
MOV -0x30(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
IMUL %R15,%RDX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
DEC %RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
LEA 0x1(%R15),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
IMUL %RAX,%RDI	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	scal (12.5%)
CMP %RCX,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
CMOVE %R9,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RDI,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CMP %RDI,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JGE 46e974 <hypre_BoomerAMGBuildMultipass.extracted.28+0x1014>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
ADD %RSI,-0x80(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
ADD %RSI,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x50(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD $0x38,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,-0x108(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA 0x38(%R10),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RAX,-0x100(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA 0x38(%R14),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RAX,-0xf8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA 0x38(%R13),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RAX,-0xf0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
XORPD %XMM6,%XMM6	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV %R12,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JMP 46dd36 <hypre_BoomerAMGBuildMultipass.extracted.28+0x3d6>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVSD 0x30(%R13,%RAX,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MULSD %XMM7,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
MOVSD %XMM0,0x30(%R13,%RAX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOVSD 0x28(%R13,%RAX,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MULSD %XMM7,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
MOVSD %XMM0,0x28(%R13,%RAX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOVSD 0x20(%R13,%RAX,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MULSD %XMM7,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
MOVSD %XMM0,0x20(%R13,%RAX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOVSD 0x18(%R13,%RAX,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MULSD %XMM7,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
MOVSD %XMM0,0x18(%R13,%RAX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOVSD 0x10(%R13,%RAX,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MULSD %XMM7,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
MOVSD %XMM0,0x10(%R13,%RAX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOVSD 0x8(%R13,%RAX,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MULSD %XMM7,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
MOVSD %XMM0,0x8(%R13,%RAX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOVSD (%R13,%RAX,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MULSD %XMM7,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
MOVSD %XMM0,(%R13,%RAX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
AND $-0x8,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JMP 0x5ca620(,%RDX,8)	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	N/A
ADD %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 46e869 <hypre_BoomerAMGBuildMultipass.extracted.28+0xf09>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
ADD %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 46e857 <hypre_BoomerAMGBuildMultipass.extracted.28+0xef7>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 46e845 <hypre_BoomerAMGBuildMultipass.extracted.28+0xee5>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 46e833 <hypre_BoomerAMGBuildMultipass.extracted.28+0xed3>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 46e821 <hypre_BoomerAMGBuildMultipass.extracted.28+0xec1>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 46e80f <hypre_BoomerAMGBuildMultipass.extracted.28+0xeaf>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVSD 0x30(%R14,%RAX,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MULSD %XMM7,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
MOVSD %XMM0,0x30(%R14,%RAX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOVSD 0x28(%R14,%RAX,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MULSD %XMM7,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
MOVSD %XMM0,0x28(%R14,%RAX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOVSD 0x20(%R14,%RAX,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MULSD %XMM7,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
MOVSD %XMM0,0x20(%R14,%RAX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOVSD 0x18(%R14,%RAX,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MULSD %XMM7,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
MOVSD %XMM0,0x18(%R14,%RAX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOVSD 0x10(%R14,%RAX,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MULSD %XMM7,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
MOVSD %XMM0,0x10(%R14,%RAX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOVSD 0x8(%R14,%RAX,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MULSD %XMM7,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
MOVSD %XMM0,0x8(%R14,%RAX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOVSD (%R14,%RAX,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MULSD %XMM7,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
MOVSD %XMM0,(%R14,%RAX,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
AND $-0x8,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JMP 0x5ca658(,%RDX,8)	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	1	N/A
ADD %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 46dd10 <hypre_BoomerAMGBuildMultipass.extracted.28+0x3b0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 46dcfe <hypre_BoomerAMGBuildMultipass.extracted.28+0x39e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 46dcec <hypre_BoomerAMGBuildMultipass.extracted.28+0x38c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 46dcda <hypre_BoomerAMGBuildMultipass.extracted.28+0x37a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 46dcc8 <hypre_BoomerAMGBuildMultipass.extracted.28+0x368>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 46dcb6 <hypre_BoomerAMGBuildMultipass.extracted.28+0x356>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV -0x78(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
CALL 5a8930 <hypre_Free>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0x70(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
CALL 5a8930 <hypre_Free>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0x48(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
CALL 5a8930 <hypre_Free>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %R12,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
ADD $0x178,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 5a8930 <hypre_Free>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼hypre_BoomerAMGBuildMultipass.extracted.28–	1.51	0.79
▼Loop 1127 - par_multi_interp.c:1747-1876 - exec–	0.13	0.06
○Loop 1138 - par_multi_interp.c:1799-1803 - exec	0.48	0.23
▼Loop 1132 - par_multi_interp.c:1747-1837 - exec–	0.47	0.23
○Loop 1136 - par_multi_interp.c:1816-1822 - exec	0.41	0.20
○Loop 1135 - par_multi_interp.c:1816-1820 - exec	0.00	0.01
○Loop 1134 - par_multi_interp.c:1824-1830 - exec	0.00	0.01
○Loop 1133 - par_multi_interp.c:1824-1828 - exec	0.00	0.00
○Loop 1142 - par_multi_interp.c:1782-1787 - exec	0.01	0.01
▼Loop 1130 - par_multi_interp.c:1836-1874 - exec–	0.00	0.01
○Loop 1131 - par_multi_interp.c:1851-1860 - exec	0.00	0.01
○Loop 1137 - par_multi_interp.c:1805-1809 - exec	0.00	0.01
○Loop 1139 - par_multi_interp.c:1792-1797 - exec	0.00	0.00
○Loop 1129 - par_multi_interp.c:1747-1874 - exec	0.00	0.00
○Loop 1143 - par_multi_interp.c:1782-1787 - exec	0.00	0.00
○Loop 1140 - par_multi_interp.c:1792-1797 - exec	0.00	0.00
○Loop 1128 - par_multi_interp.c:1747-1876 - exec	0.00	0.00
○Loop 1144 - par_multi_interp.c:1782-1787 - exec	0.00	0.00
○Loop 1141 - par_multi_interp.c:1792-1797 - exec	0.00	0.00

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