OV - exec - Function hypre_BoomerAMGCoarsenPMIS.extracted.35

	Function: hypre_BoomerAMGCoarsenPMIS.extracted.35	Module: exec	Source: par_coarsen.c:2132-2136	Coverage (incl. loops): 0.59% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_coarsen.c: 2132 - 2136

--------------------------------------------------------------------------------

2132: #pragma omp parallel for private(i) HYPRE_SMP_SCHEDULE

2133:    for (i=0; i < S_diag_i[num_variables]; i++)

2134:    {

2135: #pragma omp atomic

2136:       measure_array_temp[S_diag_j[i]]++;

0x43dee0 PUSH	%RBP

0x43dee1 MOV	%RSP,%RBP

0x43dee4 PUSH	%R15

0x43dee6 PUSH	%R14

0x43dee8 PUSH	%RBX

0x43dee9 SUB	$0x28,%RSP

0x43deed MOV	%RCX,%RBX

0x43def0 MOV	%RDX,%R15

0x43def3 MOVL	$0,-0x1c(%RBP)

0x43defa MOV	(%RDI),%R14D

0x43defd MOVQ	$0,-0x30(%RBP)

0x43df05 MOV	%R9,-0x28(%RBP)

0x43df09 MOVQ	$0x1,-0x38(%RBP)

0x43df11 SUB	$0x8,%RSP

0x43df15 LEA	-0x38(%RBP),%RAX

0x43df19 LEA	-0x1c(%RBP),%RCX

0x43df1d LEA	-0x30(%RBP),%R8

0x43df21 LEA	-0x28(%RBP),%R9

0x43df25 MOV	$0x605c90,%EDI

0x43df2a MOV	%R14D,%ESI

0x43df2d MOV	$0x22,%EDX

0x43df32 PUSH	$0x1

0x43df34 PUSH	$0x1

0x43df36 PUSH	%RAX

0x43df37 CALL	41dc20 <__kmpc_for_static_init_8@plt>

0x43df3c ADD	$0x20,%RSP

0x43df40 MOV	-0x30(%RBP),%RCX

0x43df44 MOV	-0x28(%RBP),%RAX

0x43df48 MOV	%RAX,%RDX

0x43df4b SUB	%RCX,%RDX

0x43df4e JB	43dff8

0x43df54 MOV	%EAX,%ESI

0x43df56 SUB	%ECX,%ESI

0x43df58 INC	%ESI

0x43df5a AND	$0x7,%ESI

0x43df5d JE	43df84

0x43df5f LEA	(%RCX,%RSI,1),%RDI

0x43df63 NOPW	%CS:(%RAX,%RAX,1)

(309) 0x43df70 MOV	(%R15,%RCX,8),%R8

(309) 0x43df74 LOCK INCQ	(%RBX,%R8,8)

(309) 0x43df79 INC	%RCX

(309) 0x43df7c DEC	%RSI

(309) 0x43df7f JNE	43df70

0x43df81 MOV	%RDI,%RCX

0x43df84 CMP	$0x7,%RDX

0x43df88 JB	43dff8

0x43df8a SUB	%RCX,%RAX

0x43df8d LEA	(%R15,%RCX,8),%RCX

0x43df91 ADD	$0x38,%RCX

0x43df95 MOV	$-0x1,%RDX

0x43df9c NOPL	(%RAX)

(308) 0x43dfa0 MOV	-0x30(%RCX,%RDX,8),%RSI

(308) 0x43dfa5 LOCK INCQ	(%RBX,%RSI,8)

(308) 0x43dfaa MOV	-0x28(%RCX,%RDX,8),%RSI

(308) 0x43dfaf LOCK INCQ	(%RBX,%RSI,8)

(308) 0x43dfb4 MOV	-0x20(%RCX,%RDX,8),%RSI

(308) 0x43dfb9 LOCK INCQ	(%RBX,%RSI,8)

(308) 0x43dfbe MOV	-0x18(%RCX,%RDX,8),%RSI

(308) 0x43dfc3 LOCK INCQ	(%RBX,%RSI,8)

(308) 0x43dfc8 MOV	-0x10(%RCX,%RDX,8),%RSI

(308) 0x43dfcd LOCK INCQ	(%RBX,%RSI,8)

(308) 0x43dfd2 MOV	-0x8(%RCX,%RDX,8),%RSI

(308) 0x43dfd7 LOCK INCQ	(%RBX,%RSI,8)

(308) 0x43dfdc MOV	(%RCX,%RDX,8),%RSI

(308) 0x43dfe0 LOCK INCQ	(%RBX,%RSI,8)

(308) 0x43dfe5 MOV	0x8(%RCX,%RDX,8),%RSI

(308) 0x43dfea LOCK INCQ	(%RBX,%RSI,8)

(308) 0x43dfef ADD	$0x8,%RDX

(308) 0x43dff3 CMP	%RDX,%RAX

(308) 0x43dff6 JNE	43dfa0

0x43dff8 MOV	$0x605cb0,%EDI

0x43dffd MOV	%R14D,%ESI

0x43e000 ADD	$0x28,%RSP

0x43e004 POP	%RBX

0x43e005 POP	%R14

0x43e007 POP	%R15

0x43e009 POP	%RBP

0x43e00a JMP	41d3d0

0x43e00f NOP

Coverage (%)	Name	Source Location	Module
►96.77+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
○	__kmp_launch_thread		libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]		libiomp5.so
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►3.05+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
○	__kmp_fork_call		libiomp5.so
○	__kmpc_fork_call		libiomp5.so
○	hypre_BoomerAMGCoarsenPMIS	par_coarsen.c:2132	exec
○	hypre_BoomerAMGSetup	par_amg_setup.c:612	exec
○	hypre_PCGSetup	pcg.c:234	exec
○	main	amg.c:398	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start		exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_5

Source file and lines	par_coarsen.c:2132-2136
Module	exec

The function is defined in /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_coarsen.c:2132-2136.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 9% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 6.63 to 0.44 cycles (15.17x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

__kmpc_for_static_init_8@plt: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_coarsen.c:2132

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 20 bytes. The binary function is storing 28 bytes.

General properties

nb instructions	55
nb uops	53
loop length	199
used x86 registers	12
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	4

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	6.63 cycles
front end	6.63 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	4.33	4.33	4.33	4.33	4.33	4.33	2.00	2.00	2.00	2.00	0.00	0.00	0.00	0.00	0.00	0.00
cycles	4.33	4.33	4.33	4.33	4.33	4.33	2.00	2.00	2.00	2.00	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	6.63
Dispatch	4.33
Overall L1	6.63

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	9%
load	6%
store	7%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	10%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 6.63 cycles. At this rate:

1% of peak load performance is reached (3.02 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
3% of peak store performance is reached (4.23 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 6.63 to 4.33 cycles (1.53x speedup).

ASM code

In the binary file, the address of the function is: 43dee0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x28,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RCX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %RDX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOVL $0,-0x1c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV (%RDI),%R14D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
MOVQ $0,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV %R9,-0x28(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOVQ $0x1,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA -0x38(%RBP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x1c(%RBP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x30(%RBP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x28(%RBP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV $0x605c90,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %R14D,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 41dc20 <__kmpc_for_static_init_8@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV -0x30(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV -0x28(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
SUB %RCX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JB 43dff8 <hypre_BoomerAMGCoarsenPMIS.extracted.35+0x118>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %EAX,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %ECX,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
INC %ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
AND $0x7,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
JE 43df84 <hypre_BoomerAMGCoarsenPMIS.extracted.35+0xa4>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
LEA (%RCX,%RSI,1),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP $0x7,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JB 43dff8 <hypre_BoomerAMGCoarsenPMIS.extracted.35+0x118>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
SUB %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA (%R15,%RCX,8),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
ADD $0x38,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV $-0x1,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV $0x605cb0,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %R14D,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD $0x28,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 41d3d0 <__kmpc_for_static_fini@plt>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_5

Source file and lines	par_coarsen.c:2132-2136
Module	exec

The function is defined in /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_coarsen.c:2132-2136.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

__kmpc_for_static_init_8@plt: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_coarsen.c:2132

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 20 bytes. The binary function is storing 28 bytes.

General properties

nb instructions	55
nb uops	53
loop length	199
used x86 registers	12
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	4

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	6.63 cycles
front end	6.63 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	4.33	4.33	4.33	4.33	4.33	4.33	2.00	2.00	2.00	2.00	0.00	0.00	0.00	0.00	0.00	0.00
cycles	4.33	4.33	4.33	4.33	4.33	4.33	2.00	2.00	2.00	2.00	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	6.63
Dispatch	4.33
Overall L1	6.63

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	9%
load	6%
store	7%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	10%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 6.63 cycles. At this rate:

1% of peak load performance is reached (3.02 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
3% of peak store performance is reached (4.23 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 43dee0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x28,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RCX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %RDX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOVL $0,-0x1c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV (%RDI),%R14D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
MOVQ $0,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV %R9,-0x28(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOVQ $0x1,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA -0x38(%RBP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x1c(%RBP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x30(%RBP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x28(%RBP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV $0x605c90,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %R14D,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 41dc20 <__kmpc_for_static_init_8@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV -0x30(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV -0x28(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
SUB %RCX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JB 43dff8 <hypre_BoomerAMGCoarsenPMIS.extracted.35+0x118>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %EAX,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %ECX,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
INC %ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
AND $0x7,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
JE 43df84 <hypre_BoomerAMGCoarsenPMIS.extracted.35+0xa4>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
LEA (%RCX,%RSI,1),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP $0x7,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JB 43dff8 <hypre_BoomerAMGCoarsenPMIS.extracted.35+0x118>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
SUB %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA (%R15,%RCX,8),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
ADD $0x38,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV $-0x1,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV $0x605cb0,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %R14D,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD $0x28,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 41d3d0 <__kmpc_for_static_fini@plt>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼hypre_BoomerAMGCoarsenPMIS.extracted.35–	0.59	0.31
○Loop 308 - par_coarsen.c:2132-2136 - exec	0.59	0.29
○Loop 309 - par_coarsen.c:2132-2136 - exec	0.00	0.00

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Matching between your function (in the source code) and the binary function

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