OV - exec - Function hypre_SeqVectorAxpy.omp

	Function: hypre_SeqVectorAxpy.omp_outlined	Module: exec	Source: vector.c:449-452	Coverage (incl. loops): 1.67% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/seq_mv/vector.c: 449 - 452

--------------------------------------------------------------------------------

449: #pragma omp parallel for private(i) HYPRE_SMP_SCHEDULE

450: #endif

451:    for (i = 0; i < size; i++)

452:       y_data[i] += alpha * x_data[i];

0x2fc400 PUSH	%RBP

0x2fc401 MOV	%RSP,%RBP

0x2fc404 PUSH	%R15

0x2fc406 PUSH	%R14

0x2fc408 PUSH	%R13

0x2fc40a PUSH	%R12

0x2fc40c PUSH	%RBX

0x2fc40d SUB	$0x28,%RSP

0x2fc411 MOV	(%RDX),%R13

0x2fc414 TEST	%R13,%R13

0x2fc417 JLE	2fc4e1

0x2fc41d MOV	(%RDI),%R14D

0x2fc420 DEC	%R13

0x2fc423 MOV	%R9,%R15

0x2fc426 MOV	%R8,%RBX

0x2fc429 MOV	%RCX,%R12

0x2fc42c MOVQ	$0,-0x40(%RBP)

0x2fc434 MOVQ	$0x1,-0x48(%RBP)

0x2fc43c MOVL	$0,-0x34(%RBP)

0x2fc443 MOV	%R13,-0x30(%RBP)

0x2fc447 SUB	$0x8,%RSP

0x2fc44b LEA	-0x48(%RBP),%RAX

0x2fc44f LEA	0xf74a(%RIP),%RDI

0x2fc456 LEA	-0x34(%RBP),%RCX

0x2fc45a LEA	-0x40(%RBP),%R8

0x2fc45e LEA	-0x30(%RBP),%R9

0x2fc462 MOV	%R14D,%ESI

0x2fc465 MOV	$0x22,%EDX

0x2fc46a PUSH	$0x1

0x2fc46c PUSH	$0x1

0x2fc46e PUSH	%RAX

0x2fc46f CALL	305fa0 <@plt_start@+0x90>

0x2fc474 ADD	$0x20,%RSP

0x2fc478 MOV	-0x30(%RBP),%RAX

0x2fc47c CMP	%R13,%RAX

0x2fc47f CMOVL	%RAX,%R13

0x2fc483 MOV	-0x40(%RBP),%RAX

0x2fc487 MOV	%R13,-0x30(%RBP)

0x2fc48b CMP	%R13,%RAX

0x2fc48e JG	2fc4cf

0x2fc490 MOV	(%R15),%RCX

0x2fc493 MOV	(%R12),%RDX

0x2fc497 MOV	%R13,%RSI

0x2fc49a SUB	%RAX,%RSI

0x2fc49d INC	%RSI

0x2fc4a0 CMP	$0x4,%RSI

0x2fc4a4 JAE	2fc4f0

0x2fc4a6 DEC	%RAX

0x2fc4a9 NOPL	(%RAX)

(3689) 0x2fc4b0 VMOVSD	(%RBX),%XMM0

(3689) 0x2fc4b4 VMOVSD	0x8(%RCX,%RAX,8),%XMM1

(3689) 0x2fc4ba VFMADD213SD	0x8(%RDX,%RAX,8),%XMM0,%XMM1

(3689) 0x2fc4c1 VMOVSD	%XMM1,0x8(%RDX,%RAX,8)

(3689) 0x2fc4c7 INC	%RAX

(3689) 0x2fc4ca CMP	%R13,%RAX

(3689) 0x2fc4cd JL	2fc4b0

0x2fc4cf LEA	0xf6e2(%RIP),%RDI

0x2fc4d6 MOV	%R14D,%ESI

0x2fc4d9 VZEROUPPER

0x2fc4dc CALL	305fb0 <@plt_start@+0xa0>

0x2fc4e1 ADD	$0x28,%RSP

0x2fc4e5 POP	%RBX

0x2fc4e6 POP	%R12

0x2fc4e8 POP	%R13

0x2fc4ea POP	%R14

0x2fc4ec POP	%R15

0x2fc4ee POP	%RBP

0x2fc4ef RET

0x2fc4f0 LEA	(%RDX,%RAX,8),%RDI

0x2fc4f4 LEA	0x8(%RBX),%R9

0x2fc4f8 LEA	0x8(%RDX,%R13,8),%R10

0x2fc4fd LEA	0x8(%RCX,%R13,8),%R11

0x2fc502 LEA	(%RCX,%RAX,8),%R8

0x2fc506 CMP	%R9,%RDI

0x2fc509 SETB	%R15B

0x2fc50d CMP	%RBX,%R10

0x2fc510 SETA	%R12B

0x2fc514 CMP	%R11,%RDI

0x2fc517 SETB	%R9B

0x2fc51b CMP	%R10,%R8

0x2fc51e SETB	%R10B

0x2fc522 TEST	%R12B,%R15B

0x2fc525 JNE	2fc4a6

0x2fc52b AND	%R10B,%R9B

0x2fc52e JNE	2fc4a6

0x2fc534 CMP	$0x20,%RSI

0x2fc538 JAE	2fc542

0x2fc53a XOR	%R9D,%R9D

0x2fc53d JMP	2fc5e5

0x2fc542 VBROADCASTSD	(%RBX),%ZMM0

0x2fc548 LEA	0xc0(%RCX,%RAX,8),%R10

0x2fc550 LEA	0xc0(%RDX,%RAX,8),%R11

0x2fc558 MOV	%RSI,%R9

0x2fc55b AND	$-0x20,%R9

0x2fc55f XOR	%R15D,%R15D

0x2fc562 NOPW	%CS:(%RAX,%RAX,1)

(3690) 0x2fc570 VMOVUPD	-0xc0(%R10,%R15,8),%ZMM1

(3690) 0x2fc578 VMOVUPD	-0x80(%R10,%R15,8),%ZMM2

(3690) 0x2fc580 VMOVUPD	-0x40(%R10,%R15,8),%ZMM3

(3690) 0x2fc588 VMOVUPD	(%R10,%R15,8),%ZMM4

(3690) 0x2fc58f VFMADD213PD	-0xc0(%R11,%R15,8),%ZMM0,%ZMM1

(3690) 0x2fc597 VFMADD213PD	-0x80(%R11,%R15,8),%ZMM0,%ZMM2

(3690) 0x2fc59f VFMADD213PD	-0x40(%R11,%R15,8),%ZMM0,%ZMM3

(3690) 0x2fc5a7 VFMADD213PD	(%R11,%R15,8),%ZMM0,%ZMM4

(3690) 0x2fc5ae VMOVUPD	%ZMM1,-0xc0(%R11,%R15,8)

(3690) 0x2fc5b6 VMOVUPD	%ZMM2,-0x80(%R11,%R15,8)

(3690) 0x2fc5be VMOVUPD	%ZMM3,-0x40(%R11,%R15,8)

(3690) 0x2fc5c6 VMOVUPD	%ZMM4,(%R11,%R15,8)

(3690) 0x2fc5cd ADD	$0x20,%R15

(3690) 0x2fc5d1 CMP	%R15,%R9

(3690) 0x2fc5d4 JNE	2fc570

0x2fc5d6 CMP	%R9,%RSI

0x2fc5d9 JE	2fc4cf

0x2fc5df TEST	$0x1c,%SIL

0x2fc5e3 JE	2fc629

0x2fc5e5 VBROADCASTSD	(%RBX),%YMM0

0x2fc5ea MOV	%RSI,%R10

0x2fc5ed AND	$-0x4,%R10

0x2fc5f1 ADD	%R10,%RAX

0x2fc5f4 NOPW	%CS:(%RAX,%RAX,1)

(3691) 0x2fc600 VMOVUPD	(%R8,%R9,8),%YMM1

(3691) 0x2fc606 VFMADD213PD	(%RDI,%R9,8),%YMM0,%YMM1

(3691) 0x2fc60c VMOVUPD	%YMM1,(%RDI,%R9,8)

(3691) 0x2fc612 ADD	$0x4,%R9

(3691) 0x2fc616 CMP	%R9,%R10

(3691) 0x2fc619 JNE	2fc600

0x2fc61b CMP	%R10,%RSI

0x2fc61e JNE	2fc4a6

0x2fc624 JMP	2fc4cf

0x2fc629 ADD	%R9,%RAX

0x2fc62c JMP	2fc4a6

0x2fc631 NOPW	%CS:(%RAX,%RAX,1)

Coverage (%)	Name	Source Location	Module

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run aocc_2

Source file and lines	vector.c:449-452
Module	exec

The function is defined in /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/seq_mv/vector.c:449-452.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 13.38 to 3.00 cycles (4.46x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is probably not vectorized. Only 11% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 13.38 to 1.04 cycles (12.90x speedup).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

unknown: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/seq_mv/vector.c:449
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/seq_mv/vector.c:449

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVL: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/seq_mv/vector.c:451
LEA: 4 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/seq_mv/vector.c:451
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/seq_mv/vector.c:451
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/seq_mv/vector.c:451
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/seq_mv/vector.c:451

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 60 bytes. The binary function is storing 36 bytes.

General properties

nb instructions	104
nb uops	107
loop length	416
used x86 registers	16
used mmx registers	0
used xmm registers	0
used ymm registers	1
used zmm registers	1
nb stack references	4

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	13.38 cycles
front end	13.38 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	10.17	10.17	10.17	10.17	10.17	10.17	4.75	4.75	4.75	4.75	0.00	0.00	0.00	0.00	0.00	0.00
cycles	10.17	10.17	10.17	10.17	10.17	10.17	4.75	4.75	4.75	4.75	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	13.38
Dispatch	10.17
Overall L1	13.38

Vectorization ratios

INT

all	3%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	5%

all	0%
load	0%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	3%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	5%

Vector efficiency ratios

INT

all	11%
load	6%
store	8%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
other	12%

all	12%
load	12%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

INT+FP

all	11%
load	10%
store	8%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 13.38 cycles. At this rate:

1% of peak load performance is reached (4.49 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (2.69 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 13.38 to 10.17 cycles (1.32x speedup).

ASM code

In the binary file, the address of the function is: 2fc400

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x28,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV (%RDX),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
TEST %R13,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JLE 2fc4e1 <hypre_SeqVectorAxpy.omp_outlined+0xe1>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%RDI),%R14D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
DEC %R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %R9,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R8,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RCX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOVQ $0,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOVQ $0x1,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOVL $0,-0x34(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV %R13,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
LEA -0x48(%RBP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0xf74a(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x34(%RBP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x40(%RBP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x30(%RBP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %R14D,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 305fa0 <@plt_start@+0x90>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x30(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %R13,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMOVL %RAX,%R13	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
MOV -0x40(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R13,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
CMP %R13,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JG 2fc4cf <hypre_SeqVectorAxpy.omp_outlined+0xcf>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R15),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%R12),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R13,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
SUB %RAX,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
INC %RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMP $0x4,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JAE 2fc4f0 <hypre_SeqVectorAxpy.omp_outlined+0xf0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
DEC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
LEA 0xf6e2(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %R14D,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 305fb0 <@plt_start@+0xa0>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
ADD $0x28,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50	N/A
LEA (%RDX,%RAX,8),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0x8(%RBX),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0x8(%RDX,%R13,8),%R10	2	0	0	0.50	0.50	0	0	0.25	0.25	0.25	0.25	2	0.50	N/A
LEA 0x8(%RCX,%R13,8),%R11	2	0	0	0.50	0.50	0	0	0.25	0.25	0.25	0.25	2	0.50	N/A
LEA (%RCX,%RAX,8),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
CMP %R9,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
SETB %R15B	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %RBX,%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
SETA %R12B	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R11,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
SETB %R9B	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R10,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
SETB %R10B	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
TEST %R12B,%R15B	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
JNE 2fc4a6 <hypre_SeqVectorAxpy.omp_outlined+0xa6>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
AND %R10B,%R9B	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
JNE 2fc4a6 <hypre_SeqVectorAxpy.omp_outlined+0xa6>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
CMP $0x20,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JAE 2fc542 <hypre_SeqVectorAxpy.omp_outlined+0x142>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 2fc5e5 <hypre_SeqVectorAxpy.omp_outlined+0x1e5>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
VBROADCASTSD (%RBX),%ZMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
LEA 0xc0(%RCX,%RAX,8),%R10	2	0	0	0.50	0.50	0	0	0.25	0.25	0.25	0.25	2	0.50	N/A
LEA 0xc0(%RDX,%RAX,8),%R11	2	0	0	0.50	0.50	0	0	0.25	0.25	0.25	0.25	2	0.50	N/A
MOV %RSI,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x20,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
XOR %R15D,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMP %R9,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 2fc4cf <hypre_SeqVectorAxpy.omp_outlined+0xcf>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
TEST $0x1c,%SIL	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
JE 2fc629 <hypre_SeqVectorAxpy.omp_outlined+0x229>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
VBROADCASTSD (%RBX),%YMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RSI,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
AND $-0x4,%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
ADD %R10,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMP %R10,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JNE 2fc4a6 <hypre_SeqVectorAxpy.omp_outlined+0xa6>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
JMP 2fc4cf <hypre_SeqVectorAxpy.omp_outlined+0xcf>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
ADD %R9,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
JMP 2fc4a6 <hypre_SeqVectorAxpy.omp_outlined+0xa6>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run aocc_2

Source file and lines	vector.c:449-452
Module	exec

The function is defined in /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/seq_mv/vector.c:449-452.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 13.38 to 3.00 cycles (4.46x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

unknown: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/seq_mv/vector.c:449
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/seq_mv/vector.c:449

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVL: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/seq_mv/vector.c:451
LEA: 4 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/seq_mv/vector.c:451
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/seq_mv/vector.c:451
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/seq_mv/vector.c:451
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/seq_mv/vector.c:451

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 60 bytes. The binary function is storing 36 bytes.

General properties

nb instructions	104
nb uops	107
loop length	416
used x86 registers	16
used mmx registers	0
used xmm registers	0
used ymm registers	1
used zmm registers	1
nb stack references	4

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	13.38 cycles
front end	13.38 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	10.17	10.17	10.17	10.17	10.17	10.17	4.75	4.75	4.75	4.75	0.00	0.00	0.00	0.00	0.00	0.00
cycles	10.17	10.17	10.17	10.17	10.17	10.17	4.75	4.75	4.75	4.75	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	13.38
Dispatch	10.17
Overall L1	13.38

Vectorization ratios

INT

all	3%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	5%

all	0%
load	0%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	3%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	5%

Vector efficiency ratios

INT

all	11%
load	6%
store	8%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
other	12%

all	12%
load	12%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

INT+FP

all	11%
load	10%
store	8%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 13.38 cycles. At this rate:

1% of peak load performance is reached (4.49 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (2.69 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 2fc400

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x28,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV (%RDX),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
TEST %R13,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JLE 2fc4e1 <hypre_SeqVectorAxpy.omp_outlined+0xe1>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%RDI),%R14D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
DEC %R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %R9,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R8,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RCX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOVQ $0,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOVQ $0x1,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOVL $0,-0x34(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV %R13,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
LEA -0x48(%RBP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0xf74a(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x34(%RBP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x40(%RBP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x30(%RBP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %R14D,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 305fa0 <@plt_start@+0x90>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x30(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %R13,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMOVL %RAX,%R13	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
MOV -0x40(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R13,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
CMP %R13,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JG 2fc4cf <hypre_SeqVectorAxpy.omp_outlined+0xcf>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R15),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%R12),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R13,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
SUB %RAX,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
INC %RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMP $0x4,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JAE 2fc4f0 <hypre_SeqVectorAxpy.omp_outlined+0xf0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
DEC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
LEA 0xf6e2(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %R14D,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 305fb0 <@plt_start@+0xa0>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
ADD $0x28,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50	N/A
LEA (%RDX,%RAX,8),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0x8(%RBX),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0x8(%RDX,%R13,8),%R10	2	0	0	0.50	0.50	0	0	0.25	0.25	0.25	0.25	2	0.50	N/A
LEA 0x8(%RCX,%R13,8),%R11	2	0	0	0.50	0.50	0	0	0.25	0.25	0.25	0.25	2	0.50	N/A
LEA (%RCX,%RAX,8),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
CMP %R9,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
SETB %R15B	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %RBX,%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
SETA %R12B	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R11,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
SETB %R9B	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R10,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
SETB %R10B	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
TEST %R12B,%R15B	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
JNE 2fc4a6 <hypre_SeqVectorAxpy.omp_outlined+0xa6>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
AND %R10B,%R9B	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
JNE 2fc4a6 <hypre_SeqVectorAxpy.omp_outlined+0xa6>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
CMP $0x20,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JAE 2fc542 <hypre_SeqVectorAxpy.omp_outlined+0x142>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 2fc5e5 <hypre_SeqVectorAxpy.omp_outlined+0x1e5>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
VBROADCASTSD (%RBX),%ZMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
LEA 0xc0(%RCX,%RAX,8),%R10	2	0	0	0.50	0.50	0	0	0.25	0.25	0.25	0.25	2	0.50	N/A
LEA 0xc0(%RDX,%RAX,8),%R11	2	0	0	0.50	0.50	0	0	0.25	0.25	0.25	0.25	2	0.50	N/A
MOV %RSI,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x20,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
XOR %R15D,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMP %R9,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 2fc4cf <hypre_SeqVectorAxpy.omp_outlined+0xcf>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
TEST $0x1c,%SIL	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
JE 2fc629 <hypre_SeqVectorAxpy.omp_outlined+0x229>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
VBROADCASTSD (%RBX),%YMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RSI,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
AND $-0x4,%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
ADD %R10,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMP %R10,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JNE 2fc4a6 <hypre_SeqVectorAxpy.omp_outlined+0xa6>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
JMP 2fc4cf <hypre_SeqVectorAxpy.omp_outlined+0xcf>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
ADD %R9,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
JMP 2fc4a6 <hypre_SeqVectorAxpy.omp_outlined+0xa6>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼hypre_SeqVectorAxpy.omp_outlined–	1.67	0.88
○Loop 3690 - vector.c:452-452 - exec	1.67	0.83
○Loop 3691 - vector.c:452-452 - exec	0.00	0.00
○Loop 3689 - vector.c:451-452 - exec	0.00	0.00

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