OV - exec - Function hypre_BoomerAMGBuildMultipass.omp

	Function: hypre_BoomerAMGBuildMultipass.omp_outlined.20	Module: exec	Source: par_multi_interp.c:1737-1881 [...]	Coverage (incl. loops): 1.80% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 1737 - 1881

--------------------------------------------------------------------------------

1737: #pragma omp parallel private(thread_start,thread_stop,my_thread_num,num_threads,k,k1,i,i1,j,j1,sum_C,sum_N,j_start,j_end,cnt,tmp_marker,tmp_marker_offd,cnt_offd,diagonal,alfa,tmp_array,tmp_array_offd)

[...]

1747:              if (n_fine)

1748:              {    tmp_marker = hypre_CTAlloc(HYPRE_Int,n_fine); }

1749:              tmp_marker_offd = NULL;

1750:              if (num_cols_offd)

1751:              {    tmp_marker_offd = hypre_CTAlloc(HYPRE_Int,num_cols_offd); }

1752:              tmp_array = NULL;

1753:              if (n_coarse)

1754:              {    tmp_array = hypre_CTAlloc(HYPRE_Int,n_coarse); }

1755:              tmp_array_offd = NULL;

1756:              if (new_num_cols_offd > n_coarse_offd)

1757:              {    tmp_array_offd = hypre_CTAlloc(HYPRE_Int,new_num_cols_offd); }

1758:              else

1759:              {    tmp_array_offd = hypre_CTAlloc(HYPRE_Int,n_coarse_offd);}

1760:              for (i=0; i < n_fine; i++)

1761:              {    tmp_marker[i] = -1; }

1762:              for (i=0; i < num_cols_offd; i++)

1763:              {    tmp_marker_offd[i] = -1; }

1764:

1765:              /* Compute this thread's range of pass_length */

1766:              my_thread_num = hypre_GetThreadNum();

1767:              num_threads = hypre_NumActiveThreads();

1768:              thread_start = pass_pointer[pass] + (pass_length/num_threads)*my_thread_num;

1769:              if (my_thread_num == num_threads-1)

1770:              {  thread_stop = pass_pointer[pass] + pass_length; }

1771:              else

1772:              {  thread_stop = pass_pointer[pass] + (pass_length/num_threads)*(my_thread_num+1); }

1773:

1774:              for (i=thread_start; i < thread_stop; i++)

1775:              {

1776:                 i1 = pass_array[i];

1777:                 sum_C = 0;

1778:                 sum_N = 0;

1779:                 j_start = P_diag_start[i1];

1780:                 j_end = j_start+P_diag_i[i1+1]-P_diag_i[i1];

1781:                 cnt = P_diag_i[i1];

1782:                 for (j=j_start; j < j_end; j++)

1783:                 {

1784:                    k1 = P_diag_pass[pass][j];

1785:                tmp_array[k1] = cnt;

1786:                P_diag_data[cnt] = 0;

1787:                P_diag_j[cnt++] = k1;

1788:                 }

1789:                 j_start = P_offd_start[i1];

1790:                 j_end = j_start+P_offd_i[i1+1]-P_offd_i[i1];

1791:                 cnt_offd = P_offd_i[i1];

1792:                 for (j=j_start; j < j_end; j++)

1793:                 {

1794:                    k1 = P_offd_pass[pass][j];

1795:                tmp_array_offd[k1] = cnt_offd;

1796:                P_offd_data[cnt_offd] = 0;

1797:                P_offd_j[cnt_offd++] = k1;

1798:                 }

1799:                 for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++)

1800:                 {

1801:                j1 = S_diag_j[j];

1802:                if (assigned[j1] == pass-1)

1803:                   tmp_marker[j1] = i1;

1804:                 }

1805:                 for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++)

1806:                 {

1807:                j1 = S_offd_j[j];

1808:                if (assigned_offd[j1] == pass-1)

1809:                   tmp_marker_offd[j1] = i1;

1810:                 }

1811:                 for (j=A_diag_i[i1]+1; j < A_diag_i[i1+1]; j++)

1812:                 {

1813:                j1 = A_diag_j[j];

1814:                if (tmp_marker[j1] == i1)

1815:                {

1816:                   for (k=P_diag_i[j1]; k < P_diag_i[j1+1]; k++)

1817:                   {

1818:                  k1 = P_diag_j[k];

1819:                      alfa = A_diag_data[j]*P_diag_data[k];

1820:                      P_diag_data[tmp_array[k1]] += alfa;

1821:                      sum_C += alfa;

1822:                      sum_N += alfa;

1823:                       }

1824:                   for (k=P_offd_i[j1]; k < P_offd_i[j1+1]; k++)

1825:                   {

1826:                  k1 = P_offd_j[k];

1827:                      alfa = A_diag_data[j]*P_offd_data[k];

1828:                      P_offd_data[tmp_array_offd[k1]] += alfa;

1829:                      sum_C += alfa;

1830:                      sum_N += alfa;

1831:                       }

1832:                    }

1833:                    else

1834:                    {

1835:                       if (CF_marker[j1] != -3 &&

1836:                 (num_functions == 1 || dof_func[i1] == dof_func[j1]))

1837:                  sum_N += A_diag_data[j];

1838:                    }

1839:                 }

1840:                 for (j=A_offd_i[i1]; j < A_offd_i[i1+1]; j++)

1841:                 {

1842:                if (col_offd_S_to_A)

1843:                   j1 = map_A_to_S[A_offd_j[j]];

1844:                else

1845:                   j1 = A_offd_j[j];

1846:

1847:                if (j1 > -1 && tmp_marker_offd[j1] == i1)

1848:                {

1849:                   j_start = Pext_start[j1];

1850:                   j_end = j_start+Pext_i[j1+1];

1851:                   for (k=j_start; k < j_end; k++)

1852:                   {

1853:                  k1 = Pext_pass[pass][k];

1854:                      alfa = A_offd_data[j]*Pext_data[k];

1855:                  if (k1 < 0)

1856:                         P_diag_data[tmp_array[-k1-1]] += alfa;

1857:                  else

1858:                         P_offd_data[tmp_array_offd[k1]] += alfa;

1859:                      sum_C += alfa;

1860:                      sum_N += alfa;

1861:                       }

1862:                    }

1863:                    else

1864:                    {

1865:                       if (CF_marker_offd[j1] != -3 &&

1866:                 (num_functions == 1 || dof_func_offd[j1] == dof_func[i1]))

1867:                  sum_N += A_offd_data[j];

1868:                    }

1869:                 }

1870:                 diagonal = A_diag_data[A_diag_i[i1]];

1871:                 if (sum_C*diagonal) alfa = -sum_N/(sum_C*diagonal);

1872:

1873:                 for (j=P_diag_i[i1]; j < P_diag_i[i1+1]; j++)

1874:                P_diag_data[j] *= alfa;

1875:                 for (j=P_offd_i[i1]; j < P_offd_i[i1+1]; j++)

1876:                P_offd_data[j] *= alfa;

1877:              }

1878:              hypre_TFree(tmp_marker);

1879:              hypre_TFree(tmp_marker_offd);

1880:              hypre_TFree(tmp_array);

1881:              hypre_TFree(tmp_array_offd);

0x275bb0 PUSH	%RBP

0x275bb1 MOV	%RSP,%RBP

0x275bb4 PUSH	%R15

0x275bb6 PUSH	%R14

0x275bb8 PUSH	%R13

0x275bba PUSH	%R12

0x275bbc PUSH	%RBX

0x275bbd SUB	$0x1c8,%RSP

0x275bc4 MOV	0x138(%RBP),%RAX

0x275bcb MOV	(%RDX),%RDI

0x275bce MOV	%R9,%R12

0x275bd1 MOV	%R8,%R15

0x275bd4 MOV	%RAX,-0x180(%RBP)

0x275bdb MOV	0x130(%RBP),%RAX

0x275be2 MOV	%RAX,-0x178(%RBP)

0x275be9 MOV	0x128(%RBP),%RAX

0x275bf0 MOV	%RAX,-0x170(%RBP)

0x275bf7 MOV	0x120(%RBP),%RAX

0x275bfe MOV	%RAX,-0x168(%RBP)

0x275c05 MOV	0x118(%RBP),%RAX

0x275c0c MOV	%RAX,-0x160(%RBP)

0x275c13 MOV	0x110(%RBP),%RAX

0x275c1a MOV	%RAX,-0x158(%RBP)

0x275c21 MOV	0x108(%RBP),%RAX

0x275c28 MOV	%RAX,-0x150(%RBP)

0x275c2f MOV	0x100(%RBP),%RAX

0x275c36 MOV	%RAX,-0x148(%RBP)

0x275c3d MOV	0xf8(%RBP),%RAX

0x275c44 MOV	%RAX,-0x130(%RBP)

0x275c4b MOV	0xf0(%RBP),%RAX

0x275c52 MOV	%RAX,-0x58(%RBP)

0x275c56 MOV	0xe8(%RBP),%RAX

0x275c5d MOV	%RAX,-0x30(%RBP)

0x275c61 MOV	0xe0(%RBP),%RAX

0x275c68 MOV	%RAX,-0x108(%RBP)

0x275c6f MOV	0xd8(%RBP),%RAX

0x275c76 MOV	%RAX,-0x110(%RBP)

0x275c7d MOV	0xd0(%RBP),%RAX

0x275c84 MOV	%RAX,-0x140(%RBP)

0x275c8b MOV	0xc8(%RBP),%RAX

0x275c92 MOV	%RAX,-0x100(%RBP)

0x275c99 MOV	0xc0(%RBP),%RAX

0x275ca0 MOV	%RAX,-0x38(%RBP)

0x275ca4 MOV	0xb8(%RBP),%RAX

0x275cab MOV	%RAX,-0xd0(%RBP)

0x275cb2 MOV	0xb0(%RBP),%RAX

0x275cb9 MOV	%RAX,-0x48(%RBP)

0x275cbd MOV	0xa8(%RBP),%RAX

0x275cc4 MOV	%RAX,-0xc8(%RBP)

0x275ccb MOV	0xa0(%RBP),%RAX

0x275cd2 MOV	%RAX,-0x98(%RBP)

0x275cd9 MOV	0x98(%RBP),%RAX

0x275ce0 MOV	%RAX,-0x80(%RBP)

0x275ce4 MOV	0x90(%RBP),%RAX

0x275ceb MOV	%RAX,-0x78(%RBP)

0x275cef MOV	0x88(%RBP),%RAX

0x275cf6 MOV	%RAX,-0x70(%RBP)

0x275cfa MOV	0x80(%RBP),%RAX

0x275d01 MOV	%RAX,-0xf8(%RBP)

0x275d08 MOV	0x78(%RBP),%RAX

0x275d0c MOV	%RAX,-0x90(%RBP)

0x275d13 MOV	0x70(%RBP),%RAX

0x275d17 MOV	%RAX,-0xc0(%RBP)

0x275d1e MOV	0x68(%RBP),%RAX

0x275d22 MOV	%RAX,-0xa0(%RBP)

0x275d29 MOV	0x60(%RBP),%RAX

0x275d2d MOV	%RAX,-0xb8(%RBP)

0x275d34 MOV	0x58(%RBP),%RAX

0x275d38 MOV	%RAX,-0xf0(%RBP)

0x275d3f MOV	0x50(%RBP),%RAX

0x275d43 MOV	%RAX,-0x88(%RBP)

0x275d4a MOV	0x48(%RBP),%RAX

0x275d4e MOV	%RAX,-0xe8(%RBP)

0x275d55 MOV	0x40(%RBP),%RAX

0x275d59 MOV	%RAX,-0xa8(%RBP)

0x275d60 MOV	0x38(%RBP),%RAX

0x275d64 MOV	%RAX,-0xe0(%RBP)

0x275d6b MOV	0x30(%RBP),%RAX

0x275d6f MOV	%RAX,-0x50(%RBP)

0x275d73 MOV	0x28(%RBP),%RAX

0x275d77 MOV	%RAX,-0x60(%RBP)

0x275d7b MOV	0x18(%RBP),%RAX

0x275d7f MOV	0x20(%RBP),%R13

0x275d83 MOV	%RAX,-0xd8(%RBP)

0x275d8a MOV	0x10(%RBP),%R14

0x275d8e MOV	%RDX,-0x68(%RBP)

0x275d92 TEST	%RDI,%RDI

0x275d95 JE	275da9

0x275d97 MOV	$0x8,%ESI

0x275d9c MOV	%RCX,%RBX

0x275d9f CALL	301880 <hypre_CAlloc>

0x275da4 MOV	%RBX,%RCX

0x275da7 JMP	275dab

0x275da9 XOR	%EAX,%EAX

0x275dab MOV	(%RCX),%RDI

0x275dae MOV	%RAX,-0xb0(%RBP)

0x275db5 MOV	%RCX,%RBX

0x275db8 TEST	%RDI,%RDI

0x275dbb JE	275de2

0x275dbd MOV	$0x8,%ESI

0x275dc2 CALL	301880 <hypre_CAlloc>

0x275dc7 MOV	(%R15),%RDI

0x275dca MOV	%RAX,-0x40(%RBP)

0x275dce TEST	%RDI,%RDI

0x275dd1 JE	275df0

0x275dd3 MOV	$0x8,%ESI

0x275dd8 CALL	301880 <hypre_CAlloc>

0x275ddd MOV	%RAX,%R15

0x275de0 JMP	275df3

0x275de2 XOR	%EAX,%EAX

0x275de4 MOV	(%R15),%RDI

0x275de7 MOV	%RAX,-0x40(%RBP)

0x275deb TEST	%RDI,%RDI

0x275dee JNE	275dd3

0x275df0 XOR	%R15D,%R15D

0x275df3 MOV	(%R12),%RAX

0x275df7 MOV	(%R14),%RDI

0x275dfa MOV	$0x8,%ESI

0x275dff CMP	%RDI,%RAX

0x275e02 CMOVG	%RAX,%RDI

0x275e06 CALL	301880 <hypre_CAlloc>

0x275e0b MOV	-0x68(%RBP),%RCX

0x275e0f MOV	-0xb0(%RBP),%R14

0x275e16 MOV	%RAX,%R12

0x275e19 CMPQ	$0,(%RCX)

0x275e1d JLE	275e40

0x275e1f XOR	%EAX,%EAX

0x275e21 NOPW	%CS:(%RAX,%RAX,1)

(1157) 0x275e30 MOVQ	$-0x1,(%R14,%RAX,8)

(1157) 0x275e38 INC	%RAX

(1157) 0x275e3b CMP	%RAX,(%RCX)

(1157) 0x275e3e JG	275e30

0x275e40 CMPQ	$0,(%RBX)

0x275e44 MOV	-0x40(%RBP),%RCX

0x275e48 JLE	275e60

0x275e4a XOR	%EAX,%EAX

0x275e4c NOPL	(%RAX)

(1156) 0x275e50 MOVQ	$-0x1,(%RCX,%RAX,8)

(1156) 0x275e58 INC	%RAX

(1156) 0x275e5b CMP	%RAX,(%RBX)

(1156) 0x275e5e JG	275e50

0x275e60 CALL	303460 <hypre_GetThreadNum>

0x275e65 MOV	%RAX,%RBX

0x275e68 CALL	303450 <hypre_NumActiveThreads>

0x275e6d MOV	%RAX,%RCX

0x275e70 MOV	-0x60(%RBP),%RAX

0x275e74 MOV	(%RAX),%RSI

0x275e77 MOV	%RSI,%RAX

0x275e7a CQTO

0x275e7c IDIV	%RCX

0x275e7f LEA	0x1(%RBX),%RDX

0x275e83 DEC	%RCX

0x275e86 IMUL	%RAX,%RDX

0x275e8a IMUL	%RBX,%RAX

0x275e8e CMP	%RCX,%RBX

0x275e91 CMOVE	%RSI,%RDX

0x275e95 MOV	%RDX,-0x118(%RBP)

0x275e9c CMP	%RDX,%RAX

0x275e9f JGE	276b9f

0x275ea5 MOV	-0xd8(%RBP),%RSI

0x275eac MOV	%RAX,%RDX

0x275eaf MOV	(%R13),%RCX

0x275eb3 VMOVDDUP	-0x66b33(%RIP),%XMM0

0x275ebb VXORPD	%XMM1,%XMM1,%XMM1

0x275ebf MOV	(%RSI),%RAX

0x275ec2 MOV	(%RAX,%RCX,8),%RAX

0x275ec6 ADD	%RAX,-0x118(%RBP)

0x275ecd ADD	%RAX,%RDX

0x275ed0 MOV	-0x50(%RBP),%RAX

0x275ed4 MOV	(%RAX),%RAX

0x275ed7 MOV	%RAX,-0xd8(%RBP)

0x275ede MOV	-0xe0(%RBP),%RAX

0x275ee5 MOV	(%RAX),%RAX

0x275ee8 MOV	%RAX,-0x1e8(%RBP)

0x275eef MOV	-0xa8(%RBP),%RAX

0x275ef6 MOV	(%RAX),%RAX

0x275ef9 MOV	%RAX,-0xa8(%RBP)

0x275f00 MOV	-0xe8(%RBP),%RAX

0x275f07 MOV	-0xb8(%RBP),%RCX

0x275f0e MOV	(%RAX),%R10

0x275f11 MOV	(%RCX),%RAX

0x275f14 MOV	%RAX,-0x1e0(%RBP)

0x275f1b MOV	-0xa0(%RBP),%RAX

0x275f22 MOV	(%RAX),%RAX

0x275f25 MOV	%RAX,-0xa0(%RBP)

0x275f2c MOV	-0xc0(%RBP),%RAX

0x275f33 MOV	(%RAX),%RAX

0x275f36 MOV	%RAX,-0x1d8(%RBP)

0x275f3d MOV	-0x70(%RBP),%RAX

0x275f41 MOV	(%RAX),%RAX

0x275f44 MOV	%RAX,-0x1d0(%RBP)

0x275f4b MOV	-0x78(%RBP),%RAX

0x275f4f MOV	(%RAX),%RAX

0x275f52 MOV	%RAX,-0x1c8(%RBP)

0x275f59 MOV	-0x80(%RBP),%RAX

0x275f5d MOV	(%RAX),%RAX

0x275f60 MOV	%RAX,-0x1c0(%RBP)

0x275f67 MOV	-0x98(%RBP),%RAX

0x275f6e MOV	(%RAX),%RAX

0x275f71 MOV	%RAX,-0x1b8(%RBP)

0x275f78 MOV	-0xc8(%RBP),%RAX

0x275f7f MOV	(%RAX),%RAX

0x275f82 MOV	%RAX,-0x1b0(%RBP)

0x275f89 MOV	-0x48(%RBP),%RAX

0x275f8d MOV	(%RAX),%RAX

0x275f90 MOV	%RAX,-0x1a8(%RBP)

0x275f97 MOV	-0xd0(%RBP),%RAX

0x275f9e MOV	(%RAX),%RAX

0x275fa1 MOV	%RAX,-0x1a0(%RBP)

0x275fa8 MOV	-0x38(%RBP),%RAX

0x275fac MOV	(%RAX),%RAX

0x275faf MOV	%RAX,-0xd0(%RBP)

0x275fb6 MOV	-0x30(%RBP),%RAX

0x275fba MOV	(%RAX),%RAX

0x275fbd MOV	%RAX,-0x198(%RBP)

0x275fc4 MOV	-0x58(%RBP),%RAX

0x275fc8 MOV	(%RAX),%RAX

0x275fcb MOV	%RAX,-0x138(%RBP)

0x275fd2 MOV	-0x88(%RBP),%RAX

0x275fd9 MOV	-0xf8(%RBP),%RDI

0x275fe0 MOV	-0x90(%RBP),%RCX

0x275fe7 MOV	-0xf0(%RBP),%RSI

0x275fee MOV	(%RAX),%R11

0x275ff1 MOV	(%RDI),%RAX

0x275ff4 MOV	(%RCX),%RCX

0x275ff7 MOV	(%RSI),%RBX

0x275ffa MOV	%RAX,-0x190(%RBP)

0x276001 LEA	0xc0(%R11),%RSI

0x276008 MOV	-0x100(%RBP),%RAX

0x27600f MOV	(%RAX),%RAX

0x276012 MOV	%RAX,-0x188(%RBP)

0x276019 MOV	%RSI,-0x128(%RBP)

0x276020 MOV	%RCX,-0x50(%RBP)

0x276024 ADD	$0xc0,%RCX

0x27602b MOV	%RCX,-0x120(%RBP)

0x276032 MOV	%R10,-0x68(%RBP)

0x276036 MOV	%R11,-0x60(%RBP)

0x27603a MOV	%RBX,-0x58(%RBP)

0x27603e JMP	276057

(1131) 0x276040 MOV	-0xe8(%RBP),%RDX

(1131) 0x276047 INC	%RDX

(1131) 0x27604a CMP	%RDX,-0x118(%RBP)

(1131) 0x276051 JLE	276b9f

(1131) 0x276057 MOV	%RDX,-0xe8(%RBP)

(1131) 0x27605e MOV	-0xd8(%RBP),%RAX

(1131) 0x276065 MOV	-0xa8(%RBP),%RSI

(1131) 0x27606c MOV	(%RAX,%RDX,8),%R8

(1131) 0x276070 MOV	-0x1e8(%RBP),%RAX

(1131) 0x276077 MOV	(%RAX,%R8,8),%RAX

(1131) 0x27607b MOV	0x8(%RSI,%R8,8),%RDX

(1131) 0x276080 MOV	(%RSI,%R8,8),%RCX

(1131) 0x276084 LEA	(%RDX,%RAX,1),%RSI

(1131) 0x276088 SUB	%RCX,%RSI

(1131) 0x27608b CMP	%RSI,%RAX

(1131) 0x27608e JGE	2760b7

  (1155) 0x276090 MOV	(%R13),%RSI

  (1155) 0x276094 MOV	(%R10,%RSI,8),%RSI

  (1155) 0x276098 MOV	(%RSI,%RAX,8),%RSI

  (1155) 0x27609c INC	%RAX

  (1155) 0x27609f MOV	%RCX,(%R15,%RSI,8)

  (1155) 0x2760a3 MOVQ	$0,(%R11,%RCX,8)

  (1155) 0x2760ab MOV	%RSI,(%RBX,%RCX,8)

  (1155) 0x2760af INC	%RCX

  (1155) 0x2760b2 CMP	%RCX,%RDX

  (1155) 0x2760b5 JNE	276090

(1131) 0x2760b7 MOV	-0x1e0(%RBP),%RAX

(1131) 0x2760be MOV	-0xa0(%RBP),%RDX

(1131) 0x2760c5 MOV	-0x1d8(%RBP),%RDI

(1131) 0x2760cc MOV	-0x50(%RBP),%R9

(1131) 0x2760d0 MOV	-0x190(%RBP),%R10

(1131) 0x2760d7 MOV	(%RDX,%R8,8),%RCX

(1131) 0x2760db MOV	(%RAX,%R8,8),%RAX

(1131) 0x2760df MOV	0x8(%RDX,%R8,8),%RDX

(1131) 0x2760e4 LEA	(%RDX,%RAX,1),%RSI

(1131) 0x2760e8 SUB	%RCX,%RSI

(1131) 0x2760eb CMP	%RSI,%RAX

(1131) 0x2760ee JGE	276117

  (1154) 0x2760f0 MOV	(%R13),%RSI

  (1154) 0x2760f4 MOV	(%RDI,%RSI,8),%RSI

  (1154) 0x2760f8 MOV	(%RSI,%RAX,8),%RSI

  (1154) 0x2760fc INC	%RAX

  (1154) 0x2760ff MOV	%RCX,(%R12,%RSI,8)

  (1154) 0x276103 MOVQ	$0,(%R9,%RCX,8)

  (1154) 0x27610b MOV	%RSI,(%R10,%RCX,8)

  (1154) 0x27610f INC	%RCX

  (1154) 0x276112 CMP	%RCX,%RDX

  (1154) 0x276115 JNE	2760f0

(1131) 0x276117 MOV	-0x1d0(%RBP),%RDI

(1131) 0x27611e MOV	-0x1c8(%RBP),%R9

(1131) 0x276125 MOV	-0x1c0(%RBP),%R10

(1131) 0x27612c MOV	(%RDI,%R8,8),%RAX

(1131) 0x276130 MOV	0x8(%RDI,%R8,8),%RCX

(1131) 0x276135 CMP	%RCX,%RAX

(1131) 0x276138 JL	2761fc

(1131) 0x27613e MOV	-0x1b8(%RBP),%R9

(1131) 0x276145 MOV	-0x40(%RBP),%RDI

(1131) 0x276149 MOV	-0x1b0(%RBP),%R10

(1131) 0x276150 MOV	-0x1a8(%RBP),%R11

(1131) 0x276157 MOV	(%R9,%R8,8),%RAX

(1131) 0x27615b MOV	0x8(%R9,%R8,8),%RCX

(1131) 0x276160 CMP	%RCX,%RAX

(1131) 0x276163 JL	27622c

(1131) 0x276169 MOV	-0x1a0(%RBP),%RAX

(1131) 0x276170 VXORPD	%XMM4,%XMM4,%XMM4

(1131) 0x276174 MOV	(%RAX,%R8,8),%RDX

(1131) 0x276178 MOV	0x8(%RAX,%R8,8),%R11

(1131) 0x27617d LEA	0x1(%RDX),%RCX

(1131) 0x276181 MOV	%RDX,-0xe0(%RBP)

(1131) 0x276188 CMP	%R11,%RCX

(1131) 0x27618b JGE	276340

(1131) 0x276191 MOV	-0x140(%RBP),%RAX

(1131) 0x276198 MOV	(%RAX),%RAX

(1131) 0x27619b MOV	%RAX,-0x38(%RBP)

(1131) 0x27619f MOV	-0x100(%RBP),%RDX

(1131) 0x2761a6 MOV	-0xf0(%RBP),%RDI

(1131) 0x2761ad MOV	-0x110(%RBP),%RAX

(1131) 0x2761b4 MOV	-0xf8(%RBP),%R9

(1131) 0x2761bb MOV	(%RDX),%RSI

(1131) 0x2761be MOV	-0x88(%RBP),%RDX

(1131) 0x2761c5 MOV	(%RDI),%R14

(1131) 0x2761c8 MOV	-0x90(%RBP),%RDI

(1131) 0x2761cf CMPQ	$0x1,(%RAX)

(1131) 0x2761d3 MOV	(%R9),%RBX

(1131) 0x2761d6 MOV	%R11,-0x30(%RBP)

(1131) 0x2761da MOV	(%RDX),%RDX

(1131) 0x2761dd MOV	(%RDI),%RDI

(1131) 0x2761e0 JNE	276690

(1131) 0x2761e6 VXORPD	%XMM3,%XMM3,%XMM3

(1131) 0x2761ea JMP	27625d

0x2761ec NOPL	(%RAX)

  (1153) 0x2761f0 INC	%RAX

  (1153) 0x2761f3 CMP	%RCX,%RAX

  (1153) 0x2761f6 JGE	27613e

  (1153) 0x2761fc MOV	(%R13),%RSI

  (1153) 0x276200 MOV	(%R9,%RAX,8),%RDX

  (1153) 0x276204 DEC	%RSI

  (1153) 0x276207 CMP	%RSI,(%R10,%RDX,8)

  (1153) 0x27620b JNE	2761f0

  (1153) 0x27620d MOV	%R8,(%R14,%RDX,8)

  (1153) 0x276211 MOV	0x8(%RDI,%R8,8),%RCX

  (1153) 0x276216 JMP	2761f0

0x276218 NOPL	(%RAX,%RAX,1)

  (1152) 0x276220 INC	%RAX

  (1152) 0x276223 CMP	%RCX,%RAX

  (1152) 0x276226 JGE	276169

  (1152) 0x27622c MOV	(%R13),%RSI

  (1152) 0x276230 MOV	(%R10,%RAX,8),%RDX

  (1152) 0x276234 DEC	%RSI

  (1152) 0x276237 CMP	%RSI,(%R11,%RDX,8)

  (1152) 0x27623b JNE	276220

  (1152) 0x27623d MOV	%R8,(%RDI,%RDX,8)

  (1152) 0x276241 MOV	0x8(%R9,%R8,8),%RCX

  (1152) 0x276246 JMP	276220

0x276248 NOPL	(%RAX,%RAX,1)

  (1149) 0x276250 INC	%RCX

  (1149) 0x276253 CMP	%RCX,-0x30(%RBP)

  (1149) 0x276257 JE	276344

  (1149) 0x27625d MOV	-0xd0(%RBP),%RAX

  (1149) 0x276264 MOV	-0xb0(%RBP),%R9

  (1149) 0x27626b MOV	(%RAX,%RCX,8),%R10

  (1149) 0x27626f CMP	%R8,(%R9,%R10,8)

  (1149) 0x276273 JNE	276320

  (1149) 0x276279 MOV	-0xa8(%RBP),%RAX

  (1149) 0x276280 MOV	(%RAX,%R10,8),%R9

  (1149) 0x276284 MOV	0x8(%RAX,%R10,8),%R11

  (1149) 0x276289 CMP	%R11,%R9

  (1149) 0x27628c JGE	2762bd

  (1149) 0x27628e XCHG	%AX,%AX

    (1151) 0x276290 MOV	(%R14,%R9,8),%RAX

    (1151) 0x276294 VMOVSD	(%RDX,%R9,8),%XMM2

    (1151) 0x27629a INC	%R9

    (1151) 0x27629d VMULSD	(%RSI,%RCX,8),%XMM2,%XMM2

    (1151) 0x2762a2 MOV	(%R15,%RAX,8),%RAX

    (1151) 0x2762a6 VADDSD	(%RDX,%RAX,8),%XMM2,%XMM5

    (1151) 0x2762ab VADDSD	%XMM4,%XMM2,%XMM4

    (1151) 0x2762af VADDSD	%XMM3,%XMM2,%XMM3

    (1151) 0x2762b3 VMOVSD	%XMM5,(%RDX,%RAX,8)

    (1151) 0x2762b8 CMP	%R9,%R11

    (1151) 0x2762bb JNE	276290

  (1149) 0x2762bd MOV	-0xa0(%RBP),%RAX

  (1149) 0x2762c4 MOV	(%RAX,%R10,8),%R9

  (1149) 0x2762c8 MOV	0x8(%RAX,%R10,8),%R10

  (1149) 0x2762cd CMP	%R10,%R9

  (1149) 0x2762d0 JGE	276250

  (1149) 0x2762d6 NOPW	%CS:(%RAX,%RAX,1)

    (1150) 0x2762e0 MOV	(%RBX,%R9,8),%R11

    (1150) 0x2762e4 VMOVSD	(%RDI,%R9,8),%XMM2

    (1150) 0x2762ea INC	%R9

    (1150) 0x2762ed VMULSD	(%RSI,%RCX,8),%XMM2,%XMM2

    (1150) 0x2762f2 MOV	(%R12,%R11,8),%R11

    (1150) 0x2762f6 VADDSD	(%RDI,%R11,8),%XMM2,%XMM5

    (1150) 0x2762fc VADDSD	%XMM4,%XMM2,%XMM4

    (1150) 0x276300 VADDSD	%XMM3,%XMM2,%XMM3

    (1150) 0x276304 VMOVSD	%XMM5,(%RDI,%R11,8)

    (1150) 0x27630a CMP	%R9,%R10

    (1150) 0x27630d JNE	2762e0

  (1149) 0x27630f JMP	276250

0x276314 NOPW	%CS:(%RAX,%RAX,1)

  (1149) 0x276320 MOV	-0x38(%RBP),%RAX

  (1149) 0x276324 CMPQ	$-0x3,(%RAX,%R10,8)

  (1149) 0x276329 JE	276250

  (1149) 0x27632f VADDSD	(%RSI,%RCX,8),%XMM3,%XMM3

  (1149) 0x276334 JMP	276250

0x276339 NOPL	(%RAX)

(1131) 0x276340 VXORPD	%XMM3,%XMM3,%XMM3

(1131) 0x276344 MOV	-0x198(%RBP),%RAX

(1131) 0x27634b MOV	(%RAX,%R8,8),%RCX

(1131) 0x27634f MOV	0x8(%RAX,%R8,8),%RDI

(1131) 0x276354 CMP	%RDI,%RCX

(1131) 0x276357 JGE	276620

(1131) 0x27635d MOV	-0x148(%RBP),%RAX

(1131) 0x276364 MOV	(%R13),%R9

(1131) 0x276368 MOV	(%RAX),%RAX

(1131) 0x27636b MOV	%RAX,-0x38(%RBP)

(1131) 0x27636f MOV	-0x178(%RBP),%RAX

(1131) 0x276376 MOV	(%RAX),%RAX

(1131) 0x276379 MOV	%RAX,-0x48(%RBP)

(1131) 0x27637d MOV	-0x110(%RBP),%RAX

(1131) 0x276384 MOV	-0x180(%RBP),%RDX

(1131) 0x27638b MOV	(%RAX),%RSI

(1131) 0x27638e MOV	(%RDX),%RAX

(1131) 0x276391 MOV	%RAX,-0xc0(%RBP)

(1131) 0x276398 MOV	-0x108(%RBP),%RAX

(1131) 0x27639f MOV	(%RAX),%RAX

(1131) 0x2763a2 MOV	%RAX,-0xb8(%RBP)

(1131) 0x2763a9 MOV	-0x150(%RBP),%RDX

(1131) 0x2763b0 MOV	-0x168(%RBP),%RAX

(1131) 0x2763b7 MOV	(%RDX),%RDX

(1131) 0x2763ba MOV	(%RAX),%RAX

(1131) 0x2763bd MOV	%RDX,-0x80(%RBP)

(1131) 0x2763c1 MOV	-0x158(%RBP),%RDX

(1131) 0x2763c8 MOV	(%RDX),%RDX

(1131) 0x2763cb MOV	%RDX,-0x98(%RBP)

(1131) 0x2763d2 MOV	-0x160(%RBP),%RDX

(1131) 0x2763d9 MOV	(%RDX),%RDX

(1131) 0x2763dc MOV	%RDX,-0x78(%RBP)

(1131) 0x2763e0 MOV	%R9,-0x70(%RBP)

(1131) 0x2763e4 MOV	-0x170(%RBP),%RDX

(1131) 0x2763eb CMPQ	$0,-0x138(%RBP)

(1131) 0x2763f3 MOV	%RDI,-0x30(%RBP)

(1131) 0x2763f7 MOV	(%RDX),%R14

(1131) 0x2763fa JE	2767bb

(1131) 0x276400 MOV	-0x130(%RBP),%RDX

(1131) 0x276407 MOV	(%RDX),%RDX

(1131) 0x27640a MOV	%RDX,-0xc8(%RBP)

(1131) 0x276411 CMP	$0x1,%RSI

(1131) 0x276415 JNE	276529

(1131) 0x27641b JMP	276439

0x27641d NOPL	(%RAX)

  (1144) 0x276420 MOV	-0x68(%RBP),%R10

  (1144) 0x276424 MOV	-0x60(%RBP),%R11

  (1144) 0x276428 MOV	-0x58(%RBP),%RBX

  (1144) 0x27642c INC	%RCX

  (1144) 0x27642f CMP	%RCX,-0x30(%RBP)

  (1144) 0x276433 JE	27662c

  (1144) 0x276439 MOV	-0x38(%RBP),%RDX

  (1144) 0x27643d MOV	-0xc8(%RBP),%RDI

  (1144) 0x276444 MOV	(%RDX,%RCX,8),%RSI

  (1144) 0x276448 MOV	(%RDI,%RSI,8),%RSI

  (1144) 0x27644c TEST	%RSI,%RSI

  (1144) 0x27644f JS	2764f0

  (1144) 0x276455 MOV	-0x40(%RBP),%RDX

  (1144) 0x276459 CMP	%R8,(%RDX,%RSI,8)

  (1144) 0x27645d JNE	2764f0

  (1144) 0x276463 MOV	-0x98(%RBP),%RDX

  (1144) 0x27646a MOV	0x8(%RDX,%RSI,8),%R10

  (1144) 0x27646f TEST	%R10,%R10

  (1144) 0x276472 JLE	276420

  (1144) 0x276474 MOV	-0x80(%RBP),%RDX

  (1144) 0x276478 MOV	-0x88(%RBP),%R9

  (1144) 0x27647f MOV	(%RDX,%RSI,8),%RBX

  (1144) 0x276483 MOV	-0x78(%RBP),%RDX

  (1144) 0x276487 MOV	-0x70(%RBP),%RSI

  (1144) 0x27648b MOV	(%R9),%R9

  (1144) 0x27648e MOV	(%RDX,%RSI,8),%RDI

  (1144) 0x276492 MOV	-0x90(%RBP),%RSI

  (1144) 0x276499 ADD	%RBX,%R10

  (1144) 0x27649c MOV	(%RSI),%RSI

  (1144) 0x27649f NOP

    (1145) 0x2764a0 MOV	(%RDI,%RBX,8),%R11

    (1145) 0x2764a4 VMOVSD	(%R14,%RBX,8),%XMM2

    (1145) 0x2764aa VMULSD	(%RAX,%RCX,8),%XMM2,%XMM2

    (1145) 0x2764af TEST	%R11,%R11

    (1145) 0x2764b2 LEA	(%R12,%R11,8),%RDX

    (1145) 0x2764b6 NOT	%R11

    (1145) 0x2764b9 LEA	(%R15,%R11,8),%R11

    (1145) 0x2764bd CMOVNS	%RDX,%R11

    (1145) 0x2764c1 MOV	%RSI,%RDX

    (1145) 0x2764c4 CMOVS	%R9,%RDX

    (1145) 0x2764c8 INC	%RBX

    (1145) 0x2764cb MOV	(%R11),%R11

    (1145) 0x2764ce VADDSD	%XMM4,%XMM2,%XMM4

    (1145) 0x2764d2 VADDSD	%XMM3,%XMM2,%XMM3

    (1145) 0x2764d6 VADDSD	(%RDX,%R11,8),%XMM2,%XMM5

    (1145) 0x2764dc VMOVSD	%XMM5,(%RDX,%R11,8)

    (1145) 0x2764e2 CMP	%R10,%RBX

    (1145) 0x2764e5 JL	2764a0

  (1144) 0x2764e7 JMP	276420

0x2764ec NOPL	(%RAX)

  (1144) 0x2764f0 MOV	-0x48(%RBP),%RDX

  (1144) 0x2764f4 CMPQ	$-0x3,(%RDX,%RSI,8)

  (1144) 0x2764f9 JE	276420

  (1144) 0x2764ff VADDSD	(%RAX,%RCX,8),%XMM3,%XMM3

  (1144) 0x276504 JMP	276420

0x276509 NOPL	(%RAX)

  (1142) 0x276510 MOV	-0x68(%RBP),%R10

  (1142) 0x276514 MOV	-0x60(%RBP),%R11

  (1142) 0x276518 MOV	-0x58(%RBP),%RBX

  (1142) 0x27651c INC	%RCX

  (1142) 0x27651f CMP	%RCX,-0x30(%RBP)

  (1142) 0x276523 JE	27662c

  (1142) 0x276529 MOV	-0x38(%RBP),%RDX

  (1142) 0x27652d MOV	-0xc8(%RBP),%RSI

  (1142) 0x276534 MOV	(%RDX,%RCX,8),%RDX

  (1142) 0x276538 MOV	(%RSI,%RDX,8),%RSI

  (1142) 0x27653c TEST	%RSI,%RSI

  (1142) 0x27653f JS	2765e0

  (1142) 0x276545 MOV	-0x40(%RBP),%RDX

  (1142) 0x276549 CMP	%R8,(%RDX,%RSI,8)

  (1142) 0x27654d JNE	2765e0

  (1142) 0x276553 MOV	-0x98(%RBP),%RDX

  (1142) 0x27655a MOV	0x8(%RDX,%RSI,8),%R10

  (1142) 0x27655f TEST	%R10,%R10

  (1142) 0x276562 JLE	276510

  (1142) 0x276564 MOV	-0x80(%RBP),%RDX

  (1142) 0x276568 MOV	-0x90(%RBP),%RDI

  (1142) 0x27656f MOV	-0x88(%RBP),%R9

  (1142) 0x276576 MOV	(%RDX,%RSI,8),%RBX

  (1142) 0x27657a MOV	-0x78(%RBP),%RDX

  (1142) 0x27657e MOV	-0x70(%RBP),%RSI

  (1142) 0x276582 MOV	(%RDI),%RDI

  (1142) 0x276585 MOV	(%R9),%R9

  (1142) 0x276588 MOV	(%RDX,%RSI,8),%RSI

  (1142) 0x27658c ADD	%RBX,%R10

  (1142) 0x27658f NOP

    (1143) 0x276590 MOV	(%RSI,%RBX,8),%RDX

    (1143) 0x276594 VMOVSD	(%R14,%RBX,8),%XMM2

    (1143) 0x27659a VMULSD	(%RAX,%RCX,8),%XMM2,%XMM2

    (1143) 0x27659f TEST	%RDX,%RDX

    (1143) 0x2765a2 LEA	(%R12,%RDX,8),%R11

    (1143) 0x2765a6 NOT	%RDX

    (1143) 0x2765a9 LEA	(%R15,%RDX,8),%RDX

    (1143) 0x2765ad CMOVNS	%R11,%RDX

    (1143) 0x2765b1 MOV	%RDI,%R11

    (1143) 0x2765b4 CMOVS	%R9,%R11

    (1143) 0x2765b8 INC	%RBX

    (1143) 0x2765bb MOV	(%RDX),%RDX

    (1143) 0x2765be VADDSD	%XMM4,%XMM2,%XMM4

    (1143) 0x2765c2 VADDSD	%XMM3,%XMM2,%XMM3

    (1143) 0x2765c6 VADDSD	(%R11,%RDX,8),%XMM2,%XMM5

    (1143) 0x2765cc VMOVSD	%XMM5,(%R11,%RDX,8)

    (1143) 0x2765d2 CMP	%R10,%RBX

    (1143) 0x2765d5 JL	276590

  (1142) 0x2765d7 JMP	276510

0x2765dc NOPL	(%RAX)

  (1142) 0x2765e0 MOV	-0x48(%RBP),%RDX

  (1142) 0x2765e4 CMPQ	$-0x3,(%RDX,%RSI,8)

  (1142) 0x2765e9 JE	276510

  (1142) 0x2765ef MOV	-0xc0(%RBP),%RDX

  (1142) 0x2765f6 MOV	-0xb8(%RBP),%RDI

  (1142) 0x2765fd MOV	(%RDX,%RSI,8),%RDX

  (1142) 0x276601 CMP	%RDX,(%RDI,%R8,8)

  (1142) 0x276605 JNE	276510

  (1142) 0x27660b VADDSD	(%RAX,%RCX,8),%XMM3,%XMM3

  (1142) 0x276610 JMP	276510

0x276615 NOPW	%CS:(%RAX,%RAX,1)

(1131) 0x276620 MOV	-0x68(%RBP),%R10

(1131) 0x276624 MOV	-0x60(%RBP),%R11

(1131) 0x276628 MOV	-0x58(%RBP),%RBX

(1131) 0x27662c MOV	-0x188(%RBP),%RAX

(1131) 0x276633 MOV	-0xe0(%RBP),%RCX

(1131) 0x27663a VMULSD	(%RAX,%RCX,8),%XMM4,%XMM4

(1131) 0x27663f VUCOMISD	%XMM1,%XMM4

(1131) 0x276643 JE	27664d

(1131) 0x276645 VXORPD	%XMM0,%XMM3,%XMM2

(1131) 0x276649 VDIVSD	%XMM4,%XMM2,%XMM2

(1131) 0x27664d MOV	-0xa8(%RBP),%RCX

(1131) 0x276654 MOV	-0xb0(%RBP),%R14

(1131) 0x27665b MOV	(%RCX,%R8,8),%RAX

(1131) 0x27665f MOV	0x8(%RCX,%R8,8),%RCX

(1131) 0x276664 MOV	%RCX,%RDX

(1131) 0x276667 SUB	%RAX,%RDX

(1131) 0x27666a JLE	276a84

(1131) 0x276670 CMP	$0x4,%RDX

(1131) 0x276674 JB	276a70

(1131) 0x27667a CMP	$0x20,%RDX

(1131) 0x27667e JAE	2769c5

(1131) 0x276684 XOR	%ESI,%ESI

(1131) 0x276686 JMP	276a31

0x27668b NOPL	(%RAX,%RAX,1)

(1131) 0x276690 MOV	-0x108(%RBP),%RAX

(1131) 0x276697 VXORPD	%XMM3,%XMM3,%XMM3

(1131) 0x27669b MOV	(%RAX),%RAX

(1131) 0x27669e MOV	%RAX,-0x48(%RBP)

(1131) 0x2766a2 JMP	2766c0

0x2766a4 NOPW	%CS:(%RAX,%RAX,1)

  (1146) 0x2766b0 MOV	-0x30(%RBP),%R11

  (1146) 0x2766b4 INC	%RCX

  (1146) 0x2766b7 CMP	%R11,%RCX

  (1146) 0x2766ba JE	276344

  (1146) 0x2766c0 MOV	-0xd0(%RBP),%RAX

  (1146) 0x2766c7 MOV	-0xb0(%RBP),%R9

  (1146) 0x2766ce MOV	(%RAX,%RCX,8),%R10

  (1146) 0x2766d2 CMP	%R8,(%R9,%R10,8)

  (1146) 0x2766d6 JNE	276790

  (1146) 0x2766dc MOV	-0xa8(%RBP),%RAX

  (1146) 0x2766e3 MOV	(%RAX,%R10,8),%R9

  (1146) 0x2766e7 MOV	0x8(%RAX,%R10,8),%R11

  (1146) 0x2766ec CMP	%R11,%R9

  (1146) 0x2766ef JGE	27672d

  (1146) 0x2766f1 NOPW	%CS:(%RAX,%RAX,1)

    (1148) 0x276700 MOV	(%R14,%R9,8),%RAX

    (1148) 0x276704 VMOVSD	(%RDX,%R9,8),%XMM2

    (1148) 0x27670a INC	%R9

    (1148) 0x27670d VMULSD	(%RSI,%RCX,8),%XMM2,%XMM2

    (1148) 0x276712 MOV	(%R15,%RAX,8),%RAX

    (1148) 0x276716 VADDSD	(%RDX,%RAX,8),%XMM2,%XMM5

    (1148) 0x27671b VADDSD	%XMM4,%XMM2,%XMM4

    (1148) 0x27671f VADDSD	%XMM3,%XMM2,%XMM3

    (1148) 0x276723 VMOVSD	%XMM5,(%RDX,%RAX,8)

    (1148) 0x276728 CMP	%R9,%R11

    (1148) 0x27672b JNE	276700

  (1146) 0x27672d MOV	-0xa0(%RBP),%RAX

  (1146) 0x276734 MOV	(%RAX,%R10,8),%R9

  (1146) 0x276738 MOV	0x8(%RAX,%R10,8),%R10

  (1146) 0x27673d CMP	%R10,%R9

  (1146) 0x276740 JGE	2766b0

  (1146) 0x276746 MOV	-0x30(%RBP),%R11

  (1146) 0x27674a NOPW	(%RAX,%RAX,1)

    (1147) 0x276750 MOV	(%RBX,%R9,8),%RAX

    (1147) 0x276754 VMOVSD	(%RDI,%R9,8),%XMM2

    (1147) 0x27675a INC	%R9

    (1147) 0x27675d VMULSD	(%RSI,%RCX,8),%XMM2,%XMM2

    (1147) 0x276762 MOV	(%R12,%RAX,8),%RAX

    (1147) 0x276766 VADDSD	(%RDI,%RAX,8),%XMM2,%XMM5

    (1147) 0x27676b VADDSD	%XMM4,%XMM2,%XMM4

    (1147) 0x27676f VADDSD	%XMM3,%XMM2,%XMM3

    (1147) 0x276773 VMOVSD	%XMM5,(%RDI,%RAX,8)

    (1147) 0x276778 CMP	%R9,%R10

    (1147) 0x27677b JNE	276750

  (1146) 0x27677d JMP	2766b4

0x276782 NOPW	%CS:(%RAX,%RAX,1)

  (1146) 0x276790 MOV	-0x38(%RBP),%RAX

  (1146) 0x276794 CMPQ	$-0x3,(%RAX,%R10,8)

  (1146) 0x276799 JE	2766b4

  (1146) 0x27679f MOV	-0x48(%RBP),%R9

  (1146) 0x2767a3 MOV	(%R9,%R8,8),%RAX

  (1146) 0x2767a7 CMP	%RAX,(%R9,%R10,8)

  (1146) 0x2767ab JNE	2766b4

  (1146) 0x2767b1 VADDSD	(%RSI,%RCX,8),%XMM3,%XMM3

  (1146) 0x2767b6 JMP	2766b4

(1131) 0x2767bb CMP	$0x1,%RSI

(1131) 0x2767bf JNE	2768d9

(1131) 0x2767c5 JMP	2767e9

0x2767c7 NOPW	(%RAX,%RAX,1)

  (1140) 0x2767d0 MOV	-0x68(%RBP),%R10

  (1140) 0x2767d4 MOV	-0x60(%RBP),%R11

  (1140) 0x2767d8 MOV	-0x58(%RBP),%RBX

  (1140) 0x2767dc INC	%RCX

  (1140) 0x2767df CMP	%RCX,-0x30(%RBP)

  (1140) 0x2767e3 JE	27662c

  (1140) 0x2767e9 MOV	-0x38(%RBP),%RDX

  (1140) 0x2767ed MOV	(%RDX,%RCX,8),%RSI

  (1140) 0x2767f1 TEST	%RSI,%RSI

  (1140) 0x2767f4 JS	2768a0

  (1140) 0x2767fa MOV	-0x40(%RBP),%RDX

  (1140) 0x2767fe CMP	%R8,(%RDX,%RSI,8)

  (1140) 0x276802 JNE	2768a0

  (1140) 0x276808 MOV	-0x98(%RBP),%RDX

  (1140) 0x27680f MOV	0x8(%RDX,%RSI,8),%RDI

  (1140) 0x276814 TEST	%RDI,%RDI

  (1140) 0x276817 JLE	2767d0

  (1140) 0x276819 MOV	-0x80(%RBP),%RDX

  (1140) 0x27681d MOV	-0x88(%RBP),%R9

  (1140) 0x276824 MOV	(%RDX,%RSI,8),%R10

  (1140) 0x276828 MOV	-0x78(%RBP),%RDX

  (1140) 0x27682c MOV	-0x70(%RBP),%RSI

  (1140) 0x276830 MOV	(%R9),%R9

  (1140) 0x276833 MOV	(%RDX,%RSI,8),%RBX

  (1140) 0x276837 MOV	-0x90(%RBP),%RSI

  (1140) 0x27683e ADD	%R10,%RDI

  (1140) 0x276841 MOV	(%RSI),%RSI

  (1140) 0x276844 NOPW	%CS:(%RAX,%RAX,1)

    (1141) 0x276850 MOV	(%RBX,%R10,8),%RDX

    (1141) 0x276854 VMOVSD	(%R14,%R10,8),%XMM2

    (1141) 0x27685a VMULSD	(%RAX,%RCX,8),%XMM2,%XMM2

    (1141) 0x27685f TEST	%RDX,%RDX

    (1141) 0x276862 LEA	(%R12,%RDX,8),%R11

    (1141) 0x276866 NOT	%RDX

    (1141) 0x276869 LEA	(%R15,%RDX,8),%RDX

    (1141) 0x27686d CMOVNS	%R11,%RDX

    (1141) 0x276871 MOV	%RSI,%R11

    (1141) 0x276874 CMOVS	%R9,%R11

    (1141) 0x276878 INC	%R10

    (1141) 0x27687b MOV	(%RDX),%RDX

    (1141) 0x27687e VADDSD	%XMM4,%XMM2,%XMM4

    (1141) 0x276882 VADDSD	%XMM3,%XMM2,%XMM3

    (1141) 0x276886 VADDSD	(%R11,%RDX,8),%XMM2,%XMM5

    (1141) 0x27688c VMOVSD	%XMM5,(%R11,%RDX,8)

    (1141) 0x276892 CMP	%RDI,%R10

    (1141) 0x276895 JL	276850

  (1140) 0x276897 JMP	2767d0

0x27689c NOPL	(%RAX)

  (1140) 0x2768a0 MOV	-0x48(%RBP),%RDX

  (1140) 0x2768a4 CMPQ	$-0x3,(%RDX,%RSI,8)

  (1140) 0x2768a9 JE	2767d0

  (1140) 0x2768af VADDSD	(%RAX,%RCX,8),%XMM3,%XMM3

  (1140) 0x2768b4 JMP	2767d0

0x2768b9 NOPL	(%RAX)

  (1138) 0x2768c0 MOV	-0x68(%RBP),%R10

  (1138) 0x2768c4 MOV	-0x60(%RBP),%R11

  (1138) 0x2768c8 MOV	-0x58(%RBP),%RBX

  (1138) 0x2768cc INC	%RCX

  (1138) 0x2768cf CMP	%RCX,-0x30(%RBP)

  (1138) 0x2768d3 JE	27662c

  (1138) 0x2768d9 MOV	-0x38(%RBP),%RDX

  (1138) 0x2768dd MOV	(%RDX,%RCX,8),%RSI

  (1138) 0x2768e1 TEST	%RSI,%RSI

  (1138) 0x2768e4 JS	276990

  (1138) 0x2768ea MOV	-0x40(%RBP),%RDX

  (1138) 0x2768ee CMP	%R8,(%RDX,%RSI,8)

  (1138) 0x2768f2 JNE	276990

  (1138) 0x2768f8 MOV	-0x98(%RBP),%RDX

  (1138) 0x2768ff MOV	0x8(%RDX,%RSI,8),%RDI

  (1138) 0x276904 TEST	%RDI,%RDI

  (1138) 0x276907 JLE	2768c0

  (1138) 0x276909 MOV	-0x80(%RBP),%RDX

  (1138) 0x27690d MOV	-0x88(%RBP),%R9

  (1138) 0x276914 MOV	(%RDX,%RSI,8),%R10

  (1138) 0x276918 MOV	-0x78(%RBP),%RDX

  (1138) 0x27691c MOV	-0x70(%RBP),%RSI

  (1138) 0x276920 MOV	(%R9),%R9

  (1138) 0x276923 MOV	(%RDX,%RSI,8),%RBX

  (1138) 0x276927 MOV	-0x90(%RBP),%RSI

  (1138) 0x27692e ADD	%R10,%RDI

  (1138) 0x276931 MOV	(%RSI),%RSI

  (1138) 0x276934 NOPW	%CS:(%RAX,%RAX,1)

    (1139) 0x276940 MOV	(%RBX,%R10,8),%RDX

    (1139) 0x276944 VMOVSD	(%R14,%R10,8),%XMM2

    (1139) 0x27694a VMULSD	(%RAX,%RCX,8),%XMM2,%XMM2

    (1139) 0x27694f TEST	%RDX,%RDX

    (1139) 0x276952 LEA	(%R12,%RDX,8),%R11

    (1139) 0x276956 NOT	%RDX

    (1139) 0x276959 LEA	(%R15,%RDX,8),%RDX

    (1139) 0x27695d CMOVNS	%R11,%RDX

    (1139) 0x276961 MOV	%RSI,%R11

    (1139) 0x276964 CMOVS	%R9,%R11

    (1139) 0x276968 INC	%R10

    (1139) 0x27696b MOV	(%RDX),%RDX

    (1139) 0x27696e VADDSD	%XMM4,%XMM2,%XMM4

    (1139) 0x276972 VADDSD	%XMM3,%XMM2,%XMM3

    (1139) 0x276976 VADDSD	(%R11,%RDX,8),%XMM2,%XMM5

    (1139) 0x27697c VMOVSD	%XMM5,(%R11,%RDX,8)

    (1139) 0x276982 CMP	%RDI,%R10

    (1139) 0x276985 JL	276940

  (1138) 0x276987 JMP	2768c0

0x27698c NOPL	(%RAX)

  (1138) 0x276990 MOV	-0x48(%RBP),%RDX

  (1138) 0x276994 CMPQ	$-0x3,(%RDX,%RSI,8)

  (1138) 0x276999 JE	2768c0

  (1138) 0x27699f MOV	-0xc0(%RBP),%RDX

  (1138) 0x2769a6 MOV	-0xb8(%RBP),%RDI

  (1138) 0x2769ad MOV	(%RDX,%RSI,8),%RDX

  (1138) 0x2769b1 CMP	%RDX,(%RDI,%R8,8)

  (1138) 0x2769b5 JNE	2768c0

  (1138) 0x2769bb VADDSD	(%RAX,%RCX,8),%XMM3,%XMM3

  (1138) 0x2769c0 JMP	2768c0

(1131) 0x2769c5 MOV	-0x128(%RBP),%RDI

(1131) 0x2769cc VBROADCASTSD	%XMM2,%ZMM3

(1131) 0x2769d2 MOV	%RDX,%RSI

(1131) 0x2769d5 AND	$-0x20,%RSI

(1131) 0x2769d9 XOR	%R9D,%R9D

(1131) 0x2769dc LEA	(%RDI,%RAX,8),%RDI

  (1136) 0x2769e0 VMULPD	-0xc0(%RDI,%R9,8),%ZMM3,%ZMM4

  (1136) 0x2769e8 VMULPD	-0x80(%RDI,%R9,8),%ZMM3,%ZMM5

  (1136) 0x2769f0 VMULPD	-0x40(%RDI,%R9,8),%ZMM3,%ZMM6

  (1136) 0x2769f8 VMULPD	(%RDI,%R9,8),%ZMM3,%ZMM7

  (1136) 0x2769ff VMOVUPD	%ZMM4,-0xc0(%RDI,%R9,8)

  (1136) 0x276a07 VMOVUPD	%ZMM5,-0x80(%RDI,%R9,8)

  (1136) 0x276a0f VMOVUPD	%ZMM6,-0x40(%RDI,%R9,8)

  (1136) 0x276a17 VMOVUPD	%ZMM7,(%RDI,%R9,8)

  (1136) 0x276a1e ADD	$0x20,%R9

  (1136) 0x276a22 CMP	%R9,%RSI

  (1136) 0x276a25 JNE	2769e0

(1131) 0x276a27 CMP	%RSI,%RDX

(1131) 0x276a2a JE	276a84

(1131) 0x276a2c TEST	$0x1c,%DL

(1131) 0x276a2f JE	276a6c

(1131) 0x276a31 MOV	%RDX,%RDI

(1131) 0x276a34 AND	$-0x4,%RDI

(1131) 0x276a38 LEA	(%R11,%RAX,8),%R9

(1131) 0x276a3c VBROADCASTSD	%XMM2,%YMM3

(1131) 0x276a41 ADD	%RDI,%RAX

(1131) 0x276a44 NOPW	%CS:(%RAX,%RAX,1)

  (1137) 0x276a50 VMULPD	(%R9,%RSI,8),%YMM3,%YMM4

  (1137) 0x276a56 VMOVUPD	%YMM4,(%R9,%RSI,8)

  (1137) 0x276a5c ADD	$0x4,%RSI

  (1137) 0x276a60 CMP	%RSI,%RDI

  (1137) 0x276a63 JNE	276a50

(1131) 0x276a65 CMP	%RDI,%RDX

(1131) 0x276a68 JNE	276a70

(1131) 0x276a6a JMP	276a84

(1131) 0x276a6c ADD	%RSI,%RAX

(1131) 0x276a6f NOP

  (1135) 0x276a70 VMULSD	(%R11,%RAX,8),%XMM2,%XMM3

  (1135) 0x276a76 VMOVSD	%XMM3,(%R11,%RAX,8)

  (1135) 0x276a7c INC	%RAX

  (1135) 0x276a7f CMP	%RAX,%RCX

  (1135) 0x276a82 JNE	276a70

(1131) 0x276a84 MOV	-0xa0(%RBP),%RCX

(1131) 0x276a8b MOV	(%RCX,%R8,8),%RAX

(1131) 0x276a8f MOV	0x8(%RCX,%R8,8),%RCX

(1131) 0x276a94 MOV	%RCX,%RDX

(1131) 0x276a97 SUB	%RAX,%RDX

(1131) 0x276a9a JLE	276040

(1131) 0x276aa0 CMP	$0x4,%RDX

(1131) 0x276aa4 JAE	276ab0

(1131) 0x276aa6 MOV	-0x50(%RBP),%RDX

(1131) 0x276aaa JMP	276b80

0x276aaf NOP

(1131) 0x276ab0 CMP	$0x20,%RDX

(1131) 0x276ab4 JAE	276aba

(1131) 0x276ab6 XOR	%ESI,%ESI

(1131) 0x276ab8 JMP	276b35

(1131) 0x276aba MOV	-0x120(%RBP),%RDI

(1131) 0x276ac1 VBROADCASTSD	%XMM2,%ZMM3

(1131) 0x276ac7 MOV	%RDX,%RSI

(1131) 0x276aca AND	$-0x20,%RSI

(1131) 0x276ace XOR	%R8D,%R8D

(1131) 0x276ad1 LEA	(%RDI,%RAX,8),%RDI

(1131) 0x276ad5 NOPW	%CS:(%RAX,%RAX,1)

  (1132) 0x276ae0 VMULPD	-0xc0(%RDI,%R8,8),%ZMM3,%ZMM4

  (1132) 0x276ae8 VMULPD	-0x80(%RDI,%R8,8),%ZMM3,%ZMM5

  (1132) 0x276af0 VMULPD	-0x40(%RDI,%R8,8),%ZMM3,%ZMM6

  (1132) 0x276af8 VMULPD	(%RDI,%R8,8),%ZMM3,%ZMM7

  (1132) 0x276aff VMOVUPD	%ZMM4,-0xc0(%RDI,%R8,8)

  (1132) 0x276b07 VMOVUPD	%ZMM5,-0x80(%RDI,%R8,8)

  (1132) 0x276b0f VMOVUPD	%ZMM6,-0x40(%RDI,%R8,8)

  (1132) 0x276b17 VMOVUPD	%ZMM7,(%RDI,%R8,8)

  (1132) 0x276b1e ADD	$0x20,%R8

  (1132) 0x276b22 CMP	%R8,%RSI

  (1132) 0x276b25 JNE	276ae0

(1131) 0x276b27 CMP	%RSI,%RDX

(1131) 0x276b2a JE	276040

(1131) 0x276b30 TEST	$0x1c,%DL

(1131) 0x276b33 JE	276b97

(1131) 0x276b35 MOV	-0x50(%RBP),%R8

(1131) 0x276b39 MOV	%RDX,%RDI

(1131) 0x276b3c AND	$-0x4,%RDI

(1131) 0x276b40 VBROADCASTSD	%XMM2,%YMM3

(1131) 0x276b45 LEA	(%R8,%RAX,8),%R8

(1131) 0x276b49 ADD	%RDI,%RAX

(1131) 0x276b4c NOPL	(%RAX)

  (1134) 0x276b50 VMULPD	(%R8,%RSI,8),%YMM3,%YMM4

  (1134) 0x276b56 VMOVUPD	%YMM4,(%R8,%RSI,8)

  (1134) 0x276b5c ADD	$0x4,%RSI

  (1134) 0x276b60 CMP	%RSI,%RDI

  (1134) 0x276b63 JNE	276b50

(1131) 0x276b65 CMP	%RDI,%RDX

(1131) 0x276b68 MOV	-0x50(%RBP),%RDX

(1131) 0x276b6c JE	276040

(1131) 0x276b72 NOPW	%CS:(%RAX,%RAX,1)

  (1133) 0x276b80 VMULSD	(%RDX,%RAX,8),%XMM2,%XMM3

  (1133) 0x276b85 VMOVSD	%XMM3,(%RDX,%RAX,8)

  (1133) 0x276b8a INC	%RAX

  (1133) 0x276b8d CMP	%RAX,%RCX

  (1133) 0x276b90 JNE	276b80

(1131) 0x276b92 JMP	276040

(1131) 0x276b97 ADD	%RSI,%RAX

(1131) 0x276b9a JMP	276aa6

0x276b9f MOV	%R14,%RDI

0x276ba2 VZEROUPPER

0x276ba5 CALL	301970 <hypre_Free>

0x276baa MOV	-0x40(%RBP),%RDI

0x276bae CALL	301970 <hypre_Free>

0x276bb3 MOV	%R15,%RDI

0x276bb6 CALL	301970 <hypre_Free>

0x276bbb MOV	%R12,%RDI

0x276bbe ADD	$0x1c8,%RSP

0x276bc5 POP	%RBX

0x276bc6 POP	%R12

0x276bc8 POP	%R13

0x276bca POP	%R14

0x276bcc POP	%R15

0x276bce POP	%RBP

0x276bcf JMP	301970

0x276bd4 NOPW	%CS:(%RAX,%RAX,1)

Coverage (%)	Name	Source Location	Module
►95.98+	__kmp_invoke_microtask		libomp.so
○	__kmp_invoke_task_func		libomp.so
○	__kmp_launch_thread		libomp.so
○	__kmp_launch_worker(void*)		libomp.so
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►2.99+	__kmp_invoke_microtask		libomp.so
○	__kmp_invoke_task_func		libomp.so
○	__kmp_fork_call		libomp.so
○	__kmpc_fork_call		libomp.so
○	hypre_BoomerAMGBuildMultipass	par_multi_interp.c:1737	exec
○	hypre_BoomerAMGSetup	par_amg_setup.c:737	exec
○	hypre_PCGSetup	pcg.c:234	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run aocc_2

Source file and lines	par_multi_interp.c:1737-1881
Module	exec

The function is defined in /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1737,1747-1881.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 44.00 to 2.33 cycles (18.86x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is probably not vectorized. Only 12% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 44.00 to 5.50 cycles (8.00x speedup).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Performance is limited by:

reading data from caches/RAM (load units are a bottleneck)
writing data to caches/RAM (the store unit is a bottleneck)

By removing all these bottlenecks, you can lower the cost of an iteration from 44.00 to 31.88 cycles (1.38x speedup).

Workaround

Read less array elements
Write less array elements
Provide more information to your compiler:
- use the 'restrict' C99 keyword

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

hypre_CAlloc: 4 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1748
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1751
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1754
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1756
hypre_Free: 3 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1878
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1879
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1880
hypre_GetThreadNum: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1766
hypre_NumActiveThreads: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1767

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVG: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1756
IDIV: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1768

Conversion instructions

Detected expensive conversion instructions.

Details

CQTO: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1768

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 816 bytes. The binary function is storing 528 bytes.

General properties

nb instructions	266
nb uops	255
loop length	1325
used x86 registers	16
used mmx registers	0
used xmm registers	2
used ymm registers	0
used zmm registers	0
nb stack references	94

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	31.88 cycles
front end	31.88 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	8.00	8.00	8.00	8.00	8.00	8.00	44.00	44.00	44.00	44.00	0.25	0.25	0.25	0.25	0.00	0.00
cycles	8.00	8.00	8.00	8.00	8.00	8.00	44.00	44.00	44.00	44.00	0.25	0.25	0.25	0.25	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

7.00-12.00

Cycles summary

Front-end	31.88
Dispatch	44.00
DIV/SQRT	7.00-12.00
Overall L1	44.00

Vectorization ratios

INT

all	1%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	8%

all	50%
load	0%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	100%

INT+FP

all	2%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	16%

Vector efficiency ratios

INT

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	13%

all	18%
load	12%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

INT+FP

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	12%
other	14%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 44.00 cycles. At this rate:

7% of peak load performance is reached (18.55 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
9% of peak store performance is reached (12.00 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 275bb0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x1c8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x138(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDX),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R9,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R8,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,-0x180(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x130(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x178(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x128(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x170(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x120(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x168(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x118(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x160(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x110(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x158(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x108(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x150(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x100(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x148(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xf8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x130(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xf0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xe8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xe0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x108(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xd8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x110(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xd0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x140(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xc8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x100(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xc0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xb8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xd0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xb0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xa8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xc8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xa0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x98(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x90(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x88(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x70(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x80(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xf8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x78(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x70(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xc0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x68(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xa0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x60(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xb8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x58(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xf0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x50(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x88(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x48(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xe8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x40(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x38(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xe0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x30(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x28(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x18(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x20(%RBP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xd8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x10(%RBP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDX,-0x68(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
TEST %RDI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 275da9 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x1f9>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 301880 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RBX,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 275dab <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x1fb>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV (%RCX),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xb0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RCX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
TEST %RDI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 275de2 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x232>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 301880 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV (%R15),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
TEST %RDI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 275df0 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x240>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 301880 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 275df3 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x243>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV (%R15),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
TEST %RDI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 275dd3 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x223>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %R15D,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV (%R12),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R14),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RDI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
CMOVG %RAX,%RDI	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
CALL 301880 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0x68(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xb0(%RBP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMPQ $0,(%RCX)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JLE 275e40 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x290>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMPQ $0,(%RBX)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOV -0x40(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JLE 275e60 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x2b0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CALL 303460 <hypre_GetThreadNum>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 303450 <hypre_NumActiveThreads>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x60(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RSI,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CQTO																				scal (12.5%)
IDIV %RCX	2	0	0	0	2	0	0	0	0	0	0	0	0	0	0	0	0	9-19	7-12	scal (12.5%)
LEA 0x1(%RBX),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
DEC %RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
IMUL %RAX,%RDX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
IMUL %RBX,%RAX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
CMP %RCX,%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
CMOVE %RSI,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,-0x118(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CMP %RDX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JGE 276b9f <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xfef>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0xd8(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV (%R13),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVDDUP -0x66b33(%RIP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
VXORPD %XMM1,%XMM1,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV (%RSI),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX,%RCX,8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %RAX,-0x118(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
ADD %RAX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x50(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xd8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0xe0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x1e8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0xa8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0xe8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xb8(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%RCX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x1e0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0xa0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xa0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0xc0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x1d8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x70(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x1d0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x78(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x1c8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x80(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x1c0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x98(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x1b8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0xc8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x1b0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x48(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x1a8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0xd0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x1a0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x38(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xd0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x30(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x198(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x58(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x138(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x88(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xf8(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x90(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xf0(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDI),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RCX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RSI),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x190(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA 0xc0(%R11),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV -0x100(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x188(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RSI,-0x128(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RCX,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
ADD $0xc0,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,-0x120(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,-0x68(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R11,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RBX,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JMP 276057 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x4a7>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV %R14,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 301970 <hypre_Free>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0x40(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CALL 301970 <hypre_Free>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %R15,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 301970 <hypre_Free>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %R12,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD $0x1c8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 301970 <hypre_Free>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run aocc_2

Source file and lines	par_multi_interp.c:1737-1881
Module	exec

The function is defined in /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1737,1747-1881.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Performance is limited by:

reading data from caches/RAM (load units are a bottleneck)
writing data to caches/RAM (the store unit is a bottleneck)

By removing all these bottlenecks, you can lower the cost of an iteration from 44.00 to 31.88 cycles (1.38x speedup).

Workaround

Read less array elements
Write less array elements
Provide more information to your compiler:
- use the 'restrict' C99 keyword

No data for this section

CALL instructions

Detected function call instructions.

Details

hypre_CAlloc: 4 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1748
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1751
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1754
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1756
hypre_Free: 3 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1878
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1879
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1880
hypre_GetThreadNum: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1766
hypre_NumActiveThreads: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1767

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVG: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1756
IDIV: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1768

Conversion instructions

Detected expensive conversion instructions.

Details

CQTO: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1768

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 816 bytes. The binary function is storing 528 bytes.

General properties

nb instructions	266
nb uops	255
loop length	1325
used x86 registers	16
used mmx registers	0
used xmm registers	2
used ymm registers	0
used zmm registers	0
nb stack references	94

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	31.88 cycles
front end	31.88 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	8.00	8.00	8.00	8.00	8.00	8.00	44.00	44.00	44.00	44.00	0.25	0.25	0.25	0.25	0.00	0.00
cycles	8.00	8.00	8.00	8.00	8.00	8.00	44.00	44.00	44.00	44.00	0.25	0.25	0.25	0.25	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

7.00-12.00

Cycles summary

Front-end	31.88
Dispatch	44.00
DIV/SQRT	7.00-12.00
Overall L1	44.00

Vectorization ratios

INT

all	1%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	8%

all	50%
load	0%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	100%

INT+FP

all	2%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	16%

Vector efficiency ratios

INT

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	13%

all	18%
load	12%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

INT+FP

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	12%
other	14%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 44.00 cycles. At this rate:

7% of peak load performance is reached (18.55 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
9% of peak store performance is reached (12.00 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 275bb0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x1c8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x138(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDX),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R9,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R8,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,-0x180(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x130(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x178(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x128(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x170(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x120(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x168(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x118(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x160(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x110(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x158(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x108(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x150(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x100(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x148(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xf8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x130(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xf0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xe8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xe0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x108(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xd8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x110(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xd0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x140(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xc8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x100(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xc0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xb8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xd0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xb0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xa8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xc8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xa0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x98(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x90(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x88(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x70(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x80(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xf8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x78(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x70(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xc0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x68(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xa0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x60(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xb8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x58(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xf0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x50(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x88(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x48(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xe8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x40(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x38(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xe0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x30(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x28(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x18(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x20(%RBP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xd8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x10(%RBP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDX,-0x68(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
TEST %RDI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 275da9 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x1f9>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 301880 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RBX,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 275dab <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x1fb>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV (%RCX),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xb0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RCX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
TEST %RDI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 275de2 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x232>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 301880 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV (%R15),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
TEST %RDI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 275df0 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x240>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 301880 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 275df3 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x243>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV (%R15),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
TEST %RDI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 275dd3 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x223>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %R15D,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV (%R12),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R14),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RDI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
CMOVG %RAX,%RDI	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
CALL 301880 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0x68(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xb0(%RBP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMPQ $0,(%RCX)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JLE 275e40 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x290>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMPQ $0,(%RBX)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOV -0x40(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JLE 275e60 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x2b0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CALL 303460 <hypre_GetThreadNum>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 303450 <hypre_NumActiveThreads>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x60(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RSI,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CQTO																				scal (12.5%)
IDIV %RCX	2	0	0	0	2	0	0	0	0	0	0	0	0	0	0	0	0	9-19	7-12	scal (12.5%)
LEA 0x1(%RBX),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
DEC %RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
IMUL %RAX,%RDX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
IMUL %RBX,%RAX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
CMP %RCX,%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
CMOVE %RSI,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,-0x118(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CMP %RDX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JGE 276b9f <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xfef>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0xd8(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV (%R13),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVDDUP -0x66b33(%RIP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
VXORPD %XMM1,%XMM1,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV (%RSI),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX,%RCX,8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %RAX,-0x118(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
ADD %RAX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x50(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xd8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0xe0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x1e8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0xa8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0xe8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xb8(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%RCX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x1e0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0xa0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xa0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0xc0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x1d8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x70(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x1d0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x78(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x1c8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x80(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x1c0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x98(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x1b8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0xc8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x1b0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x48(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x1a8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0xd0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x1a0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x38(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xd0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x30(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x198(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x58(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x138(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x88(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xf8(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x90(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xf0(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDI),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RCX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RSI),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x190(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA 0xc0(%R11),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV -0x100(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x188(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RSI,-0x128(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RCX,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
ADD $0xc0,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,-0x120(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,-0x68(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R11,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RBX,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JMP 276057 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x4a7>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV %R14,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 301970 <hypre_Free>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0x40(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CALL 301970 <hypre_Free>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %R15,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 301970 <hypre_Free>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %R12,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD $0x1c8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 301970 <hypre_Free>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼hypre_BoomerAMGBuildMultipass.omp_outlined.20–	1.80	0.95
○Loop 1157 - par_multi_interp.c:1760-1761 - exec	0.36	0.18
▼Loop 1131 - par_multi_interp.c:1774-1876 - exec–	0.13	0.07
○Loop 1153 - par_multi_interp.c:1799-1803 - exec	0.45	0.22
▼Loop 1149 - par_multi_interp.c:1811-1837 - exec–	0.42	0.21
○Loop 1151 - par_multi_interp.c:1816-1822 - exec	0.39	0.19
○Loop 1150 - par_multi_interp.c:1824-1830 - exec	0.00	0.00
○Loop 1155 - par_multi_interp.c:1782-1787 - exec	0.02	0.01
○Loop 1135 - par_multi_interp.c:1873-1874 - exec	0.01	0.01
○Loop 1137 - par_multi_interp.c:1874-1874 - exec	0.00	0.01
▼Loop 1140 - par_multi_interp.c:1840-1867 - exec–	0.00	0.01
○Loop 1141 - par_multi_interp.c:1851-1860 - exec	0.00	0.01
○Loop 1152 - par_multi_interp.c:1805-1809 - exec	0.00	0.00
○Loop 1154 - par_multi_interp.c:1792-1797 - exec	0.00	0.00
○Loop 1133 - par_multi_interp.c:1875-1876 - exec	0.00	0.00
▼Loop 1144 - par_multi_interp.c:1840-1867 - exec–	0.00	0.00
○Loop 1145 - par_multi_interp.c:1851-1860 - exec	0.00	0.00
○Loop 1134 - par_multi_interp.c:1876-1876 - exec	0.00	0.00
▼Loop 1138 - par_multi_interp.c:1840-1867 - exec–	0.00	0.00
○Loop 1139 - par_multi_interp.c:1851-1860 - exec	0.00	0.00
○Loop 1132 - par_multi_interp.c:1876-1876 - exec	0.00	0.00
▼Loop 1146 - par_multi_interp.c:1811-1873 - exec–	0.00	0.00
○Loop 1147 - par_multi_interp.c:1824-1830 - exec	0.00	0.00
○Loop 1148 - par_multi_interp.c:1816-1822 - exec	0.00	0.00
○Loop 1136 - par_multi_interp.c:1874-1874 - exec	0.00	0.00
▼Loop 1142 - par_multi_interp.c:1840-1867 - exec–	0.00	0.00
○Loop 1143 - par_multi_interp.c:1851-1860 - exec	0.00	0.00
○Loop 1156 - par_multi_interp.c:1762-1763 - exec	0.00	0.01

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

Workaround

CALL instructions

Details

Complex instructions

Details

Conversion instructions

Details

Workaround

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

Workaround

CALL instructions

Details

Complex instructions

Details

Conversion instructions

Details

Workaround

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code