OV - exec - Function hypre_BoomerAMGBuildMultipass.omp

	Function: hypre_BoomerAMGBuildMultipass.omp_outlined.18	Module: exec	Source: par_multi_interp.c:1575-1663 [...]	Coverage (incl. loops): 0.61% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 1575 - 1663

--------------------------------------------------------------------------------

1575: #pragma omp parallel private(thread_start,thread_stop,my_thread_num,num_threads,k,k1,i,i1,j,j1,sum_C,sum_N,j_start,j_end,cnt,tmp_marker,tmp_marker_offd,cnt_offd,diagonal,alfa)

[...]

1585:            if (n_fine)

1586:            {   tmp_marker = hypre_CTAlloc(HYPRE_Int,n_fine); }

1587:            tmp_marker_offd = NULL;

1588:            if (num_cols_offd)

1589:            {   tmp_marker_offd = hypre_CTAlloc(HYPRE_Int,num_cols_offd); }

1590:            for (i=0; i < n_fine; i++)

1591:            {   tmp_marker[i] = -1; }

1592:            for (i=0; i < num_cols_offd; i++)

1593:            {   tmp_marker_offd[i] = -1; }

1594:

1595:            /* Compute this thread's range of pass_length */

1596:            my_thread_num = hypre_GetThreadNum();

1597:            num_threads = hypre_NumActiveThreads();

1598:            thread_start = pass_pointer[1] + (pass_length/num_threads)*my_thread_num;

1599:            if (my_thread_num == num_threads-1)

[...]

1605:            for (i=thread_start; i < thread_stop; i++)

1606:            {

1607:              i1 = pass_array[i];

1608:              sum_C = 0;

1609:              sum_N = 0;

1610:              j_start = P_diag_start[i1];

1611:              j_end = j_start+P_diag_i[i1+1]-P_diag_i[i1];

1612:              for (j=j_start; j < j_end; j++)

1613:              {

1614:                 k1 = P_diag_pass[1][j];

1615:                 tmp_marker[C_array[k1]] = i1;

1616:              }

1617:              cnt = P_diag_i[i1];

1618:              for (j=A_diag_i[i1]+1; j < A_diag_i[i1+1]; j++)

1619:              {

1620:                 j1 = A_diag_j[j];

1621:                 if (CF_marker[j1] != -3 &&

1622:                    (num_functions == 1 || dof_func[i1] == dof_func[j1]))

1623:                    sum_N += A_diag_data[j];

1624:                 if (j1 != -1 && tmp_marker[j1] == i1)

1625:                 {

1626:                    P_diag_data[cnt] = A_diag_data[j];

1627:                    P_diag_j[cnt++] = fine_to_coarse[j1];

1628:                    sum_C += A_diag_data[j];

1629:                 }

1630:              }

1631:              j_start = P_offd_start[i1];

1632:              j_end = j_start+P_offd_i[i1+1]-P_offd_i[i1];

1633:              for (j=j_start; j < j_end; j++)

1634:              {

1635:                 k1 = P_offd_pass[1][j];

1636:                 tmp_marker_offd[C_array_offd[k1]] = i1;

1637:              }

1638:              cnt_offd = P_offd_i[i1];

1639:              for (j=A_offd_i[i1]; j < A_offd_i[i1+1]; j++)

1640:              {

1641:                 if (col_offd_S_to_A)

1642:                     j1 = map_A_to_S[A_offd_j[j]];

1643:                 else

1644:                     j1 = A_offd_j[j];

1645:                 if (CF_marker_offd[j1] != -3 &&

1646:                   (num_functions == 1 || dof_func[i1] == dof_func_offd[j1]))

1647:                     sum_N += A_offd_data[j];

1648:                 if (j1 != -1 && tmp_marker_offd[j1] == i1)

1649:                 {

1650:                    P_offd_data[cnt_offd] = A_offd_data[j];

1651:                    P_offd_j[cnt_offd++] = map_S_to_new[j1];

1652:                    sum_C += A_offd_data[j];

1653:                 }

1654:              }

1655:              diagonal = A_diag_data[A_diag_i[i1]];

1656:              if (sum_C*diagonal) alfa = -sum_N/(sum_C*diagonal);

1657:              for (j=P_diag_i[i1]; j < cnt; j++)

1658:                 P_diag_data[j] *= alfa;

1659:              for (j=P_offd_i[i1]; j < cnt_offd; j++)

1660:                 P_offd_data[j] *= alfa;

1661:           }

1662:           hypre_TFree(tmp_marker);

1663:           hypre_TFree(tmp_marker_offd);

0x275290 PUSH	%RBP

0x275291 MOV	%RSP,%RBP

0x275294 PUSH	%R15

0x275296 PUSH	%R14

0x275298 PUSH	%R13

0x27529a PUSH	%R12

0x27529c PUSH	%RBX

0x27529d SUB	$0x138,%RSP

0x2752a4 MOV	%R9,-0xb0(%RBP)

0x2752ab MOV	%R8,-0xa8(%RBP)

0x2752b2 MOV	(%RDX),%RDI

0x2752b5 MOV	%RCX,%R13

0x2752b8 MOV	%RDX,%R15

0x2752bb MOV	0xe8(%RBP),%RAX

0x2752c2 MOV	%RAX,-0x150(%RBP)

0x2752c9 MOV	0xe0(%RBP),%RAX

0x2752d0 MOV	%RAX,-0x148(%RBP)

0x2752d7 MOV	0xd8(%RBP),%RAX

0x2752de MOV	%RAX,-0xc8(%RBP)

0x2752e5 MOV	0xd0(%RBP),%RAX

0x2752ec MOV	%RAX,-0x140(%RBP)

0x2752f3 MOV	0xc8(%RBP),%RAX

0x2752fa MOV	%RAX,-0x138(%RBP)

0x275301 MOV	0xc0(%RBP),%RAX

0x275308 MOV	%RAX,-0x78(%RBP)

0x27530c MOV	0xb8(%RBP),%RAX

0x275313 MOV	%RAX,-0x130(%RBP)

0x27531a MOV	0xb0(%RBP),%RAX

0x275321 MOV	%RAX,-0xf0(%RBP)

0x275328 MOV	0xa8(%RBP),%RAX

0x27532f MOV	%RAX,-0x30(%RBP)

0x275333 MOV	0xa0(%RBP),%RAX

0x27533a MOV	%RAX,-0x40(%RBP)

0x27533e MOV	0x98(%RBP),%RAX

0x275345 MOV	%RAX,-0x70(%RBP)

0x275349 MOV	0x90(%RBP),%RAX

0x275350 MOV	%RAX,-0x68(%RBP)

0x275354 MOV	0x88(%RBP),%RAX

0x27535b MOV	%RAX,-0x60(%RBP)

0x27535f MOV	0x80(%RBP),%RAX

0x275366 MOV	%RAX,-0x58(%RBP)

0x27536a MOV	0x78(%RBP),%RAX

0x27536e MOV	%RAX,-0x128(%RBP)

0x275375 MOV	0x70(%RBP),%RAX

0x275379 MOV	%RAX,-0x120(%RBP)

0x275380 MOV	0x68(%RBP),%RAX

0x275384 MOV	%RAX,-0xc0(%RBP)

0x27538b MOV	0x60(%RBP),%RAX

0x27538f MOV	%RAX,-0xb8(%RBP)

0x275396 MOV	0x58(%RBP),%RAX

0x27539a MOV	%RAX,-0xd0(%RBP)

0x2753a1 MOV	0x50(%RBP),%RAX

0x2753a5 MOV	%RAX,-0x48(%RBP)

0x2753a9 MOV	0x48(%RBP),%RAX

0x2753ad MOV	%RAX,-0x38(%RBP)

0x2753b1 MOV	0x40(%RBP),%RAX

0x2753b5 MOV	%RAX,-0xa0(%RBP)

0x2753bc MOV	0x38(%RBP),%RAX

0x2753c0 MOV	%RAX,-0x50(%RBP)

0x2753c4 MOV	0x30(%RBP),%RAX

0x2753c8 MOV	%RAX,-0x90(%RBP)

0x2753cf MOV	0x28(%RBP),%RAX

0x2753d3 MOV	%RAX,-0x88(%RBP)

0x2753da MOV	0x20(%RBP),%RAX

0x2753de MOV	%RAX,-0x80(%RBP)

0x2753e2 MOV	0x18(%RBP),%RAX

0x2753e6 MOV	%RAX,-0x98(%RBP)

0x2753ed MOV	0x10(%RBP),%R12

0x2753f1 TEST	%RDI,%RDI

0x2753f4 JE	275421

0x2753f6 MOV	$0x8,%ESI

0x2753fb CALL	301880 <hypre_CAlloc>

0x275400 MOV	%RAX,%RBX

0x275403 MOV	(%R13),%RDI

0x275407 TEST	%RDI,%RDI

0x27540a JE	27542c

0x27540c MOV	$0x8,%ESI

0x275411 CALL	301880 <hypre_CAlloc>

0x275416 MOV	%RAX,%R14

0x275419 CMPQ	$0,(%R15)

0x27541d JG	275435

0x27541f JMP	275450

0x275421 XOR	%EBX,%EBX

0x275423 MOV	(%R13),%RDI

0x275427 TEST	%RDI,%RDI

0x27542a JNE	27540c

0x27542c XOR	%R14D,%R14D

0x27542f CMPQ	$0,(%R15)

0x275433 JLE	275450

0x275435 XOR	%EAX,%EAX

0x275437 NOPW	(%RAX,%RAX,1)

(1117) 0x275440 MOVQ	$-0x1,(%RBX,%RAX,8)

(1117) 0x275448 INC	%RAX

(1117) 0x27544b CMP	%RAX,(%R15)

(1117) 0x27544e JG	275440

0x275450 CMPQ	$0,(%R13)

0x275455 JLE	275471

0x275457 XOR	%EAX,%EAX

0x275459 NOPL	(%RAX)

(1130) 0x275460 MOVQ	$-0x1,(%R14,%RAX,8)

(1130) 0x275468 INC	%RAX

(1130) 0x27546b CMP	%RAX,(%R13)

(1130) 0x27546f JG	275460

0x275471 CALL	303460 <hypre_GetThreadNum>

0x275476 MOV	%RAX,%R15

0x275479 CALL	303450 <hypre_NumActiveThreads>

0x27547e MOV	-0xb0(%RBP),%RDX

0x275485 MOV	%RAX,%RCX

0x275488 MOV	(%RDX),%RSI

0x27548b MOV	%RSI,%RAX

0x27548e CQTO

0x275490 IDIV	%RCX

0x275493 LEA	0x1(%R15),%RDX

0x275497 DEC	%RCX

0x27549a IMUL	%RAX,%RDX

0x27549e MOV	%RAX,%R11

0x2754a1 IMUL	%R15,%R11

0x2754a5 CMP	%RCX,%R15

0x2754a8 CMOVE	%RSI,%RDX

0x2754ac MOV	%RDX,-0xd8(%RBP)

0x2754b3 CMP	%RDX,%R11

0x2754b6 JGE	275b87

0x2754bc MOV	-0xa8(%RBP),%RAX

0x2754c3 VMOVDDUP	-0x66143(%RIP),%XMM0

0x2754cb VXORPD	%XMM1,%XMM1,%XMM1

0x2754cf MOV	(%RAX),%RCX

0x2754d2 MOV	(%R12),%RAX

0x2754d6 MOV	0x8(%RCX),%RCX

0x2754da ADD	%RCX,-0xd8(%RBP)

0x2754e1 MOV	%RAX,-0x160(%RBP)

0x2754e8 ADD	%RCX,%R11

0x2754eb MOV	-0x98(%RBP),%RAX

0x2754f2 MOV	(%RAX),%RAX

0x2754f5 MOV	%RAX,-0x98(%RBP)

0x2754fc MOV	-0x80(%RBP),%RAX

0x275500 MOV	-0x88(%RBP),%RCX

0x275507 MOV	(%RAX),%RDX

0x27550a MOV	(%RCX),%RAX

0x27550d MOV	%RAX,-0x118(%RBP)

0x275514 MOV	-0x90(%RBP),%RAX

0x27551b MOV	(%RAX),%RAX

0x27551e MOV	%RAX,-0x110(%RBP)

0x275525 MOV	-0x50(%RBP),%RAX

0x275529 MOV	(%RAX),%RAX

0x27552c MOV	%RAX,-0x50(%RBP)

0x275530 MOV	-0xa0(%RBP),%RAX

0x275537 MOV	(%RAX),%RAX

0x27553a MOV	%RAX,-0xb0(%RBP)

0x275541 MOV	-0x38(%RBP),%RAX

0x275545 MOV	(%RAX),%RAX

0x275548 MOV	%RAX,-0xa8(%RBP)

0x27554f MOV	-0x58(%RBP),%RAX

0x275553 MOV	(%RAX),%RAX

0x275556 MOV	%RAX,-0x88(%RBP)

0x27555d MOV	-0x60(%RBP),%RAX

0x275561 MOV	(%RAX),%RAX

0x275564 MOV	%RAX,-0x38(%RBP)

0x275568 MOV	-0x68(%RBP),%RAX

0x27556c MOV	(%RAX),%RAX

0x27556f MOV	%RAX,-0x108(%RBP)

0x275576 MOV	-0x70(%RBP),%RAX

0x27557a MOV	(%RAX),%RAX

0x27557d MOV	%RAX,-0x100(%RBP)

0x275584 MOV	-0x40(%RBP),%RAX

0x275588 MOV	(%RAX),%RAX

0x27558b MOV	%RAX,-0x40(%RBP)

0x27558f MOV	-0x30(%RBP),%RAX

0x275593 MOV	(%RAX),%RAX

0x275596 MOV	%RAX,-0xf8(%RBP)

0x27559d MOV	-0x78(%RBP),%RAX

0x2755a1 MOV	(%RAX),%RAX

0x2755a4 MOV	%RAX,-0x78(%RBP)

0x2755a8 MOV	-0xb8(%RBP),%RAX

0x2755af MOV	(%RAX),%RAX

0x2755b2 MOV	%RAX,-0x80(%RBP)

0x2755b6 MOV	-0xc0(%RBP),%RAX

0x2755bd MOV	(%RAX),%RAX

0x2755c0 MOV	%RAX,-0x158(%RBP)

0x2755c7 ADD	$0xc0,%RAX

0x2755cd MOV	-0xc8(%RBP),%RCX

0x2755d4 MOV	%RAX,-0xe8(%RBP)

0x2755db MOV	(%RCX),%RDI

0x2755de LEA	0xc0(%RDI),%RAX

0x2755e5 MOV	%RAX,-0xe0(%RBP)

0x2755ec MOV	%RDX,-0x90(%RBP)

0x2755f3 JMP	275617

0x2755f5 NOPW	%CS:(%RAX,%RAX,1)

(1118) 0x275600 MOV	-0xa0(%RBP),%R11

(1118) 0x275607 INC	%R11

(1118) 0x27560a CMP	%R11,-0xd8(%RBP)

(1118) 0x275611 JLE	275b87

(1118) 0x275617 MOV	-0x160(%RBP),%RCX

(1118) 0x27561e MOV	(%RCX,%R11,8),%R8

(1118) 0x275622 MOV	-0x98(%RBP),%RCX

(1118) 0x275629 MOV	%R11,-0xa0(%RBP)

(1118) 0x275630 MOV	(%RCX,%R8,8),%RCX

(1118) 0x275634 MOV	0x8(%RDX,%R8,8),%RSI

(1118) 0x275639 MOV	(%RDX,%R8,8),%R9

(1118) 0x27563d LEA	(%RSI,%RCX,1),%R10

(1118) 0x275641 SUB	%R9,%R10

(1118) 0x275644 CMP	%R10,%RCX

(1118) 0x275647 JGE	275688

(1118) 0x275649 SUB	%R9,%RSI

(1118) 0x27564c MOV	-0x118(%RBP),%R9

(1118) 0x275653 SAL	$0x3,%RCX

(1118) 0x275657 MOV	-0x110(%RBP),%R11

(1118) 0x27565e ADD	0x8(%R9),%RCX

(1118) 0x275662 XOR	%R9D,%R9D

(1118) 0x275665 NOPW	%CS:(%RAX,%RAX,1)

  (1129) 0x275670 MOV	(%RCX,%R9,8),%R10

  (1129) 0x275674 INC	%R9

  (1129) 0x275677 MOV	(%R11,%R10,8),%R10

  (1129) 0x27567b MOV	%R8,(%RBX,%R10,8)

  (1129) 0x27567f CMP	%R9,%RSI

  (1129) 0x275682 JNE	275670

(1118) 0x275684 MOV	(%RDX,%R8,8),%R9

(1118) 0x275688 MOV	-0x50(%RBP),%RDX

(1118) 0x27568c VXORPD	%XMM4,%XMM4,%XMM4

(1118) 0x275690 MOV	(%RDX,%R8,8),%RCX

(1118) 0x275694 MOV	0x8(%RDX,%R8,8),%R11

(1118) 0x275699 INC	%RCX

(1118) 0x27569c CMP	%R11,%RCX

(1118) 0x27569f JGE	275760

(1118) 0x2756a5 MOV	-0xd0(%RBP),%RDX

(1118) 0x2756ac MOV	-0x128(%RBP),%R15

(1118) 0x2756b3 MOV	-0xb8(%RBP),%R10

(1118) 0x2756ba MOV	-0xc0(%RBP),%RAX

(1118) 0x2756c1 VXORPD	%XMM3,%XMM3,%XMM3

(1118) 0x2756c5 MOV	(%RDX),%RSI

(1118) 0x2756c8 MOV	(%R15),%RDX

(1118) 0x2756cb MOV	(%R10),%R10

(1118) 0x2756ce MOV	(%RAX),%RAX

(1118) 0x2756d1 MOV	%RDX,-0x30(%RBP)

(1118) 0x2756d5 MOV	-0x120(%RBP),%RDX

(1118) 0x2756dc MOV	(%RDX),%R13

(1118) 0x2756df MOV	-0x48(%RBP),%RDX

(1118) 0x2756e3 JMP	2756f8

0x2756e5 NOPW	%CS:(%RAX,%RAX,1)

  (1128) 0x2756f0 INC	%RCX

  (1128) 0x2756f3 CMP	%R11,%RCX

  (1128) 0x2756f6 JGE	275764

  (1128) 0x2756f8 MOV	-0xb0(%RBP),%R15

  (1128) 0x2756ff MOV	-0xa8(%RBP),%R12

  (1128) 0x275706 MOV	(%R15,%RCX,8),%R15

  (1128) 0x27570a CMPQ	$-0x3,(%R12,%R15,8)

  (1128) 0x27570f JE	275727

  (1128) 0x275711 CMPQ	$0x1,(%RDX)

  (1128) 0x275715 JE	275721

  (1128) 0x275717 MOV	(%RSI,%R8,8),%R12

  (1128) 0x27571b CMP	%R12,(%RSI,%R15,8)

  (1128) 0x27571f JNE	275727

  (1128) 0x275721 VADDSD	(%R10,%RCX,8),%XMM3,%XMM3

  (1128) 0x275727 CMP	$-0x1,%R15

  (1128) 0x27572b JE	2756f0

  (1128) 0x27572d CMP	%R8,(%RBX,%R15,8)

  (1128) 0x275731 JNE	2756f0

  (1128) 0x275733 VMOVSD	(%R10,%RCX,8),%XMM5

  (1128) 0x275739 MOV	-0x30(%RBP),%R11

  (1128) 0x27573d VMOVSD	%XMM5,(%RAX,%R9,8)

  (1128) 0x275743 MOV	(%R11,%R15,8),%R11

  (1128) 0x275747 MOV	%R11,(%R13,%R9,8)

  (1128) 0x27574c MOV	-0x50(%RBP),%R11

  (1128) 0x275750 INC	%R9

  (1128) 0x275753 VADDSD	(%R10,%RCX,8),%XMM4,%XMM4

  (1128) 0x275759 MOV	0x8(%R11,%R8,8),%R11

  (1128) 0x27575e JMP	2756f0

(1118) 0x275760 VXORPD	%XMM3,%XMM3,%XMM3

(1118) 0x275764 MOV	-0x88(%RBP),%RCX

(1118) 0x27576b MOV	-0x38(%RBP),%RDX

(1118) 0x27576f MOV	(%RCX,%R8,8),%RCX

(1118) 0x275773 MOV	0x8(%RDX,%R8,8),%RSI

(1118) 0x275778 MOV	(%RDX,%R8,8),%R11

(1118) 0x27577c LEA	(%RSI,%RCX,1),%R10

(1118) 0x275780 SUB	%R11,%R10

(1118) 0x275783 CMP	%R10,%RCX

(1118) 0x275786 JGE	2757cc

(1118) 0x275788 MOV	-0x108(%RBP),%RDX

(1118) 0x27578f SAL	$0x3,%RCX

(1118) 0x275793 SUB	%R11,%RSI

(1118) 0x275796 XOR	%R10D,%R10D

(1118) 0x275799 ADD	0x8(%RDX),%RCX

(1118) 0x27579d MOV	-0x100(%RBP),%RDX

(1118) 0x2757a4 NOPW	%CS:(%RAX,%RAX,1)

  (1127) 0x2757b0 MOV	(%RCX,%R10,8),%R11

  (1127) 0x2757b4 INC	%R10

  (1127) 0x2757b7 MOV	(%RDX,%R11,8),%R11

  (1127) 0x2757bb MOV	%R8,(%R14,%R11,8)

  (1127) 0x2757bf CMP	%R10,%RSI

  (1127) 0x2757c2 JNE	2757b0

(1118) 0x2757c4 MOV	-0x38(%RBP),%RCX

(1118) 0x2757c8 MOV	(%RCX,%R8,8),%R11

(1118) 0x2757cc MOV	-0x40(%RBP),%RCX

(1118) 0x2757d0 MOV	(%RCX,%R8,8),%R15

(1118) 0x2757d4 MOV	0x8(%RCX,%R8,8),%R10

(1118) 0x2757d9 CMP	%R10,%R15

(1118) 0x2757dc JGE	275970

(1118) 0x2757e2 MOV	-0xd0(%RBP),%RDX

(1118) 0x2757e9 MOV	-0x130(%RBP),%RCX

(1118) 0x2757f0 MOV	(%RDX),%RAX

(1118) 0x2757f3 MOV	(%RCX),%RCX

(1118) 0x2757f6 MOV	%RAX,-0x60(%RBP)

(1118) 0x2757fa MOV	-0x138(%RBP),%RDX

(1118) 0x275801 MOV	(%RDX),%RAX

(1118) 0x275804 MOV	%RAX,-0x58(%RBP)

(1118) 0x275808 MOV	-0xc8(%RBP),%RAX

(1118) 0x27580f MOV	-0x140(%RBP),%RDX

(1118) 0x275816 MOV	(%RAX),%RAX

(1118) 0x275819 MOV	(%RDX),%RSI

(1118) 0x27581c MOV	%RAX,-0x30(%RBP)

(1118) 0x275820 MOV	-0x150(%RBP),%RDX

(1118) 0x275827 MOV	(%RDX),%RAX

(1118) 0x27582a MOV	%RAX,-0x70(%RBP)

(1118) 0x27582e MOV	-0x148(%RBP),%RDX

(1118) 0x275835 MOV	(%RDX),%RAX

(1118) 0x275838 MOV	%RAX,-0x68(%RBP)

(1118) 0x27583c CMPQ	$0,-0xf8(%RBP)

(1118) 0x275844 JE	2758e9

(1118) 0x27584a MOV	-0xf0(%RBP),%RDX

(1118) 0x275851 MOV	(%RDX),%R13

(1118) 0x275854 MOV	-0x48(%RBP),%RDX

(1118) 0x275858 JMP	27586c

0x27585a NOPW	(%RAX,%RAX,1)

  (1126) 0x275860 INC	%R15

  (1126) 0x275863 CMP	%R10,%R15

  (1126) 0x275866 JGE	275970

  (1126) 0x27586c MOV	(%RCX,%R15,8),%R12

  (1126) 0x275870 MOV	-0x78(%RBP),%RAX

  (1126) 0x275874 MOV	(%R13,%R12,8),%R12

  (1126) 0x275879 CMPQ	$-0x3,(%RAX,%R12,8)

  (1126) 0x27587e JE	2758a2

  (1126) 0x275880 CMPQ	$0x1,(%RDX)

  (1126) 0x275884 JE	27589c

  (1126) 0x275886 MOV	-0x60(%RBP),%RAX

  (1126) 0x27588a MOV	(%RAX,%R8,8),%RDX

  (1126) 0x27588e MOV	-0x58(%RBP),%RAX

  (1126) 0x275892 CMP	(%RAX,%R12,8),%RDX

  (1126) 0x275896 MOV	-0x48(%RBP),%RDX

  (1126) 0x27589a JNE	2758a2

  (1126) 0x27589c VADDSD	(%RSI,%R15,8),%XMM3,%XMM3

  (1126) 0x2758a2 CMP	$-0x1,%R12

  (1126) 0x2758a6 JE	275860

  (1126) 0x2758a8 CMP	%R8,(%R14,%R12,8)

  (1126) 0x2758ac JNE	275860

  (1126) 0x2758ae VMOVSD	(%RSI,%R15,8),%XMM5

  (1126) 0x2758b4 MOV	-0x30(%RBP),%RAX

  (1126) 0x2758b8 MOV	-0x70(%RBP),%RDX

  (1126) 0x2758bc MOV	-0x68(%RBP),%R10

  (1126) 0x2758c0 VMOVSD	%XMM5,(%RAX,%R11,8)

  (1126) 0x2758c6 MOV	(%RDX,%R12,8),%RDX

  (1126) 0x2758ca MOV	%RDX,(%R10,%R11,8)

  (1126) 0x2758ce MOV	-0x40(%RBP),%R10

  (1126) 0x2758d2 MOV	-0x48(%RBP),%RDX

  (1126) 0x2758d6 INC	%R11

  (1126) 0x2758d9 VADDSD	(%RSI,%R15,8),%XMM4,%XMM4

  (1126) 0x2758df MOV	0x8(%R10,%R8,8),%R10

  (1126) 0x2758e4 JMP	275860

(1118) 0x2758e9 MOV	-0x48(%RBP),%RDX

(1118) 0x2758ed JMP	2758f8

0x2758ef NOP

  (1125) 0x2758f0 INC	%R15

  (1125) 0x2758f3 CMP	%R10,%R15

  (1125) 0x2758f6 JGE	275970

  (1125) 0x2758f8 MOV	(%RCX,%R15,8),%R13

  (1125) 0x2758fc MOV	-0x78(%RBP),%R12

  (1125) 0x275900 CMPQ	$-0x3,(%R12,%R13,8)

  (1125) 0x275905 JE	275925

  (1125) 0x275907 CMPQ	$0x1,(%RDX)

  (1125) 0x27590b JE	27591f

  (1125) 0x27590d MOV	-0x60(%RBP),%RAX

  (1125) 0x275911 MOV	(%RAX,%R8,8),%R12

  (1125) 0x275915 MOV	-0x58(%RBP),%RAX

  (1125) 0x275919 CMP	%R12,(%RAX,%R13,8)

  (1125) 0x27591d JNE	275925

  (1125) 0x27591f VADDSD	(%RSI,%R15,8),%XMM3,%XMM3

  (1125) 0x275925 CMP	$-0x1,%R13

  (1125) 0x275929 JE	2758f0

  (1125) 0x27592b CMP	%R8,(%R14,%R13,8)

  (1125) 0x27592f JNE	2758f0

  (1125) 0x275931 VMOVSD	(%RSI,%R15,8),%XMM5

  (1125) 0x275937 MOV	-0x30(%RBP),%RAX

  (1125) 0x27593b MOV	-0x70(%RBP),%R10

  (1125) 0x27593f MOV	-0x68(%RBP),%R12

  (1125) 0x275943 VMOVSD	%XMM5,(%RAX,%R11,8)

  (1125) 0x275949 MOV	(%R10,%R13,8),%R10

  (1125) 0x27594d MOV	%R10,(%R12,%R11,8)

  (1125) 0x275951 MOV	-0x40(%RBP),%R10

  (1125) 0x275955 INC	%R11

  (1125) 0x275958 VADDSD	(%RSI,%R15,8),%XMM4,%XMM4

  (1125) 0x27595e MOV	0x8(%R10,%R8,8),%R10

  (1125) 0x275963 JMP	2758f0

0x275965 NOPW	%CS:(%RAX,%RAX,1)

(1118) 0x275970 MOV	-0x50(%RBP),%RCX

(1118) 0x275974 MOV	-0x80(%RBP),%RAX

(1118) 0x275978 MOV	(%RCX,%R8,8),%RCX

(1118) 0x27597c VMULSD	(%RAX,%RCX,8),%XMM4,%XMM4

(1118) 0x275981 VUCOMISD	%XMM1,%XMM4

(1118) 0x275985 JE	27598f

(1118) 0x275987 VXORPD	%XMM0,%XMM3,%XMM2

(1118) 0x27598b VDIVSD	%XMM4,%XMM2,%XMM2

(1118) 0x27598f MOV	-0x90(%RBP),%RDX

(1118) 0x275996 MOV	-0x158(%RBP),%RAX

(1118) 0x27599d MOV	%R9,%RSI

(1118) 0x2759a0 MOV	(%RDX,%R8,8),%RCX

(1118) 0x2759a4 SUB	%RCX,%RSI

(1118) 0x2759a7 JLE	275a82

(1118) 0x2759ad CMP	$0x4,%RSI

(1118) 0x2759b1 JB	275a70

(1118) 0x2759b7 CMP	$0x20,%RSI

(1118) 0x2759bb JAE	2759c2

(1118) 0x2759bd XOR	%R10D,%R10D

(1118) 0x2759c0 JMP	275a32

(1118) 0x2759c2 MOV	-0xe8(%RBP),%R15

(1118) 0x2759c9 VBROADCASTSD	%XMM2,%ZMM3

(1118) 0x2759cf MOV	%RSI,%R10

(1118) 0x2759d2 AND	$-0x20,%R10

(1118) 0x2759d6 XOR	%R12D,%R12D

(1118) 0x2759d9 LEA	(%R15,%RCX,8),%R15

(1118) 0x2759dd NOPL	(%RAX)

  (1123) 0x2759e0 VMULPD	-0xc0(%R15,%R12,8),%ZMM3,%ZMM4

  (1123) 0x2759e8 VMULPD	-0x80(%R15,%R12,8),%ZMM3,%ZMM5

  (1123) 0x2759f0 VMULPD	-0x40(%R15,%R12,8),%ZMM3,%ZMM6

  (1123) 0x2759f8 VMULPD	(%R15,%R12,8),%ZMM3,%ZMM7

  (1123) 0x2759ff VMOVUPD	%ZMM4,-0xc0(%R15,%R12,8)

  (1123) 0x275a07 VMOVUPD	%ZMM5,-0x80(%R15,%R12,8)

  (1123) 0x275a0f VMOVUPD	%ZMM6,-0x40(%R15,%R12,8)

  (1123) 0x275a17 VMOVUPD	%ZMM7,(%R15,%R12,8)

  (1123) 0x275a1e ADD	$0x20,%R12

  (1123) 0x275a22 CMP	%R12,%R10

  (1123) 0x275a25 JNE	2759e0

(1118) 0x275a27 CMP	%R10,%RSI

(1118) 0x275a2a JE	275a82

(1118) 0x275a2c TEST	$0x1c,%SIL

(1118) 0x275a30 JE	275a6c

(1118) 0x275a32 MOV	%RSI,%R15

(1118) 0x275a35 AND	$-0x4,%R15

(1118) 0x275a39 LEA	(%RAX,%RCX,8),%R12

(1118) 0x275a3d VBROADCASTSD	%XMM2,%YMM3

(1118) 0x275a42 ADD	%R15,%RCX

(1118) 0x275a45 NOPW	%CS:(%RAX,%RAX,1)

  (1124) 0x275a50 VMULPD	(%R12,%R10,8),%YMM3,%YMM4

  (1124) 0x275a56 VMOVUPD	%YMM4,(%R12,%R10,8)

  (1124) 0x275a5c ADD	$0x4,%R10

  (1124) 0x275a60 CMP	%R10,%R15

  (1124) 0x275a63 JNE	275a50

(1118) 0x275a65 CMP	%R15,%RSI

(1118) 0x275a68 JNE	275a70

(1118) 0x275a6a JMP	275a82

(1118) 0x275a6c ADD	%R10,%RCX

(1118) 0x275a6f NOP

  (1122) 0x275a70 VMULSD	(%RAX,%RCX,8),%XMM2,%XMM3

  (1122) 0x275a75 VMOVSD	%XMM3,(%RAX,%RCX,8)

  (1122) 0x275a7a INC	%RCX

  (1122) 0x275a7d CMP	%RCX,%R9

  (1122) 0x275a80 JNE	275a70

(1118) 0x275a82 MOV	-0x38(%RBP),%RCX

(1118) 0x275a86 MOV	%R11,%RSI

(1118) 0x275a89 MOV	(%RCX,%R8,8),%RCX

(1118) 0x275a8d SUB	%RCX,%RSI

(1118) 0x275a90 JLE	275600

(1118) 0x275a96 CMP	$0x4,%RSI

(1118) 0x275a9a JB	275b70

(1118) 0x275aa0 CMP	$0x20,%RSI

(1118) 0x275aa4 JAE	275aab

(1118) 0x275aa6 XOR	%R8D,%R8D

(1118) 0x275aa9 JMP	275b26

(1118) 0x275aab MOV	-0xe0(%RBP),%RAX

(1118) 0x275ab2 VBROADCASTSD	%XMM2,%ZMM3

(1118) 0x275ab8 MOV	%RSI,%R8

(1118) 0x275abb AND	$-0x20,%R8

(1118) 0x275abf XOR	%R10D,%R10D

(1118) 0x275ac2 LEA	(%RAX,%RCX,8),%R9

(1118) 0x275ac6 NOPW	%CS:(%RAX,%RAX,1)

  (1120) 0x275ad0 VMULPD	-0xc0(%R9,%R10,8),%ZMM3,%ZMM4

  (1120) 0x275ad8 VMULPD	-0x80(%R9,%R10,8),%ZMM3,%ZMM5

  (1120) 0x275ae0 VMULPD	-0x40(%R9,%R10,8),%ZMM3,%ZMM6

  (1120) 0x275ae8 VMULPD	(%R9,%R10,8),%ZMM3,%ZMM7

  (1120) 0x275aef VMOVUPD	%ZMM4,-0xc0(%R9,%R10,8)

  (1120) 0x275af7 VMOVUPD	%ZMM5,-0x80(%R9,%R10,8)

  (1120) 0x275aff VMOVUPD	%ZMM6,-0x40(%R9,%R10,8)

  (1120) 0x275b07 VMOVUPD	%ZMM7,(%R9,%R10,8)

  (1120) 0x275b0e ADD	$0x20,%R10

  (1120) 0x275b12 CMP	%R10,%R8

  (1120) 0x275b15 JNE	275ad0

(1118) 0x275b17 CMP	%R8,%RSI

(1118) 0x275b1a JE	275600

(1118) 0x275b20 TEST	$0x1c,%SIL

(1118) 0x275b24 JE	275b5f

(1118) 0x275b26 MOV	%RSI,%R9

(1118) 0x275b29 AND	$-0x4,%R9

(1118) 0x275b2d LEA	(%RDI,%RCX,8),%R10

(1118) 0x275b31 VBROADCASTSD	%XMM2,%YMM3

(1118) 0x275b36 ADD	%R9,%RCX

(1118) 0x275b39 NOPL	(%RAX)

  (1121) 0x275b40 VMULPD	(%R10,%R8,8),%YMM3,%YMM4

  (1121) 0x275b46 VMOVUPD	%YMM4,(%R10,%R8,8)

  (1121) 0x275b4c ADD	$0x4,%R8

  (1121) 0x275b50 CMP	%R8,%R9

  (1121) 0x275b53 JNE	275b40

(1118) 0x275b55 CMP	%R9,%RSI

(1118) 0x275b58 JNE	275b70

(1118) 0x275b5a JMP	275600

(1118) 0x275b5f ADD	%R8,%RCX

(1118) 0x275b62 NOPW	%CS:(%RAX,%RAX,1)

  (1119) 0x275b70 VMULSD	(%RDI,%RCX,8),%XMM2,%XMM3

  (1119) 0x275b75 VMOVSD	%XMM3,(%RDI,%RCX,8)

  (1119) 0x275b7a INC	%RCX

  (1119) 0x275b7d CMP	%RCX,%R11

  (1119) 0x275b80 JNE	275b70

(1118) 0x275b82 JMP	275600

0x275b87 MOV	%RBX,%RDI

0x275b8a VZEROUPPER

0x275b8d CALL	301970 <hypre_Free>

0x275b92 MOV	%R14,%RDI

0x275b95 ADD	$0x138,%RSP

0x275b9c POP	%RBX

0x275b9d POP	%R12

0x275b9f POP	%R13

0x275ba1 POP	%R14

0x275ba3 POP	%R15

0x275ba5 POP	%RBP

0x275ba6 JMP	301970

0x275bab NOPL	(%RAX,%RAX,1)

Coverage (%)	Name	Source Location	Module
►97.05+	__kmp_invoke_microtask		libomp.so
○	__kmp_invoke_task_func		libomp.so
○	__kmp_launch_thread		libomp.so
○	__kmp_launch_worker(void*)		libomp.so
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►2.95+	__kmp_invoke_microtask		libomp.so
○	__kmp_invoke_task_func		libomp.so
○	__kmp_fork_call		libomp.so
○	__kmpc_fork_call		libomp.so
○	hypre_BoomerAMGBuildMultipass	par_multi_interp.c:1575	exec
○	hypre_BoomerAMGSetup	par_amg_setup.c:737	exec
○	hypre_PCGSetup	pcg.c:234	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run aocc_2

Source file and lines	par_multi_interp.c:1575-1663
Module	exec

The function is defined in /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1575,1585-1599,1605-1663.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 32.50 to 2.33 cycles (13.93x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is probably not vectorized. Only 12% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 32.50 to 2.89 cycles (11.24x speedup).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Performance is limited by:

reading data from caches/RAM (load units are a bottleneck)
writing data to caches/RAM (the store unit is a bottleneck)

By removing all these bottlenecks, you can lower the cost of an iteration from 32.50 to 24.13 cycles (1.35x speedup).

Workaround

Read less array elements
Write less array elements
Provide more information to your compiler:
- use the 'restrict' C99 keyword

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

hypre_CAlloc: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1586
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1589
hypre_Free: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1662
hypre_GetThreadNum: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1596
hypre_NumActiveThreads: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1597

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

IDIV: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1598

Conversion instructions

Detected expensive conversion instructions.

Details

CQTO: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1598

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 608 bytes. The binary function is storing 400 bytes.

General properties

nb instructions	196
nb uops	193
loop length	917
used x86 registers	15
used mmx registers	0
used xmm registers	2
used ymm registers	0
used zmm registers	0
nb stack references	67

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	24.13 cycles
front end	24.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	6.33	6.33	6.33	6.33	6.33	6.33	32.50	32.50	32.50	32.50	0.25	0.25	0.25	0.25	0.00	0.00
cycles	6.33	6.33	6.33	6.33	6.33	6.33	32.50	32.50	32.50	32.50	0.25	0.25	0.25	0.25	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

7.00-12.00

Cycles summary

Front-end	24.13
Dispatch	32.50
DIV/SQRT	7.00-12.00
Overall L1	32.50

Vectorization ratios

INT

all	1%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	5%

all	50%
load	0%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	100%

INT+FP

all	2%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	11%

Vector efficiency ratios

INT

all	12%
load	12%
store	12%
mul	12%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
other	11%

all	18%
load	12%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

INT+FP

all	12%
load	12%
store	12%
mul	12%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	12%
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 32.50 cycles. At this rate:

7% of peak load performance is reached (18.71 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
9% of peak store performance is reached (12.31 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 275290

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x138,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R9,-0xb0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R8,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%RDX),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RCX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0xe8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x150(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xe0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x148(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xd8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xc8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xd0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x140(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xc8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x138(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xc0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xb8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x130(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xb0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xf0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xa8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xa0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x98(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x70(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x90(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x68(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x88(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x80(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x78(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x128(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x70(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x120(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x68(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xc0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x60(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xb8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x58(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xd0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x50(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x48(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x40(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xa0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x38(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x30(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x28(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x88(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x20(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x18(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x10(%RBP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
TEST %RDI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 275421 <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x191>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
CALL 301880 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV (%R13),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
TEST %RDI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 27542c <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x19c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
CALL 301880 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CMPQ $0,(%R15)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JG 275435 <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x1a5>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
JMP 275450 <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x1c0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
XOR %EBX,%EBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
MOV (%R13),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
TEST %RDI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 27540c <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x17c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
CMPQ $0,(%R15)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JLE 275450 <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x1c0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMPQ $0,(%R13)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JLE 275471 <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x1e1>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CALL 303460 <hypre_GetThreadNum>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 303450 <hypre_NumActiveThreads>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0xb0(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV (%RDX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV %RSI,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CQTO																				scal (12.5%)
IDIV %RCX	2	0	0	0	2	0	0	0	0	0	0	0	0	0	0	0	0	9-19	7-12	scal (12.5%)
LEA 0x1(%R15),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
DEC %RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
IMUL %RAX,%RDX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
MOV %RAX,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
IMUL %R15,%R11	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	scal (12.5%)
CMP %RCX,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
CMOVE %RSI,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,-0xd8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CMP %RDX,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JGE 275b87 <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x8f7>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0xa8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVDDUP -0x66143(%RIP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
VXORPD %XMM1,%XMM1,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV (%RAX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R12),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x8(%RCX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %RCX,-0xd8(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV %RAX,-0x160(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
ADD %RCX,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x98(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x80(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x88(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RCX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x118(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x90(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x110(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x50(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0xa0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xb0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x38(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x58(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x88(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x60(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x68(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x108(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x70(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x100(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x40(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x30(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xf8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x78(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0xb8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0xc0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x158(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
ADD $0xc0,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0xc8(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xe8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%RCX),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA 0xc0(%RDI),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RAX,-0xe0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDX,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JMP 275617 <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x387>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 301970 <hypre_Free>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %R14,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD $0x138,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 301970 <hypre_Free>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run aocc_2

Source file and lines	par_multi_interp.c:1575-1663
Module	exec

The function is defined in /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1575,1585-1599,1605-1663.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Performance is limited by:

reading data from caches/RAM (load units are a bottleneck)
writing data to caches/RAM (the store unit is a bottleneck)

By removing all these bottlenecks, you can lower the cost of an iteration from 32.50 to 24.13 cycles (1.35x speedup).

Workaround

Read less array elements
Write less array elements
Provide more information to your compiler:
- use the 'restrict' C99 keyword

No data for this section

CALL instructions

Detected function call instructions.

Details

hypre_CAlloc: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1586
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1589
hypre_Free: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1662
hypre_GetThreadNum: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1596
hypre_NumActiveThreads: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1597

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

IDIV: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1598

Conversion instructions

Detected expensive conversion instructions.

Details

CQTO: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1598

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 608 bytes. The binary function is storing 400 bytes.

General properties

nb instructions	196
nb uops	193
loop length	917
used x86 registers	15
used mmx registers	0
used xmm registers	2
used ymm registers	0
used zmm registers	0
nb stack references	67

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	24.13 cycles
front end	24.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	6.33	6.33	6.33	6.33	6.33	6.33	32.50	32.50	32.50	32.50	0.25	0.25	0.25	0.25	0.00	0.00
cycles	6.33	6.33	6.33	6.33	6.33	6.33	32.50	32.50	32.50	32.50	0.25	0.25	0.25	0.25	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

7.00-12.00

Cycles summary

Front-end	24.13
Dispatch	32.50
DIV/SQRT	7.00-12.00
Overall L1	32.50

Vectorization ratios

INT

all	1%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	5%

all	50%
load	0%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	100%

INT+FP

all	2%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	11%

Vector efficiency ratios

INT

all	12%
load	12%
store	12%
mul	12%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
other	11%

all	18%
load	12%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

INT+FP

all	12%
load	12%
store	12%
mul	12%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	12%
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 32.50 cycles. At this rate:

7% of peak load performance is reached (18.71 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
9% of peak store performance is reached (12.31 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 275290

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x138,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R9,-0xb0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R8,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%RDX),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RCX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0xe8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x150(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xe0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x148(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xd8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xc8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xd0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x140(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xc8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x138(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xc0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xb8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x130(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xb0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xf0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xa8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xa0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x98(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x70(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x90(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x68(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x88(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x80(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x78(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x128(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x70(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x120(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x68(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xc0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x60(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xb8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x58(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xd0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x50(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x48(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x40(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xa0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x38(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x30(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x28(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x88(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x20(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x18(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x10(%RBP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
TEST %RDI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 275421 <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x191>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
CALL 301880 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV (%R13),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
TEST %RDI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 27542c <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x19c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
CALL 301880 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CMPQ $0,(%R15)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JG 275435 <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x1a5>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
JMP 275450 <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x1c0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
XOR %EBX,%EBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
MOV (%R13),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
TEST %RDI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 27540c <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x17c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
CMPQ $0,(%R15)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JLE 275450 <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x1c0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMPQ $0,(%R13)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JLE 275471 <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x1e1>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CALL 303460 <hypre_GetThreadNum>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 303450 <hypre_NumActiveThreads>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0xb0(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV (%RDX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV %RSI,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CQTO																				scal (12.5%)
IDIV %RCX	2	0	0	0	2	0	0	0	0	0	0	0	0	0	0	0	0	9-19	7-12	scal (12.5%)
LEA 0x1(%R15),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
DEC %RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
IMUL %RAX,%RDX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
MOV %RAX,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
IMUL %R15,%R11	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	scal (12.5%)
CMP %RCX,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
CMOVE %RSI,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,-0xd8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CMP %RDX,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JGE 275b87 <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x8f7>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0xa8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVDDUP -0x66143(%RIP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
VXORPD %XMM1,%XMM1,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV (%RAX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R12),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x8(%RCX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %RCX,-0xd8(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV %RAX,-0x160(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
ADD %RCX,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x98(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x80(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x88(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RCX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x118(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x90(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x110(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x50(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0xa0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xb0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x38(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x58(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x88(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x60(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x68(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x108(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x70(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x100(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x40(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x30(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xf8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x78(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0xb8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0xc0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x158(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
ADD $0xc0,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0xc8(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xe8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%RCX),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA 0xc0(%RDI),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RAX,-0xe0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDX,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JMP 275617 <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x387>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 301970 <hypre_Free>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %R14,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD $0x138,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 301970 <hypre_Free>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼hypre_BoomerAMGBuildMultipass.omp_outlined.18–	0.61	0.32
○Loop 1117 - par_multi_interp.c:1590-1591 - exec	0.18	0.09
▼Loop 1118 - par_multi_interp.c:1605-1660 - exec–	0.10	0.05
○Loop 1128 - par_multi_interp.c:1618-1628 - exec	0.30	0.15
○Loop 1129 - par_multi_interp.c:1612-1615 - exec	0.02	0.01
○Loop 1122 - par_multi_interp.c:1657-1658 - exec	0.01	0.01
○Loop 1125 - par_multi_interp.c:1639-1652 - exec	0.00	0.00
○Loop 1127 - par_multi_interp.c:1633-1636 - exec	0.00	0.00
○Loop 1121 - par_multi_interp.c:1660-1660 - exec	0.00	0.00
○Loop 1126 - par_multi_interp.c:1639-1652 - exec	0.00	0.00
○Loop 1119 - par_multi_interp.c:1659-1660 - exec	0.00	0.00
○Loop 1120 - par_multi_interp.c:1660-1660 - exec	0.00	0.00
○Loop 1124 - par_multi_interp.c:1658-1658 - exec	0.00	0.00
○Loop 1123 - par_multi_interp.c:1658-1658 - exec	0.00	0.00
○Loop 1130 - par_multi_interp.c:1592-1593 - exec	0.00	0.00

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