OV - exec - Loop 1041

	Loop Id: 1041	Module: exec	Source: par_multi_interp.c:1774-1876	Coverage: 0.14%

0x26e6c0 MOV	-0xe8(%RBP),%RDX

0x26e6c7 INC	%RDX

0x26e6ca CMP	%RDX,-0x118(%RBP)

0x26e6d1 JLE	26f21f

0x26e6d7 MOV	%RDX,-0xe8(%RBP)

0x26e6de MOV	-0xd8(%RBP),%RAX

0x26e6e5 MOV	-0xa8(%RBP),%RSI

0x26e6ec MOV	(%RAX,%RDX,8),%R8

0x26e6f0 MOV	-0x1e8(%RBP),%RAX

0x26e6f7 MOV	(%RAX,%R8,8),%RAX

0x26e6fb MOV	0x8(%RSI,%R8,8),%RDX

0x26e700 MOV	(%RSI,%R8,8),%RCX

0x26e704 LEA	(%RDX,%RAX,1),%RSI

0x26e708 SUB	%RCX,%RSI

0x26e70b CMP	%RSI,%RAX

0x26e70e JGE	26e737

  (1065) 0x26e710 MOV	(%R13),%RSI

  (1065) 0x26e714 MOV	(%R10,%RSI,8),%RSI

  (1065) 0x26e718 MOV	(%RSI,%RAX,8),%RSI

  (1065) 0x26e71c INC	%RAX

  (1065) 0x26e71f MOV	%RCX,(%R15,%RSI,8)

  (1065) 0x26e723 MOVQ	$0,(%R11,%RCX,8)

  (1065) 0x26e72b MOV	%RSI,(%RBX,%RCX,8)

  (1065) 0x26e72f INC	%RCX

  (1065) 0x26e732 CMP	%RCX,%RDX

  (1065) 0x26e735 JNE	26e710

0x26e737 MOV	-0x1e0(%RBP),%RAX

0x26e73e MOV	-0xa0(%RBP),%RDX

0x26e745 MOV	-0x1d8(%RBP),%RDI

0x26e74c MOV	-0x50(%RBP),%R9

0x26e750 MOV	-0x190(%RBP),%R10

0x26e757 MOV	(%RDX,%R8,8),%RCX

0x26e75b MOV	(%RAX,%R8,8),%RAX

0x26e75f MOV	0x8(%RDX,%R8,8),%RDX

0x26e764 LEA	(%RDX,%RAX,1),%RSI

0x26e768 SUB	%RCX,%RSI

0x26e76b CMP	%RSI,%RAX

0x26e76e JGE	26e797

  (1064) 0x26e770 MOV	(%R13),%RSI

  (1064) 0x26e774 MOV	(%RDI,%RSI,8),%RSI

  (1064) 0x26e778 MOV	(%RSI,%RAX,8),%RSI

  (1064) 0x26e77c INC	%RAX

  (1064) 0x26e77f MOV	%RCX,(%R12,%RSI,8)

  (1064) 0x26e783 MOVQ	$0,(%R9,%RCX,8)

  (1064) 0x26e78b MOV	%RSI,(%R10,%RCX,8)

  (1064) 0x26e78f INC	%RCX

  (1064) 0x26e792 CMP	%RCX,%RDX

  (1064) 0x26e795 JNE	26e770

0x26e797 MOV	-0x1d0(%RBP),%RDI

0x26e79e MOV	-0x1c8(%RBP),%R9

0x26e7a5 MOV	-0x1c0(%RBP),%R10

0x26e7ac MOV	(%RDI,%R8,8),%RAX

0x26e7b0 MOV	0x8(%RDI,%R8,8),%RCX

0x26e7b5 CMP	%RCX,%RAX

0x26e7b8 JL	26e87c

0x26e7be MOV	-0x1b8(%RBP),%R9

0x26e7c5 MOV	-0x40(%RBP),%RDI

0x26e7c9 MOV	-0x1b0(%RBP),%R10

0x26e7d0 MOV	-0x1a8(%RBP),%R11

0x26e7d7 MOV	(%R9,%R8,8),%RAX

0x26e7db MOV	0x8(%R9,%R8,8),%RCX

0x26e7e0 CMP	%RCX,%RAX

0x26e7e3 JL	26e8ac

0x26e7e9 MOV	-0x1a0(%RBP),%RAX

0x26e7f0 VXORPD	%XMM4,%XMM4,%XMM4

0x26e7f4 MOV	(%RAX,%R8,8),%RDX

0x26e7f8 MOV	0x8(%RAX,%R8,8),%R11

0x26e7fd LEA	0x1(%RDX),%RCX

0x26e801 MOV	%RDX,-0xe0(%RBP)

0x26e808 CMP	%R11,%RCX

0x26e80b JGE	26e9c0

0x26e811 MOV	-0x140(%RBP),%RAX

0x26e818 MOV	(%RAX),%RAX

0x26e81b MOV	%RAX,-0x38(%RBP)

0x26e81f MOV	-0x100(%RBP),%RDX

0x26e826 MOV	-0xf0(%RBP),%RDI

0x26e82d MOV	-0x110(%RBP),%RAX

0x26e834 MOV	-0xf8(%RBP),%R9

0x26e83b MOV	(%RDX),%RSI

0x26e83e MOV	-0x88(%RBP),%RDX

0x26e845 MOV	(%RDI),%R14

0x26e848 MOV	-0x90(%RBP),%RDI

0x26e84f CMPQ	$0x1,(%RAX)

0x26e853 MOV	(%R9),%RBX

0x26e856 MOV	%R11,-0x30(%RBP)

0x26e85a MOV	(%RDX),%RDX

0x26e85d MOV	(%RDI),%RDI

0x26e860 JNE	26ed10

0x26e866 VXORPD	%XMM3,%XMM3,%XMM3

0x26e86a JMP	26e8dd

  (1063) 0x26e870 INC	%RAX

  (1063) 0x26e873 CMP	%RCX,%RAX

  (1063) 0x26e876 JGE	26e7be

  (1063) 0x26e87c MOV	(%R13),%RSI

  (1063) 0x26e880 MOV	(%R9,%RAX,8),%RDX

  (1063) 0x26e884 DEC	%RSI

  (1063) 0x26e887 CMP	%RSI,(%R10,%RDX,8)

  (1063) 0x26e88b JNE	26e870

  (1063) 0x26e88d MOV	%R8,(%R14,%RDX,8)

  (1063) 0x26e891 MOV	0x8(%RDI,%R8,8),%RCX

  (1063) 0x26e896 JMP	26e870

  (1062) 0x26e8a0 INC	%RAX

  (1062) 0x26e8a3 CMP	%RCX,%RAX

  (1062) 0x26e8a6 JGE	26e7e9

  (1062) 0x26e8ac MOV	(%R13),%RSI

  (1062) 0x26e8b0 MOV	(%R10,%RAX,8),%RDX

  (1062) 0x26e8b4 DEC	%RSI

  (1062) 0x26e8b7 CMP	%RSI,(%R11,%RDX,8)

  (1062) 0x26e8bb JNE	26e8a0

  (1062) 0x26e8bd MOV	%R8,(%RDI,%RDX,8)

  (1062) 0x26e8c1 MOV	0x8(%R9,%R8,8),%RCX

  (1062) 0x26e8c6 JMP	26e8a0

  (1059) 0x26e8d0 INC	%RCX

  (1059) 0x26e8d3 CMP	%RCX,-0x30(%RBP)

  (1059) 0x26e8d7 JE	26e9c4

  (1059) 0x26e8dd MOV	-0xd0(%RBP),%RAX

  (1059) 0x26e8e4 MOV	-0xb0(%RBP),%R9

  (1059) 0x26e8eb MOV	(%RAX,%RCX,8),%R10

  (1059) 0x26e8ef CMP	%R8,(%R9,%R10,8)

  (1059) 0x26e8f3 JNE	26e9a0

  (1059) 0x26e8f9 MOV	-0xa8(%RBP),%RAX

  (1059) 0x26e900 MOV	(%RAX,%R10,8),%R9

  (1059) 0x26e904 MOV	0x8(%RAX,%R10,8),%R11

  (1059) 0x26e909 CMP	%R11,%R9

  (1059) 0x26e90c JGE	26e93d

  (1059) 0x26e90e XCHG	%AX,%AX

    (1061) 0x26e910 MOV	(%R14,%R9,8),%RAX

    (1061) 0x26e914 VMOVSD	(%RSI,%RCX,8),%XMM2

    (1061) 0x26e919 VMULSD	(%RDX,%R9,8),%XMM2,%XMM2

    (1061) 0x26e91f INC	%R9

    (1061) 0x26e922 MOV	(%R15,%RAX,8),%RAX

    (1061) 0x26e926 VADDSD	(%RDX,%RAX,8),%XMM2,%XMM5

    (1061) 0x26e92b VADDSD	%XMM2,%XMM4,%XMM4

    (1061) 0x26e92f VADDSD	%XMM2,%XMM3,%XMM3

    (1061) 0x26e933 VMOVSD	%XMM5,(%RDX,%RAX,8)

    (1061) 0x26e938 CMP	%R9,%R11

    (1061) 0x26e93b JNE	26e910

  (1059) 0x26e93d MOV	-0xa0(%RBP),%RAX

  (1059) 0x26e944 MOV	(%RAX,%R10,8),%R9

  (1059) 0x26e948 MOV	0x8(%RAX,%R10,8),%R10

  (1059) 0x26e94d CMP	%R10,%R9

  (1059) 0x26e950 JGE	26e8d0

  (1059) 0x26e956 NOPW	%CS:(%RAX,%RAX,1)

    (1060) 0x26e960 MOV	(%RBX,%R9,8),%R11

    (1060) 0x26e964 VMOVSD	(%RSI,%RCX,8),%XMM2

    (1060) 0x26e969 VMULSD	(%RDI,%R9,8),%XMM2,%XMM2

    (1060) 0x26e96f INC	%R9

    (1060) 0x26e972 MOV	(%R12,%R11,8),%R11

    (1060) 0x26e976 VADDSD	(%RDI,%R11,8),%XMM2,%XMM5

    (1060) 0x26e97c VADDSD	%XMM2,%XMM4,%XMM4

    (1060) 0x26e980 VADDSD	%XMM2,%XMM3,%XMM3

    (1060) 0x26e984 VMOVSD	%XMM5,(%RDI,%R11,8)

    (1060) 0x26e98a CMP	%R9,%R10

    (1060) 0x26e98d JNE	26e960

  (1059) 0x26e98f JMP	26e8d0

  (1059) 0x26e9a0 MOV	-0x38(%RBP),%RAX

  (1059) 0x26e9a4 CMPQ	$-0x3,(%RAX,%R10,8)

  (1059) 0x26e9a9 JE	26e8d0

  (1059) 0x26e9af VADDSD	(%RSI,%RCX,8),%XMM3,%XMM3

  (1059) 0x26e9b4 JMP	26e8d0

0x26e9c0 VXORPD	%XMM3,%XMM3,%XMM3

0x26e9c4 MOV	-0x198(%RBP),%RAX

0x26e9cb MOV	(%RAX,%R8,8),%RCX

0x26e9cf MOV	0x8(%RAX,%R8,8),%RDI

0x26e9d4 CMP	%RDI,%RCX

0x26e9d7 JGE	26eca0

0x26e9dd MOV	-0x148(%RBP),%RAX

0x26e9e4 MOV	(%R13),%R9

0x26e9e8 MOV	(%RAX),%RAX

0x26e9eb MOV	%RAX,-0x38(%RBP)

0x26e9ef MOV	-0x178(%RBP),%RAX

0x26e9f6 MOV	(%RAX),%RAX

0x26e9f9 MOV	%RAX,-0x48(%RBP)

0x26e9fd MOV	-0x110(%RBP),%RAX

0x26ea04 MOV	-0x180(%RBP),%RDX

0x26ea0b MOV	(%RAX),%RSI

0x26ea0e MOV	(%RDX),%RAX

0x26ea11 MOV	%RAX,-0xc0(%RBP)

0x26ea18 MOV	-0x108(%RBP),%RAX

0x26ea1f MOV	(%RAX),%RAX

0x26ea22 MOV	%RAX,-0xb8(%RBP)

0x26ea29 MOV	-0x150(%RBP),%RDX

0x26ea30 MOV	-0x168(%RBP),%RAX

0x26ea37 MOV	(%RDX),%RDX

0x26ea3a MOV	(%RAX),%RAX

0x26ea3d MOV	%RDX,-0x80(%RBP)

0x26ea41 MOV	-0x158(%RBP),%RDX

0x26ea48 MOV	(%RDX),%RDX

0x26ea4b MOV	%RDX,-0x98(%RBP)

0x26ea52 MOV	-0x160(%RBP),%RDX

0x26ea59 MOV	(%RDX),%RDX

0x26ea5c MOV	%RDX,-0x78(%RBP)

0x26ea60 MOV	%R9,-0x70(%RBP)

0x26ea64 MOV	-0x170(%RBP),%RDX

0x26ea6b CMPQ	$0,-0x138(%RBP)

0x26ea73 MOV	%RDI,-0x30(%RBP)

0x26ea77 MOV	(%RDX),%R14

0x26ea7a JE	26ee3b

0x26ea80 MOV	-0x130(%RBP),%RDX

0x26ea87 MOV	(%RDX),%RDX

0x26ea8a MOV	%RDX,-0xc8(%RBP)

0x26ea91 CMP	$0x1,%RSI

0x26ea95 JNE	26eba9

0x26ea9b JMP	26eab9

  (1054) 0x26eaa0 MOV	-0x68(%RBP),%R10

  (1054) 0x26eaa4 MOV	-0x60(%RBP),%R11

  (1054) 0x26eaa8 MOV	-0x58(%RBP),%RBX

  (1054) 0x26eaac INC	%RCX

  (1054) 0x26eaaf CMP	%RCX,-0x30(%RBP)

  (1054) 0x26eab3 JE	26ecac

  (1054) 0x26eab9 MOV	-0x38(%RBP),%RDX

  (1054) 0x26eabd MOV	-0xc8(%RBP),%RDI

  (1054) 0x26eac4 MOV	(%RDX,%RCX,8),%RSI

  (1054) 0x26eac8 MOV	(%RDI,%RSI,8),%RSI

  (1054) 0x26eacc TEST	%RSI,%RSI

  (1054) 0x26eacf JS	26eb70

  (1054) 0x26ead5 MOV	-0x40(%RBP),%RDX

  (1054) 0x26ead9 CMP	%R8,(%RDX,%RSI,8)

  (1054) 0x26eadd JNE	26eb70

  (1054) 0x26eae3 MOV	-0x98(%RBP),%RDX

  (1054) 0x26eaea MOV	0x8(%RDX,%RSI,8),%R10

  (1054) 0x26eaef TEST	%R10,%R10

  (1054) 0x26eaf2 JLE	26eaa0

  (1054) 0x26eaf4 MOV	-0x80(%RBP),%RDX

  (1054) 0x26eaf8 MOV	-0x88(%RBP),%R9

  (1054) 0x26eaff MOV	(%RDX,%RSI,8),%RBX

  (1054) 0x26eb03 MOV	-0x78(%RBP),%RDX

  (1054) 0x26eb07 MOV	-0x70(%RBP),%RSI

  (1054) 0x26eb0b MOV	(%R9),%R9

  (1054) 0x26eb0e MOV	(%RDX,%RSI,8),%RDI

  (1054) 0x26eb12 MOV	-0x90(%RBP),%RSI

  (1054) 0x26eb19 ADD	%RBX,%R10

  (1054) 0x26eb1c MOV	(%RSI),%RSI

  (1054) 0x26eb1f NOP

    (1055) 0x26eb20 MOV	(%RDI,%RBX,8),%R11

    (1055) 0x26eb24 VMOVSD	(%RAX,%RCX,8),%XMM2

    (1055) 0x26eb29 VMULSD	(%R14,%RBX,8),%XMM2,%XMM2

    (1055) 0x26eb2f TEST	%R11,%R11

    (1055) 0x26eb32 LEA	(%R12,%R11,8),%RDX

    (1055) 0x26eb36 NOT	%R11

    (1055) 0x26eb39 LEA	(%R15,%R11,8),%R11

    (1055) 0x26eb3d CMOVNS	%RDX,%R11

    (1055) 0x26eb41 MOV	%RSI,%RDX

    (1055) 0x26eb44 CMOVS	%R9,%RDX

    (1055) 0x26eb48 INC	%RBX

    (1055) 0x26eb4b MOV	(%R11),%R11

    (1055) 0x26eb4e VADDSD	%XMM2,%XMM4,%XMM4

    (1055) 0x26eb52 VADDSD	%XMM2,%XMM3,%XMM3

    (1055) 0x26eb56 VADDSD	(%RDX,%R11,8),%XMM2,%XMM5

    (1055) 0x26eb5c VMOVSD	%XMM5,(%RDX,%R11,8)

    (1055) 0x26eb62 CMP	%R10,%RBX

    (1055) 0x26eb65 JL	26eb20

  (1054) 0x26eb67 JMP	26eaa0

  (1054) 0x26eb70 MOV	-0x48(%RBP),%RDX

  (1054) 0x26eb74 CMPQ	$-0x3,(%RDX,%RSI,8)

  (1054) 0x26eb79 JE	26eaa0

  (1054) 0x26eb7f VADDSD	(%RAX,%RCX,8),%XMM3,%XMM3

  (1054) 0x26eb84 JMP	26eaa0

  (1052) 0x26eb90 MOV	-0x68(%RBP),%R10

  (1052) 0x26eb94 MOV	-0x60(%RBP),%R11

  (1052) 0x26eb98 MOV	-0x58(%RBP),%RBX

  (1052) 0x26eb9c INC	%RCX

  (1052) 0x26eb9f CMP	%RCX,-0x30(%RBP)

  (1052) 0x26eba3 JE	26ecac

  (1052) 0x26eba9 MOV	-0x38(%RBP),%RDX

  (1052) 0x26ebad MOV	-0xc8(%RBP),%RSI

  (1052) 0x26ebb4 MOV	(%RDX,%RCX,8),%RDX

  (1052) 0x26ebb8 MOV	(%RSI,%RDX,8),%RSI

  (1052) 0x26ebbc TEST	%RSI,%RSI

  (1052) 0x26ebbf JS	26ec60

  (1052) 0x26ebc5 MOV	-0x40(%RBP),%RDX

  (1052) 0x26ebc9 CMP	%R8,(%RDX,%RSI,8)

  (1052) 0x26ebcd JNE	26ec60

  (1052) 0x26ebd3 MOV	-0x98(%RBP),%RDX

  (1052) 0x26ebda MOV	0x8(%RDX,%RSI,8),%R10

  (1052) 0x26ebdf TEST	%R10,%R10

  (1052) 0x26ebe2 JLE	26eb90

  (1052) 0x26ebe4 MOV	-0x80(%RBP),%RDX

  (1052) 0x26ebe8 MOV	-0x90(%RBP),%RDI

  (1052) 0x26ebef MOV	-0x88(%RBP),%R9

  (1052) 0x26ebf6 MOV	(%RDX,%RSI,8),%RBX

  (1052) 0x26ebfa MOV	-0x78(%RBP),%RDX

  (1052) 0x26ebfe MOV	-0x70(%RBP),%RSI

  (1052) 0x26ec02 MOV	(%RDI),%RDI

  (1052) 0x26ec05 MOV	(%R9),%R9

  (1052) 0x26ec08 MOV	(%RDX,%RSI,8),%RSI

  (1052) 0x26ec0c ADD	%RBX,%R10

  (1052) 0x26ec0f NOP

    (1053) 0x26ec10 MOV	(%RSI,%RBX,8),%RDX

    (1053) 0x26ec14 VMOVSD	(%RAX,%RCX,8),%XMM2

    (1053) 0x26ec19 VMULSD	(%R14,%RBX,8),%XMM2,%XMM2

    (1053) 0x26ec1f TEST	%RDX,%RDX

    (1053) 0x26ec22 LEA	(%R12,%RDX,8),%R11

    (1053) 0x26ec26 NOT	%RDX

    (1053) 0x26ec29 LEA	(%R15,%RDX,8),%RDX

    (1053) 0x26ec2d CMOVNS	%R11,%RDX

    (1053) 0x26ec31 MOV	%RDI,%R11

    (1053) 0x26ec34 CMOVS	%R9,%R11

    (1053) 0x26ec38 INC	%RBX

    (1053) 0x26ec3b MOV	(%RDX),%RDX

    (1053) 0x26ec3e VADDSD	%XMM2,%XMM4,%XMM4

    (1053) 0x26ec42 VADDSD	%XMM2,%XMM3,%XMM3

    (1053) 0x26ec46 VADDSD	(%R11,%RDX,8),%XMM2,%XMM5

    (1053) 0x26ec4c VMOVSD	%XMM5,(%R11,%RDX,8)

    (1053) 0x26ec52 CMP	%R10,%RBX

    (1053) 0x26ec55 JL	26ec10

  (1052) 0x26ec57 JMP	26eb90

  (1052) 0x26ec60 MOV	-0x48(%RBP),%RDX

  (1052) 0x26ec64 CMPQ	$-0x3,(%RDX,%RSI,8)

  (1052) 0x26ec69 JE	26eb90

  (1052) 0x26ec6f MOV	-0xc0(%RBP),%RDX

  (1052) 0x26ec76 MOV	-0xb8(%RBP),%RDI

  (1052) 0x26ec7d MOV	(%RDX,%RSI,8),%RDX

  (1052) 0x26ec81 CMP	%RDX,(%RDI,%R8,8)

  (1052) 0x26ec85 JNE	26eb90

  (1052) 0x26ec8b VADDSD	(%RAX,%RCX,8),%XMM3,%XMM3

  (1052) 0x26ec90 JMP	26eb90

0x26eca0 MOV	-0x68(%RBP),%R10

0x26eca4 MOV	-0x60(%RBP),%R11

0x26eca8 MOV	-0x58(%RBP),%RBX

0x26ecac MOV	-0x188(%RBP),%RAX

0x26ecb3 MOV	-0xe0(%RBP),%RCX

0x26ecba VMULSD	(%RAX,%RCX,8),%XMM4,%XMM4

0x26ecbf VUCOMISD	%XMM0,%XMM4

0x26ecc3 JNE	26ecc7

0x26ecc5 JNP	26eccf

0x26ecc7 VXORPD	%XMM1,%XMM3,%XMM2

0x26eccb VDIVSD	%XMM4,%XMM2,%XMM2

0x26eccf MOV	-0xa8(%RBP),%RCX

0x26ecd6 MOV	-0xb0(%RBP),%R14

0x26ecdd MOV	(%RCX,%R8,8),%RAX

0x26ece1 MOV	0x8(%RCX,%R8,8),%RCX

0x26ece6 MOV	%RCX,%RDX

0x26ece9 SUB	%RAX,%RDX

0x26ecec JLE	26f104

0x26ecf2 CMP	$0x4,%RDX

0x26ecf6 JB	26f0f0

0x26ecfc CMP	$0x20,%RDX

0x26ed00 JAE	26f045

0x26ed06 XOR	%ESI,%ESI

0x26ed08 JMP	26f0b1

0x26ed10 MOV	-0x108(%RBP),%RAX

0x26ed17 VXORPD	%XMM3,%XMM3,%XMM3

0x26ed1b MOV	(%RAX),%RAX

0x26ed1e MOV	%RAX,-0x48(%RBP)

0x26ed22 JMP	26ed40

  (1056) 0x26ed30 MOV	-0x30(%RBP),%R11

  (1056) 0x26ed34 INC	%RCX

  (1056) 0x26ed37 CMP	%R11,%RCX

  (1056) 0x26ed3a JE	26e9c4

  (1056) 0x26ed40 MOV	-0xd0(%RBP),%RAX

  (1056) 0x26ed47 MOV	-0xb0(%RBP),%R9

  (1056) 0x26ed4e MOV	(%RAX,%RCX,8),%R10

  (1056) 0x26ed52 CMP	%R8,(%R9,%R10,8)

  (1056) 0x26ed56 JNE	26ee10

  (1056) 0x26ed5c MOV	-0xa8(%RBP),%RAX

  (1056) 0x26ed63 MOV	(%RAX,%R10,8),%R9

  (1056) 0x26ed67 MOV	0x8(%RAX,%R10,8),%R11

  (1056) 0x26ed6c CMP	%R11,%R9

  (1056) 0x26ed6f JGE	26edad

  (1056) 0x26ed71 NOPW	%CS:(%RAX,%RAX,1)

    (1058) 0x26ed80 MOV	(%R14,%R9,8),%RAX

    (1058) 0x26ed84 VMOVSD	(%RSI,%RCX,8),%XMM2

    (1058) 0x26ed89 VMULSD	(%RDX,%R9,8),%XMM2,%XMM2

    (1058) 0x26ed8f INC	%R9

    (1058) 0x26ed92 MOV	(%R15,%RAX,8),%RAX

    (1058) 0x26ed96 VADDSD	(%RDX,%RAX,8),%XMM2,%XMM5

    (1058) 0x26ed9b VADDSD	%XMM2,%XMM4,%XMM4

    (1058) 0x26ed9f VADDSD	%XMM2,%XMM3,%XMM3

    (1058) 0x26eda3 VMOVSD	%XMM5,(%RDX,%RAX,8)

    (1058) 0x26eda8 CMP	%R9,%R11

    (1058) 0x26edab JNE	26ed80

  (1056) 0x26edad MOV	-0xa0(%RBP),%RAX

  (1056) 0x26edb4 MOV	(%RAX,%R10,8),%R9

  (1056) 0x26edb8 MOV	0x8(%RAX,%R10,8),%R10

  (1056) 0x26edbd CMP	%R10,%R9

  (1056) 0x26edc0 JGE	26ed30

  (1056) 0x26edc6 MOV	-0x30(%RBP),%R11

  (1056) 0x26edca NOPW	(%RAX,%RAX,1)

    (1057) 0x26edd0 MOV	(%RBX,%R9,8),%RAX

    (1057) 0x26edd4 VMOVSD	(%RSI,%RCX,8),%XMM2

    (1057) 0x26edd9 VMULSD	(%RDI,%R9,8),%XMM2,%XMM2

    (1057) 0x26eddf INC	%R9

    (1057) 0x26ede2 MOV	(%R12,%RAX,8),%RAX

    (1057) 0x26ede6 VADDSD	(%RDI,%RAX,8),%XMM2,%XMM5

    (1057) 0x26edeb VADDSD	%XMM2,%XMM4,%XMM4

    (1057) 0x26edef VADDSD	%XMM2,%XMM3,%XMM3

    (1057) 0x26edf3 VMOVSD	%XMM5,(%RDI,%RAX,8)

    (1057) 0x26edf8 CMP	%R9,%R10

    (1057) 0x26edfb JNE	26edd0

  (1056) 0x26edfd JMP	26ed34

  (1056) 0x26ee10 MOV	-0x38(%RBP),%RAX

  (1056) 0x26ee14 CMPQ	$-0x3,(%RAX,%R10,8)

  (1056) 0x26ee19 JE	26ed34

  (1056) 0x26ee1f MOV	-0x48(%RBP),%R9

  (1056) 0x26ee23 MOV	(%R9,%R8,8),%RAX

  (1056) 0x26ee27 CMP	%RAX,(%R9,%R10,8)

  (1056) 0x26ee2b JNE	26ed34

  (1056) 0x26ee31 VADDSD	(%RSI,%RCX,8),%XMM3,%XMM3

  (1056) 0x26ee36 JMP	26ed34

0x26ee3b CMP	$0x1,%RSI

0x26ee3f JNE	26ef59

0x26ee45 JMP	26ee69

  (1050) 0x26ee50 MOV	-0x68(%RBP),%R10

  (1050) 0x26ee54 MOV	-0x60(%RBP),%R11

  (1050) 0x26ee58 MOV	-0x58(%RBP),%RBX

  (1050) 0x26ee5c INC	%RCX

  (1050) 0x26ee5f CMP	%RCX,-0x30(%RBP)

  (1050) 0x26ee63 JE	26ecac

  (1050) 0x26ee69 MOV	-0x38(%RBP),%RDX

  (1050) 0x26ee6d MOV	(%RDX,%RCX,8),%RSI

  (1050) 0x26ee71 TEST	%RSI,%RSI

  (1050) 0x26ee74 JS	26ef20

  (1050) 0x26ee7a MOV	-0x40(%RBP),%RDX

  (1050) 0x26ee7e CMP	%R8,(%RDX,%RSI,8)

  (1050) 0x26ee82 JNE	26ef20

  (1050) 0x26ee88 MOV	-0x98(%RBP),%RDX

  (1050) 0x26ee8f MOV	0x8(%RDX,%RSI,8),%RDI

  (1050) 0x26ee94 TEST	%RDI,%RDI

  (1050) 0x26ee97 JLE	26ee50

  (1050) 0x26ee99 MOV	-0x80(%RBP),%RDX

  (1050) 0x26ee9d MOV	-0x88(%RBP),%R9

  (1050) 0x26eea4 MOV	(%RDX,%RSI,8),%R10

  (1050) 0x26eea8 MOV	-0x78(%RBP),%RDX

  (1050) 0x26eeac MOV	-0x70(%RBP),%RSI

  (1050) 0x26eeb0 MOV	(%R9),%R9

  (1050) 0x26eeb3 MOV	(%RDX,%RSI,8),%RBX

  (1050) 0x26eeb7 MOV	-0x90(%RBP),%RSI

  (1050) 0x26eebe ADD	%R10,%RDI

  (1050) 0x26eec1 MOV	(%RSI),%RSI

  (1050) 0x26eec4 NOPW	%CS:(%RAX,%RAX,1)

    (1051) 0x26eed0 MOV	(%RBX,%R10,8),%RDX

    (1051) 0x26eed4 VMOVSD	(%RAX,%RCX,8),%XMM2

    (1051) 0x26eed9 VMULSD	(%R14,%R10,8),%XMM2,%XMM2

    (1051) 0x26eedf TEST	%RDX,%RDX

    (1051) 0x26eee2 LEA	(%R12,%RDX,8),%R11

    (1051) 0x26eee6 NOT	%RDX

    (1051) 0x26eee9 LEA	(%R15,%RDX,8),%RDX

    (1051) 0x26eeed CMOVNS	%R11,%RDX

    (1051) 0x26eef1 MOV	%RSI,%R11

    (1051) 0x26eef4 CMOVS	%R9,%R11

    (1051) 0x26eef8 INC	%R10

    (1051) 0x26eefb MOV	(%RDX),%RDX

    (1051) 0x26eefe VADDSD	%XMM2,%XMM4,%XMM4

    (1051) 0x26ef02 VADDSD	%XMM2,%XMM3,%XMM3

    (1051) 0x26ef06 VADDSD	(%R11,%RDX,8),%XMM2,%XMM5

    (1051) 0x26ef0c VMOVSD	%XMM5,(%R11,%RDX,8)

    (1051) 0x26ef12 CMP	%RDI,%R10

    (1051) 0x26ef15 JL	26eed0

  (1050) 0x26ef17 JMP	26ee50

  (1050) 0x26ef20 MOV	-0x48(%RBP),%RDX

  (1050) 0x26ef24 CMPQ	$-0x3,(%RDX,%RSI,8)

  (1050) 0x26ef29 JE	26ee50

  (1050) 0x26ef2f VADDSD	(%RAX,%RCX,8),%XMM3,%XMM3

  (1050) 0x26ef34 JMP	26ee50

  (1048) 0x26ef40 MOV	-0x68(%RBP),%R10

  (1048) 0x26ef44 MOV	-0x60(%RBP),%R11

  (1048) 0x26ef48 MOV	-0x58(%RBP),%RBX

  (1048) 0x26ef4c INC	%RCX

  (1048) 0x26ef4f CMP	%RCX,-0x30(%RBP)

  (1048) 0x26ef53 JE	26ecac

  (1048) 0x26ef59 MOV	-0x38(%RBP),%RDX

  (1048) 0x26ef5d MOV	(%RDX,%RCX,8),%RSI

  (1048) 0x26ef61 TEST	%RSI,%RSI

  (1048) 0x26ef64 JS	26f010

  (1048) 0x26ef6a MOV	-0x40(%RBP),%RDX

  (1048) 0x26ef6e CMP	%R8,(%RDX,%RSI,8)

  (1048) 0x26ef72 JNE	26f010

  (1048) 0x26ef78 MOV	-0x98(%RBP),%RDX

  (1048) 0x26ef7f MOV	0x8(%RDX,%RSI,8),%RDI

  (1048) 0x26ef84 TEST	%RDI,%RDI

  (1048) 0x26ef87 JLE	26ef40

  (1048) 0x26ef89 MOV	-0x80(%RBP),%RDX

  (1048) 0x26ef8d MOV	-0x88(%RBP),%R9

  (1048) 0x26ef94 MOV	(%RDX,%RSI,8),%R10

  (1048) 0x26ef98 MOV	-0x78(%RBP),%RDX

  (1048) 0x26ef9c MOV	-0x70(%RBP),%RSI

  (1048) 0x26efa0 MOV	(%R9),%R9

  (1048) 0x26efa3 MOV	(%RDX,%RSI,8),%RBX

  (1048) 0x26efa7 MOV	-0x90(%RBP),%RSI

  (1048) 0x26efae ADD	%R10,%RDI

  (1048) 0x26efb1 MOV	(%RSI),%RSI

  (1048) 0x26efb4 NOPW	%CS:(%RAX,%RAX,1)

    (1049) 0x26efc0 MOV	(%RBX,%R10,8),%RDX

    (1049) 0x26efc4 VMOVSD	(%RAX,%RCX,8),%XMM2

    (1049) 0x26efc9 VMULSD	(%R14,%R10,8),%XMM2,%XMM2

    (1049) 0x26efcf TEST	%RDX,%RDX

    (1049) 0x26efd2 LEA	(%R12,%RDX,8),%R11

    (1049) 0x26efd6 NOT	%RDX

    (1049) 0x26efd9 LEA	(%R15,%RDX,8),%RDX

    (1049) 0x26efdd CMOVNS	%R11,%RDX

    (1049) 0x26efe1 MOV	%RSI,%R11

    (1049) 0x26efe4 CMOVS	%R9,%R11

    (1049) 0x26efe8 INC	%R10

    (1049) 0x26efeb MOV	(%RDX),%RDX

    (1049) 0x26efee VADDSD	%XMM2,%XMM4,%XMM4

    (1049) 0x26eff2 VADDSD	%XMM2,%XMM3,%XMM3

    (1049) 0x26eff6 VADDSD	(%R11,%RDX,8),%XMM2,%XMM5

    (1049) 0x26effc VMOVSD	%XMM5,(%R11,%RDX,8)

    (1049) 0x26f002 CMP	%RDI,%R10

    (1049) 0x26f005 JL	26efc0

  (1048) 0x26f007 JMP	26ef40

  (1048) 0x26f010 MOV	-0x48(%RBP),%RDX

  (1048) 0x26f014 CMPQ	$-0x3,(%RDX,%RSI,8)

  (1048) 0x26f019 JE	26ef40

  (1048) 0x26f01f MOV	-0xc0(%RBP),%RDX

  (1048) 0x26f026 MOV	-0xb8(%RBP),%RDI

  (1048) 0x26f02d MOV	(%RDX,%RSI,8),%RDX

  (1048) 0x26f031 CMP	%RDX,(%RDI,%R8,8)

  (1048) 0x26f035 JNE	26ef40

  (1048) 0x26f03b VADDSD	(%RAX,%RCX,8),%XMM3,%XMM3

  (1048) 0x26f040 JMP	26ef40

0x26f045 MOV	-0x128(%RBP),%RDI

0x26f04c VBROADCASTSD	%XMM2,%ZMM3

0x26f052 MOV	%RDX,%RSI

0x26f055 AND	$-0x20,%RSI

0x26f059 XOR	%R9D,%R9D

0x26f05c LEA	(%RDI,%RAX,8),%RDI

  (1046) 0x26f060 VMULPD	-0xc0(%RDI,%R9,8),%ZMM3,%ZMM4

  (1046) 0x26f068 VMULPD	-0x80(%RDI,%R9,8),%ZMM3,%ZMM5

  (1046) 0x26f070 VMULPD	-0x40(%RDI,%R9,8),%ZMM3,%ZMM6

  (1046) 0x26f078 VMULPD	(%RDI,%R9,8),%ZMM3,%ZMM7

  (1046) 0x26f07f VMOVUPD	%ZMM4,-0xc0(%RDI,%R9,8)

  (1046) 0x26f087 VMOVUPD	%ZMM5,-0x80(%RDI,%R9,8)

  (1046) 0x26f08f VMOVUPD	%ZMM6,-0x40(%RDI,%R9,8)

  (1046) 0x26f097 VMOVUPD	%ZMM7,(%RDI,%R9,8)

  (1046) 0x26f09e ADD	$0x20,%R9

  (1046) 0x26f0a2 CMP	%R9,%RSI

  (1046) 0x26f0a5 JNE	26f060

0x26f0a7 CMP	%RSI,%RDX

0x26f0aa JE	26f104

0x26f0ac TEST	$0x1c,%DL

0x26f0af JE	26f0ec

0x26f0b1 MOV	%RDX,%RDI

0x26f0b4 AND	$-0x4,%RDI

0x26f0b8 LEA	(%R11,%RAX,8),%R9

0x26f0bc VBROADCASTSD	%XMM2,%YMM3

0x26f0c1 ADD	%RDI,%RAX

0x26f0c4 NOPW	%CS:(%RAX,%RAX,1)

  (1047) 0x26f0d0 VMULPD	(%R9,%RSI,8),%YMM3,%YMM4

  (1047) 0x26f0d6 VMOVUPD	%YMM4,(%R9,%RSI,8)

  (1047) 0x26f0dc ADD	$0x4,%RSI

  (1047) 0x26f0e0 CMP	%RSI,%RDI

  (1047) 0x26f0e3 JNE	26f0d0

0x26f0e5 CMP	%RDI,%RDX

0x26f0e8 JNE	26f0f0

0x26f0ea JMP	26f104

0x26f0ec ADD	%RSI,%RAX

0x26f0ef NOP

  (1045) 0x26f0f0 VMULSD	(%R11,%RAX,8),%XMM2,%XMM3

  (1045) 0x26f0f6 VMOVSD	%XMM3,(%R11,%RAX,8)

  (1045) 0x26f0fc INC	%RAX

  (1045) 0x26f0ff CMP	%RAX,%RCX

  (1045) 0x26f102 JNE	26f0f0

0x26f104 MOV	-0xa0(%RBP),%RCX

0x26f10b MOV	(%RCX,%R8,8),%RAX

0x26f10f MOV	0x8(%RCX,%R8,8),%RCX

0x26f114 MOV	%RCX,%RDX

0x26f117 SUB	%RAX,%RDX

0x26f11a JLE	26e6c0

0x26f120 CMP	$0x4,%RDX

0x26f124 JAE	26f130

0x26f126 MOV	-0x50(%RBP),%RDX

0x26f12a JMP	26f200

0x26f130 CMP	$0x20,%RDX

0x26f134 JAE	26f13a

0x26f136 XOR	%ESI,%ESI

0x26f138 JMP	26f1b5

0x26f13a MOV	-0x120(%RBP),%RDI

0x26f141 VBROADCASTSD	%XMM2,%ZMM3

0x26f147 MOV	%RDX,%RSI

0x26f14a AND	$-0x20,%RSI

0x26f14e XOR	%R8D,%R8D

0x26f151 LEA	(%RDI,%RAX,8),%RDI

0x26f155 NOPW	%CS:(%RAX,%RAX,1)

  (1042) 0x26f160 VMULPD	-0xc0(%RDI,%R8,8),%ZMM3,%ZMM4

  (1042) 0x26f168 VMULPD	-0x80(%RDI,%R8,8),%ZMM3,%ZMM5

  (1042) 0x26f170 VMULPD	-0x40(%RDI,%R8,8),%ZMM3,%ZMM6

  (1042) 0x26f178 VMULPD	(%RDI,%R8,8),%ZMM3,%ZMM7

  (1042) 0x26f17f VMOVUPD	%ZMM4,-0xc0(%RDI,%R8,8)

  (1042) 0x26f187 VMOVUPD	%ZMM5,-0x80(%RDI,%R8,8)

  (1042) 0x26f18f VMOVUPD	%ZMM6,-0x40(%RDI,%R8,8)

  (1042) 0x26f197 VMOVUPD	%ZMM7,(%RDI,%R8,8)

  (1042) 0x26f19e ADD	$0x20,%R8

  (1042) 0x26f1a2 CMP	%R8,%RSI

  (1042) 0x26f1a5 JNE	26f160

0x26f1a7 CMP	%RSI,%RDX

0x26f1aa JE	26e6c0

0x26f1b0 TEST	$0x1c,%DL

0x26f1b3 JE	26f217

0x26f1b5 MOV	-0x50(%RBP),%R8

0x26f1b9 MOV	%RDX,%RDI

0x26f1bc AND	$-0x4,%RDI

0x26f1c0 VBROADCASTSD	%XMM2,%YMM3

0x26f1c5 LEA	(%R8,%RAX,8),%R8

0x26f1c9 ADD	%RDI,%RAX

0x26f1cc NOPL	(%RAX)

  (1044) 0x26f1d0 VMULPD	(%R8,%RSI,8),%YMM3,%YMM4

  (1044) 0x26f1d6 VMOVUPD	%YMM4,(%R8,%RSI,8)

  (1044) 0x26f1dc ADD	$0x4,%RSI

  (1044) 0x26f1e0 CMP	%RSI,%RDI

  (1044) 0x26f1e3 JNE	26f1d0

0x26f1e5 CMP	%RDI,%RDX

0x26f1e8 MOV	-0x50(%RBP),%RDX

0x26f1ec JE	26e6c0

0x26f1f2 NOPW	%CS:(%RAX,%RAX,1)

  (1043) 0x26f200 VMULSD	(%RDX,%RAX,8),%XMM2,%XMM3

  (1043) 0x26f205 VMOVSD	%XMM3,(%RDX,%RAX,8)

  (1043) 0x26f20a INC	%RAX

  (1043) 0x26f20d CMP	%RAX,%RCX

  (1043) 0x26f210 JNE	26f200

0x26f212 JMP	26e6c0

0x26f217 ADD	%RSI,%RAX

0x26f21a JMP	26f126

/home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 1774 - 1876

--------------------------------------------------------------------------------

1774:              for (i=thread_start; i < thread_stop; i++)

1775:              {

1776:                 i1 = pass_array[i];

1777:                 sum_C = 0;

1778:                 sum_N = 0;

1779:                 j_start = P_diag_start[i1];

1780:                 j_end = j_start+P_diag_i[i1+1]-P_diag_i[i1];

1781:                 cnt = P_diag_i[i1];

1782:                 for (j=j_start; j < j_end; j++)

1783:                 {

1784:                    k1 = P_diag_pass[pass][j];

1785:                tmp_array[k1] = cnt;

1786:                P_diag_data[cnt] = 0;

1787:                P_diag_j[cnt++] = k1;

1788:                 }

1789:                 j_start = P_offd_start[i1];

1790:                 j_end = j_start+P_offd_i[i1+1]-P_offd_i[i1];

1791:                 cnt_offd = P_offd_i[i1];

1792:                 for (j=j_start; j < j_end; j++)

1793:                 {

1794:                    k1 = P_offd_pass[pass][j];

1795:                tmp_array_offd[k1] = cnt_offd;

1796:                P_offd_data[cnt_offd] = 0;

1797:                P_offd_j[cnt_offd++] = k1;

1798:                 }

1799:                 for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++)

1800:                 {

1801:                j1 = S_diag_j[j];

1802:                if (assigned[j1] == pass-1)

1803:                   tmp_marker[j1] = i1;

1804:                 }

1805:                 for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++)

1806:                 {

1807:                j1 = S_offd_j[j];

1808:                if (assigned_offd[j1] == pass-1)

1809:                   tmp_marker_offd[j1] = i1;

1810:                 }

1811:                 for (j=A_diag_i[i1]+1; j < A_diag_i[i1+1]; j++)

1812:                 {

1813:                j1 = A_diag_j[j];

1814:                if (tmp_marker[j1] == i1)

1815:                {

1816:                   for (k=P_diag_i[j1]; k < P_diag_i[j1+1]; k++)

1817:                   {

1818:                  k1 = P_diag_j[k];

1819:                      alfa = A_diag_data[j]*P_diag_data[k];

1820:                      P_diag_data[tmp_array[k1]] += alfa;

1821:                      sum_C += alfa;

1822:                      sum_N += alfa;

1823:                       }

1824:                   for (k=P_offd_i[j1]; k < P_offd_i[j1+1]; k++)

1825:                   {

1826:                  k1 = P_offd_j[k];

1827:                      alfa = A_diag_data[j]*P_offd_data[k];

1828:                      P_offd_data[tmp_array_offd[k1]] += alfa;

1829:                      sum_C += alfa;

1830:                      sum_N += alfa;

1831:                       }

1832:                    }

1833:                    else

1834:                    {

1835:                       if (CF_marker[j1] != -3 &&

1836:                 (num_functions == 1 || dof_func[i1] == dof_func[j1]))

1837:                  sum_N += A_diag_data[j];

1838:                    }

1839:                 }

1840:                 for (j=A_offd_i[i1]; j < A_offd_i[i1+1]; j++)

1841:                 {

1842:                if (col_offd_S_to_A)

1843:                   j1 = map_A_to_S[A_offd_j[j]];

1844:                else

1845:                   j1 = A_offd_j[j];

1846:

1847:                if (j1 > -1 && tmp_marker_offd[j1] == i1)

1848:                {

1849:                   j_start = Pext_start[j1];

1850:                   j_end = j_start+Pext_i[j1+1];

1851:                   for (k=j_start; k < j_end; k++)

1852:                   {

1853:                  k1 = Pext_pass[pass][k];

1854:                      alfa = A_offd_data[j]*Pext_data[k];

1855:                  if (k1 < 0)

1856:                         P_diag_data[tmp_array[-k1-1]] += alfa;

1857:                  else

1858:                         P_offd_data[tmp_array_offd[k1]] += alfa;

1859:                      sum_C += alfa;

1860:                      sum_N += alfa;

1861:                       }

1862:                    }

1863:                    else

1864:                    {

1865:                       if (CF_marker_offd[j1] != -3 &&

1866:                 (num_functions == 1 || dof_func_offd[j1] == dof_func[i1]))

1867:                  sum_N += A_offd_data[j];

1868:                    }

1869:                 }

1870:                 diagonal = A_diag_data[A_diag_i[i1]];

1871:                 if (sum_C*diagonal) alfa = -sum_N/(sum_C*diagonal);

1872:

1873:                 for (j=P_diag_i[i1]; j < P_diag_i[i1+1]; j++)

1874:                P_diag_data[j] *= alfa;

1875:                 for (j=P_offd_i[i1]; j < P_offd_i[i1+1]; j++)

1876:                P_offd_data[j] *= alfa;

Coverage (%)	Name	Source Location	Module
►96.24+	__kmp_invoke_microtask		libomp.so
○	__kmp_invoke_task_func		libomp.so
○	__kmp_launch_thread		libomp.so
○	__kmp_launch_worker(void*)		libomp.so
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►2.87+	__kmp_invoke_microtask		libomp.so
○	__kmp_invoke_task_func		libomp.so
○	__kmp_fork_call		libomp.so
○	__kmpc_fork_call		libomp.so
○	hypre_BoomerAMGBuildMultipass	par_multi_interp.c:1737	exec
○	hypre_BoomerAMGSetup	par_amg_setup.c:737	exec
○	hypre_PCGSetup	pcg.c:234	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Metric	Value
CQA speedup if no scalar integer	2.67
CQA speedup if FP arith vectorized	2.83
CQA speedup if fully vectorized	8.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.06
Bottlenecks	P6, P7, P8, P9,
Function	hypre_BoomerAMGBuildMultipass.omp_outlined.20
Source	par_multi_interp.c:1774-1776,par_multi_interp.c:1779-1782,par_multi_interp.c:1789-1792,par_multi_interp.c:1799-1799,par_multi_interp.c:1805-1805,par_multi_interp.c:1811-1811,par_multi_interp.c:1837-1837,par_multi_interp.c:1840-1840,par_multi_interp.c:1867-1867,par_multi_interp.c:1871-1875
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	26.75
CQA cycles if no scalar integer	10.00
CQA cycles if FP arith vectorized	9.47
CQA cycles if fully vectorized	3.34
Front-end cycles	25.13
P0 cycles	12.50
P1 cycles	12.50
P2 cycles	12.50
P3 cycles	12.50
P4 cycles	12.50
P5 cycles	12.50
P6 cycles	26.75
P7 cycles	26.75
P8 cycles	26.75
P9 cycles	26.75
P10 cycles	1.25
P11 cycles	3.00
P12 cycles	2.50
P13 cycles	1.25
P14 cycles	0.50
P15 cycles	0.50
DIV/SQRT cycles	4.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	206.00
Nb uops	201.00
Nb loads	92.00
Nb stores	15.00
Nb stack references	55.00
FLOP/cycle	0.07
Nb FLOP add-sub	0.00
Nb FLOP mul	1.00
Nb FLOP fma	0.00
Nb FLOP div	1.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	32.00
Bytes prefetched	0.00
Bytes loaded	736.00
Bytes stored	120.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	9.09
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	0.00
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	0.00
Vectorization ratio other	17.24
Vector-efficiency ratio all	13.64
Vector-efficiency ratio load	12.50
Vector-efficiency ratio store	12.50
Vector-efficiency ratio mul	12.50
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	12.50
Vector-efficiency ratio other	14.66

Metric	Value
CQA speedup if no scalar integer	2.67
CQA speedup if FP arith vectorized	2.83
CQA speedup if fully vectorized	8.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.06
Bottlenecks	P6, P7, P8, P9,
Function	hypre_BoomerAMGBuildMultipass.omp_outlined.20
Source	par_multi_interp.c:1774-1776,par_multi_interp.c:1779-1782,par_multi_interp.c:1789-1792,par_multi_interp.c:1799-1799,par_multi_interp.c:1805-1805,par_multi_interp.c:1811-1811,par_multi_interp.c:1837-1837,par_multi_interp.c:1840-1840,par_multi_interp.c:1867-1867,par_multi_interp.c:1871-1875
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	26.75
CQA cycles if no scalar integer	10.00
CQA cycles if FP arith vectorized	9.47
CQA cycles if fully vectorized	3.34
Front-end cycles	25.13
P0 cycles	12.50
P1 cycles	12.50
P2 cycles	12.50
P3 cycles	12.50
P4 cycles	12.50
P5 cycles	12.50
P6 cycles	26.75
P7 cycles	26.75
P8 cycles	26.75
P9 cycles	26.75
P10 cycles	1.25
P11 cycles	3.00
P12 cycles	2.50
P13 cycles	1.25
P14 cycles	0.50
P15 cycles	0.50
DIV/SQRT cycles	4.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	206.00
Nb uops	201.00
Nb loads	92.00
Nb stores	15.00
Nb stack references	55.00
FLOP/cycle	0.07
Nb FLOP add-sub	0.00
Nb FLOP mul	1.00
Nb FLOP fma	0.00
Nb FLOP div	1.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	32.00
Bytes prefetched	0.00
Bytes loaded	736.00
Bytes stored	120.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	9.09
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	0.00
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	0.00
Vectorization ratio other	17.24
Vector-efficiency ratio all	13.64
Vector-efficiency ratio load	12.50
Vector-efficiency ratio store	12.50
Vector-efficiency ratio mul	12.50
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	12.50
Vector-efficiency ratio other	14.66

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	hypre_BoomerAMGBuildMultipass.omp_outlined.20
Source file and lines	par_multi_interp.c:1774-1876
Module	exec

The loop is defined in /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1774-1876.

Analyzed code is defined in /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1774-1776,1779-1782,1789-1792,1799,1805,1811,1837,1840,1867,1871-1875.

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Failed to get the number of paths (too many, greater than internal limit = 100000)
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is very high. Force analysis with --force-loop-streams-analysis: expect potentially high RAM/CPU footprint

Try to simplify control.

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 26.75 to 10.00 cycles (2.67x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your loop is probably not vectorized. Only 13% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your loop, you can lower the cost of an iteration from 26.75 to 3.34 cycles (8.00x speedup).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with ffast-math (included in Ofast) to extend loop vectorization to FP reductions.
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Performance is limited by:

reading data from caches/RAM (load units are a bottleneck)
writing data to caches/RAM (the store unit is a bottleneck)

By removing all these bottlenecks, you can lower the cost of an iteration from 26.75 to 25.13 cycles (1.06x speedup).

Workaround

Read less array elements
Write less array elements
Provide more information to your compiler:
- hardcode the bounds of the corresponding 'for' loop
- use the 'restrict' C99 keyword

No data for this section

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

VUCOMISD: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1871

Type of elements and instruction set

3 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 2 FP arithmetical operations:

1: multiply
1: divide

The binary loop is loading 736 bytes (92 double precision FP elements). The binary loop is storing 120 bytes (15 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.00 FP operations per loaded or stored byte.

General properties

nb instructions	206
nb uops	201
loop length	963
used x86 registers	13
used mmx registers	0
used xmm registers	5
used ymm registers	1
used zmm registers	1
nb stack references	55

Front-end

ASSUMED MACRO FUSION FIT IN UOP CACHE

micro-operation queue	25.13 cycles
front end	25.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	12.50	12.50	12.50	12.50	12.50	12.50	26.75	26.75	26.75	26.75	1.25	3.00	2.50	1.25	0.50	0.50
cycles	12.50	12.50	12.50	12.50	12.50	12.50	26.75	26.75	26.75	26.75	1.25	3.00	2.50	1.25	0.50	0.50

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

4.00

Cycles summary

Front-end	25.13
Dispatch	26.75
DIV/SQRT	4.00
Overall L1	26.75

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	41%
load	0%
store	NA (no store vectorizable/vectorized instructions)
mul	0%
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	50%

INT+FP

all	9%
load	0%
store	0%
mul	0%
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	17%

Vector efficiency ratios

INT

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	12%

all	17%
load	12%
store	NA (no store vectorizable/vectorized instructions)
mul	12%
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	12%
other	18%

INT+FP

all	13%
load	12%
store	12%
mul	12%
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	12%
other	14%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 26.75 cycles. At this rate:

10% of peak load performance is reached (27.51 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
3% of peak store performance is reached (4.49 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the loop is: 26e6d7

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
MOV -0xe8(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
INC %RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RDX,-0x118(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JLE 26f21f <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xfef>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RDX,-0xe8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0xd8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xa8(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX,%RDX,8),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x1e8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX,%R8,8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x8(%RSI,%R8,8),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RSI,%R8,8),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%RDX,%RAX,1),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUB %RCX,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RSI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JGE 26e737 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x507>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x1e0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xa0(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x1d8(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x50(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x190(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%RDX,%R8,8),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX,%R8,8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x8(%RDX,%R8,8),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%RDX,%RAX,1),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUB %RCX,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RSI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JGE 26e797 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x567>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x1d0(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x1c8(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x1c0(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%RDI,%R8,8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x8(%RDI,%R8,8),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMP %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JL 26e87c <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x64c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x1b8(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x40(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x1b0(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV -0x1a8(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R9,%R8,8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x8(%R9,%R8,8),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMP %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JL 26e8ac <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x67c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x1a0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VXORPD %XMM4,%XMM4,%XMM4	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV (%RAX,%R8,8),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x8(%RAX,%R8,8),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA 0x1(%RDX),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RDX,-0xe0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CMP %R11,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JGE 26e9c0 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x790>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x140(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x100(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xf0(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x110(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xf8(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x88(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDI),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV -0x90(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMPQ $0x1,(%RAX)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOV (%R9),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV %R11,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%RDX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDI),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JNE 26ed10 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xae0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
VXORPD %XMM3,%XMM3,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
JMP 26e8dd <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x6ad>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
VXORPD %XMM3,%XMM3,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV -0x198(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX,%R8,8),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x8(%RAX,%R8,8),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMP %RDI,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JGE 26eca0 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xa70>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x148(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R13),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x178(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x110(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x180(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xc0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x108(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xb8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x150(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x168(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDX,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x158(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDX,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x160(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDX,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R9,-0x70(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x170(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMPQ $0,-0x138(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOV %RDI,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%RDX),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
JE 26ee3b <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xc0b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x130(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDX,-0xc8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CMP $0x1,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 26eba9 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x979>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
JMP 26eab9 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x889>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV -0x68(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV -0x60(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x58(%RBP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV -0x188(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xe0(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMULSD (%RAX,%RCX,8),%XMM4,%XMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
VUCOMISD %XMM0,%XMM4	2	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0.50	0.50	6	0.50	scal (12.5%)
JNE 26ecc7 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xa97>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
JNP 26eccf <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xa9f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
VXORPD %XMM1,%XMM3,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
VDIVSD %XMM4,%XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	4	scal (12.5%)
MOV -0xa8(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xb0(%RBP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%RCX,%R8,8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x8(%RCX,%R8,8),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RCX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %RAX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JLE 26f104 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xed4>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x4,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JB 26f0f0 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xec0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x20,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JAE 26f045 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xe15>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 26f0b1 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xe81>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV -0x108(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VXORPD %XMM3,%XMM3,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JMP 26ed40 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xb10>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
CMP $0x1,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 26ef59 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xd29>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
JMP 26ee69 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xc39>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV -0x128(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VBROADCASTSD %XMM2,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
MOV %RDX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x20,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
LEA (%RDI,%RAX,8),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP %RSI,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 26f104 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xed4>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
TEST $0x1c,%DL	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JE 26f0ec <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xebc>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RDX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x4,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA (%R11,%RAX,8),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VBROADCASTSD %XMM2,%YMM3	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
ADD %RDI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMP %RDI,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 26f0f0 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xec0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
JMP 26f104 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xed4>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %RSI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV -0xa0(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RCX,%R8,8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x8(%RCX,%R8,8),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RCX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %RAX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JLE 26e6c0 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x490>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x4,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JAE 26f130 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xf00>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x50(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JMP 26f200 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xfd0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
CMP $0x20,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JAE 26f13a <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xf0a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 26f1b5 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xf85>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV -0x120(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VBROADCASTSD %XMM2,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
MOV %RDX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x20,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %R8D,%R8D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
LEA (%RDI,%RAX,8),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMP %RSI,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 26e6c0 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x490>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
TEST $0x1c,%DL	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JE 26f217 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xfe7>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x50(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x4,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VBROADCASTSD %XMM2,%YMM3	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
LEA (%R8,%RAX,8),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %RDI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMP %RDI,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x50(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JE 26e6c0 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x490>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
JMP 26e6c0 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x490>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %RSI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 26f126 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xef6>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A

Function	hypre_BoomerAMGBuildMultipass.omp_outlined.20
Source file and lines	par_multi_interp.c:1774-1876
Module	exec

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Failed to get the number of paths (too many, greater than internal limit = 100000)
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is very high. Force analysis with --force-loop-streams-analysis: expect potentially high RAM/CPU footprint

Try to simplify control.

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

Workaround

Try another compiler or update/tune your current one:
- recompile with ffast-math (included in Ofast) to extend loop vectorization to FP reductions.
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Performance is limited by:

reading data from caches/RAM (load units are a bottleneck)
writing data to caches/RAM (the store unit is a bottleneck)

By removing all these bottlenecks, you can lower the cost of an iteration from 26.75 to 25.13 cycles (1.06x speedup).

Workaround

Read less array elements
Write less array elements
Provide more information to your compiler:
- hardcode the bounds of the corresponding 'for' loop
- use the 'restrict' C99 keyword

No data for this section

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

VUCOMISD: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1871

Type of elements and instruction set

3 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 2 FP arithmetical operations:

1: multiply
1: divide

The binary loop is loading 736 bytes (92 double precision FP elements). The binary loop is storing 120 bytes (15 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.00 FP operations per loaded or stored byte.

General properties

nb instructions	206
nb uops	201
loop length	963
used x86 registers	13
used mmx registers	0
used xmm registers	5
used ymm registers	1
used zmm registers	1
nb stack references	55

Front-end

ASSUMED MACRO FUSION FIT IN UOP CACHE

micro-operation queue	25.13 cycles
front end	25.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	12.50	12.50	12.50	12.50	12.50	12.50	26.75	26.75	26.75	26.75	1.25	3.00	2.50	1.25	0.50	0.50
cycles	12.50	12.50	12.50	12.50	12.50	12.50	26.75	26.75	26.75	26.75	1.25	3.00	2.50	1.25	0.50	0.50

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

4.00

Cycles summary

Front-end	25.13
Dispatch	26.75
DIV/SQRT	4.00
Overall L1	26.75

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	41%
load	0%
store	NA (no store vectorizable/vectorized instructions)
mul	0%
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	50%

INT+FP

all	9%
load	0%
store	0%
mul	0%
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	17%

Vector efficiency ratios

INT

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	12%

all	17%
load	12%
store	NA (no store vectorizable/vectorized instructions)
mul	12%
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	12%
other	18%

INT+FP

all	13%
load	12%
store	12%
mul	12%
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	12%
other	14%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 26.75 cycles. At this rate:

10% of peak load performance is reached (27.51 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
3% of peak store performance is reached (4.49 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the loop is: 26e6d7

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
MOV -0xe8(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
INC %RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RDX,-0x118(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JLE 26f21f <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xfef>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RDX,-0xe8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0xd8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xa8(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX,%RDX,8),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x1e8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX,%R8,8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x8(%RSI,%R8,8),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RSI,%R8,8),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%RDX,%RAX,1),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUB %RCX,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RSI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JGE 26e737 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x507>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x1e0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xa0(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x1d8(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x50(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x190(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%RDX,%R8,8),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX,%R8,8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x8(%RDX,%R8,8),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%RDX,%RAX,1),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUB %RCX,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RSI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JGE 26e797 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x567>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x1d0(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x1c8(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x1c0(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%RDI,%R8,8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x8(%RDI,%R8,8),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMP %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JL 26e87c <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x64c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x1b8(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x40(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x1b0(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV -0x1a8(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R9,%R8,8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x8(%R9,%R8,8),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMP %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JL 26e8ac <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x67c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x1a0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VXORPD %XMM4,%XMM4,%XMM4	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV (%RAX,%R8,8),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x8(%RAX,%R8,8),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA 0x1(%RDX),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RDX,-0xe0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CMP %R11,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JGE 26e9c0 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x790>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x140(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x100(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xf0(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x110(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xf8(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x88(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDI),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV -0x90(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMPQ $0x1,(%RAX)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOV (%R9),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV %R11,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%RDX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDI),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JNE 26ed10 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xae0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
VXORPD %XMM3,%XMM3,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
JMP 26e8dd <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x6ad>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
VXORPD %XMM3,%XMM3,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV -0x198(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX,%R8,8),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x8(%RAX,%R8,8),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMP %RDI,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JGE 26eca0 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xa70>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x148(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R13),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x178(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x110(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x180(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xc0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x108(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xb8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x150(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x168(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDX,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x158(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDX,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x160(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDX,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R9,-0x70(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x170(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMPQ $0,-0x138(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOV %RDI,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%RDX),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
JE 26ee3b <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xc0b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x130(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDX,-0xc8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CMP $0x1,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 26eba9 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x979>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
JMP 26eab9 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x889>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV -0x68(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV -0x60(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x58(%RBP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV -0x188(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xe0(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMULSD (%RAX,%RCX,8),%XMM4,%XMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
VUCOMISD %XMM0,%XMM4	2	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0.50	0.50	6	0.50	scal (12.5%)
JNE 26ecc7 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xa97>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
JNP 26eccf <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xa9f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
VXORPD %XMM1,%XMM3,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
VDIVSD %XMM4,%XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	4	scal (12.5%)
MOV -0xa8(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0xb0(%RBP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%RCX,%R8,8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x8(%RCX,%R8,8),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RCX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %RAX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JLE 26f104 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xed4>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x4,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JB 26f0f0 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xec0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x20,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JAE 26f045 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xe15>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 26f0b1 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xe81>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV -0x108(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VXORPD %XMM3,%XMM3,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JMP 26ed40 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xb10>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
CMP $0x1,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 26ef59 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xd29>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
JMP 26ee69 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xc39>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV -0x128(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VBROADCASTSD %XMM2,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
MOV %RDX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x20,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
LEA (%RDI,%RAX,8),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP %RSI,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 26f104 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xed4>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
TEST $0x1c,%DL	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JE 26f0ec <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xebc>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RDX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x4,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA (%R11,%RAX,8),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VBROADCASTSD %XMM2,%YMM3	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
ADD %RDI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMP %RDI,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 26f0f0 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xec0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
JMP 26f104 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xed4>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %RSI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV -0xa0(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RCX,%R8,8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x8(%RCX,%R8,8),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RCX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %RAX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JLE 26e6c0 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x490>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x4,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JAE 26f130 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xf00>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x50(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JMP 26f200 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xfd0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
CMP $0x20,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JAE 26f13a <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xf0a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 26f1b5 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xf85>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV -0x120(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VBROADCASTSD %XMM2,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
MOV %RDX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x20,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %R8D,%R8D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
LEA (%RDI,%RAX,8),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMP %RSI,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 26e6c0 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x490>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
TEST $0x1c,%DL	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JE 26f217 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xfe7>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x50(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x4,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VBROADCASTSD %XMM2,%YMM3	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50	scal (12.5%)
LEA (%R8,%RAX,8),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %RDI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMP %RDI,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x50(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JE 26e6c0 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x490>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
JMP 26e6c0 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0x490>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %RSI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 26f126 <hypre_BoomerAMGBuildMultipass.omp_outlined.20+0xef6>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

Workaround

Complex instructions

Details

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

Workaround

Complex instructions

Details

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code