OV - exec - Function hypre_BoomerAMGBuildMultipass.omp

	Function: hypre_BoomerAMGBuildMultipass.omp_outlined.18	Module: exec	Source: par_multi_interp.c:1575-1663 [...]	Coverage (incl. loops): 0.61% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 1575 - 1663

--------------------------------------------------------------------------------

1575: #pragma omp parallel private(thread_start,thread_stop,my_thread_num,num_threads,k,k1,i,i1,j,j1,sum_C,sum_N,j_start,j_end,cnt,tmp_marker,tmp_marker_offd,cnt_offd,diagonal,alfa)

[...]

1585:            if (n_fine)

1586:            {   tmp_marker = hypre_CTAlloc(HYPRE_Int,n_fine); }

1587:            tmp_marker_offd = NULL;

1588:            if (num_cols_offd)

1589:            {   tmp_marker_offd = hypre_CTAlloc(HYPRE_Int,num_cols_offd); }

1590:            for (i=0; i < n_fine; i++)

1591:            {   tmp_marker[i] = -1; }

1592:            for (i=0; i < num_cols_offd; i++)

1593:            {   tmp_marker_offd[i] = -1; }

1594:

1595:            /* Compute this thread's range of pass_length */

1596:            my_thread_num = hypre_GetThreadNum();

1597:            num_threads = hypre_NumActiveThreads();

1598:            thread_start = pass_pointer[1] + (pass_length/num_threads)*my_thread_num;

1599:            if (my_thread_num == num_threads-1)

[...]

1605:            for (i=thread_start; i < thread_stop; i++)

1606:            {

1607:              i1 = pass_array[i];

1608:              sum_C = 0;

1609:              sum_N = 0;

1610:              j_start = P_diag_start[i1];

1611:              j_end = j_start+P_diag_i[i1+1]-P_diag_i[i1];

1612:              for (j=j_start; j < j_end; j++)

1613:              {

1614:                 k1 = P_diag_pass[1][j];

1615:                 tmp_marker[C_array[k1]] = i1;

1616:              }

1617:              cnt = P_diag_i[i1];

1618:              for (j=A_diag_i[i1]+1; j < A_diag_i[i1+1]; j++)

1619:              {

1620:                 j1 = A_diag_j[j];

1621:                 if (CF_marker[j1] != -3 &&

1622:                    (num_functions == 1 || dof_func[i1] == dof_func[j1]))

1623:                    sum_N += A_diag_data[j];

1624:                 if (j1 != -1 && tmp_marker[j1] == i1)

1625:                 {

1626:                    P_diag_data[cnt] = A_diag_data[j];

1627:                    P_diag_j[cnt++] = fine_to_coarse[j1];

1628:                    sum_C += A_diag_data[j];

1629:                 }

1630:              }

1631:              j_start = P_offd_start[i1];

1632:              j_end = j_start+P_offd_i[i1+1]-P_offd_i[i1];

1633:              for (j=j_start; j < j_end; j++)

1634:              {

1635:                 k1 = P_offd_pass[1][j];

1636:                 tmp_marker_offd[C_array_offd[k1]] = i1;

1637:              }

1638:              cnt_offd = P_offd_i[i1];

1639:              for (j=A_offd_i[i1]; j < A_offd_i[i1+1]; j++)

1640:              {

1641:                 if (col_offd_S_to_A)

1642:                     j1 = map_A_to_S[A_offd_j[j]];

1643:                 else

1644:                     j1 = A_offd_j[j];

1645:                 if (CF_marker_offd[j1] != -3 &&

1646:                   (num_functions == 1 || dof_func[i1] == dof_func_offd[j1]))

1647:                     sum_N += A_offd_data[j];

1648:                 if (j1 != -1 && tmp_marker_offd[j1] == i1)

1649:                 {

1650:                    P_offd_data[cnt_offd] = A_offd_data[j];

1651:                    P_offd_j[cnt_offd++] = map_S_to_new[j1];

1652:                    sum_C += A_offd_data[j];

1653:                 }

1654:              }

1655:              diagonal = A_diag_data[A_diag_i[i1]];

1656:              if (sum_C*diagonal) alfa = -sum_N/(sum_C*diagonal);

1657:              for (j=P_diag_i[i1]; j < cnt; j++)

1658:                 P_diag_data[j] *= alfa;

1659:              for (j=P_offd_i[i1]; j < cnt_offd; j++)

1660:                 P_offd_data[j] *= alfa;

1661:           }

1662:           hypre_TFree(tmp_marker);

1663:           hypre_TFree(tmp_marker_offd);

0x26d910 PUSH	%RBP

0x26d911 MOV	%RSP,%RBP

0x26d914 PUSH	%R15

0x26d916 PUSH	%R14

0x26d918 PUSH	%R13

0x26d91a PUSH	%R12

0x26d91c PUSH	%RBX

0x26d91d SUB	$0x138,%RSP

0x26d924 MOV	%R9,-0xb0(%RBP)

0x26d92b MOV	%R8,-0xa8(%RBP)

0x26d932 MOV	(%RDX),%RDI

0x26d935 MOV	%RCX,%R13

0x26d938 MOV	%RDX,%R15

0x26d93b MOV	0xe8(%RBP),%RAX

0x26d942 MOV	%RAX,-0x150(%RBP)

0x26d949 MOV	0xe0(%RBP),%RAX

0x26d950 MOV	%RAX,-0x148(%RBP)

0x26d957 MOV	0xd8(%RBP),%RAX

0x26d95e MOV	%RAX,-0xc8(%RBP)

0x26d965 MOV	0xd0(%RBP),%RAX

0x26d96c MOV	%RAX,-0x140(%RBP)

0x26d973 MOV	0xc8(%RBP),%RAX

0x26d97a MOV	%RAX,-0x138(%RBP)

0x26d981 MOV	0xc0(%RBP),%RAX

0x26d988 MOV	%RAX,-0x78(%RBP)

0x26d98c MOV	0xb8(%RBP),%RAX

0x26d993 MOV	%RAX,-0x130(%RBP)

0x26d99a MOV	0xb0(%RBP),%RAX

0x26d9a1 MOV	%RAX,-0xf0(%RBP)

0x26d9a8 MOV	0xa8(%RBP),%RAX

0x26d9af MOV	%RAX,-0x30(%RBP)

0x26d9b3 MOV	0xa0(%RBP),%RAX

0x26d9ba MOV	%RAX,-0x40(%RBP)

0x26d9be MOV	0x98(%RBP),%RAX

0x26d9c5 MOV	%RAX,-0x70(%RBP)

0x26d9c9 MOV	0x90(%RBP),%RAX

0x26d9d0 MOV	%RAX,-0x68(%RBP)

0x26d9d4 MOV	0x88(%RBP),%RAX

0x26d9db MOV	%RAX,-0x60(%RBP)

0x26d9df MOV	0x80(%RBP),%RAX

0x26d9e6 MOV	%RAX,-0x58(%RBP)

0x26d9ea MOV	0x78(%RBP),%RAX

0x26d9ee MOV	%RAX,-0x128(%RBP)

0x26d9f5 MOV	0x70(%RBP),%RAX

0x26d9f9 MOV	%RAX,-0x120(%RBP)

0x26da00 MOV	0x68(%RBP),%RAX

0x26da04 MOV	%RAX,-0xc0(%RBP)

0x26da0b MOV	0x60(%RBP),%RAX

0x26da0f MOV	%RAX,-0xb8(%RBP)

0x26da16 MOV	0x58(%RBP),%RAX

0x26da1a MOV	%RAX,-0xd0(%RBP)

0x26da21 MOV	0x50(%RBP),%RAX

0x26da25 MOV	%RAX,-0x48(%RBP)

0x26da29 MOV	0x48(%RBP),%RAX

0x26da2d MOV	%RAX,-0x38(%RBP)

0x26da31 MOV	0x40(%RBP),%RAX

0x26da35 MOV	%RAX,-0xa0(%RBP)

0x26da3c MOV	0x38(%RBP),%RAX

0x26da40 MOV	%RAX,-0x50(%RBP)

0x26da44 MOV	0x30(%RBP),%RAX

0x26da48 MOV	%RAX,-0x90(%RBP)

0x26da4f MOV	0x28(%RBP),%RAX

0x26da53 MOV	%RAX,-0x88(%RBP)

0x26da5a MOV	0x20(%RBP),%RAX

0x26da5e MOV	%RAX,-0x80(%RBP)

0x26da62 MOV	0x18(%RBP),%RAX

0x26da66 MOV	%RAX,-0x98(%RBP)

0x26da6d MOV	0x10(%RBP),%R12

0x26da71 TEST	%RDI,%RDI

0x26da74 JE	26daa1

0x26da76 MOV	$0x8,%ESI

0x26da7b CALL	2de630 <hypre_CAlloc>

0x26da80 MOV	%RAX,%RBX

0x26da83 MOV	(%R13),%RDI

0x26da87 TEST	%RDI,%RDI

0x26da8a JE	26daac

0x26da8c MOV	$0x8,%ESI

0x26da91 CALL	2de630 <hypre_CAlloc>

0x26da96 MOV	%RAX,%R14

0x26da99 CMPQ	$0,(%R15)

0x26da9d JG	26dab5

0x26da9f JMP	26dad0

0x26daa1 XOR	%EBX,%EBX

0x26daa3 MOV	(%R13),%RDI

0x26daa7 TEST	%RDI,%RDI

0x26daaa JNE	26da8c

0x26daac XOR	%R14D,%R14D

0x26daaf CMPQ	$0,(%R15)

0x26dab3 JLE	26dad0

0x26dab5 XOR	%EAX,%EAX

0x26dab7 NOPW	(%RAX,%RAX,1)

(1027) 0x26dac0 MOVQ	$-0x1,(%RBX,%RAX,8)

(1027) 0x26dac8 INC	%RAX

(1027) 0x26dacb CMP	%RAX,(%R15)

(1027) 0x26dace JG	26dac0

0x26dad0 CMPQ	$0,(%R13)

0x26dad5 JLE	26daf1

0x26dad7 XOR	%EAX,%EAX

0x26dad9 NOPL	(%RAX)

(1040) 0x26dae0 MOVQ	$-0x1,(%R14,%RAX,8)

(1040) 0x26dae8 INC	%RAX

(1040) 0x26daeb CMP	%RAX,(%R13)

(1040) 0x26daef JG	26dae0

0x26daf1 CALL	2e0210 <hypre_GetThreadNum>

0x26daf6 MOV	%RAX,%R15

0x26daf9 CALL	2e0200 <hypre_NumActiveThreads>

0x26dafe MOV	-0xb0(%RBP),%RDX

0x26db05 MOV	%RAX,%RCX

0x26db08 MOV	(%RDX),%RSI

0x26db0b MOV	%RSI,%RAX

0x26db0e CQTO

0x26db10 IDIV	%RCX

0x26db13 LEA	0x1(%R15),%RDX

0x26db17 DEC	%RCX

0x26db1a IMUL	%RAX,%RDX

0x26db1e MOV	%RAX,%R11

0x26db21 IMUL	%R15,%R11

0x26db25 CMP	%RCX,%R15

0x26db28 CMOVE	%RSI,%RDX

0x26db2c MOV	%RDX,-0xd8(%RBP)

0x26db33 CMP	%RDX,%R11

0x26db36 JGE	26e207

0x26db3c MOV	-0xa8(%RBP),%RAX

0x26db43 VMOVDDUP	-0x5e79b(%RIP),%XMM1

0x26db4b VXORPD	%XMM0,%XMM0,%XMM0

0x26db4f MOV	(%RAX),%RCX

0x26db52 MOV	(%R12),%RAX

0x26db56 MOV	0x8(%RCX),%RCX

0x26db5a ADD	%RCX,-0xd8(%RBP)

0x26db61 MOV	%RAX,-0x160(%RBP)

0x26db68 ADD	%RCX,%R11

0x26db6b MOV	-0x98(%RBP),%RAX

0x26db72 MOV	(%RAX),%RAX

0x26db75 MOV	%RAX,-0x98(%RBP)

0x26db7c MOV	-0x80(%RBP),%RAX

0x26db80 MOV	-0x88(%RBP),%RCX

0x26db87 MOV	(%RAX),%RDX

0x26db8a MOV	(%RCX),%RAX

0x26db8d MOV	%RAX,-0x118(%RBP)

0x26db94 MOV	-0x90(%RBP),%RAX

0x26db9b MOV	(%RAX),%RAX

0x26db9e MOV	%RAX,-0x110(%RBP)

0x26dba5 MOV	-0x50(%RBP),%RAX

0x26dba9 MOV	(%RAX),%RAX

0x26dbac MOV	%RAX,-0x50(%RBP)

0x26dbb0 MOV	-0xa0(%RBP),%RAX

0x26dbb7 MOV	(%RAX),%RAX

0x26dbba MOV	%RAX,-0xb0(%RBP)

0x26dbc1 MOV	-0x38(%RBP),%RAX

0x26dbc5 MOV	(%RAX),%RAX

0x26dbc8 MOV	%RAX,-0xa8(%RBP)

0x26dbcf MOV	-0x58(%RBP),%RAX

0x26dbd3 MOV	(%RAX),%RAX

0x26dbd6 MOV	%RAX,-0x88(%RBP)

0x26dbdd MOV	-0x60(%RBP),%RAX

0x26dbe1 MOV	(%RAX),%RAX

0x26dbe4 MOV	%RAX,-0x38(%RBP)

0x26dbe8 MOV	-0x68(%RBP),%RAX

0x26dbec MOV	(%RAX),%RAX

0x26dbef MOV	%RAX,-0x108(%RBP)

0x26dbf6 MOV	-0x70(%RBP),%RAX

0x26dbfa MOV	(%RAX),%RAX

0x26dbfd MOV	%RAX,-0x100(%RBP)

0x26dc04 MOV	-0x40(%RBP),%RAX

0x26dc08 MOV	(%RAX),%RAX

0x26dc0b MOV	%RAX,-0x40(%RBP)

0x26dc0f MOV	-0x30(%RBP),%RAX

0x26dc13 MOV	(%RAX),%RAX

0x26dc16 MOV	%RAX,-0xf8(%RBP)

0x26dc1d MOV	-0x78(%RBP),%RAX

0x26dc21 MOV	(%RAX),%RAX

0x26dc24 MOV	%RAX,-0x78(%RBP)

0x26dc28 MOV	-0xb8(%RBP),%RAX

0x26dc2f MOV	(%RAX),%RAX

0x26dc32 MOV	%RAX,-0x80(%RBP)

0x26dc36 MOV	-0xc0(%RBP),%RAX

0x26dc3d MOV	(%RAX),%RAX

0x26dc40 MOV	%RAX,-0x158(%RBP)

0x26dc47 ADD	$0xc0,%RAX

0x26dc4d MOV	-0xc8(%RBP),%RCX

0x26dc54 MOV	%RAX,-0xe8(%RBP)

0x26dc5b MOV	(%RCX),%RDI

0x26dc5e LEA	0xc0(%RDI),%RAX

0x26dc65 MOV	%RAX,-0xe0(%RBP)

0x26dc6c MOV	%RDX,-0x90(%RBP)

0x26dc73 JMP	26dc97

0x26dc75 NOPW	%CS:(%RAX,%RAX,1)

(1028) 0x26dc80 MOV	-0xa0(%RBP),%R11

(1028) 0x26dc87 INC	%R11

(1028) 0x26dc8a CMP	%R11,-0xd8(%RBP)

(1028) 0x26dc91 JLE	26e207

(1028) 0x26dc97 MOV	-0x160(%RBP),%RCX

(1028) 0x26dc9e MOV	(%RCX,%R11,8),%R8

(1028) 0x26dca2 MOV	-0x98(%RBP),%RCX

(1028) 0x26dca9 MOV	%R11,-0xa0(%RBP)

(1028) 0x26dcb0 MOV	(%RCX,%R8,8),%RCX

(1028) 0x26dcb4 MOV	0x8(%RDX,%R8,8),%RSI

(1028) 0x26dcb9 MOV	(%RDX,%R8,8),%R9

(1028) 0x26dcbd LEA	(%RSI,%RCX,1),%R10

(1028) 0x26dcc1 SUB	%R9,%R10

(1028) 0x26dcc4 CMP	%R10,%RCX

(1028) 0x26dcc7 JGE	26dd08

(1028) 0x26dcc9 SUB	%R9,%RSI

(1028) 0x26dccc MOV	-0x118(%RBP),%R9

(1028) 0x26dcd3 SAL	$0x3,%RCX

(1028) 0x26dcd7 MOV	-0x110(%RBP),%R11

(1028) 0x26dcde ADD	0x8(%R9),%RCX

(1028) 0x26dce2 XOR	%R9D,%R9D

(1028) 0x26dce5 NOPW	%CS:(%RAX,%RAX,1)

  (1039) 0x26dcf0 MOV	(%RCX,%R9,8),%R10

  (1039) 0x26dcf4 INC	%R9

  (1039) 0x26dcf7 MOV	(%R11,%R10,8),%R10

  (1039) 0x26dcfb MOV	%R8,(%RBX,%R10,8)

  (1039) 0x26dcff CMP	%R9,%RSI

  (1039) 0x26dd02 JNE	26dcf0

(1028) 0x26dd04 MOV	(%RDX,%R8,8),%R9

(1028) 0x26dd08 MOV	-0x50(%RBP),%RDX

(1028) 0x26dd0c VXORPD	%XMM4,%XMM4,%XMM4

(1028) 0x26dd10 MOV	(%RDX,%R8,8),%RCX

(1028) 0x26dd14 MOV	0x8(%RDX,%R8,8),%R11

(1028) 0x26dd19 INC	%RCX

(1028) 0x26dd1c CMP	%R11,%RCX

(1028) 0x26dd1f JGE	26dde0

(1028) 0x26dd25 MOV	-0xd0(%RBP),%RDX

(1028) 0x26dd2c MOV	-0x128(%RBP),%R15

(1028) 0x26dd33 MOV	-0xb8(%RBP),%R10

(1028) 0x26dd3a MOV	-0xc0(%RBP),%RAX

(1028) 0x26dd41 VXORPD	%XMM3,%XMM3,%XMM3

(1028) 0x26dd45 MOV	(%RDX),%RSI

(1028) 0x26dd48 MOV	(%R15),%RDX

(1028) 0x26dd4b MOV	(%R10),%R10

(1028) 0x26dd4e MOV	(%RAX),%RAX

(1028) 0x26dd51 MOV	%RDX,-0x30(%RBP)

(1028) 0x26dd55 MOV	-0x120(%RBP),%RDX

(1028) 0x26dd5c MOV	(%RDX),%R13

(1028) 0x26dd5f MOV	-0x48(%RBP),%RDX

(1028) 0x26dd63 JMP	26dd78

0x26dd65 NOPW	%CS:(%RAX,%RAX,1)

  (1038) 0x26dd70 INC	%RCX

  (1038) 0x26dd73 CMP	%R11,%RCX

  (1038) 0x26dd76 JGE	26dde4

  (1038) 0x26dd78 MOV	-0xb0(%RBP),%R15

  (1038) 0x26dd7f MOV	-0xa8(%RBP),%R12

  (1038) 0x26dd86 MOV	(%R15,%RCX,8),%R15

  (1038) 0x26dd8a CMPQ	$-0x3,(%R12,%R15,8)

  (1038) 0x26dd8f JE	26dda7

  (1038) 0x26dd91 CMPQ	$0x1,(%RDX)

  (1038) 0x26dd95 JE	26dda1

  (1038) 0x26dd97 MOV	(%RSI,%R8,8),%R12

  (1038) 0x26dd9b CMP	%R12,(%RSI,%R15,8)

  (1038) 0x26dd9f JNE	26dda7

  (1038) 0x26dda1 VADDSD	(%R10,%RCX,8),%XMM3,%XMM3

  (1038) 0x26dda7 CMP	$-0x1,%R15

  (1038) 0x26ddab JE	26dd70

  (1038) 0x26ddad CMP	%R8,(%RBX,%R15,8)

  (1038) 0x26ddb1 JNE	26dd70

  (1038) 0x26ddb3 VMOVSD	(%R10,%RCX,8),%XMM5

  (1038) 0x26ddb9 MOV	-0x30(%RBP),%R11

  (1038) 0x26ddbd VMOVSD	%XMM5,(%RAX,%R9,8)

  (1038) 0x26ddc3 MOV	(%R11,%R15,8),%R11

  (1038) 0x26ddc7 MOV	%R11,(%R13,%R9,8)

  (1038) 0x26ddcc MOV	-0x50(%RBP),%R11

  (1038) 0x26ddd0 INC	%R9

  (1038) 0x26ddd3 VADDSD	(%R10,%RCX,8),%XMM4,%XMM4

  (1038) 0x26ddd9 MOV	0x8(%R11,%R8,8),%R11

  (1038) 0x26ddde JMP	26dd70

(1028) 0x26dde0 VXORPD	%XMM3,%XMM3,%XMM3

(1028) 0x26dde4 MOV	-0x88(%RBP),%RCX

(1028) 0x26ddeb MOV	-0x38(%RBP),%RDX

(1028) 0x26ddef MOV	(%RCX,%R8,8),%RCX

(1028) 0x26ddf3 MOV	0x8(%RDX,%R8,8),%RSI

(1028) 0x26ddf8 MOV	(%RDX,%R8,8),%R11

(1028) 0x26ddfc LEA	(%RSI,%RCX,1),%R10

(1028) 0x26de00 SUB	%R11,%R10

(1028) 0x26de03 CMP	%R10,%RCX

(1028) 0x26de06 JGE	26de4c

(1028) 0x26de08 MOV	-0x108(%RBP),%RDX

(1028) 0x26de0f SAL	$0x3,%RCX

(1028) 0x26de13 SUB	%R11,%RSI

(1028) 0x26de16 XOR	%R10D,%R10D

(1028) 0x26de19 ADD	0x8(%RDX),%RCX

(1028) 0x26de1d MOV	-0x100(%RBP),%RDX

(1028) 0x26de24 NOPW	%CS:(%RAX,%RAX,1)

  (1037) 0x26de30 MOV	(%RCX,%R10,8),%R11

  (1037) 0x26de34 INC	%R10

  (1037) 0x26de37 MOV	(%RDX,%R11,8),%R11

  (1037) 0x26de3b MOV	%R8,(%R14,%R11,8)

  (1037) 0x26de3f CMP	%R10,%RSI

  (1037) 0x26de42 JNE	26de30

(1028) 0x26de44 MOV	-0x38(%RBP),%RCX

(1028) 0x26de48 MOV	(%RCX,%R8,8),%R11

(1028) 0x26de4c MOV	-0x40(%RBP),%RCX

(1028) 0x26de50 MOV	(%RCX,%R8,8),%R15

(1028) 0x26de54 MOV	0x8(%RCX,%R8,8),%R10

(1028) 0x26de59 CMP	%R10,%R15

(1028) 0x26de5c JGE	26dff0

(1028) 0x26de62 MOV	-0xd0(%RBP),%RDX

(1028) 0x26de69 MOV	-0x130(%RBP),%RCX

(1028) 0x26de70 MOV	(%RDX),%RAX

(1028) 0x26de73 MOV	(%RCX),%RCX

(1028) 0x26de76 MOV	%RAX,-0x60(%RBP)

(1028) 0x26de7a MOV	-0x138(%RBP),%RDX

(1028) 0x26de81 MOV	(%RDX),%RAX

(1028) 0x26de84 MOV	%RAX,-0x58(%RBP)

(1028) 0x26de88 MOV	-0xc8(%RBP),%RAX

(1028) 0x26de8f MOV	-0x140(%RBP),%RDX

(1028) 0x26de96 MOV	(%RAX),%RAX

(1028) 0x26de99 MOV	(%RDX),%RSI

(1028) 0x26de9c MOV	%RAX,-0x30(%RBP)

(1028) 0x26dea0 MOV	-0x150(%RBP),%RDX

(1028) 0x26dea7 MOV	(%RDX),%RAX

(1028) 0x26deaa MOV	%RAX,-0x70(%RBP)

(1028) 0x26deae MOV	-0x148(%RBP),%RDX

(1028) 0x26deb5 MOV	(%RDX),%RAX

(1028) 0x26deb8 MOV	%RAX,-0x68(%RBP)

(1028) 0x26debc CMPQ	$0,-0xf8(%RBP)

(1028) 0x26dec4 JE	26df69

(1028) 0x26deca MOV	-0xf0(%RBP),%RDX

(1028) 0x26ded1 MOV	(%RDX),%R13

(1028) 0x26ded4 MOV	-0x48(%RBP),%RDX

(1028) 0x26ded8 JMP	26deec

0x26deda NOPW	(%RAX,%RAX,1)

  (1036) 0x26dee0 INC	%R15

  (1036) 0x26dee3 CMP	%R10,%R15

  (1036) 0x26dee6 JGE	26dff0

  (1036) 0x26deec MOV	(%RCX,%R15,8),%R12

  (1036) 0x26def0 MOV	-0x78(%RBP),%RAX

  (1036) 0x26def4 MOV	(%R13,%R12,8),%R12

  (1036) 0x26def9 CMPQ	$-0x3,(%RAX,%R12,8)

  (1036) 0x26defe JE	26df22

  (1036) 0x26df00 CMPQ	$0x1,(%RDX)

  (1036) 0x26df04 JE	26df1c

  (1036) 0x26df06 MOV	-0x60(%RBP),%RAX

  (1036) 0x26df0a MOV	(%RAX,%R8,8),%RDX

  (1036) 0x26df0e MOV	-0x58(%RBP),%RAX

  (1036) 0x26df12 CMP	(%RAX,%R12,8),%RDX

  (1036) 0x26df16 MOV	-0x48(%RBP),%RDX

  (1036) 0x26df1a JNE	26df22

  (1036) 0x26df1c VADDSD	(%RSI,%R15,8),%XMM3,%XMM3

  (1036) 0x26df22 CMP	$-0x1,%R12

  (1036) 0x26df26 JE	26dee0

  (1036) 0x26df28 CMP	%R8,(%R14,%R12,8)

  (1036) 0x26df2c JNE	26dee0

  (1036) 0x26df2e VMOVSD	(%RSI,%R15,8),%XMM5

  (1036) 0x26df34 MOV	-0x30(%RBP),%RAX

  (1036) 0x26df38 MOV	-0x70(%RBP),%RDX

  (1036) 0x26df3c MOV	-0x68(%RBP),%R10

  (1036) 0x26df40 VMOVSD	%XMM5,(%RAX,%R11,8)

  (1036) 0x26df46 MOV	(%RDX,%R12,8),%RDX

  (1036) 0x26df4a MOV	%RDX,(%R10,%R11,8)

  (1036) 0x26df4e MOV	-0x40(%RBP),%R10

  (1036) 0x26df52 MOV	-0x48(%RBP),%RDX

  (1036) 0x26df56 INC	%R11

  (1036) 0x26df59 VADDSD	(%RSI,%R15,8),%XMM4,%XMM4

  (1036) 0x26df5f MOV	0x8(%R10,%R8,8),%R10

  (1036) 0x26df64 JMP	26dee0

(1028) 0x26df69 MOV	-0x48(%RBP),%RDX

(1028) 0x26df6d JMP	26df78

0x26df6f NOP

  (1035) 0x26df70 INC	%R15

  (1035) 0x26df73 CMP	%R10,%R15

  (1035) 0x26df76 JGE	26dff0

  (1035) 0x26df78 MOV	(%RCX,%R15,8),%R13

  (1035) 0x26df7c MOV	-0x78(%RBP),%R12

  (1035) 0x26df80 CMPQ	$-0x3,(%R12,%R13,8)

  (1035) 0x26df85 JE	26dfa5

  (1035) 0x26df87 CMPQ	$0x1,(%RDX)

  (1035) 0x26df8b JE	26df9f

  (1035) 0x26df8d MOV	-0x60(%RBP),%RAX

  (1035) 0x26df91 MOV	(%RAX,%R8,8),%R12

  (1035) 0x26df95 MOV	-0x58(%RBP),%RAX

  (1035) 0x26df99 CMP	%R12,(%RAX,%R13,8)

  (1035) 0x26df9d JNE	26dfa5

  (1035) 0x26df9f VADDSD	(%RSI,%R15,8),%XMM3,%XMM3

  (1035) 0x26dfa5 CMP	$-0x1,%R13

  (1035) 0x26dfa9 JE	26df70

  (1035) 0x26dfab CMP	%R8,(%R14,%R13,8)

  (1035) 0x26dfaf JNE	26df70

  (1035) 0x26dfb1 VMOVSD	(%RSI,%R15,8),%XMM5

  (1035) 0x26dfb7 MOV	-0x30(%RBP),%RAX

  (1035) 0x26dfbb MOV	-0x70(%RBP),%R10

  (1035) 0x26dfbf MOV	-0x68(%RBP),%R12

  (1035) 0x26dfc3 VMOVSD	%XMM5,(%RAX,%R11,8)

  (1035) 0x26dfc9 MOV	(%R10,%R13,8),%R10

  (1035) 0x26dfcd MOV	%R10,(%R12,%R11,8)

  (1035) 0x26dfd1 MOV	-0x40(%RBP),%R10

  (1035) 0x26dfd5 INC	%R11

  (1035) 0x26dfd8 VADDSD	(%RSI,%R15,8),%XMM4,%XMM4

  (1035) 0x26dfde MOV	0x8(%R10,%R8,8),%R10

  (1035) 0x26dfe3 JMP	26df70

0x26dfe5 NOPW	%CS:(%RAX,%RAX,1)

(1028) 0x26dff0 MOV	-0x50(%RBP),%RCX

(1028) 0x26dff4 MOV	-0x80(%RBP),%RAX

(1028) 0x26dff8 MOV	(%RCX,%R8,8),%RCX

(1028) 0x26dffc VMULSD	(%RAX,%RCX,8),%XMM4,%XMM4

(1028) 0x26e001 VUCOMISD	%XMM0,%XMM4

(1028) 0x26e005 JNE	26e009

(1028) 0x26e007 JNP	26e011

(1028) 0x26e009 VXORPD	%XMM1,%XMM3,%XMM2

(1028) 0x26e00d VDIVSD	%XMM4,%XMM2,%XMM2

(1028) 0x26e011 MOV	-0x90(%RBP),%RDX

(1028) 0x26e018 MOV	-0x158(%RBP),%RAX

(1028) 0x26e01f MOV	%R9,%RSI

(1028) 0x26e022 MOV	(%RDX,%R8,8),%RCX

(1028) 0x26e026 SUB	%RCX,%RSI

(1028) 0x26e029 JLE	26e102

(1028) 0x26e02f CMP	$0x4,%RSI

(1028) 0x26e033 JB	26e0f0

(1028) 0x26e039 CMP	$0x20,%RSI

(1028) 0x26e03d JAE	26e044

(1028) 0x26e03f XOR	%R10D,%R10D

(1028) 0x26e042 JMP	26e0b2

(1028) 0x26e044 MOV	-0xe8(%RBP),%R15

(1028) 0x26e04b VBROADCASTSD	%XMM2,%ZMM3

(1028) 0x26e051 MOV	%RSI,%R10

(1028) 0x26e054 AND	$-0x20,%R10

(1028) 0x26e058 XOR	%R12D,%R12D

(1028) 0x26e05b LEA	(%R15,%RCX,8),%R15

(1028) 0x26e05f NOP

  (1033) 0x26e060 VMULPD	-0xc0(%R15,%R12,8),%ZMM3,%ZMM4

  (1033) 0x26e068 VMULPD	-0x80(%R15,%R12,8),%ZMM3,%ZMM5

  (1033) 0x26e070 VMULPD	-0x40(%R15,%R12,8),%ZMM3,%ZMM6

  (1033) 0x26e078 VMULPD	(%R15,%R12,8),%ZMM3,%ZMM7

  (1033) 0x26e07f VMOVUPD	%ZMM4,-0xc0(%R15,%R12,8)

  (1033) 0x26e087 VMOVUPD	%ZMM5,-0x80(%R15,%R12,8)

  (1033) 0x26e08f VMOVUPD	%ZMM6,-0x40(%R15,%R12,8)

  (1033) 0x26e097 VMOVUPD	%ZMM7,(%R15,%R12,8)

  (1033) 0x26e09e ADD	$0x20,%R12

  (1033) 0x26e0a2 CMP	%R12,%R10

  (1033) 0x26e0a5 JNE	26e060

(1028) 0x26e0a7 CMP	%R10,%RSI

(1028) 0x26e0aa JE	26e102

(1028) 0x26e0ac TEST	$0x1c,%SIL

(1028) 0x26e0b0 JE	26e0ec

(1028) 0x26e0b2 MOV	%RSI,%R15

(1028) 0x26e0b5 AND	$-0x4,%R15

(1028) 0x26e0b9 LEA	(%RAX,%RCX,8),%R12

(1028) 0x26e0bd VBROADCASTSD	%XMM2,%YMM3

(1028) 0x26e0c2 ADD	%R15,%RCX

(1028) 0x26e0c5 NOPW	%CS:(%RAX,%RAX,1)

  (1034) 0x26e0d0 VMULPD	(%R12,%R10,8),%YMM3,%YMM4

  (1034) 0x26e0d6 VMOVUPD	%YMM4,(%R12,%R10,8)

  (1034) 0x26e0dc ADD	$0x4,%R10

  (1034) 0x26e0e0 CMP	%R10,%R15

  (1034) 0x26e0e3 JNE	26e0d0

(1028) 0x26e0e5 CMP	%R15,%RSI

(1028) 0x26e0e8 JNE	26e0f0

(1028) 0x26e0ea JMP	26e102

(1028) 0x26e0ec ADD	%R10,%RCX

(1028) 0x26e0ef NOP

  (1032) 0x26e0f0 VMULSD	(%RAX,%RCX,8),%XMM2,%XMM3

  (1032) 0x26e0f5 VMOVSD	%XMM3,(%RAX,%RCX,8)

  (1032) 0x26e0fa INC	%RCX

  (1032) 0x26e0fd CMP	%RCX,%R9

  (1032) 0x26e100 JNE	26e0f0

(1028) 0x26e102 MOV	-0x38(%RBP),%RCX

(1028) 0x26e106 MOV	%R11,%RSI

(1028) 0x26e109 MOV	(%RCX,%R8,8),%RCX

(1028) 0x26e10d SUB	%RCX,%RSI

(1028) 0x26e110 JLE	26dc80

(1028) 0x26e116 CMP	$0x4,%RSI

(1028) 0x26e11a JB	26e1f0

(1028) 0x26e120 CMP	$0x20,%RSI

(1028) 0x26e124 JAE	26e12b

(1028) 0x26e126 XOR	%R8D,%R8D

(1028) 0x26e129 JMP	26e1a6

(1028) 0x26e12b MOV	-0xe0(%RBP),%RAX

(1028) 0x26e132 VBROADCASTSD	%XMM2,%ZMM3

(1028) 0x26e138 MOV	%RSI,%R8

(1028) 0x26e13b AND	$-0x20,%R8

(1028) 0x26e13f XOR	%R10D,%R10D

(1028) 0x26e142 LEA	(%RAX,%RCX,8),%R9

(1028) 0x26e146 NOPW	%CS:(%RAX,%RAX,1)

  (1030) 0x26e150 VMULPD	-0xc0(%R9,%R10,8),%ZMM3,%ZMM4

  (1030) 0x26e158 VMULPD	-0x80(%R9,%R10,8),%ZMM3,%ZMM5

  (1030) 0x26e160 VMULPD	-0x40(%R9,%R10,8),%ZMM3,%ZMM6

  (1030) 0x26e168 VMULPD	(%R9,%R10,8),%ZMM3,%ZMM7

  (1030) 0x26e16f VMOVUPD	%ZMM4,-0xc0(%R9,%R10,8)

  (1030) 0x26e177 VMOVUPD	%ZMM5,-0x80(%R9,%R10,8)

  (1030) 0x26e17f VMOVUPD	%ZMM6,-0x40(%R9,%R10,8)

  (1030) 0x26e187 VMOVUPD	%ZMM7,(%R9,%R10,8)

  (1030) 0x26e18e ADD	$0x20,%R10

  (1030) 0x26e192 CMP	%R10,%R8

  (1030) 0x26e195 JNE	26e150

(1028) 0x26e197 CMP	%R8,%RSI

(1028) 0x26e19a JE	26dc80

(1028) 0x26e1a0 TEST	$0x1c,%SIL

(1028) 0x26e1a4 JE	26e1df

(1028) 0x26e1a6 MOV	%RSI,%R9

(1028) 0x26e1a9 AND	$-0x4,%R9

(1028) 0x26e1ad LEA	(%RDI,%RCX,8),%R10

(1028) 0x26e1b1 VBROADCASTSD	%XMM2,%YMM3

(1028) 0x26e1b6 ADD	%R9,%RCX

(1028) 0x26e1b9 NOPL	(%RAX)

  (1031) 0x26e1c0 VMULPD	(%R10,%R8,8),%YMM3,%YMM4

  (1031) 0x26e1c6 VMOVUPD	%YMM4,(%R10,%R8,8)

  (1031) 0x26e1cc ADD	$0x4,%R8

  (1031) 0x26e1d0 CMP	%R8,%R9

  (1031) 0x26e1d3 JNE	26e1c0

(1028) 0x26e1d5 CMP	%R9,%RSI

(1028) 0x26e1d8 JNE	26e1f0

(1028) 0x26e1da JMP	26dc80

(1028) 0x26e1df ADD	%R8,%RCX

(1028) 0x26e1e2 NOPW	%CS:(%RAX,%RAX,1)

  (1029) 0x26e1f0 VMULSD	(%RDI,%RCX,8),%XMM2,%XMM3

  (1029) 0x26e1f5 VMOVSD	%XMM3,(%RDI,%RCX,8)

  (1029) 0x26e1fa INC	%RCX

  (1029) 0x26e1fd CMP	%RCX,%R11

  (1029) 0x26e200 JNE	26e1f0

(1028) 0x26e202 JMP	26dc80

0x26e207 MOV	%RBX,%RDI

0x26e20a VZEROUPPER

0x26e20d CALL	2de720 <hypre_Free>

0x26e212 MOV	%R14,%RDI

0x26e215 ADD	$0x138,%RSP

0x26e21c POP	%RBX

0x26e21d POP	%R12

0x26e21f POP	%R13

0x26e221 POP	%R14

0x26e223 POP	%R15

0x26e225 POP	%RBP

0x26e226 JMP	2de720

0x26e22b NOPL	(%RAX,%RAX,1)

Coverage (%)	Name	Source Location	Module
►97.00+	__kmp_invoke_microtask		libomp.so
○	__kmp_invoke_task_func		libomp.so
○	__kmp_launch_thread		libomp.so
○	__kmp_launch_worker(void*)		libomp.so
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►2.95+	__kmp_invoke_microtask		libomp.so
○	__kmp_invoke_task_func		libomp.so
○	__kmp_fork_call		libomp.so
○	__kmpc_fork_call		libomp.so
○	hypre_BoomerAMGBuildMultipass	par_multi_interp.c:1575	exec
○	hypre_BoomerAMGSetup	par_amg_setup.c:737	exec
○	hypre_PCGSetup	pcg.c:234	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0

Source file and lines	par_multi_interp.c:1575-1663
Module	exec

The function is defined in /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1575,1585-1599,1605-1663.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 32.50 to 2.33 cycles (13.93x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is probably not vectorized. Only 12% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 32.50 to 2.89 cycles (11.24x speedup).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Performance is limited by:

reading data from caches/RAM (load units are a bottleneck)
writing data to caches/RAM (the store unit is a bottleneck)

By removing all these bottlenecks, you can lower the cost of an iteration from 32.50 to 24.13 cycles (1.35x speedup).

Workaround

Read less array elements
Write less array elements
Provide more information to your compiler:
- use the 'restrict' C99 keyword

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

hypre_CAlloc: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1586
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1589
hypre_Free: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1662
hypre_GetThreadNum: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1596
hypre_NumActiveThreads: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1597

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

IDIV: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1598

Conversion instructions

Detected expensive conversion instructions.

Details

CQTO: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1598

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 608 bytes. The binary function is storing 400 bytes.

General properties

nb instructions	196
nb uops	193
loop length	917
used x86 registers	15
used mmx registers	0
used xmm registers	2
used ymm registers	0
used zmm registers	0
nb stack references	67

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	24.13 cycles
front end	24.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	6.33	6.33	6.33	6.33	6.33	6.33	32.50	32.50	32.50	32.50	0.25	0.25	0.25	0.25	0.00	0.00
cycles	6.33	6.33	6.33	6.33	6.33	6.33	32.50	32.50	32.50	32.50	0.25	0.25	0.25	0.25	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

7.00-12.00

Cycles summary

Front-end	24.13
Dispatch	32.50
DIV/SQRT	7.00-12.00
Overall L1	32.50

Vectorization ratios

INT

all	1%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	5%

all	50%
load	0%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	100%

INT+FP

all	2%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	11%

Vector efficiency ratios

INT

all	12%
load	12%
store	12%
mul	12%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
other	11%

all	18%
load	12%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

INT+FP

all	12%
load	12%
store	12%
mul	12%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	12%
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 32.50 cycles. At this rate:

7% of peak load performance is reached (18.71 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
9% of peak store performance is reached (12.31 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 26d910

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x138,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R9,-0xb0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R8,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%RDX),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RCX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0xe8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x150(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xe0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x148(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xd8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xc8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xd0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x140(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xc8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x138(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xc0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xb8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x130(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xb0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xf0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xa8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xa0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x98(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x70(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x90(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x68(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x88(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x80(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x78(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x128(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x70(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x120(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x68(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xc0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x60(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xb8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x58(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xd0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x50(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x48(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x40(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xa0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x38(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x30(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x28(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x88(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x20(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x18(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x10(%RBP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
TEST %RDI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 26daa1 <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x191>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
CALL 2de630 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV (%R13),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
TEST %RDI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 26daac <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x19c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
CALL 2de630 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CMPQ $0,(%R15)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JG 26dab5 <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x1a5>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
JMP 26dad0 <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x1c0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
XOR %EBX,%EBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
MOV (%R13),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
TEST %RDI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 26da8c <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x17c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
CMPQ $0,(%R15)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JLE 26dad0 <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x1c0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMPQ $0,(%R13)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JLE 26daf1 <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x1e1>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CALL 2e0210 <hypre_GetThreadNum>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 2e0200 <hypre_NumActiveThreads>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0xb0(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV (%RDX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV %RSI,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CQTO																				scal (12.5%)
IDIV %RCX	2	0	0	0	2	0	0	0	0	0	0	0	0	0	0	0	0	9-19	7-12	scal (12.5%)
LEA 0x1(%R15),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
DEC %RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
IMUL %RAX,%RDX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
MOV %RAX,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
IMUL %R15,%R11	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	scal (12.5%)
CMP %RCX,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
CMOVE %RSI,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,-0xd8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CMP %RDX,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JGE 26e207 <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x8f7>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0xa8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVDDUP -0x5e79b(%RIP),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
VXORPD %XMM0,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV (%RAX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R12),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x8(%RCX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %RCX,-0xd8(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV %RAX,-0x160(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
ADD %RCX,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x98(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x80(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x88(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RCX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x118(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x90(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x110(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x50(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0xa0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xb0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x38(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x58(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x88(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x60(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x68(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x108(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x70(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x100(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x40(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x30(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xf8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x78(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0xb8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0xc0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x158(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
ADD $0xc0,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0xc8(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xe8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%RCX),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA 0xc0(%RDI),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RAX,-0xe0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDX,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JMP 26dc97 <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x387>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 2de720 <hypre_Free>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %R14,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD $0x138,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 2de720 <hypre_Free>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0

Source file and lines	par_multi_interp.c:1575-1663
Module	exec

The function is defined in /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1575,1585-1599,1605-1663.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Performance is limited by:

reading data from caches/RAM (load units are a bottleneck)
writing data to caches/RAM (the store unit is a bottleneck)

By removing all these bottlenecks, you can lower the cost of an iteration from 32.50 to 24.13 cycles (1.35x speedup).

Workaround

Read less array elements
Write less array elements
Provide more information to your compiler:
- use the 'restrict' C99 keyword

No data for this section

CALL instructions

Detected function call instructions.

Details

hypre_CAlloc: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1586
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1589
hypre_Free: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1662
hypre_GetThreadNum: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1596
hypre_NumActiveThreads: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1597

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

IDIV: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1598

Conversion instructions

Detected expensive conversion instructions.

Details

CQTO: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1598

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 608 bytes. The binary function is storing 400 bytes.

General properties

nb instructions	196
nb uops	193
loop length	917
used x86 registers	15
used mmx registers	0
used xmm registers	2
used ymm registers	0
used zmm registers	0
nb stack references	67

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	24.13 cycles
front end	24.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	6.33	6.33	6.33	6.33	6.33	6.33	32.50	32.50	32.50	32.50	0.25	0.25	0.25	0.25	0.00	0.00
cycles	6.33	6.33	6.33	6.33	6.33	6.33	32.50	32.50	32.50	32.50	0.25	0.25	0.25	0.25	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

7.00-12.00

Cycles summary

Front-end	24.13
Dispatch	32.50
DIV/SQRT	7.00-12.00
Overall L1	32.50

Vectorization ratios

INT

all	1%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	5%

all	50%
load	0%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	100%

INT+FP

all	2%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	11%

Vector efficiency ratios

INT

all	12%
load	12%
store	12%
mul	12%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
other	11%

all	18%
load	12%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

INT+FP

all	12%
load	12%
store	12%
mul	12%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	12%
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 32.50 cycles. At this rate:

7% of peak load performance is reached (18.71 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
9% of peak store performance is reached (12.31 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 26d910

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x138,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R9,-0xb0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R8,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%RDX),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RCX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0xe8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x150(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xe0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x148(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xd8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xc8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xd0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x140(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xc8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x138(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xc0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xb8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x130(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xb0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xf0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xa8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xa0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x98(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x70(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x90(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x68(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x88(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x80(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x78(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x128(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x70(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x120(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x68(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xc0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x60(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xb8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x58(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xd0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x50(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x48(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x40(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xa0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x38(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x30(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x28(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x88(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x20(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x18(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x10(%RBP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
TEST %RDI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 26daa1 <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x191>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
CALL 2de630 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV (%R13),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
TEST %RDI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 26daac <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x19c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x8,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
CALL 2de630 <hypre_CAlloc>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CMPQ $0,(%R15)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JG 26dab5 <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x1a5>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
JMP 26dad0 <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x1c0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
XOR %EBX,%EBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
MOV (%R13),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
TEST %RDI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 26da8c <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x17c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
CMPQ $0,(%R15)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JLE 26dad0 <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x1c0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMPQ $0,(%R13)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JLE 26daf1 <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x1e1>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CALL 2e0210 <hypre_GetThreadNum>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 2e0200 <hypre_NumActiveThreads>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV -0xb0(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV (%RDX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV %RSI,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CQTO																				scal (12.5%)
IDIV %RCX	2	0	0	0	2	0	0	0	0	0	0	0	0	0	0	0	0	9-19	7-12	scal (12.5%)
LEA 0x1(%R15),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
DEC %RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
IMUL %RAX,%RDX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
MOV %RAX,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
IMUL %R15,%R11	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	scal (12.5%)
CMP %RCX,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
CMOVE %RSI,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,-0xd8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CMP %RDX,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JGE 26e207 <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x8f7>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0xa8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVDDUP -0x5e79b(%RIP),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
VXORPD %XMM0,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV (%RAX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R12),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x8(%RCX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %RCX,-0xd8(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV %RAX,-0x160(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
ADD %RCX,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x98(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x80(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x88(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RCX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x118(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x90(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x110(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x50(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0xa0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xb0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x38(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x58(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x88(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x60(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x68(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x108(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x70(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x100(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x40(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x30(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xf8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0x78(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0xb8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV -0xc0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0x158(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
ADD $0xc0,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0xc8(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,-0xe8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%RCX),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA 0xc0(%RDI),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RAX,-0xe0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDX,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JMP 26dc97 <hypre_BoomerAMGBuildMultipass.omp_outlined.18+0x387>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 2de720 <hypre_Free>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %R14,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD $0x138,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 2de720 <hypre_Free>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼hypre_BoomerAMGBuildMultipass.omp_outlined.18–	0.61	0.32
○Loop 1027 - par_multi_interp.c:1590-1591 - exec	0.18	0.09
▼Loop 1028 - par_multi_interp.c:1605-1660 - exec–	0.10	0.05
○Loop 1038 - par_multi_interp.c:1618-1628 - exec	0.30	0.15
○Loop 1039 - par_multi_interp.c:1612-1615 - exec	0.02	0.01
○Loop 1032 - par_multi_interp.c:1657-1658 - exec	0.01	0.01
○Loop 1035 - par_multi_interp.c:1639-1652 - exec	0.00	0.01
○Loop 1037 - par_multi_interp.c:1633-1636 - exec	0.00	0.00
○Loop 1031 - par_multi_interp.c:1660-1660 - exec	0.00	0.00
○Loop 1033 - par_multi_interp.c:1658-1658 - exec	0.00	0.00
○Loop 1030 - par_multi_interp.c:1660-1660 - exec	0.00	0.00
○Loop 1036 - par_multi_interp.c:1639-1652 - exec	0.00	0.00
○Loop 1029 - par_multi_interp.c:1659-1660 - exec	0.00	0.00
○Loop 1034 - par_multi_interp.c:1658-1658 - exec	0.00	0.00
○Loop 1040 - par_multi_interp.c:1592-1593 - exec	0.00	0.00

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

Workaround

CALL instructions

Details

Complex instructions

Details

Conversion instructions

Details

Workaround

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

Workaround

CALL instructions

Details

Complex instructions

Details

Conversion instructions

Details

Workaround

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code