| Function: hypre_ParCSRComputeL1NormsThreads.omp_outlined | Module: exec | Source: ams.c:3363-3540 [...] | Coverage (incl. loops): 0.32% | (excl. loops): 0.00% |
|---|
| Function: hypre_ParCSRComputeL1NormsThreads.omp_outlined | Module: exec | Source: ams.c:3363-3540 [...] | Coverage (incl. loops): 0.32% | (excl. loops): 0.00% |
|---|
/home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/ams.c: 3363 - 3540 |
-------------------------------------------------------------------------------- |
3363: #pragma omp parallel for private(i,ii,j,k,ns,ne,rest,size,diag,cf_diag) HYPRE_SMP_SCHEDULE |
3364: #endif |
3365: for (k = 0; k < num_threads; k++) |
3366: { |
3367: size = num_rows/num_threads; |
3368: rest = num_rows - size*num_threads; |
3369: if (k < rest) |
3370: { |
3371: ns = k*size+k; |
3372: ne = (k+1)*size+k+1; |
3373: } |
3374: else |
3375: { |
3376: ns = k*size+rest; |
3377: ne = (k+1)*size+rest; |
3378: } |
3379: |
3380: if (option == 1) |
3381: { |
3382: for (i = ns; i < ne; i++) |
3383: { |
3384: l1_norm[i] = 0.0; |
3385: if (cf_marker == NULL) |
3386: { |
3387: /* Add the l1 norm of the diag part of the ith row */ |
3388: for (j = A_diag_I[i]; j < A_diag_I[i+1]; j++) |
3389: l1_norm[i] += fabs(A_diag_data[j]); |
3390: /* Add the l1 norm of the offd part of the ith row */ |
3391: if (num_cols_offd) |
3392: { |
3393: for (j = A_offd_I[i]; j < A_offd_I[i+1]; j++) |
3394: l1_norm[i] += fabs(A_offd_data[j]); |
3395: } |
3396: } |
3397: else |
3398: { |
3399: cf_diag = cf_marker[i]; |
3400: /* Add the CF l1 norm of the diag part of the ith row */ |
3401: for (j = A_diag_I[i]; j < A_diag_I[i+1]; j++) |
3402: if (cf_diag == cf_marker[A_diag_J[j]]) |
3403: l1_norm[i] += fabs(A_diag_data[j]); |
3404: /* Add the CF l1 norm of the offd part of the ith row */ |
3405: if (num_cols_offd) |
3406: { |
3407: for (j = A_offd_I[i]; j < A_offd_I[i+1]; j++) |
3408: if (cf_diag == cf_marker_offd[A_offd_J[j]]) |
3409: l1_norm[i] += fabs(A_offd_data[j]); |
[...] |
3416: for (i = ns; i < ne; i++) |
3417: { |
3418: l1_norm[i] = 0.0; |
3419: if (cf_marker == NULL) |
3420: { |
3421: /* Add the diagonal and the local off-thread part of the ith row */ |
3422: for (j = A_diag_I[i]; j < A_diag_I[i+1]; j++) |
3423: { |
3424: ii = A_diag_J[j]; |
3425: if (ii == i || ii < ns || ii >= ne) |
3426: l1_norm[i] += fabs(A_diag_data[j]); |
3427: } |
3428: /* Add the l1 norm of the offd part of the ith row */ |
3429: if (num_cols_offd) |
3430: { |
3431: for (j = A_offd_I[i]; j < A_offd_I[i+1]; j++) |
3432: l1_norm[i] += fabs(A_offd_data[j]); |
3433: } |
3434: } |
3435: else |
3436: { |
3437: cf_diag = cf_marker[i]; |
3438: /* Add the diagonal and the local off-thread part of the ith row */ |
3439: for (j = A_diag_I[i]; j < A_diag_I[i+1]; j++) |
3440: { |
3441: ii = A_diag_J[j]; |
3442: if ((ii == i || ii < ns || ii >= ne) && |
3443: (cf_diag == cf_marker[A_diag_J[j]])) |
3444: l1_norm[i] += fabs(A_diag_data[j]); |
3445: } |
3446: /* Add the CF l1 norm of the offd part of the ith row */ |
3447: if (num_cols_offd) |
3448: { |
3449: for (j = A_offd_I[i]; j < A_offd_I[i+1]; j++) |
3450: if (cf_diag == cf_marker_offd[A_offd_J[j]]) |
3451: l1_norm[i] += fabs(A_offd_data[j]); |
[...] |
3458: for (i = ns; i < ne; i++) |
3459: { |
3460: l1_norm[i] = 0.0; |
3461: for (j = A_diag_I[i]; j < A_diag_I[i+1]; j++) |
3462: l1_norm[i] += A_diag_data[j] * A_diag_data[j]; |
3463: if (num_cols_offd) |
3464: for (j = A_offd_I[i]; j < A_offd_I[i+1]; j++) |
3465: l1_norm[i] += A_offd_data[j] * A_offd_data[j]; |
3466: } |
3467: } |
3468: else if (option == 4) |
3469: { |
3470: for (i = ns; i < ne; i++) |
3471: { |
3472: l1_norm[i] = 0.0; |
3473: if (cf_marker == NULL) |
3474: { |
3475: /* Add the diagonal and the local off-thread part of the ith row */ |
3476: for (j = A_diag_I[i]; j < A_diag_I[i+1]; j++) |
3477: { |
3478: ii = A_diag_J[j]; |
3479: if (ii == i || ii < ns || ii >= ne) |
3480: { |
3481: if (ii == i) |
3482: { |
3483: diag = fabs(A_diag_data[j]); |
3484: l1_norm[i] += fabs(A_diag_data[j]); |
3485: } |
3486: else |
3487: l1_norm[i] += 0.5*fabs(A_diag_data[j]); |
3488: } |
3489: } |
3490: /* Add the l1 norm of the offd part of the ith row */ |
3491: if (num_cols_offd) |
3492: { |
3493: for (j = A_offd_I[i]; j < A_offd_I[i+1]; j++) |
3494: l1_norm[i] += 0.5*fabs(A_offd_data[j]); |
3495: } |
3496: } |
3497: else |
3498: { |
3499: cf_diag = cf_marker[i]; |
3500: /* Add the diagonal and the local off-thread part of the ith row */ |
3501: for (j = A_diag_I[i]; j < A_diag_I[i+1]; j++) |
3502: { |
3503: ii = A_diag_J[j]; |
3504: if ((ii == i || ii < ns || ii >= ne) && |
3505: (cf_diag == cf_marker[A_diag_J[j]])) |
3506: { |
3507: if (ii == i) |
3508: { |
3509: diag = fabs(A_diag_data[j]); |
3510: l1_norm[i] += fabs(A_diag_data[j]); |
3511: } |
3512: else |
3513: l1_norm[i] += 0.5*fabs(A_diag_data[j]); |
3514: } |
3515: } |
3516: /* Add the CF l1 norm of the offd part of the ith row */ |
3517: if (num_cols_offd) |
3518: { |
3519: for (j = A_offd_I[i]; j < A_offd_I[i+1]; j++) |
3520: if (cf_diag == cf_marker_offd[A_offd_J[j]]) |
3521: l1_norm[i] += 0.5*fabs(A_offd_data[j]); |
3522: } |
3523: } |
3524: |
3525: /* Truncate according to Remark 6.2 */ |
3526: if (l1_norm[i] <= 4.0/3.0*diag) |
3527: l1_norm[i] = diag; |
3528: } |
3529: } |
3530: |
3531: /* Handle negative definite matrices */ |
3532: for (i = ns; i < ne; i++) |
3533: if (A_diag_data[A_diag_I[i]] < 0) |
3534: l1_norm[i] = -l1_norm[i]; |
3535: |
3536: for (i = ns; i < ne; i++) |
3537: /* if (fabs(l1_norm[i]) < DBL_EPSILON) */ |
3538: if (fabs(l1_norm[i]) == 0.0) |
3539: { |
3540: hypre_error_in_arg(1); |
0x24c430 PUSH %RBP |
0x24c431 MOV %RSP,%RBP |
0x24c434 PUSH %R15 |
0x24c436 PUSH %R14 |
0x24c438 PUSH %R13 |
0x24c43a PUSH %R12 |
0x24c43c PUSH %RBX |
0x24c43d SUB $0x98,%RSP |
0x24c444 MOV (%RDX),%RBX |
0x24c447 MOV %R9,-0x48(%RBP) |
0x24c44b MOV %R8,-0x88(%RBP) |
0x24c452 MOV %RCX,-0x80(%RBP) |
0x24c456 MOV %RDX,-0x78(%RBP) |
0x24c45a TEST %RBX,%RBX |
0x24c45d JLE 24d011 |
0x24c463 MOV (%RDI),%ESI |
0x24c465 DEC %RBX |
0x24c468 MOVQ $0,-0x70(%RBP) |
0x24c470 MOVQ $0x1,-0xa0(%RBP) |
0x24c47b MOVL $0,-0x58(%RBP) |
0x24c482 MOV %RBX,-0x50(%RBP) |
0x24c486 SUB $0x8,%RSP |
0x24c48a LEA -0xa0(%RBP),%RAX |
0x24c491 LEA 0x97ee8(%RIP),%RDI |
0x24c498 LEA -0x58(%RBP),%RCX |
0x24c49c LEA -0x70(%RBP),%R8 |
0x24c4a0 LEA -0x50(%RBP),%R9 |
0x24c4a4 MOV %ESI,-0x54(%RBP) |
0x24c4a7 MOV $0x22,%EDX |
0x24c4ac PUSH $0x1 |
0x24c4ae PUSH $0x1 |
0x24c4b0 PUSH %RAX |
0x24c4b1 CALL 2e2d50 <@plt_start@+0x90> |
0x24c4b6 ADD $0x20,%RSP |
0x24c4ba MOV -0x50(%RBP),%RAX |
0x24c4be MOV -0x70(%RBP),%RCX |
0x24c4c2 CMP %RBX,%RAX |
0x24c4c5 MOV %RCX,-0x68(%RBP) |
0x24c4c9 CMOVL %RAX,%RBX |
0x24c4cd MOV %RBX,-0x50(%RBP) |
0x24c4d1 CMP %RBX,%RCX |
0x24c4d4 JG 24d002 |
0x24c4da VMOVDDUP -0x3d132(%RIP),%XMM4 |
0x24c4e2 VMOVDDUP -0x3d192(%RIP),%XMM5 |
0x24c4ea VMOVSD -0x3d14a(%RIP),%XMM6 |
0x24c4f2 VMOVSD -0x3d1c2(%RIP),%XMM7 |
0x24c4fa VXORPD %XMM3,%XMM3,%XMM3 |
0x24c4fe VMOVAPD %XMM4,-0xb0(%RBP) |
0x24c506 VMOVAPD %XMM5,-0xc0(%RBP) |
0x24c50e JMP 24c521 |
(333) 0x24c510 MOV -0x60(%RBP),%RBX |
(333) 0x24c514 CMP %RBX,-0x98(%RBP) |
(333) 0x24c51b JGE 24d002 |
(333) 0x24c521 MOV -0x80(%RBP),%RAX |
(333) 0x24c525 MOV -0x78(%RBP),%RCX |
(333) 0x24c529 MOV %RBX,-0x60(%RBP) |
(333) 0x24c52d MOV (%RAX),%RAX |
(333) 0x24c530 CQTO |
(333) 0x24c532 IDIVQ (%RCX) |
(333) 0x24c535 MOV -0x68(%RBP),%R11 |
(333) 0x24c539 LEA 0x1(%R11),%R10 |
(333) 0x24c53d MOV %RAX,%R13 |
(333) 0x24c540 CMP %RDX,%R11 |
(333) 0x24c543 JGE 24c560 |
(333) 0x24c545 INC %R13 |
(333) 0x24c548 MOV %R13,%RAX |
(333) 0x24c54b IMUL %R11,%RAX |
(333) 0x24c54f IMUL %R10,%R13 |
(333) 0x24c553 JMP 24c571 |
0x24c555 NOPW %CS:(%RAX,%RAX,1) |
(333) 0x24c560 MOV %R13,%RAX |
(333) 0x24c563 IMUL %R11,%RAX |
(333) 0x24c567 IMUL %R10,%R13 |
(333) 0x24c56b ADD %RDX,%RAX |
(333) 0x24c56e ADD %RDX,%R13 |
(333) 0x24c571 MOV -0x88(%RBP),%RCX |
(333) 0x24c578 MOV %R10,-0x68(%RBP) |
(333) 0x24c57c MOV %R11,-0x98(%RBP) |
(333) 0x24c583 MOV (%RCX),%RCX |
(333) 0x24c586 CMP $0x3,%RCX |
(333) 0x24c58a JE 24c6e0 |
(333) 0x24c590 CMP $0x2,%RCX |
(333) 0x24c594 JE 24c7b0 |
(333) 0x24c59a CMP $0x1,%RCX |
(333) 0x24c59e JNE 24c910 |
(333) 0x24c5a4 CMP %R13,%RAX |
(333) 0x24c5a7 JGE 24cf00 |
(333) 0x24c5ad MOV 0x10(%RBP),%RDX |
(333) 0x24c5b1 MOV 0x28(%RBP),%RSI |
(333) 0x24c5b5 MOV 0x18(%RBP),%RDI |
(333) 0x24c5b9 MOV -0x48(%RBP),%RCX |
(333) 0x24c5bd MOV (%RDX),%R8 |
(333) 0x24c5c0 MOV (%RSI),%RDX |
(333) 0x24c5c3 MOV 0x30(%RBP),%RSI |
(333) 0x24c5c7 MOV (%RDI),%R14 |
(333) 0x24c5ca MOV (%RCX),%RCX |
(333) 0x24c5cd MOV (%RSI),%RSI |
(333) 0x24c5d0 MOV %RSI,-0x40(%RBP) |
(333) 0x24c5d4 MOV (%R14,%RAX,8),%RSI |
(333) 0x24c5d8 TEST %R8,%R8 |
(333) 0x24c5db JE 24cb6e |
(333) 0x24c5e1 MOV 0x40(%RBP),%RDI |
(333) 0x24c5e5 MOV (%RDI),%R9 |
(333) 0x24c5e8 TEST %RDX,%RDX |
(333) 0x24c5eb JE 24cd31 |
(333) 0x24c5f1 MOV 0x48(%RBP),%RDX |
(333) 0x24c5f5 MOV 0x50(%RBP),%RDI |
(333) 0x24c5f9 MOV %RAX,%RBX |
(333) 0x24c5fc MOV %R14,-0x38(%RBP) |
(333) 0x24c600 MOV (%RDX),%R10 |
(333) 0x24c603 MOV (%RDI),%R11 |
(333) 0x24c606 JMP 24c627 |
0x24c608 NOPL (%RAX,%RAX,1) |
(363) 0x24c610 MOV %R14,%RSI |
(363) 0x24c613 MOV -0x30(%RBP),%RDX |
(363) 0x24c617 MOV -0x38(%RBP),%R14 |
(363) 0x24c61b MOV %RDX,%RBX |
(363) 0x24c61e CMP %R13,%RDX |
(363) 0x24c621 JE 24cf00 |
(363) 0x24c627 MOVQ $0,(%RCX,%RBX,8) |
(363) 0x24c62f VXORPD %XMM0,%XMM0,%XMM0 |
(363) 0x24c633 MOV (%R8,%RBX,8),%R15 |
(363) 0x24c637 MOV 0x8(%R14,%RBX,8),%R14 |
(363) 0x24c63c CMP %R14,%RSI |
(363) 0x24c63f JGE 24c680 |
(363) 0x24c641 MOV 0x20(%RBP),%RDX |
(363) 0x24c645 MOV (%RDX),%RDX |
(363) 0x24c648 JMP 24c658 |
0x24c64a NOPW (%RAX,%RAX,1) |
(365) 0x24c650 INC %RSI |
(365) 0x24c653 CMP %RSI,%R14 |
(365) 0x24c656 JE 24c680 |
(365) 0x24c658 MOV (%R9,%RSI,8),%RDI |
(365) 0x24c65c CMP %R15,(%R8,%RDI,8) |
(365) 0x24c660 JNE 24c650 |
(365) 0x24c662 VMOVSD (%RDX,%RSI,8),%XMM1 |
(365) 0x24c667 VANDPD %XMM5,%XMM1,%XMM1 |
(365) 0x24c66b VADDSD %XMM1,%XMM0,%XMM0 |
(365) 0x24c66f VMOVSD %XMM0,(%RCX,%RBX,8) |
(365) 0x24c674 JMP 24c650 |
0x24c676 NOPW %CS:(%RAX,%RAX,1) |
(363) 0x24c680 MOV -0x40(%RBP),%RDX |
(363) 0x24c684 LEA 0x1(%RBX),%RDI |
(363) 0x24c688 MOV %RDI,-0x30(%RBP) |
(363) 0x24c68c MOV (%RDX,%RBX,8),%RSI |
(363) 0x24c690 MOV (%RDX,%RDI,8),%RDX |
(363) 0x24c694 CMP %RDX,%RSI |
(363) 0x24c697 JGE 24c610 |
(363) 0x24c69d MOV 0x38(%RBP),%RDI |
(363) 0x24c6a1 MOV (%RDI),%RDI |
(363) 0x24c6a4 JMP 24c6bc |
0x24c6a6 NOPW %CS:(%RAX,%RAX,1) |
(364) 0x24c6b0 INC %RSI |
(364) 0x24c6b3 CMP %RSI,%RDX |
(364) 0x24c6b6 JE 24c610 |
(364) 0x24c6bc MOV (%R11,%RSI,8),%R12 |
(364) 0x24c6c0 CMP %R15,(%R10,%R12,8) |
(364) 0x24c6c4 JNE 24c6b0 |
(364) 0x24c6c6 VMOVSD (%RDI,%RSI,8),%XMM1 |
(364) 0x24c6cb VANDPD %XMM5,%XMM1,%XMM1 |
(364) 0x24c6cf VADDSD %XMM1,%XMM0,%XMM0 |
(364) 0x24c6d3 VMOVSD %XMM0,(%RCX,%RBX,8) |
(364) 0x24c6d8 JMP 24c6b0 |
0x24c6da NOPW (%RAX,%RAX,1) |
(333) 0x24c6e0 CMP %R13,%RAX |
(333) 0x24c6e3 JGE 24cf00 |
(333) 0x24c6e9 MOV 0x18(%RBP),%RDX |
(333) 0x24c6ed MOV -0x48(%RBP),%RCX |
(333) 0x24c6f1 MOV 0x20(%RBP),%RSI |
(333) 0x24c6f5 MOV 0x28(%RBP),%RDI |
(333) 0x24c6f9 MOV (%RDX),%RDX |
(333) 0x24c6fc CMPQ $0,(%RDI) |
(333) 0x24c700 MOV (%RCX),%RCX |
(333) 0x24c703 MOV (%RSI),%RSI |
(333) 0x24c706 MOV (%RDX,%RAX,8),%RDI |
(333) 0x24c70a JE 24cc21 |
(333) 0x24c710 MOV 0x30(%RBP),%R8 |
(333) 0x24c714 MOV 0x38(%RBP),%R9 |
(333) 0x24c718 MOV %RAX,%R10 |
(333) 0x24c71b MOV (%R8),%R8 |
(333) 0x24c71e MOV (%R9),%R9 |
(333) 0x24c721 JMP 24c73f |
0x24c723 NOPW %CS:(%RAX,%RAX,1) |
(338) 0x24c730 MOV %R11,%RDI |
(338) 0x24c733 MOV %RBX,%R10 |
(338) 0x24c736 CMP %R13,%RBX |
(338) 0x24c739 JE 24cf00 |
(338) 0x24c73f MOVQ $0,(%RCX,%R10,8) |
(338) 0x24c747 VXORPD %XMM0,%XMM0,%XMM0 |
(338) 0x24c74b MOV 0x8(%RDX,%R10,8),%R11 |
(338) 0x24c750 CMP %R11,%RDI |
(338) 0x24c753 JGE 24c778 |
(338) 0x24c755 NOPW %CS:(%RAX,%RAX,1) |
(340) 0x24c760 VMOVSD (%RSI,%RDI,8),%XMM1 |
(340) 0x24c765 INC %RDI |
(340) 0x24c768 VFMADD231SD %XMM1,%XMM1,%XMM0 |
(340) 0x24c76d VMOVSD %XMM0,(%RCX,%R10,8) |
(340) 0x24c773 CMP %RDI,%R11 |
(340) 0x24c776 JNE 24c760 |
(338) 0x24c778 LEA 0x1(%R10),%RBX |
(338) 0x24c77c MOV (%R8,%R10,8),%RDI |
(338) 0x24c780 MOV (%R8,%RBX,8),%R14 |
(338) 0x24c784 CMP %R14,%RDI |
(338) 0x24c787 JGE 24c730 |
(338) 0x24c789 NOPL (%RAX) |
(339) 0x24c790 VMOVSD (%R9,%RDI,8),%XMM1 |
(339) 0x24c796 INC %RDI |
(339) 0x24c799 VFMADD231SD %XMM1,%XMM1,%XMM0 |
(339) 0x24c79e VMOVSD %XMM0,(%RCX,%R10,8) |
(339) 0x24c7a4 CMP %RDI,%R14 |
(339) 0x24c7a7 JNE 24c790 |
(338) 0x24c7a9 JMP 24c730 |
0x24c7ab NOPL (%RAX,%RAX,1) |
(333) 0x24c7b0 CMP %R13,%RAX |
(333) 0x24c7b3 JGE 24cf00 |
(333) 0x24c7b9 MOV -0x48(%RBP),%RCX |
(333) 0x24c7bd MOV 0x10(%RBP),%RDI |
(333) 0x24c7c1 MOV 0x18(%RBP),%RSI |
(333) 0x24c7c5 MOV 0x30(%RBP),%R8 |
(333) 0x24c7c9 MOV (%RCX),%RDX |
(333) 0x24c7cc MOV (%RDI),%R9 |
(333) 0x24c7cf MOV 0x40(%RBP),%RDI |
(333) 0x24c7d3 MOV (%RSI),%R14 |
(333) 0x24c7d6 MOV 0x28(%RBP),%RSI |
(333) 0x24c7da MOV (%R8),%RCX |
(333) 0x24c7dd MOV %RCX,-0x38(%RBP) |
(333) 0x24c7e1 MOV (%RDI),%RDI |
(333) 0x24c7e4 MOV (%RSI),%RSI |
(333) 0x24c7e7 MOV (%R14,%RAX,8),%RCX |
(333) 0x24c7eb TEST %R9,%R9 |
(333) 0x24c7ee JE 24cc7a |
(333) 0x24c7f4 TEST %RSI,%RSI |
(333) 0x24c7f7 JE 24cda7 |
(333) 0x24c7fd MOV 0x48(%RBP),%RSI |
(333) 0x24c801 MOV 0x50(%RBP),%R8 |
(333) 0x24c805 MOV %RAX,%RBX |
(333) 0x24c808 MOV %R14,-0x90(%RBP) |
(333) 0x24c80f MOV (%RSI),%RSI |
(333) 0x24c812 MOV %RSI,-0x30(%RBP) |
(333) 0x24c816 MOV (%R8),%RSI |
(333) 0x24c819 MOV %RSI,-0x40(%RBP) |
(333) 0x24c81d JMP 24c836 |
0x24c81f NOP |
(348) 0x24c820 MOV %R14,%RCX |
(348) 0x24c823 MOV -0x90(%RBP),%R14 |
(348) 0x24c82a MOV %R12,%RBX |
(348) 0x24c82d CMP %R13,%R12 |
(348) 0x24c830 JE 24cf00 |
(348) 0x24c836 MOVQ $0,(%RDX,%RBX,8) |
(348) 0x24c83e VXORPD %XMM0,%XMM0,%XMM0 |
(348) 0x24c842 MOV (%R9,%RBX,8),%R15 |
(348) 0x24c846 MOV 0x8(%R14,%RBX,8),%R14 |
(348) 0x24c84b CMP %R14,%RCX |
(348) 0x24c84e JGE 24c8a0 |
(348) 0x24c850 MOV 0x20(%RBP),%RSI |
(348) 0x24c854 MOV (%RSI),%R12 |
(348) 0x24c857 JMP 24c868 |
0x24c859 NOPL (%RAX) |
(350) 0x24c860 INC %RCX |
(350) 0x24c863 CMP %RCX,%R14 |
(350) 0x24c866 JE 24c8a0 |
(350) 0x24c868 MOV (%RDI,%RCX,8),%RSI |
(350) 0x24c86c CMP %RAX,%RSI |
(350) 0x24c86f JL 24c87b |
(350) 0x24c871 CMP %RBX,%RSI |
(350) 0x24c874 JE 24c87b |
(350) 0x24c876 CMP %R13,%RSI |
(350) 0x24c879 JL 24c860 |
(350) 0x24c87b CMP %R15,(%R9,%RSI,8) |
(350) 0x24c87f JNE 24c860 |
(350) 0x24c881 VMOVSD (%R12,%RCX,8),%XMM1 |
(350) 0x24c887 VANDPD %XMM5,%XMM1,%XMM1 |
(350) 0x24c88b VADDSD %XMM1,%XMM0,%XMM0 |
(350) 0x24c88f VMOVSD %XMM0,(%RDX,%RBX,8) |
(350) 0x24c894 JMP 24c860 |
0x24c896 NOPW %CS:(%RAX,%RAX,1) |
(348) 0x24c8a0 MOV -0x38(%RBP),%RSI |
(348) 0x24c8a4 LEA 0x1(%RBX),%R12 |
(348) 0x24c8a8 MOV (%RSI,%RBX,8),%RCX |
(348) 0x24c8ac MOV (%RSI,%R12,8),%RSI |
(348) 0x24c8b0 CMP %RSI,%RCX |
(348) 0x24c8b3 JGE 24c820 |
(348) 0x24c8b9 MOV 0x38(%RBP),%R8 |
(348) 0x24c8bd MOV (%R8),%R8 |
(348) 0x24c8c0 JMP 24c8dc |
0x24c8c2 NOPW %CS:(%RAX,%RAX,1) |
(349) 0x24c8d0 INC %RCX |
(349) 0x24c8d3 CMP %RCX,%RSI |
(349) 0x24c8d6 JE 24c820 |
(349) 0x24c8dc MOV -0x40(%RBP),%R10 |
(349) 0x24c8e0 MOV -0x30(%RBP),%R11 |
(349) 0x24c8e4 MOV (%R10,%RCX,8),%R10 |
(349) 0x24c8e8 CMP %R15,(%R11,%R10,8) |
(349) 0x24c8ec JNE 24c8d0 |
(349) 0x24c8ee VMOVSD (%R8,%RCX,8),%XMM1 |
(349) 0x24c8f4 VANDPD %XMM5,%XMM1,%XMM1 |
(349) 0x24c8f8 VADDSD %XMM1,%XMM0,%XMM0 |
(349) 0x24c8fc VMOVSD %XMM0,(%RDX,%RBX,8) |
(349) 0x24c901 JMP 24c8d0 |
0x24c903 NOPW %CS:(%RAX,%RAX,1) |
(333) 0x24c910 CMP %R13,%RAX |
(333) 0x24c913 JGE 24cf00 |
(333) 0x24c919 CMP $0x4,%RCX |
(333) 0x24c91d JNE 24cf00 |
(333) 0x24c923 MOV -0x48(%RBP),%RCX |
(333) 0x24c927 MOV 0x28(%RBP),%R9 |
(333) 0x24c92b MOV 0x30(%RBP),%R10 |
(333) 0x24c92f MOV 0x10(%RBP),%RSI |
(333) 0x24c933 MOV 0x18(%RBP),%RDI |
(333) 0x24c937 MOV 0x40(%RBP),%R8 |
(333) 0x24c93b MOV (%RCX),%RDX |
(333) 0x24c93e MOV (%R9),%RCX |
(333) 0x24c941 MOV 0x48(%RBP),%R9 |
(333) 0x24c945 MOV (%RSI),%RSI |
(333) 0x24c948 MOV (%RDI),%RDI |
(333) 0x24c94b MOV (%R8),%R8 |
(333) 0x24c94e MOV %RCX,-0x30(%RBP) |
(333) 0x24c952 MOV (%R10),%RCX |
(333) 0x24c955 MOV (%R9),%R11 |
(333) 0x24c958 MOV 0x50(%RBP),%R10 |
(333) 0x24c95c MOV 0x38(%RBP),%R9 |
(333) 0x24c960 MOV (%R9),%R12 |
(333) 0x24c963 MOV (%R10),%RBX |
(333) 0x24c966 MOV %RCX,-0x40(%RBP) |
(333) 0x24c96a MOV %RAX,%RCX |
(333) 0x24c96d MOV %R12,-0x38(%RBP) |
(333) 0x24c971 JMP 24c98c |
0x24c973 NOPW %CS:(%RAX,%RAX,1) |
(351) 0x24c980 INC %RCX |
(351) 0x24c983 CMP %R13,%RCX |
(351) 0x24c986 JE 24cf00 |
(351) 0x24c98c MOVQ $0,(%RDX,%RCX,8) |
(351) 0x24c994 TEST %RSI,%RSI |
(351) 0x24c997 JE 24ca30 |
(351) 0x24c99d MOV (%RSI,%RCX,8),%R14 |
(351) 0x24c9a1 MOV (%RDI,%RCX,8),%R12 |
(351) 0x24c9a5 MOV 0x8(%RDI,%RCX,8),%R9 |
(351) 0x24c9aa VXORPD %XMM0,%XMM0,%XMM0 |
(351) 0x24c9ae CMP %R9,%R12 |
(351) 0x24c9b1 JGE 24cab0 |
(351) 0x24c9b7 MOV 0x20(%RBP),%R10 |
(351) 0x24c9bb MOV (%R10),%R10 |
(351) 0x24c9be JMP 24c9e4 |
(355) 0x24c9c0 VFMADD231SD %XMM6,%XMM1,%XMM0 |
(355) 0x24c9c5 VMOVSD %XMM0,(%RDX,%RCX,8) |
(355) 0x24c9ca NOPW (%RAX,%RAX,1) |
(355) 0x24c9d0 VMOVAPD %XMM2,%XMM1 |
(355) 0x24c9d4 INC %R12 |
(355) 0x24c9d7 VMOVAPD %XMM1,%XMM2 |
(355) 0x24c9db CMP %R12,%R9 |
(355) 0x24c9de JE 24cab4 |
(355) 0x24c9e4 MOV (%R8,%R12,8),%R15 |
(355) 0x24c9e8 CMP %R13,%R15 |
(355) 0x24c9eb JGE 24c9f7 |
(355) 0x24c9ed CMP %RAX,%R15 |
(355) 0x24c9f0 JL 24c9f7 |
(355) 0x24c9f2 CMP %RCX,%R15 |
(355) 0x24c9f5 JNE 24c9d0 |
(355) 0x24c9f7 CMP %R14,(%RSI,%R15,8) |
(355) 0x24c9fb JNE 24c9d0 |
(355) 0x24c9fd VMOVSD (%R10,%R12,8),%XMM1 |
(355) 0x24ca03 VANDPD %XMM5,%XMM1,%XMM1 |
(355) 0x24ca07 CMP %RCX,%R15 |
(355) 0x24ca0a JNE 24c9c0 |
(355) 0x24ca0c VADDSD %XMM1,%XMM0,%XMM0 |
(355) 0x24ca10 VMOVSD %XMM0,(%RDX,%RCX,8) |
(355) 0x24ca15 INC %R12 |
(355) 0x24ca18 VMOVAPD %XMM1,%XMM2 |
(355) 0x24ca1c CMP %R12,%R9 |
(355) 0x24ca1f JNE 24c9e4 |
(351) 0x24ca21 JMP 24cab4 |
0x24ca26 NOPW %CS:(%RAX,%RAX,1) |
(351) 0x24ca30 MOV (%RDI,%RCX,8),%R9 |
(351) 0x24ca34 MOV 0x8(%RDI,%RCX,8),%R10 |
(351) 0x24ca39 VXORPD %XMM0,%XMM0,%XMM0 |
(351) 0x24ca3d CMP %R10,%R9 |
(351) 0x24ca40 JGE 24cb30 |
(351) 0x24ca46 MOV 0x20(%RBP),%R14 |
(351) 0x24ca4a MOV (%R14),%R14 |
(351) 0x24ca4d JMP 24ca6e |
0x24ca4f NOP |
(353) 0x24ca50 VFMADD231SD %XMM6,%XMM1,%XMM0 |
(353) 0x24ca55 VMOVSD %XMM0,(%RDX,%RCX,8) |
(353) 0x24ca5a VMOVAPD %XMM2,%XMM1 |
(353) 0x24ca5e INC %R9 |
(353) 0x24ca61 VMOVAPD %XMM1,%XMM2 |
(353) 0x24ca65 CMP %R9,%R10 |
(353) 0x24ca68 JE 24cb34 |
(353) 0x24ca6e MOV (%R8,%R9,8),%R15 |
(353) 0x24ca72 CMP %R13,%R15 |
(353) 0x24ca75 JGE 24ca81 |
(353) 0x24ca77 CMP %RAX,%R15 |
(353) 0x24ca7a JL 24ca81 |
(353) 0x24ca7c CMP %RCX,%R15 |
(353) 0x24ca7f JNE 24ca5a |
(353) 0x24ca81 VMOVSD (%R14,%R9,8),%XMM1 |
(353) 0x24ca87 VANDPD %XMM5,%XMM1,%XMM1 |
(353) 0x24ca8b CMP %RCX,%R15 |
(353) 0x24ca8e JNE 24ca50 |
(353) 0x24ca90 VADDSD %XMM1,%XMM0,%XMM0 |
(353) 0x24ca94 VMOVSD %XMM0,(%RDX,%RCX,8) |
(353) 0x24ca99 INC %R9 |
(353) 0x24ca9c VMOVAPD %XMM1,%XMM2 |
(353) 0x24caa0 CMP %R9,%R10 |
(353) 0x24caa3 JNE 24ca6e |
(351) 0x24caa5 JMP 24cb34 |
0x24caaa NOPW (%RAX,%RAX,1) |
(351) 0x24cab0 VMOVAPD %XMM2,%XMM1 |
(351) 0x24cab4 CMPQ $0,-0x30(%RBP) |
(351) 0x24cab9 JE 24cb10 |
(351) 0x24cabb MOV -0x40(%RBP),%R10 |
(351) 0x24cabf MOV (%R10,%RCX,8),%R9 |
(351) 0x24cac3 MOV 0x8(%R10,%RCX,8),%R10 |
(351) 0x24cac8 CMP %R10,%R9 |
(351) 0x24cacb JGE 24cb10 |
(351) 0x24cacd MOV 0x38(%RBP),%R15 |
(351) 0x24cad1 MOV (%R15),%R12 |
(351) 0x24cad4 JMP 24cae8 |
0x24cad6 NOPW %CS:(%RAX,%RAX,1) |
(354) 0x24cae0 INC %R9 |
(354) 0x24cae3 CMP %R9,%R10 |
(354) 0x24cae6 JE 24cb10 |
(354) 0x24cae8 MOV (%RBX,%R9,8),%R15 |
(354) 0x24caec CMP %R14,(%R11,%R15,8) |
(354) 0x24caf0 JNE 24cae0 |
(354) 0x24caf2 VMOVSD (%R12,%R9,8),%XMM2 |
(354) 0x24caf8 VANDPD %XMM5,%XMM2,%XMM2 |
(354) 0x24cafc VFMADD231SD %XMM6,%XMM2,%XMM0 |
(354) 0x24cb01 VMOVSD %XMM0,(%RDX,%RCX,8) |
(354) 0x24cb06 JMP 24cae0 |
0x24cb08 NOPL (%RAX,%RAX,1) |
(351) 0x24cb10 MOV -0x38(%RBP),%R12 |
(351) 0x24cb14 VMOVAPD %XMM1,%XMM2 |
(351) 0x24cb18 VMULSD %XMM7,%XMM2,%XMM1 |
(351) 0x24cb1c VUCOMISD %XMM0,%XMM1 |
(351) 0x24cb20 JB 24c980 |
(351) 0x24cb26 VMOVSD %XMM2,(%RDX,%RCX,8) |
(351) 0x24cb2b JMP 24c980 |
(351) 0x24cb30 VMOVAPD %XMM2,%XMM1 |
(351) 0x24cb34 CMPQ $0,-0x30(%RBP) |
(351) 0x24cb39 JE 24cb14 |
(351) 0x24cb3b MOV -0x40(%RBP),%R10 |
(351) 0x24cb3f MOV (%R10,%RCX,8),%R9 |
(351) 0x24cb43 MOV 0x8(%R10,%RCX,8),%R10 |
(351) 0x24cb48 CMP %R10,%R9 |
(351) 0x24cb4b JGE 24cb14 |
(351) 0x24cb4d NOPL (%RAX) |
(352) 0x24cb50 VMOVSD (%R12,%R9,8),%XMM2 |
(352) 0x24cb56 INC %R9 |
(352) 0x24cb59 VANDPD %XMM5,%XMM2,%XMM2 |
(352) 0x24cb5d VFMADD231SD %XMM6,%XMM2,%XMM0 |
(352) 0x24cb62 VMOVSD %XMM0,(%RDX,%RCX,8) |
(352) 0x24cb67 CMP %R9,%R10 |
(352) 0x24cb6a JNE 24cb50 |
(351) 0x24cb6c JMP 24cb14 |
(333) 0x24cb6e MOV 0x20(%RBP),%RDI |
(333) 0x24cb72 MOV (%RDI),%R8 |
(333) 0x24cb75 TEST %RDX,%RDX |
(333) 0x24cb78 JE 24ce26 |
(333) 0x24cb7e MOV 0x38(%RBP),%RDX |
(333) 0x24cb82 MOV %RAX,%R10 |
(333) 0x24cb85 MOV (%RDX),%R9 |
(333) 0x24cb88 JMP 24cb9f |
0x24cb8a NOPW (%RAX,%RAX,1) |
(358) 0x24cb90 MOV %R11,%RSI |
(358) 0x24cb93 MOV %RDX,%R10 |
(358) 0x24cb96 CMP %R13,%RDX |
(358) 0x24cb99 JE 24cf00 |
(358) 0x24cb9f MOVQ $0,(%RCX,%R10,8) |
(358) 0x24cba7 VXORPD %XMM0,%XMM0,%XMM0 |
(358) 0x24cbab MOV 0x8(%R14,%R10,8),%R11 |
(358) 0x24cbb0 CMP %R11,%RSI |
(358) 0x24cbb3 JGE 24cbdc |
(358) 0x24cbb5 NOPW %CS:(%RAX,%RAX,1) |
(360) 0x24cbc0 VMOVSD (%R8,%RSI,8),%XMM1 |
(360) 0x24cbc6 INC %RSI |
(360) 0x24cbc9 VANDPD %XMM5,%XMM1,%XMM1 |
(360) 0x24cbcd VADDSD %XMM1,%XMM0,%XMM0 |
(360) 0x24cbd1 VMOVSD %XMM0,(%RCX,%R10,8) |
(360) 0x24cbd7 CMP %RSI,%R11 |
(360) 0x24cbda JNE 24cbc0 |
(358) 0x24cbdc MOV -0x40(%RBP),%RDI |
(358) 0x24cbe0 LEA 0x1(%R10),%RDX |
(358) 0x24cbe4 MOV (%RDI,%R10,8),%RSI |
(358) 0x24cbe8 MOV (%RDI,%RDX,8),%RDI |
(358) 0x24cbec CMP %RDI,%RSI |
(358) 0x24cbef JGE 24cb90 |
(358) 0x24cbf1 NOPW %CS:(%RAX,%RAX,1) |
(359) 0x24cc00 VMOVSD (%R9,%RSI,8),%XMM1 |
(359) 0x24cc06 INC %RSI |
(359) 0x24cc09 VANDPD %XMM5,%XMM1,%XMM1 |
(359) 0x24cc0d VADDSD %XMM1,%XMM0,%XMM0 |
(359) 0x24cc11 VMOVSD %XMM0,(%RCX,%R10,8) |
(359) 0x24cc17 CMP %RSI,%RDI |
(359) 0x24cc1a JNE 24cc00 |
(358) 0x24cc1c JMP 24cb90 |
(333) 0x24cc21 MOV %RAX,%R8 |
(333) 0x24cc24 JMP 24cc3f |
0x24cc26 NOPW %CS:(%RAX,%RAX,1) |
(336) 0x24cc30 INC %R8 |
(336) 0x24cc33 MOV %R9,%RDI |
(336) 0x24cc36 CMP %R13,%R8 |
(336) 0x24cc39 JE 24cf00 |
(336) 0x24cc3f MOVQ $0,(%RCX,%R8,8) |
(336) 0x24cc47 MOV 0x8(%RDX,%R8,8),%R9 |
(336) 0x24cc4c CMP %R9,%RDI |
(336) 0x24cc4f JGE 24cc30 |
(336) 0x24cc51 VXORPD %XMM0,%XMM0,%XMM0 |
(336) 0x24cc55 NOPW %CS:(%RAX,%RAX,1) |
(337) 0x24cc60 VMOVSD (%RSI,%RDI,8),%XMM1 |
(337) 0x24cc65 INC %RDI |
(337) 0x24cc68 VFMADD231SD %XMM1,%XMM1,%XMM0 |
(337) 0x24cc6d VMOVSD %XMM0,(%RCX,%R8,8) |
(337) 0x24cc73 CMP %RDI,%R9 |
(337) 0x24cc76 JNE 24cc60 |
(336) 0x24cc78 JMP 24cc30 |
(333) 0x24cc7a TEST %RSI,%RSI |
(333) 0x24cc7d JE 24ce7d |
(333) 0x24cc83 MOV 0x38(%RBP),%RSI |
(333) 0x24cc87 MOV %RAX,%R10 |
(333) 0x24cc8a MOV (%RSI),%R9 |
(333) 0x24cc8d JMP 24cc9f |
0x24cc8f NOP |
(343) 0x24cc90 MOV %R11,%RCX |
(343) 0x24cc93 MOV %RSI,%R10 |
(343) 0x24cc96 CMP %R13,%RSI |
(343) 0x24cc99 JE 24cf00 |
(343) 0x24cc9f MOVQ $0,(%RDX,%R10,8) |
(343) 0x24cca7 VXORPD %XMM0,%XMM0,%XMM0 |
(343) 0x24ccab MOV 0x8(%R14,%R10,8),%R11 |
(343) 0x24ccb0 CMP %R11,%RCX |
(343) 0x24ccb3 JGE 24ccf0 |
(343) 0x24ccb5 MOV 0x20(%RBP),%RSI |
(343) 0x24ccb9 MOV (%RSI),%RBX |
(343) 0x24ccbc JMP 24ccdb |
0x24ccbe XCHG %AX,%AX |
(345) 0x24ccc0 VMOVSD (%RBX,%RCX,8),%XMM1 |
(345) 0x24ccc5 VANDPD %XMM5,%XMM1,%XMM1 |
(345) 0x24ccc9 VADDSD %XMM1,%XMM0,%XMM0 |
(345) 0x24cccd VMOVSD %XMM0,(%RDX,%R10,8) |
(345) 0x24ccd3 INC %RCX |
(345) 0x24ccd6 CMP %RCX,%R11 |
(345) 0x24ccd9 JE 24ccf0 |
(345) 0x24ccdb MOV (%RDI,%RCX,8),%RSI |
(345) 0x24ccdf CMP %RAX,%RSI |
(345) 0x24cce2 JL 24ccc0 |
(345) 0x24cce4 CMP %R10,%RSI |
(345) 0x24cce7 JE 24ccc0 |
(345) 0x24cce9 CMP %R13,%RSI |
(345) 0x24ccec JL 24ccd3 |
(345) 0x24ccee JMP 24ccc0 |
(343) 0x24ccf0 MOV -0x38(%RBP),%R8 |
(343) 0x24ccf4 LEA 0x1(%R10),%RSI |
(343) 0x24ccf8 MOV (%R8,%R10,8),%RCX |
(343) 0x24ccfc MOV (%R8,%RSI,8),%R8 |
(343) 0x24cd00 CMP %R8,%RCX |
(343) 0x24cd03 JGE 24cc90 |
(343) 0x24cd05 NOPW %CS:(%RAX,%RAX,1) |
(344) 0x24cd10 VMOVSD (%R9,%RCX,8),%XMM1 |
(344) 0x24cd16 INC %RCX |
(344) 0x24cd19 VANDPD %XMM5,%XMM1,%XMM1 |
(344) 0x24cd1d VADDSD %XMM1,%XMM0,%XMM0 |
(344) 0x24cd21 VMOVSD %XMM0,(%RDX,%R10,8) |
(344) 0x24cd27 CMP %RCX,%R8 |
(344) 0x24cd2a JNE 24cd10 |
(343) 0x24cd2c JMP 24cc90 |
(333) 0x24cd31 MOV %RAX,%RDI |
(333) 0x24cd34 JMP 24cd4f |
0x24cd36 NOPW %CS:(%RAX,%RAX,1) |
(361) 0x24cd40 INC %RDI |
(361) 0x24cd43 MOV %R10,%RSI |
(361) 0x24cd46 CMP %R13,%RDI |
(361) 0x24cd49 JE 24cf00 |
(361) 0x24cd4f MOVQ $0,(%RCX,%RDI,8) |
(361) 0x24cd57 MOV 0x8(%R14,%RDI,8),%R10 |
(361) 0x24cd5c CMP %R10,%RSI |
(361) 0x24cd5f JGE 24cd40 |
(361) 0x24cd61 MOV 0x20(%RBP),%R11 |
(361) 0x24cd65 MOV (%R8,%RDI,8),%RDX |
(361) 0x24cd69 VXORPD %XMM0,%XMM0,%XMM0 |
(361) 0x24cd6d MOV (%R11),%R11 |
(361) 0x24cd70 JMP 24cd88 |
0x24cd72 NOPW %CS:(%RAX,%RAX,1) |
(362) 0x24cd80 INC %RSI |
(362) 0x24cd83 CMP %RSI,%R10 |
(362) 0x24cd86 JE 24cd40 |
(362) 0x24cd88 MOV (%R9,%RSI,8),%RBX |
(362) 0x24cd8c CMP %RDX,(%R8,%RBX,8) |
(362) 0x24cd90 JNE 24cd80 |
(362) 0x24cd92 VMOVSD (%R11,%RSI,8),%XMM1 |
(362) 0x24cd98 VANDPD %XMM5,%XMM1,%XMM1 |
(362) 0x24cd9c VADDSD %XMM1,%XMM0,%XMM0 |
(362) 0x24cda0 VMOVSD %XMM0,(%RCX,%RDI,8) |
(362) 0x24cda5 JMP 24cd80 |
(333) 0x24cda7 MOV %RAX,%R8 |
(333) 0x24cdaa JMP 24cdbf |
0x24cdac NOPL (%RAX) |
(346) 0x24cdb0 INC %R8 |
(346) 0x24cdb3 MOV %R10,%RCX |
(346) 0x24cdb6 CMP %R13,%R8 |
(346) 0x24cdb9 JE 24cf00 |
(346) 0x24cdbf MOVQ $0,(%RDX,%R8,8) |
(346) 0x24cdc7 MOV 0x8(%R14,%R8,8),%R10 |
(346) 0x24cdcc CMP %R10,%RCX |
(346) 0x24cdcf JGE 24cdb0 |
(346) 0x24cdd1 MOV 0x20(%RBP),%RSI |
(346) 0x24cdd5 MOV (%R9,%R8,8),%R11 |
(346) 0x24cdd9 VXORPD %XMM0,%XMM0,%XMM0 |
(346) 0x24cddd MOV (%RSI),%RBX |
(346) 0x24cde0 JMP 24cdf8 |
0x24cde2 NOPW %CS:(%RAX,%RAX,1) |
(347) 0x24cdf0 INC %RCX |
(347) 0x24cdf3 CMP %RCX,%R10 |
(347) 0x24cdf6 JE 24cdb0 |
(347) 0x24cdf8 MOV (%RDI,%RCX,8),%RSI |
(347) 0x24cdfc CMP %RAX,%RSI |
(347) 0x24cdff JL 24ce0b |
(347) 0x24ce01 CMP %R8,%RSI |
(347) 0x24ce04 JE 24ce0b |
(347) 0x24ce06 CMP %R13,%RSI |
(347) 0x24ce09 JL 24cdf0 |
(347) 0x24ce0b CMP %R11,(%R9,%RSI,8) |
(347) 0x24ce0f JNE 24cdf0 |
(347) 0x24ce11 VMOVSD (%RBX,%RCX,8),%XMM1 |
(347) 0x24ce16 VANDPD %XMM5,%XMM1,%XMM1 |
(347) 0x24ce1a VADDSD %XMM1,%XMM0,%XMM0 |
(347) 0x24ce1e VMOVSD %XMM0,(%RDX,%R8,8) |
(347) 0x24ce24 JMP 24cdf0 |
(333) 0x24ce26 MOV %RAX,%RDI |
(333) 0x24ce29 JMP 24ce3f |
0x24ce2b NOPL (%RAX,%RAX,1) |
(356) 0x24ce30 INC %RDI |
(356) 0x24ce33 MOV %RDX,%RSI |
(356) 0x24ce36 CMP %R13,%RDI |
(356) 0x24ce39 JE 24cf00 |
(356) 0x24ce3f MOVQ $0,(%RCX,%RDI,8) |
(356) 0x24ce47 MOV 0x8(%R14,%RDI,8),%RDX |
(356) 0x24ce4c CMP %RDX,%RSI |
(356) 0x24ce4f JGE 24ce30 |
(356) 0x24ce51 VXORPD %XMM0,%XMM0,%XMM0 |
(356) 0x24ce55 NOPW %CS:(%RAX,%RAX,1) |
(357) 0x24ce60 VMOVSD (%R8,%RSI,8),%XMM1 |
(357) 0x24ce66 INC %RSI |
(357) 0x24ce69 VANDPD %XMM5,%XMM1,%XMM1 |
(357) 0x24ce6d VADDSD %XMM1,%XMM0,%XMM0 |
(357) 0x24ce71 VMOVSD %XMM0,(%RCX,%RDI,8) |
(357) 0x24ce76 CMP %RSI,%RDX |
(357) 0x24ce79 JNE 24ce60 |
(356) 0x24ce7b JMP 24ce30 |
(333) 0x24ce7d MOV %RAX,%R8 |
(333) 0x24ce80 JMP 24ce9b |
0x24ce82 NOPW %CS:(%RAX,%RAX,1) |
(341) 0x24ce90 INC %R8 |
(341) 0x24ce93 MOV %R9,%RCX |
(341) 0x24ce96 CMP %R13,%R8 |
(341) 0x24ce99 JE 24cf00 |
(341) 0x24ce9b MOVQ $0,(%RDX,%R8,8) |
(341) 0x24cea3 MOV 0x8(%R14,%R8,8),%R9 |
(341) 0x24cea8 CMP %R9,%RCX |
(341) 0x24ceab JGE 24ce90 |
(341) 0x24cead MOV 0x20(%RBP),%RSI |
(341) 0x24ceb1 VXORPD %XMM0,%XMM0,%XMM0 |
(341) 0x24ceb5 MOV (%RSI),%R10 |
(341) 0x24ceb8 JMP 24cedc |
0x24ceba NOPW (%RAX,%RAX,1) |
(342) 0x24cec0 VMOVSD (%R10,%RCX,8),%XMM1 |
(342) 0x24cec6 VANDPD %XMM5,%XMM1,%XMM1 |
(342) 0x24ceca VADDSD %XMM1,%XMM0,%XMM0 |
(342) 0x24cece VMOVSD %XMM0,(%RDX,%R8,8) |
(342) 0x24ced4 INC %RCX |
(342) 0x24ced7 CMP %RCX,%R9 |
(342) 0x24ceda JE 24ce90 |
(342) 0x24cedc MOV (%RDI,%RCX,8),%RSI |
(342) 0x24cee0 CMP %RAX,%RSI |
(342) 0x24cee3 JL 24cec0 |
(342) 0x24cee5 CMP %R8,%RSI |
(342) 0x24cee8 JE 24cec0 |
(342) 0x24ceea CMP %R13,%RSI |
(342) 0x24ceed JL 24ced4 |
(342) 0x24ceef JMP 24cec0 |
0x24cef1 NOPW %CS:(%RAX,%RAX,1) |
(333) 0x24cf00 CMP %R13,%RAX |
(333) 0x24cf03 JGE 24c510 |
(333) 0x24cf09 MOV 0x20(%RBP),%RCX |
(333) 0x24cf0d MOV 0x18(%RBP),%RDX |
(333) 0x24cf11 MOV -0x48(%RBP),%RSI |
(333) 0x24cf15 MOV %RAX,%RDI |
(333) 0x24cf18 MOV (%RCX),%RCX |
(333) 0x24cf1b MOV (%RDX),%RDX |
(333) 0x24cf1e MOV (%RSI),%RSI |
(333) 0x24cf21 JMP 24cf38 |
0x24cf23 NOPW %CS:(%RAX,%RAX,1) |
(335) 0x24cf30 INC %RDI |
(335) 0x24cf33 CMP %RDI,%R13 |
(335) 0x24cf36 JE 24cf60 |
(335) 0x24cf38 MOV (%RDX,%RDI,8),%R8 |
(335) 0x24cf3c VUCOMISD (%RCX,%R8,8),%XMM3 |
(335) 0x24cf42 JBE 24cf30 |
(335) 0x24cf44 VMOVSD (%RSI,%RDI,8),%XMM0 |
(335) 0x24cf49 VXORPD %XMM4,%XMM0,%XMM0 |
(335) 0x24cf4d VMOVLPD %XMM0,(%RSI,%RDI,8) |
(335) 0x24cf52 JMP 24cf30 |
0x24cf54 NOPW %CS:(%RAX,%RAX,1) |
(333) 0x24cf60 MOV -0x48(%RBP),%RCX |
(333) 0x24cf64 VMOVSD %XMM2,-0x30(%RBP) |
(333) 0x24cf69 MOV (%RCX),%RCX |
(333) 0x24cf6c NOPL (%RAX) |
(334) 0x24cf70 VMOVSD (%RCX,%RAX,8),%XMM0 |
(334) 0x24cf75 VUCOMISD %XMM3,%XMM0 |
(334) 0x24cf79 JNE 24cf7d |
(334) 0x24cf7b JNP 24cfb0 |
(334) 0x24cf7d INC %RAX |
(334) 0x24cf80 CMP %RAX,%R13 |
(334) 0x24cf83 JNE 24cf70 |
(333) 0x24cf85 MOV -0x60(%RBP),%RBX |
(333) 0x24cf89 VMOVAPD -0xb0(%RBP),%XMM4 |
(333) 0x24cf91 VMOVSD -0x30(%RBP),%XMM2 |
(333) 0x24cf96 CMP %RBX,-0x98(%RBP) |
(333) 0x24cf9d JL 24c521 |
0x24cfa3 JMP 24d002 |
0x24cfa5 NOPW %CS:(%RAX,%RAX,1) |
(333) 0x24cfb0 MOV $0xdd4,%ESI |
(333) 0x24cfb5 MOV $0xc,%EDX |
(333) 0x24cfba LEA -0x31afb(%RIP),%RDI |
(333) 0x24cfc1 XOR %ECX,%ECX |
(333) 0x24cfc3 CALL 2e0c30 <hypre_error_handler> |
(333) 0x24cfc8 VMOVSD -0x3dc98(%RIP),%XMM7 |
(333) 0x24cfd0 VMOVSD -0x3dc30(%RIP),%XMM6 |
(333) 0x24cfd8 VMOVAPD -0xc0(%RBP),%XMM5 |
(333) 0x24cfe0 MOV -0x50(%RBP),%RBX |
(333) 0x24cfe4 VXORPD %XMM3,%XMM3,%XMM3 |
(333) 0x24cfe8 VMOVAPD -0xb0(%RBP),%XMM4 |
(333) 0x24cff0 VMOVSD -0x30(%RBP),%XMM2 |
(333) 0x24cff5 CMP %RBX,-0x98(%RBP) |
(333) 0x24cffc JL 24c521 |
0x24d002 MOV -0x54(%RBP),%ESI |
0x24d005 LEA 0x9738c(%RIP),%RDI |
0x24d00c CALL 2e2d60 <@plt_start@+0xa0> |
0x24d011 ADD $0x98,%RSP |
0x24d018 POP %RBX |
0x24d019 POP %R12 |
0x24d01b POP %R13 |
0x24d01d POP %R14 |
0x24d01f POP %R15 |
0x24d021 POP %RBP |
0x24d022 RET |
0x24d023 NOPW %CS:(%RAX,%RAX,1) |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ►96.74+ | __kmp_invoke_microtask | libomp.so | |
| ○ | __kmp_invoke_task_func | libomp.so | |
| ○ | __kmp_launch_thread | libomp.so | |
| ○ | __kmp_launch_worker(void*) | libomp.so | |
| ○ | start_thread | libc.so.6 | |
| ○ | __GI___clone3 | libc.so.6 | |
| ►2.96+ | __kmp_invoke_microtask | libomp.so | |
| ○ | __kmp_invoke_task_func | libomp.so | |
| ○ | __kmp_fork_call | libomp.so | |
| ○ | __kmpc_fork_call | libomp.so | |
| ○ | hypre_ParCSRComputeL1NormsThre[...] | ams.c:3363 | exec |
| ○ | hypre_BoomerAMGSetup | par_amg_setup.c:1409 | exec |
| ○ | hypre_PCGSetup | pcg.c:234 | exec |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0
| Source file and lines | ams.c:3363-3540 |
| Module | exec |
| nb instructions | 97 |
| nb uops | 65 |
| loop length | 571 |
| used x86 registers | 14 |
| used mmx registers | 0 |
| used xmm registers | 5 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 12 |
| micro-operation queue | 8.13 cycles |
| front end | 8.13 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 4.00 | 4.00 | 4.00 | 4.00 | 4.00 | 4.00 | 6.00 | 6.00 | 6.00 | 6.00 | 0.50 | 0.50 | 0.50 | 0.50 | 1.00 | 1.00 |
| cycles | 4.00 | 4.00 | 4.00 | 4.00 | 4.00 | 4.00 | 6.00 | 6.00 | 6.00 | 6.00 | 0.50 | 0.50 | 0.50 | 0.50 | 1.00 | 1.00 |
| Cycles executing div or sqrt instructions | NA |
| Front-end | 8.13 |
| Dispatch | 6.00 |
| Overall L1 | 8.13 |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 42% |
| load | 0% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 100% |
| all | 11% |
| load | 0% |
| store | 15% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 20% |
| all | 10% |
| load | 9% |
| store | 10% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 12% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 12% |
| all | 17% |
| load | 12% |
| store | 25% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 25% |
| all | 12% |
| load | 10% |
| store | 12% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 12% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 15% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| SUB $0x98,%RSP | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV (%RDX),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | scal (12.5%) |
| MOV %R9,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
| MOV %R8,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
| MOV %RCX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
| MOV %RDX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
| TEST %RBX,%RBX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (12.5%) |
| JLE 24d011 <hypre_ParCSRComputeL1NormsThreads.omp_outlined+0xbe1> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
| MOV (%RDI),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | scal (6.3%) |
| DEC %RBX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (12.5%) |
| MOVQ $0,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| MOVQ $0x1,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| MOVL $0,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| MOV %RBX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
| SUB $0x8,%RSP | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| LEA -0xa0(%RBP),%RAX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LEA 0x97ee8(%RIP),%RDI | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LEA -0x58(%RBP),%RCX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LEA -0x70(%RBP),%R8 | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LEA -0x50(%RBP),%R9 | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| MOV %ESI,-0x54(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| MOV $0x22,%EDX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CALL 2e2d50 <@plt_start@+0x90> | 2 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| ADD $0x20,%RSP | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV -0x50(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | N/A |
| MOV -0x70(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | scal (12.5%) |
| CMP %RBX,%RAX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (12.5%) |
| MOV %RCX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
| CMOVL %RAX,%RBX | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
| MOV %RBX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
| CMP %RBX,%RCX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (12.5%) |
| JG 24d002 <hypre_ParCSRComputeL1NormsThreads.omp_outlined+0xbd2> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
| VMOVDDUP -0x3d132(%RIP),%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VMOVDDUP -0x3d192(%RIP),%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VMOVSD -0x3d14a(%RIP),%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VMOVSD -0x3d1c2(%RIP),%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VXORPD %XMM3,%XMM3,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| VMOVAPD %XMM4,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 0.50 | vect (25.0%) |
| VMOVAPD %XMM5,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 0.50 | vect (25.0%) |
| JMP 24c521 <hypre_ParCSRComputeL1NormsThreads.omp_outlined+0xf1> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| XCHG %AX,%AX | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| JMP 24d002 <hypre_ParCSRComputeL1NormsThreads.omp_outlined+0xbd2> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| MOV -0x54(%RBP),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | scal (6.3%) |
| LEA 0x9738c(%RIP),%RDI | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| CALL 2e2d60 <@plt_start@+0xa0> | 2 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| ADD $0x98,%RSP | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| RET | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0
| Source file and lines | ams.c:3363-3540 |
| Module | exec |
| nb instructions | 97 |
| nb uops | 65 |
| loop length | 571 |
| used x86 registers | 14 |
| used mmx registers | 0 |
| used xmm registers | 5 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 12 |
| micro-operation queue | 8.13 cycles |
| front end | 8.13 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 4.00 | 4.00 | 4.00 | 4.00 | 4.00 | 4.00 | 6.00 | 6.00 | 6.00 | 6.00 | 0.50 | 0.50 | 0.50 | 0.50 | 1.00 | 1.00 |
| cycles | 4.00 | 4.00 | 4.00 | 4.00 | 4.00 | 4.00 | 6.00 | 6.00 | 6.00 | 6.00 | 0.50 | 0.50 | 0.50 | 0.50 | 1.00 | 1.00 |
| Cycles executing div or sqrt instructions | NA |
| Front-end | 8.13 |
| Dispatch | 6.00 |
| Overall L1 | 8.13 |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 42% |
| load | 0% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 100% |
| all | 11% |
| load | 0% |
| store | 15% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 20% |
| all | 10% |
| load | 9% |
| store | 10% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 12% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 12% |
| all | 17% |
| load | 12% |
| store | 25% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 25% |
| all | 12% |
| load | 10% |
| store | 12% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 12% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 15% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| SUB $0x98,%RSP | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV (%RDX),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | scal (12.5%) |
| MOV %R9,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
| MOV %R8,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
| MOV %RCX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
| MOV %RDX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
| TEST %RBX,%RBX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (12.5%) |
| JLE 24d011 <hypre_ParCSRComputeL1NormsThreads.omp_outlined+0xbe1> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
| MOV (%RDI),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | scal (6.3%) |
| DEC %RBX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (12.5%) |
| MOVQ $0,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| MOVQ $0x1,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| MOVL $0,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| MOV %RBX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
| SUB $0x8,%RSP | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| LEA -0xa0(%RBP),%RAX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LEA 0x97ee8(%RIP),%RDI | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LEA -0x58(%RBP),%RCX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LEA -0x70(%RBP),%R8 | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LEA -0x50(%RBP),%R9 | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| MOV %ESI,-0x54(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| MOV $0x22,%EDX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CALL 2e2d50 <@plt_start@+0x90> | 2 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| ADD $0x20,%RSP | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV -0x50(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | N/A |
| MOV -0x70(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | scal (12.5%) |
| CMP %RBX,%RAX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (12.5%) |
| MOV %RCX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
| CMOVL %RAX,%RBX | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
| MOV %RBX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
| CMP %RBX,%RCX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (12.5%) |
| JG 24d002 <hypre_ParCSRComputeL1NormsThreads.omp_outlined+0xbd2> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
| VMOVDDUP -0x3d132(%RIP),%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VMOVDDUP -0x3d192(%RIP),%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VMOVSD -0x3d14a(%RIP),%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VMOVSD -0x3d1c2(%RIP),%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VXORPD %XMM3,%XMM3,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| VMOVAPD %XMM4,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 0.50 | vect (25.0%) |
| VMOVAPD %XMM5,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 0.50 | vect (25.0%) |
| JMP 24c521 <hypre_ParCSRComputeL1NormsThreads.omp_outlined+0xf1> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| XCHG %AX,%AX | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| JMP 24d002 <hypre_ParCSRComputeL1NormsThreads.omp_outlined+0xbd2> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| MOV -0x54(%RBP),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | scal (6.3%) |
| LEA 0x9738c(%RIP),%RDI | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| CALL 2e2d60 <@plt_start@+0xa0> | 2 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| ADD $0x98,%RSP | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| RET | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
| Name | Coverage (%) | Time (s) |
|---|---|---|
| ▼hypre_ParCSRComputeL1NormsThreads.omp_outlined– | 0.32 | 0.17 |
| ▼Loop 333 - ams.c:3365-3540 - exec– | 0.00 | 0.00 |
| ○Loop 335 - ams.c:3532-3534 - exec | 0.07 | 0.03 |
| ○Loop 334 - ams.c:3536-3538 - exec | 0.01 | 0.01 |
| ▼Loop 358 - ams.c:3382-3394 - exec– | 0.00 | 0.01 |
| ○Loop 360 - ams.c:3388-3389 - exec | 0.24 | 0.12 |
| ○Loop 359 - ams.c:3393-3394 - exec | 0.00 | 0.00 |
| ▼Loop 343 - ams.c:3416-3432 - exec– | 0.00 | 0.00 |
| ○Loop 344 - ams.c:3431-3432 - exec | 0.00 | 0.00 |
| ○Loop 345 - ams.c:3422-3426 - exec | 0.00 | 0.00 |
| ▼Loop 348 - ams.c:3416-3451 - exec– | 0.00 | 0.00 |
| ○Loop 350 - ams.c:3439-3444 - exec | 0.00 | 0.00 |
| ○Loop 349 - ams.c:3449-3451 - exec | 0.00 | 0.00 |
| ▼Loop 338 - ams.c:3458-3465 - exec– | 0.00 | 0.00 |
| ○Loop 339 - ams.c:3464-3465 - exec | 0.00 | 0.00 |
| ○Loop 340 - ams.c:3461-3462 - exec | 0.00 | 0.00 |
| ▼Loop 346 - ams.c:3403-3444 - exec– | 0.00 | 0.00 |
| ○Loop 347 - ams.c:3439-3444 - exec | 0.00 | 0.00 |
| ▼Loop 351 - ams.c:3470-3527 - exec– | 0.00 | 0.00 |
| ○Loop 355 - ams.c:3501-3513 - exec | 0.00 | 0.00 |
| ○Loop 352 - ams.c:3493-3494 - exec | 0.00 | 0.00 |
| ○Loop 354 - ams.c:3519-3521 - exec | 0.00 | 0.00 |
| ○Loop 353 - ams.c:3476-3487 - exec | 0.00 | 0.00 |
| ▼Loop 363 - ams.c:3382-3409 - exec– | 0.00 | 0.00 |
| ○Loop 364 - ams.c:3407-3409 - exec | 0.00 | 0.00 |
| ○Loop 365 - ams.c:3401-3403 - exec | 0.00 | 0.00 |
| ▼Loop 361 - ams.c:3382-3431 - exec– | 0.00 | 0.00 |
| ○Loop 362 - ams.c:3401-3403 - exec | 0.00 | 0.00 |
| ▼Loop 356 - ams.c:3382-3444 - exec– | 0.00 | 0.00 |
| ○Loop 357 - ams.c:3388-3389 - exec | 0.00 | 0.00 |
| ▼Loop 341 - ams.c:3388-3426 - exec– | 0.00 | 0.00 |
| ○Loop 342 - ams.c:3422-3426 - exec | 0.00 | 0.00 |
| ▼Loop 336 - ams.c:3393-3462 - exec– | 0.00 | 0.00 |
| ○Loop 337 - ams.c:3461-3462 - exec | 0.00 | 0.00 |