Loop Id: 611 | Module: exec | Source: par_multi_interp.c:1774-1876 | Coverage: 0.29% |
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Loop Id: 611 | Module: exec | Source: par_multi_interp.c:1774-1876 | Coverage: 0.29% |
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0x463950 MOV -0x98(%RBP),%RCX |
0x463957 MOV -0xc0(%RBP),%R8 |
0x46395e MOV -0x118(%RBP),%RDX |
0x463965 MOV (%RCX),%RDI |
0x463968 LEA (,%RDI,8),%RAX |
0x463970 MOV (%RDX,%RDI,8),%RDX |
0x463974 LEA 0x8(%RAX),%RSI |
0x463978 MOV %RAX,-0x48(%RBP) |
0x46397c ADD %R8,%RAX |
0x46397f LEA (%R8,%RSI,1),%RCX |
0x463983 MOV %RAX,-0xd8(%RBP) |
0x46398a MOV (%RAX),%RAX |
0x46398d MOV (%RCX),%R8 |
0x463990 MOV %RCX,-0xd0(%RBP) |
0x463997 ADD %RDX,%R8 |
0x46399a SUB %RAX,%R8 |
0x46399d CMP %R8,%RDX |
0x4639a0 JGE 463b96 |
0x4639a6 MOV %RAX,%RCX |
0x4639a9 SUB %RDX,%RCX |
0x4639ac SUB %RAX,%RDX |
0x4639af MOV %RDX,-0x38(%RBP) |
0x4639b3 ADD %R8,%RCX |
0x4639b6 MOV -0xb0(%RBP),%RDX |
0x4639bd MOV -0x150(%RBP),%R8 |
0x4639c4 MOV (%R8,%RDX,1),%R8 |
0x4639c8 MOV -0x38(%RBP),%RDX |
0x4639cc LEA (%R8,%RDX,8),%RDX |
0x4639d0 MOV %RCX,%R8 |
0x4639d3 SUB %RAX,%R8 |
0x4639d6 AND $0x7,%R8D |
0x4639da JE 463abd |
0x4639e0 CMP $0x1,%R8 |
0x4639e4 JE 463a9c |
0x4639ea CMP $0x2,%R8 |
0x4639ee JE 463a84 |
0x4639f4 CMP $0x3,%R8 |
0x4639f8 JE 463a6c |
0x4639fa CMP $0x4,%R8 |
0x4639fe JE 463a54 |
0x463a00 CMP $0x5,%R8 |
0x463a04 JE 463a3c |
0x463a06 CMP $0x6,%R8 |
0x463a0a JE 463a24 |
0x463a0c MOV (%RDX,%RAX,8),%R8 |
0x463a10 MOV %RAX,(%R9,%R8,8) |
0x463a14 MOVQ $0,(%R12,%RAX,8) |
0x463a1c INC %RAX |
0x463a1f MOV %R8,-0x8(%R13,%RAX,8) |
0x463a24 MOV (%RDX,%RAX,8),%R8 |
0x463a28 MOV %RAX,(%R9,%R8,8) |
0x463a2c MOVQ $0,(%R12,%RAX,8) |
0x463a34 INC %RAX |
0x463a37 MOV %R8,-0x8(%R13,%RAX,8) |
0x463a3c MOV (%RDX,%RAX,8),%R8 |
0x463a40 MOV %RAX,(%R9,%R8,8) |
0x463a44 MOVQ $0,(%R12,%RAX,8) |
0x463a4c INC %RAX |
0x463a4f MOV %R8,-0x8(%R13,%RAX,8) |
0x463a54 MOV (%RDX,%RAX,8),%R8 |
0x463a58 MOV %RAX,(%R9,%R8,8) |
0x463a5c MOVQ $0,(%R12,%RAX,8) |
0x463a64 INC %RAX |
0x463a67 MOV %R8,-0x8(%R13,%RAX,8) |
0x463a6c MOV (%RDX,%RAX,8),%R8 |
0x463a70 MOV %RAX,(%R9,%R8,8) |
0x463a74 MOVQ $0,(%R12,%RAX,8) |
0x463a7c INC %RAX |
0x463a7f MOV %R8,-0x8(%R13,%RAX,8) |
0x463a84 MOV (%RDX,%RAX,8),%R8 |
0x463a88 MOV %RAX,(%R9,%R8,8) |
0x463a8c MOVQ $0,(%R12,%RAX,8) |
0x463a94 INC %RAX |
0x463a97 MOV %R8,-0x8(%R13,%RAX,8) |
0x463a9c MOV (%RDX,%RAX,8),%R8 |
0x463aa0 MOV %RAX,(%R9,%R8,8) |
0x463aa4 MOVQ $0,(%R12,%RAX,8) |
0x463aac INC %RAX |
0x463aaf MOV %R8,-0x8(%R13,%RAX,8) |
0x463ab4 CMP %RCX,%RAX |
0x463ab7 JE 463b96 |
0x463abd MOV %RBX,-0x38(%RBP) |
(622) 0x463ac1 MOV (%RDX,%RAX,8),%RBX |
(622) 0x463ac5 LEA 0x1(%RAX),%R8 |
(622) 0x463ac9 MOV %RAX,(%R9,%RBX,8) |
(622) 0x463acd MOVQ $0,(%R12,%RAX,8) |
(622) 0x463ad5 MOV %RBX,-0x8(%R13,%R8,8) |
(622) 0x463ada MOV (%RDX,%R8,8),%RBX |
(622) 0x463ade MOV %R8,(%R9,%RBX,8) |
(622) 0x463ae2 MOVQ $0,(%R12,%R8,8) |
(622) 0x463aea LEA 0x2(%RAX),%R8 |
(622) 0x463aee MOV %RBX,-0x8(%R13,%R8,8) |
(622) 0x463af3 MOV (%RDX,%R8,8),%RBX |
(622) 0x463af7 MOV %R8,(%R9,%RBX,8) |
(622) 0x463afb MOVQ $0,(%R12,%R8,8) |
(622) 0x463b03 LEA 0x3(%RAX),%R8 |
(622) 0x463b07 MOV %RBX,-0x8(%R13,%R8,8) |
(622) 0x463b0c MOV (%RDX,%R8,8),%RBX |
(622) 0x463b10 MOV %R8,(%R9,%RBX,8) |
(622) 0x463b14 MOVQ $0,(%R12,%R8,8) |
(622) 0x463b1c LEA 0x4(%RAX),%R8 |
(622) 0x463b20 MOV %RBX,-0x8(%R13,%R8,8) |
(622) 0x463b25 MOV (%RDX,%R8,8),%RBX |
(622) 0x463b29 MOV %R8,(%R9,%RBX,8) |
(622) 0x463b2d MOVQ $0,(%R12,%R8,8) |
(622) 0x463b35 LEA 0x5(%RAX),%R8 |
(622) 0x463b39 MOV %RBX,-0x8(%R13,%R8,8) |
(622) 0x463b3e MOV (%RDX,%R8,8),%RBX |
(622) 0x463b42 MOV %R8,(%R9,%RBX,8) |
(622) 0x463b46 MOVQ $0,(%R12,%R8,8) |
(622) 0x463b4e LEA 0x6(%RAX),%R8 |
(622) 0x463b52 MOV %RBX,-0x8(%R13,%R8,8) |
(622) 0x463b57 MOV (%RDX,%R8,8),%RBX |
(622) 0x463b5b MOV %R8,(%R9,%RBX,8) |
(622) 0x463b5f MOVQ $0,(%R12,%R8,8) |
(622) 0x463b67 LEA 0x7(%RAX),%R8 |
(622) 0x463b6b ADD $0x8,%RAX |
(622) 0x463b6f MOV %RBX,-0x8(%R13,%R8,8) |
(622) 0x463b74 MOV (%RDX,%R8,8),%RBX |
(622) 0x463b78 MOV %R8,(%R9,%RBX,8) |
(622) 0x463b7c MOVQ $0,(%R12,%R8,8) |
(622) 0x463b84 MOV %RBX,-0x8(%R13,%RAX,8) |
(622) 0x463b89 CMP %RCX,%RAX |
(622) 0x463b8c JNE 463ac1 |
0x463b92 MOV -0x38(%RBP),%RBX |
0x463b96 MOV -0x110(%RBP),%RAX |
0x463b9d MOV -0x48(%RBP),%R8 |
0x463ba1 MOV (%RAX,%RDI,8),%RDX |
0x463ba5 MOV -0xb8(%RBP),%RAX |
0x463bac LEA (%RAX,%RSI,1),%RCX |
0x463bb0 ADD %R8,%RAX |
0x463bb3 MOV (%RCX),%R8 |
0x463bb6 MOV %RAX,-0xe8(%RBP) |
0x463bbd MOV (%RAX),%RAX |
0x463bc0 MOV %RCX,-0xe0(%RBP) |
0x463bc7 ADD %RDX,%R8 |
0x463bca SUB %RAX,%R8 |
0x463bcd CMP %R8,%RDX |
0x463bd0 JGE 463dc6 |
0x463bd6 MOV %RAX,%RCX |
0x463bd9 SUB %RDX,%RCX |
0x463bdc SUB %RAX,%RDX |
0x463bdf MOV %RDX,-0x38(%RBP) |
0x463be3 ADD %R8,%RCX |
0x463be6 MOV -0xb0(%RBP),%RDX |
0x463bed MOV -0x148(%RBP),%R8 |
0x463bf4 MOV (%R8,%RDX,1),%R8 |
0x463bf8 MOV -0x38(%RBP),%RDX |
0x463bfc LEA (%R8,%RDX,8),%RDX |
0x463c00 MOV %RCX,%R8 |
0x463c03 SUB %RAX,%R8 |
0x463c06 AND $0x7,%R8D |
0x463c0a JE 463ced |
0x463c10 CMP $0x1,%R8 |
0x463c14 JE 463ccc |
0x463c1a CMP $0x2,%R8 |
0x463c1e JE 463cb4 |
0x463c24 CMP $0x3,%R8 |
0x463c28 JE 463c9c |
0x463c2a CMP $0x4,%R8 |
0x463c2e JE 463c84 |
0x463c30 CMP $0x5,%R8 |
0x463c34 JE 463c6c |
0x463c36 CMP $0x6,%R8 |
0x463c3a JE 463c54 |
0x463c3c MOV (%RDX,%RAX,8),%R8 |
0x463c40 MOV %RAX,(%RBX,%R8,8) |
0x463c44 MOVQ $0,(%R11,%RAX,8) |
0x463c4c INC %RAX |
0x463c4f MOV %R8,-0x8(%R10,%RAX,8) |
0x463c54 MOV (%RDX,%RAX,8),%R8 |
0x463c58 MOV %RAX,(%RBX,%R8,8) |
0x463c5c MOVQ $0,(%R11,%RAX,8) |
0x463c64 INC %RAX |
0x463c67 MOV %R8,-0x8(%R10,%RAX,8) |
0x463c6c MOV (%RDX,%RAX,8),%R8 |
0x463c70 MOV %RAX,(%RBX,%R8,8) |
0x463c74 MOVQ $0,(%R11,%RAX,8) |
0x463c7c INC %RAX |
0x463c7f MOV %R8,-0x8(%R10,%RAX,8) |
0x463c84 MOV (%RDX,%RAX,8),%R8 |
0x463c88 MOV %RAX,(%RBX,%R8,8) |
0x463c8c MOVQ $0,(%R11,%RAX,8) |
0x463c94 INC %RAX |
0x463c97 MOV %R8,-0x8(%R10,%RAX,8) |
0x463c9c MOV (%RDX,%RAX,8),%R8 |
0x463ca0 MOV %RAX,(%RBX,%R8,8) |
0x463ca4 MOVQ $0,(%R11,%RAX,8) |
0x463cac INC %RAX |
0x463caf MOV %R8,-0x8(%R10,%RAX,8) |
0x463cb4 MOV (%RDX,%RAX,8),%R8 |
0x463cb8 MOV %RAX,(%RBX,%R8,8) |
0x463cbc MOVQ $0,(%R11,%RAX,8) |
0x463cc4 INC %RAX |
0x463cc7 MOV %R8,-0x8(%R10,%RAX,8) |
0x463ccc MOV (%RDX,%RAX,8),%R8 |
0x463cd0 MOV %RAX,(%RBX,%R8,8) |
0x463cd4 MOVQ $0,(%R11,%RAX,8) |
0x463cdc INC %RAX |
0x463cdf MOV %R8,-0x8(%R10,%RAX,8) |
0x463ce4 CMP %RCX,%RAX |
0x463ce7 JE 463dc6 |
0x463ced MOV %R9,-0x38(%RBP) |
(621) 0x463cf1 MOV (%RDX,%RAX,8),%R9 |
(621) 0x463cf5 LEA 0x1(%RAX),%R8 |
(621) 0x463cf9 MOV %RAX,(%RBX,%R9,8) |
(621) 0x463cfd MOVQ $0,(%R11,%RAX,8) |
(621) 0x463d05 MOV %R9,-0x8(%R10,%R8,8) |
(621) 0x463d0a MOV (%RDX,%R8,8),%R9 |
(621) 0x463d0e MOV %R8,(%RBX,%R9,8) |
(621) 0x463d12 MOVQ $0,(%R11,%R8,8) |
(621) 0x463d1a LEA 0x2(%RAX),%R8 |
(621) 0x463d1e MOV %R9,-0x8(%R10,%R8,8) |
(621) 0x463d23 MOV (%RDX,%R8,8),%R9 |
(621) 0x463d27 MOV %R8,(%RBX,%R9,8) |
(621) 0x463d2b MOVQ $0,(%R11,%R8,8) |
(621) 0x463d33 LEA 0x3(%RAX),%R8 |
(621) 0x463d37 MOV %R9,-0x8(%R10,%R8,8) |
(621) 0x463d3c MOV (%RDX,%R8,8),%R9 |
(621) 0x463d40 MOV %R8,(%RBX,%R9,8) |
(621) 0x463d44 MOVQ $0,(%R11,%R8,8) |
(621) 0x463d4c LEA 0x4(%RAX),%R8 |
(621) 0x463d50 MOV %R9,-0x8(%R10,%R8,8) |
(621) 0x463d55 MOV (%RDX,%R8,8),%R9 |
(621) 0x463d59 MOV %R8,(%RBX,%R9,8) |
(621) 0x463d5d MOVQ $0,(%R11,%R8,8) |
(621) 0x463d65 LEA 0x5(%RAX),%R8 |
(621) 0x463d69 MOV %R9,-0x8(%R10,%R8,8) |
(621) 0x463d6e MOV (%RDX,%R8,8),%R9 |
(621) 0x463d72 MOV %R8,(%RBX,%R9,8) |
(621) 0x463d76 MOVQ $0,(%R11,%R8,8) |
(621) 0x463d7e LEA 0x6(%RAX),%R8 |
(621) 0x463d82 MOV %R9,-0x8(%R10,%R8,8) |
(621) 0x463d87 MOV (%RDX,%R8,8),%R9 |
(621) 0x463d8b MOV %R8,(%RBX,%R9,8) |
(621) 0x463d8f MOVQ $0,(%R11,%R8,8) |
(621) 0x463d97 LEA 0x7(%RAX),%R8 |
(621) 0x463d9b ADD $0x8,%RAX |
(621) 0x463d9f MOV %R9,-0x8(%R10,%R8,8) |
(621) 0x463da4 MOV (%RDX,%R8,8),%R9 |
(621) 0x463da8 MOV %R8,(%RBX,%R9,8) |
(621) 0x463dac MOVQ $0,(%R11,%R8,8) |
(621) 0x463db4 MOV %R9,-0x8(%R10,%RAX,8) |
(621) 0x463db9 CMP %RCX,%RAX |
(621) 0x463dbc JNE 463cf1 |
0x463dc2 MOV -0x38(%RBP),%R9 |
0x463dc6 MOV -0x128(%RBP),%RCX |
0x463dcd LEA (%RCX,%RSI,1),%R8 |
0x463dd1 MOV (%RCX,%RDI,8),%RAX |
0x463dd5 MOV (%R8),%RCX |
0x463dd8 CMP %RCX,%RAX |
0x463ddb JGE 463e0a |
0x463ddd MOV %RSI,-0x38(%RBP) |
0x463de1 NOPL (%RAX) |
(620) 0x463de8 MOV -0x70(%RBP),%RSI |
(620) 0x463dec MOV (%RSI,%RAX,8),%RDX |
(620) 0x463df0 MOV -0x60(%RBP),%RSI |
(620) 0x463df4 CMP %R14,(%RSI,%RDX,8) |
(620) 0x463df8 JE 464008 |
(620) 0x463dfe INC %RAX |
(620) 0x463e01 CMP %RCX,%RAX |
(620) 0x463e04 JL 463de8 |
0x463e06 MOV -0x38(%RBP),%RSI |
0x463e0a MOV -0x120(%RBP),%R8 |
0x463e11 ADD %R8,%RSI |
0x463e14 MOV (%R8,%RDI,8),%RAX |
0x463e18 MOV (%RSI),%RCX |
0x463e1b CMP %RCX,%RAX |
0x463e1e JGE 463e3e |
(619) 0x463e20 MOV -0x68(%RBP),%RDX |
(619) 0x463e24 MOV -0x58(%RBP),%R8 |
(619) 0x463e28 MOV (%RDX,%RAX,8),%RDX |
(619) 0x463e2c CMP %R14,(%R8,%RDX,8) |
(619) 0x463e30 JE 464028 |
(619) 0x463e36 INC %RAX |
(619) 0x463e39 CMP %RCX,%RAX |
(619) 0x463e3c JL 463e20 |
0x463e3e MOV -0x138(%RBP),%RSI |
0x463e45 MOV -0x48(%RBP),%RDX |
0x463e49 MOV (%RSI,%RDI,8),%R8 |
0x463e4d MOV 0x8(%RSI,%RDX,1),%RDX |
0x463e52 LEA 0x1(%R8),%RAX |
0x463e56 CMP %RDX,%RAX |
0x463e59 JGE 46490c |
0x463e5f MOV -0x170(%RBP),%RCX |
0x463e66 SAL $0x3,%RAX |
0x463e6a VXORPD %XMM0,%XMM0,%XMM0 |
0x463e6e MOV %R15,-0xf0(%RBP) |
0x463e75 MOV %R8,-0xf8(%RBP) |
0x463e7c VMOVSD %XMM0,%XMM0,%XMM4 |
0x463e80 LEA (%RCX,%RAX,1),%RSI |
0x463e84 LEA (%RCX,%RDX,8),%RDX |
0x463e88 MOV %R14,-0x100(%RBP) |
0x463e8f MOV %RSI,-0xa8(%RBP) |
0x463e96 MOV -0xc8(%RBP),%RSI |
0x463e9d MOV %RDX,-0x38(%RBP) |
0x463ea1 ADD %RSI,%RAX |
0x463ea4 MOV -0xa8(%RBP),%RSI |
0x463eab JMP 463ed3 |
(616) 0x463eb0 MOV -0x88(%RBP),%RDX |
(616) 0x463eb7 MOV -0x48(%RBP),%R8 |
(616) 0x463ebb MOV (%RDX,%RCX,8),%RCX |
(616) 0x463ebf CMP %RCX,(%RDX,%R8,1) |
(616) 0x463ec3 JE 463efe |
(616) 0x463ec5 ADD $0x8,%RSI |
(616) 0x463ec9 ADD $0x8,%RAX |
(616) 0x463ecd CMP %RSI,-0x38(%RBP) |
(616) 0x463ed1 JE 463f10 |
(616) 0x463ed3 MOV (%RSI),%RCX |
(616) 0x463ed6 MOV -0x40(%RBP),%R15 |
(616) 0x463eda LEA (,%RCX,8),%R8 |
(616) 0x463ee2 CMP (%R15,%RCX,8),%RDI |
(616) 0x463ee6 JE 464048 |
(616) 0x463eec MOV -0x80(%RBP),%R14 |
(616) 0x463ef0 CMPQ $-0x3,(%R14,%RCX,8) |
(616) 0x463ef5 JE 463ec5 |
(616) 0x463ef7 CMPQ $0x1,-0x50(%RBP) |
(616) 0x463efc JNE 463eb0 |
(616) 0x463efe VADDSD (%RAX),%XMM0,%XMM0 |
(616) 0x463f02 ADD $0x8,%RSI |
(616) 0x463f06 ADD $0x8,%RAX |
(616) 0x463f0a CMP %RSI,-0x38(%RBP) |
(616) 0x463f0e JNE 463ed3 |
0x463f10 MOV -0xf0(%RBP),%R15 |
0x463f17 MOV -0xf8(%RBP),%R8 |
0x463f1e MOV -0x100(%RBP),%R14 |
0x463f25 MOV -0x130(%RBP),%RCX |
0x463f2c MOV -0x48(%RBP),%RAX |
0x463f30 MOV (%RCX,%RDI,8),%RDX |
0x463f34 MOV 0x8(%RCX,%RAX,1),%RCX |
0x463f39 CMP %RCX,%RDX |
0x463f3c JGE 464358 |
0x463f42 MOV -0x160(%RBP),%RAX |
0x463f49 SAL $0x3,%RDX |
0x463f4d MOV %R10,-0xf0(%RBP) |
0x463f54 MOV %R13,-0xf8(%RBP) |
0x463f5b LEA (%RAX,%RDX,1),%RSI |
0x463f5f MOV %R8,-0x100(%RBP) |
0x463f66 MOV %RSI,-0x38(%RBP) |
0x463f6a MOV -0x168(%RBP),%RSI |
0x463f71 ADD %RSI,%RDX |
0x463f74 LEA (%RAX,%RCX,8),%RSI |
0x463f78 MOV %R14,%RAX |
0x463f7b MOV -0x158(%RBP),%R14 |
0x463f82 JMP 463fba |
(614) 0x463f88 MOV -0x88(%RBP),%R10 |
(614) 0x463f8f MOV -0x48(%RBP),%R13 |
(614) 0x463f93 MOV -0xa0(%RBP),%RCX |
(614) 0x463f9a MOV (%R10,%R13,1),%R10 |
(614) 0x463f9e CMP %R10,(%RCX,%R8,1) |
(614) 0x463fa2 JE 463ffc |
(614) 0x463fa4 ADDQ $0x8,-0x38(%RBP) |
(614) 0x463fa9 MOV -0x38(%RBP),%RCX |
(614) 0x463fad ADD $0x8,%RDX |
(614) 0x463fb1 CMP %RCX,%RSI |
(614) 0x463fb4 JE 464340 |
(614) 0x463fba MOV -0x38(%RBP),%R13 |
(614) 0x463fbe MOV (%R13),%RCX |
(614) 0x463fc2 TEST %R15,%R15 |
(614) 0x463fc5 JE 463fd2 |
(614) 0x463fc7 MOV -0x90(%RBP),%R10 |
(614) 0x463fce MOV (%R10,%RCX,8),%RCX |
(614) 0x463fd2 LEA (,%RCX,8),%R8 |
(614) 0x463fda TEST %RCX,%RCX |
(614) 0x463fdd JS 463fee |
(614) 0x463fdf MOV -0x78(%RBP),%R13 |
(614) 0x463fe3 CMP (%R13,%RCX,8),%RDI |
(614) 0x463fe8 JE 464620 |
(614) 0x463fee CMPQ $-0x3,(%R14,%R8,1) |
(614) 0x463ff3 JE 463fa4 |
(614) 0x463ff5 CMPQ $0x1,-0x50(%RBP) |
(614) 0x463ffa JNE 463f88 |
(614) 0x463ffc VADDSD (%RDX),%XMM0,%XMM0 |
(614) 0x464000 JMP 463fa4 |
(620) 0x464008 MOV -0x40(%RBP),%RCX |
(620) 0x46400c INC %RAX |
(620) 0x46400f MOV %RDI,(%RCX,%RDX,8) |
(620) 0x464013 MOV (%R8),%RCX |
(620) 0x464016 CMP %RAX,%RCX |
(620) 0x464019 JG 463de8 |
0x46401f JMP 463e06 |
(619) 0x464028 MOV -0x78(%RBP),%RCX |
(619) 0x46402c INC %RAX |
(619) 0x46402f MOV %RDI,(%RCX,%RDX,8) |
(619) 0x464033 MOV (%RSI),%RCX |
(619) 0x464036 CMP %RAX,%RCX |
(619) 0x464039 JG 463e20 |
0x46403f JMP 463e3e |
(616) 0x464048 MOV -0xc0(%RBP),%R15 |
(616) 0x46404f MOV (%R15,%RCX,8),%RDX |
(616) 0x464053 MOV 0x8(%R15,%R8,1),%R15 |
(616) 0x464058 CMP %R15,%RDX |
(616) 0x46405b JGE 4641ca |
(616) 0x464061 MOV %R15,%R14 |
(616) 0x464064 SUB %RDX,%R14 |
(616) 0x464067 AND $0x3,%R14D |
(616) 0x46406b JE 46410e |
(616) 0x464071 CMP $0x1,%R14 |
(616) 0x464075 JE 4640d7 |
(616) 0x464077 CMP $0x2,%R14 |
(616) 0x46407b JE 4640a9 |
(616) 0x46407d MOV (%R13,%RDX,8),%R14 |
(616) 0x464082 VMOVSD (%RAX),%XMM5 |
(616) 0x464086 VMULSD (%R12,%RDX,8),%XMM5,%XMM6 |
(616) 0x46408c INC %RDX |
(616) 0x46408f MOV (%R9,%R14,8),%R14 |
(616) 0x464093 LEA (%R12,%R14,8),%R14 |
(616) 0x464097 VADDSD (%R14),%XMM6,%XMM7 |
(616) 0x46409c VADDSD %XMM6,%XMM4,%XMM4 |
(616) 0x4640a0 VADDSD %XMM6,%XMM0,%XMM0 |
(616) 0x4640a4 VMOVSD %XMM7,(%R14) |
(616) 0x4640a9 MOV (%R13,%RDX,8),%R14 |
(616) 0x4640ae VMOVSD (%RAX),%XMM8 |
(616) 0x4640b2 VMULSD (%R12,%RDX,8),%XMM8,%XMM9 |
(616) 0x4640b8 INC %RDX |
(616) 0x4640bb MOV (%R9,%R14,8),%R14 |
(616) 0x4640bf LEA (%R12,%R14,8),%R14 |
(616) 0x4640c3 VADDSD (%R14),%XMM9,%XMM10 |
(616) 0x4640c8 VADDSD %XMM9,%XMM4,%XMM4 |
(616) 0x4640cd VADDSD %XMM9,%XMM0,%XMM0 |
(616) 0x4640d2 VMOVSD %XMM10,(%R14) |
(616) 0x4640d7 MOV (%R13,%RDX,8),%R14 |
(616) 0x4640dc VMOVSD (%RAX),%XMM11 |
(616) 0x4640e0 VMULSD (%R12,%RDX,8),%XMM11,%XMM12 |
(616) 0x4640e6 INC %RDX |
(616) 0x4640e9 MOV (%R9,%R14,8),%R14 |
(616) 0x4640ed LEA (%R12,%R14,8),%R14 |
(616) 0x4640f1 VADDSD (%R14),%XMM12,%XMM13 |
(616) 0x4640f6 VADDSD %XMM12,%XMM4,%XMM4 |
(616) 0x4640fb VADDSD %XMM12,%XMM0,%XMM0 |
(616) 0x464100 VMOVSD %XMM13,(%R14) |
(616) 0x464105 CMP %R15,%RDX |
(616) 0x464108 JE 4641ca |
(618) 0x46410e MOV (%R13,%RDX,8),%R14 |
(618) 0x464113 VMOVSD (%RAX),%XMM14 |
(618) 0x464117 VMULSD (%R12,%RDX,8),%XMM14,%XMM15 |
(618) 0x46411d MOV (%R9,%R14,8),%R14 |
(618) 0x464121 LEA (%R12,%R14,8),%R14 |
(618) 0x464125 VADDSD (%R14),%XMM15,%XMM1 |
(618) 0x46412a VADDSD %XMM15,%XMM4,%XMM6 |
(618) 0x46412f VADDSD %XMM15,%XMM0,%XMM7 |
(618) 0x464134 VMOVSD %XMM1,(%R14) |
(618) 0x464139 MOV 0x8(%R13,%RDX,8),%R14 |
(618) 0x46413e VMOVSD (%RAX),%XMM5 |
(618) 0x464142 VMULSD 0x8(%R12,%RDX,8),%XMM5,%XMM8 |
(618) 0x464149 MOV (%R9,%R14,8),%R14 |
(618) 0x46414d LEA (%R12,%R14,8),%R14 |
(618) 0x464151 VADDSD (%R14),%XMM8,%XMM9 |
(618) 0x464156 VADDSD %XMM8,%XMM6,%XMM10 |
(618) 0x46415b VADDSD %XMM8,%XMM7,%XMM11 |
(618) 0x464160 VMOVSD %XMM9,(%R14) |
(618) 0x464165 MOV 0x10(%R13,%RDX,8),%R14 |
(618) 0x46416a VMOVSD (%RAX),%XMM12 |
(618) 0x46416e VMULSD 0x10(%R12,%RDX,8),%XMM12,%XMM13 |
(618) 0x464175 MOV (%R9,%R14,8),%R14 |
(618) 0x464179 LEA (%R12,%R14,8),%R14 |
(618) 0x46417d VADDSD (%R14),%XMM13,%XMM4 |
(618) 0x464182 VADDSD %XMM13,%XMM10,%XMM14 |
(618) 0x464187 VADDSD %XMM13,%XMM11,%XMM0 |
(618) 0x46418c VMOVSD %XMM4,(%R14) |
(618) 0x464191 MOV 0x18(%R13,%RDX,8),%R14 |
(618) 0x464196 VMOVSD (%RAX),%XMM15 |
(618) 0x46419a VMULSD 0x18(%R12,%RDX,8),%XMM15,%XMM12 |
(618) 0x4641a1 ADD $0x4,%RDX |
(618) 0x4641a5 MOV (%R9,%R14,8),%R14 |
(618) 0x4641a9 LEA (%R12,%R14,8),%R14 |
(618) 0x4641ad VADDSD (%R14),%XMM12,%XMM1 |
(618) 0x4641b2 VADDSD %XMM12,%XMM14,%XMM4 |
(618) 0x4641b7 VADDSD %XMM12,%XMM0,%XMM0 |
(618) 0x4641bc VMOVSD %XMM1,(%R14) |
(618) 0x4641c1 CMP %R15,%RDX |
(618) 0x4641c4 JNE 46410e |
(616) 0x4641ca MOV -0xb8(%RBP),%R15 |
(616) 0x4641d1 MOV (%R15,%RCX,8),%RDX |
(616) 0x4641d5 MOV 0x8(%R15,%R8,1),%R8 |
(616) 0x4641da CMP %R8,%RDX |
(616) 0x4641dd JGE 463ec5 |
(616) 0x4641e3 MOV %R8,%RCX |
(616) 0x4641e6 SUB %RDX,%RCX |
(616) 0x4641e9 AND $0x3,%ECX |
(616) 0x4641ec JE 464286 |
(616) 0x4641f2 CMP $0x1,%RCX |
(616) 0x4641f6 JE 464252 |
(616) 0x4641f8 CMP $0x2,%RCX |
(616) 0x4641fc JE 464227 |
(616) 0x4641fe MOV (%R10,%RDX,8),%R14 |
(616) 0x464202 VMOVSD (%RAX),%XMM6 |
(616) 0x464206 VMULSD (%R11,%RDX,8),%XMM6,%XMM7 |
(616) 0x46420c INC %RDX |
(616) 0x46420f MOV (%RBX,%R14,8),%R15 |
(616) 0x464213 LEA (%R11,%R15,8),%RCX |
(616) 0x464217 VADDSD (%RCX),%XMM7,%XMM5 |
(616) 0x46421b VADDSD %XMM7,%XMM4,%XMM4 |
(616) 0x46421f VADDSD %XMM7,%XMM0,%XMM0 |
(616) 0x464223 VMOVSD %XMM5,(%RCX) |
(616) 0x464227 MOV (%R10,%RDX,8),%R14 |
(616) 0x46422b VMOVSD (%RAX),%XMM8 |
(616) 0x46422f VMULSD (%R11,%RDX,8),%XMM8,%XMM9 |
(616) 0x464235 INC %RDX |
(616) 0x464238 MOV (%RBX,%R14,8),%R15 |
(616) 0x46423c LEA (%R11,%R15,8),%RCX |
(616) 0x464240 VADDSD (%RCX),%XMM9,%XMM10 |
(616) 0x464244 VADDSD %XMM9,%XMM4,%XMM4 |
(616) 0x464249 VADDSD %XMM9,%XMM0,%XMM0 |
(616) 0x46424e VMOVSD %XMM10,(%RCX) |
(616) 0x464252 MOV (%R10,%RDX,8),%R14 |
(616) 0x464256 VMOVSD (%RAX),%XMM11 |
(616) 0x46425a VMULSD (%R11,%RDX,8),%XMM11,%XMM12 |
(616) 0x464260 INC %RDX |
(616) 0x464263 MOV (%RBX,%R14,8),%R15 |
(616) 0x464267 LEA (%R11,%R15,8),%RCX |
(616) 0x46426b VADDSD (%RCX),%XMM12,%XMM13 |
(616) 0x46426f VADDSD %XMM12,%XMM4,%XMM4 |
(616) 0x464274 VADDSD %XMM12,%XMM0,%XMM0 |
(616) 0x464279 VMOVSD %XMM13,(%RCX) |
(616) 0x46427d CMP %R8,%RDX |
(616) 0x464280 JE 463ec5 |
(617) 0x464286 MOV (%R10,%RDX,8),%R14 |
(617) 0x46428a VMOVSD (%RAX),%XMM12 |
(617) 0x46428e VMULSD (%R11,%RDX,8),%XMM12,%XMM14 |
(617) 0x464294 MOV (%RBX,%R14,8),%R15 |
(617) 0x464298 MOV 0x8(%R10,%RDX,8),%R14 |
(617) 0x46429d LEA (%R11,%R15,8),%RCX |
(617) 0x4642a1 MOV (%RBX,%R14,8),%R15 |
(617) 0x4642a5 MOV 0x10(%R10,%RDX,8),%R14 |
(617) 0x4642aa VADDSD (%RCX),%XMM14,%XMM15 |
(617) 0x4642ae VADDSD %XMM14,%XMM4,%XMM4 |
(617) 0x4642b3 VADDSD %XMM14,%XMM0,%XMM0 |
(617) 0x4642b8 VMOVSD %XMM15,(%RCX) |
(617) 0x4642bc LEA (%R11,%R15,8),%RCX |
(617) 0x4642c0 VMOVSD (%RAX),%XMM1 |
(617) 0x4642c4 MOV (%RBX,%R14,8),%R15 |
(617) 0x4642c8 VMULSD 0x8(%R11,%RDX,8),%XMM1,%XMM6 |
(617) 0x4642cf MOV 0x18(%R10,%RDX,8),%R14 |
(617) 0x4642d4 VADDSD (%RCX),%XMM6,%XMM7 |
(617) 0x4642d8 VMOVSD %XMM7,(%RCX) |
(617) 0x4642dc LEA (%R11,%R15,8),%RCX |
(617) 0x4642e0 VMOVSD (%RAX),%XMM5 |
(617) 0x4642e4 MOV (%RBX,%R14,8),%R15 |
(617) 0x4642e8 VMULSD 0x10(%R11,%RDX,8),%XMM5,%XMM10 |
(617) 0x4642ef VADDSD %XMM6,%XMM4,%XMM8 |
(617) 0x4642f3 VADDSD %XMM6,%XMM0,%XMM9 |
(617) 0x4642f7 VADDSD (%RCX),%XMM10,%XMM11 |
(617) 0x4642fb VMOVSD %XMM11,(%RCX) |
(617) 0x4642ff VMOVSD (%RAX),%XMM12 |
(617) 0x464303 VMULSD 0x18(%R11,%RDX,8),%XMM12,%XMM12 |
(617) 0x46430a LEA (%R11,%R15,8),%RCX |
(617) 0x46430e VADDSD %XMM10,%XMM8,%XMM13 |
(617) 0x464313 VADDSD %XMM10,%XMM9,%XMM14 |
(617) 0x464318 ADD $0x4,%RDX |
(617) 0x46431c VADDSD (%RCX),%XMM12,%XMM15 |
(617) 0x464320 VADDSD %XMM12,%XMM13,%XMM4 |
(617) 0x464325 VADDSD %XMM12,%XMM14,%XMM0 |
(617) 0x46432a VMOVSD %XMM15,(%RCX) |
(617) 0x46432e CMP %R8,%RDX |
(617) 0x464331 JNE 464286 |
(616) 0x464337 JMP 463ec5 |
0x464340 MOV -0xf0(%RBP),%R10 |
0x464347 MOV -0xf8(%RBP),%R13 |
0x46434e MOV %RAX,%R14 |
0x464351 MOV -0x100(%RBP),%R8 |
0x464358 MOV -0xc8(%RBP),%RDI |
0x46435f VMULSD (%RDI,%R8,8),%XMM4,%XMM9 |
0x464365 VCOMISD %XMM2,%XMM9 |
0x464369 JE 464374 |
0x46436b VXORPD %XMM3,%XMM0,%XMM10 |
0x46436f VDIVSD %XMM9,%XMM10,%XMM12 |
0x464374 MOV -0xd8(%RBP),%R8 |
0x46437b MOV -0xd0(%RBP),%RDX |
0x464382 MOV (%R8),%RAX |
0x464385 MOV (%RDX),%RSI |
0x464388 CMP %RSI,%RAX |
0x46438b JGE 464490 |
0x464391 LEA (%R12,%RSI,8),%RCX |
0x464395 LEA (%R12,%RAX,8),%RDI |
0x464399 MOV %RCX,%R8 |
0x46439c SUB %RDI,%R8 |
0x46439f SUB $0x8,%R8 |
0x4643a3 SHR $0x3,%R8 |
0x4643a7 INC %R8 |
0x4643aa AND $0x7,%R8D |
0x4643ae JE 464438 |
0x4643b4 CMP $0x1,%R8 |
0x4643b8 JE 464426 |
0x4643ba CMP $0x2,%R8 |
0x4643be JE 464419 |
0x4643c0 CMP $0x3,%R8 |
0x4643c4 JE 46440c |
0x4643c6 CMP $0x4,%R8 |
0x4643ca JE 4643ff |
0x4643cc CMP $0x5,%R8 |
0x4643d0 JE 4643f2 |
0x4643d2 CMP $0x6,%R8 |
0x4643d6 JE 4643e5 |
0x4643d8 VMULSD (%RDI),%XMM12,%XMM5 |
0x4643dc ADD $0x8,%RDI |
0x4643e0 VMOVSD %XMM5,-0x8(%RDI) |
0x4643e5 VMULSD (%RDI),%XMM12,%XMM11 |
0x4643e9 ADD $0x8,%RDI |
0x4643ed VMOVSD %XMM11,-0x8(%RDI) |
0x4643f2 VMULSD (%RDI),%XMM12,%XMM13 |
0x4643f6 ADD $0x8,%RDI |
0x4643fa VMOVSD %XMM13,-0x8(%RDI) |
0x4643ff VMULSD (%RDI),%XMM12,%XMM14 |
0x464403 ADD $0x8,%RDI |
0x464407 VMOVSD %XMM14,-0x8(%RDI) |
0x46440c VMULSD (%RDI),%XMM12,%XMM15 |
0x464410 ADD $0x8,%RDI |
0x464414 VMOVSD %XMM15,-0x8(%RDI) |
0x464419 VMULSD (%RDI),%XMM12,%XMM1 |
0x46441d ADD $0x8,%RDI |
0x464421 VMOVSD %XMM1,-0x8(%RDI) |
0x464426 VMULSD (%RDI),%XMM12,%XMM6 |
0x46442a ADD $0x8,%RDI |
0x46442e VMOVSD %XMM6,-0x8(%RDI) |
0x464433 CMP %RCX,%RDI |
0x464436 JE 464490 |
(613) 0x464438 VMULSD (%RDI),%XMM12,%XMM7 |
(613) 0x46443c ADD $0x40,%RDI |
(613) 0x464440 VMULSD -0x38(%RDI),%XMM12,%XMM4 |
(613) 0x464445 VMULSD -0x30(%RDI),%XMM12,%XMM0 |
(613) 0x46444a VMULSD -0x28(%RDI),%XMM12,%XMM8 |
(613) 0x46444f VMULSD -0x20(%RDI),%XMM12,%XMM9 |
(613) 0x464454 VMULSD -0x18(%RDI),%XMM12,%XMM10 |
(613) 0x464459 VMOVSD %XMM7,-0x40(%RDI) |
(613) 0x46445e VMULSD -0x10(%RDI),%XMM12,%XMM5 |
(613) 0x464463 VMOVSD %XMM4,-0x38(%RDI) |
(613) 0x464468 VMULSD -0x8(%RDI),%XMM12,%XMM11 |
(613) 0x46446d VMOVSD %XMM0,-0x30(%RDI) |
(613) 0x464472 VMOVSD %XMM8,-0x28(%RDI) |
(613) 0x464477 VMOVSD %XMM9,-0x20(%RDI) |
(613) 0x46447c VMOVSD %XMM10,-0x18(%RDI) |
(613) 0x464481 VMOVSD %XMM5,-0x10(%RDI) |
(613) 0x464486 VMOVSD %XMM11,-0x8(%RDI) |
(613) 0x46448b CMP %RCX,%RDI |
(613) 0x46448e JNE 464438 |
0x464490 MOV -0xe8(%RBP),%RAX |
0x464497 MOV -0xe0(%RBP),%RDX |
0x46449e MOV (%RAX),%RSI |
0x4644a1 MOV (%RDX),%RDI |
0x4644a4 CMP %RSI,%RDI |
0x4644a7 JLE 4645c9 |
0x4644ad LEA (%R11,%RDI,8),%RCX |
0x4644b1 LEA (%R11,%RSI,8),%R8 |
0x4644b5 MOV %RCX,%RAX |
0x4644b8 SUB %R8,%RAX |
0x4644bb SUB $0x8,%RAX |
0x4644bf SHR $0x3,%RAX |
0x4644c3 INC %RAX |
0x4644c6 AND $0x7,%EAX |
0x4644c9 JE 464561 |
0x4644cf CMP $0x1,%RAX |
0x4644d3 JE 46454d |
0x4644d5 CMP $0x2,%RAX |
0x4644d9 JE 46453e |
0x4644db CMP $0x3,%RAX |
0x4644df JE 46452f |
0x4644e1 CMP $0x4,%RAX |
0x4644e5 JE 464520 |
0x4644e7 CMP $0x5,%RAX |
0x4644eb JE 464511 |
0x4644ed CMP $0x6,%RAX |
0x4644f1 JE 464502 |
0x4644f3 VMULSD (%R8),%XMM12,%XMM13 |
0x4644f8 ADD $0x8,%R8 |
0x4644fc VMOVSD %XMM13,-0x8(%R8) |
0x464502 VMULSD (%R8),%XMM12,%XMM14 |
0x464507 ADD $0x8,%R8 |
0x46450b VMOVSD %XMM14,-0x8(%R8) |
0x464511 VMULSD (%R8),%XMM12,%XMM15 |
0x464516 ADD $0x8,%R8 |
0x46451a VMOVSD %XMM15,-0x8(%R8) |
0x464520 VMULSD (%R8),%XMM12,%XMM1 |
0x464525 ADD $0x8,%R8 |
0x464529 VMOVSD %XMM1,-0x8(%R8) |
0x46452f VMULSD (%R8),%XMM12,%XMM6 |
0x464534 ADD $0x8,%R8 |
0x464538 VMOVSD %XMM6,-0x8(%R8) |
0x46453e VMULSD (%R8),%XMM12,%XMM7 |
0x464543 ADD $0x8,%R8 |
0x464547 VMOVSD %XMM7,-0x8(%R8) |
0x46454d VMULSD (%R8),%XMM12,%XMM4 |
0x464552 ADD $0x8,%R8 |
0x464556 VMOVSD %XMM4,-0x8(%R8) |
0x46455c CMP %R8,%RCX |
0x46455f JE 4645c9 |
(612) 0x464561 VMULSD (%R8),%XMM12,%XMM0 |
(612) 0x464566 ADD $0x40,%R8 |
(612) 0x46456a VMULSD -0x38(%R8),%XMM12,%XMM8 |
(612) 0x464570 VMULSD -0x30(%R8),%XMM12,%XMM9 |
(612) 0x464576 VMULSD -0x28(%R8),%XMM12,%XMM10 |
(612) 0x46457c VMULSD -0x20(%R8),%XMM12,%XMM5 |
(612) 0x464582 VMULSD -0x18(%R8),%XMM12,%XMM11 |
(612) 0x464588 VMOVSD %XMM0,-0x40(%R8) |
(612) 0x46458e VMULSD -0x10(%R8),%XMM12,%XMM13 |
(612) 0x464594 VMOVSD %XMM8,-0x38(%R8) |
(612) 0x46459a VMULSD -0x8(%R8),%XMM12,%XMM14 |
(612) 0x4645a0 VMOVSD %XMM9,-0x30(%R8) |
(612) 0x4645a6 VMOVSD %XMM10,-0x28(%R8) |
(612) 0x4645ac VMOVSD %XMM5,-0x20(%R8) |
(612) 0x4645b2 VMOVSD %XMM11,-0x18(%R8) |
(612) 0x4645b8 VMOVSD %XMM13,-0x10(%R8) |
(612) 0x4645be VMOVSD %XMM14,-0x8(%R8) |
(612) 0x4645c4 CMP %R8,%RCX |
(612) 0x4645c7 JNE 464561 |
0x4645c9 ADDQ $0x8,-0x98(%RBP) |
0x4645d1 MOV -0x98(%RBP),%RSI |
0x4645d8 CMP %RSI,-0x140(%RBP) |
0x4645df JNE 463950 |
(614) 0x464620 MOV -0x180(%RBP),%RCX |
(614) 0x464627 MOV -0x178(%RBP),%R13 |
(614) 0x46462e MOV (%RCX,%R8,1),%RCX |
(614) 0x464632 MOV 0x8(%R13,%R8,1),%R10 |
(614) 0x464637 ADD %RCX,%R10 |
(614) 0x46463a MOV %R10,-0xa8(%RBP) |
(614) 0x464641 CMP %R10,%RCX |
(614) 0x464644 JGE 463fa4 |
(614) 0x46464a MOV -0x188(%RBP),%R8 |
(614) 0x464651 MOV -0xb0(%RBP),%R13 |
(614) 0x464658 SUB %RCX,%R10 |
(614) 0x46465b MOV (%R8,%R13,1),%R8 |
(614) 0x46465f AND $0x3,%R10D |
(614) 0x464663 JE 464744 |
(614) 0x464669 CMP $0x1,%R10 |
(614) 0x46466d JE 4646f7 |
(614) 0x464673 CMP $0x2,%R10 |
(614) 0x464677 JE 4646b7 |
(614) 0x464679 MOV -0x108(%RBP),%R13 |
(614) 0x464680 MOV (%R8,%RCX,8),%R10 |
(614) 0x464684 VMOVSD (%RDX),%XMM1 |
(614) 0x464688 VMULSD (%R13,%RCX,8),%XMM1,%XMM6 |
(614) 0x46468f TEST %R10,%R10 |
(614) 0x464692 JS 464919 |
(614) 0x464698 MOV (%RBX,%R10,8),%R10 |
(614) 0x46469c LEA (%R11,%R10,8),%R13 |
(614) 0x4646a0 VADDSD (%R13),%XMM6,%XMM7 |
(614) 0x4646a6 VMOVSD %XMM7,(%R13) |
(614) 0x4646ac VADDSD %XMM6,%XMM4,%XMM4 |
(614) 0x4646b0 VADDSD %XMM6,%XMM0,%XMM0 |
(614) 0x4646b4 INC %RCX |
(614) 0x4646b7 MOV -0x108(%RBP),%R13 |
(614) 0x4646be MOV (%R8,%RCX,8),%R10 |
(614) 0x4646c2 VMOVSD (%RDX),%XMM9 |
(614) 0x4646c6 VMULSD (%R13,%RCX,8),%XMM9,%XMM10 |
(614) 0x4646cd TEST %R10,%R10 |
(614) 0x4646d0 JS 4648f0 |
(614) 0x4646d6 MOV (%RBX,%R10,8),%R10 |
(614) 0x4646da LEA (%R11,%R10,8),%R13 |
(614) 0x4646de VADDSD (%R13),%XMM10,%XMM5 |
(614) 0x4646e4 VMOVSD %XMM5,(%R13) |
(614) 0x4646ea VADDSD %XMM10,%XMM4,%XMM4 |
(614) 0x4646ef VADDSD %XMM10,%XMM0,%XMM0 |
(614) 0x4646f4 INC %RCX |
(614) 0x4646f7 MOV -0x108(%RBP),%R13 |
(614) 0x4646fe MOV (%R8,%RCX,8),%R10 |
(614) 0x464702 VMOVSD (%RDX),%XMM13 |
(614) 0x464706 VMULSD (%R13,%RCX,8),%XMM13,%XMM12 |
(614) 0x46470d TEST %R10,%R10 |
(614) 0x464710 JS 4648c0 |
(614) 0x464716 MOV (%RBX,%R10,8),%R10 |
(614) 0x46471a LEA (%R11,%R10,8),%R13 |
(614) 0x46471e VADDSD (%R13),%XMM12,%XMM14 |
(614) 0x464724 VMOVSD %XMM14,(%R13) |
(614) 0x46472a VADDSD %XMM12,%XMM4,%XMM4 |
(614) 0x46472f VADDSD %XMM12,%XMM0,%XMM0 |
(614) 0x464734 INC %RCX |
(614) 0x464737 CMP %RCX,-0xa8(%RBP) |
(614) 0x46473e JE 463fa4 |
(614) 0x464744 MOV %R14,-0x190(%RBP) |
(614) 0x46474b MOV -0x108(%RBP),%R13 |
(614) 0x464752 JMP 4647fd |
(615) 0x464760 MOV (%RBX,%R10,8),%R14 |
(615) 0x464764 LEA (%R11,%R14,8),%R10 |
(615) 0x464768 VADDSD (%R10),%XMM9,%XMM10 |
(615) 0x46476d VMOVSD %XMM10,(%R10) |
(615) 0x464772 LEA 0x1(%RCX),%R14 |
(615) 0x464776 VMOVSD (%RDX),%XMM14 |
(615) 0x46477a VADDSD %XMM9,%XMM4,%XMM11 |
(615) 0x46477f MOV (%R8,%R14,8),%R10 |
(615) 0x464783 VMULSD (%R13,%R14,8),%XMM14,%XMM15 |
(615) 0x46478a VADDSD %XMM9,%XMM0,%XMM13 |
(615) 0x46478f TEST %R10,%R10 |
(615) 0x464792 JS 4648a0 |
(615) 0x464798 MOV (%RBX,%R10,8),%R14 |
(615) 0x46479c LEA (%R11,%R14,8),%R10 |
(615) 0x4647a0 VADDSD (%R10),%XMM15,%XMM12 |
(615) 0x4647a5 VMOVSD %XMM12,(%R10) |
(615) 0x4647aa LEA 0x2(%RCX),%R14 |
(615) 0x4647ae VMOVSD (%RDX),%XMM4 |
(615) 0x4647b2 VADDSD %XMM15,%XMM11,%XMM6 |
(615) 0x4647b7 MOV (%R8,%R14,8),%R10 |
(615) 0x4647bb VMULSD (%R13,%R14,8),%XMM4,%XMM12 |
(615) 0x4647c2 VADDSD %XMM15,%XMM13,%XMM7 |
(615) 0x4647c7 TEST %R10,%R10 |
(615) 0x4647ca JS 464880 |
(615) 0x4647d0 MOV (%RBX,%R10,8),%R14 |
(615) 0x4647d4 LEA (%R11,%R14,8),%R10 |
(615) 0x4647d8 VADDSD (%R10),%XMM12,%XMM0 |
(615) 0x4647dd VMOVSD %XMM0,(%R10) |
(615) 0x4647e2 VADDSD %XMM12,%XMM6,%XMM4 |
(615) 0x4647e7 VADDSD %XMM12,%XMM7,%XMM0 |
(615) 0x4647ec ADD $0x3,%RCX |
(615) 0x4647f0 CMP %RCX,-0xa8(%RBP) |
(615) 0x4647f7 JE 4648e0 |
(615) 0x4647fd MOV (%R8,%RCX,8),%R14 |
(615) 0x464801 VMOVSD (%RDX),%XMM12 |
(615) 0x464805 VMULSD (%R13,%RCX,8),%XMM12,%XMM1 |
(615) 0x46480c TEST %R14,%R14 |
(615) 0x46480f JS 464860 |
(615) 0x464811 MOV (%RBX,%R14,8),%R10 |
(615) 0x464815 LEA (%R11,%R10,8),%R14 |
(615) 0x464819 VADDSD (%R14),%XMM1,%XMM6 |
(615) 0x46481e VMOVSD %XMM6,(%R14) |
(615) 0x464823 INC %RCX |
(615) 0x464826 VMOVSD (%RDX),%XMM8 |
(615) 0x46482a VADDSD %XMM1,%XMM4,%XMM4 |
(615) 0x46482e VADDSD %XMM1,%XMM0,%XMM0 |
(615) 0x464832 MOV (%R8,%RCX,8),%R10 |
(615) 0x464836 VMULSD (%R13,%RCX,8),%XMM8,%XMM9 |
(615) 0x46483d TEST %R10,%R10 |
(615) 0x464840 JNS 464760 |
(615) 0x464846 NOT %R10 |
(615) 0x464849 MOV (%R9,%R10,8),%R14 |
(615) 0x46484d LEA (%R12,%R14,8),%R10 |
(615) 0x464851 VADDSD (%R10),%XMM9,%XMM5 |
(615) 0x464856 VMOVSD %XMM5,(%R10) |
(615) 0x46485b JMP 464772 |
(615) 0x464860 NOT %R14 |
(615) 0x464863 MOV (%R9,%R14,8),%R10 |
(615) 0x464867 LEA (%R12,%R10,8),%R14 |
(615) 0x46486b VADDSD (%R14),%XMM1,%XMM7 |
(615) 0x464870 VMOVSD %XMM7,(%R14) |
(615) 0x464875 JMP 464823 |
(615) 0x464880 NOT %R10 |
(615) 0x464883 MOV (%R9,%R10,8),%R14 |
(615) 0x464887 LEA (%R12,%R14,8),%R10 |
(615) 0x46488b VADDSD (%R10),%XMM12,%XMM8 |
(615) 0x464890 VMOVSD %XMM8,(%R10) |
(615) 0x464895 JMP 4647e2 |
(615) 0x4648a0 NOT %R10 |
(615) 0x4648a3 MOV (%R9,%R10,8),%R14 |
(615) 0x4648a7 LEA (%R12,%R14,8),%R10 |
(615) 0x4648ab VADDSD (%R10),%XMM15,%XMM1 |
(615) 0x4648b0 VMOVSD %XMM1,(%R10) |
(615) 0x4648b5 JMP 4647aa |
(614) 0x4648c0 NOT %R10 |
(614) 0x4648c3 MOV (%R9,%R10,8),%R10 |
(614) 0x4648c7 LEA (%R12,%R10,8),%R13 |
(614) 0x4648cb VADDSD (%R13),%XMM12,%XMM15 |
(614) 0x4648d1 VMOVSD %XMM15,(%R13) |
(614) 0x4648d7 JMP 46472a |
(614) 0x4648e0 MOV -0x190(%RBP),%R14 |
(614) 0x4648e7 JMP 463fa4 |
(614) 0x4648f0 NOT %R10 |
(614) 0x4648f3 MOV (%R9,%R10,8),%R10 |
(614) 0x4648f7 LEA (%R12,%R10,8),%R13 |
(614) 0x4648fb VADDSD (%R13),%XMM10,%XMM11 |
(614) 0x464901 VMOVSD %XMM11,(%R13) |
(614) 0x464907 JMP 4646ea |
0x46490c VXORPD %XMM0,%XMM0,%XMM0 |
0x464910 VMOVSD %XMM0,%XMM0,%XMM4 |
0x464914 JMP 463f25 |
(614) 0x464919 NOT %R10 |
(614) 0x46491c MOV (%R9,%R10,8),%R10 |
(614) 0x464920 LEA (%R12,%R10,8),%R13 |
(614) 0x464924 VADDSD (%R13),%XMM6,%XMM8 |
(614) 0x46492a VMOVSD %XMM8,(%R13) |
(614) 0x464930 JMP 4646ac |
/beegfs/hackathon/users/eoseret/qaas_runs/170-859-5251/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 1774 - 1876 |
-------------------------------------------------------------------------------- |
1774: for (i=thread_start; i < thread_stop; i++) |
1775: { |
1776: i1 = pass_array[i]; |
1777: sum_C = 0; |
1778: sum_N = 0; |
1779: j_start = P_diag_start[i1]; |
1780: j_end = j_start+P_diag_i[i1+1]-P_diag_i[i1]; |
1781: cnt = P_diag_i[i1]; |
1782: for (j=j_start; j < j_end; j++) |
1783: { |
1784: k1 = P_diag_pass[pass][j]; |
1785: tmp_array[k1] = cnt; |
1786: P_diag_data[cnt] = 0; |
1787: P_diag_j[cnt++] = k1; |
1788: } |
1789: j_start = P_offd_start[i1]; |
1790: j_end = j_start+P_offd_i[i1+1]-P_offd_i[i1]; |
1791: cnt_offd = P_offd_i[i1]; |
1792: for (j=j_start; j < j_end; j++) |
1793: { |
1794: k1 = P_offd_pass[pass][j]; |
1795: tmp_array_offd[k1] = cnt_offd; |
1796: P_offd_data[cnt_offd] = 0; |
1797: P_offd_j[cnt_offd++] = k1; |
1798: } |
1799: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
1800: { |
1801: j1 = S_diag_j[j]; |
1802: if (assigned[j1] == pass-1) |
1803: tmp_marker[j1] = i1; |
1804: } |
1805: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
1806: { |
1807: j1 = S_offd_j[j]; |
1808: if (assigned_offd[j1] == pass-1) |
1809: tmp_marker_offd[j1] = i1; |
1810: } |
1811: for (j=A_diag_i[i1]+1; j < A_diag_i[i1+1]; j++) |
1812: { |
1813: j1 = A_diag_j[j]; |
1814: if (tmp_marker[j1] == i1) |
1815: { |
1816: for (k=P_diag_i[j1]; k < P_diag_i[j1+1]; k++) |
1817: { |
1818: k1 = P_diag_j[k]; |
1819: alfa = A_diag_data[j]*P_diag_data[k]; |
1820: P_diag_data[tmp_array[k1]] += alfa; |
1821: sum_C += alfa; |
1822: sum_N += alfa; |
1823: } |
1824: for (k=P_offd_i[j1]; k < P_offd_i[j1+1]; k++) |
1825: { |
1826: k1 = P_offd_j[k]; |
1827: alfa = A_diag_data[j]*P_offd_data[k]; |
1828: P_offd_data[tmp_array_offd[k1]] += alfa; |
1829: sum_C += alfa; |
1830: sum_N += alfa; |
1831: } |
1832: } |
1833: else |
1834: { |
1835: if (CF_marker[j1] != -3 && |
1836: (num_functions == 1 || dof_func[i1] == dof_func[j1])) |
1837: sum_N += A_diag_data[j]; |
1838: } |
1839: } |
1840: for (j=A_offd_i[i1]; j < A_offd_i[i1+1]; j++) |
1841: { |
1842: if (col_offd_S_to_A) |
1843: j1 = map_A_to_S[A_offd_j[j]]; |
1844: else |
1845: j1 = A_offd_j[j]; |
1846: |
1847: if (j1 > -1 && tmp_marker_offd[j1] == i1) |
1848: { |
1849: j_start = Pext_start[j1]; |
1850: j_end = j_start+Pext_i[j1+1]; |
1851: for (k=j_start; k < j_end; k++) |
1852: { |
1853: k1 = Pext_pass[pass][k]; |
1854: alfa = A_offd_data[j]*Pext_data[k]; |
1855: if (k1 < 0) |
1856: P_diag_data[tmp_array[-k1-1]] += alfa; |
1857: else |
1858: P_offd_data[tmp_array_offd[k1]] += alfa; |
1859: sum_C += alfa; |
1860: sum_N += alfa; |
1861: } |
1862: } |
1863: else |
1864: { |
1865: if (CF_marker_offd[j1] != -3 && |
1866: (num_functions == 1 || dof_func_offd[j1] == dof_func[i1])) |
1867: sum_N += A_offd_data[j]; |
1868: } |
1869: } |
1870: diagonal = A_diag_data[A_diag_i[i1]]; |
1871: if (sum_C*diagonal) alfa = -sum_N/(sum_C*diagonal); |
1872: |
1873: for (j=P_diag_i[i1]; j < P_diag_i[i1+1]; j++) |
1874: P_diag_data[j] *= alfa; |
1875: for (j=P_offd_i[i1]; j < P_offd_i[i1+1]; j++) |
1876: P_offd_data[j] *= alfa; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 2.71 |
CQA speedup if FP arith vectorized | 1.52 |
CQA speedup if fully vectorized | 5.48 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.03 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass._omp_fn.10 |
Source | par_multi_interp.c:1774-1799,par_multi_interp.c:1805-1805,par_multi_interp.c:1811-1811,par_multi_interp.c:1824-1824,par_multi_interp.c:1840-1840,par_multi_interp.c:1871-1876 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 56.83 |
CQA cycles if no scalar integer | 21.00 |
CQA cycles if FP arith vectorized | 37.33 |
CQA cycles if fully vectorized | 10.38 |
Front-end cycles | 56.83 |
DIV/SQRT cycles | 34.25 |
P0 cycles | 34.25 |
P1 cycles | 34.00 |
P2 cycles | 34.00 |
P3 cycles | 23.50 |
P4 cycles | 55.33 |
P5 cycles | 55.33 |
P6 cycles | 55.33 |
P7 cycles | 8.00 |
P8 cycles | 8.00 |
P9 cycles | 2.00 |
P10 cycles | 2.00 |
P11 cycles | 7.50 |
P12 cycles | 7.50 |
P13 cycles | 5.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 340.00 |
Nb uops | 341.00 |
Nb loads | 91.00 |
Nb stores | 76.00 |
Nb stack references | 28.00 |
FLOP/cycle | 0.28 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 15.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 1.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 23.51 |
Bytes prefetched | 0.00 |
Bytes loaded | 728.00 |
Bytes stored | 608.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 2.17 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 6.98 |
Vector-efficiency ratio all | 12.14 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 11.35 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 13.37 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 2.71 |
CQA speedup if FP arith vectorized | 1.52 |
CQA speedup if fully vectorized | 5.48 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.03 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass._omp_fn.10 |
Source | par_multi_interp.c:1774-1799,par_multi_interp.c:1805-1805,par_multi_interp.c:1811-1811,par_multi_interp.c:1824-1824,par_multi_interp.c:1840-1840,par_multi_interp.c:1871-1876 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 56.83 |
CQA cycles if no scalar integer | 21.00 |
CQA cycles if FP arith vectorized | 37.33 |
CQA cycles if fully vectorized | 10.38 |
Front-end cycles | 56.83 |
DIV/SQRT cycles | 34.25 |
P0 cycles | 34.25 |
P1 cycles | 34.00 |
P2 cycles | 34.00 |
P3 cycles | 23.50 |
P4 cycles | 55.33 |
P5 cycles | 55.33 |
P6 cycles | 55.33 |
P7 cycles | 8.00 |
P8 cycles | 8.00 |
P9 cycles | 2.00 |
P10 cycles | 2.00 |
P11 cycles | 7.50 |
P12 cycles | 7.50 |
P13 cycles | 5.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 340.00 |
Nb uops | 341.00 |
Nb loads | 91.00 |
Nb stores | 76.00 |
Nb stack references | 28.00 |
FLOP/cycle | 0.28 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 15.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 1.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 23.51 |
Bytes prefetched | 0.00 |
Bytes loaded | 728.00 |
Bytes stored | 608.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 2.17 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 6.98 |
Vector-efficiency ratio all | 12.14 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 11.35 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 13.37 |
Path / |
Function | hypre_BoomerAMGBuildMultipass._omp_fn.10 |
Source file and lines | par_multi_interp.c:1774-1876 |
Module | exec |
nb instructions | 340 |
nb uops | 341 |
loop length | 1519 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 15 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 28 |
micro-operation queue | 56.83 cycles |
front end | 56.83 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 34.25 | 34.25 | 34.00 | 34.00 | 23.50 | 55.33 | 55.33 | 55.33 | 8.00 | 8.00 | 2.00 | 2.00 | 7.50 | 7.50 |
cycles | 34.25 | 34.25 | 34.00 | 34.00 | 23.50 | 55.33 | 55.33 | 55.33 | 8.00 | 8.00 | 2.00 | 2.00 | 7.50 | 7.50 |
Cycles executing div or sqrt instructions | 5.00 |
Front-end | 56.83 |
Dispatch | 55.33 |
DIV/SQRT | 5.00 |
Overall L1 | 56.83 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 8% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 50% |
all | 2% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 6% |
all | 11% |
load | 12% |
store | 11% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 13% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 18% |
all | 12% |
load | 12% |
store | 11% |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 13% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x98(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xc0(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x118(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RCX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (,%RDI,8),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV (%RDX,%RDI,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA 0x8(%RAX),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RAX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD %R8,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%R8,%RSI,1),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RAX,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RCX),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RCX,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD %RDX,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %RAX,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %R8,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 463b96 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x5f6> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %RDX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %RAX,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RDX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD %R8,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0xb0(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x150(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%R8,%RDX,1),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x38(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%R8,%RDX,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RCX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %RAX,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
AND $0x7,%R8D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463abd <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x51d> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x1,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463a9c <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x4fc> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x2,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463a84 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x4e4> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x3,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463a6c <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x4cc> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x4,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463a54 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x4b4> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x5,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463a3c <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x49c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x6,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463a24 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x484> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVQ $0,(%R12,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x8(%R13,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVQ $0,(%R12,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x8(%R13,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVQ $0,(%R12,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x8(%R13,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVQ $0,(%R12,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x8(%R13,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVQ $0,(%R12,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x8(%R13,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVQ $0,(%R12,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x8(%R13,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVQ $0,(%R12,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x8(%R13,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %RCX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463b96 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x5f6> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %RBX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0x38(%RBP),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x110(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x48(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX,%RDI,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%RAX,%RSI,1),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %R8,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV (%RCX),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RCX,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD %RDX,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %RAX,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %R8,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 463dc6 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x826> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %RDX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %RAX,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RDX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD %R8,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0xb0(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x148(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%R8,%RDX,1),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x38(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%R8,%RDX,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RCX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %RAX,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
AND $0x7,%R8D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463ced <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x74d> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x1,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463ccc <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x72c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x2,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463cb4 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x714> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x3,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463c9c <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x6fc> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x4,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463c84 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x6e4> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x5,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463c6c <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x6cc> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x6,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463c54 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x6b4> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%RBX,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVQ $0,(%R11,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x8(%R10,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%RBX,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVQ $0,(%R11,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x8(%R10,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%RBX,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVQ $0,(%R11,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x8(%R10,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%RBX,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVQ $0,(%R11,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x8(%R10,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%RBX,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVQ $0,(%R11,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x8(%R10,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%RBX,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVQ $0,(%R11,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x8(%R10,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%RBX,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVQ $0,(%R11,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x8(%R10,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %RCX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463dc6 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x826> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %R9,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0x38(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x128(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%RCX,%RSI,1),%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV (%RCX,%RDI,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%R8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %RCX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 463e0a <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x86a> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %RSI,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
MOV -0x38(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x120(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD %R8,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV (%R8,%RDI,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %RCX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 463e3e <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x89e> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x138(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI,%RDI,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%RSI,%RDX,1),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA 0x1(%R8),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %RDX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 46490c <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x136c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x170(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
SAL $0x3,%RAX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R15,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R8,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM0,%XMM0,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
LEA (%RCX,%RAX,1),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%RCX,%RDX,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R14,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RSI,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0xc8(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RDX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD %RSI,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0xa8(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
JMP 463ed3 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x933> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV -0xf0(%RBP),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xf8(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x100(%RBP),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x130(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RCX,%RDI,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%RCX,%RAX,1),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %RCX,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 464358 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xdb8> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x160(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
SAL $0x3,%RDX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R10,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R13,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LEA (%RAX,%RDX,1),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RSI,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0x168(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD %RSI,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%RAX,%RCX,8),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R14,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x158(%RBP),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
JMP 463fba <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xa1a> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 463e06 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x866> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 463e3e <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x89e> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV -0xf0(%RBP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xf8(%RBP),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x100(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xc8(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
VMULSD (%RDI,%R8,8),%XMM4,%XMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VCOMISD %XMM2,%XMM9 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 6 | 1 |
JE 464374 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xdd4> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
VXORPD %XMM3,%XMM0,%XMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VDIVSD %XMM9,%XMM10,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 5 |
MOV -0xd8(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xd0(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%R8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RDX),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %RSI,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 464490 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xef0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
LEA (%R12,%RSI,8),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%R12,%RAX,8),%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RCX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %RDI,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB $0x8,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SHR $0x3,%R8 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
INC %R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
AND $0x7,%R8D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 464438 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xe98> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x1,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 464426 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xe86> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x2,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 464419 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xe79> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x3,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 46440c <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xe6c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x4,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 4643ff <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xe5f> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x5,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 4643f2 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xe52> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x6,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 4643e5 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xe45> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
VMULSD (%RDI),%XMM12,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADD $0x8,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVSD %XMM5,-0x8(%RDI) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMULSD (%RDI),%XMM12,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADD $0x8,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVSD %XMM11,-0x8(%RDI) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMULSD (%RDI),%XMM12,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADD $0x8,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVSD %XMM13,-0x8(%RDI) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMULSD (%RDI),%XMM12,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADD $0x8,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVSD %XMM14,-0x8(%RDI) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMULSD (%RDI),%XMM12,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADD $0x8,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVSD %XMM15,-0x8(%RDI) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMULSD (%RDI),%XMM12,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADD $0x8,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVSD %XMM1,-0x8(%RDI) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMULSD (%RDI),%XMM12,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADD $0x8,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVSD %XMM6,-0x8(%RDI) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
CMP %RCX,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 464490 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xef0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0xe8(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xe0(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RDX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %RSI,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JLE 4645c9 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1029> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
LEA (%R11,%RDI,8),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%R11,%RSI,8),%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RCX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %R8,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB $0x8,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SHR $0x3,%RAX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
AND $0x7,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 464561 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xfc1> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x1,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 46454d <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xfad> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x2,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 46453e <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xf9e> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x3,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 46452f <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xf8f> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x4,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 464520 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xf80> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x5,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 464511 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xf71> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x6,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 464502 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xf62> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
VMULSD (%R8),%XMM12,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADD $0x8,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVSD %XMM13,-0x8(%R8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMULSD (%R8),%XMM12,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADD $0x8,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVSD %XMM14,-0x8(%R8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMULSD (%R8),%XMM12,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADD $0x8,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVSD %XMM15,-0x8(%R8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMULSD (%R8),%XMM12,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADD $0x8,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVSD %XMM1,-0x8(%R8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMULSD (%R8),%XMM12,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADD $0x8,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVSD %XMM6,-0x8(%R8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMULSD (%R8),%XMM12,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADD $0x8,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVSD %XMM7,-0x8(%R8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMULSD (%R8),%XMM12,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADD $0x8,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVSD %XMM4,-0x8(%R8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
CMP %R8,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 4645c9 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1029> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
ADDQ $0x8,-0x98(%RBP) | 2 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV -0x98(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %RSI,-0x140(%RBP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JNE 463950 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x3b0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVSD %XMM0,%XMM0,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
JMP 463f25 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x985> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
Function | hypre_BoomerAMGBuildMultipass._omp_fn.10 |
Source file and lines | par_multi_interp.c:1774-1876 |
Module | exec |
nb instructions | 340 |
nb uops | 341 |
loop length | 1519 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 15 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 28 |
micro-operation queue | 56.83 cycles |
front end | 56.83 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 34.25 | 34.25 | 34.00 | 34.00 | 23.50 | 55.33 | 55.33 | 55.33 | 8.00 | 8.00 | 2.00 | 2.00 | 7.50 | 7.50 |
cycles | 34.25 | 34.25 | 34.00 | 34.00 | 23.50 | 55.33 | 55.33 | 55.33 | 8.00 | 8.00 | 2.00 | 2.00 | 7.50 | 7.50 |
Cycles executing div or sqrt instructions | 5.00 |
Front-end | 56.83 |
Dispatch | 55.33 |
DIV/SQRT | 5.00 |
Overall L1 | 56.83 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 8% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 50% |
all | 2% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 6% |
all | 11% |
load | 12% |
store | 11% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 13% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 18% |
all | 12% |
load | 12% |
store | 11% |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 13% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x98(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xc0(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x118(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RCX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (,%RDI,8),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV (%RDX,%RDI,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA 0x8(%RAX),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RAX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD %R8,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%R8,%RSI,1),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RAX,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RCX),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RCX,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD %RDX,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %RAX,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %R8,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 463b96 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x5f6> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %RDX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %RAX,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RDX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD %R8,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0xb0(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x150(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%R8,%RDX,1),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x38(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%R8,%RDX,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RCX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %RAX,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
AND $0x7,%R8D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463abd <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x51d> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x1,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463a9c <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x4fc> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x2,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463a84 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x4e4> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x3,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463a6c <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x4cc> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x4,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463a54 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x4b4> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x5,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463a3c <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x49c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x6,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463a24 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x484> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVQ $0,(%R12,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x8(%R13,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVQ $0,(%R12,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x8(%R13,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVQ $0,(%R12,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x8(%R13,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVQ $0,(%R12,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x8(%R13,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVQ $0,(%R12,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x8(%R13,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVQ $0,(%R12,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x8(%R13,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVQ $0,(%R12,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x8(%R13,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %RCX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463b96 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x5f6> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %RBX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0x38(%RBP),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x110(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x48(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX,%RDI,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%RAX,%RSI,1),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %R8,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV (%RCX),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RCX,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD %RDX,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %RAX,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %R8,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 463dc6 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x826> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %RDX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %RAX,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RDX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD %R8,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0xb0(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x148(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%R8,%RDX,1),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x38(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%R8,%RDX,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RCX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %RAX,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
AND $0x7,%R8D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463ced <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x74d> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x1,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463ccc <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x72c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x2,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463cb4 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x714> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x3,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463c9c <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x6fc> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x4,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463c84 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x6e4> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x5,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463c6c <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x6cc> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x6,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463c54 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x6b4> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%RBX,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVQ $0,(%R11,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x8(%R10,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%RBX,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVQ $0,(%R11,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x8(%R10,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%RBX,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVQ $0,(%R11,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x8(%R10,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%RBX,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVQ $0,(%R11,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x8(%R10,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%RBX,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVQ $0,(%R11,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x8(%R10,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%RBX,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVQ $0,(%R11,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x8(%R10,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%RBX,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVQ $0,(%R11,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x8(%R10,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %RCX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 463dc6 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x826> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %R9,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0x38(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x128(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%RCX,%RSI,1),%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV (%RCX,%RDI,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%R8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %RCX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 463e0a <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x86a> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %RSI,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
MOV -0x38(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x120(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD %R8,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV (%R8,%RDI,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %RCX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 463e3e <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x89e> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x138(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI,%RDI,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%RSI,%RDX,1),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA 0x1(%R8),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %RDX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 46490c <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x136c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x170(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
SAL $0x3,%RAX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R15,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R8,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM0,%XMM0,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
LEA (%RCX,%RAX,1),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%RCX,%RDX,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R14,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RSI,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0xc8(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RDX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD %RSI,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0xa8(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
JMP 463ed3 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x933> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV -0xf0(%RBP),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xf8(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x100(%RBP),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x130(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RCX,%RDI,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%RCX,%RAX,1),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %RCX,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 464358 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xdb8> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x160(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
SAL $0x3,%RDX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R10,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R13,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LEA (%RAX,%RDX,1),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RSI,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0x168(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD %RSI,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%RAX,%RCX,8),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R14,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x158(%RBP),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
JMP 463fba <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xa1a> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 463e06 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x866> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 463e3e <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x89e> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV -0xf0(%RBP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xf8(%RBP),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x100(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xc8(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
VMULSD (%RDI,%R8,8),%XMM4,%XMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VCOMISD %XMM2,%XMM9 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 6 | 1 |
JE 464374 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xdd4> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
VXORPD %XMM3,%XMM0,%XMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VDIVSD %XMM9,%XMM10,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 5 |
MOV -0xd8(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xd0(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%R8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RDX),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %RSI,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 464490 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xef0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
LEA (%R12,%RSI,8),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%R12,%RAX,8),%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RCX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %RDI,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB $0x8,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SHR $0x3,%R8 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
INC %R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
AND $0x7,%R8D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 464438 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xe98> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x1,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 464426 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xe86> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x2,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 464419 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xe79> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x3,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 46440c <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xe6c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x4,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 4643ff <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xe5f> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x5,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 4643f2 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xe52> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x6,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 4643e5 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xe45> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
VMULSD (%RDI),%XMM12,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADD $0x8,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVSD %XMM5,-0x8(%RDI) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMULSD (%RDI),%XMM12,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADD $0x8,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVSD %XMM11,-0x8(%RDI) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMULSD (%RDI),%XMM12,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADD $0x8,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVSD %XMM13,-0x8(%RDI) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMULSD (%RDI),%XMM12,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADD $0x8,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVSD %XMM14,-0x8(%RDI) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMULSD (%RDI),%XMM12,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADD $0x8,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVSD %XMM15,-0x8(%RDI) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMULSD (%RDI),%XMM12,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADD $0x8,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVSD %XMM1,-0x8(%RDI) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMULSD (%RDI),%XMM12,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADD $0x8,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVSD %XMM6,-0x8(%RDI) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
CMP %RCX,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 464490 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xef0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0xe8(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xe0(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RDX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %RSI,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JLE 4645c9 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1029> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
LEA (%R11,%RDI,8),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%R11,%RSI,8),%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RCX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %R8,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB $0x8,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SHR $0x3,%RAX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
AND $0x7,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 464561 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xfc1> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x1,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 46454d <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xfad> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x2,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 46453e <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xf9e> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x3,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 46452f <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xf8f> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x4,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 464520 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xf80> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x5,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 464511 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xf71> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x6,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 464502 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xf62> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
VMULSD (%R8),%XMM12,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADD $0x8,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVSD %XMM13,-0x8(%R8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMULSD (%R8),%XMM12,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADD $0x8,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVSD %XMM14,-0x8(%R8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMULSD (%R8),%XMM12,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADD $0x8,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVSD %XMM15,-0x8(%R8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMULSD (%R8),%XMM12,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADD $0x8,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVSD %XMM1,-0x8(%R8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMULSD (%R8),%XMM12,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADD $0x8,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVSD %XMM6,-0x8(%R8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMULSD (%R8),%XMM12,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADD $0x8,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVSD %XMM7,-0x8(%R8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMULSD (%R8),%XMM12,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADD $0x8,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVSD %XMM4,-0x8(%R8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
CMP %R8,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 4645c9 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1029> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
ADDQ $0x8,-0x98(%RBP) | 2 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV -0x98(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %RSI,-0x140(%RBP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JNE 463950 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x3b0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVSD %XMM0,%XMM0,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
JMP 463f25 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x985> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |