Loop Id: 1055 | Module: exec | Source: par_multi_interp.c:1072-1125 | Coverage: 0.07% |
---|
Loop Id: 1055 | Module: exec | Source: par_multi_interp.c:1072-1125 | Coverage: 0.07% |
---|
0x26ce80 MOV -0x70(%RBP),%RDX |
0x26ce84 INC %RDX |
0x26ce87 CMP %RDX,-0xe0(%RBP) |
0x26ce8e JLE 26d10a |
0x26ce94 MOV %RDX,-0x70(%RBP) |
0x26ce98 MOV -0xd8(%RBP),%RSI |
0x26ce9f MOV -0x98(%RBP),%R8 |
0x26cea6 MOV (%RSI,%RDX,8),%RDI |
0x26ceaa MOV (%R8,%RDI,8),%RDX |
0x26ceae MOV %RDI,%R13 |
0x26ceb1 NOT %R13 |
0x26ceb4 MOV %RDI,-0x30(%RBP) |
0x26ceb8 CMP %RDX,0x8(%R8,%RDI,8) |
0x26cebd JLE 26d010 |
0x26cec3 MOV -0xc8(%RBP),%RSI |
0x26ceca MOV (%RSI),%RSI |
0x26cecd MOV %RSI,-0x88(%RBP) |
0x26ced4 MOV -0xf0(%RBP),%RSI |
0x26cedb MOV (%RSI),%RSI |
0x26cede MOV %RSI,-0x48(%RBP) |
0x26cee2 MOV -0x90(%RBP),%RSI |
0x26cee9 MOV -0xd0(%RBP),%R8 |
0x26cef0 MOV (%RSI),%RDI |
0x26cef3 MOV (%R8),%RSI |
0x26cef6 MOV %RSI,-0xe8(%RBP) |
0x26cefd MOV -0xf8(%RBP),%RSI |
0x26cf04 MOV (%RSI),%RSI |
0x26cf07 MOV %RSI,-0x40(%RBP) |
0x26cf0b MOV -0x80(%RBP),%RSI |
0x26cf0f MOV (%RSI),%R10 |
0x26cf12 JMP 26cf39 |
(1058) 0x26cf20 MOV -0x98(%RBP),%RSI |
(1058) 0x26cf27 MOV -0x30(%RBP),%R8 |
(1058) 0x26cf2b INC %RDX |
(1058) 0x26cf2e CMP %RDX,0x8(%RSI,%R8,8) |
(1058) 0x26cf33 JLE 26d010 |
(1058) 0x26cf39 MOV -0x110(%RBP),%RSI |
(1058) 0x26cf40 MOV (%RBX),%R9 |
(1058) 0x26cf43 MOV -0x108(%RBP),%R8 |
(1058) 0x26cf4a MOV (%RSI,%RDX,8),%R11 |
(1058) 0x26cf4e DEC %R9 |
(1058) 0x26cf51 CMP %R9,(%R8,%R11,8) |
(1058) 0x26cf55 JNE 26cf20 |
(1058) 0x26cf57 MOV -0x48(%RBP),%RSI |
(1058) 0x26cf5b MOV 0x8(%RSI,%R11,8),%R9 |
(1058) 0x26cf60 TEST %R9,%R9 |
(1058) 0x26cf63 JLE 26cfb0 |
(1058) 0x26cf65 MOV -0x88(%RBP),%RSI |
(1058) 0x26cf6c MOV (%RSI,%R11,8),%R8 |
(1058) 0x26cf70 ADD %R8,%R9 |
(1058) 0x26cf73 JMP 26cf88 |
(1060) 0x26cf80 INC %R8 |
(1060) 0x26cf83 CMP %R9,%R8 |
(1060) 0x26cf86 JGE 26cfb0 |
(1060) 0x26cf88 MOV (%RBX),%R12 |
(1060) 0x26cf8b MOV -0x8(%RDI,%R12,8),%RSI |
(1060) 0x26cf90 MOV (%RSI,%R8,8),%RSI |
(1060) 0x26cf94 CMP %R13,(%R14,%RSI,8) |
(1060) 0x26cf98 JE 26cf80 |
(1060) 0x26cf9a MOV (%RDI,%R12,8),%R12 |
(1060) 0x26cf9e MOV %RSI,(%R12,%RAX,8) |
(1060) 0x26cfa2 INC %RAX |
(1060) 0x26cfa5 MOV %R13,(%R14,%RSI,8) |
(1060) 0x26cfa9 JMP 26cf80 |
(1058) 0x26cfb0 MOV -0x40(%RBP),%RSI |
(1058) 0x26cfb4 MOV 0x8(%RSI,%R11,8),%R9 |
(1058) 0x26cfb9 TEST %R9,%R9 |
(1058) 0x26cfbc JLE 26cf20 |
(1058) 0x26cfc2 MOV -0xe8(%RBP),%RSI |
(1058) 0x26cfc9 MOV (%RSI,%R11,8),%R8 |
(1058) 0x26cfcd ADD %R8,%R9 |
(1058) 0x26cfd0 JMP 26cfec |
(1059) 0x26cfe0 INC %R8 |
(1059) 0x26cfe3 CMP %R9,%R8 |
(1059) 0x26cfe6 JGE 26cf20 |
(1059) 0x26cfec MOV (%RBX),%R11 |
(1059) 0x26cfef MOV -0x8(%R10,%R11,8),%RSI |
(1059) 0x26cff4 MOV (%RSI,%R8,8),%RSI |
(1059) 0x26cff8 CMP %R13,(%R15,%RSI,8) |
(1059) 0x26cffc JE 26cfe0 |
(1059) 0x26cffe MOV (%R10,%R11,8),%R11 |
(1059) 0x26d002 MOV %RSI,(%R11,%RCX,8) |
(1059) 0x26d006 INC %RCX |
(1059) 0x26d009 MOV %R13,(%R15,%RSI,8) |
(1059) 0x26d00d JMP 26cfe0 |
0x26d010 MOV -0x78(%RBP),%RSI |
0x26d014 MOV -0x30(%RBP),%RDI |
0x26d018 MOV (%RSI,%RDI,8),%RDX |
0x26d01c MOV 0x8(%RSI,%RDI,8),%RDI |
0x26d021 CMP %RDI,%RDX |
0x26d024 JGE 26ce80 |
0x26d02a MOV -0x150(%RBP),%RSI |
0x26d031 MOV (%RSI),%RSI |
0x26d034 MOV %RSI,-0x40(%RBP) |
0x26d038 MOV -0x158(%RBP),%RSI |
0x26d03f MOV (%RSI),%RSI |
0x26d042 MOV %RSI,-0x48(%RBP) |
0x26d046 MOV -0x160(%RBP),%RSI |
0x26d04d MOV (%RSI),%R9 |
0x26d050 JMP 26d079 |
(1056) 0x26d060 MOV -0x78(%RBP),%RSI |
(1056) 0x26d064 MOV -0x30(%RBP),%RDI |
(1056) 0x26d068 MOV 0x8(%RSI,%RDI,8),%RDI |
(1056) 0x26d06d INC %RDX |
(1056) 0x26d070 CMP %RDI,%RDX |
(1056) 0x26d073 JGE 26ce80 |
(1056) 0x26d079 MOV -0x100(%RBP),%RSI |
(1056) 0x26d080 MOV (%RBX),%R8 |
(1056) 0x26d083 MOV -0x50(%RBP),%R10 |
(1056) 0x26d087 MOV (%RSI,%RDX,8),%RSI |
(1056) 0x26d08b DEC %R8 |
(1056) 0x26d08e CMP %R8,(%R10,%RSI,8) |
(1056) 0x26d092 JNE 26d06d |
(1056) 0x26d094 MOV -0x48(%RBP),%R8 |
(1056) 0x26d098 MOV 0x8(%R8,%RSI,8),%R10 |
(1056) 0x26d09d TEST %R10,%R10 |
(1056) 0x26d0a0 JLE 26d06d |
(1056) 0x26d0a2 MOV -0x40(%RBP),%RDI |
(1056) 0x26d0a6 MOV -0x80(%RBP),%R11 |
(1056) 0x26d0aa MOV -0x90(%RBP),%R8 |
(1056) 0x26d0b1 MOV (%RDI,%RSI,8),%RDI |
(1056) 0x26d0b5 MOV (%R11),%R11 |
(1056) 0x26d0b8 MOV (%R8),%R8 |
(1056) 0x26d0bb ADD %RDI,%R10 |
(1056) 0x26d0be JMP 26d0c8 |
(1057) 0x26d0c0 INC %RDI |
(1057) 0x26d0c3 CMP %R10,%RDI |
(1057) 0x26d0c6 JGE 26d060 |
(1057) 0x26d0c8 MOV (%RBX),%R12 |
(1057) 0x26d0cb MOV (%R9,%R12,8),%RSI |
(1057) 0x26d0cf MOV (%RSI,%RDI,8),%RSI |
(1057) 0x26d0d3 TEST %RSI,%RSI |
(1057) 0x26d0d6 JS 26d0f0 |
(1057) 0x26d0d8 CMP %R13,(%R15,%RSI,8) |
(1057) 0x26d0dc JE 26d0c0 |
(1057) 0x26d0de MOV (%R11,%R12,8),%R12 |
(1057) 0x26d0e2 MOV %RSI,(%R12,%RCX,8) |
(1057) 0x26d0e6 INC %RCX |
(1057) 0x26d0e9 MOV %R13,(%R15,%RSI,8) |
(1057) 0x26d0ed JMP 26d0c0 |
(1057) 0x26d0f0 NOT %RSI |
(1057) 0x26d0f3 CMP %R13,(%R14,%RSI,8) |
(1057) 0x26d0f7 JE 26d0c0 |
(1057) 0x26d0f9 MOV (%R8,%R12,8),%R12 |
(1057) 0x26d0fd MOV %RSI,(%R12,%RAX,8) |
(1057) 0x26d101 INC %RAX |
(1057) 0x26d104 MOV %R13,(%R14,%RSI,8) |
(1057) 0x26d108 JMP 26d0c0 |
/beegfs/hackathon/users/eoseret/qaas_runs/170-859-5251/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 1072 - 1125 |
-------------------------------------------------------------------------------- |
1072: for (i=thread_start; i < thread_stop; i++) |
1073: { |
1074: i1 = pass_array[i]; |
1075: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
1076: { |
1077: j1 = S_diag_j[j]; |
1078: if (assigned[j1] == pass-1) |
1079: { |
1080: j_start = P_diag_start[j1]; |
1081: j_end = j_start+P_diag_i[j1+1]; |
1082: for (k=j_start; k < j_end; k++) |
1083: { |
1084: k1 = P_diag_pass[pass-1][k]; |
1085: if (P_marker[k1] != -i1-1) |
1086: { |
1087: P_diag_pass[pass][cnt_nz++] = k1; |
1088: P_marker[k1] = -i1-1; |
1089: } |
1090: } |
1091: j_start = P_offd_start[j1]; |
1092: j_end = j_start+P_offd_i[j1+1]; |
1093: for (k=j_start; k < j_end; k++) |
1094: { |
1095: k1 = P_offd_pass[pass-1][k]; |
1096: if (P_marker_offd[k1] != -i1-1) |
1097: { |
1098: P_offd_pass[pass][cnt_nz_offd++] = k1; |
1099: P_marker_offd[k1] = -i1-1; |
1100: } |
1101: } |
1102: } |
1103: } |
1104: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
1105: { |
1106: j1 = S_offd_j[j]; |
1107: if (assigned_offd[j1] == pass-1) |
1108: { |
1109: j_start = Pext_start[j1]; |
1110: j_end = j_start+Pext_i[j1+1]; |
1111: for (k=j_start; k < j_end; k++) |
1112: { |
1113: k1 = Pext_pass[pass][k]; |
1114: if (k1 < 0) |
1115: { |
1116: if (P_marker[-k1-1] != -i1-1) |
1117: { |
1118: P_diag_pass[pass][cnt_nz++] = -k1-1; |
1119: P_marker[-k1-1] = -i1-1; |
1120: } |
1121: } |
1122: else if (P_marker_offd[k1] != -i1-1) |
1123: { |
1124: P_offd_pass[pass][cnt_nz_offd++] = k1; |
1125: P_marker_offd[k1] = -i1-1; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 4.48 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.61 |
Bottlenecks | P5, P6, P7, |
Function | .omp_outlined..12#0x26c650 |
Source | par_multi_interp.c:1072-1075,par_multi_interp.c:1099-1099,par_multi_interp.c:1104-1104 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 12.33 |
CQA cycles if no scalar integer | 12.33 |
CQA cycles if FP arith vectorized | 12.33 |
CQA cycles if fully vectorized | 2.75 |
Front-end cycles | 7.67 |
DIV/SQRT cycles | 2.50 |
P0 cycles | 1.75 |
P1 cycles | 1.75 |
P2 cycles | 1.50 |
P3 cycles | 2.50 |
P4 cycles | 12.33 |
P5 cycles | 12.33 |
P6 cycles | 12.33 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 0.00 |
P10 cycles | 0.00 |
P11 cycles | 0.00 |
P12 cycles | 0.00 |
P13 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 46.00 |
Nb uops | 46.00 |
Nb loads | 29.00 |
Nb stores | 8.00 |
Nb stack references | 19.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 24.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 232.00 |
Bytes stored | 64.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 4.48 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.61 |
Bottlenecks | P5, P6, P7, |
Function | .omp_outlined..12#0x26c650 |
Source | par_multi_interp.c:1072-1075,par_multi_interp.c:1099-1099,par_multi_interp.c:1104-1104 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 12.33 |
CQA cycles if no scalar integer | 12.33 |
CQA cycles if FP arith vectorized | 12.33 |
CQA cycles if fully vectorized | 2.75 |
Front-end cycles | 7.67 |
DIV/SQRT cycles | 2.50 |
P0 cycles | 1.75 |
P1 cycles | 1.75 |
P2 cycles | 1.50 |
P3 cycles | 2.50 |
P4 cycles | 12.33 |
P5 cycles | 12.33 |
P6 cycles | 12.33 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 0.00 |
P10 cycles | 0.00 |
P11 cycles | 0.00 |
P12 cycles | 0.00 |
P13 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 46.00 |
Nb uops | 46.00 |
Nb loads | 29.00 |
Nb stores | 8.00 |
Nb stack references | 19.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 24.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 232.00 |
Bytes stored | 64.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | .omp_outlined..12#0x26c650 |
Source file and lines | par_multi_interp.c:1072-1125 |
Module | exec |
nb instructions | 46 |
nb uops | 46 |
loop length | 214 |
used x86 registers | 8 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 19 |
micro-operation queue | 7.67 cycles |
front end | 7.67 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.50 | 1.75 | 1.75 | 1.50 | 2.50 | 12.33 | 12.33 | 12.33 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
cycles | 2.50 | 1.75 | 1.75 | 1.50 | 2.50 | 12.33 | 12.33 | 12.33 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Front-end | 7.67 |
Dispatch | 12.33 |
Overall L1 | 12.33 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
INC %RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %RDX,-0xe0(%RBP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JLE 26d10a <.omp_outlined..12+0xaba> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %RDX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0xd8(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x98(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI,%RDX,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%R8,%RDI,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RDI,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOT %R13 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RDI,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %RDX,0x8(%R8,%RDI,8) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JLE 26d010 <.omp_outlined..12+0x9c0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0xc8(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RSI,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0xf0(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RSI,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0x90(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xd0(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%R8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RSI,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0xf8(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RSI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0x80(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
JMP 26cf39 <.omp_outlined..12+0x8e9> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV -0x78(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x30(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI,%RDI,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%RSI,%RDI,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %RDI,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 26ce80 <.omp_outlined..12+0x830> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x150(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RSI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0x158(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RSI,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0x160(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
JMP 26d079 <.omp_outlined..12+0xa29> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
Function | .omp_outlined..12#0x26c650 |
Source file and lines | par_multi_interp.c:1072-1125 |
Module | exec |
nb instructions | 46 |
nb uops | 46 |
loop length | 214 |
used x86 registers | 8 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 19 |
micro-operation queue | 7.67 cycles |
front end | 7.67 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.50 | 1.75 | 1.75 | 1.50 | 2.50 | 12.33 | 12.33 | 12.33 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
cycles | 2.50 | 1.75 | 1.75 | 1.50 | 2.50 | 12.33 | 12.33 | 12.33 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Front-end | 7.67 |
Dispatch | 12.33 |
Overall L1 | 12.33 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
INC %RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %RDX,-0xe0(%RBP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JLE 26d10a <.omp_outlined..12+0xaba> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %RDX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0xd8(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x98(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI,%RDX,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%R8,%RDI,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RDI,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOT %R13 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RDI,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %RDX,0x8(%R8,%RDI,8) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JLE 26d010 <.omp_outlined..12+0x9c0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0xc8(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RSI,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0xf0(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RSI,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0x90(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xd0(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%R8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RSI,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0xf8(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RSI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0x80(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
JMP 26cf39 <.omp_outlined..12+0x8e9> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV -0x78(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x30(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI,%RDI,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%RSI,%RDI,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %RDI,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 26ce80 <.omp_outlined..12+0x830> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x150(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RSI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0x158(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RSI,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0x160(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
JMP 26d079 <.omp_outlined..12+0xa29> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |