Loop Id: 1177 | Module: exec | Source: par_multi_interp.c:917-1125 [...] | Coverage: 0.06% |
---|
Loop Id: 1177 | Module: exec | Source: par_multi_interp.c:917-1125 [...] | Coverage: 0.06% |
---|
0x46d810 MOV -0x70(%RBP),%RSI |
0x46d814 INC %RSI |
0x46d817 CMP -0xd0(%RBP),%RSI |
0x46d81e JGE 46dc41 |
0x46d824 MOV -0x90(%RBP),%RDX |
0x46d82b MOV %RSI,-0x70(%RBP) |
0x46d82f MOV (%RDX,%RSI,8),%RSI |
0x46d833 MOV -0xa8(%RBP),%RDX |
0x46d83a MOV (%RDX,%RSI,8),%R8 |
0x46d83e MOV %RSI,%RDI |
0x46d841 NOT %RDI |
0x46d844 MOV %RSI,-0x58(%RBP) |
0x46d848 JMP 46d85e |
(1180) 0x46d84a MOV -0x38(%RBP),%R14 |
(1180) 0x46d84e XCHG %AX,%AX |
(1180) 0x46d850 INC %R8 |
(1180) 0x46d853 MOV -0xa8(%RBP),%RDX |
(1180) 0x46d85a MOV -0x58(%RBP),%RSI |
(1180) 0x46d85e CMP 0x8(%RDX,%RSI,8),%R8 |
(1180) 0x46d863 JGE 46db50 |
(1180) 0x46d869 MOV -0x118(%RBP),%RDX |
(1180) 0x46d870 MOV (%RDX,%R8,8),%R13 |
(1180) 0x46d874 MOV -0x108(%RBP),%RDX |
(1180) 0x46d87b CMP %R14,(%RDX,%R13,8) |
(1180) 0x46d87f JNE 46d850 |
(1180) 0x46d881 MOV -0x60(%RBP),%RDX |
(1180) 0x46d885 MOV 0x8(%RDX,%R13,8),%R10 |
(1180) 0x46d88a TEST %R10,%R10 |
(1180) 0x46d88d JLE 46d9eb |
(1180) 0x46d893 MOV -0x98(%RBP),%RDX |
(1180) 0x46d89a MOV %R13,-0x78(%RBP) |
(1180) 0x46d89e MOV (%RDX,%R13,8),%R11 |
(1180) 0x46d8a2 ADD %R11,%R10 |
(1180) 0x46d8a5 LEA 0x1(%R11),%RDX |
(1180) 0x46d8a9 CMP %RDX,%R10 |
(1180) 0x46d8ac CMOVLE %RDX,%R10 |
(1180) 0x46d8b0 MOV -0x48(%RBP),%RDX |
(1180) 0x46d8b4 MOV -0x8(%RDX,%R12,8),%RSI |
(1180) 0x46d8b9 MOV %R10,%RDX |
(1180) 0x46d8bc SUB %R11,%RDX |
(1180) 0x46d8bf CMP $0x4,%RDX |
(1180) 0x46d8c3 MOV %RDX,-0x30(%RBP) |
(1180) 0x46d8c7 JAE 46d91b |
(1180) 0x46d8c9 MOV -0x30(%RBP),%R9 |
(1180) 0x46d8cd MOV %R9,%RDX |
(1180) 0x46d8d0 AND $-0x4,%RDX |
(1180) 0x46d8d4 CMP %R9,%RDX |
(1180) 0x46d8d7 JAE 46d9e3 |
(1180) 0x46d8dd ADD %RDX,%R11 |
(1180) 0x46d8e0 MOV -0x38(%RBP),%R14 |
(1180) 0x46d8e4 MOV -0x78(%RBP),%R13 |
(1180) 0x46d8e8 JMP 46d8fc |
(1183) 0x46d8f0 INC %R11 |
(1183) 0x46d8f3 CMP %R11,%R10 |
(1183) 0x46d8f6 JE 46d9eb |
(1183) 0x46d8fc MOV (%RSI,%R11,8),%RDX |
(1183) 0x46d900 CMP %RDI,(%RBX,%RDX,8) |
(1183) 0x46d904 JE 46d8f0 |
(1183) 0x46d906 MOV -0x48(%RBP),%R9 |
(1183) 0x46d90a MOV (%R9,%R12,8),%R9 |
(1183) 0x46d90e MOV %RDX,(%R9,%RAX,8) |
(1183) 0x46d912 INC %RAX |
(1183) 0x46d915 MOV %RDI,(%RBX,%RDX,8) |
(1183) 0x46d919 JMP 46d8f0 |
(1180) 0x46d91b SHR $0x2,%RDX |
(1180) 0x46d91f LEA (%RSI,%R11,8),%R13 |
(1180) 0x46d923 ADD $0x18,%R13 |
(1180) 0x46d927 JMP 46d939 |
(1184) 0x46d930 ADD $0x20,%R13 |
(1184) 0x46d934 DEC %RDX |
(1184) 0x46d937 JE 46d8c9 |
(1184) 0x46d939 MOV -0x18(%R13),%R14 |
(1184) 0x46d93d CMP %RDI,(%RBX,%R14,8) |
(1184) 0x46d941 JNE 46d970 |
(1184) 0x46d943 MOV -0x10(%R13),%R14 |
(1184) 0x46d947 CMP %RDI,(%RBX,%R14,8) |
(1184) 0x46d94b JNE 46d98d |
(1184) 0x46d94d MOV -0x8(%R13),%R14 |
(1184) 0x46d951 CMP %RDI,(%RBX,%R14,8) |
(1184) 0x46d955 JNE 46d9aa |
(1184) 0x46d957 MOV (%R13),%R14 |
(1184) 0x46d95b CMP %RDI,(%RBX,%R14,8) |
(1184) 0x46d95f JE 46d930 |
(1184) 0x46d961 JMP 46d9cb |
(1184) 0x46d970 MOV -0x48(%RBP),%R9 |
(1184) 0x46d974 MOV (%R9,%R12,8),%R9 |
(1184) 0x46d978 MOV %R14,(%R9,%RAX,8) |
(1184) 0x46d97c INC %RAX |
(1184) 0x46d97f MOV %RDI,(%RBX,%R14,8) |
(1184) 0x46d983 MOV -0x10(%R13),%R14 |
(1184) 0x46d987 CMP %RDI,(%RBX,%R14,8) |
(1184) 0x46d98b JE 46d94d |
(1184) 0x46d98d MOV -0x48(%RBP),%R9 |
(1184) 0x46d991 MOV (%R9,%R12,8),%R9 |
(1184) 0x46d995 MOV %R14,(%R9,%RAX,8) |
(1184) 0x46d999 INC %RAX |
(1184) 0x46d99c MOV %RDI,(%RBX,%R14,8) |
(1184) 0x46d9a0 MOV -0x8(%R13),%R14 |
(1184) 0x46d9a4 CMP %RDI,(%RBX,%R14,8) |
(1184) 0x46d9a8 JE 46d957 |
(1184) 0x46d9aa MOV -0x48(%RBP),%R9 |
(1184) 0x46d9ae MOV (%R9,%R12,8),%R9 |
(1184) 0x46d9b2 MOV %R14,(%R9,%RAX,8) |
(1184) 0x46d9b6 INC %RAX |
(1184) 0x46d9b9 MOV %RDI,(%RBX,%R14,8) |
(1184) 0x46d9bd MOV (%R13),%R14 |
(1184) 0x46d9c1 CMP %RDI,(%RBX,%R14,8) |
(1184) 0x46d9c5 JE 46d930 |
(1184) 0x46d9cb MOV -0x48(%RBP),%R9 |
(1184) 0x46d9cf MOV (%R9,%R12,8),%R9 |
(1184) 0x46d9d3 MOV %R14,(%R9,%RAX,8) |
(1184) 0x46d9d7 INC %RAX |
(1184) 0x46d9da MOV %RDI,(%RBX,%R14,8) |
(1184) 0x46d9de JMP 46d930 |
(1180) 0x46d9e3 MOV -0x38(%RBP),%R14 |
(1180) 0x46d9e7 MOV -0x78(%RBP),%R13 |
(1180) 0x46d9eb MOV -0x68(%RBP),%RDX |
(1180) 0x46d9ef MOV 0x8(%RDX,%R13,8),%R10 |
(1180) 0x46d9f4 TEST %R10,%R10 |
(1180) 0x46d9f7 JLE 46d850 |
(1180) 0x46d9fd MOV -0x40(%RBP),%RDX |
(1180) 0x46da01 MOV (%RDX,%R13,8),%R9 |
(1180) 0x46da05 ADD %R9,%R10 |
(1180) 0x46da08 LEA 0x1(%R9),%RDX |
(1180) 0x46da0c CMP %RDX,%R10 |
(1180) 0x46da0f CMOVLE %RDX,%R10 |
(1180) 0x46da13 MOV -0x50(%RBP),%RDX |
(1180) 0x46da17 MOV -0x8(%RDX,%R12,8),%RSI |
(1180) 0x46da1c MOV %R10,%R11 |
(1180) 0x46da1f SUB %R9,%R11 |
(1180) 0x46da22 CMP $0x4,%R11 |
(1180) 0x46da26 MOV %R11,-0x78(%RBP) |
(1180) 0x46da2a JAE 46da7b |
(1180) 0x46da2c MOV -0x78(%RBP),%RDX |
(1180) 0x46da30 MOV %RDX,%R11 |
(1180) 0x46da33 AND $-0x4,%R11 |
(1180) 0x46da37 CMP %RDX,%R11 |
(1180) 0x46da3a JAE 46d84a |
(1180) 0x46da40 ADD %R11,%R9 |
(1180) 0x46da43 MOV -0x38(%RBP),%R14 |
(1180) 0x46da47 JMP 46da5c |
(1181) 0x46da50 INC %R9 |
(1181) 0x46da53 CMP %R9,%R10 |
(1181) 0x46da56 JE 46d850 |
(1181) 0x46da5c MOV (%RSI,%R9,8),%RDX |
(1181) 0x46da60 CMP %RDI,(%R15,%RDX,8) |
(1181) 0x46da64 JE 46da50 |
(1181) 0x46da66 MOV -0x50(%RBP),%R11 |
(1181) 0x46da6a MOV (%R11,%R12,8),%R11 |
(1181) 0x46da6e MOV %RDX,(%R11,%RCX,8) |
(1181) 0x46da72 INC %RCX |
(1181) 0x46da75 MOV %RDI,(%R15,%RDX,8) |
(1181) 0x46da79 JMP 46da50 |
(1180) 0x46da7b SHR $0x2,%R11 |
(1180) 0x46da7f LEA (%RSI,%R9,8),%R14 |
(1180) 0x46da83 ADD $0x18,%R14 |
(1180) 0x46da87 JMP 46da99 |
(1182) 0x46da90 ADD $0x20,%R14 |
(1182) 0x46da94 DEC %R11 |
(1182) 0x46da97 JE 46da2c |
(1182) 0x46da99 MOV -0x18(%R14),%R13 |
(1182) 0x46da9d CMP %RDI,(%R15,%R13,8) |
(1182) 0x46daa1 JNE 46dad0 |
(1182) 0x46daa3 MOV -0x10(%R14),%R13 |
(1182) 0x46daa7 CMP %RDI,(%R15,%R13,8) |
(1182) 0x46daab JNE 46daed |
(1182) 0x46daad MOV -0x8(%R14),%R13 |
(1182) 0x46dab1 CMP %RDI,(%R15,%R13,8) |
(1182) 0x46dab5 JNE 46db0a |
(1182) 0x46dab7 MOV (%R14),%R13 |
(1182) 0x46daba CMP %RDI,(%R15,%R13,8) |
(1182) 0x46dabe JE 46da90 |
(1182) 0x46dac0 JMP 46db2a |
(1182) 0x46dad0 MOV -0x50(%RBP),%RDX |
(1182) 0x46dad4 MOV (%RDX,%R12,8),%RDX |
(1182) 0x46dad8 MOV %R13,(%RDX,%RCX,8) |
(1182) 0x46dadc INC %RCX |
(1182) 0x46dadf MOV %RDI,(%R15,%R13,8) |
(1182) 0x46dae3 MOV -0x10(%R14),%R13 |
(1182) 0x46dae7 CMP %RDI,(%R15,%R13,8) |
(1182) 0x46daeb JE 46daad |
(1182) 0x46daed MOV -0x50(%RBP),%RDX |
(1182) 0x46daf1 MOV (%RDX,%R12,8),%RDX |
(1182) 0x46daf5 MOV %R13,(%RDX,%RCX,8) |
(1182) 0x46daf9 INC %RCX |
(1182) 0x46dafc MOV %RDI,(%R15,%R13,8) |
(1182) 0x46db00 MOV -0x8(%R14),%R13 |
(1182) 0x46db04 CMP %RDI,(%R15,%R13,8) |
(1182) 0x46db08 JE 46dab7 |
(1182) 0x46db0a MOV -0x50(%RBP),%RDX |
(1182) 0x46db0e MOV (%RDX,%R12,8),%RDX |
(1182) 0x46db12 MOV %R13,(%RDX,%RCX,8) |
(1182) 0x46db16 INC %RCX |
(1182) 0x46db19 MOV %RDI,(%R15,%R13,8) |
(1182) 0x46db1d MOV (%R14),%R13 |
(1182) 0x46db20 CMP %RDI,(%R15,%R13,8) |
(1182) 0x46db24 JE 46da90 |
(1182) 0x46db2a MOV -0x50(%RBP),%RDX |
(1182) 0x46db2e MOV (%RDX,%R12,8),%RDX |
(1182) 0x46db32 MOV %R13,(%RDX,%RCX,8) |
(1182) 0x46db36 INC %RCX |
(1182) 0x46db39 MOV %RDI,(%R15,%R13,8) |
(1182) 0x46db3d JMP 46da90 |
0x46db50 MOV -0xa0(%RBP),%RDX |
0x46db57 MOV -0x58(%RBP),%R8 |
0x46db5b MOV (%RDX,%R8,8),%RSI |
0x46db5f MOV 0x8(%RDX,%R8,8),%R8 |
0x46db64 CMP %R8,%RSI |
0x46db67 JL 46db7c |
0x46db69 JMP 46d810 |
(1178) 0x46db70 INC %RSI |
(1178) 0x46db73 CMP %R8,%RSI |
(1178) 0x46db76 JGE 46d810 |
(1178) 0x46db7c MOV -0x120(%RBP),%RDX |
(1178) 0x46db83 MOV (%RDX,%RSI,8),%R9 |
(1178) 0x46db87 MOV -0x110(%RBP),%RDX |
(1178) 0x46db8e CMP %R14,(%RDX,%R9,8) |
(1178) 0x46db92 JNE 46db70 |
(1178) 0x46db94 MOV -0x100(%RBP),%RDX |
(1178) 0x46db9b MOV 0x8(%RDX,%R9,8),%RDX |
(1178) 0x46dba0 TEST %RDX,%RDX |
(1178) 0x46dba3 JLE 46db70 |
(1178) 0x46dba5 MOV -0xf0(%RBP),%R8 |
(1178) 0x46dbac MOV (%R8,%R9,8),%R8 |
(1178) 0x46dbb0 ADD %R8,%RDX |
(1178) 0x46dbb3 MOV -0xf8(%RBP),%R9 |
(1178) 0x46dbba MOV (%R9,%R12,8),%R9 |
(1178) 0x46dbbe LEA 0x1(%R8),%R10 |
(1178) 0x46dbc2 CMP %R10,%RDX |
(1178) 0x46dbc5 CMOVLE %R10,%RDX |
(1178) 0x46dbc9 JMP 46dbd8 |
(1179) 0x46dbd0 INC %R8 |
(1179) 0x46dbd3 CMP %R8,%RDX |
(1179) 0x46dbd6 JE 46dc20 |
(1179) 0x46dbd8 MOV (%R9,%R8,8),%R10 |
(1179) 0x46dbdc TEST %R10,%R10 |
(1179) 0x46dbdf JS 46dc00 |
(1179) 0x46dbe1 CMP %RDI,(%R15,%R10,8) |
(1179) 0x46dbe5 JE 46dbd0 |
(1179) 0x46dbe7 MOV -0x50(%RBP),%R11 |
(1179) 0x46dbeb MOV (%R11,%R12,8),%R11 |
(1179) 0x46dbef MOV %R10,(%R11,%RCX,8) |
(1179) 0x46dbf3 INC %RCX |
(1179) 0x46dbf6 MOV %RDI,(%R15,%R10,8) |
(1179) 0x46dbfa JMP 46dbd0 |
(1179) 0x46dc00 NOT %R10 |
(1179) 0x46dc03 CMP %RDI,(%RBX,%R10,8) |
(1179) 0x46dc07 JE 46dbd0 |
(1179) 0x46dc09 MOV -0x48(%RBP),%R11 |
(1179) 0x46dc0d MOV (%R11,%R12,8),%R11 |
(1179) 0x46dc11 MOV %R10,(%R11,%RAX,8) |
(1179) 0x46dc15 INC %RAX |
(1179) 0x46dc18 MOV %RDI,(%RBX,%R10,8) |
(1179) 0x46dc1c JMP 46dbd0 |
(1178) 0x46dc20 MOV -0xa0(%RBP),%RDX |
(1178) 0x46dc27 MOV -0x58(%RBP),%R8 |
(1178) 0x46dc2b MOV 0x8(%RDX,%R8,8),%R8 |
(1178) 0x46dc30 INC %RSI |
(1178) 0x46dc33 CMP %R8,%RSI |
(1178) 0x46dc36 JL 46db7c |
0x46dc3c JMP 46d810 |
/beegfs/hackathon/users/eoseret/qaas_runs/170-859-5251/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 917 - 1125 |
-------------------------------------------------------------------------------- |
917: for (i=0; i < n_coarse; i++) |
[...] |
1072: for (i=thread_start; i < thread_stop; i++) |
1073: { |
1074: i1 = pass_array[i]; |
1075: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
1076: { |
1077: j1 = S_diag_j[j]; |
1078: if (assigned[j1] == pass-1) |
1079: { |
1080: j_start = P_diag_start[j1]; |
1081: j_end = j_start+P_diag_i[j1+1]; |
1082: for (k=j_start; k < j_end; k++) |
1083: { |
1084: k1 = P_diag_pass[pass-1][k]; |
1085: if (P_marker[k1] != -i1-1) |
1086: { |
1087: P_diag_pass[pass][cnt_nz++] = k1; |
1088: P_marker[k1] = -i1-1; |
1089: } |
1090: } |
1091: j_start = P_offd_start[j1]; |
1092: j_end = j_start+P_offd_i[j1+1]; |
1093: for (k=j_start; k < j_end; k++) |
1094: { |
1095: k1 = P_offd_pass[pass-1][k]; |
1096: if (P_marker_offd[k1] != -i1-1) |
1097: { |
1098: P_offd_pass[pass][cnt_nz_offd++] = k1; |
1099: P_marker_offd[k1] = -i1-1; |
1100: } |
1101: } |
1102: } |
1103: } |
1104: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
1105: { |
1106: j1 = S_offd_j[j]; |
1107: if (assigned_offd[j1] == pass-1) |
1108: { |
1109: j_start = Pext_start[j1]; |
1110: j_end = j_start+Pext_i[j1+1]; |
1111: for (k=j_start; k < j_end; k++) |
1112: { |
1113: k1 = Pext_pass[pass][k]; |
1114: if (k1 < 0) |
1115: { |
1116: if (P_marker[-k1-1] != -i1-1) |
1117: { |
1118: P_diag_pass[pass][cnt_nz++] = -k1-1; |
1119: P_marker[-k1-1] = -i1-1; |
1120: } |
1121: } |
1122: else if (P_marker_offd[k1] != -i1-1) |
1123: { |
1124: P_offd_pass[pass][cnt_nz_offd++] = k1; |
1125: P_marker_offd[k1] = -i1-1; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 4.36 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.14 |
Bottlenecks | P5, P6, P7, |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source | par_multi_interp.c:1072-1075,par_multi_interp.c:1078-1078,par_multi_interp.c:1099-1099,par_multi_interp.c:1104-1104 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 4.00 |
CQA cycles if no scalar integer | 4.00 |
CQA cycles if FP arith vectorized | 4.00 |
CQA cycles if fully vectorized | 0.92 |
Front-end cycles | 3.50 |
DIV/SQRT cycles | 2.50 |
P0 cycles | 1.50 |
P1 cycles | 1.25 |
P2 cycles | 1.25 |
P3 cycles | 2.50 |
P4 cycles | 4.00 |
P5 cycles | 4.00 |
P6 cycles | 4.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 0.00 |
P10 cycles | 0.00 |
P11 cycles | 0.00 |
P12 cycles | 0.00 |
P13 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 21.00 |
Nb uops | 21.00 |
Nb loads | 10.00 |
Nb stores | 2.00 |
Nb stack references | 6.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 24.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 80.00 |
Bytes stored | 16.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 4.36 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.14 |
Bottlenecks | P5, P6, P7, |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source | par_multi_interp.c:1072-1075,par_multi_interp.c:1078-1078,par_multi_interp.c:1099-1099,par_multi_interp.c:1104-1104 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 4.00 |
CQA cycles if no scalar integer | 4.00 |
CQA cycles if FP arith vectorized | 4.00 |
CQA cycles if fully vectorized | 0.92 |
Front-end cycles | 3.50 |
DIV/SQRT cycles | 2.50 |
P0 cycles | 1.50 |
P1 cycles | 1.25 |
P2 cycles | 1.25 |
P3 cycles | 2.50 |
P4 cycles | 4.00 |
P5 cycles | 4.00 |
P6 cycles | 4.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 0.00 |
P10 cycles | 0.00 |
P11 cycles | 0.00 |
P12 cycles | 0.00 |
P13 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 21.00 |
Nb uops | 21.00 |
Nb loads | 10.00 |
Nb stores | 2.00 |
Nb stack references | 6.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 24.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 80.00 |
Bytes stored | 16.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source file and lines | par_multi_interp.c:917-1125 |
Module | exec |
nb instructions | 21 |
nb uops | 21 |
loop length | 93 |
used x86 registers | 5 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 6 |
micro-operation queue | 3.50 cycles |
front end | 3.50 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.50 | 1.50 | 1.25 | 1.25 | 2.50 | 4.00 | 4.00 | 4.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
cycles | 2.50 | 1.50 | 1.25 | 1.25 | 2.50 | 4.00 | 4.00 | 4.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Front-end | 3.50 |
Dispatch | 4.00 |
Overall L1 | 4.00 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x70(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
INC %RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP -0xd0(%RBP),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JGE 46dc41 <hypre_BoomerAMGBuildMultipass.extracted.34+0xda1> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x90(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RSI,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RDX,%RSI,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xa8(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RDX,%RSI,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RSI,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOT %RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RSI,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
JMP 46d85e <hypre_BoomerAMGBuildMultipass.extracted.34+0x9be> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV -0xa0(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x58(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RDX,%R8,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%RDX,%R8,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %R8,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JL 46db7c <hypre_BoomerAMGBuildMultipass.extracted.34+0xcdc> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
JMP 46d810 <hypre_BoomerAMGBuildMultipass.extracted.34+0x970> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 46d810 <hypre_BoomerAMGBuildMultipass.extracted.34+0x970> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source file and lines | par_multi_interp.c:917-1125 |
Module | exec |
nb instructions | 21 |
nb uops | 21 |
loop length | 93 |
used x86 registers | 5 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 6 |
micro-operation queue | 3.50 cycles |
front end | 3.50 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.50 | 1.50 | 1.25 | 1.25 | 2.50 | 4.00 | 4.00 | 4.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
cycles | 2.50 | 1.50 | 1.25 | 1.25 | 2.50 | 4.00 | 4.00 | 4.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Front-end | 3.50 |
Dispatch | 4.00 |
Overall L1 | 4.00 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x70(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
INC %RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP -0xd0(%RBP),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JGE 46dc41 <hypre_BoomerAMGBuildMultipass.extracted.34+0xda1> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x90(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RSI,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RDX,%RSI,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xa8(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RDX,%RSI,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RSI,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOT %RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RSI,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
JMP 46d85e <hypre_BoomerAMGBuildMultipass.extracted.34+0x9be> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV -0xa0(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x58(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RDX,%R8,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%RDX,%R8,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %R8,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JL 46db7c <hypre_BoomerAMGBuildMultipass.extracted.34+0xcdc> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
JMP 46d810 <hypre_BoomerAMGBuildMultipass.extracted.34+0x970> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 46d810 <hypre_BoomerAMGBuildMultipass.extracted.34+0x970> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |