Function: hypre_BoomerAMGBuildMultipass.extracted.34 | Module: exec | Source: par_multi_interp.c:891-1134 [...] | Coverage: 1.55% |
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Function: hypre_BoomerAMGBuildMultipass.extracted.34 | Module: exec | Source: par_multi_interp.c:891-1134 [...] | Coverage: 1.55% |
---|
/beegfs/hackathon/users/eoseret/qaas_runs/170-859-5251/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 891 - 1134 |
-------------------------------------------------------------------------------- |
891: #pragma omp parallel private(i,my_thread_num,num_threads,thread_start,thread_stop,cnt_nz,cnt_nz_offd,i1,j,j1,j_start,j_end,k1,k,P_marker,P_marker_offd) |
[...] |
900: my_thread_num = hypre_GetThreadNum(); |
901: num_threads = hypre_NumActiveThreads(); |
902: thread_start = (pass_length/num_threads)*my_thread_num; |
903: if (my_thread_num == num_threads-1) |
904: { thread_stop = pass_length; } |
905: else |
906: { thread_stop = (pass_length/num_threads)*(my_thread_num+1); } |
907: thread_start += pass_pointer[pass]; |
908: thread_stop += pass_pointer[pass]; |
[...] |
916: P_marker = hypre_CTAlloc(HYPRE_Int, n_coarse); /* marks points to see if they're counted */ |
917: for (i=0; i < n_coarse; i++) |
918: { P_marker[i] = -1; } |
919: if (new_num_cols_offd == local_index+1) |
[...] |
925: else if (n_coarse_offd) |
[...] |
939: for (i=thread_start; i < thread_stop; i++) |
940: { |
941: i1 = pass_array[i]; |
942: P_diag_start[i1] = cnt_nz; |
943: P_offd_start[i1] = cnt_nz_offd; |
944: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
945: { |
946: j1 = S_diag_j[j]; |
947: if (assigned[j1] == pass-1) |
948: { |
949: j_start = P_diag_start[j1]; |
950: j_end = j_start+P_diag_i[j1+1]; |
951: for (k=j_start; k < j_end; k++) |
952: { |
953: k1 = P_diag_pass[pass-1][k]; |
954: if (P_marker[k1] != i1) |
955: { |
956: cnt_nz++; |
957: P_diag_i[i1+1]++; |
958: P_marker[k1] = i1; |
959: } |
960: } |
961: j_start = P_offd_start[j1]; |
962: j_end = j_start+P_offd_i[j1+1]; |
963: for (k=j_start; k < j_end; k++) |
964: { |
965: k1 = P_offd_pass[pass-1][k]; |
966: if (P_marker_offd[k1] != i1) |
967: { |
968: cnt_nz_offd++; |
969: P_offd_i[i1+1]++; |
970: P_marker_offd[k1] = i1; |
[...] |
976: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
977: { |
978: j1 = S_offd_j[j]; |
979: if (assigned_offd[j1] == pass-1) |
980: { |
981: j_start = Pext_start[j1]; |
982: j_end = j_start+Pext_i[j1+1]; |
983: for (k=j_start; k < j_end; k++) |
984: { |
985: k1 = Pext_pass[pass][k]; |
986: if (k1 < 0) |
987: { |
988: if (P_marker[-k1-1] != i1) |
989: { |
990: cnt_nz++; |
991: P_diag_i[i1+1]++; |
992: P_marker[-k1-1] = i1; |
993: } |
994: } |
995: else if (P_marker_offd[k1] != i1) |
996: { |
997: cnt_nz_offd++; |
[...] |
1008: if(my_thread_num == 0) |
1009: { max_num_threads[0] = num_threads; } |
1010: cnt_nz_offd_per_thread[my_thread_num] = cnt_nz_offd; |
1011: cnt_nz_per_thread[my_thread_num] = cnt_nz; |
1012: #ifdef HYPRE_USING_OPENMP |
1013: #pragma omp barrier |
1014: #endif |
1015: if(my_thread_num == 0) |
1016: { |
1017: for(i = 1; i < max_num_threads[0]; i++) |
1018: { |
1019: cnt_nz_offd_per_thread[i] += cnt_nz_offd_per_thread[i-1]; |
1020: cnt_nz_per_thread[i] += cnt_nz_per_thread[i-1]; |
[...] |
1026: if(my_thread_num > 0) |
1027: { |
1028: /* update this thread's section of P_diag_start and P_offd_start |
1029: * with the num of nz's counted by previous threads */ |
1030: for (i=thread_start; i < thread_stop; i++) |
1031: { |
1032: i1 = pass_array[i]; |
1033: P_diag_start[i1] += cnt_nz_per_thread[my_thread_num-1]; |
1034: P_offd_start[i1] += cnt_nz_offd_per_thread[my_thread_num-1]; |
[...] |
1040: cnt_nz = cnt_nz_per_thread[max_num_threads[0]-1]; |
1041: cnt_nz_offd = cnt_nz_offd_per_thread[max_num_threads[0]-1]; |
1042: |
1043: /* Updated total nz count */ |
1044: total_nz += cnt_nz; |
1045: total_nz_offd += cnt_nz_offd; |
1046: |
1047: /* Allocate P_diag_pass and P_offd_pass for all threads */ |
1048: P_diag_pass[pass] = hypre_CTAlloc(HYPRE_Int, cnt_nz); |
1049: if (cnt_nz_offd) |
1050: P_offd_pass[pass] = hypre_CTAlloc(HYPRE_Int, cnt_nz_offd); |
1051: else if (num_procs > 1) |
[...] |
1060: if(my_thread_num > 0) |
1061: { |
1062: cnt_nz = cnt_nz_per_thread[my_thread_num-1]; |
1063: cnt_nz_offd = cnt_nz_offd_per_thread[my_thread_num-1]; |
[...] |
1072: for (i=thread_start; i < thread_stop; i++) |
1073: { |
1074: i1 = pass_array[i]; |
1075: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
1076: { |
1077: j1 = S_diag_j[j]; |
1078: if (assigned[j1] == pass-1) |
1079: { |
1080: j_start = P_diag_start[j1]; |
1081: j_end = j_start+P_diag_i[j1+1]; |
1082: for (k=j_start; k < j_end; k++) |
1083: { |
1084: k1 = P_diag_pass[pass-1][k]; |
1085: if (P_marker[k1] != -i1-1) |
1086: { |
1087: P_diag_pass[pass][cnt_nz++] = k1; |
1088: P_marker[k1] = -i1-1; |
1089: } |
1090: } |
1091: j_start = P_offd_start[j1]; |
1092: j_end = j_start+P_offd_i[j1+1]; |
1093: for (k=j_start; k < j_end; k++) |
1094: { |
1095: k1 = P_offd_pass[pass-1][k]; |
1096: if (P_marker_offd[k1] != -i1-1) |
1097: { |
1098: P_offd_pass[pass][cnt_nz_offd++] = k1; |
1099: P_marker_offd[k1] = -i1-1; |
1100: } |
1101: } |
1102: } |
1103: } |
1104: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
1105: { |
1106: j1 = S_offd_j[j]; |
1107: if (assigned_offd[j1] == pass-1) |
1108: { |
1109: j_start = Pext_start[j1]; |
1110: j_end = j_start+Pext_i[j1+1]; |
1111: for (k=j_start; k < j_end; k++) |
1112: { |
1113: k1 = Pext_pass[pass][k]; |
1114: if (k1 < 0) |
1115: { |
1116: if (P_marker[-k1-1] != -i1-1) |
1117: { |
1118: P_diag_pass[pass][cnt_nz++] = -k1-1; |
1119: P_marker[-k1-1] = -i1-1; |
1120: } |
1121: } |
1122: else if (P_marker_offd[k1] != -i1-1) |
1123: { |
1124: P_offd_pass[pass][cnt_nz_offd++] = k1; |
1125: P_marker_offd[k1] = -i1-1; |
[...] |
1132: hypre_TFree(P_marker); |
1133: if ( (n_coarse_offd) || (new_num_cols_offd == local_index+1) ) |
1134: { hypre_TFree(P_marker_offd); } |
0x46cea0 PUSH %RBP |
0x46cea1 MOV %RSP,%RBP |
0x46cea4 PUSH %R15 |
0x46cea6 PUSH %R14 |
0x46cea8 PUSH %R13 |
0x46ceaa PUSH %R12 |
0x46ceac PUSH %RBX |
0x46cead SUB $0x128,%RSP |
0x46ceb4 MOV %R9,-0x120(%RBP) |
0x46cebb MOV %R8,-0xa0(%RBP) |
0x46cec2 MOV %RCX,-0x118(%RBP) |
0x46cec9 MOV %RDX,-0xa8(%RBP) |
0x46ced0 MOV %RDI,-0xc8(%RBP) |
0x46ced7 MOV 0xd0(%RBP),%RAX |
0x46cede MOV %RAX,-0x80(%RBP) |
0x46cee2 MOV 0xc8(%RBP),%RAX |
0x46cee9 MOV %RAX,-0x148(%RBP) |
0x46cef0 MOV 0xc0(%RBP),%RAX |
0x46cef7 MOV %RAX,-0xb0(%RBP) |
0x46cefe MOV 0xb8(%RBP),%RBX |
0x46cf05 MOV 0xb0(%RBP),%RAX |
0x46cf0c MOV %RAX,-0xe8(%RBP) |
0x46cf13 MOV 0xa8(%RBP),%RAX |
0x46cf1a MOV %RAX,-0xc0(%RBP) |
0x46cf21 MOV 0xa0(%RBP),%RAX |
0x46cf28 MOV %RAX,-0x140(%RBP) |
0x46cf2f MOV 0x98(%RBP),%RAX |
0x46cf36 MOV %RAX,-0x128(%RBP) |
0x46cf3d MOV 0x90(%RBP),%RAX |
0x46cf44 MOV %RAX,-0x110(%RBP) |
0x46cf4b MOV 0x88(%RBP),%RAX |
0x46cf52 MOV %RAX,-0x108(%RBP) |
0x46cf59 MOV 0x80(%RBP),%RAX |
0x46cf60 MOV %RAX,-0xe0(%RBP) |
0x46cf67 MOV 0x78(%RBP),%R15 |
0x46cf6b MOV 0x70(%RBP),%R12 |
0x46cf6f MOV 0x68(%RBP),%RAX |
0x46cf73 MOV %RAX,-0x138(%RBP) |
0x46cf7a MOV 0x60(%RBP),%RAX |
0x46cf7e MOV %RAX,-0x100(%RBP) |
0x46cf85 MOV 0x58(%RBP),%RAX |
0x46cf89 MOV %RAX,-0xf8(%RBP) |
0x46cf90 MOV 0x50(%RBP),%RAX |
0x46cf94 MOV %RAX,-0x50(%RBP) |
0x46cf98 MOV 0x48(%RBP),%RAX |
0x46cf9c MOV %RAX,-0x48(%RBP) |
0x46cfa0 MOV 0x40(%RBP),%RAX |
0x46cfa4 MOV %RAX,-0x40(%RBP) |
0x46cfa8 MOV 0x38(%RBP),%RAX |
0x46cfac MOV %RAX,-0x98(%RBP) |
0x46cfb3 MOV 0x30(%RBP),%R13 |
0x46cfb7 MOV 0x28(%RBP),%RAX |
0x46cfbb MOV %RAX,-0x90(%RBP) |
0x46cfc2 MOV 0x20(%RBP),%RAX |
0x46cfc6 MOV %RAX,-0xf0(%RBP) |
0x46cfcd MOV 0x18(%RBP),%RAX |
0x46cfd1 MOV %RAX,-0x68(%RBP) |
0x46cfd5 MOV 0x10(%RBP),%RAX |
0x46cfd9 MOV %RAX,-0x60(%RBP) |
0x46cfdd CALL 5a2400 <hypre_GetThreadNum> |
0x46cfe2 MOV %RAX,-0x30(%RBP) |
0x46cfe6 CALL 5a23f0 <hypre_NumActiveThreads> |
0x46cfeb MOV %RAX,%RCX |
0x46cfee MOV %RBX,%RAX |
0x46cff1 OR %RCX,%RAX |
0x46cff4 SHR $0x20,%RAX |
0x46cff8 JE 46d004 |
0x46cffa MOV %RBX,%RAX |
0x46cffd CQTO |
0x46cfff IDIV %RCX |
0x46d002 JMP 46d00a |
0x46d004 MOV %EBX,%EAX |
0x46d006 XOR %EDX,%EDX |
0x46d008 DIV %ECX |
0x46d00a MOV %RCX,-0x130(%RBP) |
0x46d011 MOV %RCX,%RDX |
0x46d014 DEC %RDX |
0x46d017 MOV -0x30(%RBP),%RCX |
0x46d01b LEA 0x1(%RCX),%RSI |
0x46d01f MOV %RAX,%R14 |
0x46d022 IMUL %RAX,%RSI |
0x46d026 CMP %RDX,%RCX |
0x46d029 CMOVE %RBX,%RSI |
0x46d02d MOV %RSI,-0xb8(%RBP) |
0x46d034 MOV (%R12),%R12 |
0x46d038 MOV (%R13,%R12,8),%RAX |
0x46d03d MOV %RAX,-0xd8(%RBP) |
0x46d044 MOV $0x8,%ESI |
0x46d049 MOV %R15,%RDI |
0x46d04c CALL 59eb80 <hypre_CAlloc> |
0x46d051 MOV %RAX,%RBX |
0x46d054 TEST %R15,%R15 |
0x46d057 JLE 46d06d |
0x46d059 SAL $0x3,%R15 |
0x46d05d MOV %RBX,%RDI |
0x46d060 MOV $0xff,%ESI |
0x46d065 MOV %R15,%RDX |
0x46d068 CALL 5aa170 <_intel_fast_memset> |
0x46d06d IMUL -0x30(%RBP),%R14 |
0x46d072 MOV %R14,-0x88(%RBP) |
0x46d079 MOV -0xc0(%RBP),%RAX |
0x46d080 INC %RAX |
0x46d083 MOV -0xe8(%RBP),%RDI |
0x46d08a CMP %RDI,%RAX |
0x46d08d MOV %RAX,-0xc0(%RBP) |
0x46d094 JE 46d0a2 |
0x46d096 MOV -0xe0(%RBP),%RDI |
0x46d09d TEST %RDI,%RDI |
0x46d0a0 JE 46d0cd |
0x46d0a2 MOV $0x8,%ESI |
0x46d0a7 MOV %RDI,%R14 |
0x46d0aa CALL 59eb80 <hypre_CAlloc> |
0x46d0af MOV %RAX,%R15 |
0x46d0b2 MOV %R14,%RDX |
0x46d0b5 TEST %R14,%R14 |
0x46d0b8 JLE 46d0cd |
0x46d0ba SAL $0x3,%RDX |
0x46d0be MOV %R15,%RDI |
0x46d0c1 MOV $0xff,%ESI |
0x46d0c6 CALL 5aa170 <_intel_fast_memset> |
0x46d0cb JMP 46d0cd |
0x46d0cd MOV -0x88(%RBP),%RDX |
0x46d0d4 MOV -0xd8(%RBP),%RCX |
0x46d0db LEA (%RCX,%RDX,1),%RAX |
0x46d0df MOV -0xb8(%RBP),%RSI |
0x46d0e6 ADD %RSI,%RCX |
0x46d0e9 MOV %RCX,-0xd0(%RBP) |
0x46d0f0 CMP %RSI,%RDX |
0x46d0f3 MOV %RAX,-0x70(%RBP) |
0x46d0f7 JGE 46d52d |
0x46d0fd LEA -0x1(%R12),%R14 |
0x46d102 XOR %ECX,%ECX |
0x46d104 MOV %RAX,%RSI |
0x46d107 XOR %EAX,%EAX |
0x46d109 MOV %R14,-0x58(%RBP) |
0x46d10d JMP 46d127 |
0x46d10f NOP |
(1188) 0x46d110 MOV -0x150(%RBP),%RSI |
(1188) 0x46d117 INC %RSI |
(1188) 0x46d11a CMP -0xd0(%RBP),%RSI |
(1188) 0x46d121 JGE 46d531 |
(1188) 0x46d127 MOV -0x90(%RBP),%RDX |
(1188) 0x46d12e MOV %RSI,-0x150(%RBP) |
(1188) 0x46d135 MOV (%RDX,%RSI,8),%RDI |
(1188) 0x46d139 MOV -0x98(%RBP),%RDX |
(1188) 0x46d140 MOV %RAX,(%RDX,%RDI,8) |
(1188) 0x46d144 MOV -0x40(%RBP),%RDX |
(1188) 0x46d148 MOV %RCX,(%RDX,%RDI,8) |
(1188) 0x46d14c MOV -0xa8(%RBP),%RDX |
(1188) 0x46d153 MOV (%RDX,%RDI,8),%R8 |
(1188) 0x46d157 JMP 46d16a |
(1191) 0x46d159 MOV -0x58(%RBP),%R14 |
(1191) 0x46d15d NOPL (%RAX) |
(1191) 0x46d160 INC %R8 |
(1191) 0x46d163 MOV -0xa8(%RBP),%RDX |
(1191) 0x46d16a CMP 0x8(%RDX,%RDI,8),%R8 |
(1191) 0x46d16f JGE 46d440 |
(1191) 0x46d175 MOV -0x118(%RBP),%RDX |
(1191) 0x46d17c MOV (%RDX,%R8,8),%R13 |
(1191) 0x46d180 MOV -0x108(%RBP),%RDX |
(1191) 0x46d187 CMP %R14,(%RDX,%R13,8) |
(1191) 0x46d18b JNE 46d160 |
(1191) 0x46d18d MOV -0x60(%RBP),%RDX |
(1191) 0x46d191 MOV 0x8(%RDX,%R13,8),%R10 |
(1191) 0x46d196 TEST %R10,%R10 |
(1191) 0x46d199 JLE 46d2ef |
(1191) 0x46d19f MOV -0x98(%RBP),%RDX |
(1191) 0x46d1a6 MOV %R13,-0x38(%RBP) |
(1191) 0x46d1aa MOV (%RDX,%R13,8),%R11 |
(1191) 0x46d1ae ADD %R11,%R10 |
(1191) 0x46d1b1 LEA 0x1(%R11),%RDX |
(1191) 0x46d1b5 CMP %RDX,%R10 |
(1191) 0x46d1b8 CMOVLE %RDX,%R10 |
(1191) 0x46d1bc MOV -0x48(%RBP),%RDX |
(1191) 0x46d1c0 MOV -0x8(%RDX,%R12,8),%RSI |
(1191) 0x46d1c5 MOV %R10,%RDX |
(1191) 0x46d1c8 SUB %R11,%RDX |
(1191) 0x46d1cb CMP $0x4,%RDX |
(1191) 0x46d1cf MOV %RDX,-0x78(%RBP) |
(1191) 0x46d1d3 JAE 46d228 |
(1191) 0x46d1d5 MOV -0x78(%RBP),%R9 |
(1191) 0x46d1d9 MOV %R9,%RDX |
(1191) 0x46d1dc AND $-0x4,%RDX |
(1191) 0x46d1e0 CMP %R9,%RDX |
(1191) 0x46d1e3 JAE 46d2e7 |
(1191) 0x46d1e9 ADD %RDX,%R11 |
(1191) 0x46d1ec MOV -0x58(%RBP),%R14 |
(1191) 0x46d1f0 MOV -0x38(%RBP),%R13 |
(1191) 0x46d1f4 JMP 46d20c |
0x46d1f6 NOPW %CS:(%RAX,%RAX,1) |
(1194) 0x46d200 INC %R11 |
(1194) 0x46d203 CMP %R11,%R10 |
(1194) 0x46d206 JE 46d2ef |
(1194) 0x46d20c MOV (%RSI,%R11,8),%RDX |
(1194) 0x46d210 CMP %RDI,(%RBX,%RDX,8) |
(1194) 0x46d214 JE 46d200 |
(1194) 0x46d216 INC %RAX |
(1194) 0x46d219 MOV -0x60(%RBP),%R9 |
(1194) 0x46d21d INCQ 0x8(%R9,%RDI,8) |
(1194) 0x46d222 MOV %RDI,(%RBX,%RDX,8) |
(1194) 0x46d226 JMP 46d200 |
(1191) 0x46d228 MOV %RDX,%R14 |
(1191) 0x46d22b SHR $0x2,%R14 |
(1191) 0x46d22f LEA (%RSI,%R11,8),%R13 |
(1191) 0x46d233 ADD $0x18,%R13 |
(1191) 0x46d237 JMP 46d249 |
0x46d239 NOPL (%RAX) |
(1195) 0x46d240 ADD $0x20,%R13 |
(1195) 0x46d244 DEC %R14 |
(1195) 0x46d247 JE 46d1d5 |
(1195) 0x46d249 MOV -0x18(%R13),%RDX |
(1195) 0x46d24d CMP %RDI,(%RBX,%RDX,8) |
(1195) 0x46d251 JNE 46d280 |
(1195) 0x46d253 MOV -0x10(%R13),%RDX |
(1195) 0x46d257 CMP %RDI,(%RBX,%RDX,8) |
(1195) 0x46d25b JNE 46d29a |
(1195) 0x46d25d MOV -0x8(%R13),%RDX |
(1195) 0x46d261 CMP %RDI,(%RBX,%RDX,8) |
(1195) 0x46d265 JNE 46d2b4 |
(1195) 0x46d267 MOV (%R13),%RDX |
(1195) 0x46d26b CMP %RDI,(%RBX,%RDX,8) |
(1195) 0x46d26f JE 46d240 |
(1195) 0x46d271 JMP 46d2d2 |
0x46d273 NOPW %CS:(%RAX,%RAX,1) |
(1195) 0x46d280 INC %RAX |
(1195) 0x46d283 MOV -0x60(%RBP),%R9 |
(1195) 0x46d287 INCQ 0x8(%R9,%RDI,8) |
(1195) 0x46d28c MOV %RDI,(%RBX,%RDX,8) |
(1195) 0x46d290 MOV -0x10(%R13),%RDX |
(1195) 0x46d294 CMP %RDI,(%RBX,%RDX,8) |
(1195) 0x46d298 JE 46d25d |
(1195) 0x46d29a INC %RAX |
(1195) 0x46d29d MOV -0x60(%RBP),%R9 |
(1195) 0x46d2a1 INCQ 0x8(%R9,%RDI,8) |
(1195) 0x46d2a6 MOV %RDI,(%RBX,%RDX,8) |
(1195) 0x46d2aa MOV -0x8(%R13),%RDX |
(1195) 0x46d2ae CMP %RDI,(%RBX,%RDX,8) |
(1195) 0x46d2b2 JE 46d267 |
(1195) 0x46d2b4 INC %RAX |
(1195) 0x46d2b7 MOV -0x60(%RBP),%R9 |
(1195) 0x46d2bb INCQ 0x8(%R9,%RDI,8) |
(1195) 0x46d2c0 MOV %RDI,(%RBX,%RDX,8) |
(1195) 0x46d2c4 MOV (%R13),%RDX |
(1195) 0x46d2c8 CMP %RDI,(%RBX,%RDX,8) |
(1195) 0x46d2cc JE 46d240 |
(1195) 0x46d2d2 INC %RAX |
(1195) 0x46d2d5 MOV -0x60(%RBP),%R9 |
(1195) 0x46d2d9 INCQ 0x8(%R9,%RDI,8) |
(1195) 0x46d2de MOV %RDI,(%RBX,%RDX,8) |
(1195) 0x46d2e2 JMP 46d240 |
(1191) 0x46d2e7 MOV -0x58(%RBP),%R14 |
(1191) 0x46d2eb MOV -0x38(%RBP),%R13 |
(1191) 0x46d2ef MOV -0x68(%RBP),%RDX |
(1191) 0x46d2f3 MOV 0x8(%RDX,%R13,8),%R10 |
(1191) 0x46d2f8 TEST %R10,%R10 |
(1191) 0x46d2fb JLE 46d160 |
(1191) 0x46d301 MOV -0x40(%RBP),%RDX |
(1191) 0x46d305 MOV (%RDX,%R13,8),%R9 |
(1191) 0x46d309 ADD %R9,%R10 |
(1191) 0x46d30c LEA 0x1(%R9),%RDX |
(1191) 0x46d310 CMP %RDX,%R10 |
(1191) 0x46d313 CMOVLE %RDX,%R10 |
(1191) 0x46d317 MOV -0x50(%RBP),%RDX |
(1191) 0x46d31b MOV -0x8(%RDX,%R12,8),%RSI |
(1191) 0x46d320 MOV %R10,%R11 |
(1191) 0x46d323 SUB %R9,%R11 |
(1191) 0x46d326 CMP $0x4,%R11 |
(1191) 0x46d32a MOV %R11,-0x38(%RBP) |
(1191) 0x46d32e JAE 46d378 |
(1191) 0x46d330 MOV -0x38(%RBP),%RDX |
(1191) 0x46d334 MOV %RDX,%R11 |
(1191) 0x46d337 AND $-0x4,%R11 |
(1191) 0x46d33b CMP %RDX,%R11 |
(1191) 0x46d33e JAE 46d159 |
(1191) 0x46d344 ADD %R11,%R9 |
(1191) 0x46d347 MOV -0x58(%RBP),%R14 |
(1191) 0x46d34b JMP 46d35c |
0x46d34d NOPL (%RAX) |
(1192) 0x46d350 INC %R9 |
(1192) 0x46d353 CMP %R9,%R10 |
(1192) 0x46d356 JE 46d160 |
(1192) 0x46d35c MOV (%RSI,%R9,8),%RDX |
(1192) 0x46d360 CMP %RDI,(%R15,%RDX,8) |
(1192) 0x46d364 JE 46d350 |
(1192) 0x46d366 INC %RCX |
(1192) 0x46d369 MOV -0x68(%RBP),%R11 |
(1192) 0x46d36d INCQ 0x8(%R11,%RDI,8) |
(1192) 0x46d372 MOV %RDI,(%R15,%RDX,8) |
(1192) 0x46d376 JMP 46d350 |
(1191) 0x46d378 SHR $0x2,%R11 |
(1191) 0x46d37c LEA (%RSI,%R9,8),%R14 |
(1191) 0x46d380 ADD $0x18,%R14 |
(1191) 0x46d384 JMP 46d399 |
0x46d386 NOPW %CS:(%RAX,%RAX,1) |
(1193) 0x46d390 ADD $0x20,%R14 |
(1193) 0x46d394 DEC %R11 |
(1193) 0x46d397 JE 46d330 |
(1193) 0x46d399 MOV -0x18(%R14),%R13 |
(1193) 0x46d39d CMP %RDI,(%R15,%R13,8) |
(1193) 0x46d3a1 JNE 46d3d0 |
(1193) 0x46d3a3 MOV -0x10(%R14),%R13 |
(1193) 0x46d3a7 CMP %RDI,(%R15,%R13,8) |
(1193) 0x46d3ab JNE 46d3ea |
(1193) 0x46d3ad MOV -0x8(%R14),%R13 |
(1193) 0x46d3b1 CMP %RDI,(%R15,%R13,8) |
(1193) 0x46d3b5 JNE 46d404 |
(1193) 0x46d3b7 MOV (%R14),%R13 |
(1193) 0x46d3ba CMP %RDI,(%R15,%R13,8) |
(1193) 0x46d3be JE 46d390 |
(1193) 0x46d3c0 JMP 46d421 |
0x46d3c2 NOPW %CS:(%RAX,%RAX,1) |
(1193) 0x46d3d0 INC %RCX |
(1193) 0x46d3d3 MOV -0x68(%RBP),%RDX |
(1193) 0x46d3d7 INCQ 0x8(%RDX,%RDI,8) |
(1193) 0x46d3dc MOV %RDI,(%R15,%R13,8) |
(1193) 0x46d3e0 MOV -0x10(%R14),%R13 |
(1193) 0x46d3e4 CMP %RDI,(%R15,%R13,8) |
(1193) 0x46d3e8 JE 46d3ad |
(1193) 0x46d3ea INC %RCX |
(1193) 0x46d3ed MOV -0x68(%RBP),%RDX |
(1193) 0x46d3f1 INCQ 0x8(%RDX,%RDI,8) |
(1193) 0x46d3f6 MOV %RDI,(%R15,%R13,8) |
(1193) 0x46d3fa MOV -0x8(%R14),%R13 |
(1193) 0x46d3fe CMP %RDI,(%R15,%R13,8) |
(1193) 0x46d402 JE 46d3b7 |
(1193) 0x46d404 INC %RCX |
(1193) 0x46d407 MOV -0x68(%RBP),%RDX |
(1193) 0x46d40b INCQ 0x8(%RDX,%RDI,8) |
(1193) 0x46d410 MOV %RDI,(%R15,%R13,8) |
(1193) 0x46d414 MOV (%R14),%R13 |
(1193) 0x46d417 CMP %RDI,(%R15,%R13,8) |
(1193) 0x46d41b JE 46d390 |
(1193) 0x46d421 INC %RCX |
(1193) 0x46d424 MOV -0x68(%RBP),%RDX |
(1193) 0x46d428 INCQ 0x8(%RDX,%RDI,8) |
(1193) 0x46d42d MOV %RDI,(%R15,%R13,8) |
(1193) 0x46d431 JMP 46d390 |
0x46d436 NOPW %CS:(%RAX,%RAX,1) |
(1188) 0x46d440 MOV -0xa0(%RBP),%RDX |
(1188) 0x46d447 MOV (%RDX,%RDI,8),%R8 |
(1188) 0x46d44b MOV 0x8(%RDX,%RDI,8),%RSI |
(1188) 0x46d450 CMP %RSI,%R8 |
(1188) 0x46d453 JL 46d46c |
(1188) 0x46d455 JMP 46d110 |
0x46d45a NOPW (%RAX,%RAX,1) |
(1189) 0x46d460 INC %R8 |
(1189) 0x46d463 CMP %RSI,%R8 |
(1189) 0x46d466 JGE 46d110 |
(1189) 0x46d46c MOV -0x120(%RBP),%RDX |
(1189) 0x46d473 MOV (%RDX,%R8,8),%R9 |
(1189) 0x46d477 MOV -0x110(%RBP),%RDX |
(1189) 0x46d47e CMP %R14,(%RDX,%R9,8) |
(1189) 0x46d482 JNE 46d460 |
(1189) 0x46d484 MOV -0x100(%RBP),%RDX |
(1189) 0x46d48b MOV 0x8(%RDX,%R9,8),%RDX |
(1189) 0x46d490 TEST %RDX,%RDX |
(1189) 0x46d493 JLE 46d460 |
(1189) 0x46d495 MOV -0xf0(%RBP),%RSI |
(1189) 0x46d49c MOV (%RSI,%R9,8),%RSI |
(1189) 0x46d4a0 ADD %RSI,%RDX |
(1189) 0x46d4a3 MOV -0xf8(%RBP),%R9 |
(1189) 0x46d4aa MOV (%R9,%R12,8),%R9 |
(1189) 0x46d4ae LEA 0x1(%RSI),%R10 |
(1189) 0x46d4b2 CMP %R10,%RDX |
(1189) 0x46d4b5 CMOVLE %R10,%RDX |
(1189) 0x46d4b9 JMP 46d4d0 |
0x46d4bb NOPL (%RAX,%RAX,1) |
(1190) 0x46d4c0 INCQ 0x8(%R11,%RDI,8) |
(1190) 0x46d4c5 MOV %RDI,(%R10) |
(1190) 0x46d4c8 INC %RSI |
(1190) 0x46d4cb CMP %RSI,%RDX |
(1190) 0x46d4ce JE 46d510 |
(1190) 0x46d4d0 MOV (%R9,%RSI,8),%R10 |
(1190) 0x46d4d4 TEST %R10,%R10 |
(1190) 0x46d4d7 JS 46d4f0 |
(1190) 0x46d4d9 CMP %RDI,(%R15,%R10,8) |
(1190) 0x46d4dd JE 46d4c8 |
(1190) 0x46d4df LEA (%R15,%R10,8),%R10 |
(1190) 0x46d4e3 INC %RCX |
(1190) 0x46d4e6 MOV -0x68(%RBP),%R11 |
(1190) 0x46d4ea JMP 46d4c0 |
0x46d4ec NOPL (%RAX) |
(1190) 0x46d4f0 NOT %R10 |
(1190) 0x46d4f3 CMP %RDI,(%RBX,%R10,8) |
(1190) 0x46d4f7 JE 46d4c8 |
(1190) 0x46d4f9 LEA (%RBX,%R10,8),%R10 |
(1190) 0x46d4fd INC %RAX |
(1190) 0x46d500 MOV -0x60(%RBP),%R11 |
(1190) 0x46d504 JMP 46d4c0 |
0x46d506 NOPW %CS:(%RAX,%RAX,1) |
(1189) 0x46d510 MOV -0xa0(%RBP),%RDX |
(1189) 0x46d517 MOV 0x8(%RDX,%RDI,8),%RSI |
(1189) 0x46d51c INC %R8 |
(1189) 0x46d51f CMP %RSI,%R8 |
(1189) 0x46d522 JL 46d46c |
(1188) 0x46d528 JMP 46d110 |
0x46d52d XOR %EAX,%EAX |
0x46d52f XOR %ECX,%ECX |
0x46d531 MOV -0x30(%RBP),%RDX |
0x46d535 TEST %RDX,%RDX |
0x46d538 JNE 46d54b |
0x46d53a MOV -0xb0(%RBP),%RSI |
0x46d541 MOV -0x130(%RBP),%RDI |
0x46d548 MOV %RDI,(%RSI) |
0x46d54b MOV -0x80(%RBP),%R14 |
0x46d54f MOV %RCX,(%R14,%RDX,8) |
0x46d553 MOV -0x148(%RBP),%R13 |
0x46d55a MOV %RAX,(%R13,%RDX,8) |
0x46d55f MOV -0xc8(%RBP),%RAX |
0x46d566 MOV (%RAX),%ESI |
0x46d568 MOV $0x5fce70,%EDI |
0x46d56d CALL 41de10 <__kmpc_barrier@plt> |
0x46d572 MOV %R14,%RDX |
0x46d575 MOV %R13,%R14 |
0x46d578 CMPQ $0,-0x30(%RBP) |
0x46d57d MOV -0xb0(%RBP),%RSI |
0x46d584 JNE 46d5ba |
0x46d586 CMPQ $0x2,(%RSI) |
0x46d58a JL 46d5ba |
0x46d58c MOV $0x1,%EAX |
0x46d591 NOPW %CS:(%RAX,%RAX,1) |
(1187) 0x46d5a0 MOV -0x8(%RDX,%RAX,8),%RCX |
(1187) 0x46d5a5 ADD %RCX,(%RDX,%RAX,8) |
(1187) 0x46d5a9 MOV -0x8(%R14,%RAX,8),%RCX |
(1187) 0x46d5ae ADD %RCX,(%R14,%RAX,8) |
(1187) 0x46d5b2 INC %RAX |
(1187) 0x46d5b5 CMP (%RSI),%RAX |
(1187) 0x46d5b8 JL 46d5a0 |
0x46d5ba MOV -0xc8(%RBP),%RAX |
0x46d5c1 MOV (%RAX),%ESI |
0x46d5c3 MOV $0x5fce90,%EDI |
0x46d5c8 CALL 41de10 <__kmpc_barrier@plt> |
0x46d5cd MOV -0x30(%RBP),%R8 |
0x46d5d1 TEST %R8,%R8 |
0x46d5d4 JLE 46d730 |
0x46d5da MOV -0xb8(%RBP),%RAX |
0x46d5e1 CMP %RAX,-0x88(%RBP) |
0x46d5e8 MOV -0x40(%RBP),%RDI |
0x46d5ec MOV -0x98(%RBP),%R10 |
0x46d5f3 MOV -0x80(%RBP),%R11 |
0x46d5f7 JGE 46d799 |
0x46d5fd MOV -0x70(%RBP),%RDX |
0x46d601 LEA 0x1(%RDX),%RAX |
0x46d605 MOV -0xd0(%RBP),%RCX |
0x46d60c CMP %RCX,%RAX |
0x46d60f CMOVLE %RCX,%RAX |
0x46d613 MOV %RAX,%RCX |
0x46d616 SUB %RDX,%RCX |
0x46d619 CMP $0x4,%RCX |
0x46d61d JB 46d6dc |
0x46d623 MOV %RCX,%RDX |
0x46d626 SHR $0x2,%RDX |
0x46d62a MOV -0x90(%RBP),%RSI |
0x46d631 MOV -0x70(%RBP),%RDI |
0x46d635 LEA (%RSI,%RDI,8),%RSI |
0x46d639 ADD $0x18,%RSI |
0x46d63d NOPL (%RAX) |
(1186) 0x46d640 MOV -0x18(%RSI),%RDI |
(1186) 0x46d644 MOV -0x30(%RBP),%R8 |
(1186) 0x46d648 MOV -0x8(%R14,%R8,8),%R8 |
(1186) 0x46d64d ADD %R8,(%R10,%RDI,8) |
(1186) 0x46d651 MOV -0x30(%RBP),%R8 |
(1186) 0x46d655 MOV -0x8(%R11,%R8,8),%R8 |
(1186) 0x46d65a MOV -0x40(%RBP),%R9 |
(1186) 0x46d65e ADD %R8,(%R9,%RDI,8) |
(1186) 0x46d662 MOV -0x10(%RSI),%RDI |
(1186) 0x46d666 MOV -0x30(%RBP),%R8 |
(1186) 0x46d66a MOV -0x8(%R14,%R8,8),%R8 |
(1186) 0x46d66f ADD %R8,(%R10,%RDI,8) |
(1186) 0x46d673 MOV -0x30(%RBP),%R8 |
(1186) 0x46d677 MOV -0x8(%R11,%R8,8),%R8 |
(1186) 0x46d67c MOV -0x40(%RBP),%R9 |
(1186) 0x46d680 ADD %R8,(%R9,%RDI,8) |
(1186) 0x46d684 MOV -0x8(%RSI),%RDI |
(1186) 0x46d688 MOV -0x30(%RBP),%R8 |
(1186) 0x46d68c MOV -0x8(%R14,%R8,8),%R8 |
(1186) 0x46d691 ADD %R8,(%R10,%RDI,8) |
(1186) 0x46d695 MOV -0x30(%RBP),%R8 |
(1186) 0x46d699 MOV -0x8(%R11,%R8,8),%R8 |
(1186) 0x46d69e MOV -0x40(%RBP),%R9 |
(1186) 0x46d6a2 ADD %R8,(%R9,%RDI,8) |
(1186) 0x46d6a6 MOV (%RSI),%RDI |
(1186) 0x46d6a9 MOV -0x30(%RBP),%R8 |
(1186) 0x46d6ad MOV -0x8(%R14,%R8,8),%R8 |
(1186) 0x46d6b2 ADD %R8,(%R10,%RDI,8) |
(1186) 0x46d6b6 MOV -0x30(%RBP),%R8 |
(1186) 0x46d6ba MOV -0x8(%R11,%R8,8),%R8 |
(1186) 0x46d6bf MOV -0x40(%RBP),%R9 |
(1186) 0x46d6c3 ADD %R8,(%R9,%RDI,8) |
(1186) 0x46d6c7 MOV -0x30(%RBP),%R8 |
(1186) 0x46d6cb MOV -0x40(%RBP),%RDI |
(1186) 0x46d6cf ADD $0x20,%RSI |
(1186) 0x46d6d3 DEC %RDX |
(1186) 0x46d6d6 JNE 46d640 |
0x46d6dc MOV %RCX,%RDX |
0x46d6df AND $-0x4,%RDX |
0x46d6e3 CMP %RCX,%RDX |
0x46d6e6 MOV -0x90(%RBP),%RSI |
0x46d6ed MOV -0xd8(%RBP),%R9 |
0x46d6f4 JAE 46d799 |
0x46d6fa ADD -0x88(%RBP),%R9 |
0x46d701 ADD %RDX,%R9 |
0x46d704 NOPW %CS:(%RAX,%RAX,1) |
(1185) 0x46d710 MOV (%RSI,%R9,8),%RCX |
(1185) 0x46d714 MOV -0x8(%R14,%R8,8),%RDX |
(1185) 0x46d719 ADD %RDX,(%R10,%RCX,8) |
(1185) 0x46d71d MOV -0x8(%R11,%R8,8),%RDX |
(1185) 0x46d722 ADD %RDX,(%RDI,%RCX,8) |
(1185) 0x46d726 INC %R9 |
(1185) 0x46d729 CMP %R9,%RAX |
(1185) 0x46d72c JNE 46d710 |
0x46d72e JMP 46d799 |
0x46d730 MOV -0xb0(%RBP),%RAX |
0x46d737 MOV (%RAX),%RAX |
0x46d73a MOV -0x8(%R14,%RAX,8),%RDI |
0x46d73f MOV -0x80(%RBP),%RCX |
0x46d743 MOV -0x8(%RCX,%RAX,8),%R13 |
0x46d748 MOV -0x138(%RBP),%RAX |
0x46d74f ADD %RDI,(%RAX) |
0x46d752 MOV -0x140(%RBP),%RAX |
0x46d759 ADD %R13,(%RAX) |
0x46d75c MOV $0x8,%ESI |
0x46d761 CALL 59eb80 <hypre_CAlloc> |
0x46d766 MOV -0x48(%RBP),%RCX |
0x46d76a MOV %RAX,(%RCX,%R12,8) |
0x46d76e TEST %R13,%R13 |
0x46d771 JE 46d782 |
0x46d773 MOV $0x8,%ESI |
0x46d778 MOV %R13,%RDI |
0x46d77b CALL 59eb80 <hypre_CAlloc> |
0x46d780 JMP 46d791 |
0x46d782 MOV -0x128(%RBP),%RAX |
0x46d789 CMPQ $0x2,(%RAX) |
0x46d78d JL 46d799 |
0x46d78f XOR %EAX,%EAX |
0x46d791 MOV -0x50(%RBP),%RCX |
0x46d795 MOV %RAX,(%RCX,%R12,8) |
0x46d799 MOV -0xc8(%RBP),%RAX |
0x46d7a0 MOV (%RAX),%ESI |
0x46d7a2 MOV $0x5fceb0,%EDI |
0x46d7a7 CALL 41de10 <__kmpc_barrier@plt> |
0x46d7ac MOV -0x30(%RBP),%RDX |
0x46d7b0 TEST %RDX,%RDX |
0x46d7b3 JLE 46d7dc |
0x46d7b5 MOV -0x8(%R14,%RDX,8),%RAX |
0x46d7ba MOV -0x80(%RBP),%RCX |
0x46d7be MOV -0x8(%RCX,%RDX,8),%RCX |
0x46d7c3 MOV -0x70(%RBP),%RSI |
0x46d7c7 MOV -0xb8(%RBP),%RDX |
0x46d7ce CMP %RDX,-0x88(%RBP) |
0x46d7d5 JL 46d7f8 |
0x46d7d7 JMP 46dc41 |
0x46d7dc XOR %EAX,%EAX |
0x46d7de XOR %ECX,%ECX |
0x46d7e0 MOV -0x70(%RBP),%RSI |
0x46d7e4 MOV -0xb8(%RBP),%RDX |
0x46d7eb CMP %RDX,-0x88(%RBP) |
0x46d7f2 JGE 46dc41 |
0x46d7f8 LEA -0x1(%R12),%R14 |
0x46d7fd MOV %R14,-0x38(%RBP) |
0x46d801 JMP 46d824 |
0x46d803 NOPW %CS:(%RAX,%RAX,1) |
(1177) 0x46d810 MOV -0x70(%RBP),%RSI |
(1177) 0x46d814 INC %RSI |
(1177) 0x46d817 CMP -0xd0(%RBP),%RSI |
(1177) 0x46d81e JGE 46dc41 |
(1177) 0x46d824 MOV -0x90(%RBP),%RDX |
(1177) 0x46d82b MOV %RSI,-0x70(%RBP) |
(1177) 0x46d82f MOV (%RDX,%RSI,8),%RSI |
(1177) 0x46d833 MOV -0xa8(%RBP),%RDX |
(1177) 0x46d83a MOV (%RDX,%RSI,8),%R8 |
(1177) 0x46d83e MOV %RSI,%RDI |
(1177) 0x46d841 NOT %RDI |
(1177) 0x46d844 MOV %RSI,-0x58(%RBP) |
(1177) 0x46d848 JMP 46d85e |
(1180) 0x46d84a MOV -0x38(%RBP),%R14 |
(1180) 0x46d84e XCHG %AX,%AX |
(1180) 0x46d850 INC %R8 |
(1180) 0x46d853 MOV -0xa8(%RBP),%RDX |
(1180) 0x46d85a MOV -0x58(%RBP),%RSI |
(1180) 0x46d85e CMP 0x8(%RDX,%RSI,8),%R8 |
(1180) 0x46d863 JGE 46db50 |
(1180) 0x46d869 MOV -0x118(%RBP),%RDX |
(1180) 0x46d870 MOV (%RDX,%R8,8),%R13 |
(1180) 0x46d874 MOV -0x108(%RBP),%RDX |
(1180) 0x46d87b CMP %R14,(%RDX,%R13,8) |
(1180) 0x46d87f JNE 46d850 |
(1180) 0x46d881 MOV -0x60(%RBP),%RDX |
(1180) 0x46d885 MOV 0x8(%RDX,%R13,8),%R10 |
(1180) 0x46d88a TEST %R10,%R10 |
(1180) 0x46d88d JLE 46d9eb |
(1180) 0x46d893 MOV -0x98(%RBP),%RDX |
(1180) 0x46d89a MOV %R13,-0x78(%RBP) |
(1180) 0x46d89e MOV (%RDX,%R13,8),%R11 |
(1180) 0x46d8a2 ADD %R11,%R10 |
(1180) 0x46d8a5 LEA 0x1(%R11),%RDX |
(1180) 0x46d8a9 CMP %RDX,%R10 |
(1180) 0x46d8ac CMOVLE %RDX,%R10 |
(1180) 0x46d8b0 MOV -0x48(%RBP),%RDX |
(1180) 0x46d8b4 MOV -0x8(%RDX,%R12,8),%RSI |
(1180) 0x46d8b9 MOV %R10,%RDX |
(1180) 0x46d8bc SUB %R11,%RDX |
(1180) 0x46d8bf CMP $0x4,%RDX |
(1180) 0x46d8c3 MOV %RDX,-0x30(%RBP) |
(1180) 0x46d8c7 JAE 46d91b |
(1180) 0x46d8c9 MOV -0x30(%RBP),%R9 |
(1180) 0x46d8cd MOV %R9,%RDX |
(1180) 0x46d8d0 AND $-0x4,%RDX |
(1180) 0x46d8d4 CMP %R9,%RDX |
(1180) 0x46d8d7 JAE 46d9e3 |
(1180) 0x46d8dd ADD %RDX,%R11 |
(1180) 0x46d8e0 MOV -0x38(%RBP),%R14 |
(1180) 0x46d8e4 MOV -0x78(%RBP),%R13 |
(1180) 0x46d8e8 JMP 46d8fc |
0x46d8ea NOPW (%RAX,%RAX,1) |
(1183) 0x46d8f0 INC %R11 |
(1183) 0x46d8f3 CMP %R11,%R10 |
(1183) 0x46d8f6 JE 46d9eb |
(1183) 0x46d8fc MOV (%RSI,%R11,8),%RDX |
(1183) 0x46d900 CMP %RDI,(%RBX,%RDX,8) |
(1183) 0x46d904 JE 46d8f0 |
(1183) 0x46d906 MOV -0x48(%RBP),%R9 |
(1183) 0x46d90a MOV (%R9,%R12,8),%R9 |
(1183) 0x46d90e MOV %RDX,(%R9,%RAX,8) |
(1183) 0x46d912 INC %RAX |
(1183) 0x46d915 MOV %RDI,(%RBX,%RDX,8) |
(1183) 0x46d919 JMP 46d8f0 |
(1180) 0x46d91b SHR $0x2,%RDX |
(1180) 0x46d91f LEA (%RSI,%R11,8),%R13 |
(1180) 0x46d923 ADD $0x18,%R13 |
(1180) 0x46d927 JMP 46d939 |
0x46d929 NOPL (%RAX) |
(1184) 0x46d930 ADD $0x20,%R13 |
(1184) 0x46d934 DEC %RDX |
(1184) 0x46d937 JE 46d8c9 |
(1184) 0x46d939 MOV -0x18(%R13),%R14 |
(1184) 0x46d93d CMP %RDI,(%RBX,%R14,8) |
(1184) 0x46d941 JNE 46d970 |
(1184) 0x46d943 MOV -0x10(%R13),%R14 |
(1184) 0x46d947 CMP %RDI,(%RBX,%R14,8) |
(1184) 0x46d94b JNE 46d98d |
(1184) 0x46d94d MOV -0x8(%R13),%R14 |
(1184) 0x46d951 CMP %RDI,(%RBX,%R14,8) |
(1184) 0x46d955 JNE 46d9aa |
(1184) 0x46d957 MOV (%R13),%R14 |
(1184) 0x46d95b CMP %RDI,(%RBX,%R14,8) |
(1184) 0x46d95f JE 46d930 |
(1184) 0x46d961 JMP 46d9cb |
0x46d963 NOPW %CS:(%RAX,%RAX,1) |
(1184) 0x46d970 MOV -0x48(%RBP),%R9 |
(1184) 0x46d974 MOV (%R9,%R12,8),%R9 |
(1184) 0x46d978 MOV %R14,(%R9,%RAX,8) |
(1184) 0x46d97c INC %RAX |
(1184) 0x46d97f MOV %RDI,(%RBX,%R14,8) |
(1184) 0x46d983 MOV -0x10(%R13),%R14 |
(1184) 0x46d987 CMP %RDI,(%RBX,%R14,8) |
(1184) 0x46d98b JE 46d94d |
(1184) 0x46d98d MOV -0x48(%RBP),%R9 |
(1184) 0x46d991 MOV (%R9,%R12,8),%R9 |
(1184) 0x46d995 MOV %R14,(%R9,%RAX,8) |
(1184) 0x46d999 INC %RAX |
(1184) 0x46d99c MOV %RDI,(%RBX,%R14,8) |
(1184) 0x46d9a0 MOV -0x8(%R13),%R14 |
(1184) 0x46d9a4 CMP %RDI,(%RBX,%R14,8) |
(1184) 0x46d9a8 JE 46d957 |
(1184) 0x46d9aa MOV -0x48(%RBP),%R9 |
(1184) 0x46d9ae MOV (%R9,%R12,8),%R9 |
(1184) 0x46d9b2 MOV %R14,(%R9,%RAX,8) |
(1184) 0x46d9b6 INC %RAX |
(1184) 0x46d9b9 MOV %RDI,(%RBX,%R14,8) |
(1184) 0x46d9bd MOV (%R13),%R14 |
(1184) 0x46d9c1 CMP %RDI,(%RBX,%R14,8) |
(1184) 0x46d9c5 JE 46d930 |
(1184) 0x46d9cb MOV -0x48(%RBP),%R9 |
(1184) 0x46d9cf MOV (%R9,%R12,8),%R9 |
(1184) 0x46d9d3 MOV %R14,(%R9,%RAX,8) |
(1184) 0x46d9d7 INC %RAX |
(1184) 0x46d9da MOV %RDI,(%RBX,%R14,8) |
(1184) 0x46d9de JMP 46d930 |
(1180) 0x46d9e3 MOV -0x38(%RBP),%R14 |
(1180) 0x46d9e7 MOV -0x78(%RBP),%R13 |
(1180) 0x46d9eb MOV -0x68(%RBP),%RDX |
(1180) 0x46d9ef MOV 0x8(%RDX,%R13,8),%R10 |
(1180) 0x46d9f4 TEST %R10,%R10 |
(1180) 0x46d9f7 JLE 46d850 |
(1180) 0x46d9fd MOV -0x40(%RBP),%RDX |
(1180) 0x46da01 MOV (%RDX,%R13,8),%R9 |
(1180) 0x46da05 ADD %R9,%R10 |
(1180) 0x46da08 LEA 0x1(%R9),%RDX |
(1180) 0x46da0c CMP %RDX,%R10 |
(1180) 0x46da0f CMOVLE %RDX,%R10 |
(1180) 0x46da13 MOV -0x50(%RBP),%RDX |
(1180) 0x46da17 MOV -0x8(%RDX,%R12,8),%RSI |
(1180) 0x46da1c MOV %R10,%R11 |
(1180) 0x46da1f SUB %R9,%R11 |
(1180) 0x46da22 CMP $0x4,%R11 |
(1180) 0x46da26 MOV %R11,-0x78(%RBP) |
(1180) 0x46da2a JAE 46da7b |
(1180) 0x46da2c MOV -0x78(%RBP),%RDX |
(1180) 0x46da30 MOV %RDX,%R11 |
(1180) 0x46da33 AND $-0x4,%R11 |
(1180) 0x46da37 CMP %RDX,%R11 |
(1180) 0x46da3a JAE 46d84a |
(1180) 0x46da40 ADD %R11,%R9 |
(1180) 0x46da43 MOV -0x38(%RBP),%R14 |
(1180) 0x46da47 JMP 46da5c |
0x46da49 NOPL (%RAX) |
(1181) 0x46da50 INC %R9 |
(1181) 0x46da53 CMP %R9,%R10 |
(1181) 0x46da56 JE 46d850 |
(1181) 0x46da5c MOV (%RSI,%R9,8),%RDX |
(1181) 0x46da60 CMP %RDI,(%R15,%RDX,8) |
(1181) 0x46da64 JE 46da50 |
(1181) 0x46da66 MOV -0x50(%RBP),%R11 |
(1181) 0x46da6a MOV (%R11,%R12,8),%R11 |
(1181) 0x46da6e MOV %RDX,(%R11,%RCX,8) |
(1181) 0x46da72 INC %RCX |
(1181) 0x46da75 MOV %RDI,(%R15,%RDX,8) |
(1181) 0x46da79 JMP 46da50 |
(1180) 0x46da7b SHR $0x2,%R11 |
(1180) 0x46da7f LEA (%RSI,%R9,8),%R14 |
(1180) 0x46da83 ADD $0x18,%R14 |
(1180) 0x46da87 JMP 46da99 |
0x46da89 NOPL (%RAX) |
(1182) 0x46da90 ADD $0x20,%R14 |
(1182) 0x46da94 DEC %R11 |
(1182) 0x46da97 JE 46da2c |
(1182) 0x46da99 MOV -0x18(%R14),%R13 |
(1182) 0x46da9d CMP %RDI,(%R15,%R13,8) |
(1182) 0x46daa1 JNE 46dad0 |
(1182) 0x46daa3 MOV -0x10(%R14),%R13 |
(1182) 0x46daa7 CMP %RDI,(%R15,%R13,8) |
(1182) 0x46daab JNE 46daed |
(1182) 0x46daad MOV -0x8(%R14),%R13 |
(1182) 0x46dab1 CMP %RDI,(%R15,%R13,8) |
(1182) 0x46dab5 JNE 46db0a |
(1182) 0x46dab7 MOV (%R14),%R13 |
(1182) 0x46daba CMP %RDI,(%R15,%R13,8) |
(1182) 0x46dabe JE 46da90 |
(1182) 0x46dac0 JMP 46db2a |
0x46dac2 NOPW %CS:(%RAX,%RAX,1) |
(1182) 0x46dad0 MOV -0x50(%RBP),%RDX |
(1182) 0x46dad4 MOV (%RDX,%R12,8),%RDX |
(1182) 0x46dad8 MOV %R13,(%RDX,%RCX,8) |
(1182) 0x46dadc INC %RCX |
(1182) 0x46dadf MOV %RDI,(%R15,%R13,8) |
(1182) 0x46dae3 MOV -0x10(%R14),%R13 |
(1182) 0x46dae7 CMP %RDI,(%R15,%R13,8) |
(1182) 0x46daeb JE 46daad |
(1182) 0x46daed MOV -0x50(%RBP),%RDX |
(1182) 0x46daf1 MOV (%RDX,%R12,8),%RDX |
(1182) 0x46daf5 MOV %R13,(%RDX,%RCX,8) |
(1182) 0x46daf9 INC %RCX |
(1182) 0x46dafc MOV %RDI,(%R15,%R13,8) |
(1182) 0x46db00 MOV -0x8(%R14),%R13 |
(1182) 0x46db04 CMP %RDI,(%R15,%R13,8) |
(1182) 0x46db08 JE 46dab7 |
(1182) 0x46db0a MOV -0x50(%RBP),%RDX |
(1182) 0x46db0e MOV (%RDX,%R12,8),%RDX |
(1182) 0x46db12 MOV %R13,(%RDX,%RCX,8) |
(1182) 0x46db16 INC %RCX |
(1182) 0x46db19 MOV %RDI,(%R15,%R13,8) |
(1182) 0x46db1d MOV (%R14),%R13 |
(1182) 0x46db20 CMP %RDI,(%R15,%R13,8) |
(1182) 0x46db24 JE 46da90 |
(1182) 0x46db2a MOV -0x50(%RBP),%RDX |
(1182) 0x46db2e MOV (%RDX,%R12,8),%RDX |
(1182) 0x46db32 MOV %R13,(%RDX,%RCX,8) |
(1182) 0x46db36 INC %RCX |
(1182) 0x46db39 MOV %RDI,(%R15,%R13,8) |
(1182) 0x46db3d JMP 46da90 |
0x46db42 NOPW %CS:(%RAX,%RAX,1) |
(1177) 0x46db50 MOV -0xa0(%RBP),%RDX |
(1177) 0x46db57 MOV -0x58(%RBP),%R8 |
(1177) 0x46db5b MOV (%RDX,%R8,8),%RSI |
(1177) 0x46db5f MOV 0x8(%RDX,%R8,8),%R8 |
(1177) 0x46db64 CMP %R8,%RSI |
(1177) 0x46db67 JL 46db7c |
(1177) 0x46db69 JMP 46d810 |
0x46db6e XCHG %AX,%AX |
(1178) 0x46db70 INC %RSI |
(1178) 0x46db73 CMP %R8,%RSI |
(1178) 0x46db76 JGE 46d810 |
(1178) 0x46db7c MOV -0x120(%RBP),%RDX |
(1178) 0x46db83 MOV (%RDX,%RSI,8),%R9 |
(1178) 0x46db87 MOV -0x110(%RBP),%RDX |
(1178) 0x46db8e CMP %R14,(%RDX,%R9,8) |
(1178) 0x46db92 JNE 46db70 |
(1178) 0x46db94 MOV -0x100(%RBP),%RDX |
(1178) 0x46db9b MOV 0x8(%RDX,%R9,8),%RDX |
(1178) 0x46dba0 TEST %RDX,%RDX |
(1178) 0x46dba3 JLE 46db70 |
(1178) 0x46dba5 MOV -0xf0(%RBP),%R8 |
(1178) 0x46dbac MOV (%R8,%R9,8),%R8 |
(1178) 0x46dbb0 ADD %R8,%RDX |
(1178) 0x46dbb3 MOV -0xf8(%RBP),%R9 |
(1178) 0x46dbba MOV (%R9,%R12,8),%R9 |
(1178) 0x46dbbe LEA 0x1(%R8),%R10 |
(1178) 0x46dbc2 CMP %R10,%RDX |
(1178) 0x46dbc5 CMOVLE %R10,%RDX |
(1178) 0x46dbc9 JMP 46dbd8 |
0x46dbcb NOPL (%RAX,%RAX,1) |
(1179) 0x46dbd0 INC %R8 |
(1179) 0x46dbd3 CMP %R8,%RDX |
(1179) 0x46dbd6 JE 46dc20 |
(1179) 0x46dbd8 MOV (%R9,%R8,8),%R10 |
(1179) 0x46dbdc TEST %R10,%R10 |
(1179) 0x46dbdf JS 46dc00 |
(1179) 0x46dbe1 CMP %RDI,(%R15,%R10,8) |
(1179) 0x46dbe5 JE 46dbd0 |
(1179) 0x46dbe7 MOV -0x50(%RBP),%R11 |
(1179) 0x46dbeb MOV (%R11,%R12,8),%R11 |
(1179) 0x46dbef MOV %R10,(%R11,%RCX,8) |
(1179) 0x46dbf3 INC %RCX |
(1179) 0x46dbf6 MOV %RDI,(%R15,%R10,8) |
(1179) 0x46dbfa JMP 46dbd0 |
0x46dbfc NOPL (%RAX) |
(1179) 0x46dc00 NOT %R10 |
(1179) 0x46dc03 CMP %RDI,(%RBX,%R10,8) |
(1179) 0x46dc07 JE 46dbd0 |
(1179) 0x46dc09 MOV -0x48(%RBP),%R11 |
(1179) 0x46dc0d MOV (%R11,%R12,8),%R11 |
(1179) 0x46dc11 MOV %R10,(%R11,%RAX,8) |
(1179) 0x46dc15 INC %RAX |
(1179) 0x46dc18 MOV %RDI,(%RBX,%R10,8) |
(1179) 0x46dc1c JMP 46dbd0 |
0x46dc1e XCHG %AX,%AX |
(1178) 0x46dc20 MOV -0xa0(%RBP),%RDX |
(1178) 0x46dc27 MOV -0x58(%RBP),%R8 |
(1178) 0x46dc2b MOV 0x8(%RDX,%R8,8),%R8 |
(1178) 0x46dc30 INC %RSI |
(1178) 0x46dc33 CMP %R8,%RSI |
(1178) 0x46dc36 JL 46db7c |
(1177) 0x46dc3c JMP 46d810 |
0x46dc41 MOV %RBX,%RDI |
0x46dc44 CALL 59ec50 <hypre_Free> |
0x46dc49 CMPQ $0,-0xe0(%RBP) |
0x46dc51 JNE 46dc75 |
0x46dc53 MOV -0xc0(%RBP),%RAX |
0x46dc5a CMP -0xe8(%RBP),%RAX |
0x46dc61 JE 46dc75 |
0x46dc63 ADD $0x128,%RSP |
0x46dc6a POP %RBX |
0x46dc6b POP %R12 |
0x46dc6d POP %R13 |
0x46dc6f POP %R14 |
0x46dc71 POP %R15 |
0x46dc73 POP %RBP |
0x46dc74 RET |
0x46dc75 MOV %R15,%RDI |
0x46dc78 ADD $0x128,%RSP |
0x46dc7f POP %RBX |
0x46dc80 POP %R12 |
0x46dc82 POP %R13 |
0x46dc84 POP %R14 |
0x46dc86 POP %R15 |
0x46dc88 POP %RBP |
0x46dc89 JMP 59ec50 |
0x46dc8e XCHG %AX,%AX |
Path / |
Source file and lines | par_multi_interp.c:891-1134 |
Module | exec |
nb instructions | 298 |
nb uops | 285 |
loop length | 1403 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 60 |
micro-operation queue | 47.50 cycles |
front end | 47.50 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 22.50 | 19.75 | 19.75 | 19.50 | 22.50 | 47.00 | 47.00 | 47.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
cycles | 22.50 | 19.75 | 19.75 | 19.50 | 22.50 | 47.00 | 47.00 | 47.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | 13.00-18.00 |
Front-end | 47.50 |
Dispatch | 47.00 |
DIV/SQRT | 13.00-18.00 |
Overall L1 | 47.50 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 9% |
other | 12% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SUB $0x128,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R9,-0x120(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R8,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RCX,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RDX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RDI,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0xd0(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0xc8(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x148(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0xc0(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0xb8(%RBP),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0xb0(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0xa8(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0xa0(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x140(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x98(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x90(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x88(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x80(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x78(%RBP),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x70(%RBP),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x68(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x138(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x60(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x58(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x48(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x40(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x38(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x30(%RBP),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x28(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x20(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x18(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x10(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CALL 5a2400 <hypre_GetThreadNum> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RAX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CALL 5a23f0 <hypre_NumActiveThreads> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
OR %RCX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SHR $0x20,%RAX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
JE 46d004 <hypre_BoomerAMGBuildMultipass.extracted.34+0x164> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %RBX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CQTO | |||||||||||||||||
IDIV %RCX | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
JMP 46d00a <hypre_BoomerAMGBuildMultipass.extracted.34+0x16a> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV %EBX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
DIV %ECX | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 10-17 | 6 |
MOV %RCX,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RCX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
DEC %RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0x30(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA 0x1(%RCX),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RAX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL %RAX,%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
CMP %RDX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMOVE %RBX,%RSI | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSI,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%R12),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%R13,%R12,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 59eb80 <hypre_CAlloc> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
TEST %R15,%R15 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JLE 46d06d <hypre_BoomerAMGBuildMultipass.extracted.34+0x1cd> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
SAL $0x3,%R15 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0xff,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 5aa170 <_intel_fast_memset> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL -0x30(%RBP),%R14 | 1 | 0 | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R14,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0xe8(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %RDI,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RAX,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
JE 46d0a2 <hypre_BoomerAMGBuildMultipass.extracted.34+0x202> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0xe0(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
TEST %RDI,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 46d0cd <hypre_BoomerAMGBuildMultipass.extracted.34+0x22d> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RDI,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 59eb80 <hypre_CAlloc> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RAX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
TEST %R14,%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JLE 46d0cd <hypre_BoomerAMGBuildMultipass.extracted.34+0x22d> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
SAL $0x3,%RDX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0xff,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CALL 5aa170 <_intel_fast_memset> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 46d0cd <hypre_BoomerAMGBuildMultipass.extracted.34+0x22d> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV -0x88(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xd8(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%RCX,%RDX,1),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0xb8(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD %RSI,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RCX,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %RSI,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
JGE 46d52d <hypre_BoomerAMGBuildMultipass.extracted.34+0x68d> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
LEA -0x1(%R12),%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R14,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
JMP 46d127 <hypre_BoomerAMGBuildMultipass.extracted.34+0x287> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
TEST %RDX,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JNE 46d54b <hypre_BoomerAMGBuildMultipass.extracted.34+0x6ab> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0xb0(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x130(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RDI,(%RSI) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0x80(%RBP),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RCX,(%R14,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0x148(%RBP),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%R13,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0xc8(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV $0x5fce70,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CALL 41de10 <__kmpc_barrier@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R14,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R13,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMPQ $0,-0x30(%RBP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV -0xb0(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
JNE 46d5ba <hypre_BoomerAMGBuildMultipass.extracted.34+0x71a> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMPQ $0x2,(%RSI) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JL 46d5ba <hypre_BoomerAMGBuildMultipass.extracted.34+0x71a> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV $0x1,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
MOV -0xc8(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV $0x5fce90,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CALL 41de10 <__kmpc_barrier@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x30(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
TEST %R8,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JLE 46d730 <hypre_BoomerAMGBuildMultipass.extracted.34+0x890> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %RAX,-0x88(%RBP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV -0x40(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x98(%RBP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x80(%RBP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
JGE 46d799 <hypre_BoomerAMGBuildMultipass.extracted.34+0x8f9> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA 0x1(%RDX),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0xd0(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %RCX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMOVLE %RCX,%RAX | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %RDX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP $0x4,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JB 46d6dc <hypre_BoomerAMGBuildMultipass.extracted.34+0x83c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %RCX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SHR $0x2,%RDX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV -0x90(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x70(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%RSI,%RDI,8),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD $0x18,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
MOV %RCX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $-0x4,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %RCX,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0x90(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xd8(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
JAE 46d799 <hypre_BoomerAMGBuildMultipass.extracted.34+0x8f9> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
ADD -0x88(%RBP),%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
ADD %RDX,%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
JMP 46d799 <hypre_BoomerAMGBuildMultipass.extracted.34+0x8f9> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x8(%R14,%RAX,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x80(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x8(%RCX,%RAX,8),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x138(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD %RDI,(%RAX) | 2 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV -0x140(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD %R13,(%RAX) | 2 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CALL 59eb80 <hypre_CAlloc> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x48(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%RCX,%R12,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
TEST %R13,%R13 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 46d782 <hypre_BoomerAMGBuildMultipass.extracted.34+0x8e2> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R13,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 59eb80 <hypre_CAlloc> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 46d791 <hypre_BoomerAMGBuildMultipass.extracted.34+0x8f1> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV -0x128(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMPQ $0x2,(%RAX) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JL 46d799 <hypre_BoomerAMGBuildMultipass.extracted.34+0x8f9> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV -0x50(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%RCX,%R12,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0xc8(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV $0x5fceb0,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CALL 41de10 <__kmpc_barrier@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
TEST %RDX,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JLE 46d7dc <hypre_BoomerAMGBuildMultipass.extracted.34+0x93c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x8(%R14,%RDX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x80(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x8(%RCX,%RDX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x70(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xb8(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %RDX,-0x88(%RBP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JL 46d7f8 <hypre_BoomerAMGBuildMultipass.extracted.34+0x958> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
JMP 46dc41 <hypre_BoomerAMGBuildMultipass.extracted.34+0xda1> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV -0x70(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xb8(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %RDX,-0x88(%RBP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JGE 46dc41 <hypre_BoomerAMGBuildMultipass.extracted.34+0xda1> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
LEA -0x1(%R12),%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R14,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
JMP 46d824 <hypre_BoomerAMGBuildMultipass.extracted.34+0x984> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
XCHG %AX,%AX | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
XCHG %AX,%AX | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 59ec50 <hypre_Free> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0,-0xe0(%RBP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JNE 46dc75 <hypre_BoomerAMGBuildMultipass.extracted.34+0xdd5> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP -0xe8(%RBP),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JE 46dc75 <hypre_BoomerAMGBuildMultipass.extracted.34+0xdd5> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
ADD $0x128,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
RET | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x128,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JMP 59ec50 <hypre_Free> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
XCHG %AX,%AX | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
Source file and lines | par_multi_interp.c:891-1134 |
Module | exec |
nb instructions | 298 |
nb uops | 285 |
loop length | 1403 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 60 |
micro-operation queue | 47.50 cycles |
front end | 47.50 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 22.50 | 19.75 | 19.75 | 19.50 | 22.50 | 47.00 | 47.00 | 47.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
cycles | 22.50 | 19.75 | 19.75 | 19.50 | 22.50 | 47.00 | 47.00 | 47.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | 13.00-18.00 |
Front-end | 47.50 |
Dispatch | 47.00 |
DIV/SQRT | 13.00-18.00 |
Overall L1 | 47.50 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 9% |
other | 12% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SUB $0x128,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R9,-0x120(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R8,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RCX,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RDX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RDI,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0xd0(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0xc8(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x148(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0xc0(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0xb8(%RBP),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0xb0(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0xa8(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0xa0(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x140(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x98(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x90(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x88(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x80(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x78(%RBP),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x70(%RBP),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x68(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x138(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x60(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x58(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x48(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x40(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x38(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x30(%RBP),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x28(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x20(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x18(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x10(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CALL 5a2400 <hypre_GetThreadNum> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RAX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CALL 5a23f0 <hypre_NumActiveThreads> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
OR %RCX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SHR $0x20,%RAX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
JE 46d004 <hypre_BoomerAMGBuildMultipass.extracted.34+0x164> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %RBX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CQTO | |||||||||||||||||
IDIV %RCX | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
JMP 46d00a <hypre_BoomerAMGBuildMultipass.extracted.34+0x16a> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV %EBX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
DIV %ECX | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 10-17 | 6 |
MOV %RCX,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RCX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
DEC %RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0x30(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA 0x1(%RCX),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RAX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL %RAX,%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
CMP %RDX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMOVE %RBX,%RSI | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSI,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%R12),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%R13,%R12,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 59eb80 <hypre_CAlloc> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
TEST %R15,%R15 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JLE 46d06d <hypre_BoomerAMGBuildMultipass.extracted.34+0x1cd> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
SAL $0x3,%R15 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0xff,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 5aa170 <_intel_fast_memset> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL -0x30(%RBP),%R14 | 1 | 0 | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R14,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0xe8(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %RDI,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RAX,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
JE 46d0a2 <hypre_BoomerAMGBuildMultipass.extracted.34+0x202> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0xe0(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
TEST %RDI,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 46d0cd <hypre_BoomerAMGBuildMultipass.extracted.34+0x22d> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RDI,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 59eb80 <hypre_CAlloc> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RAX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
TEST %R14,%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JLE 46d0cd <hypre_BoomerAMGBuildMultipass.extracted.34+0x22d> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
SAL $0x3,%RDX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0xff,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CALL 5aa170 <_intel_fast_memset> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 46d0cd <hypre_BoomerAMGBuildMultipass.extracted.34+0x22d> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV -0x88(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xd8(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%RCX,%RDX,1),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0xb8(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD %RSI,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RCX,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %RSI,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
JGE 46d52d <hypre_BoomerAMGBuildMultipass.extracted.34+0x68d> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
LEA -0x1(%R12),%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R14,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
JMP 46d127 <hypre_BoomerAMGBuildMultipass.extracted.34+0x287> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
TEST %RDX,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JNE 46d54b <hypre_BoomerAMGBuildMultipass.extracted.34+0x6ab> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0xb0(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x130(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RDI,(%RSI) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0x80(%RBP),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RCX,(%R14,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0x148(%RBP),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%R13,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0xc8(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV $0x5fce70,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CALL 41de10 <__kmpc_barrier@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R14,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R13,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMPQ $0,-0x30(%RBP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV -0xb0(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
JNE 46d5ba <hypre_BoomerAMGBuildMultipass.extracted.34+0x71a> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMPQ $0x2,(%RSI) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JL 46d5ba <hypre_BoomerAMGBuildMultipass.extracted.34+0x71a> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV $0x1,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
MOV -0xc8(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV $0x5fce90,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CALL 41de10 <__kmpc_barrier@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x30(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
TEST %R8,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JLE 46d730 <hypre_BoomerAMGBuildMultipass.extracted.34+0x890> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %RAX,-0x88(%RBP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV -0x40(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x98(%RBP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x80(%RBP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
JGE 46d799 <hypre_BoomerAMGBuildMultipass.extracted.34+0x8f9> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA 0x1(%RDX),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0xd0(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %RCX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMOVLE %RCX,%RAX | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %RDX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP $0x4,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JB 46d6dc <hypre_BoomerAMGBuildMultipass.extracted.34+0x83c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %RCX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SHR $0x2,%RDX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV -0x90(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x70(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%RSI,%RDI,8),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD $0x18,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
MOV %RCX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $-0x4,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %RCX,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0x90(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xd8(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
JAE 46d799 <hypre_BoomerAMGBuildMultipass.extracted.34+0x8f9> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
ADD -0x88(%RBP),%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
ADD %RDX,%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
JMP 46d799 <hypre_BoomerAMGBuildMultipass.extracted.34+0x8f9> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x8(%R14,%RAX,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x80(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x8(%RCX,%RAX,8),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x138(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD %RDI,(%RAX) | 2 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV -0x140(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD %R13,(%RAX) | 2 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CALL 59eb80 <hypre_CAlloc> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x48(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%RCX,%R12,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
TEST %R13,%R13 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 46d782 <hypre_BoomerAMGBuildMultipass.extracted.34+0x8e2> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R13,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 59eb80 <hypre_CAlloc> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 46d791 <hypre_BoomerAMGBuildMultipass.extracted.34+0x8f1> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV -0x128(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMPQ $0x2,(%RAX) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JL 46d799 <hypre_BoomerAMGBuildMultipass.extracted.34+0x8f9> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV -0x50(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,(%RCX,%R12,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0xc8(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV $0x5fceb0,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CALL 41de10 <__kmpc_barrier@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
TEST %RDX,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JLE 46d7dc <hypre_BoomerAMGBuildMultipass.extracted.34+0x93c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x8(%R14,%RDX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x80(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x8(%RCX,%RDX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x70(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xb8(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %RDX,-0x88(%RBP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JL 46d7f8 <hypre_BoomerAMGBuildMultipass.extracted.34+0x958> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
JMP 46dc41 <hypre_BoomerAMGBuildMultipass.extracted.34+0xda1> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV -0x70(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xb8(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %RDX,-0x88(%RBP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JGE 46dc41 <hypre_BoomerAMGBuildMultipass.extracted.34+0xda1> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
LEA -0x1(%R12),%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R14,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
JMP 46d824 <hypre_BoomerAMGBuildMultipass.extracted.34+0x984> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
XCHG %AX,%AX | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
XCHG %AX,%AX | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 59ec50 <hypre_Free> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0,-0xe0(%RBP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JNE 46dc75 <hypre_BoomerAMGBuildMultipass.extracted.34+0xdd5> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP -0xe8(%RBP),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JE 46dc75 <hypre_BoomerAMGBuildMultipass.extracted.34+0xdd5> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
ADD $0x128,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
RET | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x128,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JMP 59ec50 <hypre_Free> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
XCHG %AX,%AX | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼hypre_BoomerAMGBuildMultipass.extracted.34– | 1.55 | 0.27 |
▼Loop 1188 - par_multi_interp.c:917-997 - exec– | 0.07 | 0.01 |
▼Loop 1191 - par_multi_interp.c:917-970 - exec– | 0.51 | 0.07 |
○Loop 1194 - par_multi_interp.c:951-958 - exec | 0.17 | 0.03 |
○Loop 1195 - par_multi_interp.c:951-958 - exec | 0 | 0 |
○Loop 1193 - par_multi_interp.c:963-970 - exec | 0 | 0 |
○Loop 1192 - par_multi_interp.c:963-970 - exec | 0 | 0 |
▼Loop 1189 - par_multi_interp.c:976-997 - exec– | 0 | 0 |
○Loop 1190 - par_multi_interp.c:983-997 - exec | 0 | 0 |
○Loop 1186 - par_multi_interp.c:1030-1034 - exec | 0.07 | 0.01 |
▼Loop 1177 - par_multi_interp.c:917-1125 - exec– | 0.06 | 0.01 |
▼Loop 1180 - par_multi_interp.c:917-1099 - exec– | 0.5 | 0.07 |
○Loop 1183 - par_multi_interp.c:1082-1088 - exec | 0.17 | 0.03 |
○Loop 1184 - par_multi_interp.c:1082-1088 - exec | 0 | 0 |
○Loop 1181 - par_multi_interp.c:1093-1099 - exec | 0 | 0 |
○Loop 1182 - par_multi_interp.c:1093-1099 - exec | 0 | 0 |
▼Loop 1178 - par_multi_interp.c:1104-1125 - exec– | 0 | 0 |
○Loop 1179 - par_multi_interp.c:1111-1125 - exec | 0 | 0 |
○Loop 1185 - par_multi_interp.c:1030-1034 - exec | 0 | 0 |
○Loop 1187 - par_multi_interp.c:1017-1020 - exec | 0 | 0 |