Loop Id: 1157 | Module: exec | Source: par_multi_interp.c:1747-1876 [...] | Coverage: 0.2% |
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Loop Id: 1157 | Module: exec | Source: par_multi_interp.c:1747-1876 [...] | Coverage: 0.2% |
---|
0x46c0e8 MOV -0xa8(%RBP),%RDX |
0x46c0ef INC %RDX |
0x46c0f2 CMP -0x78(%RBP),%RDX |
0x46c0f6 JGE 46ccfc |
0x46c0fc MOV -0x130(%RBP),%RAX |
0x46c103 MOV %RDX,-0xa8(%RBP) |
0x46c10a MOV (%RAX,%RDX,8),%R9 |
0x46c10e MOV -0x138(%RBP),%RAX |
0x46c115 MOV (%RAX,%R9,8),%R15 |
0x46c119 MOV -0xb8(%RBP),%RAX |
0x46c120 MOV (%RAX,%R9,8),%R12 |
0x46c124 MOV 0x8(%RAX,%R9,8),%RSI |
0x46c129 LEA (%RSI,%R15,1),%RAX |
0x46c12d SUB %R12,%RAX |
0x46c130 CMP %RAX,%R15 |
0x46c133 MOV %R9,-0x38(%RBP) |
0x46c137 JGE 46c30f |
0x46c13d MOV -0x58(%RBP),%RAX |
0x46c141 MOV (%RAX),%RCX |
0x46c144 MOV %RSI,%RAX |
0x46c147 SUB %R12,%RAX |
0x46c14a CMP $0xd,%RAX |
0x46c14e JB 46c2d0 |
0x46c154 MOV %RSI,-0xa0(%RBP) |
0x46c15b MOVAPD %XMM6,-0x90(%RBP) |
0x46c163 LEA (%R14,%R12,8),%RDI |
0x46c167 LEA (,%RAX,8),%RDX |
0x46c16f XOR %ESI,%ESI |
0x46c171 MOV %RAX,-0x60(%RBP) |
0x46c175 MOV %RCX,-0x98(%RBP) |
0x46c17c CALL 5aa170 <_intel_fast_memset> |
0x46c181 MOV -0xc8(%RBP),%RAX |
0x46c188 MOV -0x98(%RBP),%RCX |
0x46c18f MOV (%RAX,%RCX,8),%RAX |
0x46c193 MOV -0x60(%RBP),%RCX |
0x46c197 SHR $0x3,%RCX |
0x46c19b LEA (%RAX,%R15,8),%RDX |
0x46c19f ADD $0x38,%RDX |
0x46c1a3 MOV -0x118(%RBP),%RSI |
0x46c1aa LEA (%RSI,%R12,8),%RSI |
0x46c1ae MOV %RCX,%RDI |
0x46c1b1 XOR %R8D,%R8D |
0x46c1b4 MOV -0x40(%RBP),%R11 |
0x46c1b8 NOPL (%RAX,%RAX,1) |
(1173) 0x46c1c0 MOV -0x38(%RDX,%R8,8),%R9 |
(1173) 0x46c1c5 LEA (%R12,%R8,1),%R10 |
(1173) 0x46c1c9 MOV %R10,(%R11,%R9,8) |
(1173) 0x46c1cd MOV %R9,-0x38(%RSI,%R8,8) |
(1173) 0x46c1d2 MOV -0x30(%RDX,%R8,8),%R9 |
(1173) 0x46c1d7 LEA 0x1(%R12,%R8,1),%R10 |
(1173) 0x46c1dc MOV %R10,(%R11,%R9,8) |
(1173) 0x46c1e0 MOV %R9,-0x30(%RSI,%R8,8) |
(1173) 0x46c1e5 MOV -0x28(%RDX,%R8,8),%R9 |
(1173) 0x46c1ea LEA 0x2(%R12,%R8,1),%R10 |
(1173) 0x46c1ef MOV %R10,(%R11,%R9,8) |
(1173) 0x46c1f3 MOV %R9,-0x28(%RSI,%R8,8) |
(1173) 0x46c1f8 MOV -0x20(%RDX,%R8,8),%R9 |
(1173) 0x46c1fd LEA 0x3(%R12,%R8,1),%R10 |
(1173) 0x46c202 MOV %R10,(%R11,%R9,8) |
(1173) 0x46c206 MOV %R9,-0x20(%RSI,%R8,8) |
(1173) 0x46c20b MOV -0x18(%RDX,%R8,8),%R9 |
(1173) 0x46c210 LEA 0x4(%R12,%R8,1),%R10 |
(1173) 0x46c215 MOV %R10,(%R11,%R9,8) |
(1173) 0x46c219 MOV %R9,-0x18(%RSI,%R8,8) |
(1173) 0x46c21e MOV -0x10(%RDX,%R8,8),%R9 |
(1173) 0x46c223 LEA 0x5(%R12,%R8,1),%R10 |
(1173) 0x46c228 MOV %R10,(%R11,%R9,8) |
(1173) 0x46c22c MOV %R9,-0x10(%RSI,%R8,8) |
(1173) 0x46c231 MOV -0x8(%RDX,%R8,8),%R9 |
(1173) 0x46c236 LEA 0x6(%R12,%R8,1),%R10 |
(1173) 0x46c23b MOV %R10,(%R11,%R9,8) |
(1173) 0x46c23f MOV %R9,-0x8(%RSI,%R8,8) |
(1173) 0x46c244 MOV (%RDX,%R8,8),%R9 |
(1173) 0x46c248 LEA (%R12,%R8,1),%R10 |
(1173) 0x46c24c ADD $0x7,%R10 |
(1173) 0x46c250 MOV %R10,(%R11,%R9,8) |
(1173) 0x46c254 MOV %R9,(%RSI,%R8,8) |
(1173) 0x46c258 ADD $0x8,%R8 |
(1173) 0x46c25c DEC %RDI |
(1173) 0x46c25f JNE 46c1c0 |
0x46c265 MOV -0x60(%RBP),%RSI |
0x46c269 MOV %RSI,%RDX |
0x46c26c AND $-0x8,%RDX |
0x46c270 CMP %RSI,%RDX |
0x46c273 MOV -0x30(%RBP),%R10 |
0x46c277 MOV -0x48(%RBP),%RSI |
0x46c27b XORPD %XMM5,%XMM5 |
0x46c27f MOVAPD -0x90(%RBP),%XMM6 |
0x46c287 MOV -0x38(%RBP),%R9 |
0x46c28b MOV -0xa0(%RBP),%R8 |
0x46c292 JAE 46c30f |
0x46c294 MOV %R11,%RDI |
0x46c297 ADD %RDX,%R12 |
0x46c29a SAL $0x6,%RCX |
0x46c29e LEA (%RCX,%R15,8),%RCX |
0x46c2a2 ADD %RCX,%RAX |
0x46c2a5 NOPW %CS:(%RAX,%RAX,1) |
(1174) 0x46c2b0 MOV (%RAX),%RCX |
(1174) 0x46c2b3 MOV %R12,(%RDI,%RCX,8) |
(1174) 0x46c2b7 MOV %RCX,(%RSI,%R12,8) |
(1174) 0x46c2bb INC %R12 |
(1174) 0x46c2be ADD $0x8,%RAX |
(1174) 0x46c2c2 CMP %R12,%R8 |
(1174) 0x46c2c5 JNE 46c2b0 |
0x46c2c7 JMP 46c30f |
0x46c2d0 SAL $0x3,%R15 |
0x46c2d4 MOV -0xc8(%RBP),%RAX |
0x46c2db ADD (%RAX,%RCX,8),%R15 |
0x46c2df MOV -0x48(%RBP),%RCX |
0x46c2e3 MOV -0x40(%RBP),%RDX |
0x46c2e7 NOPW (%RAX,%RAX,1) |
(1172) 0x46c2f0 MOV (%R15),%RAX |
(1172) 0x46c2f3 MOV %R12,(%RDX,%RAX,8) |
(1172) 0x46c2f7 MOVQ $0,(%R14,%R12,8) |
(1172) 0x46c2ff MOV %RAX,(%RCX,%R12,8) |
(1172) 0x46c303 INC %R12 |
(1172) 0x46c306 ADD $0x8,%R15 |
(1172) 0x46c30a CMP %R12,%RSI |
(1172) 0x46c30d JNE 46c2f0 |
0x46c30f MOV -0x140(%RBP),%RAX |
0x46c316 MOV (%RAX,%R9,8),%R15 |
0x46c31a MOV -0xc0(%RBP),%RAX |
0x46c321 MOV (%RAX,%R9,8),%R12 |
0x46c325 MOV 0x8(%RAX,%R9,8),%RCX |
0x46c32a LEA (%RCX,%R15,1),%RAX |
0x46c32e SUB %R12,%RAX |
0x46c331 CMP %RAX,%R15 |
0x46c334 MOV -0x50(%RBP),%R11 |
0x46c338 JGE 46c500 |
0x46c33e MOV -0x58(%RBP),%RAX |
0x46c342 MOV (%RAX),%RDX |
0x46c345 MOV %RCX,%RAX |
0x46c348 SUB %R12,%RAX |
0x46c34b CMP $0xd,%RAX |
0x46c34f JB 46c4c0 |
0x46c355 MOV %RCX,-0xa0(%RBP) |
0x46c35c MOVAPD %XMM6,-0x90(%RBP) |
0x46c364 LEA (,%R12,8),%RDI |
0x46c36c ADD %R13,%RDI |
0x46c36f MOV %RDX,-0x98(%RBP) |
0x46c376 LEA (,%RAX,8),%RDX |
0x46c37e XOR %ESI,%ESI |
0x46c380 MOV %RAX,-0x60(%RBP) |
0x46c384 CALL 5aa170 <_intel_fast_memset> |
0x46c389 MOV -0xd0(%RBP),%RAX |
0x46c390 MOV -0x98(%RBP),%RCX |
0x46c397 MOV (%RAX,%RCX,8),%RAX |
0x46c39b MOV -0x60(%RBP),%RCX |
0x46c39f SHR $0x3,%RCX |
0x46c3a3 LEA (%RAX,%R15,8),%RDX |
0x46c3a7 ADD $0x38,%RDX |
0x46c3ab MOV -0x110(%RBP),%RSI |
0x46c3b2 LEA (%RSI,%R12,8),%RSI |
0x46c3b6 MOV %RCX,%RDI |
0x46c3b9 XOR %R8D,%R8D |
0x46c3bc MOV -0x50(%RBP),%R11 |
(1170) 0x46c3c0 MOV -0x38(%RDX,%R8,8),%R9 |
(1170) 0x46c3c5 LEA (%R12,%R8,1),%R10 |
(1170) 0x46c3c9 MOV %R10,(%R11,%R9,8) |
(1170) 0x46c3cd MOV %R9,-0x38(%RSI,%R8,8) |
(1170) 0x46c3d2 MOV -0x30(%RDX,%R8,8),%R9 |
(1170) 0x46c3d7 LEA 0x1(%R12,%R8,1),%R10 |
(1170) 0x46c3dc MOV %R10,(%R11,%R9,8) |
(1170) 0x46c3e0 MOV %R9,-0x30(%RSI,%R8,8) |
(1170) 0x46c3e5 MOV -0x28(%RDX,%R8,8),%R9 |
(1170) 0x46c3ea LEA 0x2(%R12,%R8,1),%R10 |
(1170) 0x46c3ef MOV %R10,(%R11,%R9,8) |
(1170) 0x46c3f3 MOV %R9,-0x28(%RSI,%R8,8) |
(1170) 0x46c3f8 MOV -0x20(%RDX,%R8,8),%R9 |
(1170) 0x46c3fd LEA 0x3(%R12,%R8,1),%R10 |
(1170) 0x46c402 MOV %R10,(%R11,%R9,8) |
(1170) 0x46c406 MOV %R9,-0x20(%RSI,%R8,8) |
(1170) 0x46c40b MOV -0x18(%RDX,%R8,8),%R9 |
(1170) 0x46c410 LEA 0x4(%R12,%R8,1),%R10 |
(1170) 0x46c415 MOV %R10,(%R11,%R9,8) |
(1170) 0x46c419 MOV %R9,-0x18(%RSI,%R8,8) |
(1170) 0x46c41e MOV -0x10(%RDX,%R8,8),%R9 |
(1170) 0x46c423 LEA 0x5(%R12,%R8,1),%R10 |
(1170) 0x46c428 MOV %R10,(%R11,%R9,8) |
(1170) 0x46c42c MOV %R9,-0x10(%RSI,%R8,8) |
(1170) 0x46c431 MOV -0x8(%RDX,%R8,8),%R9 |
(1170) 0x46c436 LEA 0x6(%R12,%R8,1),%R10 |
(1170) 0x46c43b MOV %R10,(%R11,%R9,8) |
(1170) 0x46c43f MOV %R9,-0x8(%RSI,%R8,8) |
(1170) 0x46c444 MOV (%RDX,%R8,8),%R9 |
(1170) 0x46c448 LEA (%R12,%R8,1),%R10 |
(1170) 0x46c44c ADD $0x7,%R10 |
(1170) 0x46c450 MOV %R10,(%R11,%R9,8) |
(1170) 0x46c454 MOV %R9,(%RSI,%R8,8) |
(1170) 0x46c458 ADD $0x8,%R8 |
(1170) 0x46c45c DEC %RDI |
(1170) 0x46c45f JNE 46c3c0 |
0x46c465 MOV -0x60(%RBP),%RSI |
0x46c469 MOV %RSI,%RDX |
0x46c46c AND $-0x8,%RDX |
0x46c470 CMP %RSI,%RDX |
0x46c473 MOV -0x30(%RBP),%R10 |
0x46c477 XORPD %XMM5,%XMM5 |
0x46c47b MOVAPD -0x90(%RBP),%XMM6 |
0x46c483 MOV -0x38(%RBP),%R9 |
0x46c487 MOV -0xa0(%RBP),%RSI |
0x46c48e JAE 46c500 |
0x46c490 ADD %RDX,%R12 |
0x46c493 SAL $0x6,%RCX |
0x46c497 LEA (%RCX,%R15,8),%RCX |
0x46c49b ADD %RCX,%RAX |
0x46c49e XCHG %AX,%AX |
(1171) 0x46c4a0 MOV (%RAX),%RCX |
(1171) 0x46c4a3 MOV %R12,(%R11,%RCX,8) |
(1171) 0x46c4a7 MOV %RCX,(%R10,%R12,8) |
(1171) 0x46c4ab INC %R12 |
(1171) 0x46c4ae ADD $0x8,%RAX |
(1171) 0x46c4b2 CMP %R12,%RSI |
(1171) 0x46c4b5 JNE 46c4a0 |
0x46c4b7 JMP 46c500 |
0x46c4c0 SAL $0x3,%R15 |
0x46c4c4 MOV -0xd0(%RBP),%RAX |
0x46c4cb ADD (%RAX,%RDX,8),%R15 |
0x46c4cf MOV -0x50(%RBP),%R11 |
0x46c4d3 NOPW %CS:(%RAX,%RAX,1) |
(1169) 0x46c4e0 MOV (%R15),%RAX |
(1169) 0x46c4e3 MOV %R12,(%R11,%RAX,8) |
(1169) 0x46c4e7 MOVQ $0,(%R13,%R12,8) |
(1169) 0x46c4f0 MOV %RAX,(%R10,%R12,8) |
(1169) 0x46c4f4 INC %R12 |
(1169) 0x46c4f7 ADD $0x8,%R15 |
(1169) 0x46c4fb CMP %R12,%RCX |
(1169) 0x46c4fe JNE 46c4e0 |
0x46c500 MOV -0xe8(%RBP),%RCX |
0x46c507 MOV (%RCX,%R9,8),%RAX |
0x46c50b MOV 0x8(%RCX,%R9,8),%RCX |
0x46c510 CMP %RCX,%RAX |
0x46c513 MOV -0xb0(%RBP),%R15 |
0x46c51a MOV %R11,%R12 |
0x46c51d JGE 46c570 |
0x46c51f MOV -0x58(%RBP),%RDX |
0x46c523 MOV (%RDX),%RDX |
0x46c526 DEC %RDX |
0x46c529 JMP 46c538 |
(1168) 0x46c530 INC %RAX |
(1168) 0x46c533 CMP %RCX,%RAX |
(1168) 0x46c536 JGE 46c570 |
(1168) 0x46c538 MOV -0x190(%RBP),%RSI |
(1168) 0x46c53f MOV (%RSI,%RAX,8),%RSI |
(1168) 0x46c543 MOV -0x1a0(%RBP),%RDI |
(1168) 0x46c54a CMP %RDX,(%RDI,%RSI,8) |
(1168) 0x46c54e JNE 46c530 |
(1168) 0x46c550 MOV -0x70(%RBP),%RCX |
(1168) 0x46c554 MOV %R9,(%RCX,%RSI,8) |
(1168) 0x46c558 MOV -0xe8(%RBP),%RCX |
(1168) 0x46c55f MOV 0x8(%RCX,%R9,8),%RCX |
(1168) 0x46c564 JMP 46c530 |
0x46c570 MOV -0xf0(%RBP),%RCX |
0x46c577 MOV (%RCX,%R9,8),%RAX |
0x46c57b MOV 0x8(%RCX,%R9,8),%RCX |
0x46c580 CMP %RCX,%RAX |
0x46c583 JGE 46c5e0 |
0x46c585 MOV -0x58(%RBP),%RDX |
0x46c589 MOV (%RDX),%RDX |
0x46c58c DEC %RDX |
0x46c58f JMP 46c5a8 |
(1167) 0x46c5a0 INC %RAX |
(1167) 0x46c5a3 CMP %RCX,%RAX |
(1167) 0x46c5a6 JGE 46c5e0 |
(1167) 0x46c5a8 MOV -0x198(%RBP),%RSI |
(1167) 0x46c5af MOV (%RSI,%RAX,8),%RSI |
(1167) 0x46c5b3 MOV -0x1a8(%RBP),%RDI |
(1167) 0x46c5ba CMP %RDX,(%RDI,%RSI,8) |
(1167) 0x46c5be JNE 46c5a0 |
(1167) 0x46c5c0 MOV -0x68(%RBP),%RCX |
(1167) 0x46c5c4 MOV %R9,(%RCX,%RSI,8) |
(1167) 0x46c5c8 MOV -0xf0(%RBP),%RCX |
(1167) 0x46c5cf MOV 0x8(%RCX,%R9,8),%RCX |
(1167) 0x46c5d4 JMP 46c5a0 |
0x46c5e0 MOV -0x120(%RBP),%RAX |
0x46c5e7 MOV (%RAX,%R9,8),%RSI |
0x46c5eb MOV 0x8(%RAX,%R9,8),%RCX |
0x46c5f0 LEA 0x1(%RSI),%RDX |
0x46c5f4 XORPD %XMM0,%XMM0 |
0x46c5f8 CMP %RCX,%RDX |
0x46c5fb MOV %RSI,-0x90(%RBP) |
0x46c602 JGE 46c960 |
0x46c608 MOV -0x48(%RBP),%RAX |
0x46c60c JMP 46c62c |
(1162) 0x46c60e MOVAPD %XMM0,%XMM1 |
(1162) 0x46c612 UNPCKHPD %XMM0,%XMM1 |
(1162) 0x46c616 ADDSD (%RBX,%RDX,8),%XMM1 |
(1162) 0x46c61b UNPCKLPD %XMM1,%XMM0 |
(1162) 0x46c61f NOP |
(1162) 0x46c620 INC %RDX |
(1162) 0x46c623 CMP %RCX,%RDX |
(1162) 0x46c626 JE 46c960 |
(1162) 0x46c62c MOV -0x180(%RBP),%RSI |
(1162) 0x46c633 MOV (%RSI,%RDX,8),%RSI |
(1162) 0x46c637 MOV -0x70(%RBP),%RDI |
(1162) 0x46c63b CMP %R9,(%RDI,%RSI,8) |
(1162) 0x46c63f JNE 46c670 |
(1162) 0x46c641 MOV -0xb8(%RBP),%R8 |
(1162) 0x46c648 MOV (%R8,%RSI,8),%RDI |
(1162) 0x46c64c MOV 0x8(%R8,%RSI,8),%R8 |
(1162) 0x46c651 MOV %R8,%R9 |
(1162) 0x46c654 SUB %RDI,%R9 |
(1162) 0x46c657 JLE 46c7e4 |
(1162) 0x46c65d CMP $0x4,%R9 |
(1162) 0x46c661 JAE 46c69e |
(1162) 0x46c663 JMP 46c773 |
(1162) 0x46c670 MOV -0x168(%RBP),%RDI |
(1162) 0x46c677 CMPQ $-0x3,(%RDI,%RSI,8) |
(1162) 0x46c67c JE 46c620 |
(1162) 0x46c67e CMPQ $0x1,-0xf8(%RBP) |
(1162) 0x46c686 JE 46c60e |
(1162) 0x46c688 MOV -0xd8(%RBP),%R8 |
(1162) 0x46c68f MOV (%R8,%R9,8),%RDI |
(1162) 0x46c693 CMP (%R8,%RSI,8),%RDI |
(1162) 0x46c697 JNE 46c620 |
(1162) 0x46c699 JMP 46c60e |
(1162) 0x46c69e MOV %R9,%R10 |
(1162) 0x46c6a1 SHR $0x2,%R10 |
(1162) 0x46c6a5 LEA 0x18(,%RDI,8),%R11 |
(1162) 0x46c6ad MOV -0x40(%RBP),%R12 |
(1162) 0x46c6b1 NOPW %CS:(%RAX,%RAX,1) |
(1165) 0x46c6c0 MOVSD -0x18(%R14,%R11,1),%XMM1 |
(1165) 0x46c6c7 MULSD (%RBX,%RDX,8),%XMM1 |
(1165) 0x46c6cc MOV -0x18(%RAX,%R11,1),%R15 |
(1165) 0x46c6d1 MOV (%R12,%R15,8),%R15 |
(1165) 0x46c6d5 MOVSD (%R14,%R15,8),%XMM2 |
(1165) 0x46c6db ADDSD %XMM1,%XMM2 |
(1165) 0x46c6df MOVSD %XMM2,(%R14,%R15,8) |
(1165) 0x46c6e5 MOVSD -0x10(%R14,%R11,1),%XMM2 |
(1165) 0x46c6ec MULSD (%RBX,%RDX,8),%XMM2 |
(1165) 0x46c6f1 MOV -0x10(%RAX,%R11,1),%R15 |
(1165) 0x46c6f6 MOV (%R12,%R15,8),%R15 |
(1165) 0x46c6fa MOVSD (%R14,%R15,8),%XMM3 |
(1165) 0x46c700 ADDSD %XMM2,%XMM3 |
(1165) 0x46c704 MOVSD %XMM3,(%R14,%R15,8) |
(1165) 0x46c70a MOVSD -0x8(%R14,%R11,1),%XMM3 |
(1165) 0x46c711 MULSD (%RBX,%RDX,8),%XMM3 |
(1165) 0x46c716 MOV -0x8(%RAX,%R11,1),%R15 |
(1165) 0x46c71b MOV (%R12,%R15,8),%R15 |
(1165) 0x46c71f MOVSD (%R14,%R15,8),%XMM4 |
(1165) 0x46c725 ADDSD %XMM3,%XMM4 |
(1165) 0x46c729 MOVSD %XMM4,(%R14,%R15,8) |
(1165) 0x46c72f MOVSD (%R14,%R11,1),%XMM6 |
(1165) 0x46c735 MULSD (%RBX,%RDX,8),%XMM6 |
(1165) 0x46c73a MOV (%RAX,%R11,1),%R15 |
(1165) 0x46c73e MOV (%R12,%R15,8),%R15 |
(1165) 0x46c742 MOVSD (%R14,%R15,8),%XMM4 |
(1165) 0x46c748 ADDSD %XMM6,%XMM4 |
(1165) 0x46c74c MOVSD %XMM4,(%R14,%R15,8) |
(1165) 0x46c752 ADDSD %XMM6,%XMM3 |
(1165) 0x46c756 ADDSD %XMM1,%XMM2 |
(1165) 0x46c75a ADDSD %XMM3,%XMM2 |
(1165) 0x46c75e UNPCKLPD %XMM2,%XMM2 |
(1165) 0x46c762 ADDPD %XMM2,%XMM0 |
(1165) 0x46c766 ADD $0x20,%R11 |
(1165) 0x46c76a DEC %R10 |
(1165) 0x46c76d JNE 46c6c0 |
(1162) 0x46c773 MOV %R9,%R10 |
(1162) 0x46c776 AND $-0x4,%R10 |
(1162) 0x46c77a CMP %R9,%R10 |
(1162) 0x46c77d JAE 46c7d9 |
(1162) 0x46c77f ADD %R10,%RDI |
(1162) 0x46c782 MOV -0xb0(%RBP),%R15 |
(1162) 0x46c789 MOV -0x30(%RBP),%R10 |
(1162) 0x46c78d MOV -0x40(%RBP),%R12 |
(1162) 0x46c791 NOPW %CS:(%RAX,%RAX,1) |
(1166) 0x46c7a0 MOV (%RAX,%RDI,8),%R9 |
(1166) 0x46c7a4 MOVSD (%R14,%RDI,8),%XMM6 |
(1166) 0x46c7aa MULSD (%RBX,%RDX,8),%XMM6 |
(1166) 0x46c7af MOV (%R12,%R9,8),%R9 |
(1166) 0x46c7b3 MOVSD (%R14,%R9,8),%XMM1 |
(1166) 0x46c7b9 ADDSD %XMM6,%XMM1 |
(1166) 0x46c7bd MOVSD %XMM1,(%R14,%R9,8) |
(1166) 0x46c7c3 MOVAPD %XMM6,%XMM1 |
(1166) 0x46c7c7 UNPCKLPD %XMM6,%XMM1 |
(1166) 0x46c7cb ADDPD %XMM1,%XMM0 |
(1166) 0x46c7cf INC %RDI |
(1166) 0x46c7d2 CMP %RDI,%R8 |
(1166) 0x46c7d5 JNE 46c7a0 |
(1162) 0x46c7d7 JMP 46c7e4 |
(1162) 0x46c7d9 MOV -0xb0(%RBP),%R15 |
(1162) 0x46c7e0 MOV -0x30(%RBP),%R10 |
(1162) 0x46c7e4 MOV -0xc0(%RBP),%RAX |
(1162) 0x46c7eb MOV (%RAX,%RSI,8),%RDI |
(1162) 0x46c7ef MOV 0x8(%RAX,%RSI,8),%RSI |
(1162) 0x46c7f4 MOV %RSI,%R8 |
(1162) 0x46c7f7 SUB %RDI,%R8 |
(1162) 0x46c7fa JLE 46c810 |
(1162) 0x46c7fc CMP $0x4,%R8 |
(1162) 0x46c800 MOV -0x50(%RBP),%R12 |
(1162) 0x46c804 JAE 46c81d |
(1162) 0x46c806 JMP 46c8ec |
(1162) 0x46c810 MOV -0x48(%RBP),%RAX |
(1162) 0x46c814 MOV -0x50(%RBP),%R12 |
(1162) 0x46c818 JMP 46c957 |
(1162) 0x46c81d MOV %R8,%R9 |
(1162) 0x46c820 SHR $0x2,%R9 |
(1162) 0x46c824 MOV %R10,%RAX |
(1162) 0x46c827 LEA 0x18(,%RDI,8),%R10 |
(1162) 0x46c82f NOP |
(1163) 0x46c830 MOVSD -0x18(%R13,%R10,1),%XMM1 |
(1163) 0x46c837 MULSD (%RBX,%RDX,8),%XMM1 |
(1163) 0x46c83c MOV -0x18(%RAX,%R10,1),%R11 |
(1163) 0x46c841 MOV (%R12,%R11,8),%R11 |
(1163) 0x46c845 MOVSD (%R13,%R11,8),%XMM2 |
(1163) 0x46c84c ADDSD %XMM1,%XMM2 |
(1163) 0x46c850 MOVSD %XMM2,(%R13,%R11,8) |
(1163) 0x46c857 MOVSD -0x10(%R13,%R10,1),%XMM2 |
(1163) 0x46c85e MULSD (%RBX,%RDX,8),%XMM2 |
(1163) 0x46c863 MOV -0x10(%RAX,%R10,1),%R11 |
(1163) 0x46c868 MOV (%R12,%R11,8),%R11 |
(1163) 0x46c86c MOVSD (%R13,%R11,8),%XMM3 |
(1163) 0x46c873 ADDSD %XMM2,%XMM3 |
(1163) 0x46c877 MOVSD %XMM3,(%R13,%R11,8) |
(1163) 0x46c87e MOVSD -0x8(%R13,%R10,1),%XMM3 |
(1163) 0x46c885 MULSD (%RBX,%RDX,8),%XMM3 |
(1163) 0x46c88a MOV -0x8(%RAX,%R10,1),%R11 |
(1163) 0x46c88f MOV (%R12,%R11,8),%R11 |
(1163) 0x46c893 MOVSD (%R13,%R11,8),%XMM4 |
(1163) 0x46c89a ADDSD %XMM3,%XMM4 |
(1163) 0x46c89e MOVSD %XMM4,(%R13,%R11,8) |
(1163) 0x46c8a5 MOVSD (%R13,%R10,1),%XMM6 |
(1163) 0x46c8ac MULSD (%RBX,%RDX,8),%XMM6 |
(1163) 0x46c8b1 MOV (%RAX,%R10,1),%R11 |
(1163) 0x46c8b5 MOV (%R12,%R11,8),%R11 |
(1163) 0x46c8b9 MOVSD (%R13,%R11,8),%XMM4 |
(1163) 0x46c8c0 ADDSD %XMM6,%XMM4 |
(1163) 0x46c8c4 MOVSD %XMM4,(%R13,%R11,8) |
(1163) 0x46c8cb ADDSD %XMM6,%XMM3 |
(1163) 0x46c8cf ADDSD %XMM1,%XMM2 |
(1163) 0x46c8d3 ADDSD %XMM3,%XMM2 |
(1163) 0x46c8d7 UNPCKLPD %XMM2,%XMM2 |
(1163) 0x46c8db ADDPD %XMM2,%XMM0 |
(1163) 0x46c8df ADD $0x20,%R10 |
(1163) 0x46c8e3 DEC %R9 |
(1163) 0x46c8e6 JNE 46c830 |
(1162) 0x46c8ec MOV %R8,%R9 |
(1162) 0x46c8ef AND $-0x4,%R9 |
(1162) 0x46c8f3 CMP %R8,%R9 |
(1162) 0x46c8f6 JAE 46c94f |
(1162) 0x46c8f8 ADD %R9,%RDI |
(1162) 0x46c8fb MOV -0x30(%RBP),%R10 |
(1162) 0x46c8ff MOV -0x48(%RBP),%RAX |
(1162) 0x46c903 MOV -0x38(%RBP),%R9 |
(1162) 0x46c907 NOPW (%RAX,%RAX,1) |
(1164) 0x46c910 MOV (%R10,%RDI,8),%R8 |
(1164) 0x46c914 MOVSD (%R13,%RDI,8),%XMM6 |
(1164) 0x46c91b MULSD (%RBX,%RDX,8),%XMM6 |
(1164) 0x46c920 MOV (%R12,%R8,8),%R8 |
(1164) 0x46c924 MOVSD (%R13,%R8,8),%XMM1 |
(1164) 0x46c92b ADDSD %XMM6,%XMM1 |
(1164) 0x46c92f MOVSD %XMM1,(%R13,%R8,8) |
(1164) 0x46c936 MOVAPD %XMM6,%XMM1 |
(1164) 0x46c93a UNPCKLPD %XMM6,%XMM1 |
(1164) 0x46c93e ADDPD %XMM1,%XMM0 |
(1164) 0x46c942 INC %RDI |
(1164) 0x46c945 CMP %RDI,%RSI |
(1164) 0x46c948 JNE 46c910 |
(1162) 0x46c94a JMP 46c620 |
(1162) 0x46c94f MOV -0x30(%RBP),%R10 |
(1162) 0x46c953 MOV -0x48(%RBP),%RAX |
(1162) 0x46c957 MOV -0x38(%RBP),%R9 |
(1162) 0x46c95b JMP 46c620 |
0x46c960 MOV -0x128(%RBP),%RAX |
0x46c967 MOV (%RAX,%R9,8),%RCX |
0x46c96b MOV 0x8(%RAX,%R9,8),%RAX |
0x46c970 MOVAPD %XMM0,%XMM1 |
0x46c974 UNPCKHPD %XMM0,%XMM1 |
0x46c978 CMP %RAX,%RCX |
0x46c97b JL 46ca79 |
0x46c981 MOV -0x90(%RBP),%RAX |
0x46c988 MULSD (%RBX,%RAX,8),%XMM0 |
0x46c98d UCOMISD %XMM5,%XMM0 |
0x46c991 JE 46c9a3 |
0x46c993 XORPD 0x14d785(%RIP),%XMM1 |
0x46c99b DIVSD %XMM0,%XMM1 |
0x46c99f MOVAPD %XMM1,%XMM6 |
0x46c9a3 MOV -0xb8(%RBP),%RCX |
0x46c9aa MOV (%RCX,%R9,8),%RAX |
0x46c9ae MOV 0x8(%RCX,%R9,8),%RCX |
0x46c9b3 SUB %RAX,%RCX |
0x46c9b6 JLE 46cc29 |
0x46c9bc CMP $0x8,%RCX |
0x46c9c0 JB 46ca1f |
0x46c9c2 MOV %RCX,%RDX |
0x46c9c5 SHR $0x3,%RDX |
0x46c9c9 MOVAPD %XMM6,%XMM0 |
0x46c9cd UNPCKLPD %XMM6,%XMM0 |
0x46c9d1 MOV -0x108(%RBP),%RSI |
0x46c9d8 LEA (%RSI,%RAX,8),%RSI |
0x46c9dc NOPL (%RAX) |
(1159) 0x46c9e0 MOVUPD -0x30(%RSI),%XMM1 |
(1159) 0x46c9e5 MOVUPD -0x20(%RSI),%XMM2 |
(1159) 0x46c9ea MOVUPD -0x10(%RSI),%XMM3 |
(1159) 0x46c9ef MOVUPD (%RSI),%XMM4 |
(1159) 0x46c9f3 MULPD %XMM0,%XMM1 |
(1159) 0x46c9f7 MOVUPD %XMM1,-0x30(%RSI) |
(1159) 0x46c9fc MULPD %XMM0,%XMM2 |
(1159) 0x46ca00 MOVUPD %XMM2,-0x20(%RSI) |
(1159) 0x46ca05 MULPD %XMM0,%XMM3 |
(1159) 0x46ca09 MOVUPD %XMM3,-0x10(%RSI) |
(1159) 0x46ca0e MULPD %XMM0,%XMM4 |
(1159) 0x46ca12 MOVUPD %XMM4,(%RSI) |
(1159) 0x46ca16 ADD $0x40,%RSI |
(1159) 0x46ca1a DEC %RDX |
(1159) 0x46ca1d JNE 46c9e0 |
0x46ca1f MOV %ECX,%EDX |
0x46ca21 AND $0x7,%EDX |
0x46ca24 DEC %RDX |
0x46ca27 CMP $0x6,%RDX |
0x46ca2b JA 46cc29 |
(1160) 0x46ca50 MOV -0xe0(%RBP),%RDX |
(1160) 0x46ca57 ADDSD (%RDX,%RCX,8),%XMM1 |
(1160) 0x46ca5c MOV %R12,%R11 |
(1160) 0x46ca5f INC %RCX |
(1160) 0x46ca62 MOV %RAX,%RDX |
(1160) 0x46ca65 CMP %RAX,%RCX |
(1160) 0x46ca68 MOV -0x30(%RBP),%R10 |
(1160) 0x46ca6c MOV %R11,%R12 |
(1160) 0x46ca6f MOV -0x38(%RBP),%R9 |
(1160) 0x46ca73 JE 46c981 |
(1160) 0x46ca79 MOV -0x188(%RBP),%RDX |
(1160) 0x46ca80 LEA (%RDX,%RCX,8),%RSI |
(1160) 0x46ca84 CMPQ $0,-0x1b0(%RBP) |
(1160) 0x46ca8c JE 46ca9c |
(1160) 0x46ca8e MOV (%RSI),%RSI |
(1160) 0x46ca91 MOV -0x170(%RBP),%RDI |
(1160) 0x46ca98 LEA (%RDI,%RSI,8),%RSI |
(1160) 0x46ca9c MOV (%RSI),%RDI |
(1160) 0x46ca9f TEST %RDI,%RDI |
(1160) 0x46caa2 JS 46cb50 |
(1160) 0x46caa8 MOV -0x68(%RBP),%RSI |
(1160) 0x46caac CMP %R9,(%RSI,%RDI,8) |
(1160) 0x46cab0 JNE 46cb50 |
(1160) 0x46cab6 MOV -0x160(%RBP),%RSI |
(1160) 0x46cabd MOV 0x8(%RSI,%RDI,8),%RSI |
(1160) 0x46cac2 TEST %RSI,%RSI |
(1160) 0x46cac5 JLE 46ca5c |
(1160) 0x46cac7 MOV -0x150(%RBP),%R8 |
(1160) 0x46cace MOV (%R8,%RDI,8),%RDI |
(1160) 0x46cad2 ADD %RDI,%RSI |
(1160) 0x46cad5 MOV -0x58(%RBP),%R8 |
(1160) 0x46cad9 MOV (%R8),%R8 |
(1160) 0x46cadc MOV -0x158(%RBP),%R9 |
(1160) 0x46cae3 MOV (%R9,%R8,8),%R8 |
(1160) 0x46cae7 MOV %R12,%R11 |
(1160) 0x46caea MOV -0x40(%RBP),%R12 |
(1160) 0x46caee MOV -0xe0(%RBP),%RDX |
(1160) 0x46caf5 NOPW %CS:(%RAX,%RAX,1) |
(1161) 0x46cb00 MOV (%R8,%RDI,8),%R9 |
(1161) 0x46cb04 MOVSD (%R15,%RDI,8),%XMM6 |
(1161) 0x46cb0a MULSD (%RDX,%RCX,8),%XMM6 |
(1161) 0x46cb0f TEST %R9,%R9 |
(1161) 0x46cb12 LEA (%R11,%R9,8),%R10 |
(1161) 0x46cb16 NOT %R9 |
(1161) 0x46cb19 LEA (%R12,%R9,8),%R9 |
(1161) 0x46cb1d CMOVNS %R10,%R9 |
(1161) 0x46cb21 MOV %R13,%R10 |
(1161) 0x46cb24 CMOVS %R14,%R10 |
(1161) 0x46cb28 MOV (%R9),%R9 |
(1161) 0x46cb2b MOVSD (%R10,%R9,8),%XMM2 |
(1161) 0x46cb31 ADDSD %XMM6,%XMM2 |
(1161) 0x46cb35 MOVSD %XMM2,(%R10,%R9,8) |
(1161) 0x46cb3b ADDSD %XMM6,%XMM0 |
(1161) 0x46cb3f ADDSD %XMM6,%XMM1 |
(1161) 0x46cb43 INC %RDI |
(1161) 0x46cb46 CMP %RSI,%RDI |
(1161) 0x46cb49 JL 46cb00 |
(1160) 0x46cb4b JMP 46ca5f |
(1160) 0x46cb50 MOV -0x178(%RBP),%RSI |
(1160) 0x46cb57 CMPQ $-0x3,(%RSI,%RDI,8) |
(1160) 0x46cb5c JE 46ca5c |
(1160) 0x46cb62 CMPQ $0x1,-0xf8(%RBP) |
(1160) 0x46cb6a JE 46ca50 |
(1160) 0x46cb70 MOV -0x148(%RBP),%RSI |
(1160) 0x46cb77 MOV (%RSI,%RDI,8),%RSI |
(1160) 0x46cb7b MOV -0xd8(%RBP),%RDI |
(1160) 0x46cb82 CMP (%RDI,%R9,8),%RSI |
(1160) 0x46cb86 JE 46ca50 |
(1160) 0x46cb8c JMP 46ca5c |
0x46cc29 MOV -0xc0(%RBP),%RCX |
0x46cc30 MOV (%RCX,%R9,8),%RAX |
0x46cc34 MOV 0x8(%RCX,%R9,8),%RCX |
0x46cc39 SUB %RAX,%RCX |
0x46cc3c JLE 46c0e8 |
0x46cc42 CMP $0x8,%RCX |
0x46cc46 JB 46ccaf |
0x46cc48 MOV %RCX,%RDX |
0x46cc4b SHR $0x3,%RDX |
0x46cc4f MOVAPD %XMM6,%XMM0 |
0x46cc53 UNPCKLPD %XMM6,%XMM0 |
0x46cc57 MOV -0x100(%RBP),%RSI |
0x46cc5e LEA (%RSI,%RAX,8),%RSI |
0x46cc62 NOPW %CS:(%RAX,%RAX,1) |
(1158) 0x46cc70 MOVUPD -0x30(%RSI),%XMM1 |
(1158) 0x46cc75 MOVUPD -0x20(%RSI),%XMM2 |
(1158) 0x46cc7a MOVUPD -0x10(%RSI),%XMM3 |
(1158) 0x46cc7f MOVUPD (%RSI),%XMM4 |
(1158) 0x46cc83 MULPD %XMM0,%XMM1 |
(1158) 0x46cc87 MOVUPD %XMM1,-0x30(%RSI) |
(1158) 0x46cc8c MULPD %XMM0,%XMM2 |
(1158) 0x46cc90 MOVUPD %XMM2,-0x20(%RSI) |
(1158) 0x46cc95 MULPD %XMM0,%XMM3 |
(1158) 0x46cc99 MOVUPD %XMM3,-0x10(%RSI) |
(1158) 0x46cc9e MULPD %XMM0,%XMM4 |
(1158) 0x46cca2 MOVUPD %XMM4,(%RSI) |
(1158) 0x46cca6 ADD $0x40,%RSI |
(1158) 0x46ccaa DEC %RDX |
(1158) 0x46ccad JNE 46cc70 |
0x46ccaf MOV %ECX,%EDX |
0x46ccb1 AND $0x7,%EDX |
0x46ccb4 DEC %RDX |
0x46ccb7 CMP $0x6,%RDX |
0x46ccbb JA 46c0e8 |
/beegfs/hackathon/users/eoseret/qaas_runs/170-859-5251/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 1747 - 1876 |
-------------------------------------------------------------------------------- |
1747: if (n_fine) |
[...] |
1774: for (i=thread_start; i < thread_stop; i++) |
1775: { |
1776: i1 = pass_array[i]; |
1777: sum_C = 0; |
1778: sum_N = 0; |
1779: j_start = P_diag_start[i1]; |
1780: j_end = j_start+P_diag_i[i1+1]-P_diag_i[i1]; |
1781: cnt = P_diag_i[i1]; |
1782: for (j=j_start; j < j_end; j++) |
1783: { |
1784: k1 = P_diag_pass[pass][j]; |
1785: tmp_array[k1] = cnt; |
1786: P_diag_data[cnt] = 0; |
1787: P_diag_j[cnt++] = k1; |
1788: } |
1789: j_start = P_offd_start[i1]; |
1790: j_end = j_start+P_offd_i[i1+1]-P_offd_i[i1]; |
1791: cnt_offd = P_offd_i[i1]; |
1792: for (j=j_start; j < j_end; j++) |
1793: { |
1794: k1 = P_offd_pass[pass][j]; |
1795: tmp_array_offd[k1] = cnt_offd; |
1796: P_offd_data[cnt_offd] = 0; |
1797: P_offd_j[cnt_offd++] = k1; |
1798: } |
1799: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
1800: { |
1801: j1 = S_diag_j[j]; |
1802: if (assigned[j1] == pass-1) |
1803: tmp_marker[j1] = i1; |
1804: } |
1805: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
1806: { |
1807: j1 = S_offd_j[j]; |
1808: if (assigned_offd[j1] == pass-1) |
1809: tmp_marker_offd[j1] = i1; |
1810: } |
1811: for (j=A_diag_i[i1]+1; j < A_diag_i[i1+1]; j++) |
1812: { |
1813: j1 = A_diag_j[j]; |
1814: if (tmp_marker[j1] == i1) |
1815: { |
1816: for (k=P_diag_i[j1]; k < P_diag_i[j1+1]; k++) |
1817: { |
1818: k1 = P_diag_j[k]; |
1819: alfa = A_diag_data[j]*P_diag_data[k]; |
1820: P_diag_data[tmp_array[k1]] += alfa; |
1821: sum_C += alfa; |
1822: sum_N += alfa; |
1823: } |
1824: for (k=P_offd_i[j1]; k < P_offd_i[j1+1]; k++) |
1825: { |
1826: k1 = P_offd_j[k]; |
1827: alfa = A_diag_data[j]*P_offd_data[k]; |
1828: P_offd_data[tmp_array_offd[k1]] += alfa; |
1829: sum_C += alfa; |
1830: sum_N += alfa; |
1831: } |
1832: } |
1833: else |
1834: { |
1835: if (CF_marker[j1] != -3 && |
1836: (num_functions == 1 || dof_func[i1] == dof_func[j1])) |
1837: sum_N += A_diag_data[j]; |
1838: } |
1839: } |
1840: for (j=A_offd_i[i1]; j < A_offd_i[i1+1]; j++) |
1841: { |
1842: if (col_offd_S_to_A) |
1843: j1 = map_A_to_S[A_offd_j[j]]; |
1844: else |
1845: j1 = A_offd_j[j]; |
1846: |
1847: if (j1 > -1 && tmp_marker_offd[j1] == i1) |
1848: { |
1849: j_start = Pext_start[j1]; |
1850: j_end = j_start+Pext_i[j1+1]; |
1851: for (k=j_start; k < j_end; k++) |
1852: { |
1853: k1 = Pext_pass[pass][k]; |
1854: alfa = A_offd_data[j]*Pext_data[k]; |
1855: if (k1 < 0) |
1856: P_diag_data[tmp_array[-k1-1]] += alfa; |
1857: else |
1858: P_offd_data[tmp_array_offd[k1]] += alfa; |
1859: sum_C += alfa; |
1860: sum_N += alfa; |
1861: } |
1862: } |
1863: else |
1864: { |
1865: if (CF_marker_offd[j1] != -3 && |
1866: (num_functions == 1 || dof_func_offd[j1] == dof_func[i1])) |
1867: sum_N += A_offd_data[j]; |
1868: } |
1869: } |
1870: diagonal = A_diag_data[A_diag_i[i1]]; |
1871: if (sum_C*diagonal) alfa = -sum_N/(sum_C*diagonal); |
1872: |
1873: for (j=P_diag_i[i1]; j < P_diag_i[i1+1]; j++) |
1874: P_diag_data[j] *= alfa; |
1875: for (j=P_offd_i[i1]; j < P_offd_i[i1+1]; j++) |
1876: P_offd_data[j] *= alfa; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 3.17 |
CQA speedup if FP arith vectorized | 2.55 |
CQA speedup if fully vectorized | 4.61 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.12 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass.extracted.28 |
Source | par_multi_interp.c:1747-1747,par_multi_interp.c:1774-1776,par_multi_interp.c:1779-1786,par_multi_interp.c:1789-1796,par_multi_interp.c:1799-1799,par_multi_interp.c:1802-1802,par_multi_interp.c:1805-1805,par_multi_interp.c:1808-1808,par_multi_interp.c:1811-1811,par_multi_interp.c:1824-1824,par_multi_interp.c:1840-1840,par_multi_interp.c:1871-1876 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 33.83 |
CQA cycles if no scalar integer | 10.67 |
CQA cycles if FP arith vectorized | 13.25 |
CQA cycles if fully vectorized | 7.33 |
Front-end cycles | 33.83 |
DIV/SQRT cycles | 18.50 |
P0 cycles | 18.50 |
P1 cycles | 18.25 |
P2 cycles | 18.25 |
P3 cycles | 12.50 |
P4 cycles | 30.33 |
P5 cycles | 30.33 |
P6 cycles | 30.33 |
P7 cycles | 1.75 |
P8 cycles | 1.67 |
P9 cycles | 1.83 |
P10 cycles | 1.75 |
P11 cycles | 1.50 |
P12 cycles | 1.50 |
P13 cycles | 5.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 208.00 |
Nb uops | 203.00 |
Nb loads | 78.00 |
Nb stores | 11.00 |
Nb stack references | 28.00 |
FLOP/cycle | 0.06 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 1.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 1.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 22.23 |
Bytes prefetched | 0.00 |
Bytes loaded | 648.00 |
Bytes stored | 104.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 22.22 |
Vectorization ratio load | 25.00 |
Vectorization ratio store | 18.18 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 25.81 |
Vector-efficiency ratio all | 15.05 |
Vector-efficiency ratio load | 15.63 |
Vector-efficiency ratio store | 14.77 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 15.32 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 3.17 |
CQA speedup if FP arith vectorized | 2.55 |
CQA speedup if fully vectorized | 4.61 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.12 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass.extracted.28 |
Source | par_multi_interp.c:1747-1747,par_multi_interp.c:1774-1776,par_multi_interp.c:1779-1786,par_multi_interp.c:1789-1796,par_multi_interp.c:1799-1799,par_multi_interp.c:1802-1802,par_multi_interp.c:1805-1805,par_multi_interp.c:1808-1808,par_multi_interp.c:1811-1811,par_multi_interp.c:1824-1824,par_multi_interp.c:1840-1840,par_multi_interp.c:1871-1876 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 33.83 |
CQA cycles if no scalar integer | 10.67 |
CQA cycles if FP arith vectorized | 13.25 |
CQA cycles if fully vectorized | 7.33 |
Front-end cycles | 33.83 |
DIV/SQRT cycles | 18.50 |
P0 cycles | 18.50 |
P1 cycles | 18.25 |
P2 cycles | 18.25 |
P3 cycles | 12.50 |
P4 cycles | 30.33 |
P5 cycles | 30.33 |
P6 cycles | 30.33 |
P7 cycles | 1.75 |
P8 cycles | 1.67 |
P9 cycles | 1.83 |
P10 cycles | 1.75 |
P11 cycles | 1.50 |
P12 cycles | 1.50 |
P13 cycles | 5.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 208.00 |
Nb uops | 203.00 |
Nb loads | 78.00 |
Nb stores | 11.00 |
Nb stack references | 28.00 |
FLOP/cycle | 0.06 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 1.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 1.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 22.23 |
Bytes prefetched | 0.00 |
Bytes loaded | 648.00 |
Bytes stored | 104.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 22.22 |
Vectorization ratio load | 25.00 |
Vectorization ratio store | 18.18 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 25.81 |
Vector-efficiency ratio all | 15.05 |
Vector-efficiency ratio load | 15.63 |
Vector-efficiency ratio store | 14.77 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 15.32 |
Path / |
Function | hypre_BoomerAMGBuildMultipass.extracted.28 |
Source file and lines | par_multi_interp.c:1747-1876 |
Module | exec |
nb instructions | 208 |
nb uops | 203 |
loop length | 952 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 4 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 28 |
micro-operation queue | 33.83 cycles |
front end | 33.83 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 18.50 | 18.50 | 18.25 | 18.25 | 12.50 | 30.33 | 30.33 | 30.33 | 1.75 | 1.67 | 1.83 | 1.75 | 1.50 | 1.50 |
cycles | 18.50 | 18.50 | 18.25 | 18.25 | 12.50 | 30.33 | 30.33 | 30.33 | 1.75 | 1.67 | 1.83 | 1.75 | 1.50 | 1.50 |
Cycles executing div or sqrt instructions | 5.00 |
Front-end | 33.83 |
Dispatch | 30.33 |
DIV/SQRT | 5.00 |
Overall L1 | 33.83 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 66% |
load | 75% |
store | 100% |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 66% |
all | 22% |
load | 25% |
store | 18% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 25% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 20% |
load | 21% |
store | 25% |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 20% |
all | 15% |
load | 15% |
store | 14% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 15% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0xa8(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
INC %RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP -0x78(%RBP),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JGE 46ccfc <hypre_BoomerAMGBuildMultipass.extracted.28+0xfdc> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x130(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RDX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RAX,%RDX,8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x138(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX,%R9,8),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX,%R9,8),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%RAX,%R9,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%RSI,%R15,1),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %R12,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %RAX,%R15 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R9,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
JGE 46c30f <hypre_BoomerAMGBuildMultipass.extracted.28+0x5ef> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x58(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RSI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %R12,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP $0xd,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JB 46c2d0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x5b0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %RSI,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVAPD %XMM6,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 |
LEA (%R14,%R12,8),%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (,%RAX,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RCX,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CALL 5aa170 <_intel_fast_memset> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xc8(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x98(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX,%RCX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x60(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
SHR $0x3,%RCX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (%RAX,%R15,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD $0x38,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0x118(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%RSI,%R12,8),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RCX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV -0x40(%RBP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
MOV -0x60(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RSI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $-0x8,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %RSI,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0x30(%RBP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x48(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
XORPD %XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOVAPD -0x90(%RBP),%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOV -0x38(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xa0(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
JAE 46c30f <hypre_BoomerAMGBuildMultipass.extracted.28+0x5ef> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %R11,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RDX,%R12 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SAL $0x6,%RCX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (%RCX,%R15,8),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %RCX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
JMP 46c30f <hypre_BoomerAMGBuildMultipass.extracted.28+0x5ef> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
SAL $0x3,%R15 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV -0xc8(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD (%RAX,%RCX,8),%R15 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV -0x48(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x40(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
MOV -0x140(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX,%R9,8),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX,%R9,8),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%RAX,%R9,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%RCX,%R15,1),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %R12,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %RAX,%R15 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0x50(%RBP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
JGE 46c500 <hypre_BoomerAMGBuildMultipass.extracted.28+0x7e0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x58(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RCX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %R12,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP $0xd,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JB 46c4c0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x7a0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %RCX,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVAPD %XMM6,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 |
LEA (,%R12,8),%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %R13,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RDX,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LEA (,%RAX,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CALL 5aa170 <_intel_fast_memset> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xd0(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x98(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX,%RCX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x60(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
SHR $0x3,%RCX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (%RAX,%R15,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD $0x38,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0x110(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%RSI,%R12,8),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RCX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV -0x50(%RBP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x60(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RSI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $-0x8,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %RSI,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0x30(%RBP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
XORPD %XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOVAPD -0x90(%RBP),%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOV -0x38(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xa0(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
JAE 46c500 <hypre_BoomerAMGBuildMultipass.extracted.28+0x7e0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
ADD %RDX,%R12 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SAL $0x6,%RCX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (%RCX,%R15,8),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %RCX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XCHG %AX,%AX | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
JMP 46c500 <hypre_BoomerAMGBuildMultipass.extracted.28+0x7e0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
SAL $0x3,%R15 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV -0xd0(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD (%RAX,%RDX,8),%R15 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV -0x50(%RBP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
MOV -0xe8(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RCX,%R9,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%RCX,%R9,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %RCX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0xb0(%RBP),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %R11,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JGE 46c570 <hypre_BoomerAMGBuildMultipass.extracted.28+0x850> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RDX),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
DEC %RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JMP 46c538 <hypre_BoomerAMGBuildMultipass.extracted.28+0x818> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV -0xf0(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RCX,%R9,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%RCX,%R9,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %RCX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 46c5e0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x8c0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RDX),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
DEC %RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JMP 46c5a8 <hypre_BoomerAMGBuildMultipass.extracted.28+0x888> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV -0x120(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX,%R9,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%RAX,%R9,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA 0x1(%RSI),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XORPD %XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RCX,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RSI,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
JGE 46c960 <hypre_BoomerAMGBuildMultipass.extracted.28+0xc40> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
JMP 46c62c <hypre_BoomerAMGBuildMultipass.extracted.28+0x90c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV -0x128(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX,%R9,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%RAX,%R9,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOVAPD %XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
UNPCKHPD %XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.40 |
CMP %RAX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JL 46ca79 <hypre_BoomerAMGBuildMultipass.extracted.28+0xd59> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MULSD (%RBX,%RAX,8),%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
UCOMISD %XMM5,%XMM0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 7 | 1 |
JE 46c9a3 <hypre_BoomerAMGBuildMultipass.extracted.28+0xc83> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
XORPD 0x14d785(%RIP),%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
DIVSD %XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 5 |
MOVAPD %XMM1,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xb8(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RCX,%R9,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%RCX,%R9,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
SUB %RAX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JLE 46cc29 <hypre_BoomerAMGBuildMultipass.extracted.28+0xf09> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x8,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JB 46ca1f <hypre_BoomerAMGBuildMultipass.extracted.28+0xcff> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %RCX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SHR $0x3,%RDX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVAPD %XMM6,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
UNPCKLPD %XMM6,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.40 |
MOV -0x108(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%RSI,%RAX,8),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
MOV %ECX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $0x7,%EDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
DEC %RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP $0x6,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JA 46cc29 <hypre_BoomerAMGBuildMultipass.extracted.28+0xf09> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0xc0(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RCX,%R9,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%RCX,%R9,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
SUB %RAX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JLE 46c0e8 <hypre_BoomerAMGBuildMultipass.extracted.28+0x3c8> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x8,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JB 46ccaf <hypre_BoomerAMGBuildMultipass.extracted.28+0xf8f> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %RCX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SHR $0x3,%RDX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVAPD %XMM6,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
UNPCKLPD %XMM6,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.40 |
MOV -0x100(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%RSI,%RAX,8),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
MOV %ECX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $0x7,%EDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
DEC %RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP $0x6,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JA 46c0e8 <hypre_BoomerAMGBuildMultipass.extracted.28+0x3c8> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
Function | hypre_BoomerAMGBuildMultipass.extracted.28 |
Source file and lines | par_multi_interp.c:1747-1876 |
Module | exec |
nb instructions | 208 |
nb uops | 203 |
loop length | 952 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 4 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 28 |
micro-operation queue | 33.83 cycles |
front end | 33.83 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 18.50 | 18.50 | 18.25 | 18.25 | 12.50 | 30.33 | 30.33 | 30.33 | 1.75 | 1.67 | 1.83 | 1.75 | 1.50 | 1.50 |
cycles | 18.50 | 18.50 | 18.25 | 18.25 | 12.50 | 30.33 | 30.33 | 30.33 | 1.75 | 1.67 | 1.83 | 1.75 | 1.50 | 1.50 |
Cycles executing div or sqrt instructions | 5.00 |
Front-end | 33.83 |
Dispatch | 30.33 |
DIV/SQRT | 5.00 |
Overall L1 | 33.83 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 66% |
load | 75% |
store | 100% |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 66% |
all | 22% |
load | 25% |
store | 18% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 25% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 20% |
load | 21% |
store | 25% |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 20% |
all | 15% |
load | 15% |
store | 14% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 15% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0xa8(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
INC %RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP -0x78(%RBP),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JGE 46ccfc <hypre_BoomerAMGBuildMultipass.extracted.28+0xfdc> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x130(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RDX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RAX,%RDX,8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x138(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX,%R9,8),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX,%R9,8),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%RAX,%R9,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%RSI,%R15,1),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %R12,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %RAX,%R15 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R9,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
JGE 46c30f <hypre_BoomerAMGBuildMultipass.extracted.28+0x5ef> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x58(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RSI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %R12,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP $0xd,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JB 46c2d0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x5b0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %RSI,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVAPD %XMM6,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 |
LEA (%R14,%R12,8),%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (,%RAX,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RCX,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CALL 5aa170 <_intel_fast_memset> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xc8(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x98(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX,%RCX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x60(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
SHR $0x3,%RCX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (%RAX,%R15,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD $0x38,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0x118(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%RSI,%R12,8),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RCX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV -0x40(%RBP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
MOV -0x60(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RSI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $-0x8,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %RSI,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0x30(%RBP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x48(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
XORPD %XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOVAPD -0x90(%RBP),%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOV -0x38(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xa0(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
JAE 46c30f <hypre_BoomerAMGBuildMultipass.extracted.28+0x5ef> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %R11,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RDX,%R12 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SAL $0x6,%RCX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (%RCX,%R15,8),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %RCX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
JMP 46c30f <hypre_BoomerAMGBuildMultipass.extracted.28+0x5ef> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
SAL $0x3,%R15 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV -0xc8(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD (%RAX,%RCX,8),%R15 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV -0x48(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x40(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
MOV -0x140(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX,%R9,8),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX,%R9,8),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%RAX,%R9,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%RCX,%R15,1),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %R12,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %RAX,%R15 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0x50(%RBP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
JGE 46c500 <hypre_BoomerAMGBuildMultipass.extracted.28+0x7e0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x58(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RCX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %R12,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP $0xd,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JB 46c4c0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x7a0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %RCX,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVAPD %XMM6,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 |
LEA (,%R12,8),%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %R13,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RDX,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LEA (,%RAX,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CALL 5aa170 <_intel_fast_memset> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xd0(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x98(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX,%RCX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x60(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
SHR $0x3,%RCX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (%RAX,%R15,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD $0x38,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0x110(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%RSI,%R12,8),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RCX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV -0x50(%RBP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x60(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RSI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $-0x8,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %RSI,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0x30(%RBP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
XORPD %XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOVAPD -0x90(%RBP),%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOV -0x38(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xa0(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
JAE 46c500 <hypre_BoomerAMGBuildMultipass.extracted.28+0x7e0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
ADD %RDX,%R12 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SAL $0x6,%RCX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (%RCX,%R15,8),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %RCX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XCHG %AX,%AX | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
JMP 46c500 <hypre_BoomerAMGBuildMultipass.extracted.28+0x7e0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
SAL $0x3,%R15 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV -0xd0(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD (%RAX,%RDX,8),%R15 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV -0x50(%RBP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
MOV -0xe8(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RCX,%R9,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%RCX,%R9,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %RCX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0xb0(%RBP),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %R11,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JGE 46c570 <hypre_BoomerAMGBuildMultipass.extracted.28+0x850> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RDX),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
DEC %RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JMP 46c538 <hypre_BoomerAMGBuildMultipass.extracted.28+0x818> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV -0xf0(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RCX,%R9,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%RCX,%R9,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %RCX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 46c5e0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x8c0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RDX),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
DEC %RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JMP 46c5a8 <hypre_BoomerAMGBuildMultipass.extracted.28+0x888> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV -0x120(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX,%R9,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%RAX,%R9,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA 0x1(%RSI),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XORPD %XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RCX,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RSI,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
JGE 46c960 <hypre_BoomerAMGBuildMultipass.extracted.28+0xc40> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
JMP 46c62c <hypre_BoomerAMGBuildMultipass.extracted.28+0x90c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV -0x128(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX,%R9,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%RAX,%R9,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOVAPD %XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
UNPCKHPD %XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.40 |
CMP %RAX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JL 46ca79 <hypre_BoomerAMGBuildMultipass.extracted.28+0xd59> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MULSD (%RBX,%RAX,8),%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
UCOMISD %XMM5,%XMM0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 7 | 1 |
JE 46c9a3 <hypre_BoomerAMGBuildMultipass.extracted.28+0xc83> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
XORPD 0x14d785(%RIP),%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
DIVSD %XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 5 |
MOVAPD %XMM1,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xb8(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RCX,%R9,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%RCX,%R9,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
SUB %RAX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JLE 46cc29 <hypre_BoomerAMGBuildMultipass.extracted.28+0xf09> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x8,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JB 46ca1f <hypre_BoomerAMGBuildMultipass.extracted.28+0xcff> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %RCX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SHR $0x3,%RDX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVAPD %XMM6,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
UNPCKLPD %XMM6,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.40 |
MOV -0x108(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%RSI,%RAX,8),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
MOV %ECX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $0x7,%EDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
DEC %RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP $0x6,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JA 46cc29 <hypre_BoomerAMGBuildMultipass.extracted.28+0xf09> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0xc0(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RCX,%R9,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%RCX,%R9,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
SUB %RAX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JLE 46c0e8 <hypre_BoomerAMGBuildMultipass.extracted.28+0x3c8> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
CMP $0x8,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JB 46ccaf <hypre_BoomerAMGBuildMultipass.extracted.28+0xf8f> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %RCX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SHR $0x3,%RDX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVAPD %XMM6,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
UNPCKLPD %XMM6,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.40 |
MOV -0x100(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%RSI,%RAX,8),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
MOV %ECX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $0x7,%EDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
DEC %RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP $0x6,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JA 46c0e8 <hypre_BoomerAMGBuildMultipass.extracted.28+0x3c8> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |