Function: hypre_qsort0 | Module: exec | Source: hypre_qsort.c:31-187 [...] | Coverage: 0.01% |
---|
Function: hypre_qsort0 | Module: exec | Source: hypre_qsort.c:31-187 [...] | Coverage: 0.01% |
---|
/scratch_na/users/xoserete/qaas_runs/171-418-3331/intel/AMG/build/AMG/AMG/utilities/hypre_qsort.c: 31 - 187 |
-------------------------------------------------------------------------------- |
31: temp = v[i]; |
32: v[i] = v[j]; |
33: v[j] = temp; |
[...] |
175: if (left >= right) |
176: return; |
177: hypre_swap( v, left, (left+right)/2); |
178: last = left; |
179: for (i = left+1; i <= right; i++) |
180: if (v[i] < v[left]) |
181: { |
182: hypre_swap(v, ++last, i); |
183: } |
184: hypre_swap(v, left, last); |
185: hypre_qsort0(v, left, last-1); |
186: hypre_qsort0(v, last+1, right); |
187: } |
0x4e7140 CMP %RDX,%RSI |
0x4e7143 JGE 4e72ea |
0x4e7149 PUSH %RBP |
0x4e714a MOV %RSP,%RBP |
0x4e714d PUSH %R15 |
0x4e714f PUSH %R14 |
0x4e7151 PUSH %R12 |
0x4e7153 PUSH %RBX |
0x4e7154 MOV %RDX,%RBX |
0x4e7157 MOV %RDI,%R14 |
0x4e715a LEA 0x20(%RDI),%R15 |
0x4e715e MOV %RSI,%R12 |
0x4e7161 JMP 4e719c |
0x4e7163 NOPW %CS:(%RAX,%RAX,1) |
(4448) 0x4e7170 MOV (%R14,%RSI,8),%RAX |
(4448) 0x4e7174 MOV (%R14,%R12,8),%RCX |
(4448) 0x4e7178 MOV %RCX,(%R14,%RSI,8) |
(4448) 0x4e717c MOV %RAX,(%R14,%R12,8) |
(4448) 0x4e7180 LEA -0x1(%R12),%RDX |
(4448) 0x4e7185 MOV %R14,%RDI |
(4448) 0x4e7188 CALL 4e7140 <hypre_qsort0> |
(4448) 0x4e718d INC %R12 |
(4448) 0x4e7190 MOV %R12,%RSI |
(4448) 0x4e7193 CMP %RBX,%R12 |
(4448) 0x4e7196 JGE 4e72e2 |
(4448) 0x4e719c LEA (%RSI,%RBX,1),%RAX |
(4448) 0x4e71a0 MOV %RAX,%RCX |
(4448) 0x4e71a3 SHR $0x3f,%RCX |
(4448) 0x4e71a7 ADD %RAX,%RCX |
(4448) 0x4e71aa MOV (%R14,%RSI,8),%RAX |
(4448) 0x4e71ae AND $-0x2,%RCX |
(4448) 0x4e71b2 MOV (%R14,%RCX,4),%RDX |
(4448) 0x4e71b6 MOV %RDX,(%R14,%RSI,8) |
(4448) 0x4e71ba MOV %RAX,(%R14,%RCX,4) |
(4448) 0x4e71be LEA 0x1(%RSI),%RAX |
(4448) 0x4e71c2 CMP %RAX,%RBX |
(4448) 0x4e71c5 CMOVG %RBX,%RAX |
(4448) 0x4e71c9 MOV %RAX,%RCX |
(4448) 0x4e71cc SUB %RSI,%RCX |
(4448) 0x4e71cf CMP $0x4,%RCX |
(4448) 0x4e71d3 JAE 4e7220 |
(4448) 0x4e71d5 MOV %RCX,%RDX |
(4448) 0x4e71d8 AND $-0x4,%RDX |
(4448) 0x4e71dc CMP %RCX,%RDX |
(4448) 0x4e71df JE 4e7170 |
(4448) 0x4e71e1 ADD %RSI,%RDX |
(4448) 0x4e71e4 JMP 4e71fc |
0x4e71e6 NOPW %CS:(%RAX,%RAX,1) |
(4449) 0x4e71f0 INC %RDX |
(4449) 0x4e71f3 CMP %RDX,%RAX |
(4449) 0x4e71f6 JE 4e7170 |
(4449) 0x4e71fc MOV 0x8(%R14,%RDX,8),%RCX |
(4449) 0x4e7201 CMP (%R14,%RSI,8),%RCX |
(4449) 0x4e7205 JGE 4e71f0 |
(4449) 0x4e7207 MOV 0x8(%R14,%R12,8),%RDI |
(4449) 0x4e720c MOV %RCX,0x8(%R14,%R12,8) |
(4449) 0x4e7211 INC %R12 |
(4449) 0x4e7214 MOV %RDI,0x8(%R14,%RDX,8) |
(4449) 0x4e7219 JMP 4e71f0 |
0x4e721b NOPL (%RAX,%RAX,1) |
(4448) 0x4e7220 MOV %RCX,%RDX |
(4448) 0x4e7223 SHR $0x2,%RDX |
(4448) 0x4e7227 LEA (%R15,%RSI,8),%RDI |
(4448) 0x4e722b MOV %RSI,%R12 |
(4448) 0x4e722e JMP 4e7239 |
(4450) 0x4e7230 ADD $0x20,%RDI |
(4450) 0x4e7234 DEC %RDX |
(4450) 0x4e7237 JE 4e71d5 |
(4450) 0x4e7239 MOV -0x18(%RDI),%R9 |
(4450) 0x4e723d MOV (%R14,%RSI,8),%R8 |
(4450) 0x4e7241 CMP %R8,%R9 |
(4450) 0x4e7244 JL 4e7270 |
(4450) 0x4e7246 MOV -0x10(%RDI),%R9 |
(4450) 0x4e724a CMP %R8,%R9 |
(4450) 0x4e724d JL 4e728e |
(4450) 0x4e724f MOV -0x8(%RDI),%R9 |
(4450) 0x4e7253 CMP %R8,%R9 |
(4450) 0x4e7256 JL 4e72ac |
(4450) 0x4e7258 MOV (%RDI),%R9 |
(4450) 0x4e725b CMP %R8,%R9 |
(4450) 0x4e725e JGE 4e7230 |
(4450) 0x4e7260 JMP 4e72cd |
0x4e7262 NOPW %CS:(%RAX,%RAX,1) |
(4450) 0x4e7270 MOV 0x8(%R14,%R12,8),%R8 |
(4450) 0x4e7275 MOV %R9,0x8(%R14,%R12,8) |
(4450) 0x4e727a INC %R12 |
(4450) 0x4e727d MOV %R8,-0x18(%RDI) |
(4450) 0x4e7281 MOV (%R14,%RSI,8),%R8 |
(4450) 0x4e7285 MOV -0x10(%RDI),%R9 |
(4450) 0x4e7289 CMP %R8,%R9 |
(4450) 0x4e728c JGE 4e724f |
(4450) 0x4e728e MOV 0x8(%R14,%R12,8),%R8 |
(4450) 0x4e7293 MOV %R9,0x8(%R14,%R12,8) |
(4450) 0x4e7298 INC %R12 |
(4450) 0x4e729b MOV %R8,-0x10(%RDI) |
(4450) 0x4e729f MOV (%R14,%RSI,8),%R8 |
(4450) 0x4e72a3 MOV -0x8(%RDI),%R9 |
(4450) 0x4e72a7 CMP %R8,%R9 |
(4450) 0x4e72aa JGE 4e7258 |
(4450) 0x4e72ac MOV 0x8(%R14,%R12,8),%R8 |
(4450) 0x4e72b1 MOV %R9,0x8(%R14,%R12,8) |
(4450) 0x4e72b6 INC %R12 |
(4450) 0x4e72b9 MOV %R8,-0x8(%RDI) |
(4450) 0x4e72bd MOV (%R14,%RSI,8),%R8 |
(4450) 0x4e72c1 MOV (%RDI),%R9 |
(4450) 0x4e72c4 CMP %R8,%R9 |
(4450) 0x4e72c7 JGE 4e7230 |
(4450) 0x4e72cd MOV 0x8(%R14,%R12,8),%R8 |
(4450) 0x4e72d2 MOV %R9,0x8(%R14,%R12,8) |
(4450) 0x4e72d7 INC %R12 |
(4450) 0x4e72da MOV %R8,(%RDI) |
(4450) 0x4e72dd JMP 4e7230 |
0x4e72e2 POP %RBX |
0x4e72e3 POP %R12 |
0x4e72e5 POP %R14 |
0x4e72e7 POP %R15 |
0x4e72e9 POP %RBP |
0x4e72ea RET |
0x4e72eb NOPL (%RAX,%RAX,1) |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►18.76+ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_IJMatrixAssembleParCSR | IJMatrix_parcsr.c:2834 | exec |
○ | BuildIJLaplacian27pt | amg.c:2267 | exec |
○ | main | amg.c:274 | exec |
○ | __libc_start_main | libc-2.28.so | |
►18.75+ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_IJMatrixAssembleParCSR | IJMatrix_parcsr.c:2834 | exec |
○ | BuildIJLaplacian27pt | amg.c:2267 | exec |
○ | main | amg.c:274 | exec |
○ | __libc_start_main | libc-2.28.so | |
►12.50+ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_IJMatrixAssembleParCSR | IJMatrix_parcsr.c:2834 | exec |
○ | BuildIJLaplacian27pt | amg.c:2267 | exec |
○ | main | amg.c:274 | exec |
○ | __libc_start_main | libc-2.28.so | |
►12.50+ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_IJMatrixAssembleParCSR | IJMatrix_parcsr.c:2834 | exec |
○ | BuildIJLaplacian27pt | amg.c:2267 | exec |
○ | main | amg.c:274 | exec |
○ | __libc_start_main | libc-2.28.so | |
►12.49+ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_IJMatrixAssembleParCSR | IJMatrix_parcsr.c:2834 | exec |
○ | BuildIJLaplacian27pt | amg.c:2267 | exec |
○ | main | amg.c:274 | exec |
○ | __libc_start_main | libc-2.28.so | |
►6.25+ | hypre_ParTMatmul | par_csr_matop.c:3359 | exec |
○ | hypre_BoomerAMGSetup | par_amg_setup.c:1227 | exec |
○ | hypre_PCGSetup | pcg.c:234 | exec |
○ | main | amg.c:398 | exec |
○ | __libc_start_main | libc-2.28.so | |
►6.25+ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_IJMatrixAssembleParCSR | IJMatrix_parcsr.c:2834 | exec |
○ | BuildIJLaplacian27pt | amg.c:2267 | exec |
○ | main | amg.c:274 | exec |
○ | __libc_start_main | libc-2.28.so | |
►6.25+ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_IJMatrixAssembleParCSR | IJMatrix_parcsr.c:2834 | exec |
○ | BuildIJLaplacian27pt | amg.c:2267 | exec |
○ | main | amg.c:274 | exec |
○ | __libc_start_main | libc-2.28.so | |
►6.25+ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_qsort0 | hypre_qsort.c:186 | exec |
○ | hypre_merge_sort.extracted | hypre_merge_sort.c:265 | exec |
○ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Source file and lines | hypre_qsort.c:31-187 |
Module | exec |
nb instructions | 24 |
nb uops | 24 |
loop length | 91 |
used x86 registers | 10 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 4.00 cycles |
front end | 4.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.00 | 0.40 | 2.00 | 2.00 | 2.50 | 0.40 | 1.00 | 2.50 | 2.50 | 2.50 | 0.20 | 2.00 |
cycles | 1.00 | 0.40 | 2.00 | 2.00 | 2.50 | 0.40 | 1.00 | 2.50 | 2.50 | 2.50 | 0.20 | 2.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 4.10-4.12 |
Stall cycles | 0.00 |
Front-end | 4.00 |
Dispatch | 2.50 |
Overall L1 | 4.00 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
CMP %RDX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 4e72ea <hypre_qsort0+0x1aa> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDI,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x20(%RDI),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RSI,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 4e719c <hypre_qsort0+0x5c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | hypre_qsort.c:31-187 |
Module | exec |
nb instructions | 24 |
nb uops | 24 |
loop length | 91 |
used x86 registers | 10 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 4.00 cycles |
front end | 4.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.00 | 0.40 | 2.00 | 2.00 | 2.50 | 0.40 | 1.00 | 2.50 | 2.50 | 2.50 | 0.20 | 2.00 |
cycles | 1.00 | 0.40 | 2.00 | 2.00 | 2.50 | 0.40 | 1.00 | 2.50 | 2.50 | 2.50 | 0.20 | 2.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 4.10-4.12 |
Stall cycles | 0.00 |
Front-end | 4.00 |
Dispatch | 2.50 |
Overall L1 | 4.00 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
CMP %RDX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 4e72ea <hypre_qsort0+0x1aa> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDI,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x20(%RDI),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RSI,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 4e719c <hypre_qsort0+0x5c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼hypre_qsort0– | 0.01 | 0 |
▼Loop 4448 - hypre_qsort.c:31-186 - exec– | 0 | 0 |
○Loop 4450 - hypre_qsort.c:31-182 - exec | 0.01 | 0.03 |
○Loop 4449 - hypre_qsort.c:31-182 - exec | 0 | 0 |