Function: hypre_BoomerAMGBuildMultipass.extracted.28 | Module: libparcsr_ls.so | Source: par_multi_interp.c:1737-1881 [...] | Coverage: 2.6% |
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Function: hypre_BoomerAMGBuildMultipass.extracted.28 | Module: libparcsr_ls.so | Source: par_multi_interp.c:1737-1881 [...] | Coverage: 2.6% |
---|
/home/eoseret/qaas_runs_CPU_9468/171-716-5699/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 1737 - 1881 |
-------------------------------------------------------------------------------- |
1737: #pragma omp parallel private(thread_start,thread_stop,my_thread_num,num_threads,k,k1,i,i1,j,j1,sum_C,sum_N,j_start,j_end,cnt,tmp_marker,tmp_marker_offd,cnt_offd,diagonal,alfa,tmp_array,tmp_array_offd) |
[...] |
1747: if (n_fine) |
1748: { tmp_marker = hypre_CTAlloc(HYPRE_Int,n_fine); } |
1749: tmp_marker_offd = NULL; |
1750: if (num_cols_offd) |
1751: { tmp_marker_offd = hypre_CTAlloc(HYPRE_Int,num_cols_offd); } |
1752: tmp_array = NULL; |
1753: if (n_coarse) |
1754: { tmp_array = hypre_CTAlloc(HYPRE_Int,n_coarse); } |
1755: tmp_array_offd = NULL; |
1756: if (new_num_cols_offd > n_coarse_offd) |
1757: { tmp_array_offd = hypre_CTAlloc(HYPRE_Int,new_num_cols_offd); } |
1758: else |
1759: { tmp_array_offd = hypre_CTAlloc(HYPRE_Int,n_coarse_offd);} |
1760: for (i=0; i < n_fine; i++) |
1761: { tmp_marker[i] = -1; } |
1762: for (i=0; i < num_cols_offd; i++) |
1763: { tmp_marker_offd[i] = -1; } |
1764: |
1765: /* Compute this thread's range of pass_length */ |
1766: my_thread_num = hypre_GetThreadNum(); |
1767: num_threads = hypre_NumActiveThreads(); |
1768: thread_start = pass_pointer[pass] + (pass_length/num_threads)*my_thread_num; |
1769: if (my_thread_num == num_threads-1) |
1770: { thread_stop = pass_pointer[pass] + pass_length; } |
1771: else |
1772: { thread_stop = pass_pointer[pass] + (pass_length/num_threads)*(my_thread_num+1); } |
1773: |
1774: for (i=thread_start; i < thread_stop; i++) |
1775: { |
1776: i1 = pass_array[i]; |
1777: sum_C = 0; |
1778: sum_N = 0; |
1779: j_start = P_diag_start[i1]; |
1780: j_end = j_start+P_diag_i[i1+1]-P_diag_i[i1]; |
1781: cnt = P_diag_i[i1]; |
1782: for (j=j_start; j < j_end; j++) |
1783: { |
1784: k1 = P_diag_pass[pass][j]; |
1785: tmp_array[k1] = cnt; |
1786: P_diag_data[cnt] = 0; |
1787: P_diag_j[cnt++] = k1; |
1788: } |
1789: j_start = P_offd_start[i1]; |
1790: j_end = j_start+P_offd_i[i1+1]-P_offd_i[i1]; |
1791: cnt_offd = P_offd_i[i1]; |
1792: for (j=j_start; j < j_end; j++) |
1793: { |
1794: k1 = P_offd_pass[pass][j]; |
1795: tmp_array_offd[k1] = cnt_offd; |
1796: P_offd_data[cnt_offd] = 0; |
1797: P_offd_j[cnt_offd++] = k1; |
1798: } |
1799: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
1800: { |
1801: j1 = S_diag_j[j]; |
1802: if (assigned[j1] == pass-1) |
1803: tmp_marker[j1] = i1; |
1804: } |
1805: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
1806: { |
1807: j1 = S_offd_j[j]; |
1808: if (assigned_offd[j1] == pass-1) |
1809: tmp_marker_offd[j1] = i1; |
1810: } |
1811: for (j=A_diag_i[i1]+1; j < A_diag_i[i1+1]; j++) |
1812: { |
1813: j1 = A_diag_j[j]; |
1814: if (tmp_marker[j1] == i1) |
1815: { |
1816: for (k=P_diag_i[j1]; k < P_diag_i[j1+1]; k++) |
1817: { |
1818: k1 = P_diag_j[k]; |
1819: alfa = A_diag_data[j]*P_diag_data[k]; |
1820: P_diag_data[tmp_array[k1]] += alfa; |
1821: sum_C += alfa; |
1822: sum_N += alfa; |
1823: } |
1824: for (k=P_offd_i[j1]; k < P_offd_i[j1+1]; k++) |
1825: { |
1826: k1 = P_offd_j[k]; |
1827: alfa = A_diag_data[j]*P_offd_data[k]; |
1828: P_offd_data[tmp_array_offd[k1]] += alfa; |
1829: sum_C += alfa; |
1830: sum_N += alfa; |
1831: } |
1832: } |
1833: else |
1834: { |
1835: if (CF_marker[j1] != -3 && |
1836: (num_functions == 1 || dof_func[i1] == dof_func[j1])) |
1837: sum_N += A_diag_data[j]; |
1838: } |
1839: } |
1840: for (j=A_offd_i[i1]; j < A_offd_i[i1+1]; j++) |
1841: { |
1842: if (col_offd_S_to_A) |
1843: j1 = map_A_to_S[A_offd_j[j]]; |
1844: else |
1845: j1 = A_offd_j[j]; |
1846: |
1847: if (j1 > -1 && tmp_marker_offd[j1] == i1) |
1848: { |
1849: j_start = Pext_start[j1]; |
1850: j_end = j_start+Pext_i[j1+1]; |
1851: for (k=j_start; k < j_end; k++) |
1852: { |
1853: k1 = Pext_pass[pass][k]; |
1854: alfa = A_offd_data[j]*Pext_data[k]; |
1855: if (k1 < 0) |
1856: P_diag_data[tmp_array[-k1-1]] += alfa; |
1857: else |
1858: P_offd_data[tmp_array_offd[k1]] += alfa; |
1859: sum_C += alfa; |
1860: sum_N += alfa; |
1861: } |
1862: } |
1863: else |
1864: { |
1865: if (CF_marker_offd[j1] != -3 && |
1866: (num_functions == 1 || dof_func_offd[j1] == dof_func[i1])) |
1867: sum_N += A_offd_data[j]; |
1868: } |
1869: } |
1870: diagonal = A_diag_data[A_diag_i[i1]]; |
1871: if (sum_C*diagonal) alfa = -sum_N/(sum_C*diagonal); |
1872: |
1873: for (j=P_diag_i[i1]; j < P_diag_i[i1+1]; j++) |
1874: P_diag_data[j] *= alfa; |
1875: for (j=P_offd_i[i1]; j < P_offd_i[i1+1]; j++) |
1876: P_offd_data[j] *= alfa; |
1877: } |
1878: hypre_TFree(tmp_marker); |
1879: hypre_TFree(tmp_marker_offd); |
1880: hypre_TFree(tmp_array); |
1881: hypre_TFree(tmp_array_offd); |
0x70e00 PUSH %RBP |
0x70e01 MOV %RSP,%RBP |
0x70e04 PUSH %R15 |
0x70e06 PUSH %R14 |
0x70e08 PUSH %R13 |
0x70e0a PUSH %R12 |
0x70e0c PUSH %RBX |
0x70e0d SUB $0x178,%RSP |
0x70e14 MOV %R9,-0x198(%RBP) |
0x70e1b MOV %R8,-0xc8(%RBP) |
0x70e22 MOV %RCX,-0xe0(%RBP) |
0x70e29 MOV %RDX,-0x158(%RBP) |
0x70e30 MOV 0x138(%RBP),%RAX |
0x70e37 MOV %RAX,-0x48(%RBP) |
0x70e3b MOV 0x130(%RBP),%RAX |
0x70e42 MOV %RAX,-0xa8(%RBP) |
0x70e49 MOV 0x128(%RBP),%RAX |
0x70e50 MOV %RAX,-0x50(%RBP) |
0x70e54 MOV 0x120(%RBP),%RAX |
0x70e5b MOV %RAX,-0xa0(%RBP) |
0x70e62 MOV 0x118(%RBP),%RAX |
0x70e69 MOV %RAX,-0x190(%RBP) |
0x70e70 MOV 0x110(%RBP),%R15 |
0x70e77 MOV 0x108(%RBP),%R12 |
0x70e7e MOV 0x100(%RBP),%RDI |
0x70e85 MOV 0xf8(%RBP),%RAX |
0x70e8c MOV %RAX,-0x60(%RBP) |
0x70e90 MOV 0xf0(%RBP),%RAX |
0x70e97 MOV %RAX,-0x160(%RBP) |
0x70e9e MOV 0xe8(%RBP),%RAX |
0x70ea5 MOV %RAX,-0x150(%RBP) |
0x70eac MOV 0xe0(%RBP),%RAX |
0x70eb3 MOV %RAX,-0x148(%RBP) |
0x70eba MOV 0xd8(%RBP),%RAX |
0x70ec1 MOV %RAX,-0x108(%RBP) |
0x70ec8 MOV 0xd0(%RBP),%RAX |
0x70ecf MOV %RAX,-0x100(%RBP) |
0x70ed6 MOV 0xc8(%RBP),%RAX |
0x70edd MOV %RAX,-0x130(%RBP) |
0x70ee4 MOV 0xc0(%RBP),%RAX |
0x70eeb MOV %RAX,-0x128(%RBP) |
0x70ef2 MOV 0xb8(%RBP),%RAX |
0x70ef9 MOV %RAX,-0x30(%RBP) |
0x70efd MOV 0xb0(%RBP),%RAX |
0x70f04 MOV %RAX,-0x120(%RBP) |
0x70f0b MOV 0xa8(%RBP),%RAX |
0x70f12 MOV %RAX,-0x138(%RBP) |
0x70f19 MOV 0xa0(%RBP),%RAX |
0x70f20 MOV %RAX,-0x168(%RBP) |
0x70f27 MOV 0x98(%RBP),%RAX |
0x70f2e MOV %RAX,-0x140(%RBP) |
0x70f35 MOV 0x90(%RBP),%RAX |
0x70f3c MOV %RAX,-0x38(%RBP) |
0x70f40 MOV 0x88(%RBP),%RAX |
0x70f47 MOV %RAX,-0xb8(%RBP) |
0x70f4e MOV 0x80(%RBP),%R13 |
0x70f55 MOV 0x78(%RBP),%RAX |
0x70f59 MOV %RAX,-0x68(%RBP) |
0x70f5d MOV 0x70(%RBP),%RAX |
0x70f61 MOV %RAX,-0xb0(%RBP) |
0x70f68 MOV 0x68(%RBP),%R14 |
0x70f6c MOV 0x60(%RBP),%RCX |
0x70f70 MOV 0x58(%RBP),%RAX |
0x70f74 MOV %RAX,-0x188(%RBP) |
0x70f7b MOV 0x50(%RBP),%RAX |
0x70f7f MOV %RAX,-0xd8(%RBP) |
0x70f86 MOV 0x48(%RBP),%RAX |
0x70f8a MOV %RAX,-0x180(%RBP) |
0x70f91 MOV 0x40(%RBP),%RAX |
0x70f95 MOV %RAX,-0xd0(%RBP) |
0x70f9c MOV 0x38(%RBP),%RAX |
0x70fa0 MOV %RAX,-0x178(%RBP) |
0x70fa7 MOV 0x30(%RBP),%RAX |
0x70fab MOV %RAX,-0x118(%RBP) |
0x70fb2 MOV 0x28(%RBP),%RAX |
0x70fb6 MOV %RAX,-0xe8(%RBP) |
0x70fbd MOV 0x20(%RBP),%RAX |
0x70fc1 MOV %RAX,-0x170(%RBP) |
0x70fc8 MOV 0x18(%RBP),%RAX |
0x70fcc MOV %RAX,-0x110(%RBP) |
0x70fd3 MOV 0x10(%RBP),%RBX |
0x70fd7 TEST %RDI,%RDI |
0x70fda MOV %RCX,-0x80(%RBP) |
0x70fde MOV %RDI,-0x40(%RBP) |
0x70fe2 JE 71040 |
0x70fe4 MOV $0x8,%ESI |
0x70fe9 CALL ec50 <hypre_CAlloc@plt> |
0x70fee MOV -0x80(%RBP),%RCX |
0x70ff2 MOV %RAX,-0x78(%RBP) |
0x70ff6 TEST %RCX,%RCX |
0x70ff9 JE 7104d |
0x70ffb MOV $0x8,%ESI |
0x71000 MOV %RCX,%RDI |
0x71003 CALL ec50 <hypre_CAlloc@plt> |
0x71008 MOV %RAX,-0x70(%RBP) |
0x7100c TEST %R12,%R12 |
0x7100f JE 7105a |
0x71011 MOV $0x8,%ESI |
0x71016 MOV %R12,%RDI |
0x71019 CALL ec50 <hypre_CAlloc@plt> |
0x7101e JMP 7105c |
0x71020 NOPW %CS:(%RAX,%RAX,1) |
0x7102f NOPW %CS:(%RAX,%RAX,1) |
0x7103e XCHG %AX,%AX |
0x71040 MOVQ $0,-0x78(%RBP) |
0x71048 TEST %RCX,%RCX |
0x7104b JNE 70ffb |
0x7104d MOVQ $0,-0x70(%RBP) |
0x71055 TEST %R12,%R12 |
0x71058 JNE 71011 |
0x7105a XOR %EAX,%EAX |
0x7105c MOV %RAX,-0x58(%RBP) |
0x71060 MOV -0xa8(%RBP),%RDI |
0x71067 MOV $0x8,%ESI |
0x7106c CMP %R15,%RDI |
0x7106f JG 71074 |
0x71071 MOV %R15,%RDI |
0x71074 CALL ec50 <hypre_CAlloc@plt> |
0x71079 MOV %RAX,%R15 |
0x7107c MOV -0x40(%RBP),%RDX |
0x71080 TEST %RDX,%RDX |
0x71083 JLE 71097 |
0x71085 SAL $0x3,%RDX |
0x71089 MOV -0x78(%RBP),%RDI |
0x7108d MOV $0xff,%ESI |
0x71092 CALL e4a0 <__intel_avx_rep_memset@plt> |
0x71097 MOV -0x80(%RBP),%RDX |
0x7109b TEST %RDX,%RDX |
0x7109e JLE 710b2 |
0x710a0 SAL $0x3,%RDX |
0x710a4 MOV -0x70(%RBP),%RDI |
0x710a8 MOV $0xff,%ESI |
0x710ad CALL e4a0 <__intel_avx_rep_memset@plt> |
0x710b2 CALL e2e0 <hypre_GetThreadNum@plt> |
0x710b7 MOV %RAX,%R12 |
0x710ba CALL eab0 <hypre_NumActiveThreads@plt> |
0x710bf MOV %RAX,%RCX |
0x710c2 MOV -0x60(%RBP),%RAX |
0x710c6 MOV -0x30(%RBP),%RDX |
0x710ca MOV (%RDX,%RAX,8),%RSI |
0x710ce MOV -0x48(%RBP),%R8 |
0x710d2 MOV %R8,%RAX |
0x710d5 OR %RCX,%RAX |
0x710d8 SHR $0x20,%RAX |
0x710dc JE 71100 |
0x710de MOV %R8,%RAX |
0x710e1 CQTO |
0x710e3 IDIV %RCX |
0x710e6 JMP 71107 |
0x710e8 NOPW %CS:(%RAX,%RAX,1) |
0x710f7 NOPW (%RAX,%RAX,1) |
0x71100 MOV %R8D,%EAX |
0x71103 XOR %EDX,%EDX |
0x71105 DIV %ECX |
0x71107 MOV -0x50(%RBP),%R10 |
0x7110b MOV -0x38(%RBP),%R11 |
0x7110f MOV %RAX,%RDX |
0x71112 IMUL %R12,%RDX |
0x71116 DEC %RCX |
0x71119 LEA 0x1(%R12),%RDI |
0x7111e IMUL %RAX,%RDI |
0x71122 CMP %RCX,%R12 |
0x71125 MOV %RDX,%RCX |
0x71128 CMOVE %R8,%RDI |
0x7112c MOV %RDI,-0x98(%RBP) |
0x71133 CMP %RDI,%RDX |
0x71136 MOV -0x68(%RBP),%RDX |
0x7113a JGE 71e80 |
0x71140 MOV -0x98(%RBP),%RAX |
0x71147 ADD %RSI,%RAX |
0x7114a MOV %RAX,-0x98(%RBP) |
0x71151 ADD %RSI,%RCX |
0x71154 MOV -0x60(%RBP),%RAX |
0x71158 DEC %RAX |
0x7115b MOV %RAX,-0x80(%RBP) |
0x7115f LEA 0x38(%RDX),%RAX |
0x71163 MOV %RAX,-0xf8(%RBP) |
0x7116a LEA 0x38(%R11),%RAX |
0x7116e MOV %RAX,-0xf0(%RBP) |
0x71175 VXORPD %XMM16,%XMM16,%XMM16 |
0x7117b VMOVDDUP 0x6be83(%RIP),%XMM17 |
0x71185 JMP 711db |
0x71187 NOPW %CS:(%RAX,%RAX,1) |
0x71196 NOPW %CS:(%RAX,%RAX,1) |
0x711a5 NOPW %CS:(%RAX,%RAX,1) |
0x711b4 NOPW %CS:(%RAX,%RAX,1) |
(1609) 0x711c0 MOV -0xa8(%RBP),%RCX |
(1609) 0x711c7 INC %RCX |
(1609) 0x711ca CMP -0x98(%RBP),%RCX |
(1609) 0x711d1 MOV -0x68(%RBP),%RDX |
(1609) 0x711d5 JGE 71e80 |
(1609) 0x711db MOV -0x120(%RBP),%RAX |
(1609) 0x711e2 MOV %RCX,-0xa8(%RBP) |
(1609) 0x711e9 MOV (%RAX,%RCX,8),%R9 |
(1609) 0x711ed MOV -0x128(%RBP),%RAX |
(1609) 0x711f4 MOV (%RAX,%R9,8),%RCX |
(1609) 0x711f8 MOV -0xb0(%RBP),%RAX |
(1609) 0x711ff MOV (%RAX,%R9,8),%R12 |
(1609) 0x71203 MOV 0x8(%RAX,%R9,8),%R8 |
(1609) 0x71208 LEA (%R8,%RCX,1),%RAX |
(1609) 0x7120c SUB %R12,%RAX |
(1609) 0x7120f MOV %RCX,-0x30(%RBP) |
(1609) 0x71213 CMP %RAX,%RCX |
(1609) 0x71216 MOV -0xa0(%RBP),%RSI |
(1609) 0x7121d MOV %R9,-0x48(%RBP) |
(1609) 0x71221 JGE 7142f |
(1609) 0x71227 MOV -0x60(%RBP),%RAX |
(1609) 0x7122b MOV -0x100(%RBP),%RCX |
(1609) 0x71232 MOV (%RCX,%RAX,8),%RAX |
(1609) 0x71236 MOV %R8,%RCX |
(1609) 0x71239 SUB %R12,%RCX |
(1609) 0x7123c CMP $0xc,%RCX |
(1609) 0x71240 JBE 71400 |
(1609) 0x71246 MOV %R8,-0x90(%RBP) |
(1609) 0x7124d LEA (%R14,%R12,8),%RDI |
(1609) 0x71251 LEA (,%RCX,8),%RDX |
(1609) 0x71259 XOR %ESI,%ESI |
(1609) 0x7125b MOV %RAX,-0x40(%RBP) |
(1609) 0x7125f MOV %RCX,-0x88(%RBP) |
(1609) 0x71266 VZEROUPPER |
(1609) 0x71269 CALL e4a0 <__intel_avx_rep_memset@plt> |
(1609) 0x7126e MOV -0x88(%RBP),%RSI |
(1609) 0x71275 MOV %RSI,%R11 |
(1609) 0x71278 SHR $0x3,%RSI |
(1609) 0x7127c MOV -0x30(%RBP),%RAX |
(1609) 0x71280 MOV -0x40(%RBP),%RCX |
(1609) 0x71284 LEA 0x38(%RCX,%RAX,8),%RCX |
(1609) 0x71289 MOV -0xf8(%RBP),%RDX |
(1609) 0x71290 LEA (%RDX,%R12,8),%RDX |
(1609) 0x71294 MOV %RSI,-0xc0(%RBP) |
(1609) 0x7129b XOR %EDI,%EDI |
(1609) 0x7129d MOV -0x58(%RBP),%R10 |
(1609) 0x712a1 NOPW %CS:(%RAX,%RAX,1) |
(1627) 0x712b0 MOV -0x38(%RCX,%RDI,8),%R8 |
(1627) 0x712b5 LEA (%R12,%RDI,1),%R9 |
(1627) 0x712b9 MOV %R9,(%R10,%R8,8) |
(1627) 0x712bd MOV %R8,-0x38(%RDX,%RDI,8) |
(1627) 0x712c2 MOV -0x30(%RCX,%RDI,8),%R8 |
(1627) 0x712c7 LEA 0x1(%R12,%RDI,1),%R9 |
(1627) 0x712cc MOV %R9,(%R10,%R8,8) |
(1627) 0x712d0 MOV %R8,-0x30(%RDX,%RDI,8) |
(1627) 0x712d5 MOV -0x28(%RCX,%RDI,8),%R8 |
(1627) 0x712da LEA 0x2(%R12,%RDI,1),%R9 |
(1627) 0x712df MOV %R9,(%R10,%R8,8) |
(1627) 0x712e3 MOV %R8,-0x28(%RDX,%RDI,8) |
(1627) 0x712e8 MOV -0x20(%RCX,%RDI,8),%R8 |
(1627) 0x712ed LEA 0x3(%R12,%RDI,1),%R9 |
(1627) 0x712f2 MOV %R9,(%R10,%R8,8) |
(1627) 0x712f6 MOV %R8,-0x20(%RDX,%RDI,8) |
(1627) 0x712fb MOV -0x18(%RCX,%RDI,8),%R8 |
(1627) 0x71300 LEA 0x4(%R12,%RDI,1),%R9 |
(1627) 0x71305 MOV %R9,(%R10,%R8,8) |
(1627) 0x71309 MOV %R8,-0x18(%RDX,%RDI,8) |
(1627) 0x7130e MOV -0x10(%RCX,%RDI,8),%R8 |
(1627) 0x71313 LEA 0x5(%R12,%RDI,1),%R9 |
(1627) 0x71318 MOV %R9,(%R10,%R8,8) |
(1627) 0x7131c MOV %R8,-0x10(%RDX,%RDI,8) |
(1627) 0x71321 MOV -0x8(%RCX,%RDI,8),%R8 |
(1627) 0x71326 LEA 0x6(%R12,%RDI,1),%R9 |
(1627) 0x7132b MOV %R9,(%R10,%R8,8) |
(1627) 0x7132f MOV %R8,-0x8(%RDX,%RDI,8) |
(1627) 0x71334 MOV (%RCX,%RDI,8),%R8 |
(1627) 0x71338 LEA 0x7(%R12,%RDI,1),%R9 |
(1627) 0x7133d MOV %R9,(%R10,%R8,8) |
(1627) 0x71341 MOV %R8,(%RDX,%RDI,8) |
(1627) 0x71345 ADD $0x8,%RDI |
(1627) 0x71349 DEC %RSI |
(1627) 0x7134c JNE 712b0 |
(1609) 0x71352 MOV %R11,%RCX |
(1609) 0x71355 MOV %R11,%RAX |
(1609) 0x71358 AND $-0x8,%RAX |
(1609) 0x7135c CMP %R11,%RAX |
(1609) 0x7135f MOV -0x50(%RBP),%R10 |
(1609) 0x71363 MOV -0xa0(%RBP),%RSI |
(1609) 0x7136a MOV -0x38(%RBP),%R11 |
(1609) 0x7136e MOV -0x68(%RBP),%RDX |
(1609) 0x71372 MOV -0x48(%RBP),%R9 |
(1609) 0x71376 MOV -0x90(%RBP),%R8 |
(1609) 0x7137d MOV -0x40(%RBP),%RCX |
(1609) 0x71381 JAE 7142f |
(1609) 0x71387 ADD %RAX,%R12 |
(1609) 0x7138a SALQ $0x6,-0xc0(%RBP) |
(1609) 0x71392 MOV -0x30(%RBP),%RAX |
(1609) 0x71396 MOV -0xc0(%RBP),%RDI |
(1609) 0x7139d LEA (%RDI,%RAX,8),%RAX |
(1609) 0x713a1 MOV -0x58(%RBP),%RDI |
(1609) 0x713a5 ADD %RAX,%RCX |
(1609) 0x713a8 NOPL (%RAX,%RAX,1) |
(1628) 0x713b0 MOV (%RCX),%RAX |
(1628) 0x713b3 MOV %R12,(%RDI,%RAX,8) |
(1628) 0x713b7 MOV %RAX,(%RDX,%R12,8) |
(1628) 0x713bb INC %R12 |
(1628) 0x713be ADD $0x8,%RCX |
(1628) 0x713c2 CMP %R12,%R8 |
(1628) 0x713c5 JNE 713b0 |
(1609) 0x713c7 JMP 7142f |
0x713c9 NOPW %CS:(%RAX,%RAX,1) |
0x713d8 NOPW %CS:(%RAX,%RAX,1) |
0x713e7 NOPW %CS:(%RAX,%RAX,1) |
0x713f6 NOPW %CS:(%RAX,%RAX,1) |
(1609) 0x71400 MOV -0x30(%RBP),%RCX |
(1609) 0x71404 LEA (%RAX,%RCX,8),%RAX |
(1609) 0x71408 MOV -0x58(%RBP),%RDI |
(1609) 0x7140c NOPL (%RAX) |
(1626) 0x71410 MOV (%RAX),%RCX |
(1626) 0x71413 MOV %R12,(%RDI,%RCX,8) |
(1626) 0x71417 MOVQ $0,(%R14,%R12,8) |
(1626) 0x7141f MOV %RCX,(%RDX,%R12,8) |
(1626) 0x71423 INC %R12 |
(1626) 0x71426 ADD $0x8,%RAX |
(1626) 0x7142a CMP %R12,%R8 |
(1626) 0x7142d JNE 71410 |
(1609) 0x7142f MOV -0x130(%RBP),%RAX |
(1609) 0x71436 MOV (%RAX,%R9,8),%R8 |
(1609) 0x7143a MOV -0xb8(%RBP),%RAX |
(1609) 0x71441 MOV (%RAX,%R9,8),%R12 |
(1609) 0x71445 MOV 0x8(%RAX,%R9,8),%RDX |
(1609) 0x7144a LEA (%RDX,%R8,1),%RAX |
(1609) 0x7144e SUB %R12,%RAX |
(1609) 0x71451 CMP %RAX,%R8 |
(1609) 0x71454 JGE 71630 |
(1609) 0x7145a MOV -0x60(%RBP),%RAX |
(1609) 0x7145e MOV -0x108(%RBP),%RCX |
(1609) 0x71465 MOV (%RCX,%RAX,8),%RAX |
(1609) 0x71469 MOV %RDX,%RCX |
(1609) 0x7146c SUB %R12,%RCX |
(1609) 0x7146f CMP $0xc,%RCX |
(1609) 0x71473 JBE 71600 |
(1609) 0x71479 MOV %RDX,-0x90(%RBP) |
(1609) 0x71480 MOV %RAX,-0x30(%RBP) |
(1609) 0x71484 LEA (%R13,%R12,8),%RDI |
(1609) 0x71489 LEA (,%RCX,8),%RDX |
(1609) 0x71491 XOR %ESI,%ESI |
(1609) 0x71493 MOV %R8,-0x40(%RBP) |
(1609) 0x71497 MOV %RCX,-0x88(%RBP) |
(1609) 0x7149e VZEROUPPER |
(1609) 0x714a1 CALL e4a0 <__intel_avx_rep_memset@plt> |
(1609) 0x714a6 MOV -0x88(%RBP),%RAX |
(1609) 0x714ad MOV %RAX,%R10 |
(1609) 0x714b0 SHR $0x3,%RAX |
(1609) 0x714b4 MOV -0x30(%RBP),%RCX |
(1609) 0x714b8 MOV -0x40(%RBP),%RDX |
(1609) 0x714bc LEA 0x38(%RCX,%RDX,8),%RCX |
(1609) 0x714c1 MOV -0xf0(%RBP),%RDX |
(1609) 0x714c8 LEA (%RDX,%R12,8),%RDX |
(1609) 0x714cc MOV %RAX,%RSI |
(1609) 0x714cf XOR %EDI,%EDI |
(1609) 0x714d1 NOPW %CS:(%RAX,%RAX,1) |
(1624) 0x714e0 MOV -0x38(%RCX,%RDI,8),%R8 |
(1624) 0x714e5 LEA (%R12,%RDI,1),%R9 |
(1624) 0x714e9 MOV %R9,(%R15,%R8,8) |
(1624) 0x714ed MOV %R8,-0x38(%RDX,%RDI,8) |
(1624) 0x714f2 MOV -0x30(%RCX,%RDI,8),%R8 |
(1624) 0x714f7 LEA 0x1(%R12,%RDI,1),%R9 |
(1624) 0x714fc MOV %R9,(%R15,%R8,8) |
(1624) 0x71500 MOV %R8,-0x30(%RDX,%RDI,8) |
(1624) 0x71505 MOV -0x28(%RCX,%RDI,8),%R8 |
(1624) 0x7150a LEA 0x2(%R12,%RDI,1),%R9 |
(1624) 0x7150f MOV %R9,(%R15,%R8,8) |
(1624) 0x71513 MOV %R8,-0x28(%RDX,%RDI,8) |
(1624) 0x71518 MOV -0x20(%RCX,%RDI,8),%R8 |
(1624) 0x7151d LEA 0x3(%R12,%RDI,1),%R9 |
(1624) 0x71522 MOV %R9,(%R15,%R8,8) |
(1624) 0x71526 MOV %R8,-0x20(%RDX,%RDI,8) |
(1624) 0x7152b MOV -0x18(%RCX,%RDI,8),%R8 |
(1624) 0x71530 LEA 0x4(%R12,%RDI,1),%R9 |
(1624) 0x71535 MOV %R9,(%R15,%R8,8) |
(1624) 0x71539 MOV %R8,-0x18(%RDX,%RDI,8) |
(1624) 0x7153e MOV -0x10(%RCX,%RDI,8),%R8 |
(1624) 0x71543 LEA 0x5(%R12,%RDI,1),%R9 |
(1624) 0x71548 MOV %R9,(%R15,%R8,8) |
(1624) 0x7154c MOV %R8,-0x10(%RDX,%RDI,8) |
(1624) 0x71551 MOV -0x8(%RCX,%RDI,8),%R8 |
(1624) 0x71556 LEA 0x6(%R12,%RDI,1),%R9 |
(1624) 0x7155b MOV %R9,(%R15,%R8,8) |
(1624) 0x7155f MOV %R8,-0x8(%RDX,%RDI,8) |
(1624) 0x71564 MOV (%RCX,%RDI,8),%R8 |
(1624) 0x71568 LEA 0x7(%R12,%RDI,1),%R9 |
(1624) 0x7156d MOV %R9,(%R15,%R8,8) |
(1624) 0x71571 MOV %R8,(%RDX,%RDI,8) |
(1624) 0x71575 ADD $0x8,%RDI |
(1624) 0x71579 DEC %RSI |
(1624) 0x7157c JNE 714e0 |
(1609) 0x71582 MOV %R10,%RDX |
(1609) 0x71585 MOV %R10,%RCX |
(1609) 0x71588 AND $-0x8,%RCX |
(1609) 0x7158c CMP %R10,%RCX |
(1609) 0x7158f MOV -0x50(%RBP),%R10 |
(1609) 0x71593 MOV -0xa0(%RBP),%RSI |
(1609) 0x7159a MOV -0x38(%RBP),%R11 |
(1609) 0x7159e MOV -0x48(%RBP),%R9 |
(1609) 0x715a2 MOV -0x90(%RBP),%RDX |
(1609) 0x715a9 MOV -0x30(%RBP),%RDI |
(1609) 0x715ad MOV -0x40(%RBP),%R8 |
(1609) 0x715b1 JAE 71630 |
(1609) 0x715b7 ADD %RCX,%R12 |
(1609) 0x715ba SAL $0x6,%RAX |
(1609) 0x715be LEA (%RAX,%R8,8),%RAX |
(1609) 0x715c2 ADD %RAX,%RDI |
(1609) 0x715c5 NOPW %CS:(%RAX,%RAX,1) |
(1625) 0x715d0 MOV (%RDI),%RAX |
(1625) 0x715d3 MOV %R12,(%R15,%RAX,8) |
(1625) 0x715d7 MOV %RAX,(%R11,%R12,8) |
(1625) 0x715db INC %R12 |
(1625) 0x715de ADD $0x8,%RDI |
(1625) 0x715e2 CMP %R12,%RDX |
(1625) 0x715e5 JNE 715d0 |
(1609) 0x715e7 JMP 71630 |
0x715e9 NOPW %CS:(%RAX,%RAX,1) |
0x715f8 NOPL (%RAX,%RAX,1) |
(1609) 0x71600 LEA (%RAX,%R8,8),%RAX |
(1609) 0x71604 NOPW %CS:(%RAX,%RAX,1) |
(1623) 0x71610 MOV (%RAX),%RCX |
(1623) 0x71613 MOV %R12,(%R15,%RCX,8) |
(1623) 0x71617 MOVQ $0,(%R13,%R12,8) |
(1623) 0x71620 MOV %RCX,(%R11,%R12,8) |
(1623) 0x71624 INC %R12 |
(1623) 0x71627 ADD $0x8,%RAX |
(1623) 0x7162b CMP %R12,%RDX |
(1623) 0x7162e JNE 71610 |
(1609) 0x71630 MOV -0xd0(%RBP),%RCX |
(1609) 0x71637 MOV (%RCX,%R9,8),%RAX |
(1609) 0x7163b MOV 0x8(%RCX,%R9,8),%RCX |
(1609) 0x71640 JMP 71683 |
0x71642 NOPW %CS:(%RAX,%RAX,1) |
0x71651 NOPW %CS:(%RAX,%RAX,1) |
0x71660 NOPW %CS:(%RAX,%RAX,1) |
0x7166f NOPW %CS:(%RAX,%RAX,1) |
0x7167e XCHG %AX,%AX |
(1622) 0x71680 INC %RAX |
(1622) 0x71683 CMP %RCX,%RAX |
(1622) 0x71686 JGE 716c0 |
(1622) 0x71688 MOV -0x180(%RBP),%RDX |
(1622) 0x7168f MOV (%RDX,%RAX,8),%RDX |
(1622) 0x71693 MOV -0x190(%RBP),%RDI |
(1622) 0x7169a MOV -0x80(%RBP),%R8 |
(1622) 0x7169e CMP %R8,(%RDI,%RDX,8) |
(1622) 0x716a2 JNE 71680 |
(1622) 0x716a4 MOV -0x78(%RBP),%RCX |
(1622) 0x716a8 MOV %R9,(%RCX,%RDX,8) |
(1622) 0x716ac MOV -0xd0(%RBP),%RCX |
(1622) 0x716b3 MOV 0x8(%RCX,%R9,8),%RCX |
(1622) 0x716b8 JMP 71680 |
0x716ba NOPW (%RAX,%RAX,1) |
(1609) 0x716c0 MOV -0xd8(%RBP),%RCX |
(1609) 0x716c7 MOV (%RCX,%R9,8),%RAX |
(1609) 0x716cb MOV 0x8(%RCX,%R9,8),%RCX |
(1609) 0x716d0 JMP 71703 |
0x716d2 NOPW %CS:(%RAX,%RAX,1) |
0x716e1 NOPW %CS:(%RAX,%RAX,1) |
0x716f0 NOPW %CS:(%RAX,%RAX,1) |
0x716ff NOP |
(1621) 0x71700 INC %RAX |
(1621) 0x71703 CMP %RCX,%RAX |
(1621) 0x71706 JGE 71740 |
(1621) 0x71708 MOV -0x188(%RBP),%RDX |
(1621) 0x7170f MOV (%RDX,%RAX,8),%RDX |
(1621) 0x71713 MOV -0x80(%RBP),%RDI |
(1621) 0x71717 CMP %RDI,(%RSI,%RDX,8) |
(1621) 0x7171b JNE 71700 |
(1621) 0x7171d MOV -0x70(%RBP),%RCX |
(1621) 0x71721 MOV %R9,(%RCX,%RDX,8) |
(1621) 0x71725 MOV -0xd8(%RBP),%RCX |
(1621) 0x7172c MOV 0x8(%RCX,%R9,8),%RCX |
(1621) 0x71731 JMP 71700 |
0x71733 NOPW %CS:(%RAX,%RAX,1) |
(1609) 0x71740 MOV -0x110(%RBP),%RAX |
(1609) 0x71747 MOV (%RAX,%R9,8),%RCX |
(1609) 0x7174b MOV 0x8(%RAX,%R9,8),%R12 |
(1609) 0x71750 LEA 0x1(%RCX),%RDX |
(1609) 0x71754 VXORPD %XMM1,%XMM1,%XMM1 |
(1609) 0x71758 CMP %R12,%RDX |
(1609) 0x7175b MOV %RCX,-0x40(%RBP) |
(1609) 0x7175f VXORPD %XMM0,%XMM0,%XMM0 |
(1609) 0x71763 JGE 71b40 |
(1609) 0x71769 MOV %R12,-0x30(%RBP) |
(1609) 0x7176d JMP 71794 |
0x7176f NOPW %CS:(%RAX,%RAX,1) |
0x7177e XCHG %AX,%AX |
(1616) 0x71780 MOV -0x50(%RBP),%R10 |
(1616) 0x71784 MOV -0x48(%RBP),%R9 |
(1616) 0x71788 INC %RDX |
(1616) 0x7178b CMP %R12,%RDX |
(1616) 0x7178e JE 71b40 |
(1616) 0x71794 MOV -0x170(%RBP),%RAX |
(1616) 0x7179b MOV (%RAX,%RDX,8),%RSI |
(1616) 0x7179f MOV -0x78(%RBP),%RAX |
(1616) 0x717a3 CMP %R9,(%RAX,%RSI,8) |
(1616) 0x717a7 JNE 71800 |
(1616) 0x717a9 MOV -0xb0(%RBP),%RAX |
(1616) 0x717b0 MOV (%RAX,%RSI,8),%RDI |
(1616) 0x717b4 MOV 0x8(%RAX,%RSI,8),%R8 |
(1616) 0x717b9 MOV %R8,%R9 |
(1616) 0x717bc SUB %RDI,%R9 |
(1616) 0x717bf JLE 7198c |
(1616) 0x717c5 CMP $0x4,%R9 |
(1616) 0x717c9 JAE 71840 |
(1616) 0x717cb JMP 71919 |
0x717d0 NOPW %CS:(%RAX,%RAX,1) |
0x717df NOPW %CS:(%RAX,%RAX,1) |
0x717ee NOPW %CS:(%RAX,%RAX,1) |
0x717fd NOPL (%RAX) |
(1616) 0x71800 MOV -0x158(%RBP),%RDI |
(1616) 0x71807 CMPQ $-0x3,(%RDI,%RSI,8) |
(1616) 0x7180c JE 71788 |
(1616) 0x71812 CMPQ $0x1,-0xe0(%RBP) |
(1616) 0x7181a JE 71831 |
(1616) 0x7181c MOV -0xc8(%RBP),%R8 |
(1616) 0x71823 MOV (%R8,%R9,8),%RDI |
(1616) 0x71827 CMP (%R8,%RSI,8),%RDI |
(1616) 0x7182b JNE 71788 |
(1616) 0x71831 VADDSD (%RBX,%RDX,8),%XMM0,%XMM0 |
(1616) 0x71836 JMP 71788 |
0x7183b NOPL (%RAX,%RAX,1) |
(1616) 0x71840 MOV %R9,%R10 |
(1616) 0x71843 SHR $0x2,%R10 |
(1616) 0x71847 LEA 0x18(,%RDI,8),%R11 |
(1616) 0x7184f MOV -0x68(%RBP),%RAX |
(1616) 0x71853 MOV -0x58(%RBP),%RCX |
(1616) 0x71857 NOPW (%RAX,%RAX,1) |
(1619) 0x71860 MOV -0x18(%RAX,%R11,1),%R12 |
(1619) 0x71865 VMOVSD -0x18(%R14,%R11,1),%XMM2 |
(1619) 0x7186c VMOVSD (%RBX,%RDX,8),%XMM3 |
(1619) 0x71871 MOV (%RCX,%R12,8),%R12 |
(1619) 0x71875 VMOVSD (%R14,%R12,8),%XMM4 |
(1619) 0x7187b VFMADD231SD %XMM2,%XMM3,%XMM4 |
(1619) 0x71880 VMOVSD %XMM4,(%R14,%R12,8) |
(1619) 0x71886 MOV -0x10(%RAX,%R11,1),%R12 |
(1619) 0x7188b VMOVSD -0x10(%R14,%R11,1),%XMM4 |
(1619) 0x71892 VMOVSD (%RBX,%RDX,8),%XMM5 |
(1619) 0x71897 MOV (%RCX,%R12,8),%R12 |
(1619) 0x7189b VMOVSD (%R14,%R12,8),%XMM6 |
(1619) 0x718a1 VFMADD231SD %XMM4,%XMM5,%XMM6 |
(1619) 0x718a6 VMOVSD %XMM6,(%R14,%R12,8) |
(1619) 0x718ac MOV -0x8(%RAX,%R11,1),%R12 |
(1619) 0x718b1 VMOVSD -0x8(%R14,%R11,1),%XMM6 |
(1619) 0x718b8 VMOVSD (%RBX,%RDX,8),%XMM7 |
(1619) 0x718bd MOV (%RCX,%R12,8),%R12 |
(1619) 0x718c1 VMOVSD (%R14,%R12,8),%XMM8 |
(1619) 0x718c7 VFMADD231SD %XMM6,%XMM7,%XMM8 |
(1619) 0x718cc VMOVSD %XMM8,(%R14,%R12,8) |
(1619) 0x718d2 VMOVSD (%R14,%R11,1),%XMM8 |
(1619) 0x718d8 VMULSD (%RBX,%RDX,8),%XMM8,%XMM18 |
(1619) 0x718df MOV (%RAX,%R11,1),%R12 |
(1619) 0x718e3 MOV (%RCX,%R12,8),%R12 |
(1619) 0x718e7 VADDSD (%R14,%R12,8),%XMM18,%XMM8 |
(1619) 0x718ee VMOVSD %XMM8,(%R14,%R12,8) |
(1619) 0x718f4 VFMADD213SD %XMM18,%XMM5,%XMM4 |
(1619) 0x718fa VFMADD231SD %XMM2,%XMM3,%XMM4 |
(1619) 0x718ff VFMADD231SD %XMM6,%XMM7,%XMM4 |
(1619) 0x71904 VADDSD %XMM1,%XMM4,%XMM1 |
(1619) 0x71908 VADDSD %XMM0,%XMM4,%XMM0 |
(1619) 0x7190c ADD $0x20,%R11 |
(1619) 0x71910 DEC %R10 |
(1619) 0x71913 JNE 71860 |
(1616) 0x71919 MOV %R9,%R10 |
(1616) 0x7191c AND $-0x4,%R10 |
(1616) 0x71920 CMP %R9,%R10 |
(1616) 0x71923 JAE 71980 |
(1616) 0x71925 ADD %R10,%RDI |
(1616) 0x71928 MOV -0x50(%RBP),%R10 |
(1616) 0x7192c MOV -0x38(%RBP),%R11 |
(1616) 0x71930 MOV -0x68(%RBP),%RAX |
(1616) 0x71934 MOV -0x58(%RBP),%RCX |
(1616) 0x71938 MOV -0x30(%RBP),%R12 |
(1616) 0x7193c NOPL (%RAX) |
(1620) 0x71940 MOV (%RAX,%RDI,8),%R9 |
(1620) 0x71944 VMOVSD (%R14,%RDI,8),%XMM2 |
(1620) 0x7194a VMULSD (%RBX,%RDX,8),%XMM2,%XMM18 |
(1620) 0x71951 MOV (%RCX,%R9,8),%R9 |
(1620) 0x71955 VADDSD (%R14,%R9,8),%XMM18,%XMM2 |
(1620) 0x7195c VMOVSD %XMM2,(%R14,%R9,8) |
(1620) 0x71962 VADDSD %XMM1,%XMM18,%XMM1 |
(1620) 0x71968 VADDSD %XMM0,%XMM18,%XMM0 |
(1620) 0x7196e INC %RDI |
(1620) 0x71971 CMP %RDI,%R8 |
(1620) 0x71974 JNE 71940 |
(1616) 0x71976 JMP 7198c |
0x71978 NOPL (%RAX,%RAX,1) |
(1616) 0x71980 MOV -0x50(%RBP),%R10 |
(1616) 0x71984 MOV -0x38(%RBP),%R11 |
(1616) 0x71988 MOV -0x30(%RBP),%R12 |
(1616) 0x7198c MOV -0xb8(%RBP),%R8 |
(1616) 0x71993 MOV (%R8,%RSI,8),%RDI |
(1616) 0x71997 MOV 0x8(%R8,%RSI,8),%RSI |
(1616) 0x7199c MOV %RSI,%R8 |
(1616) 0x7199f SUB %RDI,%R8 |
(1616) 0x719a2 JLE 71784 |
(1616) 0x719a8 CMP $0x4,%R8 |
(1616) 0x719ac JAE 719c0 |
(1616) 0x719ae JMP 71aa6 |
0x719b3 NOPW %CS:(%RAX,%RAX,1) |
(1616) 0x719c0 MOV %R8,%R9 |
(1616) 0x719c3 SHR $0x2,%R9 |
(1616) 0x719c7 LEA 0x18(,%RDI,8),%R10 |
(1616) 0x719cf NOP |
(1617) 0x719d0 MOV -0x38(%RBP),%R11 |
(1617) 0x719d4 MOV -0x18(%R11,%R10,1),%R11 |
(1617) 0x719d9 VMOVSD -0x18(%R13,%R10,1),%XMM2 |
(1617) 0x719e0 VMOVSD (%RBX,%RDX,8),%XMM3 |
(1617) 0x719e5 MOV (%R15,%R11,8),%R11 |
(1617) 0x719e9 VMOVSD (%R13,%R11,8),%XMM4 |
(1617) 0x719f0 VFMADD231SD %XMM2,%XMM3,%XMM4 |
(1617) 0x719f5 VMOVSD %XMM4,(%R13,%R11,8) |
(1617) 0x719fc MOV -0x38(%RBP),%R11 |
(1617) 0x71a00 MOV -0x10(%R11,%R10,1),%R11 |
(1617) 0x71a05 VMOVSD -0x10(%R13,%R10,1),%XMM4 |
(1617) 0x71a0c VMOVSD (%RBX,%RDX,8),%XMM5 |
(1617) 0x71a11 MOV (%R15,%R11,8),%R11 |
(1617) 0x71a15 VMOVSD (%R13,%R11,8),%XMM6 |
(1617) 0x71a1c VFMADD231SD %XMM4,%XMM5,%XMM6 |
(1617) 0x71a21 VMOVSD %XMM6,(%R13,%R11,8) |
(1617) 0x71a28 MOV -0x38(%RBP),%R11 |
(1617) 0x71a2c MOV -0x8(%R11,%R10,1),%R11 |
(1617) 0x71a31 VMOVSD -0x8(%R13,%R10,1),%XMM6 |
(1617) 0x71a38 VMOVSD (%RBX,%RDX,8),%XMM7 |
(1617) 0x71a3d MOV (%R15,%R11,8),%R11 |
(1617) 0x71a41 VMOVSD (%R13,%R11,8),%XMM8 |
(1617) 0x71a48 VFMADD231SD %XMM6,%XMM7,%XMM8 |
(1617) 0x71a4d VMOVSD %XMM8,(%R13,%R11,8) |
(1617) 0x71a54 VMOVSD (%R13,%R10,1),%XMM8 |
(1617) 0x71a5b VMULSD (%RBX,%RDX,8),%XMM8,%XMM18 |
(1617) 0x71a62 MOV -0x38(%RBP),%R11 |
(1617) 0x71a66 MOV (%R11,%R10,1),%R11 |
(1617) 0x71a6a MOV (%R15,%R11,8),%R11 |
(1617) 0x71a6e VADDSD (%R13,%R11,8),%XMM18,%XMM8 |
(1617) 0x71a76 VMOVSD %XMM8,(%R13,%R11,8) |
(1617) 0x71a7d MOV -0x38(%RBP),%R11 |
(1617) 0x71a81 VFMADD213SD %XMM18,%XMM5,%XMM4 |
(1617) 0x71a87 VFMADD231SD %XMM2,%XMM3,%XMM4 |
(1617) 0x71a8c VFMADD231SD %XMM6,%XMM7,%XMM4 |
(1617) 0x71a91 VADDSD %XMM1,%XMM4,%XMM1 |
(1617) 0x71a95 VADDSD %XMM0,%XMM4,%XMM0 |
(1617) 0x71a99 ADD $0x20,%R10 |
(1617) 0x71a9d DEC %R9 |
(1617) 0x71aa0 JNE 719d0 |
(1616) 0x71aa6 MOV %R8,%R9 |
(1616) 0x71aa9 AND $-0x4,%R9 |
(1616) 0x71aad CMP %R8,%R9 |
(1616) 0x71ab0 JAE 71780 |
(1616) 0x71ab6 ADD %R9,%RDI |
(1616) 0x71ab9 MOV -0x50(%RBP),%R10 |
(1616) 0x71abd MOV -0x48(%RBP),%R9 |
(1616) 0x71ac1 NOPW %CS:(%RAX,%RAX,1) |
(1618) 0x71ad0 MOV (%R11,%RDI,8),%R8 |
(1618) 0x71ad4 VMOVSD (%R13,%RDI,8),%XMM2 |
(1618) 0x71adb VMULSD (%RBX,%RDX,8),%XMM2,%XMM18 |
(1618) 0x71ae2 MOV (%R15,%R8,8),%R8 |
(1618) 0x71ae6 VADDSD (%R13,%R8,8),%XMM18,%XMM2 |
(1618) 0x71aee VMOVSD %XMM2,(%R13,%R8,8) |
(1618) 0x71af5 VADDSD %XMM1,%XMM18,%XMM1 |
(1618) 0x71afb VADDSD %XMM0,%XMM18,%XMM0 |
(1618) 0x71b01 INC %RDI |
(1618) 0x71b04 CMP %RDI,%RSI |
(1618) 0x71b07 JNE 71ad0 |
(1616) 0x71b09 JMP 71788 |
0x71b0e NOPW %CS:(%RAX,%RAX,1) |
0x71b1d NOPW %CS:(%RAX,%RAX,1) |
0x71b2c NOPW %CS:(%RAX,%RAX,1) |
0x71b3b NOPL (%RAX,%RAX,1) |
(1609) 0x71b40 MOV -0x118(%RBP),%RAX |
(1609) 0x71b47 MOV (%RAX,%R9,8),%RCX |
(1609) 0x71b4b MOV 0x8(%RAX,%R9,8),%RDX |
(1609) 0x71b50 CMP %RDX,%RCX |
(1609) 0x71b53 JL 71c15 |
(1609) 0x71b59 MOV -0x40(%RBP),%RAX |
(1609) 0x71b5d VMULSD (%RBX,%RAX,8),%XMM1,%XMM1 |
(1609) 0x71b62 VUCOMISD %XMM16,%XMM1 |
(1609) 0x71b68 JE 71b76 |
(1609) 0x71b6a VXORPD %XMM17,%XMM0,%XMM0 |
(1609) 0x71b70 VDIVSD %XMM1,%XMM0,%XMM18 |
(1609) 0x71b76 MOV -0xb0(%RBP),%RAX |
(1609) 0x71b7d MOV (%RAX,%R9,8),%RDX |
(1609) 0x71b81 MOV 0x8(%RAX,%R9,8),%RAX |
(1609) 0x71b86 MOV %RAX,%RSI |
(1609) 0x71b89 SUB %RDX,%RSI |
(1609) 0x71b8c JLE 71de5 |
(1609) 0x71b92 MOV %RSI,%RCX |
(1609) 0x71b95 AND $-0x4,%RCX |
(1609) 0x71b99 JE 71dc0 |
(1609) 0x71b9f LEA -0x1(%RCX),%RDI |
(1609) 0x71ba3 LEA (%R14,%RDX,8),%R8 |
(1609) 0x71ba7 VBROADCASTSD %XMM18,%YMM0 |
(1609) 0x71bad XOR %R9D,%R9D |
(1613) 0x71bb0 VMULPD (%R8,%R9,8),%YMM0,%YMM1 |
(1613) 0x71bb6 VMOVUPD %YMM1,(%R8,%R9,8) |
(1613) 0x71bbc ADD $0x4,%R9 |
(1613) 0x71bc0 CMP %RDI,%R9 |
(1613) 0x71bc3 JBE 71bb0 |
(1609) 0x71bc5 CMP %RCX,%RSI |
(1609) 0x71bc8 MOV -0x48(%RBP),%R9 |
(1609) 0x71bcc JNE 71dc2 |
(1609) 0x71bd2 JMP 71de5 |
0x71bd7 NOPW %CS:(%RAX,%RAX,1) |
0x71be6 NOPW %CS:(%RAX,%RAX,1) |
0x71bf5 NOPW %CS:(%RAX,%RAX,1) |
(1614) 0x71c00 VADDSD (%RAX,%RCX,8),%XMM0,%XMM0 |
(1614) 0x71c05 INC %RCX |
(1614) 0x71c08 CMP %RDX,%RCX |
(1614) 0x71c0b MOV -0x48(%RBP),%R9 |
(1614) 0x71c0f JE 71b59 |
(1614) 0x71c15 MOV -0x178(%RBP),%RAX |
(1614) 0x71c1c LEA (%RAX,%RCX,8),%RSI |
(1614) 0x71c20 CMPQ $0,-0x198(%RBP) |
(1614) 0x71c28 JE 71c38 |
(1614) 0x71c2a MOV (%RSI),%RSI |
(1614) 0x71c2d MOV -0x160(%RBP),%RDI |
(1614) 0x71c34 LEA (%RDI,%RSI,8),%RSI |
(1614) 0x71c38 MOV -0xe8(%RBP),%RAX |
(1614) 0x71c3f MOV (%RSI),%RDI |
(1614) 0x71c42 TEST %RDI,%RDI |
(1614) 0x71c45 JS 71d40 |
(1614) 0x71c4b MOV -0x70(%RBP),%RSI |
(1614) 0x71c4f CMP %R9,(%RSI,%RDI,8) |
(1614) 0x71c53 JNE 71d40 |
(1614) 0x71c59 MOV -0x150(%RBP),%RSI |
(1614) 0x71c60 MOV 0x8(%RSI,%RDI,8),%RSI |
(1614) 0x71c65 TEST %RSI,%RSI |
(1614) 0x71c68 JLE 71c05 |
(1614) 0x71c6a MOV -0x140(%RBP),%R8 |
(1614) 0x71c71 MOV (%R8,%RDI,8),%RDI |
(1614) 0x71c75 ADD %RDI,%RSI |
(1614) 0x71c78 MOV -0x60(%RBP),%R8 |
(1614) 0x71c7c MOV -0x148(%RBP),%R9 |
(1614) 0x71c83 MOV (%R9,%R8,8),%R8 |
(1614) 0x71c87 JMP 71ceb |
0x71c89 NOPW %CS:(%RAX,%RAX,1) |
0x71c98 NOPW %CS:(%RAX,%RAX,1) |
0x71ca7 NOPW %CS:(%RAX,%RAX,1) |
0x71cb6 NOPW %CS:(%RAX,%RAX,1) |
(1615) 0x71cc0 MOV (%R15,%R9,8),%R9 |
(1615) 0x71cc4 VADDSD (%R13,%R9,8),%XMM18,%XMM2 |
(1615) 0x71ccc VMOVSD %XMM2,(%R13,%R9,8) |
(1615) 0x71cd3 VADDSD %XMM1,%XMM18,%XMM1 |
(1615) 0x71cd9 VADDSD %XMM0,%XMM18,%XMM0 |
(1615) 0x71cdf INC %RDI |
(1615) 0x71ce2 CMP %RSI,%RDI |
(1615) 0x71ce5 JGE 71c05 |
(1615) 0x71ceb MOV (%R8,%RDI,8),%R9 |
(1615) 0x71cef VMOVSD (%R10,%RDI,8),%XMM2 |
(1615) 0x71cf5 VMULSD (%RAX,%RCX,8),%XMM2,%XMM18 |
(1615) 0x71cfc TEST %R9,%R9 |
(1615) 0x71cff JNS 71cc0 |
(1615) 0x71d01 NOT %R9 |
(1615) 0x71d04 MOV -0x58(%RBP),%R12 |
(1615) 0x71d08 MOV (%R12,%R9,8),%R9 |
(1615) 0x71d0c VADDSD (%R14,%R9,8),%XMM18,%XMM2 |
(1615) 0x71d13 VMOVSD %XMM2,(%R14,%R9,8) |
(1615) 0x71d19 JMP 71cd3 |
0x71d1b NOPW %CS:(%RAX,%RAX,1) |
0x71d2a NOPW %CS:(%RAX,%RAX,1) |
0x71d39 NOPL (%RAX) |
(1614) 0x71d40 MOV -0x168(%RBP),%RSI |
(1614) 0x71d47 CMPQ $-0x3,(%RSI,%RDI,8) |
(1614) 0x71d4c JE 71c05 |
(1614) 0x71d52 CMPQ $0x1,-0xe0(%RBP) |
(1614) 0x71d5a JE 71c00 |
(1614) 0x71d60 MOV -0x138(%RBP),%RSI |
(1614) 0x71d67 MOV (%RSI,%RDI,8),%RSI |
(1614) 0x71d6b MOV -0xc8(%RBP),%RDI |
(1614) 0x71d72 CMP (%RDI,%R9,8),%RSI |
(1614) 0x71d76 JE 71c00 |
(1614) 0x71d7c JMP 71c05 |
0x71d81 NOPW %CS:(%RAX,%RAX,1) |
0x71d90 NOPW %CS:(%RAX,%RAX,1) |
0x71d9f NOPW %CS:(%RAX,%RAX,1) |
0x71dae NOPW %CS:(%RAX,%RAX,1) |
0x71dbd NOPL (%RAX) |
(1609) 0x71dc0 XOR %ECX,%ECX |
(1609) 0x71dc2 ADD %RDX,%RCX |
(1609) 0x71dc5 NOPW %CS:(%RAX,%RAX,1) |
(1612) 0x71dd0 VMULSD (%R14,%RCX,8),%XMM18,%XMM0 |
(1612) 0x71dd7 VMOVSD %XMM0,(%R14,%RCX,8) |
(1612) 0x71ddd INC %RCX |
(1612) 0x71de0 CMP %RCX,%RAX |
(1612) 0x71de3 JNE 71dd0 |
(1609) 0x71de5 MOV -0xb8(%RBP),%RAX |
(1609) 0x71dec MOV (%RAX,%R9,8),%RDX |
(1609) 0x71df0 MOV 0x8(%RAX,%R9,8),%RAX |
(1609) 0x71df5 MOV %RAX,%RSI |
(1609) 0x71df8 SUB %RDX,%RSI |
(1609) 0x71dfb JLE 711c0 |
(1609) 0x71e01 MOV %RSI,%RCX |
(1609) 0x71e04 AND $-0x4,%RCX |
(1609) 0x71e08 JE 71e40 |
(1609) 0x71e0a LEA -0x1(%RCX),%RDI |
(1609) 0x71e0e LEA (%R13,%RDX,8),%R8 |
(1609) 0x71e13 VBROADCASTSD %XMM18,%YMM0 |
(1609) 0x71e19 XOR %R9D,%R9D |
(1609) 0x71e1c NOPL (%RAX) |
(1611) 0x71e20 VMULPD (%R8,%R9,8),%YMM0,%YMM1 |
(1611) 0x71e26 VMOVUPD %YMM1,(%R8,%R9,8) |
(1611) 0x71e2c ADD $0x4,%R9 |
(1611) 0x71e30 CMP %RDI,%R9 |
(1611) 0x71e33 JBE 71e20 |
(1609) 0x71e35 CMP %RCX,%RSI |
(1609) 0x71e38 JE 711c0 |
(1609) 0x71e3e JMP 71e42 |
(1609) 0x71e40 XOR %ECX,%ECX |
(1609) 0x71e42 ADD %RDX,%RCX |
(1609) 0x71e45 NOPW %CS:(%RAX,%RAX,1) |
(1610) 0x71e50 VMULSD (%R13,%RCX,8),%XMM18,%XMM0 |
(1610) 0x71e58 VMOVSD %XMM0,(%R13,%RCX,8) |
(1610) 0x71e5f INC %RCX |
(1610) 0x71e62 CMP %RCX,%RAX |
(1610) 0x71e65 JNE 71e50 |
(1609) 0x71e67 JMP 711c0 |
0x71e6c NOPW %CS:(%RAX,%RAX,1) |
0x71e7b NOPL (%RAX,%RAX,1) |
0x71e80 MOV -0x78(%RBP),%RDI |
0x71e84 VZEROUPPER |
0x71e87 CALL e650 <hypre_Free@plt> |
0x71e8c MOV -0x70(%RBP),%RDI |
0x71e90 CALL e650 <hypre_Free@plt> |
0x71e95 MOV -0x58(%RBP),%RDI |
0x71e99 CALL e650 <hypre_Free@plt> |
0x71e9e MOV %R15,%RDI |
0x71ea1 ADD $0x178,%RSP |
0x71ea8 POP %RBX |
0x71ea9 POP %R12 |
0x71eab POP %R13 |
0x71ead POP %R14 |
0x71eaf POP %R15 |
0x71eb1 POP %RBP |
0x71eb2 JMP e650 |
0x71eb7 NOPW (%RAX,%RAX,1) |
Path / |
Source file and lines | par_multi_interp.c:1737-1881 |
Module | libparcsr_ls.so |
nb instructions | 250 |
nb uops | 269 |
loop length | 1586 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 81 |
micro-operation queue | 44.83 cycles |
front end | 44.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 8.90 | 8.80 | 21.00 | 21.00 | 32.00 | 8.80 | 8.70 | 32.00 | 32.00 | 32.00 | 8.80 | 21.00 |
cycles | 8.90 | 12.20 | 21.00 | 21.00 | 32.00 | 8.80 | 8.70 | 32.00 | 32.00 | 32.00 | 8.80 | 21.00 |
Cycles executing div or sqrt instructions | 16.00 |
FE+BE cycles | 42.54-42.59 |
Stall cycles | 0.00 |
Front-end | 44.83 |
Dispatch | 32.00 |
DIV/SQRT | 16.00 |
Overall L1 | 44.83 |
all | 1% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 3% |
all | 50% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 2% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 7% |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 18% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 9% |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x178,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,-0x198(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0x158(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x138(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x130(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x128(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x120(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x118(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x190(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x110(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x108(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x100(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xf8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xf0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x160(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x150(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x148(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x120(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x138(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x168(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x140(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x80(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x60(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x188(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x180(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x178(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x170(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV %RCX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 71040 <hypre_BoomerAMGBuildMultipass.extracted.28+0x240> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL ec50 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x80(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RCX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 7104d <hypre_BoomerAMGBuildMultipass.extracted.28+0x24d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL ec50 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R12,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 7105a <hypre_BoomerAMGBuildMultipass.extracted.28+0x25a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL ec50 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
JMP 7105c <hypre_BoomerAMGBuildMultipass.extracted.28+0x25c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOVQ $0,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RCX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 70ffb <hypre_BoomerAMGBuildMultipass.extracted.28+0x1fb> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOVQ $0,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R12,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 71011 <hypre_BoomerAMGBuildMultipass.extracted.28+0x211> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xa8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R15,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JG 71074 <hypre_BoomerAMGBuildMultipass.extracted.28+0x274> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL ec50 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x40(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 71097 <hypre_BoomerAMGBuildMultipass.extracted.28+0x297> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SAL $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x78(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL e4a0 <__intel_avx_rep_memset@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x80(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 710b2 <hypre_BoomerAMGBuildMultipass.extracted.28+0x2b2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SAL $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x70(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL e4a0 <__intel_avx_rep_memset@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CALL e2e0 <hypre_GetThreadNum@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL eab0 <hypre_NumActiveThreads@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%RAX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
OR %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x20,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
JE 71100 <hypre_BoomerAMGBuildMultipass.extracted.28+0x300> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R8,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %RCX | 5 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 10 |
JMP 71107 <hypre_BoomerAMGBuildMultipass.extracted.28+0x307> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R8D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
DIV %ECX | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV -0x50(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %R12,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
DEC %RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x1(%R12),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL %RAX,%RDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
CMP %RCX,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMOVE %R8,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x68(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 71e80 <hypre_BoomerAMGBuildMultipass.extracted.28+0x1080> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x98(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
DEC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x38(%RDX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x38(%R11),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VXORPD %XMM16,%XMM16,%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVDDUP 0x6be83(%RIP),%XMM17 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 711db <hypre_BoomerAMGBuildMultipass.extracted.28+0x3db> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x78(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL e650 <hypre_Free@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x70(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL e650 <hypre_Free@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x58(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL e650 <hypre_Free@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD $0x178,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP e650 <hypre_Free@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | par_multi_interp.c:1737-1881 |
Module | libparcsr_ls.so |
nb instructions | 250 |
nb uops | 269 |
loop length | 1586 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 81 |
micro-operation queue | 44.83 cycles |
front end | 44.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 8.90 | 8.80 | 21.00 | 21.00 | 32.00 | 8.80 | 8.70 | 32.00 | 32.00 | 32.00 | 8.80 | 21.00 |
cycles | 8.90 | 12.20 | 21.00 | 21.00 | 32.00 | 8.80 | 8.70 | 32.00 | 32.00 | 32.00 | 8.80 | 21.00 |
Cycles executing div or sqrt instructions | 16.00 |
FE+BE cycles | 42.54-42.59 |
Stall cycles | 0.00 |
Front-end | 44.83 |
Dispatch | 32.00 |
DIV/SQRT | 16.00 |
Overall L1 | 44.83 |
all | 1% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 3% |
all | 50% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 2% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 7% |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 18% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 9% |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x178,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,-0x198(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0x158(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x138(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x130(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x128(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x120(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x118(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x190(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x110(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x108(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x100(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xf8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xf0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x160(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x150(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x148(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x120(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x138(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x168(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x140(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x80(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x60(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x188(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x180(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x178(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x170(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV %RCX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 71040 <hypre_BoomerAMGBuildMultipass.extracted.28+0x240> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL ec50 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x80(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RCX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 7104d <hypre_BoomerAMGBuildMultipass.extracted.28+0x24d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL ec50 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R12,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 7105a <hypre_BoomerAMGBuildMultipass.extracted.28+0x25a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL ec50 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
JMP 7105c <hypre_BoomerAMGBuildMultipass.extracted.28+0x25c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOVQ $0,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RCX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 70ffb <hypre_BoomerAMGBuildMultipass.extracted.28+0x1fb> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOVQ $0,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R12,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 71011 <hypre_BoomerAMGBuildMultipass.extracted.28+0x211> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xa8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R15,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JG 71074 <hypre_BoomerAMGBuildMultipass.extracted.28+0x274> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL ec50 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x40(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 71097 <hypre_BoomerAMGBuildMultipass.extracted.28+0x297> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SAL $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x78(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL e4a0 <__intel_avx_rep_memset@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x80(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 710b2 <hypre_BoomerAMGBuildMultipass.extracted.28+0x2b2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SAL $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x70(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL e4a0 <__intel_avx_rep_memset@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CALL e2e0 <hypre_GetThreadNum@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL eab0 <hypre_NumActiveThreads@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%RAX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
OR %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x20,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
JE 71100 <hypre_BoomerAMGBuildMultipass.extracted.28+0x300> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R8,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %RCX | 5 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 10 |
JMP 71107 <hypre_BoomerAMGBuildMultipass.extracted.28+0x307> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R8D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
DIV %ECX | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV -0x50(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %R12,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
DEC %RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x1(%R12),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL %RAX,%RDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
CMP %RCX,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMOVE %R8,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x68(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 71e80 <hypre_BoomerAMGBuildMultipass.extracted.28+0x1080> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x98(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
DEC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x38(%RDX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x38(%R11),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VXORPD %XMM16,%XMM16,%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVDDUP 0x6be83(%RIP),%XMM17 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 711db <hypre_BoomerAMGBuildMultipass.extracted.28+0x3db> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x78(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL e650 <hypre_Free@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x70(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL e650 <hypre_Free@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x58(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL e650 <hypre_Free@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD $0x178,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP e650 <hypre_Free@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼hypre_BoomerAMGBuildMultipass.extracted.28– | 2.6 | 0.64 |
▼Loop 1609 - par_multi_interp.c:1747-1876 - libparcsr_ls.so– | 0.26 | 0.05 |
▼Loop 1616 - par_multi_interp.c:1747-1837 - libparcsr_ls.so– | 0.9 | 0.18 |
○Loop 1620 - par_multi_interp.c:1816-1822 - libparcsr_ls.so | 0.66 | 0.13 |
○Loop 1618 - par_multi_interp.c:1824-1830 - libparcsr_ls.so | 0 | 0 |
○Loop 1617 - par_multi_interp.c:1747-1828 - libparcsr_ls.so | 0 | 0 |
○Loop 1619 - par_multi_interp.c:1816-1820 - libparcsr_ls.so | 0 | 0 |
○Loop 1622 - par_multi_interp.c:1799-1803 - libparcsr_ls.so | 0.69 | 0.14 |
○Loop 1626 - par_multi_interp.c:1782-1787 - libparcsr_ls.so | 0.07 | 0.01 |
○Loop 1612 - par_multi_interp.c:1873-1874 - libparcsr_ls.so | 0.01 | 0 |
○Loop 1624 - par_multi_interp.c:1792-1797 - libparcsr_ls.so | 0 | 0 |
▼Loop 1614 - par_multi_interp.c:1836-1867 - libparcsr_ls.so– | 0 | 0 |
○Loop 1615 - par_multi_interp.c:1851-1860 - libparcsr_ls.so | 0 | 0 |
○Loop 1613 - par_multi_interp.c:1873-1874 - libparcsr_ls.so | 0 | 0 |
○Loop 1611 - par_multi_interp.c:1875-1876 - libparcsr_ls.so | 0 | 0 |
○Loop 1623 - par_multi_interp.c:1792-1797 - libparcsr_ls.so | 0 | 0 |
○Loop 1621 - par_multi_interp.c:1805-1809 - libparcsr_ls.so | 0 | 0.01 |
○Loop 1625 - par_multi_interp.c:1792-1797 - libparcsr_ls.so | 0 | 0 |
○Loop 1628 - par_multi_interp.c:1782-1787 - libparcsr_ls.so | 0 | 0 |
○Loop 1610 - par_multi_interp.c:1875-1876 - libparcsr_ls.so | 0 | 0 |
○Loop 1627 - par_multi_interp.c:1782-1787 - libparcsr_ls.so | 0 | 0 |