Loop Id: 1715 | Module: libparcsr_ls.so | Source: par_lr_interp.c:1221-1675 [...] | Coverage: 0.1% |
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Loop Id: 1715 | Module: libparcsr_ls.so | Source: par_lr_interp.c:1221-1675 [...] | Coverage: 0.1% |
---|
0x789c0 MOV -0x98(%RBP),%RCX |
0x789c7 MOV (%RCX),%RCX |
0x789ca VMOVSD (%RCX,%RAX,8),%XMM5 |
0x789cf MOV -0x58(%RBP),%RDX |
0x789d3 VADDSD (%RDX,%R9,8),%XMM5,%XMM5 |
0x789d9 VMOVSD %XMM5,(%RCX,%RAX,8) |
0x789de INC %R9 |
0x789e1 CMP -0xb0(%RBP),%R9 |
0x789e8 JE 788f1 |
0x789ee MOV -0xd0(%RBP),%RAX |
0x789f5 MOV (%RAX,%R9,8),%R10 |
0x789f9 MOV (%RBX,%R10,8),%RAX |
0x789fd CMP %RDI,%RAX |
0x78a00 JGE 789c0 |
0x78a02 CMP %R8,%RAX |
0x78a05 JNE 78b40 |
0x78a0b MOV -0x198(%RBP),%RCX |
0x78a12 MOV (%RCX,%R10,8),%R11 |
0x78a16 VPXOR %XMM5,%XMM5,%XMM5 |
0x78a1a XOR %EAX,%EAX |
0x78a1c MOV -0x58(%RBP),%RDX |
0x78a20 VUCOMISD (%RDX,%R11,8),%XMM5 |
0x78a26 MOV %R10,-0xf0(%RBP) |
0x78a2d MOV 0x8(%RCX,%R10,8),%RCX |
0x78a32 SETBE %AL |
0x78a35 LEA -0x1(%RAX,%RAX,1),%RAX |
0x78a3a MOV %RAX,-0x68(%RBP) |
0x78a3e LEA 0x1(%R11),%R10 |
0x78a42 CMP %RCX,%R10 |
0x78a45 MOV %R11,-0x88(%RBP) |
0x78a4c JGE 78b80 |
0x78a52 VCVTSI2SDQ -0x68(%RBP),%XMM10,%XMM6 |
0x78a58 NOT %R11 |
0x78a5b ADD %RCX,%R11 |
0x78a5e MOV %R11,-0x60(%RBP) |
0x78a62 CMP $0x4,%R11 |
0x78a66 JAE 78c80 |
0x78a6c MOV -0x60(%RBP),%RDX |
0x78a70 MOV %RDX,%RAX |
0x78a73 AND $-0x4,%RAX |
0x78a77 CMP %RDX,%RAX |
0x78a7a JAE 78b80 |
0x78a80 MOV -0x88(%RBP),%RDX |
0x78a87 LEA 0x1(%RDX,%RAX,1),%RAX |
0x78a8c JMP 78acc |
(1721) 0x78ac0 INC %RAX |
(1721) 0x78ac3 CMP %RAX,%RCX |
(1721) 0x78ac6 JE 78b80 |
(1721) 0x78acc MOV -0xd0(%RBP),%RDX |
(1721) 0x78ad3 MOV (%RDX,%RAX,8),%RDX |
(1721) 0x78ad7 XOR %R11D,%R11D |
(1721) 0x78ada CMP %RDI,(%RBX,%RDX,8) |
(1721) 0x78ade SETGE %R11B |
(1721) 0x78ae2 XOR %R15D,%R15D |
(1721) 0x78ae5 CMP %R14,%RDX |
(1721) 0x78ae8 SETE %R15B |
(1721) 0x78aec CMP %R11B,%R15B |
(1721) 0x78aef CMOVA %R15D,%R11D |
(1721) 0x78af3 CMP $0x1,%R11B |
(1721) 0x78af7 JNE 78ac0 |
(1721) 0x78af9 MOV -0x58(%RBP),%RDX |
(1721) 0x78afd VMOVSD (%RDX,%RAX,8),%XMM7 |
(1721) 0x78b02 VMULSD %XMM6,%XMM7,%XMM8 |
(1721) 0x78b06 VADDSD %XMM5,%XMM7,%XMM7 |
(1721) 0x78b0a VCMPSD $0x1,%XMM0,%XMM8,%K1 |
(1721) 0x78b11 VMOVSD %XMM7,%XMM5,%XMM5{%K1} |
(1721) 0x78b17 JMP 78ac0 |
0x78b40 CMPQ $-0x3,(%R13,%R10,8) |
0x78b46 JE 789de |
0x78b4c CMPQ $0x1,-0x190(%RBP) |
0x78b54 JE 78b6b |
0x78b56 MOV -0x188(%RBP),%RCX |
0x78b5d MOV (%RCX,%R14,8),%RAX |
0x78b61 CMP (%RCX,%R10,8),%RAX |
0x78b65 JNE 789de |
0x78b6b MOV -0x58(%RBP),%RAX |
0x78b6f VADDSD (%RAX,%R9,8),%XMM4,%XMM4 |
0x78b75 JMP 789de |
0x78b80 MOV -0xe0(%RBP),%RAX |
0x78b87 MOV (%RAX),%RAX |
0x78b8a MOV %RAX,-0x60(%RBP) |
0x78b8e CMP $0x2,%RAX |
0x78b92 JL 78f87 |
0x78b98 MOV -0x168(%RBP),%RDX |
0x78b9f MOV -0xf0(%RBP),%R11 |
0x78ba6 MOV (%RDX,%R11,8),%RAX |
0x78baa MOV 0x8(%RDX,%R11,8),%R12 |
0x78baf MOV %R12,%RDX |
0x78bb2 SUB %RAX,%RDX |
0x78bb5 MOV -0x30(%RBP),%R15 |
0x78bb9 JLE 78f8b |
0x78bbf VCVTSI2SDQ -0x68(%RBP),%XMM10,%XMM6 |
0x78bc5 CMP $0x4,%RDX |
0x78bc9 MOV %RDX,-0xd8(%RBP) |
0x78bd0 JAE 78e40 |
0x78bd6 MOV -0xd8(%RBP),%R11 |
0x78bdd MOV %R11,%RDX |
0x78be0 AND $-0x4,%RDX |
0x78be4 CMP %R11,%RDX |
0x78be7 JAE 78f80 |
0x78bed ADD %RDX,%RAX |
0x78bf0 MOV -0xf8(%RBP),%R13 |
0x78bf7 MOV -0x30(%RBP),%R15 |
0x78bfb JMP 78c0c |
(1719) 0x78c00 INC %RAX |
(1719) 0x78c03 CMP %RAX,%R12 |
(1719) 0x78c06 JE 78f8b |
(1719) 0x78c0c MOV -0xa0(%RBP),%RDX |
(1719) 0x78c13 MOV (%RDX,%RAX,8),%RDX |
(1719) 0x78c17 MOV -0x38(%RBP),%R11 |
(1719) 0x78c1b CMP %RSI,(%R11,%RDX,8) |
(1719) 0x78c1f JL 78c00 |
(1719) 0x78c21 MOV -0x70(%RBP),%RDX |
(1719) 0x78c25 VMOVSD (%RDX,%RAX,8),%XMM7 |
(1719) 0x78c2a VMULSD %XMM6,%XMM7,%XMM8 |
(1719) 0x78c2e VADDSD %XMM5,%XMM7,%XMM7 |
(1719) 0x78c32 VCMPSD $0x1,%XMM0,%XMM8,%K1 |
(1719) 0x78c39 VMOVSD %XMM7,%XMM5,%XMM5{%K1} |
(1719) 0x78c3f JMP 78c00 |
0x78c80 MOV -0x60(%RBP),%R12 |
0x78c84 SHR $0x2,%R12 |
0x78c88 MOV -0x88(%RBP),%RAX |
0x78c8f LEA 0x20(,%RAX,8),%RAX |
0x78c97 VXORPD %XMM7,%XMM7,%XMM7 |
0x78c9b JMP 78cd0 |
(1722) 0x78cc0 MOV %R15,%R13 |
(1722) 0x78cc3 ADD $0x20,%RAX |
(1722) 0x78cc7 DEC %R12 |
(1722) 0x78cca JE 78a6c |
(1722) 0x78cd0 MOV %R13,%R15 |
(1722) 0x78cd3 MOV -0xd0(%RBP),%RDX |
(1722) 0x78cda MOV -0x18(%RDX,%RAX,1),%RDX |
(1722) 0x78cdf XOR %R13D,%R13D |
(1722) 0x78ce2 CMP %RDI,(%RBX,%RDX,8) |
(1722) 0x78ce6 SETGE %R13B |
(1722) 0x78cea XOR %R11D,%R11D |
(1722) 0x78ced CMP %R14,%RDX |
(1722) 0x78cf0 SETE %R11B |
(1722) 0x78cf4 CMP %R13B,%R11B |
(1722) 0x78cf7 CMOVA %R11D,%R13D |
(1722) 0x78cfb CMP $0x1,%R13B |
(1722) 0x78cff JNE 78d20 |
(1722) 0x78d01 MOV -0x58(%RBP),%RDX |
(1722) 0x78d05 VMOVSD -0x18(%RDX,%RAX,1),%XMM8 |
(1722) 0x78d0b VMULSD %XMM6,%XMM8,%XMM9 |
(1722) 0x78d0f VADDSD %XMM5,%XMM8,%XMM8 |
(1722) 0x78d13 VCMPSD $0x1,%XMM7,%XMM9,%K1 |
(1722) 0x78d1a VMOVSD %XMM8,%XMM5,%XMM5{%K1} |
(1722) 0x78d20 MOV -0xd0(%RBP),%RDX |
(1722) 0x78d27 MOV -0x10(%RDX,%RAX,1),%RDX |
(1722) 0x78d2c XOR %R11D,%R11D |
(1722) 0x78d2f CMP %RDI,(%RBX,%RDX,8) |
(1722) 0x78d33 SETGE %R11B |
(1722) 0x78d37 XOR %R13D,%R13D |
(1722) 0x78d3a CMP %R14,%RDX |
(1722) 0x78d3d SETE %R13B |
(1722) 0x78d41 CMP %R11B,%R13B |
(1722) 0x78d44 CMOVA %R13D,%R11D |
(1722) 0x78d48 CMP $0x1,%R11B |
(1722) 0x78d4c JNE 78d6d |
(1722) 0x78d4e MOV -0x58(%RBP),%RDX |
(1722) 0x78d52 VMOVSD -0x10(%RDX,%RAX,1),%XMM8 |
(1722) 0x78d58 VMULSD %XMM6,%XMM8,%XMM9 |
(1722) 0x78d5c VADDSD %XMM5,%XMM8,%XMM8 |
(1722) 0x78d60 VCMPSD $0x1,%XMM7,%XMM9,%K1 |
(1722) 0x78d67 VMOVSD %XMM8,%XMM5,%XMM5{%K1} |
(1722) 0x78d6d MOV -0xd0(%RBP),%RDX |
(1722) 0x78d74 MOV -0x8(%RDX,%RAX,1),%RDX |
(1722) 0x78d79 XOR %R11D,%R11D |
(1722) 0x78d7c CMP %RDI,(%RBX,%RDX,8) |
(1722) 0x78d80 SETGE %R11B |
(1722) 0x78d84 XOR %R13D,%R13D |
(1722) 0x78d87 CMP %R14,%RDX |
(1722) 0x78d8a SETE %R13B |
(1722) 0x78d8e CMP %R11B,%R13B |
(1722) 0x78d91 CMOVA %R13D,%R11D |
(1722) 0x78d95 CMP $0x1,%R11B |
(1722) 0x78d99 JNE 78dba |
(1722) 0x78d9b MOV -0x58(%RBP),%RDX |
(1722) 0x78d9f VMOVSD -0x8(%RDX,%RAX,1),%XMM8 |
(1722) 0x78da5 VMULSD %XMM6,%XMM8,%XMM9 |
(1722) 0x78da9 VADDSD %XMM5,%XMM8,%XMM8 |
(1722) 0x78dad VCMPSD $0x1,%XMM7,%XMM9,%K1 |
(1722) 0x78db4 VMOVSD %XMM8,%XMM5,%XMM5{%K1} |
(1722) 0x78dba MOV -0xd0(%RBP),%RDX |
(1722) 0x78dc1 MOV (%RDX,%RAX,1),%RDX |
(1722) 0x78dc5 XOR %R11D,%R11D |
(1722) 0x78dc8 CMP %RDI,(%RBX,%RDX,8) |
(1722) 0x78dcc SETGE %R11B |
(1722) 0x78dd0 XOR %R13D,%R13D |
(1722) 0x78dd3 CMP %R14,%RDX |
(1722) 0x78dd6 SETE %R13B |
(1722) 0x78dda CMP %R11B,%R13B |
(1722) 0x78ddd CMOVA %R13D,%R11D |
(1722) 0x78de1 CMP $0x1,%R11B |
(1722) 0x78de5 JNE 78cc0 |
(1722) 0x78deb MOV -0x58(%RBP),%RDX |
(1722) 0x78def VMOVSD (%RDX,%RAX,1),%XMM8 |
(1722) 0x78df4 VMULSD %XMM6,%XMM8,%XMM9 |
(1722) 0x78df8 VADDSD %XMM5,%XMM8,%XMM8 |
(1722) 0x78dfc VCMPSD $0x1,%XMM7,%XMM9,%K1 |
(1722) 0x78e03 VMOVSD %XMM8,%XMM5,%XMM5{%K1} |
(1722) 0x78e09 JMP 78cc0 |
0x78e40 MOV %RDX,%R15 |
0x78e43 SHR $0x2,%R15 |
0x78e47 LEA 0x18(,%RAX,8),%RDX |
0x78e4f JMP 78e8d |
(1720) 0x78e80 ADD $0x20,%RDX |
(1720) 0x78e84 DEC %R15 |
(1720) 0x78e87 JE 78bd6 |
(1720) 0x78e8d MOV -0xa0(%RBP),%R11 |
(1720) 0x78e94 MOV -0x18(%R11,%RDX,1),%R11 |
(1720) 0x78e99 MOV -0x38(%RBP),%R13 |
(1720) 0x78e9d CMP %RSI,(%R13,%R11,8) |
(1720) 0x78ea2 JL 78ec4 |
(1720) 0x78ea4 MOV -0x70(%RBP),%R11 |
(1720) 0x78ea8 VMOVSD -0x18(%R11,%RDX,1),%XMM7 |
(1720) 0x78eaf VMULSD %XMM6,%XMM7,%XMM8 |
(1720) 0x78eb3 VADDSD %XMM5,%XMM7,%XMM7 |
(1720) 0x78eb7 VCMPSD $0x1,%XMM0,%XMM8,%K1 |
(1720) 0x78ebe VMOVSD %XMM7,%XMM5,%XMM5{%K1} |
(1720) 0x78ec4 MOV -0xa0(%RBP),%R11 |
(1720) 0x78ecb MOV -0x10(%R11,%RDX,1),%R11 |
(1720) 0x78ed0 MOV -0x38(%RBP),%R13 |
(1720) 0x78ed4 CMP %RSI,(%R13,%R11,8) |
(1720) 0x78ed9 JL 78efb |
(1720) 0x78edb MOV -0x70(%RBP),%R11 |
(1720) 0x78edf VMOVSD -0x10(%R11,%RDX,1),%XMM7 |
(1720) 0x78ee6 VMULSD %XMM6,%XMM7,%XMM8 |
(1720) 0x78eea VADDSD %XMM5,%XMM7,%XMM7 |
(1720) 0x78eee VCMPSD $0x1,%XMM0,%XMM8,%K1 |
(1720) 0x78ef5 VMOVSD %XMM7,%XMM5,%XMM5{%K1} |
(1720) 0x78efb MOV -0xa0(%RBP),%R11 |
(1720) 0x78f02 MOV -0x8(%R11,%RDX,1),%R11 |
(1720) 0x78f07 MOV -0x38(%RBP),%R13 |
(1720) 0x78f0b CMP %RSI,(%R13,%R11,8) |
(1720) 0x78f10 JL 78f32 |
(1720) 0x78f12 MOV -0x70(%RBP),%R11 |
(1720) 0x78f16 VMOVSD -0x8(%R11,%RDX,1),%XMM7 |
(1720) 0x78f1d VMULSD %XMM6,%XMM7,%XMM8 |
(1720) 0x78f21 VADDSD %XMM5,%XMM7,%XMM7 |
(1720) 0x78f25 VCMPSD $0x1,%XMM0,%XMM8,%K1 |
(1720) 0x78f2c VMOVSD %XMM7,%XMM5,%XMM5{%K1} |
(1720) 0x78f32 MOV -0xa0(%RBP),%R11 |
(1720) 0x78f39 MOV (%R11,%RDX,1),%R11 |
(1720) 0x78f3d MOV -0x38(%RBP),%R13 |
(1720) 0x78f41 CMP %RSI,(%R13,%R11,8) |
(1720) 0x78f46 JL 78e80 |
(1720) 0x78f4c MOV -0x70(%RBP),%R11 |
(1720) 0x78f50 VMOVSD (%R11,%RDX,1),%XMM7 |
(1720) 0x78f56 VMULSD %XMM6,%XMM7,%XMM8 |
(1720) 0x78f5a VADDSD %XMM5,%XMM7,%XMM7 |
(1720) 0x78f5e VCMPSD $0x1,%XMM0,%XMM8,%K1 |
(1720) 0x78f65 VMOVSD %XMM7,%XMM5,%XMM5{%K1} |
(1720) 0x78f6b JMP 78e80 |
0x78f80 MOV -0xf8(%RBP),%R13 |
0x78f87 MOV -0x30(%RBP),%R15 |
0x78f8b VUCOMISD %XMM0,%XMM5 |
0x78f8f MOV -0x58(%RBP),%RAX |
0x78f93 VMOVSD (%RAX,%R9,8),%XMM6 |
0x78f99 JE 79040 |
0x78f9f VDIVSD %XMM5,%XMM6,%XMM5 |
0x78fa3 CMP %RCX,%R10 |
0x78fa6 MOV -0x38(%RBP),%R12 |
0x78faa JGE 79094 |
0x78fb0 VCVTSI2SDQ -0x68(%RBP),%XMM10,%XMM6 |
0x78fb6 MOV -0x88(%RBP),%RDX |
0x78fbd MOV %EDX,%EAX |
0x78fbf NOT %EAX |
0x78fc1 ADD %ECX,%EAX |
0x78fc3 TEST $0x1,%AL |
0x78fc5 JE 7908b |
0x78fcb MOV -0xd0(%RBP),%RAX |
0x78fd2 MOV 0x8(%RAX,%RDX,8),%RAX |
0x78fd7 MOV (%RBX,%RAX,8),%RDX |
0x78fdb CMP %RDI,%RDX |
0x78fde JL 79012 |
0x78fe0 MOV -0x58(%RBP),%R10 |
0x78fe4 MOV -0x88(%RBP),%R11 |
0x78feb VMOVSD 0x8(%R10,%R11,8),%XMM7 |
0x78ff2 VMULSD %XMM6,%XMM7,%XMM8 |
0x78ff6 VUCOMISD %XMM0,%XMM8 |
0x78ffa JAE 79012 |
0x78ffc MOV -0x98(%RBP),%R10 |
0x79003 MOV (%R10),%R10 |
0x79006 VFMADD213SD (%R10,%RDX,8),%XMM5,%XMM7 |
0x7900c VMOVSD %XMM7,(%R10,%RDX,8) |
0x79012 CMP %R14,%RAX |
0x79015 JNE 79080 |
0x79017 MOV -0x58(%RBP),%RAX |
0x7901b MOV -0x88(%RBP),%RDX |
0x79022 VMOVSD 0x8(%RAX,%RDX,8),%XMM7 |
0x79028 VMULSD %XMM6,%XMM7,%XMM8 |
0x7902c VFMADD213SD %XMM4,%XMM5,%XMM7 |
0x79031 VCMPSD $0x1,%XMM0,%XMM8,%K1 |
0x79038 VMOVSD %XMM7,%XMM4,%XMM4{%K1} |
0x7903e JMP 79087 |
0x79040 VADDSD %XMM4,%XMM6,%XMM4 |
0x79044 MOV -0x38(%RBP),%R12 |
0x79048 JMP 789de |
0x79080 MOV -0x88(%RBP),%RDX |
0x79087 LEA 0x2(%RDX),%R10 |
0x7908b LEA -0x2(%RCX),%RAX |
0x7908f CMP %RDX,%RAX |
0x79092 JNE 79109 |
0x79094 CMPQ $0x2,-0x60(%RBP) |
0x79099 JL 789de |
0x7909f MOV -0x168(%RBP),%RCX |
0x790a6 MOV -0xf0(%RBP),%RDX |
0x790ad MOV (%RCX,%RDX,8),%RAX |
0x790b1 MOV 0x8(%RCX,%RDX,8),%RCX |
0x790b6 MOV %RCX,%R10 |
0x790b9 SUB %RAX,%R10 |
0x790bc JLE 789de |
0x790c2 VCVTSI2SDQ -0x68(%RBP),%XMM10,%XMM6 |
0x790c8 CMP $0x4,%R10 |
0x790cc JAE 79280 |
0x790d2 MOV %R10,%RDX |
0x790d5 AND $-0x4,%RDX |
0x790d9 CMP %R10,%RDX |
0x790dc JAE 79400 |
0x790e2 ADD %RDX,%RAX |
0x790e5 MOV -0x30(%RBP),%R15 |
0x790e9 JMP 7920c |
(1718) 0x79100 ADD $0x2,%R10 |
(1718) 0x79104 CMP %R10,%RCX |
(1718) 0x79107 JE 79094 |
(1718) 0x79109 MOV -0xd0(%RBP),%RAX |
(1718) 0x79110 MOV (%RAX,%R10,8),%RAX |
(1718) 0x79114 MOV (%RBX,%RAX,8),%RDX |
(1718) 0x79118 CMP %RDI,%RDX |
(1718) 0x7911b JL 7914b |
(1718) 0x7911d MOV -0x58(%RBP),%R11 |
(1718) 0x79121 VMOVSD (%R11,%R10,8),%XMM7 |
(1718) 0x79127 VMULSD %XMM6,%XMM7,%XMM8 |
(1718) 0x7912b VUCOMISD %XMM0,%XMM8 |
(1718) 0x7912f JAE 7914b |
(1718) 0x79131 MOV -0x98(%RBP),%R11 |
(1718) 0x79138 MOV (%R11),%R15 |
(1718) 0x7913b VFMADD213SD (%R15,%RDX,8),%XMM5,%XMM7 |
(1718) 0x79141 VMOVSD %XMM7,(%R15,%RDX,8) |
(1718) 0x79147 MOV -0x30(%RBP),%R15 |
(1718) 0x7914b CMP %R14,%RAX |
(1718) 0x7914e JNE 79170 |
(1718) 0x79150 MOV -0x58(%RBP),%RAX |
(1718) 0x79154 VMOVSD (%RAX,%R10,8),%XMM7 |
(1718) 0x7915a VMULSD %XMM6,%XMM7,%XMM8 |
(1718) 0x7915e VFMADD213SD %XMM4,%XMM5,%XMM7 |
(1718) 0x79163 VCMPSD $0x1,%XMM0,%XMM8,%K1 |
(1718) 0x7916a VMOVSD %XMM7,%XMM4,%XMM4{%K1} |
(1718) 0x79170 MOV -0xd0(%RBP),%RAX |
(1718) 0x79177 MOV 0x8(%RAX,%R10,8),%RAX |
(1718) 0x7917c MOV (%RBX,%RAX,8),%RDX |
(1718) 0x79180 CMP %RDI,%RDX |
(1718) 0x79183 JL 791b4 |
(1718) 0x79185 MOV -0x58(%RBP),%R11 |
(1718) 0x79189 VMOVSD 0x8(%R11,%R10,8),%XMM7 |
(1718) 0x79190 VMULSD %XMM6,%XMM7,%XMM8 |
(1718) 0x79194 VUCOMISD %XMM0,%XMM8 |
(1718) 0x79198 JAE 791b4 |
(1718) 0x7919a MOV -0x98(%RBP),%R11 |
(1718) 0x791a1 MOV (%R11),%R15 |
(1718) 0x791a4 VFMADD213SD (%R15,%RDX,8),%XMM5,%XMM7 |
(1718) 0x791aa VMOVSD %XMM7,(%R15,%RDX,8) |
(1718) 0x791b0 MOV -0x30(%RBP),%R15 |
(1718) 0x791b4 CMP %R14,%RAX |
(1718) 0x791b7 JNE 79100 |
(1718) 0x791bd MOV -0x58(%RBP),%RAX |
(1718) 0x791c1 VMOVSD 0x8(%RAX,%R10,8),%XMM7 |
(1718) 0x791c8 VMULSD %XMM6,%XMM7,%XMM8 |
(1718) 0x791cc VFMADD213SD %XMM4,%XMM5,%XMM7 |
(1718) 0x791d1 VCMPSD $0x1,%XMM0,%XMM8,%K1 |
(1718) 0x791d8 VMOVSD %XMM7,%XMM4,%XMM4{%K1} |
(1718) 0x791de JMP 79100 |
(1716) 0x79200 INC %RAX |
(1716) 0x79203 CMP %RAX,%RCX |
(1716) 0x79206 JE 789de |
(1716) 0x7920c MOV -0xa0(%RBP),%RDX |
(1716) 0x79213 MOV (%RDX,%RAX,8),%RDX |
(1716) 0x79217 MOV (%R12,%RDX,8),%RDX |
(1716) 0x7921b CMP %RSI,%RDX |
(1716) 0x7921e JL 79200 |
(1716) 0x79220 MOV -0x70(%RBP),%R10 |
(1716) 0x79224 VMOVSD (%R10,%RAX,8),%XMM7 |
(1716) 0x7922a VMULSD %XMM6,%XMM7,%XMM8 |
(1716) 0x7922e VUCOMISD %XMM0,%XMM8 |
(1716) 0x79232 JAE 79200 |
(1716) 0x79234 MOV -0x80(%RBP),%R10 |
(1716) 0x79238 MOV (%R10),%R10 |
(1716) 0x7923b VFMADD213SD (%R10,%RDX,8),%XMM5,%XMM7 |
(1716) 0x79241 VMOVSD %XMM7,(%R10,%RDX,8) |
(1716) 0x79247 JMP 79200 |
0x79280 MOV %R10,%RDX |
0x79283 SHR $0x2,%RDX |
0x79287 LEA 0x18(,%RAX,8),%R11 |
0x7928f JMP 792cd |
(1717) 0x792c0 ADD $0x20,%R11 |
(1717) 0x792c4 DEC %RDX |
(1717) 0x792c7 JE 790d2 |
(1717) 0x792cd MOV -0xa0(%RBP),%R15 |
(1717) 0x792d4 MOV -0x18(%R15,%R11,1),%R15 |
(1717) 0x792d9 MOV (%R12,%R15,8),%R15 |
(1717) 0x792dd CMP %RSI,%R15 |
(1717) 0x792e0 JL 79313 |
(1717) 0x792e2 MOV -0x70(%RBP),%R12 |
(1717) 0x792e6 VMOVSD -0x18(%R12,%R11,1),%XMM7 |
(1717) 0x792ed MOV -0x38(%RBP),%R12 |
(1717) 0x792f1 VMULSD %XMM6,%XMM7,%XMM8 |
(1717) 0x792f5 VUCOMISD %XMM0,%XMM8 |
(1717) 0x792f9 JAE 79313 |
(1717) 0x792fb MOV -0x80(%RBP),%R12 |
(1717) 0x792ff MOV (%R12),%R12 |
(1717) 0x79303 VFMADD213SD (%R12,%R15,8),%XMM5,%XMM7 |
(1717) 0x79309 VMOVSD %XMM7,(%R12,%R15,8) |
(1717) 0x7930f MOV -0x38(%RBP),%R12 |
(1717) 0x79313 MOV -0xa0(%RBP),%R15 |
(1717) 0x7931a MOV -0x10(%R15,%R11,1),%R15 |
(1717) 0x7931f MOV (%R12,%R15,8),%R15 |
(1717) 0x79323 CMP %RSI,%R15 |
(1717) 0x79326 JL 79359 |
(1717) 0x79328 MOV -0x70(%RBP),%R12 |
(1717) 0x7932c VMOVSD -0x10(%R12,%R11,1),%XMM7 |
(1717) 0x79333 MOV -0x38(%RBP),%R12 |
(1717) 0x79337 VMULSD %XMM6,%XMM7,%XMM8 |
(1717) 0x7933b VUCOMISD %XMM0,%XMM8 |
(1717) 0x7933f JAE 79359 |
(1717) 0x79341 MOV -0x80(%RBP),%R12 |
(1717) 0x79345 MOV (%R12),%R12 |
(1717) 0x79349 VFMADD213SD (%R12,%R15,8),%XMM5,%XMM7 |
(1717) 0x7934f VMOVSD %XMM7,(%R12,%R15,8) |
(1717) 0x79355 MOV -0x38(%RBP),%R12 |
(1717) 0x79359 MOV -0xa0(%RBP),%R15 |
(1717) 0x79360 MOV -0x8(%R15,%R11,1),%R15 |
(1717) 0x79365 MOV (%R12,%R15,8),%R15 |
(1717) 0x79369 CMP %RSI,%R15 |
(1717) 0x7936c JL 7939f |
(1717) 0x7936e MOV -0x70(%RBP),%R12 |
(1717) 0x79372 VMOVSD -0x8(%R12,%R11,1),%XMM7 |
(1717) 0x79379 MOV -0x38(%RBP),%R12 |
(1717) 0x7937d VMULSD %XMM6,%XMM7,%XMM8 |
(1717) 0x79381 VUCOMISD %XMM0,%XMM8 |
(1717) 0x79385 JAE 7939f |
(1717) 0x79387 MOV -0x80(%RBP),%R12 |
(1717) 0x7938b MOV (%R12),%R12 |
(1717) 0x7938f VFMADD213SD (%R12,%R15,8),%XMM5,%XMM7 |
(1717) 0x79395 VMOVSD %XMM7,(%R12,%R15,8) |
(1717) 0x7939b MOV -0x38(%RBP),%R12 |
(1717) 0x7939f MOV -0xa0(%RBP),%R15 |
(1717) 0x793a6 MOV (%R15,%R11,1),%R15 |
(1717) 0x793aa MOV (%R12,%R15,8),%R15 |
(1717) 0x793ae CMP %RSI,%R15 |
(1717) 0x793b1 JL 792c0 |
(1717) 0x793b7 MOV -0x70(%RBP),%R12 |
(1717) 0x793bb VMOVSD (%R12,%R11,1),%XMM7 |
(1717) 0x793c1 MOV -0x38(%RBP),%R12 |
(1717) 0x793c5 VMULSD %XMM6,%XMM7,%XMM8 |
(1717) 0x793c9 VUCOMISD %XMM0,%XMM8 |
(1717) 0x793cd JAE 792c0 |
(1717) 0x793d3 MOV -0x80(%RBP),%R12 |
(1717) 0x793d7 MOV (%R12),%R12 |
(1717) 0x793db VFMADD213SD (%R12,%R15,8),%XMM5,%XMM7 |
(1717) 0x793e1 VMOVSD %XMM7,(%R12,%R15,8) |
(1717) 0x793e7 MOV -0x38(%RBP),%R12 |
(1717) 0x793eb JMP 792c0 |
0x79400 MOV -0x30(%RBP),%R15 |
0x79404 JMP 789de |
/home/eoseret/qaas_runs_CPU_9468/171-716-5699/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c: 1221 - 1675 |
-------------------------------------------------------------------------------- |
1221: if (n_fine) |
[...] |
1609: for (jj = A_diag_i[i]+1; jj < A_diag_i[i+1]; jj++) |
1610: { /* i1 is a c-point and strongly influences i, accumulate |
1611: * a_(i,i1) into interpolation weight */ |
1612: i1 = A_diag_j[jj]; |
1613: if (P_marker[i1] >= jj_begin_row) |
1614: { |
1615: P_diag_data[P_marker[i1]] += A_diag_data[jj]; |
1616: } |
1617: else if(P_marker[i1] == strong_f_marker) |
1618: { |
1619: sum = zero; |
1620: sgn = 1; |
1621: if(A_diag_data[A_diag_i[i1]] < 0) sgn = -1; |
1622: /* Loop over row of A for point i1 and calculate the sum |
1623: * of the connections to c-points that strongly influence i. */ |
1624: for(jj1 = A_diag_i[i1]+1; jj1 < A_diag_i[i1+1]; jj1++) |
1625: { |
1626: i2 = A_diag_j[jj1]; |
1627: if((P_marker[i2] >= jj_begin_row || i2 == i) && (sgn*A_diag_data[jj1]) < 0) |
1628: sum += A_diag_data[jj1]; |
1629: } |
1630: if(num_procs > 1) |
1631: { |
1632: for(jj1 = A_offd_i[i1]; jj1< A_offd_i[i1+1]; jj1++) |
1633: { |
1634: i2 = A_offd_j[jj1]; |
1635: if(P_marker_offd[i2] >= jj_begin_row_offd && |
1636: (sgn*A_offd_data[jj1]) < 0) |
1637: sum += A_offd_data[jj1]; |
1638: } |
1639: } |
1640: if(sum != 0) |
1641: { |
1642: distribute = A_diag_data[jj]/sum; |
1643: /* Loop over row of A for point i1 and do the distribution */ |
1644: for(jj1 = A_diag_i[i1]+1; jj1 < A_diag_i[i1+1]; jj1++) |
1645: { |
1646: i2 = A_diag_j[jj1]; |
1647: if(P_marker[i2] >= jj_begin_row && (sgn*A_diag_data[jj1]) < 0) |
1648: P_diag_data[P_marker[i2]] += |
1649: distribute*A_diag_data[jj1]; |
1650: if(i2 == i && (sgn*A_diag_data[jj1]) < 0) |
1651: diagonal += distribute*A_diag_data[jj1]; |
1652: } |
1653: if(num_procs > 1) |
1654: { |
1655: for(jj1 = A_offd_i[i1]; jj1 < A_offd_i[i1+1]; jj1++) |
1656: { |
1657: i2 = A_offd_j[jj1]; |
1658: if(P_marker_offd[i2] >= jj_begin_row_offd && |
1659: (sgn*A_offd_data[jj1]) < 0) |
1660: P_offd_data[P_marker_offd[i2]] += |
[...] |
1667: diagonal += A_diag_data[jj]; |
1668: } |
1669: } |
1670: /* neighbor i1 weakly influences i, accumulate a_(i,i1) into |
1671: * diagonal */ |
1672: else if (CF_marker[i1] != -3) |
1673: { |
1674: if(num_functions == 1 || dof_func[i] == dof_func[i1]) |
1675: diagonal += A_diag_data[jj]; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.86 |
CQA speedup if FP arith vectorized | 2.53 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.31 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildExtPIInterp.extracted |
Source | par_lr_interp.c:1221-1221,par_lr_interp.c:1609-1609,par_lr_interp.c:1612-1617,par_lr_interp.c:1621-1621,par_lr_interp.c:1624-1624,par_lr_interp.c:1627-1627,par_lr_interp.c:1630-1632,par_lr_interp.c:1635-1636,par_lr_interp.c:1640-1650,par_lr_interp.c:1653-1655,par_lr_interp.c:1659-1660,par_lr_interp.c:1667-1667,par_lr_interp.c:1672-1675 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 28.83 |
CQA cycles if no scalar integer | 15.50 |
CQA cycles if FP arith vectorized | 11.38 |
CQA cycles if fully vectorized | 3.60 |
Front-end cycles | 28.83 |
DIV/SQRT cycles | 16.50 |
P0 cycles | 15.20 |
P1 cycles | 22.00 |
P2 cycles | 22.00 |
P3 cycles | 4.00 |
P4 cycles | 15.40 |
P5 cycles | 16.50 |
P6 cycles | 4.00 |
P7 cycles | 4.00 |
P8 cycles | 4.00 |
P9 cycles | 15.40 |
P10 cycles | 22.00 |
P11 cycles | 4.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 29.14 - 29.19 |
Stall cycles (UFS) | 0.00 - 0.04 |
Nb insns | 167.00 |
Nb uops | 169.00 |
Nb loads | 66.00 |
Nb stores | 8.00 |
Nb stack references | 17.00 |
FLOP/cycle | 0.35 |
Nb FLOP add-sub | 3.00 |
Nb FLOP mul | 2.00 |
Nb FLOP fma | 2.00 |
Nb FLOP div | 1.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 20.53 |
Bytes prefetched | 0.00 |
Bytes loaded | 528.00 |
Bytes stored | 64.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 3.23 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 6.06 |
Vector-efficiency ratio all | 12.90 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | 12.50 |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 13.26 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.86 |
CQA speedup if FP arith vectorized | 2.53 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.31 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildExtPIInterp.extracted |
Source | par_lr_interp.c:1221-1221,par_lr_interp.c:1609-1609,par_lr_interp.c:1612-1617,par_lr_interp.c:1621-1621,par_lr_interp.c:1624-1624,par_lr_interp.c:1627-1627,par_lr_interp.c:1630-1632,par_lr_interp.c:1635-1636,par_lr_interp.c:1640-1650,par_lr_interp.c:1653-1655,par_lr_interp.c:1659-1660,par_lr_interp.c:1667-1667,par_lr_interp.c:1672-1675 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 28.83 |
CQA cycles if no scalar integer | 15.50 |
CQA cycles if FP arith vectorized | 11.38 |
CQA cycles if fully vectorized | 3.60 |
Front-end cycles | 28.83 |
DIV/SQRT cycles | 16.50 |
P0 cycles | 15.20 |
P1 cycles | 22.00 |
P2 cycles | 22.00 |
P3 cycles | 4.00 |
P4 cycles | 15.40 |
P5 cycles | 16.50 |
P6 cycles | 4.00 |
P7 cycles | 4.00 |
P8 cycles | 4.00 |
P9 cycles | 15.40 |
P10 cycles | 22.00 |
P11 cycles | 4.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 29.14 - 29.19 |
Stall cycles (UFS) | 0.00 - 0.04 |
Nb insns | 167.00 |
Nb uops | 169.00 |
Nb loads | 66.00 |
Nb stores | 8.00 |
Nb stack references | 17.00 |
FLOP/cycle | 0.35 |
Nb FLOP add-sub | 3.00 |
Nb FLOP mul | 2.00 |
Nb FLOP fma | 2.00 |
Nb FLOP div | 1.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 20.53 |
Bytes prefetched | 0.00 |
Bytes loaded | 528.00 |
Bytes stored | 64.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 3.23 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 6.06 |
Vector-efficiency ratio all | 12.90 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | 12.50 |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 13.26 |
Path / |
Function | hypre_BoomerAMGBuildExtPIInterp.extracted |
Source file and lines | par_lr_interp.c:1221-1675 |
Module | libparcsr_ls.so |
nb instructions | 167 |
nb uops | 169 |
loop length | 776 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 7 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 17 |
ADD-SUB / MUL ratio | 1.50 |
micro-operation queue | 28.83 cycles |
front end | 28.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 16.50 | 15.20 | 22.00 | 22.00 | 4.00 | 15.40 | 16.50 | 4.00 | 4.00 | 4.00 | 15.40 | 22.00 |
cycles | 16.50 | 15.20 | 22.00 | 22.00 | 4.00 | 15.40 | 16.50 | 4.00 | 4.00 | 4.00 | 15.40 | 22.00 |
Cycles executing div or sqrt instructions | 4.00 |
FE+BE cycles | 29.14-29.19 |
Stall cycles | 0.00-0.04 |
Front-end | 28.83 |
Dispatch | 22.00 |
DIV/SQRT | 4.00 |
Overall L1 | 28.83 |
all | 2% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 3% |
all | 5% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | 0% |
other | 16% |
all | 3% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | 0% |
other | 6% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 13% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | 12% |
div/sqrt | 12% |
other | 14% |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | 12% |
div/sqrt | 12% |
other | 13% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x98(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RCX,%RAX,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDSD (%RDX,%R9,8),%XMM5,%XMM5 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMOVSD %XMM5,(%RCX,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP -0xb0(%RBP),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 788f1 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1ef1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xd0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%R9,8),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX,%R10,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 789c0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1fc0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP %R8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 78b40 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2140> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x198(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%R10,8),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPXOR %XMM5,%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VUCOMISD (%RDX,%R11,8),%XMM5 | 2 | 1 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R10,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%RCX,%R10,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SETBE %AL | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
LEA -0x1(%RAX,%RAX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%R11),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RCX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R11,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JGE 78b80 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2180> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDQ -0x68(%RBP),%XMM10,%XMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
NOT %R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RCX,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R11,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x4,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 78c80 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2280> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x60(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 78b80 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2180> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x88(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDX,%RAX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JMP 78acc <hypre_BoomerAMGBuildExtPIInterp.extracted+0x20cc> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
CMPQ $-0x3,(%R13,%R10,8) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 789de <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1fde> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x1,-0x190(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 78b6b <hypre_BoomerAMGBuildExtPIInterp.extracted+0x216b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x188(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%R14,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP (%RCX,%R10,8),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 789de <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1fde> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDSD (%RAX,%R9,8),%XMM4,%XMM4 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
JMP 789de <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1fde> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0xe0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x2,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 78f87 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2587> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x168(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xf0(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R11,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDX,%R11,8),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x30(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JLE 78f8b <hypre_BoomerAMGBuildExtPIInterp.extracted+0x258b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDQ -0x68(%RBP),%XMM10,%XMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
CMP $0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 78e40 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2440> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xd8(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R11,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 78f80 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2580> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xf8(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 78c0c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x220c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x60(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SHR $0x2,%R12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x20(,%RAX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VXORPD %XMM7,%XMM7,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 78cd0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x22d0> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %RDX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%R15 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(,%RAX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 78e8d <hypre_BoomerAMGBuildExtPIInterp.extracted+0x248d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0xf8(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VUCOMISD %XMM0,%XMM5 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RAX,%R9,8),%XMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 79040 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2640> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VDIVSD %XMM5,%XMM6,%XMM5 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 4 |
CMP %RCX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x38(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 79094 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2694> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDQ -0x68(%RBP),%XMM10,%XMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
MOV -0x88(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOT %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ECX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST $0x1,%AL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 7908b <hypre_BoomerAMGBuildExtPIInterp.extracted+0x268b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xd0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX,%RDX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX,%RAX,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 79012 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2612> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x58(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x88(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x8(%R10,%R11,8),%XMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD %XMM6,%XMM7,%XMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VUCOMISD %XMM0,%XMM8 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JAE 79012 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2612> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x98(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R10),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD213SD (%R10,%RDX,8),%XMM5,%XMM7 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM7,(%R10,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R14,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 79080 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2680> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x88(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x8(%RAX,%RDX,8),%XMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD %XMM6,%XMM7,%XMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD213SD %XMM4,%XMM5,%XMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPSD $0x1,%XMM0,%XMM8,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVSD %XMM7,%XMM4,%XMM4{%K1} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JMP 79087 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2687> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
VADDSD %XMM4,%XMM6,%XMM4 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOV -0x38(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 789de <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1fde> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0x88(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x2(%RDX),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x2(%RCX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 79109 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2709> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x2,-0x60(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 789de <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1fde> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x168(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xf0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RDX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%RDX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 789de <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1fde> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDQ -0x68(%RBP),%XMM10,%XMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
CMP $0x4,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 79280 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2880> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R10,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R10,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 79400 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2a00> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x30(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 7920c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x280c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV %R10,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(,%RAX,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 792cd <hypre_BoomerAMGBuildExtPIInterp.extracted+0x28cd> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x30(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 789de <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1fde> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
Function | hypre_BoomerAMGBuildExtPIInterp.extracted |
Source file and lines | par_lr_interp.c:1221-1675 |
Module | libparcsr_ls.so |
nb instructions | 167 |
nb uops | 169 |
loop length | 776 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 7 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 17 |
ADD-SUB / MUL ratio | 1.50 |
micro-operation queue | 28.83 cycles |
front end | 28.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 16.50 | 15.20 | 22.00 | 22.00 | 4.00 | 15.40 | 16.50 | 4.00 | 4.00 | 4.00 | 15.40 | 22.00 |
cycles | 16.50 | 15.20 | 22.00 | 22.00 | 4.00 | 15.40 | 16.50 | 4.00 | 4.00 | 4.00 | 15.40 | 22.00 |
Cycles executing div or sqrt instructions | 4.00 |
FE+BE cycles | 29.14-29.19 |
Stall cycles | 0.00-0.04 |
Front-end | 28.83 |
Dispatch | 22.00 |
DIV/SQRT | 4.00 |
Overall L1 | 28.83 |
all | 2% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 3% |
all | 5% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | 0% |
other | 16% |
all | 3% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | 0% |
other | 6% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 13% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | 12% |
div/sqrt | 12% |
other | 14% |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | 12% |
div/sqrt | 12% |
other | 13% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x98(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RCX,%RAX,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDSD (%RDX,%R9,8),%XMM5,%XMM5 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMOVSD %XMM5,(%RCX,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP -0xb0(%RBP),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 788f1 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1ef1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xd0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%R9,8),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX,%R10,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 789c0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1fc0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP %R8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 78b40 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2140> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x198(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%R10,8),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPXOR %XMM5,%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VUCOMISD (%RDX,%R11,8),%XMM5 | 2 | 1 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R10,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%RCX,%R10,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SETBE %AL | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
LEA -0x1(%RAX,%RAX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%R11),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RCX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R11,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JGE 78b80 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2180> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDQ -0x68(%RBP),%XMM10,%XMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
NOT %R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RCX,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R11,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x4,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 78c80 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2280> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x60(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 78b80 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2180> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x88(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDX,%RAX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JMP 78acc <hypre_BoomerAMGBuildExtPIInterp.extracted+0x20cc> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
CMPQ $-0x3,(%R13,%R10,8) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 789de <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1fde> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x1,-0x190(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 78b6b <hypre_BoomerAMGBuildExtPIInterp.extracted+0x216b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x188(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%R14,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP (%RCX,%R10,8),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 789de <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1fde> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDSD (%RAX,%R9,8),%XMM4,%XMM4 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
JMP 789de <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1fde> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0xe0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x2,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 78f87 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2587> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x168(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xf0(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R11,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDX,%R11,8),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x30(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JLE 78f8b <hypre_BoomerAMGBuildExtPIInterp.extracted+0x258b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDQ -0x68(%RBP),%XMM10,%XMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
CMP $0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 78e40 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2440> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xd8(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R11,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 78f80 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2580> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xf8(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 78c0c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x220c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x60(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SHR $0x2,%R12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x20(,%RAX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VXORPD %XMM7,%XMM7,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 78cd0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x22d0> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %RDX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%R15 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(,%RAX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 78e8d <hypre_BoomerAMGBuildExtPIInterp.extracted+0x248d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0xf8(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VUCOMISD %XMM0,%XMM5 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RAX,%R9,8),%XMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 79040 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2640> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VDIVSD %XMM5,%XMM6,%XMM5 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 4 |
CMP %RCX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x38(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 79094 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2694> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDQ -0x68(%RBP),%XMM10,%XMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
MOV -0x88(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOT %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ECX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST $0x1,%AL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 7908b <hypre_BoomerAMGBuildExtPIInterp.extracted+0x268b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xd0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX,%RDX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX,%RAX,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 79012 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2612> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x58(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x88(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x8(%R10,%R11,8),%XMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD %XMM6,%XMM7,%XMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VUCOMISD %XMM0,%XMM8 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JAE 79012 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2612> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x98(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R10),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD213SD (%R10,%RDX,8),%XMM5,%XMM7 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM7,(%R10,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R14,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 79080 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2680> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x88(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x8(%RAX,%RDX,8),%XMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD %XMM6,%XMM7,%XMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD213SD %XMM4,%XMM5,%XMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPSD $0x1,%XMM0,%XMM8,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVSD %XMM7,%XMM4,%XMM4{%K1} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JMP 79087 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2687> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
VADDSD %XMM4,%XMM6,%XMM4 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOV -0x38(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 789de <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1fde> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0x88(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x2(%RDX),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x2(%RCX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 79109 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2709> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x2,-0x60(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 789de <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1fde> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x168(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xf0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RDX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%RDX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 789de <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1fde> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDQ -0x68(%RBP),%XMM10,%XMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
CMP $0x4,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 79280 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2880> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R10,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R10,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 79400 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2a00> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x30(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 7920c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x280c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV %R10,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(,%RAX,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 792cd <hypre_BoomerAMGBuildExtPIInterp.extracted+0x28cd> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x30(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 789de <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1fde> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |