Function: hypre_BoomerAMGBuildMultipass._omp_fn.9 | Module: libparcsr_ls.so | Source: par_multi_interp.c:1575-1663 [...] | Coverage: 0.6% |
---|
Function: hypre_BoomerAMGBuildMultipass._omp_fn.9 | Module: libparcsr_ls.so | Source: par_multi_interp.c:1575-1663 [...] | Coverage: 0.6% |
---|
/home/eoseret/qaas_runs_CPU_9468/171-716-5699/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 1575 - 1663 |
-------------------------------------------------------------------------------- |
1575: #pragma omp parallel private(thread_start,thread_stop,my_thread_num,num_threads,k,k1,i,i1,j,j1,sum_C,sum_N,j_start,j_end,cnt,tmp_marker,tmp_marker_offd,cnt_offd,diagonal,alfa) |
[...] |
1584: tmp_marker = NULL; |
1585: if (n_fine) |
1586: { tmp_marker = hypre_CTAlloc(HYPRE_Int,n_fine); } |
1587: tmp_marker_offd = NULL; |
1588: if (num_cols_offd) |
1589: { tmp_marker_offd = hypre_CTAlloc(HYPRE_Int,num_cols_offd); } |
1590: for (i=0; i < n_fine; i++) |
1591: { tmp_marker[i] = -1; } |
1592: for (i=0; i < num_cols_offd; i++) |
1593: { tmp_marker_offd[i] = -1; } |
1594: |
1595: /* Compute this thread's range of pass_length */ |
1596: my_thread_num = hypre_GetThreadNum(); |
1597: num_threads = hypre_NumActiveThreads(); |
1598: thread_start = pass_pointer[1] + (pass_length/num_threads)*my_thread_num; |
1599: if (my_thread_num == num_threads-1) |
1600: { thread_stop = pass_pointer[1] + pass_length; } |
1601: else |
1602: { thread_stop = pass_pointer[1] + (pass_length/num_threads)*(my_thread_num+1); } |
1603: |
1604: /* determine P for points of pass 1, i.e. neighbors of coarse points */ |
1605: for (i=thread_start; i < thread_stop; i++) |
1606: { |
1607: i1 = pass_array[i]; |
1608: sum_C = 0; |
1609: sum_N = 0; |
1610: j_start = P_diag_start[i1]; |
1611: j_end = j_start+P_diag_i[i1+1]-P_diag_i[i1]; |
1612: for (j=j_start; j < j_end; j++) |
1613: { |
1614: k1 = P_diag_pass[1][j]; |
1615: tmp_marker[C_array[k1]] = i1; |
1616: } |
1617: cnt = P_diag_i[i1]; |
1618: for (j=A_diag_i[i1]+1; j < A_diag_i[i1+1]; j++) |
1619: { |
1620: j1 = A_diag_j[j]; |
1621: if (CF_marker[j1] != -3 && |
1622: (num_functions == 1 || dof_func[i1] == dof_func[j1])) |
1623: sum_N += A_diag_data[j]; |
1624: if (j1 != -1 && tmp_marker[j1] == i1) |
1625: { |
1626: P_diag_data[cnt] = A_diag_data[j]; |
1627: P_diag_j[cnt++] = fine_to_coarse[j1]; |
1628: sum_C += A_diag_data[j]; |
1629: } |
1630: } |
1631: j_start = P_offd_start[i1]; |
1632: j_end = j_start+P_offd_i[i1+1]-P_offd_i[i1]; |
1633: for (j=j_start; j < j_end; j++) |
1634: { |
1635: k1 = P_offd_pass[1][j]; |
1636: tmp_marker_offd[C_array_offd[k1]] = i1; |
1637: } |
1638: cnt_offd = P_offd_i[i1]; |
1639: for (j=A_offd_i[i1]; j < A_offd_i[i1+1]; j++) |
1640: { |
1641: if (col_offd_S_to_A) |
1642: j1 = map_A_to_S[A_offd_j[j]]; |
1643: else |
1644: j1 = A_offd_j[j]; |
1645: if (CF_marker_offd[j1] != -3 && |
1646: (num_functions == 1 || dof_func[i1] == dof_func_offd[j1])) |
1647: sum_N += A_offd_data[j]; |
1648: if (j1 != -1 && tmp_marker_offd[j1] == i1) |
1649: { |
1650: P_offd_data[cnt_offd] = A_offd_data[j]; |
1651: P_offd_j[cnt_offd++] = map_S_to_new[j1]; |
1652: sum_C += A_offd_data[j]; |
1653: } |
1654: } |
1655: diagonal = A_diag_data[A_diag_i[i1]]; |
1656: if (sum_C*diagonal) alfa = -sum_N/(sum_C*diagonal); |
1657: for (j=P_diag_i[i1]; j < cnt; j++) |
1658: P_diag_data[j] *= alfa; |
1659: for (j=P_offd_i[i1]; j < cnt_offd; j++) |
1660: P_offd_data[j] *= alfa; |
1661: } |
1662: hypre_TFree(tmp_marker); |
1663: hypre_TFree(tmp_marker_offd); |
0x84a40 PUSH %RBP |
0x84a41 MOV %RSP,%RBP |
0x84a44 PUSH %R15 |
0x84a46 PUSH %R14 |
0x84a48 PUSH %R13 |
0x84a4a PUSH %R12 |
0x84a4c PUSH %RBX |
0x84a4d AND $-0x20,%RSP |
0x84a51 SUB $0x100,%RSP |
0x84a58 MOV 0xf8(%RDI),%RAX |
0x84a5f MOV 0xe0(%RDI),%RCX |
0x84a66 MOV 0xd8(%RDI),%RSI |
0x84a6d MOV 0xd0(%RDI),%R8 |
0x84a74 MOV 0xc8(%RDI),%R9 |
0x84a7b MOV 0xc0(%RDI),%R10 |
0x84a82 MOV %RAX,0xe0(%RSP) |
0x84a8a MOV 0xb8(%RDI),%R11 |
0x84a91 MOV 0xb0(%RDI),%R12 |
0x84a98 MOV %RCX,0x8(%RSP) |
0x84a9d MOV 0xa8(%RDI),%R13 |
0x84aa4 MOV 0x90(%RDI),%RAX |
0x84aab MOV %RSI,0xa0(%RSP) |
0x84ab3 MOV 0xf0(%RDI),%RDX |
0x84aba MOV 0xe8(%RDI),%RBX |
0x84ac1 MOV %R8,0x38(%RSP) |
0x84ac6 MOV %R9,0x30(%RSP) |
0x84acb MOV 0xa0(%RDI),%R14 |
0x84ad2 MOV %R10,0x70(%RSP) |
0x84ad7 MOV 0x98(%RDI),%R15 |
0x84ade MOV %R11,0x68(%RSP) |
0x84ae3 MOV %R12,0xd8(%RSP) |
0x84aeb MOV %R13,0x80(%RSP) |
0x84af3 MOV %RAX,0xc8(%RSP) |
0x84afb MOV %RDX,0xa8(%RSP) |
0x84b03 MOV 0x88(%RDI),%RDX |
0x84b0a MOV 0x80(%RDI),%RCX |
0x84b11 MOV 0x78(%RDI),%RSI |
0x84b15 MOV 0x68(%RDI),%R8 |
0x84b19 MOV 0x60(%RDI),%R9 |
0x84b1d MOV %RDX,0x28(%RSP) |
0x84b22 MOV 0x40(%RDI),%RAX |
0x84b26 MOV 0x38(%RDI),%RDX |
0x84b2a MOV %RCX,0x98(%RSP) |
0x84b32 MOV 0x70(%RDI),%R10 |
0x84b36 MOV 0x30(%RDI),%RCX |
0x84b3a MOV %RSI,0x60(%RSP) |
0x84b3f MOV 0x58(%RDI),%R11 |
0x84b43 MOV 0x28(%RDI),%RSI |
0x84b47 MOV %R8,0x90(%RSP) |
0x84b4f MOV 0x50(%RDI),%R12 |
0x84b53 MOV 0x20(%RDI),%R8 |
0x84b57 MOV %R9,0x58(%RSP) |
0x84b5c MOV 0x48(%RDI),%R13 |
0x84b60 MOV 0x18(%RDI),%R9 |
0x84b64 MOV %RAX,0x50(%RSP) |
0x84b69 MOV %RDX,0xe8(%RSP) |
0x84b71 MOV 0x10(%RDI),%RAX |
0x84b75 MOV 0x8(%RDI),%RDX |
0x84b79 MOV (%RDI),%RDI |
0x84b7c MOV %RCX,0x20(%RSP) |
0x84b81 MOV %RSI,0x48(%RSP) |
0x84b86 MOV %R8,0xf8(%RSP) |
0x84b8e MOV %R9,0x18(%RSP) |
0x84b93 MOV %RAX,0xd0(%RSP) |
0x84b9b MOV %RDX,0xf0(%RSP) |
0x84ba3 MOV %RDI,0x10(%RSP) |
0x84ba8 TEST %RBX,%RBX |
0x84bab JNE 8578e |
0x84bb1 TEST %R12,%R12 |
0x84bb4 JNE 85910 |
0x84bba XOR %EBX,%EBX |
0x84bbc XOR %R12D,%R12D |
0x84bbf MOV %R11,0x88(%RSP) |
0x84bc7 MOV %R10,0xb0(%RSP) |
0x84bcf VMOVSD %XMM1,0xb8(%RSP) |
0x84bd8 CALL c9a0 <hypre_GetThreadNum@plt> |
0x84bdd MOV %RAX,0xc0(%RSP) |
0x84be5 CALL cb00 <hypre_NumActiveThreads@plt> |
0x84bea MOV 0xc0(%RSP),%R10 |
0x84bf2 MOV 0xd8(%RSP),%R8 |
0x84bfa MOV %RAX,%R9 |
0x84bfd MOV 0xe0(%RSP),%RAX |
0x84c05 MOV 0xe0(%RSP),%RSI |
0x84c0d MOV %R10,%R11 |
0x84c10 MOV 0x8(%R8),%RCX |
0x84c14 VMOVSD 0xb8(%RSP),%XMM11 |
0x84c1d CQTO |
0x84c1f IDIV %R9 |
0x84c22 ADD %RCX,%RSI |
0x84c25 DEC %R9 |
0x84c28 MOV %RSI,%R8 |
0x84c2b IMUL %RAX,%R11 |
0x84c2f ADD %R11,%RAX |
0x84c32 LEA (%RCX,%R11,1),%RDI |
0x84c36 MOV 0x88(%RSP),%R11 |
0x84c3e ADD %RCX,%RAX |
0x84c41 CMP %R9,%R10 |
0x84c44 MOV 0xb0(%RSP),%R10 |
0x84c4c CMOVNE %RAX,%R8 |
0x84c50 CMP %RDI,%R8 |
0x84c53 JLE 8553e |
0x84c59 MOV 0x80(%RSP),%R9 |
0x84c61 VMOVQ 0x9c8f7(%RIP),%XMM5 |
0x84c69 VXORPD %XMM4,%XMM4,%XMM4 |
0x84c6d LEA (%R9,%RDI,8),%RCX |
0x84c71 LEA (%R9,%R8,8),%RAX |
0x84c75 MOV %RCX,0xd8(%RSP) |
0x84c7d MOV %RAX,0x40(%RSP) |
0x84c82 NOPW (%RAX,%RAX,1) |
(888) 0x84c88 MOV 0xd8(%RSP),%RDX |
(888) 0x84c90 MOV 0x58(%RSP),%RCX |
(888) 0x84c95 MOV 0x68(%RSP),%RDI |
(888) 0x84c9a MOV (%RDX),%RDX |
(888) 0x84c9d LEA (,%RDX,8),%R8 |
(888) 0x84ca5 MOV (%RDI,%RDX,8),%R9 |
(888) 0x84ca9 LEA (%RCX,%R8,1),%RAX |
(888) 0x84cad LEA 0x8(%R8),%RSI |
(888) 0x84cb1 MOV (%RAX),%RDI |
(888) 0x84cb4 MOV %RAX,0xc0(%RSP) |
(888) 0x84cbc MOV 0x8(%RCX,%R8,1),%RAX |
(888) 0x84cc1 MOV %RSI,0xe0(%RSP) |
(888) 0x84cc9 ADD %R9,%RAX |
(888) 0x84ccc SUB %RDI,%RAX |
(888) 0x84ccf CMP %RAX,%R9 |
(888) 0x84cd2 JGE 84e19 |
(888) 0x84cd8 MOV 0x30(%RSP),%RDI |
(888) 0x84cdd MOV 0x8(%RDI),%RSI |
(888) 0x84ce1 LEA (%RSI,%RAX,8),%RDI |
(888) 0x84ce5 LEA (%RSI,%R9,8),%RCX |
(888) 0x84ce9 MOV %RDI,%R9 |
(888) 0x84cec SUB %RCX,%R9 |
(888) 0x84cef SUB $0x8,%R9 |
(888) 0x84cf3 SHR $0x3,%R9 |
(888) 0x84cf7 INC %R9 |
(888) 0x84cfa AND $0x7,%R9D |
(888) 0x84cfe JE 84d96 |
(888) 0x84d04 CMP $0x1,%R9 |
(888) 0x84d08 JE 84d82 |
(888) 0x84d0a CMP $0x2,%R9 |
(888) 0x84d0e JE 84d73 |
(888) 0x84d10 CMP $0x3,%R9 |
(888) 0x84d14 JE 84d64 |
(888) 0x84d16 CMP $0x4,%R9 |
(888) 0x84d1a JE 84d55 |
(888) 0x84d1c CMP $0x5,%R9 |
(888) 0x84d20 JE 84d46 |
(888) 0x84d22 CMP $0x6,%R9 |
(888) 0x84d26 JE 84d37 |
(888) 0x84d28 MOV (%RCX),%RAX |
(888) 0x84d2b ADD $0x8,%RCX |
(888) 0x84d2f MOV (%R15,%RAX,8),%RSI |
(888) 0x84d33 MOV %RDX,(%R12,%RSI,8) |
(888) 0x84d37 MOV (%RCX),%R9 |
(888) 0x84d3a ADD $0x8,%RCX |
(888) 0x84d3e MOV (%R15,%R9,8),%RAX |
(888) 0x84d42 MOV %RDX,(%R12,%RAX,8) |
(888) 0x84d46 MOV (%RCX),%RSI |
(888) 0x84d49 ADD $0x8,%RCX |
(888) 0x84d4d MOV (%R15,%RSI,8),%R9 |
(888) 0x84d51 MOV %RDX,(%R12,%R9,8) |
(888) 0x84d55 MOV (%RCX),%RAX |
(888) 0x84d58 ADD $0x8,%RCX |
(888) 0x84d5c MOV (%R15,%RAX,8),%RSI |
(888) 0x84d60 MOV %RDX,(%R12,%RSI,8) |
(888) 0x84d64 MOV (%RCX),%R9 |
(888) 0x84d67 ADD $0x8,%RCX |
(888) 0x84d6b MOV (%R15,%R9,8),%RAX |
(888) 0x84d6f MOV %RDX,(%R12,%RAX,8) |
(888) 0x84d73 MOV (%RCX),%RSI |
(888) 0x84d76 ADD $0x8,%RCX |
(888) 0x84d7a MOV (%R15,%RSI,8),%R9 |
(888) 0x84d7e MOV %RDX,(%R12,%R9,8) |
(888) 0x84d82 MOV (%RCX),%RAX |
(888) 0x84d85 ADD $0x8,%RCX |
(888) 0x84d89 MOV (%R15,%RAX,8),%RSI |
(888) 0x84d8d MOV %RDX,(%R12,%RSI,8) |
(888) 0x84d91 CMP %RCX,%RDI |
(888) 0x84d94 JE 84e0e |
(888) 0x84d96 MOV 0xe0(%RSP),%R9 |
(897) 0x84d9e MOV (%RCX),%RAX |
(897) 0x84da1 ADD $0x40,%RCX |
(897) 0x84da5 MOV (%R15,%RAX,8),%RSI |
(897) 0x84da9 MOV %RDX,(%R12,%RSI,8) |
(897) 0x84dad MOV -0x38(%RCX),%RAX |
(897) 0x84db1 MOV (%R15,%RAX,8),%RSI |
(897) 0x84db5 MOV %RDX,(%R12,%RSI,8) |
(897) 0x84db9 MOV -0x30(%RCX),%RAX |
(897) 0x84dbd MOV (%R15,%RAX,8),%RSI |
(897) 0x84dc1 MOV %RDX,(%R12,%RSI,8) |
(897) 0x84dc5 MOV -0x28(%RCX),%RAX |
(897) 0x84dc9 MOV (%R15,%RAX,8),%RSI |
(897) 0x84dcd MOV %RDX,(%R12,%RSI,8) |
(897) 0x84dd1 MOV -0x20(%RCX),%RAX |
(897) 0x84dd5 MOV (%R15,%RAX,8),%RSI |
(897) 0x84dd9 MOV %RDX,(%R12,%RSI,8) |
(897) 0x84ddd MOV -0x18(%RCX),%RAX |
(897) 0x84de1 MOV (%R15,%RAX,8),%RSI |
(897) 0x84de5 MOV %RDX,(%R12,%RSI,8) |
(897) 0x84de9 MOV -0x10(%RCX),%RAX |
(897) 0x84ded MOV (%R15,%RAX,8),%RSI |
(897) 0x84df1 MOV %RDX,(%R12,%RSI,8) |
(897) 0x84df5 MOV -0x8(%RCX),%RAX |
(897) 0x84df9 MOV (%R15,%RAX,8),%RSI |
(897) 0x84dfd MOV %RDX,(%R12,%RSI,8) |
(897) 0x84e01 CMP %RCX,%RDI |
(897) 0x84e04 JNE 84d9e |
(888) 0x84e06 MOV %R9,0xe0(%RSP) |
(888) 0x84e0e MOV 0xc0(%RSP),%RCX |
(888) 0x84e16 MOV (%RCX),%RDI |
(888) 0x84e19 MOV 0x48(%RSP),%RSI |
(888) 0x84e1e MOV 0xe0(%RSP),%RCX |
(888) 0x84e26 VXORPD %XMM0,%XMM0,%XMM0 |
(888) 0x84e2a VMOVSD %XMM0,%XMM0,%XMM2 |
(888) 0x84e2e LEA (%RSI,%R8,1),%R9 |
(888) 0x84e32 ADD %RCX,%RSI |
(888) 0x84e35 MOV (%R9),%RAX |
(888) 0x84e38 MOV %R9,0xb0(%RSP) |
(888) 0x84e40 MOV %RAX,0xb8(%RSP) |
(888) 0x84e48 INC %RAX |
(888) 0x84e4b CMP (%RSI),%RAX |
(888) 0x84e4e JGE 84f27 |
(888) 0x84e54 CMPQ $0x1,0xf0(%RSP) |
(888) 0x84e5d MOV %RBX,0xb8(%RSP) |
(888) 0x84e65 JE 85560 |
(888) 0x84e6b MOV %R14,0x88(%RSP) |
(888) 0x84e73 MOV 0x20(%RSP),%R9 |
(888) 0x84e78 MOV %R10,0x80(%RSP) |
(888) 0x84e80 MOV 0xd0(%RSP),%R10 |
(888) 0x84e88 MOV %R13,0x78(%RSP) |
(888) 0x84e8d MOV 0x10(%RSP),%R13 |
(888) 0x84e92 NOPW (%RAX,%RAX,1) |
(896) 0x84e98 MOV (%R9,%RAX,8),%RCX |
(896) 0x84e9c CMPQ $-0x3,(%R13,%RCX,8) |
(896) 0x84ea2 JE 84ebb |
(896) 0x84ea4 MOV (%R10,%RCX,8),%R14 |
(896) 0x84ea8 CMP %R14,(%R10,%R8,1) |
(896) 0x84eac JNE 84ebb |
(896) 0x84eae MOV 0xf8(%RSP),%RBX |
(896) 0x84eb6 VADDSD (%RBX,%RAX,8),%XMM0,%XMM0 |
(896) 0x84ebb CMP $-0x1,%RCX |
(896) 0x84ebf JE 84f02 |
(896) 0x84ec1 CMP (%R12,%RCX,8),%RDX |
(896) 0x84ec5 JNE 84f02 |
(896) 0x84ec7 MOV 0xf8(%RSP),%R14 |
(896) 0x84ecf LEA (,%RDI,8),%RBX |
(896) 0x84ed7 VMOVSD (%R14,%RAX,8),%XMM6 |
(896) 0x84edd MOV 0xa8(%RSP),%R14 |
(896) 0x84ee5 MOV (%R14,%RCX,8),%RCX |
(896) 0x84ee9 MOV 0x90(%RSP),%R14 |
(896) 0x84ef1 VMOVSD %XMM6,(%R11,%RDI,8) |
(896) 0x84ef7 VADDSD %XMM6,%XMM2,%XMM2 |
(896) 0x84efb INC %RDI |
(896) 0x84efe MOV %RCX,(%R14,%RBX,1) |
(896) 0x84f02 INC %RAX |
(896) 0x84f05 CMP (%RSI),%RAX |
(896) 0x84f08 JL 84e98 |
(888) 0x84f0a MOV 0xb8(%RSP),%RBX |
(888) 0x84f12 MOV 0x88(%RSP),%R14 |
(888) 0x84f1a MOV 0x80(%RSP),%R10 |
(888) 0x84f22 MOV 0x78(%RSP),%R13 |
(888) 0x84f27 MOV 0x60(%RSP),%R9 |
(888) 0x84f2c MOV 0x70(%RSP),%RSI |
(888) 0x84f31 MOV %R9,%RAX |
(888) 0x84f34 MOV (%RSI,%RDX,8),%RCX |
(888) 0x84f38 ADD %R8,%RAX |
(888) 0x84f3b MOV (%RAX),%RSI |
(888) 0x84f3e MOV %RAX,0xb8(%RSP) |
(888) 0x84f46 MOV 0x8(%R9,%R8,1),%RAX |
(888) 0x84f4b ADD %RCX,%RAX |
(888) 0x84f4e SUB %RSI,%RAX |
(888) 0x84f51 CMP %RAX,%RCX |
(888) 0x84f54 JGE 8509a |
(888) 0x84f5a MOV 0x38(%RSP),%RSI |
(888) 0x84f5f MOV 0x8(%RSI),%R9 |
(888) 0x84f63 LEA (%R9,%RAX,8),%RSI |
(888) 0x84f67 LEA (%R9,%RCX,8),%RCX |
(888) 0x84f6b MOV %RSI,%RAX |
(888) 0x84f6e SUB %RCX,%RAX |
(888) 0x84f71 SUB $0x8,%RAX |
(888) 0x84f75 SHR $0x3,%RAX |
(888) 0x84f79 INC %RAX |
(888) 0x84f7c AND $0x7,%EAX |
(888) 0x84f7f JE 85017 |
(888) 0x84f85 CMP $0x1,%RAX |
(888) 0x84f89 JE 85003 |
(888) 0x84f8b CMP $0x2,%RAX |
(888) 0x84f8f JE 84ff4 |
(888) 0x84f91 CMP $0x3,%RAX |
(888) 0x84f95 JE 84fe5 |
(888) 0x84f97 CMP $0x4,%RAX |
(888) 0x84f9b JE 84fd6 |
(888) 0x84f9d CMP $0x5,%RAX |
(888) 0x84fa1 JE 84fc7 |
(888) 0x84fa3 CMP $0x6,%RAX |
(888) 0x84fa7 JE 84fb8 |
(888) 0x84fa9 MOV (%RCX),%R9 |
(888) 0x84fac ADD $0x8,%RCX |
(888) 0x84fb0 MOV (%R14,%R9,8),%RAX |
(888) 0x84fb4 MOV %RDX,(%RBX,%RAX,8) |
(888) 0x84fb8 MOV (%RCX),%R9 |
(888) 0x84fbb ADD $0x8,%RCX |
(888) 0x84fbf MOV (%R14,%R9,8),%RAX |
(888) 0x84fc3 MOV %RDX,(%RBX,%RAX,8) |
(888) 0x84fc7 MOV (%RCX),%R9 |
(888) 0x84fca ADD $0x8,%RCX |
(888) 0x84fce MOV (%R14,%R9,8),%RAX |
(888) 0x84fd2 MOV %RDX,(%RBX,%RAX,8) |
(888) 0x84fd6 MOV (%RCX),%R9 |
(888) 0x84fd9 ADD $0x8,%RCX |
(888) 0x84fdd MOV (%R14,%R9,8),%RAX |
(888) 0x84fe1 MOV %RDX,(%RBX,%RAX,8) |
(888) 0x84fe5 MOV (%RCX),%R9 |
(888) 0x84fe8 ADD $0x8,%RCX |
(888) 0x84fec MOV (%R14,%R9,8),%RAX |
(888) 0x84ff0 MOV %RDX,(%RBX,%RAX,8) |
(888) 0x84ff4 MOV (%RCX),%R9 |
(888) 0x84ff7 ADD $0x8,%RCX |
(888) 0x84ffb MOV (%R14,%R9,8),%RAX |
(888) 0x84fff MOV %RDX,(%RBX,%RAX,8) |
(888) 0x85003 MOV (%RCX),%R9 |
(888) 0x85006 ADD $0x8,%RCX |
(888) 0x8500a MOV (%R14,%R9,8),%RAX |
(888) 0x8500e MOV %RDX,(%RBX,%RAX,8) |
(888) 0x85012 CMP %RCX,%RSI |
(888) 0x85015 JE 8508f |
(888) 0x85017 MOV 0xe0(%RSP),%R9 |
(894) 0x8501f MOV (%RCX),%RAX |
(894) 0x85022 ADD $0x40,%RCX |
(894) 0x85026 MOV (%R14,%RAX,8),%RAX |
(894) 0x8502a MOV %RDX,(%RBX,%RAX,8) |
(894) 0x8502e MOV -0x38(%RCX),%RAX |
(894) 0x85032 MOV (%R14,%RAX,8),%RAX |
(894) 0x85036 MOV %RDX,(%RBX,%RAX,8) |
(894) 0x8503a MOV -0x30(%RCX),%RAX |
(894) 0x8503e MOV (%R14,%RAX,8),%RAX |
(894) 0x85042 MOV %RDX,(%RBX,%RAX,8) |
(894) 0x85046 MOV -0x28(%RCX),%RAX |
(894) 0x8504a MOV (%R14,%RAX,8),%RAX |
(894) 0x8504e MOV %RDX,(%RBX,%RAX,8) |
(894) 0x85052 MOV -0x20(%RCX),%RAX |
(894) 0x85056 MOV (%R14,%RAX,8),%RAX |
(894) 0x8505a MOV %RDX,(%RBX,%RAX,8) |
(894) 0x8505e MOV -0x18(%RCX),%RAX |
(894) 0x85062 MOV (%R14,%RAX,8),%RAX |
(894) 0x85066 MOV %RDX,(%RBX,%RAX,8) |
(894) 0x8506a MOV -0x10(%RCX),%RAX |
(894) 0x8506e MOV (%R14,%RAX,8),%RAX |
(894) 0x85072 MOV %RDX,(%RBX,%RAX,8) |
(894) 0x85076 MOV -0x8(%RCX),%RAX |
(894) 0x8507a MOV (%R14,%RAX,8),%RAX |
(894) 0x8507e MOV %RDX,(%RBX,%RAX,8) |
(894) 0x85082 CMP %RCX,%RSI |
(894) 0x85085 JNE 8501f |
(888) 0x85087 MOV %R9,0xe0(%RSP) |
(888) 0x8508f MOV 0xb8(%RSP),%RCX |
(888) 0x85097 MOV (%RCX),%RSI |
(888) 0x8509a MOV 0x50(%RSP),%RCX |
(888) 0x8509f MOV 0xe0(%RSP),%R9 |
(888) 0x850a7 MOV (%RCX,%RDX,8),%RAX |
(888) 0x850ab ADD %RCX,%R9 |
(888) 0x850ae CMP %RAX,(%R9) |
(888) 0x850b1 JLE 856e0 |
(888) 0x850b7 CMPQ $0,0x18(%RSP) |
(888) 0x850bd JE 85608 |
(888) 0x850c3 MOV %R11,0x88(%RSP) |
(888) 0x850cb MOV 0x28(%RSP),%R11 |
(888) 0x850d0 MOV %RDI,0x78(%RSP) |
(888) 0x850d5 MOV 0x8(%RSP),%RDI |
(888) 0x850da MOV %R14,0xe0(%RSP) |
(888) 0x850e2 MOV %R12,0x80(%RSP) |
(888) 0x850ea JMP 85159 |
0x850ec NOPL (%RAX) |
(893) 0x850f0 MOV 0xc8(%RSP),%R12 |
(893) 0x850f8 MOV 0xd0(%RSP),%R14 |
(893) 0x85100 MOV (%R12,%RCX,8),%R12 |
(893) 0x85104 CMP %R12,(%R14,%R8,1) |
(893) 0x85108 JE 85178 |
(893) 0x8510a CMP $-0x1,%RCX |
(893) 0x8510e JE 85151 |
(893) 0x85110 CMP (%RBX,%RCX,8),%RDX |
(893) 0x85114 JNE 85151 |
(893) 0x85116 MOV 0xe8(%RSP),%R12 |
(893) 0x8511e LEA (,%RSI,8),%R14 |
(893) 0x85126 VMOVSD (%R12,%RAX,8),%XMM7 |
(893) 0x8512c MOV 0xa0(%RSP),%R12 |
(893) 0x85134 MOV (%R12,%RCX,8),%RCX |
(893) 0x85138 MOV 0x98(%RSP),%R12 |
(893) 0x85140 VMOVSD %XMM7,(%R10,%RSI,8) |
(893) 0x85146 VADDSD %XMM7,%XMM2,%XMM2 |
(893) 0x8514a INC %RSI |
(893) 0x8514d MOV %RCX,(%R12,%R14,1) |
(893) 0x85151 INC %RAX |
(893) 0x85154 CMP (%R9),%RAX |
(893) 0x85157 JGE 85190 |
(893) 0x85159 MOV (%R13,%RAX,8),%R12 |
(893) 0x8515e MOV (%RDI,%R12,8),%RCX |
(893) 0x85162 CMPQ $-0x3,(%R11,%RCX,8) |
(893) 0x85167 JE 8510a |
(893) 0x85169 CMPQ $0x1,0xf0(%RSP) |
(893) 0x85172 JNE 850f0 |
(893) 0x85178 MOV 0xe8(%RSP),%R14 |
(893) 0x85180 VADDSD (%R14,%RAX,8),%XMM0,%XMM0 |
(893) 0x85186 JMP 8510a |
0x85188 NOPL (%RAX,%RAX,1) |
(888) 0x85190 MOV 0xe0(%RSP),%R14 |
(888) 0x85198 MOV 0x88(%RSP),%R11 |
(888) 0x851a0 MOV 0x80(%RSP),%R12 |
(888) 0x851a8 MOV 0x78(%RSP),%RDI |
(888) 0x851ad MOV 0xb8(%RSP),%RDX |
(888) 0x851b5 MOV (%RDX),%R8 |
(888) 0x851b8 MOV 0xb0(%RSP),%RAX |
(888) 0x851c0 MOV 0xf8(%RSP),%RCX |
(888) 0x851c8 MOV (%RAX),%R9 |
(888) 0x851cb VMULSD (%RCX,%R9,8),%XMM2,%XMM10 |
(888) 0x851d1 VCOMISD %XMM4,%XMM10 |
(888) 0x851d5 JE 851e0 |
(888) 0x851d7 VXORPD %XMM5,%XMM0,%XMM1 |
(888) 0x851db VDIVSD %XMM10,%XMM1,%XMM11 |
(888) 0x851e0 MOV 0xc0(%RSP),%RDX |
(888) 0x851e8 MOV (%RDX),%RCX |
(888) 0x851eb CMP %RDI,%RCX |
(888) 0x851ee JGE 8537a |
(888) 0x851f4 SUB %RCX,%RDI |
(888) 0x851f7 MOV %RCX,0xe0(%RSP) |
(888) 0x851ff LEA -0x1(%RDI),%RAX |
(888) 0x85203 CMP $0x2,%RAX |
(888) 0x85207 JBE 8577f |
(888) 0x8520d MOV %RDI,%RDX |
(888) 0x85210 LEA (%R11,%RCX,8),%RAX |
(888) 0x85214 VBROADCASTSD %XMM11,%YMM12 |
(888) 0x85219 SHR $0x2,%RDX |
(888) 0x8521d SAL $0x5,%RDX |
(888) 0x85221 LEA (%RDX,%RAX,1),%R9 |
(888) 0x85225 SUB $0x20,%RDX |
(888) 0x85229 SHR $0x5,%RDX |
(888) 0x8522d INC %RDX |
(888) 0x85230 AND $0x7,%EDX |
(888) 0x85233 JE 852bd |
(888) 0x85239 CMP $0x1,%RDX |
(888) 0x8523d JE 852ab |
(888) 0x8523f CMP $0x2,%RDX |
(888) 0x85243 JE 8529e |
(888) 0x85245 CMP $0x3,%RDX |
(888) 0x85249 JE 85291 |
(888) 0x8524b CMP $0x4,%RDX |
(888) 0x8524f JE 85284 |
(888) 0x85251 CMP $0x5,%RDX |
(888) 0x85255 JE 85277 |
(888) 0x85257 CMP $0x6,%RDX |
(888) 0x8525b JE 8526a |
(888) 0x8525d VMULPD (%RAX),%YMM12,%YMM13 |
(888) 0x85261 ADD $0x20,%RAX |
(888) 0x85265 VMOVUPD %YMM13,-0x20(%RAX) |
(888) 0x8526a VMULPD (%RAX),%YMM12,%YMM14 |
(888) 0x8526e ADD $0x20,%RAX |
(888) 0x85272 VMOVUPD %YMM14,-0x20(%RAX) |
(888) 0x85277 VMULPD (%RAX),%YMM12,%YMM15 |
(888) 0x8527b ADD $0x20,%RAX |
(888) 0x8527f VMOVUPD %YMM15,-0x20(%RAX) |
(888) 0x85284 VMULPD (%RAX),%YMM12,%YMM0 |
(888) 0x85288 ADD $0x20,%RAX |
(888) 0x8528c VMOVUPD %YMM0,-0x20(%RAX) |
(888) 0x85291 VMULPD (%RAX),%YMM12,%YMM3 |
(888) 0x85295 ADD $0x20,%RAX |
(888) 0x85299 VMOVUPD %YMM3,-0x20(%RAX) |
(888) 0x8529e VMULPD (%RAX),%YMM12,%YMM2 |
(888) 0x852a2 ADD $0x20,%RAX |
(888) 0x852a6 VMOVUPD %YMM2,-0x20(%RAX) |
(888) 0x852ab VMULPD (%RAX),%YMM12,%YMM6 |
(888) 0x852af ADD $0x20,%RAX |
(888) 0x852b3 VMOVUPD %YMM6,-0x20(%RAX) |
(888) 0x852b8 CMP %RAX,%R9 |
(888) 0x852bb JE 8532c |
(890) 0x852bd VMULPD (%RAX),%YMM12,%YMM7 |
(890) 0x852c1 ADD $0x100,%RAX |
(890) 0x852c7 VMULPD -0xe0(%RAX),%YMM12,%YMM8 |
(890) 0x852cf VMULPD -0xc0(%RAX),%YMM12,%YMM9 |
(890) 0x852d7 VMULPD -0xa0(%RAX),%YMM12,%YMM10 |
(890) 0x852df VMULPD -0x80(%RAX),%YMM12,%YMM1 |
(890) 0x852e4 VMULPD -0x60(%RAX),%YMM12,%YMM13 |
(890) 0x852e9 VMOVUPD %YMM7,-0x100(%RAX) |
(890) 0x852f1 VMULPD -0x40(%RAX),%YMM12,%YMM14 |
(890) 0x852f6 VMOVUPD %YMM8,-0xe0(%RAX) |
(890) 0x852fe VMULPD -0x20(%RAX),%YMM12,%YMM15 |
(890) 0x85303 VMOVUPD %YMM9,-0xc0(%RAX) |
(890) 0x8530b VMOVUPD %YMM10,-0xa0(%RAX) |
(890) 0x85313 VMOVUPD %YMM1,-0x80(%RAX) |
(890) 0x85318 VMOVUPD %YMM13,-0x60(%RAX) |
(890) 0x8531d VMOVUPD %YMM14,-0x40(%RAX) |
(890) 0x85322 VMOVUPD %YMM15,-0x20(%RAX) |
(890) 0x85327 CMP %RAX,%R9 |
(890) 0x8532a JNE 852bd |
(888) 0x8532c TEST $0x3,%DIL |
(888) 0x85330 JE 8537a |
(888) 0x85332 MOV %RDI,%R9 |
(888) 0x85335 AND $-0x4,%R9 |
(888) 0x85339 ADD %R9,%RCX |
(888) 0x8533c SUB %R9,%RDI |
(888) 0x8533f CMP $0x1,%RDI |
(888) 0x85343 JE 8536e |
(888) 0x85345 MOV 0xe0(%RSP),%RAX |
(888) 0x8534d VMOVDDUP %XMM11,%XMM12 |
(888) 0x85352 ADD %R9,%RAX |
(888) 0x85355 LEA (%R11,%RAX,8),%RDX |
(888) 0x85359 VMULPD (%RDX),%XMM12,%XMM0 |
(888) 0x8535d VMOVUPD %XMM0,(%RDX) |
(888) 0x85361 TEST $0x1,%DIL |
(888) 0x85365 JE 8537a |
(888) 0x85367 AND $-0x2,%RDI |
(888) 0x8536b ADD %RDI,%RCX |
(888) 0x8536e LEA (%R11,%RCX,8),%RDI |
(888) 0x85372 VMULSD (%RDI),%XMM11,%XMM3 |
(888) 0x85376 VMOVSD %XMM3,(%RDI) |
(888) 0x8537a CMP %R8,%RSI |
(888) 0x8537d JLE 8551f |
(888) 0x85383 SUB %R8,%RSI |
(888) 0x85386 MOV %R8,%RCX |
(888) 0x85389 LEA -0x1(%RSI),%R9 |
(888) 0x8538d CMP $0x2,%R9 |
(888) 0x85391 JBE 85787 |
(888) 0x85397 MOV %RSI,%RDX |
(888) 0x8539a LEA (%R10,%R8,8),%R9 |
(888) 0x8539e VBROADCASTSD %XMM11,%YMM6 |
(888) 0x853a3 SHR $0x2,%RDX |
(888) 0x853a7 SAL $0x5,%RDX |
(888) 0x853ab LEA (%RDX,%R9,1),%RDI |
(888) 0x853af SUB $0x20,%RDX |
(888) 0x853b3 SHR $0x5,%RDX |
(888) 0x853b7 INC %RDX |
(888) 0x853ba AND $0x7,%EDX |
(888) 0x853bd JE 85459 |
(888) 0x853c3 CMP $0x1,%RDX |
(888) 0x853c7 JE 85441 |
(888) 0x853c9 CMP $0x2,%RDX |
(888) 0x853cd JE 85432 |
(888) 0x853cf CMP $0x3,%RDX |
(888) 0x853d3 JE 85423 |
(888) 0x853d5 CMP $0x4,%RDX |
(888) 0x853d9 JE 85414 |
(888) 0x853db CMP $0x5,%RDX |
(888) 0x853df JE 85405 |
(888) 0x853e1 CMP $0x6,%RDX |
(888) 0x853e5 JE 853f6 |
(888) 0x853e7 VMULPD (%R9),%YMM6,%YMM2 |
(888) 0x853ec ADD $0x20,%R9 |
(888) 0x853f0 VMOVUPD %YMM2,-0x20(%R9) |
(888) 0x853f6 VMULPD (%R9),%YMM6,%YMM7 |
(888) 0x853fb ADD $0x20,%R9 |
(888) 0x853ff VMOVUPD %YMM7,-0x20(%R9) |
(888) 0x85405 VMULPD (%R9),%YMM6,%YMM8 |
(888) 0x8540a ADD $0x20,%R9 |
(888) 0x8540e VMOVUPD %YMM8,-0x20(%R9) |
(888) 0x85414 VMULPD (%R9),%YMM6,%YMM9 |
(888) 0x85419 ADD $0x20,%R9 |
(888) 0x8541d VMOVUPD %YMM9,-0x20(%R9) |
(888) 0x85423 VMULPD (%R9),%YMM6,%YMM10 |
(888) 0x85428 ADD $0x20,%R9 |
(888) 0x8542c VMOVUPD %YMM10,-0x20(%R9) |
(888) 0x85432 VMULPD (%R9),%YMM6,%YMM1 |
(888) 0x85437 ADD $0x20,%R9 |
(888) 0x8543b VMOVUPD %YMM1,-0x20(%R9) |
(888) 0x85441 VMULPD (%R9),%YMM6,%YMM13 |
(888) 0x85446 ADD $0x20,%R9 |
(888) 0x8544a VMOVUPD %YMM13,-0x20(%R9) |
(888) 0x85450 CMP %R9,%RDI |
(888) 0x85453 JE 854d9 |
(889) 0x85459 VMULPD (%R9),%YMM6,%YMM14 |
(889) 0x8545e ADD $0x100,%R9 |
(889) 0x85465 VMULPD -0xe0(%R9),%YMM6,%YMM15 |
(889) 0x8546e VMULPD -0xc0(%R9),%YMM6,%YMM12 |
(889) 0x85477 VMULPD -0xa0(%R9),%YMM6,%YMM0 |
(889) 0x85480 VMULPD -0x80(%R9),%YMM6,%YMM3 |
(889) 0x85486 VMULPD -0x60(%R9),%YMM6,%YMM2 |
(889) 0x8548c VMOVUPD %YMM14,-0x100(%R9) |
(889) 0x85495 VMULPD -0x40(%R9),%YMM6,%YMM7 |
(889) 0x8549b VMOVUPD %YMM15,-0xe0(%R9) |
(889) 0x854a4 VMULPD -0x20(%R9),%YMM6,%YMM8 |
(889) 0x854aa VMOVUPD %YMM12,-0xc0(%R9) |
(889) 0x854b3 VMOVUPD %YMM0,-0xa0(%R9) |
(889) 0x854bc VMOVUPD %YMM3,-0x80(%R9) |
(889) 0x854c2 VMOVUPD %YMM2,-0x60(%R9) |
(889) 0x854c8 VMOVUPD %YMM7,-0x40(%R9) |
(889) 0x854ce VMOVUPD %YMM8,-0x20(%R9) |
(889) 0x854d4 CMP %R9,%RDI |
(889) 0x854d7 JNE 85459 |
(888) 0x854d9 TEST $0x3,%SIL |
(888) 0x854dd JE 8551f |
(888) 0x854df MOV %RSI,%RAX |
(888) 0x854e2 AND $-0x4,%RAX |
(888) 0x854e6 ADD %RAX,%R8 |
(888) 0x854e9 SUB %RAX,%RSI |
(888) 0x854ec CMP $0x1,%RSI |
(888) 0x854f0 JE 85513 |
(888) 0x854f2 ADD %RCX,%RAX |
(888) 0x854f5 VMOVDDUP %XMM11,%XMM6 |
(888) 0x854fa LEA (%R10,%RAX,8),%RCX |
(888) 0x854fe VMULPD (%RCX),%XMM6,%XMM9 |
(888) 0x85502 VMOVUPD %XMM9,(%RCX) |
(888) 0x85506 TEST $0x1,%SIL |
(888) 0x8550a JE 8551f |
(888) 0x8550c AND $-0x2,%RSI |
(888) 0x85510 ADD %RSI,%R8 |
(888) 0x85513 LEA (%R10,%R8,8),%RSI |
(888) 0x85517 VMULSD (%RSI),%XMM11,%XMM10 |
(888) 0x8551b VMOVSD %XMM10,(%RSI) |
(888) 0x8551f ADDQ $0x8,0xd8(%RSP) |
(888) 0x85528 MOV 0xd8(%RSP),%R8 |
(888) 0x85530 CMP %R8,0x40(%RSP) |
(888) 0x85535 JNE 84c88 |
0x8553b VZEROUPPER |
0x8553e MOV %R12,%RDI |
0x85541 CALL c850 <hypre_Free@plt> |
0x85546 LEA -0x28(%RBP),%RSP |
0x8554a MOV %RBX,%RDI |
0x8554d POP %RBX |
0x8554e POP %R12 |
0x85550 POP %R13 |
0x85552 POP %R14 |
0x85554 POP %R15 |
0x85556 POP %RBP |
0x85557 JMP c850 |
0x8555c NOPL (%RAX) |
(888) 0x85560 MOV %R10,0x88(%RSP) |
(888) 0x85568 MOV 0x10(%RSP),%R9 |
(888) 0x8556d MOV %R8,0x80(%RSP) |
(888) 0x85575 MOV 0x20(%RSP),%R8 |
(888) 0x8557a NOPW (%RAX,%RAX,1) |
(895) 0x85580 MOV (%R8,%RAX,8),%RCX |
(895) 0x85584 CMPQ $-0x3,(%R9,%RCX,8) |
(895) 0x85589 JE 85598 |
(895) 0x8558b MOV 0xf8(%RSP),%RBX |
(895) 0x85593 VADDSD (%RBX,%RAX,8),%XMM0,%XMM0 |
(895) 0x85598 CMP $-0x1,%RCX |
(895) 0x8559c JE 855df |
(895) 0x8559e CMP (%R12,%RCX,8),%RDX |
(895) 0x855a2 JNE 855df |
(895) 0x855a4 MOV 0xf8(%RSP),%R10 |
(895) 0x855ac LEA (,%RDI,8),%RBX |
(895) 0x855b4 VMOVSD (%R10,%RAX,8),%XMM3 |
(895) 0x855ba MOV 0xa8(%RSP),%R10 |
(895) 0x855c2 MOV (%R10,%RCX,8),%RCX |
(895) 0x855c6 MOV 0x90(%RSP),%R10 |
(895) 0x855ce VMOVSD %XMM3,(%R11,%RDI,8) |
(895) 0x855d4 VADDSD %XMM3,%XMM2,%XMM2 |
(895) 0x855d8 INC %RDI |
(895) 0x855db MOV %RCX,(%R10,%RBX,1) |
(895) 0x855df INC %RAX |
(895) 0x855e2 CMP (%RSI),%RAX |
(895) 0x855e5 JL 85580 |
(888) 0x855e7 MOV 0xb8(%RSP),%RBX |
(888) 0x855ef MOV 0x88(%RSP),%R10 |
(888) 0x855f7 MOV 0x80(%RSP),%R8 |
(888) 0x855ff JMP 84f27 |
0x85604 NOPL (%RAX) |
(888) 0x85608 CMPQ $0x1,0xf0(%RSP) |
(888) 0x85611 JE 856e8 |
(888) 0x85617 MOV %R14,0xe0(%RSP) |
(888) 0x8561f MOV %R11,0x88(%RSP) |
(888) 0x85627 MOV %RDI,0x80(%RSP) |
(888) 0x8562f MOV 0x28(%RSP),%RDI |
(888) 0x85634 NOPL (%RAX) |
(892) 0x85638 MOV (%R13,%RAX,8),%RCX |
(892) 0x8563d CMPQ $-0x3,(%RDI,%RCX,8) |
(892) 0x85642 JE 8566c |
(892) 0x85644 MOV 0xd0(%RSP),%R11 |
(892) 0x8564c MOV 0xc8(%RSP),%R14 |
(892) 0x85654 MOV (%R11,%R8,1),%R11 |
(892) 0x85658 CMP %R11,(%R14,%RCX,8) |
(892) 0x8565c JNE 8566c |
(892) 0x8565e MOV 0xe8(%RSP),%R14 |
(892) 0x85666 VADDSD (%R14,%RAX,8),%XMM0,%XMM0 |
(892) 0x8566c CMP $-0x1,%RCX |
(892) 0x85670 JE 856b4 |
(892) 0x85672 CMP (%RBX,%RCX,8),%RDX |
(892) 0x85676 JNE 856b4 |
(892) 0x85678 MOV 0xe8(%RSP),%R11 |
(892) 0x85680 LEA (,%RSI,8),%R14 |
(892) 0x85688 VMOVSD (%R11,%RAX,8),%XMM9 |
(892) 0x8568e MOV 0xa0(%RSP),%R11 |
(892) 0x85696 MOV (%R11,%RCX,8),%RCX |
(892) 0x8569a MOV 0x98(%RSP),%R11 |
(892) 0x856a2 VMOVSD %XMM9,(%R10,%RSI,8) |
(892) 0x856a8 VADDSD %XMM9,%XMM2,%XMM2 |
(892) 0x856ad INC %RSI |
(892) 0x856b0 MOV %RCX,(%R11,%R14,1) |
(892) 0x856b4 INC %RAX |
(892) 0x856b7 CMP %RAX,(%R9) |
(892) 0x856ba JG 85638 |
(888) 0x856c0 MOV 0xe0(%RSP),%R14 |
(888) 0x856c8 MOV 0x88(%RSP),%R11 |
(888) 0x856d0 MOV 0x80(%RSP),%RDI |
(888) 0x856d8 JMP 851ad |
0x856dd NOPL (%RAX) |
(888) 0x856e0 MOV %RSI,%R8 |
(888) 0x856e3 JMP 851b8 |
(888) 0x856e8 MOV %R11,0xe0(%RSP) |
(888) 0x856f0 MOV %RDI,0x88(%RSP) |
(888) 0x856f8 MOV 0x28(%RSP),%RDI |
(888) 0x856fd NOPL (%RAX) |
(891) 0x85700 MOV (%R13,%RAX,8),%RCX |
(891) 0x85705 CMPQ $-0x3,(%RDI,%RCX,8) |
(891) 0x8570a JE 8571a |
(891) 0x8570c MOV 0xe8(%RSP),%R8 |
(891) 0x85714 VADDSD (%R8,%RAX,8),%XMM0,%XMM0 |
(891) 0x8571a CMP $-0x1,%RCX |
(891) 0x8571e JE 85762 |
(891) 0x85720 CMP (%RBX,%RCX,8),%RDX |
(891) 0x85724 JNE 85762 |
(891) 0x85726 MOV 0xe8(%RSP),%R11 |
(891) 0x8572e LEA (,%RSI,8),%R8 |
(891) 0x85736 VMOVSD (%R11,%RAX,8),%XMM8 |
(891) 0x8573c MOV 0xa0(%RSP),%R11 |
(891) 0x85744 MOV (%R11,%RCX,8),%RCX |
(891) 0x85748 MOV 0x98(%RSP),%R11 |
(891) 0x85750 VMOVSD %XMM8,(%R10,%RSI,8) |
(891) 0x85756 VADDSD %XMM8,%XMM2,%XMM2 |
(891) 0x8575b INC %RSI |
(891) 0x8575e MOV %RCX,(%R11,%R8,1) |
(891) 0x85762 INC %RAX |
(891) 0x85765 CMP %RAX,(%R9) |
(891) 0x85768 JG 85700 |
(888) 0x8576a MOV 0xe0(%RSP),%R11 |
(888) 0x85772 MOV 0x88(%RSP),%RDI |
(888) 0x8577a JMP 851ad |
(888) 0x8577f XOR %R9D,%R9D |
(888) 0x85782 JMP 8533c |
(888) 0x85787 XOR %EAX,%EAX |
(888) 0x85789 JMP 854e9 |
0x8578e MOV $0x8,%ESI |
0x85793 MOV %RBX,%RDI |
0x85796 MOV %R12,0x78(%RSP) |
0x8579b MOV %R11,0x88(%RSP) |
0x857a3 MOV %R10,0xb0(%RSP) |
0x857ab VMOVSD %XMM1,0xb8(%RSP) |
0x857b4 MOV %RBX,0xc0(%RSP) |
0x857bc CALL ce60 <hypre_CAlloc@plt> |
0x857c1 MOV 0x78(%RSP),%RCX |
0x857c6 MOV 0xc0(%RSP),%RDX |
0x857ce VMOVSD 0xb8(%RSP),%XMM1 |
0x857d7 MOV 0xb0(%RSP),%R10 |
0x857df MOV %RAX,%R12 |
0x857e2 TEST %RCX,%RCX |
0x857e5 MOV 0x88(%RSP),%R11 |
0x857ed JNE 858a6 |
0x857f3 XOR %EBX,%EBX |
0x857f5 TEST %RDX,%RDX |
0x857f8 JLE 84bbf |
0x857fe SAL $0x3,%RDX |
0x85802 MOV $0xff,%ESI |
0x85807 MOV %R12,%RDI |
0x8580a MOV %RCX,0x88(%RSP) |
0x85812 MOV %R11,0xb0(%RSP) |
0x8581a MOV %R10,0xb8(%RSP) |
0x85822 VMOVSD %XMM1,0xc0(%RSP) |
0x8582b CALL c100 <memset@plt> |
0x85830 VMOVSD 0xc0(%RSP),%XMM1 |
0x85839 MOV 0xb8(%RSP),%R10 |
0x85841 MOV 0xb0(%RSP),%R11 |
0x85849 MOV 0x88(%RSP),%RCX |
0x85851 TEST %RCX,%RCX |
0x85854 JLE 84bbf |
0x8585a LEA (,%RCX,8),%RDX |
0x85862 MOV $0xff,%ESI |
0x85867 MOV %RBX,%RDI |
0x8586a MOV %R11,0xb0(%RSP) |
0x85872 MOV %R10,0xb8(%RSP) |
0x8587a VMOVSD %XMM1,0xc0(%RSP) |
0x85883 CALL c100 <memset@plt> |
0x85888 VMOVSD 0xc0(%RSP),%XMM1 |
0x85891 MOV 0xb8(%RSP),%R10 |
0x85899 MOV 0xb0(%RSP),%R11 |
0x858a1 JMP 84bbf |
0x858a6 MOV %RCX,%RDI |
0x858a9 MOV $0x8,%ESI |
0x858ae MOV %R11,0x78(%RSP) |
0x858b3 MOV %R10,0x88(%RSP) |
0x858bb MOV %RDX,0xb0(%RSP) |
0x858c3 MOV %RCX,0xc0(%RSP) |
0x858cb VMOVSD %XMM1,0xb8(%RSP) |
0x858d4 CALL ce60 <hypre_CAlloc@plt> |
0x858d9 MOV 0xb0(%RSP),%RDX |
0x858e1 MOV 0xc0(%RSP),%RCX |
0x858e9 VMOVSD 0xb8(%RSP),%XMM1 |
0x858f2 MOV 0x88(%RSP),%R10 |
0x858fa MOV %RAX,%RBX |
0x858fd TEST %RDX,%RDX |
0x85900 MOV 0x78(%RSP),%R11 |
0x85905 JG 857fe |
0x8590b JMP 85851 |
0x85910 MOV %R12,%RDI |
0x85913 MOV $0x8,%ESI |
0x85918 MOV %R11,0x88(%RSP) |
0x85920 MOV %R10,0xb0(%RSP) |
0x85928 MOV %R12,0xc0(%RSP) |
0x85930 XOR %R12D,%R12D |
0x85933 VMOVSD %XMM1,0xb8(%RSP) |
0x8593c CALL ce60 <hypre_CAlloc@plt> |
0x85941 MOV 0xc0(%RSP),%RCX |
0x85949 VMOVSD 0xb8(%RSP),%XMM1 |
0x85952 MOV 0xb0(%RSP),%R10 |
0x8595a MOV 0x88(%RSP),%R11 |
0x85962 MOV %RAX,%RBX |
0x85965 JMP 85851 |
0x8596a NOPW (%RAX,%RAX,1) |
Path / |
Source file and lines | par_multi_interp.c:1575-1663 |
Module | libparcsr_ls.so |
nb instructions | 202 |
nb uops | 215 |
loop length | 1122 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 4 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 32 |
micro-operation queue | 35.83 cycles |
front end | 35.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 6.40 | 6.40 | 23.00 | 23.00 | 33.00 | 6.40 | 6.40 | 33.00 | 33.00 | 33.00 | 6.40 | 23.00 |
cycles | 6.40 | 7.60 | 23.00 | 23.00 | 33.00 | 6.40 | 6.40 | 33.00 | 33.00 | 33.00 | 6.40 | 23.00 |
Cycles executing div or sqrt instructions | 10.00 |
FE+BE cycles | 34.11-34.15 |
Stall cycles | 0.00 |
Front-end | 35.83 |
Dispatch | 33.00 |
DIV/SQRT | 10.00 |
Overall L1 | 35.83 |
all | 1% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 4% |
all | 7% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 1% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 9% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 10% |
all | 13% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x20,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x100,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0xf8(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe0(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xd8(%RDI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xd0(%RDI),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc8(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc0(%RDI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb8(%RDI),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%RDI),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa8(%RDI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x90(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xf0(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe8(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa0(%RDI),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x80(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%RDI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%RDI),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x60(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RDI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RDI),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RDI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RDI),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RDI),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RDI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDI),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RBX,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 8578e <hypre_BoomerAMGBuildMultipass._omp_fn.9+0xd4e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
TEST %R12,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 85910 <hypre_BoomerAMGBuildMultipass._omp_fn.9+0xed0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EBX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R11,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM1,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL c9a0 <hypre_GetThreadNum@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL cb00 <hypre_NumActiveThreads@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0xc0(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xd8(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xe0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe0(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x8(%R8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0xb8(%RSP),%XMM11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R9 | 5 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 10 |
ADD %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
DEC %R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RSI,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %RAX,%R11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R11,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%RCX,%R11,1),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x88(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R9,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0xb0(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMOVNE %RAX,%R8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %RDI,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 8553e <hypre_BoomerAMGBuildMultipass._omp_fn.9+0xafe> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x80(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVQ 0x9c8f7(%RIP),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM4,%XMM4,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R9,%RDI,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R9,%R8,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RCX,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL c850 <hypre_Free@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP c850 <hypre_Free@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R12,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM1,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL ce60 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x78(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc0(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0xb8(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
TEST %RCX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV 0x88(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 858a6 <hypre_BoomerAMGBuildMultipass._omp_fn.9+0xe66> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EBX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 84bbf <hypre_BoomerAMGBuildMultipass._omp_fn.9+0x17f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SAL $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM1,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL c100 <memset@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
VMOVSD 0xc0(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb8(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x88(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RCX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 84bbf <hypre_BoomerAMGBuildMultipass._omp_fn.9+0x17f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA (,%RCX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R11,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM1,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL c100 <memset@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
VMOVSD 0xc0(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb8(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 84bbf <hypre_BoomerAMGBuildMultipass._omp_fn.9+0x17f> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV %RCX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R11,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM1,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL ce60 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0xb0(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc0(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0xb8(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x88(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV 0x78(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JG 857fe <hypre_BoomerAMGBuildMultipass._omp_fn.9+0xdbe> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 85851 <hypre_BoomerAMGBuildMultipass._omp_fn.9+0xe11> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R11,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVSD %XMM1,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL ce60 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0xc0(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0xb8(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x88(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 85851 <hypre_BoomerAMGBuildMultipass._omp_fn.9+0xe11> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | par_multi_interp.c:1575-1663 |
Module | libparcsr_ls.so |
nb instructions | 202 |
nb uops | 215 |
loop length | 1122 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 4 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 32 |
micro-operation queue | 35.83 cycles |
front end | 35.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 6.40 | 6.40 | 23.00 | 23.00 | 33.00 | 6.40 | 6.40 | 33.00 | 33.00 | 33.00 | 6.40 | 23.00 |
cycles | 6.40 | 7.60 | 23.00 | 23.00 | 33.00 | 6.40 | 6.40 | 33.00 | 33.00 | 33.00 | 6.40 | 23.00 |
Cycles executing div or sqrt instructions | 10.00 |
FE+BE cycles | 34.11-34.15 |
Stall cycles | 0.00 |
Front-end | 35.83 |
Dispatch | 33.00 |
DIV/SQRT | 10.00 |
Overall L1 | 35.83 |
all | 1% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 4% |
all | 7% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 1% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 9% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 10% |
all | 13% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x20,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x100,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0xf8(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe0(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xd8(%RDI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xd0(%RDI),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc8(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc0(%RDI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb8(%RDI),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%RDI),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa8(%RDI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x90(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xf0(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe8(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa0(%RDI),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x80(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%RDI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%RDI),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x60(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RDI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RDI),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RDI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RDI),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RDI),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RDI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDI),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RBX,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 8578e <hypre_BoomerAMGBuildMultipass._omp_fn.9+0xd4e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
TEST %R12,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 85910 <hypre_BoomerAMGBuildMultipass._omp_fn.9+0xed0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EBX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R11,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM1,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL c9a0 <hypre_GetThreadNum@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL cb00 <hypre_NumActiveThreads@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0xc0(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xd8(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xe0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe0(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x8(%R8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0xb8(%RSP),%XMM11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R9 | 5 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 10 |
ADD %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
DEC %R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RSI,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %RAX,%R11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R11,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%RCX,%R11,1),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x88(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R9,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0xb0(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMOVNE %RAX,%R8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %RDI,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 8553e <hypre_BoomerAMGBuildMultipass._omp_fn.9+0xafe> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x80(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVQ 0x9c8f7(%RIP),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM4,%XMM4,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R9,%RDI,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R9,%R8,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RCX,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL c850 <hypre_Free@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP c850 <hypre_Free@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R12,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM1,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL ce60 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x78(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc0(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0xb8(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
TEST %RCX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV 0x88(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 858a6 <hypre_BoomerAMGBuildMultipass._omp_fn.9+0xe66> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EBX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 84bbf <hypre_BoomerAMGBuildMultipass._omp_fn.9+0x17f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SAL $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM1,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL c100 <memset@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
VMOVSD 0xc0(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb8(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x88(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RCX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 84bbf <hypre_BoomerAMGBuildMultipass._omp_fn.9+0x17f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA (,%RCX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R11,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM1,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL c100 <memset@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
VMOVSD 0xc0(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb8(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 84bbf <hypre_BoomerAMGBuildMultipass._omp_fn.9+0x17f> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV %RCX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R11,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM1,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL ce60 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0xb0(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc0(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0xb8(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x88(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV 0x78(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JG 857fe <hypre_BoomerAMGBuildMultipass._omp_fn.9+0xdbe> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 85851 <hypre_BoomerAMGBuildMultipass._omp_fn.9+0xe11> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R11,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVSD %XMM1,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL ce60 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0xc0(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0xb8(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x88(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 85851 <hypre_BoomerAMGBuildMultipass._omp_fn.9+0xe11> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼hypre_BoomerAMGBuildMultipass._omp_fn.9– | 0.6 | 0.14 |
▼Loop 888 - par_multi_interp.c:1605-1660 - libparcsr_ls.so– | 0.08 | 0.01 |
○Loop 895 - par_multi_interp.c:1618-1628 - libparcsr_ls.so | 0.51 | 0.09 |
○Loop 897 - par_multi_interp.c:1612-1615 - libparcsr_ls.so | 0 | 0 |
○Loop 889 - par_multi_interp.c:1659-1660 - libparcsr_ls.so | 0 | 0 |
○Loop 891 - par_multi_interp.c:1639-1652 - libparcsr_ls.so | 0 | 0 |
○Loop 893 - par_multi_interp.c:1639-1652 - libparcsr_ls.so | 0 | 0 |
○Loop 894 - par_multi_interp.c:1633-1636 - libparcsr_ls.so | 0 | 0 |
○Loop 896 - par_multi_interp.c:1618-1628 - libparcsr_ls.so | 0 | 0 |
○Loop 892 - par_multi_interp.c:1639-1652 - libparcsr_ls.so | 0 | 0 |
○Loop 890 - par_multi_interp.c:1657-1658 - libparcsr_ls.so | 0 | 0 |