Loop Id: 3562 | Module: exec | Source: par_csr_matop.c:109-231 [...] | Coverage: 0.99% |
---|
Loop Id: 3562 | Module: exec | Source: par_csr_matop.c:109-231 [...] | Coverage: 0.99% |
---|
0x4bcb80 MOV -0x30(%RBP),%R11 |
0x4bcb84 MOV -0x70(%RBP),%RDI |
0x4bcb88 LEA 0x1(%RDI),%RAX |
0x4bcb8c MOV -0x38(%RBP),%RCX |
0x4bcb90 CMP %RCX,%RDI |
0x4bcb93 JE 4bc710 |
0x4bcb99 MOV %RAX,-0x70(%RBP) |
0x4bcb9d ADD %R11,%RAX |
0x4bcba0 MOV -0x88(%RBP),%RCX |
0x4bcba7 MOV (%RCX,%RAX,8),%RDI |
0x4bcbab MOV 0x20(%RBP),%RCX |
0x4bcbaf MOV (%RCX,%RDI,8),%RAX |
0x4bcbb3 MOV 0x8(%RCX,%RDI,8),%R13 |
0x4bcbb8 MOV %R13,%R9 |
0x4bcbbb SUB %RAX,%R9 |
0x4bcbbe JLE 4bcd24 |
0x4bcbc4 CMP $0x8,%R9 |
0x4bcbc8 JAE 4bcc10 |
0x4bcbca MOV %R9,%RCX |
0x4bcbcd AND $-0x8,%RCX |
0x4bcbd1 CMP %R9,%RCX |
0x4bcbd4 JAE 4bcd20 |
0x4bcbda ADD %RCX,%RAX |
0x4bcbdd MOV 0x28(%RBP),%R9 |
0x4bcbe1 MOV -0x30(%RBP),%R11 |
0x4bcbe5 JMP 4bcbfc |
(3565) 0x4bcbf0 INC %RAX |
(3565) 0x4bcbf3 CMP %RAX,%R13 |
(3565) 0x4bcbf6 JE 4bcd24 |
(3565) 0x4bcbfc MOV (%R9,%RAX,8),%RCX |
(3565) 0x4bcc00 CMP %R8,(%R14,%RCX,8) |
(3565) 0x4bcc04 JGE 4bcbf0 |
(3565) 0x4bcc06 MOV %RBX,(%R14,%RCX,8) |
(3565) 0x4bcc0a INC %RBX |
(3565) 0x4bcc0d JMP 4bcbf0 |
0x4bcc10 MOV %R9,%RCX |
0x4bcc13 SHR $0x3,%RCX |
0x4bcc17 MOV -0x80(%RBP),%R11 |
0x4bcc1b LEA (%R11,%RAX,8),%R11 |
0x4bcc1f JMP 4bcc39 |
(3566) 0x4bcc30 ADD $0x40,%R11 |
(3566) 0x4bcc34 DEC %RCX |
(3566) 0x4bcc37 JE 4bcbca |
(3566) 0x4bcc39 MOV -0x38(%R11),%R12 |
(3566) 0x4bcc3d CMP %R8,(%R14,%R12,8) |
(3566) 0x4bcc41 JGE 4bccb0 |
(3566) 0x4bcc43 MOV %RBX,(%R14,%R12,8) |
(3566) 0x4bcc47 INC %RBX |
(3566) 0x4bcc4a MOV -0x30(%R11),%R12 |
(3566) 0x4bcc4e CMP %R8,(%R14,%R12,8) |
(3566) 0x4bcc52 JL 4bccba |
(3566) 0x4bcc54 MOV -0x28(%R11),%R12 |
(3566) 0x4bcc58 CMP %R8,(%R14,%R12,8) |
(3566) 0x4bcc5c JGE 4bcccb |
(3566) 0x4bcc5e MOV %RBX,(%R14,%R12,8) |
(3566) 0x4bcc62 INC %RBX |
(3566) 0x4bcc65 MOV -0x20(%R11),%R12 |
(3566) 0x4bcc69 CMP %R8,(%R14,%R12,8) |
(3566) 0x4bcc6d JL 4bccd5 |
(3566) 0x4bcc6f MOV -0x18(%R11),%R12 |
(3566) 0x4bcc73 CMP %R8,(%R14,%R12,8) |
(3566) 0x4bcc77 JGE 4bcce6 |
(3566) 0x4bcc79 MOV %RBX,(%R14,%R12,8) |
(3566) 0x4bcc7d INC %RBX |
(3566) 0x4bcc80 MOV -0x10(%R11),%R12 |
(3566) 0x4bcc84 CMP %R8,(%R14,%R12,8) |
(3566) 0x4bcc88 JL 4bccf0 |
(3566) 0x4bcc8a MOV -0x8(%R11),%R12 |
(3566) 0x4bcc8e CMP %R8,(%R14,%R12,8) |
(3566) 0x4bcc92 JGE 4bcd01 |
(3566) 0x4bcc94 MOV %RBX,(%R14,%R12,8) |
(3566) 0x4bcc98 INC %RBX |
(3566) 0x4bcc9b MOV (%R11),%R12 |
(3566) 0x4bcc9e CMP %R8,(%R14,%R12,8) |
(3566) 0x4bcca2 JGE 4bcc30 |
(3566) 0x4bcca4 JMP 4bcd0e |
(3566) 0x4bccb0 MOV -0x30(%R11),%R12 |
(3566) 0x4bccb4 CMP %R8,(%R14,%R12,8) |
(3566) 0x4bccb8 JGE 4bcc54 |
(3566) 0x4bccba MOV %RBX,(%R14,%R12,8) |
(3566) 0x4bccbe INC %RBX |
(3566) 0x4bccc1 MOV -0x28(%R11),%R12 |
(3566) 0x4bccc5 CMP %R8,(%R14,%R12,8) |
(3566) 0x4bccc9 JL 4bcc5e |
(3566) 0x4bcccb MOV -0x20(%R11),%R12 |
(3566) 0x4bcccf CMP %R8,(%R14,%R12,8) |
(3566) 0x4bccd3 JGE 4bcc6f |
(3566) 0x4bccd5 MOV %RBX,(%R14,%R12,8) |
(3566) 0x4bccd9 INC %RBX |
(3566) 0x4bccdc MOV -0x18(%R11),%R12 |
(3566) 0x4bcce0 CMP %R8,(%R14,%R12,8) |
(3566) 0x4bcce4 JL 4bcc79 |
(3566) 0x4bcce6 MOV -0x10(%R11),%R12 |
(3566) 0x4bccea CMP %R8,(%R14,%R12,8) |
(3566) 0x4bccee JGE 4bcc8a |
(3566) 0x4bccf0 MOV %RBX,(%R14,%R12,8) |
(3566) 0x4bccf4 INC %RBX |
(3566) 0x4bccf7 MOV -0x8(%R11),%R12 |
(3566) 0x4bccfb CMP %R8,(%R14,%R12,8) |
(3566) 0x4bccff JL 4bcc94 |
(3566) 0x4bcd01 MOV (%R11),%R12 |
(3566) 0x4bcd04 CMP %R8,(%R14,%R12,8) |
(3566) 0x4bcd08 JGE 4bcc30 |
(3566) 0x4bcd0e MOV %RBX,(%R14,%R12,8) |
(3566) 0x4bcd12 INC %RBX |
(3566) 0x4bcd15 JMP 4bcc30 |
0x4bcd20 MOV -0x30(%RBP),%R11 |
0x4bcd24 MOV 0x30(%RBP),%RCX |
0x4bcd28 MOV (%RCX,%RDI,8),%RAX |
0x4bcd2c MOV 0x8(%RCX,%RDI,8),%RCX |
0x4bcd31 MOV %RCX,%RDI |
0x4bcd34 SUB %RAX,%RDI |
0x4bcd37 JLE 4bcb84 |
0x4bcd3d CMP $0x4,%RDI |
0x4bcd41 JAE 4bcd90 |
0x4bcd43 MOV %RDI,%R9 |
0x4bcd46 AND $-0x4,%R9 |
0x4bcd4a CMP %RDI,%R9 |
0x4bcd4d JAE 4bcb80 |
0x4bcd53 ADD %R9,%RAX |
0x4bcd56 MOV 0x38(%RBP),%R9 |
0x4bcd5a MOV -0x30(%RBP),%R11 |
0x4bcd5e JMP 4bcd6c |
(3563) 0x4bcd60 INC %RAX |
(3563) 0x4bcd63 CMP %RAX,%RCX |
(3563) 0x4bcd66 JE 4bcb84 |
(3563) 0x4bcd6c MOV (%R9,%RAX,8),%RDI |
(3563) 0x4bcd70 MOV (%RSI,%RDI,8),%RDI |
(3563) 0x4bcd74 ADD %R15,%RDI |
(3563) 0x4bcd77 CMP %R10,(%R14,%RDI,8) |
(3563) 0x4bcd7b JGE 4bcd60 |
(3563) 0x4bcd7d MOV %RDX,(%R14,%RDI,8) |
(3563) 0x4bcd81 INC %RDX |
(3563) 0x4bcd84 JMP 4bcd60 |
0x4bcd90 MOV %RDI,%R9 |
0x4bcd93 SHR $0x2,%R9 |
0x4bcd97 MOV -0xc8(%RBP),%R11 |
0x4bcd9e LEA (%R11,%RAX,8),%R11 |
0x4bcda2 JMP 4bcdb9 |
(3564) 0x4bcdb0 ADD $0x20,%R11 |
(3564) 0x4bcdb4 DEC %R9 |
(3564) 0x4bcdb7 JE 4bcd43 |
(3564) 0x4bcdb9 MOV -0x18(%R11),%R12 |
(3564) 0x4bcdbd MOV (%RSI,%R12,8),%R13 |
(3564) 0x4bcdc1 ADD %R15,%R13 |
(3564) 0x4bcdc4 CMP %R10,(%R14,%R13,8) |
(3564) 0x4bcdc8 JGE 4bcdd1 |
(3564) 0x4bcdca MOV %RDX,(%R14,%R13,8) |
(3564) 0x4bcdce INC %RDX |
(3564) 0x4bcdd1 MOV -0x10(%R11),%R12 |
(3564) 0x4bcdd5 MOV (%RSI,%R12,8),%R13 |
(3564) 0x4bcdd9 ADD %R15,%R13 |
(3564) 0x4bcddc CMP %R10,(%R14,%R13,8) |
(3564) 0x4bcde0 JGE 4bcde9 |
(3564) 0x4bcde2 MOV %RDX,(%R14,%R13,8) |
(3564) 0x4bcde6 INC %RDX |
(3564) 0x4bcde9 MOV -0x8(%R11),%R12 |
(3564) 0x4bcded MOV (%RSI,%R12,8),%R13 |
(3564) 0x4bcdf1 ADD %R15,%R13 |
(3564) 0x4bcdf4 CMP %R10,(%R14,%R13,8) |
(3564) 0x4bcdf8 JGE 4bce01 |
(3564) 0x4bcdfa MOV %RDX,(%R14,%R13,8) |
(3564) 0x4bcdfe INC %RDX |
(3564) 0x4bce01 MOV (%R11),%R12 |
(3564) 0x4bce04 MOV (%RSI,%R12,8),%R13 |
(3564) 0x4bce08 ADD %R15,%R13 |
(3564) 0x4bce0b CMP %R10,(%R14,%R13,8) |
(3564) 0x4bce0f JGE 4bcdb0 |
(3564) 0x4bce11 MOV %RDX,(%R14,%R13,8) |
(3564) 0x4bce15 INC %RDX |
(3564) 0x4bce18 JMP 4bcdb0 |
/home/eoseret/qaas_runs_CPU_9468/171-716-5699/intel/AMG/build/AMG/AMG/parcsr_mv/par_csr_matop.c: 109 - 231 |
-------------------------------------------------------------------------------- |
109: if (ii < rest) |
[...] |
187: for (jj2 = A_diag_i[i1]; jj2 < A_diag_i[i1+1]; jj2++) |
188: { |
189: i2 = A_diag_j[jj2]; |
[...] |
195: for (jj3 = B_diag_i[i2]; jj3 < B_diag_i[i2+1]; jj3++) |
196: { |
197: i3 = B_diag_j[jj3]; |
[...] |
205: if (B_marker[i3] < jj_row_begin_diag) |
206: { |
207: B_marker[i3] = jj_count_diag; |
208: jj_count_diag++; |
[...] |
216: if (num_cols_offd_B) |
217: { |
218: for (jj3 = B_offd_i[i2]; jj3 < B_offd_i[i2+1]; jj3++) |
219: { |
220: i3 = num_cols_diag_B+map_B_to_C[B_offd_j[jj3]]; |
[...] |
228: if (B_marker[i3] < jj_row_begin_offd) |
229: { |
230: B_marker[i3] = jj_count_offd; |
231: jj_count_offd++; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.47 |
Bottlenecks | micro-operation queue, |
Function | hypre_ParMatmul_RowSizes.extracted |
Source | par_csr_matop.c:109-109,par_csr_matop.c:187-189,par_csr_matop.c:195-195,par_csr_matop.c:208-208,par_csr_matop.c:216-218 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 8.83 |
CQA cycles if no scalar integer | 8.83 |
CQA cycles if FP arith vectorized | 8.83 |
CQA cycles if fully vectorized | 1.10 |
Front-end cycles | 8.83 |
DIV/SQRT cycles | 4.50 |
P0 cycles | 4.00 |
P1 cycles | 6.00 |
P2 cycles | 6.00 |
P3 cycles | 0.50 |
P4 cycles | 4.00 |
P5 cycles | 4.50 |
P6 cycles | 0.50 |
P7 cycles | 0.50 |
P8 cycles | 0.50 |
P9 cycles | 4.00 |
P10 cycles | 6.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 16.48 - 17.61 |
Stall cycles (UFS) | 7.21 - 8.32 |
Nb insns | 53.00 |
Nb uops | 53.00 |
Nb loads | 18.00 |
Nb stores | 1.00 |
Nb stack references | 10.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 17.21 |
Bytes prefetched | 0.00 |
Bytes loaded | 144.00 |
Bytes stored | 8.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.47 |
Bottlenecks | micro-operation queue, |
Function | hypre_ParMatmul_RowSizes.extracted |
Source | par_csr_matop.c:109-109,par_csr_matop.c:187-189,par_csr_matop.c:195-195,par_csr_matop.c:208-208,par_csr_matop.c:216-218 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 8.83 |
CQA cycles if no scalar integer | 8.83 |
CQA cycles if FP arith vectorized | 8.83 |
CQA cycles if fully vectorized | 1.10 |
Front-end cycles | 8.83 |
DIV/SQRT cycles | 4.50 |
P0 cycles | 4.00 |
P1 cycles | 6.00 |
P2 cycles | 6.00 |
P3 cycles | 0.50 |
P4 cycles | 4.00 |
P5 cycles | 4.50 |
P6 cycles | 0.50 |
P7 cycles | 0.50 |
P8 cycles | 0.50 |
P9 cycles | 4.00 |
P10 cycles | 6.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 16.48 - 17.61 |
Stall cycles (UFS) | 7.21 - 8.32 |
Nb insns | 53.00 |
Nb uops | 53.00 |
Nb loads | 18.00 |
Nb stores | 1.00 |
Nb stack references | 10.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 17.21 |
Bytes prefetched | 0.00 |
Bytes loaded | 144.00 |
Bytes stored | 8.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | hypre_ParMatmul_RowSizes.extracted |
Source file and lines | par_csr_matop.c:109-231 |
Module | exec |
nb instructions | 53 |
nb uops | 53 |
loop length | 204 |
used x86 registers | 7 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 10 |
micro-operation queue | 8.83 cycles |
front end | 8.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 4.50 | 4.00 | 6.00 | 6.00 | 0.50 | 4.00 | 4.50 | 0.50 | 0.50 | 0.50 | 4.00 | 6.00 |
cycles | 4.50 | 4.00 | 6.00 | 6.00 | 0.50 | 4.00 | 4.50 | 0.50 | 0.50 | 0.50 | 4.00 | 6.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 16.48-17.61 |
Stall cycles | 7.21-8.32 |
LM full (events) | 9.79-11.37 |
Front-end | 8.83 |
Dispatch | 6.00 |
Overall L1 | 8.83 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x30(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x38(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RCX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 4bc710 <hypre_ParMatmul_RowSizes.extracted+0x270> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R11,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x88(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RAX,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%RDI,8),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 4bcd24 <hypre_ParMatmul_RowSizes.extracted+0x884> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x8,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4bcc10 <hypre_ParMatmul_RowSizes.extracted+0x770> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R9,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x8,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R9,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4bcd20 <hypre_ParMatmul_RowSizes.extracted+0x880> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x28(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4bcbfc <hypre_ParMatmul_RowSizes.extracted+0x75c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %R9,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x3,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x80(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R11,%RAX,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4bcc39 <hypre_ParMatmul_RowSizes.extracted+0x799> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x30(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%RDI,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 4bcb84 <hypre_ParMatmul_RowSizes.extracted+0x6e4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4bcd90 <hypre_ParMatmul_RowSizes.extracted+0x8f0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDI,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RDI,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4bcb80 <hypre_ParMatmul_RowSizes.extracted+0x6e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %R9,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x38(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4bcd6c <hypre_ParMatmul_RowSizes.extracted+0x8cc> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %RDI,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%R9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0xc8(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R11,%RAX,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4bcdb9 <hypre_ParMatmul_RowSizes.extracted+0x919> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
Function | hypre_ParMatmul_RowSizes.extracted |
Source file and lines | par_csr_matop.c:109-231 |
Module | exec |
nb instructions | 53 |
nb uops | 53 |
loop length | 204 |
used x86 registers | 7 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 10 |
micro-operation queue | 8.83 cycles |
front end | 8.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 4.50 | 4.00 | 6.00 | 6.00 | 0.50 | 4.00 | 4.50 | 0.50 | 0.50 | 0.50 | 4.00 | 6.00 |
cycles | 4.50 | 4.00 | 6.00 | 6.00 | 0.50 | 4.00 | 4.50 | 0.50 | 0.50 | 0.50 | 4.00 | 6.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 16.48-17.61 |
Stall cycles | 7.21-8.32 |
LM full (events) | 9.79-11.37 |
Front-end | 8.83 |
Dispatch | 6.00 |
Overall L1 | 8.83 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x30(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x38(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RCX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 4bc710 <hypre_ParMatmul_RowSizes.extracted+0x270> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R11,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x88(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RAX,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%RDI,8),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 4bcd24 <hypre_ParMatmul_RowSizes.extracted+0x884> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x8,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4bcc10 <hypre_ParMatmul_RowSizes.extracted+0x770> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R9,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x8,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R9,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4bcd20 <hypre_ParMatmul_RowSizes.extracted+0x880> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x28(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4bcbfc <hypre_ParMatmul_RowSizes.extracted+0x75c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %R9,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x3,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x80(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R11,%RAX,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4bcc39 <hypre_ParMatmul_RowSizes.extracted+0x799> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x30(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%RDI,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 4bcb84 <hypre_ParMatmul_RowSizes.extracted+0x6e4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4bcd90 <hypre_ParMatmul_RowSizes.extracted+0x8f0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDI,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RDI,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4bcb80 <hypre_ParMatmul_RowSizes.extracted+0x6e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %R9,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x38(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4bcd6c <hypre_ParMatmul_RowSizes.extracted+0x8cc> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %RDI,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%R9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0xc8(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R11,%RAX,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4bcdb9 <hypre_ParMatmul_RowSizes.extracted+0x919> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |