Function: hypre_BoomerAMGBuildMultipass._omp_fn.10 | Module: libparcsr_ls.so | Source: par_multi_interp.c:1737-1881 [...] | Coverage: 2.69% |
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Function: hypre_BoomerAMGBuildMultipass._omp_fn.10 | Module: libparcsr_ls.so | Source: par_multi_interp.c:1737-1881 [...] | Coverage: 2.69% |
---|
/home/eoseret/qaas_runs_CPU_9468/171-716-5699/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 1737 - 1881 |
-------------------------------------------------------------------------------- |
1737: #pragma omp parallel private(thread_start,thread_stop,my_thread_num,num_threads,k,k1,i,i1,j,j1,sum_C,sum_N,j_start,j_end,cnt,tmp_marker,tmp_marker_offd,cnt_offd,diagonal,alfa,tmp_array,tmp_array_offd) |
[...] |
1746: tmp_marker = NULL; |
1747: if (n_fine) |
1748: { tmp_marker = hypre_CTAlloc(HYPRE_Int,n_fine); } |
1749: tmp_marker_offd = NULL; |
1750: if (num_cols_offd) |
1751: { tmp_marker_offd = hypre_CTAlloc(HYPRE_Int,num_cols_offd); } |
1752: tmp_array = NULL; |
1753: if (n_coarse) |
1754: { tmp_array = hypre_CTAlloc(HYPRE_Int,n_coarse); } |
1755: tmp_array_offd = NULL; |
1756: if (new_num_cols_offd > n_coarse_offd) |
1757: { tmp_array_offd = hypre_CTAlloc(HYPRE_Int,new_num_cols_offd); } |
1758: else |
1759: { tmp_array_offd = hypre_CTAlloc(HYPRE_Int,n_coarse_offd);} |
1760: for (i=0; i < n_fine; i++) |
1761: { tmp_marker[i] = -1; } |
1762: for (i=0; i < num_cols_offd; i++) |
1763: { tmp_marker_offd[i] = -1; } |
1764: |
1765: /* Compute this thread's range of pass_length */ |
1766: my_thread_num = hypre_GetThreadNum(); |
1767: num_threads = hypre_NumActiveThreads(); |
1768: thread_start = pass_pointer[pass] + (pass_length/num_threads)*my_thread_num; |
1769: if (my_thread_num == num_threads-1) |
1770: { thread_stop = pass_pointer[pass] + pass_length; } |
1771: else |
1772: { thread_stop = pass_pointer[pass] + (pass_length/num_threads)*(my_thread_num+1); } |
1773: |
1774: for (i=thread_start; i < thread_stop; i++) |
1775: { |
1776: i1 = pass_array[i]; |
1777: sum_C = 0; |
1778: sum_N = 0; |
1779: j_start = P_diag_start[i1]; |
1780: j_end = j_start+P_diag_i[i1+1]-P_diag_i[i1]; |
1781: cnt = P_diag_i[i1]; |
1782: for (j=j_start; j < j_end; j++) |
1783: { |
1784: k1 = P_diag_pass[pass][j]; |
1785: tmp_array[k1] = cnt; |
1786: P_diag_data[cnt] = 0; |
1787: P_diag_j[cnt++] = k1; |
1788: } |
1789: j_start = P_offd_start[i1]; |
1790: j_end = j_start+P_offd_i[i1+1]-P_offd_i[i1]; |
1791: cnt_offd = P_offd_i[i1]; |
1792: for (j=j_start; j < j_end; j++) |
1793: { |
1794: k1 = P_offd_pass[pass][j]; |
1795: tmp_array_offd[k1] = cnt_offd; |
1796: P_offd_data[cnt_offd] = 0; |
1797: P_offd_j[cnt_offd++] = k1; |
1798: } |
1799: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
1800: { |
1801: j1 = S_diag_j[j]; |
1802: if (assigned[j1] == pass-1) |
1803: tmp_marker[j1] = i1; |
1804: } |
1805: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
1806: { |
1807: j1 = S_offd_j[j]; |
1808: if (assigned_offd[j1] == pass-1) |
1809: tmp_marker_offd[j1] = i1; |
1810: } |
1811: for (j=A_diag_i[i1]+1; j < A_diag_i[i1+1]; j++) |
1812: { |
1813: j1 = A_diag_j[j]; |
1814: if (tmp_marker[j1] == i1) |
1815: { |
1816: for (k=P_diag_i[j1]; k < P_diag_i[j1+1]; k++) |
1817: { |
1818: k1 = P_diag_j[k]; |
1819: alfa = A_diag_data[j]*P_diag_data[k]; |
1820: P_diag_data[tmp_array[k1]] += alfa; |
1821: sum_C += alfa; |
1822: sum_N += alfa; |
1823: } |
1824: for (k=P_offd_i[j1]; k < P_offd_i[j1+1]; k++) |
1825: { |
1826: k1 = P_offd_j[k]; |
1827: alfa = A_diag_data[j]*P_offd_data[k]; |
1828: P_offd_data[tmp_array_offd[k1]] += alfa; |
1829: sum_C += alfa; |
1830: sum_N += alfa; |
1831: } |
1832: } |
1833: else |
1834: { |
1835: if (CF_marker[j1] != -3 && |
1836: (num_functions == 1 || dof_func[i1] == dof_func[j1])) |
1837: sum_N += A_diag_data[j]; |
1838: } |
1839: } |
1840: for (j=A_offd_i[i1]; j < A_offd_i[i1+1]; j++) |
1841: { |
1842: if (col_offd_S_to_A) |
1843: j1 = map_A_to_S[A_offd_j[j]]; |
1844: else |
1845: j1 = A_offd_j[j]; |
1846: |
1847: if (j1 > -1 && tmp_marker_offd[j1] == i1) |
1848: { |
1849: j_start = Pext_start[j1]; |
1850: j_end = j_start+Pext_i[j1+1]; |
1851: for (k=j_start; k < j_end; k++) |
1852: { |
1853: k1 = Pext_pass[pass][k]; |
1854: alfa = A_offd_data[j]*Pext_data[k]; |
1855: if (k1 < 0) |
1856: P_diag_data[tmp_array[-k1-1]] += alfa; |
1857: else |
1858: P_offd_data[tmp_array_offd[k1]] += alfa; |
1859: sum_C += alfa; |
1860: sum_N += alfa; |
1861: } |
1862: } |
1863: else |
1864: { |
1865: if (CF_marker_offd[j1] != -3 && |
1866: (num_functions == 1 || dof_func_offd[j1] == dof_func[i1])) |
1867: sum_N += A_offd_data[j]; |
1868: } |
1869: } |
1870: diagonal = A_diag_data[A_diag_i[i1]]; |
1871: if (sum_C*diagonal) alfa = -sum_N/(sum_C*diagonal); |
1872: |
1873: for (j=P_diag_i[i1]; j < P_diag_i[i1+1]; j++) |
1874: P_diag_data[j] *= alfa; |
1875: for (j=P_offd_i[i1]; j < P_offd_i[i1+1]; j++) |
1876: P_offd_data[j] *= alfa; |
1877: } |
1878: hypre_TFree(tmp_marker); |
1879: hypre_TFree(tmp_marker_offd); |
1880: hypre_TFree(tmp_array); |
1881: hypre_TFree(tmp_array_offd); |
0x85970 PUSH %RBP |
0x85971 MOV %RSP,%RBP |
0x85974 PUSH %R15 |
0x85976 PUSH %R14 |
0x85978 PUSH %R13 |
0x8597a PUSH %R12 |
0x8597c PUSH %RBX |
0x8597d AND $-0x20,%RSP |
0x85981 SUB $0x160,%RSP |
0x85988 MOV 0x148(%RDI),%RAX |
0x8598f MOV 0x138(%RDI),%RDX |
0x85996 MOV 0x130(%RDI),%RCX |
0x8599d MOV 0x128(%RDI),%RBX |
0x859a4 MOV 0x108(%RDI),%R9 |
0x859ab MOV 0x100(%RDI),%R10 |
0x859b2 MOV %RAX,0x148(%RSP) |
0x859ba MOV 0xf8(%RDI),%R11 |
0x859c1 MOV 0xf0(%RDI),%R12 |
0x859c8 MOV %RDX,0x88(%RSP) |
0x859d0 MOV 0xe8(%RDI),%R13 |
0x859d7 MOV 0xe0(%RDI),%R14 |
0x859de MOV %RCX,0x138(%RSP) |
0x859e6 MOV 0x110(%RDI),%RSI |
0x859ed MOV 0x140(%RDI),%R8 |
0x859f4 MOV %RBX,0x130(%RSP) |
0x859fc MOV %R9,0xe8(%RSP) |
0x85a04 MOV 0x120(%RDI),%RDX |
0x85a0b MOV %R10,0x100(%RSP) |
0x85a13 MOV 0x118(%RDI),%RCX |
0x85a1a MOV %R11,0x18(%RSP) |
0x85a1f MOV %R12,0x8(%RSP) |
0x85a24 MOV %R13,0x48(%RSP) |
0x85a29 MOV %R14,0x40(%RSP) |
0x85a2e MOV %RSI,0x158(%RSP) |
0x85a36 MOV 0xd8(%RDI),%R15 |
0x85a3d MOV 0xd0(%RDI),%RAX |
0x85a44 MOV 0xc8(%RDI),%RBX |
0x85a4b MOV 0xc0(%RDI),%R9 |
0x85a52 MOV 0xb8(%RDI),%R10 |
0x85a59 MOV %R15,0x80(%RSP) |
0x85a61 MOV 0x68(%RDI),%R15 |
0x85a65 MOV 0xb0(%RDI),%R11 |
0x85a6c MOV %RAX,0x78(%RSP) |
0x85a71 MOV 0xa8(%RDI),%R12 |
0x85a78 MOV 0x98(%RDI),%R13 |
0x85a7f MOV %RBX,0xf8(%RSP) |
0x85a87 MOV 0x80(%RDI),%R14 |
0x85a8e MOV 0x60(%RDI),%RAX |
0x85a92 MOV %R9,0xb0(%RSP) |
0x85a9a MOV 0x58(%RDI),%RBX |
0x85a9e MOV 0x50(%RDI),%R9 |
0x85aa2 MOV %R15,0x128(%RSP) |
0x85aaa MOV 0x48(%RDI),%R15 |
0x85aae MOV %R10,0xf0(%RSP) |
0x85ab6 MOV %R11,0x38(%RSP) |
0x85abb MOV 0xa0(%RDI),%R10 |
0x85ac2 MOV %R12,0x10(%RSP) |
0x85ac7 MOV 0x90(%RDI),%R11 |
0x85ace MOV %R13,0xd8(%RSP) |
0x85ad6 MOV 0x78(%RDI),%R12 |
0x85ada MOV %R14,0xd0(%RSP) |
0x85ae2 MOV 0x88(%RDI),%R13 |
0x85ae9 MOV %RAX,0x70(%RSP) |
0x85aee MOV 0x70(%RDI),%R14 |
0x85af2 MOV %RBX,0x120(%RSP) |
0x85afa MOV %R9,0x68(%RSP) |
0x85aff MOV %R15,0x30(%RSP) |
0x85b04 MOV 0x40(%RDI),%RAX |
0x85b08 MOV 0x38(%RDI),%RBX |
0x85b0c MOV 0x30(%RDI),%R9 |
0x85b10 MOV 0x28(%RDI),%R15 |
0x85b14 MOV %RAX,0x60(%RSP) |
0x85b19 MOV %RBX,0x28(%RSP) |
0x85b1e MOV 0x20(%RDI),%RAX |
0x85b22 MOV 0x18(%RDI),%RBX |
0x85b26 MOV %R9,0x20(%RSP) |
0x85b2b MOV %R15,0x58(%RSP) |
0x85b30 MOV 0x10(%RDI),%R9 |
0x85b34 MOV 0x8(%RDI),%R15 |
0x85b38 MOV (%RDI),%RDI |
0x85b3b MOV %RAX,0xc8(%RSP) |
0x85b43 MOV %RBX,0xa8(%RSP) |
0x85b4b MOV %R9,0x108(%RSP) |
0x85b53 MOV %R15,0x140(%RSP) |
0x85b5b MOV %RDI,0x110(%RSP) |
0x85b63 TEST %RSI,%RSI |
0x85b66 JNE 86fee |
0x85b6c MOVQ $0,0x150(%RSP) |
0x85b78 TEST %R14,%R14 |
0x85b7b JNE 86f72 |
0x85b81 MOVQ $0,0x118(%RSP) |
0x85b8d TEST %RCX,%RCX |
0x85b90 JNE 86f0b |
0x85b96 XOR %R15D,%R15D |
0x85b99 CMP %RDX,%R8 |
0x85b9c JLE 86ee5 |
0x85ba2 MOV %R11,0xb8(%RSP) |
0x85baa MOV $0x8,%ESI |
0x85baf MOV %R8,%RDI |
0x85bb2 MOV %R10,0xc0(%RSP) |
0x85bba VMOVSD %XMM1,0xe0(%RSP) |
0x85bc3 CALL ce60 <hypre_CAlloc@plt> |
0x85bc8 CMPQ $0,0x158(%RSP) |
0x85bd1 VMOVSD 0xe0(%RSP),%XMM1 |
0x85bda MOV %RAX,%RBX |
0x85bdd MOV 0xc0(%RSP),%RSI |
0x85be5 MOV 0xb8(%RSP),%RAX |
0x85bed JLE 85c3f |
0x85bef MOV 0x158(%RSP),%RDX |
0x85bf7 MOV 0x150(%RSP),%RDI |
0x85bff MOV %RSI,0xc0(%RSP) |
0x85c07 MOV $0xff,%ESI |
0x85c0c VMOVSD %XMM1,0xe0(%RSP) |
0x85c15 SAL $0x3,%RDX |
0x85c19 MOV %RAX,0xb8(%RSP) |
0x85c21 CALL c100 <memset@plt> |
0x85c26 VMOVSD 0xe0(%RSP),%XMM1 |
0x85c2f MOV 0xc0(%RSP),%RSI |
0x85c37 MOV 0xb8(%RSP),%RAX |
0x85c3f TEST %R14,%R14 |
0x85c42 JLE 85c90 |
0x85c44 MOV 0x118(%RSP),%RDI |
0x85c4c MOV %RSI,0xe0(%RSP) |
0x85c54 LEA (,%R14,8),%RDX |
0x85c5c MOV $0xff,%ESI |
0x85c61 VMOVSD %XMM1,0x158(%RSP) |
0x85c6a MOV %RAX,0xc0(%RSP) |
0x85c72 CALL c100 <memset@plt> |
0x85c77 VMOVSD 0x158(%RSP),%XMM1 |
0x85c80 MOV 0xe0(%RSP),%RSI |
0x85c88 MOV 0xc0(%RSP),%RAX |
0x85c90 MOV %RSI,0xc0(%RSP) |
0x85c98 VMOVSD %XMM1,0x158(%RSP) |
0x85ca1 MOV %RAX,0xb8(%RSP) |
0x85ca9 CALL c9a0 <hypre_GetThreadNum@plt> |
0x85cae MOV %RAX,%R14 |
0x85cb1 CALL cb00 <hypre_NumActiveThreads@plt> |
0x85cb6 MOV 0xe8(%RSP),%R8 |
0x85cbe MOV 0xf8(%RSP),%RDX |
0x85cc6 MOV %R14,%R10 |
0x85cc9 MOV %RAX,%R9 |
0x85ccc MOV 0x148(%RSP),%RAX |
0x85cd4 MOV 0x148(%RSP),%R11 |
0x85cdc MOV (%RDX,%R8,8),%RCX |
0x85ce0 LEA (,%R8,8),%RDI |
0x85ce8 VMOVSD 0x158(%RSP),%XMM12 |
0x85cf1 CQTO |
0x85cf3 MOV %RDI,0xe0(%RSP) |
0x85cfb IDIV %R9 |
0x85cfe ADD %RCX,%R11 |
0x85d01 DEC %R9 |
0x85d04 MOV %R11,%R8 |
0x85d07 MOV 0xb8(%RSP),%R11 |
0x85d0f IMUL %RAX,%R10 |
0x85d13 ADD %R10,%RAX |
0x85d16 LEA (%RCX,%R10,1),%RSI |
0x85d1a MOV 0xc0(%RSP),%R10 |
0x85d22 ADD %RCX,%RAX |
0x85d25 CMP %R9,%R14 |
0x85d28 CMOVNE %RAX,%R8 |
0x85d2c CMP %RSI,%R8 |
0x85d2f JLE 86b7e |
0x85d35 MOV 0xb0(%RSP),%R14 |
0x85d3d VMOVQ 0x9b81b(%RIP),%XMM4 |
0x85d45 VXORPD %XMM3,%XMM3,%XMM3 |
0x85d49 LEA (%R14,%R8,8),%RDI |
0x85d4d LEA (%R14,%RSI,8),%R9 |
0x85d51 MOV 0xe8(%RSP),%R14 |
0x85d59 MOV %RDI,0x50(%RSP) |
0x85d5e MOV %R9,0xf8(%RSP) |
0x85d66 MOV %R15,%R9 |
0x85d69 MOV 0xa8(%RSP),%R15 |
0x85d71 DEC %R14 |
0x85d74 NOPL (%RAX) |
(898) 0x85d78 MOV 0xf8(%RSP),%RCX |
(898) 0x85d80 MOV 0xd0(%RSP),%R8 |
(898) 0x85d88 MOV 0x78(%RSP),%RDX |
(898) 0x85d8d MOV (%RCX),%RDI |
(898) 0x85d90 LEA (,%RDI,8),%RAX |
(898) 0x85d98 MOV (%RDX,%RDI,8),%RDX |
(898) 0x85d9c LEA 0x8(%RAX),%RCX |
(898) 0x85da0 MOV %RAX,0x148(%RSP) |
(898) 0x85da8 ADD %R8,%RAX |
(898) 0x85dab LEA (%R8,%RCX,1),%RSI |
(898) 0x85daf MOV %RAX,0xb8(%RSP) |
(898) 0x85db7 MOV (%RAX),%RAX |
(898) 0x85dba MOV (%RSI),%R8 |
(898) 0x85dbd MOV %RSI,0xc0(%RSP) |
(898) 0x85dc5 ADD %RDX,%R8 |
(898) 0x85dc8 SUB %RAX,%R8 |
(898) 0x85dcb CMP %R8,%RDX |
(898) 0x85dce JGE 85fd3 |
(898) 0x85dd4 MOV %RAX,%RSI |
(898) 0x85dd7 SUB %RDX,%RSI |
(898) 0x85dda SUB %RAX,%RDX |
(898) 0x85ddd MOV %RDX,0x158(%RSP) |
(898) 0x85de5 ADD %R8,%RSI |
(898) 0x85de8 MOV 0xe0(%RSP),%RDX |
(898) 0x85df0 MOV 0x40(%RSP),%R8 |
(898) 0x85df5 MOV (%R8,%RDX,1),%R8 |
(898) 0x85df9 MOV 0x158(%RSP),%RDX |
(898) 0x85e01 LEA (%R8,%RDX,8),%RDX |
(898) 0x85e05 MOV %RSI,%R8 |
(898) 0x85e08 SUB %RAX,%R8 |
(898) 0x85e0b AND $0x7,%R8D |
(898) 0x85e0f JE 85ef2 |
(898) 0x85e15 CMP $0x1,%R8 |
(898) 0x85e19 JE 85ed1 |
(898) 0x85e1f CMP $0x2,%R8 |
(898) 0x85e23 JE 85eb9 |
(898) 0x85e29 CMP $0x3,%R8 |
(898) 0x85e2d JE 85ea1 |
(898) 0x85e2f CMP $0x4,%R8 |
(898) 0x85e33 JE 85e89 |
(898) 0x85e35 CMP $0x5,%R8 |
(898) 0x85e39 JE 85e71 |
(898) 0x85e3b CMP $0x6,%R8 |
(898) 0x85e3f JE 85e59 |
(898) 0x85e41 MOV (%RDX,%RAX,8),%R8 |
(898) 0x85e45 MOV %RAX,(%R9,%R8,8) |
(898) 0x85e49 MOVQ $0,(%R12,%RAX,8) |
(898) 0x85e51 INC %RAX |
(898) 0x85e54 MOV %R8,-0x8(%R13,%RAX,8) |
(898) 0x85e59 MOV (%RDX,%RAX,8),%R8 |
(898) 0x85e5d MOV %RAX,(%R9,%R8,8) |
(898) 0x85e61 MOVQ $0,(%R12,%RAX,8) |
(898) 0x85e69 INC %RAX |
(898) 0x85e6c MOV %R8,-0x8(%R13,%RAX,8) |
(898) 0x85e71 MOV (%RDX,%RAX,8),%R8 |
(898) 0x85e75 MOV %RAX,(%R9,%R8,8) |
(898) 0x85e79 MOVQ $0,(%R12,%RAX,8) |
(898) 0x85e81 INC %RAX |
(898) 0x85e84 MOV %R8,-0x8(%R13,%RAX,8) |
(898) 0x85e89 MOV (%RDX,%RAX,8),%R8 |
(898) 0x85e8d MOV %RAX,(%R9,%R8,8) |
(898) 0x85e91 MOVQ $0,(%R12,%RAX,8) |
(898) 0x85e99 INC %RAX |
(898) 0x85e9c MOV %R8,-0x8(%R13,%RAX,8) |
(898) 0x85ea1 MOV (%RDX,%RAX,8),%R8 |
(898) 0x85ea5 MOV %RAX,(%R9,%R8,8) |
(898) 0x85ea9 MOVQ $0,(%R12,%RAX,8) |
(898) 0x85eb1 INC %RAX |
(898) 0x85eb4 MOV %R8,-0x8(%R13,%RAX,8) |
(898) 0x85eb9 MOV (%RDX,%RAX,8),%R8 |
(898) 0x85ebd MOV %RAX,(%R9,%R8,8) |
(898) 0x85ec1 MOVQ $0,(%R12,%RAX,8) |
(898) 0x85ec9 INC %RAX |
(898) 0x85ecc MOV %R8,-0x8(%R13,%RAX,8) |
(898) 0x85ed1 MOV (%RDX,%RAX,8),%R8 |
(898) 0x85ed5 MOV %RAX,(%R9,%R8,8) |
(898) 0x85ed9 MOVQ $0,(%R12,%RAX,8) |
(898) 0x85ee1 INC %RAX |
(898) 0x85ee4 MOV %R8,-0x8(%R13,%RAX,8) |
(898) 0x85ee9 CMP %RSI,%RAX |
(898) 0x85eec JE 85fd3 |
(898) 0x85ef2 MOV %RBX,0x158(%RSP) |
(909) 0x85efa MOV (%RDX,%RAX,8),%RBX |
(909) 0x85efe LEA 0x1(%RAX),%R8 |
(909) 0x85f02 MOV %RAX,(%R9,%RBX,8) |
(909) 0x85f06 MOVQ $0,(%R12,%RAX,8) |
(909) 0x85f0e MOV %RBX,-0x8(%R13,%R8,8) |
(909) 0x85f13 MOV (%RDX,%R8,8),%RBX |
(909) 0x85f17 MOV %R8,(%R9,%RBX,8) |
(909) 0x85f1b MOVQ $0,(%R12,%R8,8) |
(909) 0x85f23 LEA 0x2(%RAX),%R8 |
(909) 0x85f27 MOV %RBX,-0x8(%R13,%R8,8) |
(909) 0x85f2c MOV (%RDX,%R8,8),%RBX |
(909) 0x85f30 MOV %R8,(%R9,%RBX,8) |
(909) 0x85f34 MOVQ $0,(%R12,%R8,8) |
(909) 0x85f3c LEA 0x3(%RAX),%R8 |
(909) 0x85f40 MOV %RBX,-0x8(%R13,%R8,8) |
(909) 0x85f45 MOV (%RDX,%R8,8),%RBX |
(909) 0x85f49 MOV %R8,(%R9,%RBX,8) |
(909) 0x85f4d MOVQ $0,(%R12,%R8,8) |
(909) 0x85f55 LEA 0x4(%RAX),%R8 |
(909) 0x85f59 MOV %RBX,-0x8(%R13,%R8,8) |
(909) 0x85f5e MOV (%RDX,%R8,8),%RBX |
(909) 0x85f62 MOV %R8,(%R9,%RBX,8) |
(909) 0x85f66 MOVQ $0,(%R12,%R8,8) |
(909) 0x85f6e LEA 0x5(%RAX),%R8 |
(909) 0x85f72 MOV %RBX,-0x8(%R13,%R8,8) |
(909) 0x85f77 MOV (%RDX,%R8,8),%RBX |
(909) 0x85f7b MOV %R8,(%R9,%RBX,8) |
(909) 0x85f7f MOVQ $0,(%R12,%R8,8) |
(909) 0x85f87 LEA 0x6(%RAX),%R8 |
(909) 0x85f8b MOV %RBX,-0x8(%R13,%R8,8) |
(909) 0x85f90 MOV (%RDX,%R8,8),%RBX |
(909) 0x85f94 MOV %R8,(%R9,%RBX,8) |
(909) 0x85f98 MOVQ $0,(%R12,%R8,8) |
(909) 0x85fa0 LEA 0x7(%RAX),%R8 |
(909) 0x85fa4 ADD $0x8,%RAX |
(909) 0x85fa8 MOV %RBX,-0x8(%R13,%R8,8) |
(909) 0x85fad MOV (%RDX,%R8,8),%RBX |
(909) 0x85fb1 MOV %R8,(%R9,%RBX,8) |
(909) 0x85fb5 MOVQ $0,(%R12,%R8,8) |
(909) 0x85fbd MOV %RBX,-0x8(%R13,%RAX,8) |
(909) 0x85fc2 CMP %RSI,%RAX |
(909) 0x85fc5 JNE 85efa |
(898) 0x85fcb MOV 0x158(%RSP),%RBX |
(898) 0x85fd3 MOV 0x80(%RSP),%RAX |
(898) 0x85fdb MOV 0x148(%RSP),%R8 |
(898) 0x85fe3 MOV (%RAX,%RDI,8),%RDX |
(898) 0x85fe7 MOV 0xd8(%RSP),%RAX |
(898) 0x85fef LEA (%RAX,%RCX,1),%RSI |
(898) 0x85ff3 ADD %R8,%RAX |
(898) 0x85ff6 MOV (%RSI),%R8 |
(898) 0x85ff9 MOV %RAX,0xa8(%RSP) |
(898) 0x86001 MOV (%RAX),%RAX |
(898) 0x86004 MOV %RSI,0xb0(%RSP) |
(898) 0x8600c ADD %RDX,%R8 |
(898) 0x8600f SUB %RAX,%R8 |
(898) 0x86012 CMP %R8,%RDX |
(898) 0x86015 JGE 8621a |
(898) 0x8601b MOV %RAX,%RSI |
(898) 0x8601e SUB %RDX,%RSI |
(898) 0x86021 SUB %RAX,%RDX |
(898) 0x86024 MOV %RDX,0x158(%RSP) |
(898) 0x8602c ADD %R8,%RSI |
(898) 0x8602f MOV 0xe0(%RSP),%RDX |
(898) 0x86037 MOV 0x48(%RSP),%R8 |
(898) 0x8603c MOV (%R8,%RDX,1),%R8 |
(898) 0x86040 MOV 0x158(%RSP),%RDX |
(898) 0x86048 LEA (%R8,%RDX,8),%RDX |
(898) 0x8604c MOV %RSI,%R8 |
(898) 0x8604f SUB %RAX,%R8 |
(898) 0x86052 AND $0x7,%R8D |
(898) 0x86056 JE 86139 |
(898) 0x8605c CMP $0x1,%R8 |
(898) 0x86060 JE 86118 |
(898) 0x86066 CMP $0x2,%R8 |
(898) 0x8606a JE 86100 |
(898) 0x86070 CMP $0x3,%R8 |
(898) 0x86074 JE 860e8 |
(898) 0x86076 CMP $0x4,%R8 |
(898) 0x8607a JE 860d0 |
(898) 0x8607c CMP $0x5,%R8 |
(898) 0x86080 JE 860b8 |
(898) 0x86082 CMP $0x6,%R8 |
(898) 0x86086 JE 860a0 |
(898) 0x86088 MOV (%RDX,%RAX,8),%R8 |
(898) 0x8608c MOV %RAX,(%RBX,%R8,8) |
(898) 0x86090 MOVQ $0,(%R11,%RAX,8) |
(898) 0x86098 INC %RAX |
(898) 0x8609b MOV %R8,-0x8(%R10,%RAX,8) |
(898) 0x860a0 MOV (%RDX,%RAX,8),%R8 |
(898) 0x860a4 MOV %RAX,(%RBX,%R8,8) |
(898) 0x860a8 MOVQ $0,(%R11,%RAX,8) |
(898) 0x860b0 INC %RAX |
(898) 0x860b3 MOV %R8,-0x8(%R10,%RAX,8) |
(898) 0x860b8 MOV (%RDX,%RAX,8),%R8 |
(898) 0x860bc MOV %RAX,(%RBX,%R8,8) |
(898) 0x860c0 MOVQ $0,(%R11,%RAX,8) |
(898) 0x860c8 INC %RAX |
(898) 0x860cb MOV %R8,-0x8(%R10,%RAX,8) |
(898) 0x860d0 MOV (%RDX,%RAX,8),%R8 |
(898) 0x860d4 MOV %RAX,(%RBX,%R8,8) |
(898) 0x860d8 MOVQ $0,(%R11,%RAX,8) |
(898) 0x860e0 INC %RAX |
(898) 0x860e3 MOV %R8,-0x8(%R10,%RAX,8) |
(898) 0x860e8 MOV (%RDX,%RAX,8),%R8 |
(898) 0x860ec MOV %RAX,(%RBX,%R8,8) |
(898) 0x860f0 MOVQ $0,(%R11,%RAX,8) |
(898) 0x860f8 INC %RAX |
(898) 0x860fb MOV %R8,-0x8(%R10,%RAX,8) |
(898) 0x86100 MOV (%RDX,%RAX,8),%R8 |
(898) 0x86104 MOV %RAX,(%RBX,%R8,8) |
(898) 0x86108 MOVQ $0,(%R11,%RAX,8) |
(898) 0x86110 INC %RAX |
(898) 0x86113 MOV %R8,-0x8(%R10,%RAX,8) |
(898) 0x86118 MOV (%RDX,%RAX,8),%R8 |
(898) 0x8611c MOV %RAX,(%RBX,%R8,8) |
(898) 0x86120 MOVQ $0,(%R11,%RAX,8) |
(898) 0x86128 INC %RAX |
(898) 0x8612b MOV %R8,-0x8(%R10,%RAX,8) |
(898) 0x86130 CMP %RSI,%RAX |
(898) 0x86133 JE 8621a |
(898) 0x86139 MOV %R9,0x158(%RSP) |
(908) 0x86141 MOV (%RDX,%RAX,8),%R9 |
(908) 0x86145 LEA 0x1(%RAX),%R8 |
(908) 0x86149 MOV %RAX,(%RBX,%R9,8) |
(908) 0x8614d MOVQ $0,(%R11,%RAX,8) |
(908) 0x86155 MOV %R9,-0x8(%R10,%R8,8) |
(908) 0x8615a MOV (%RDX,%R8,8),%R9 |
(908) 0x8615e MOV %R8,(%RBX,%R9,8) |
(908) 0x86162 MOVQ $0,(%R11,%R8,8) |
(908) 0x8616a LEA 0x2(%RAX),%R8 |
(908) 0x8616e MOV %R9,-0x8(%R10,%R8,8) |
(908) 0x86173 MOV (%RDX,%R8,8),%R9 |
(908) 0x86177 MOV %R8,(%RBX,%R9,8) |
(908) 0x8617b MOVQ $0,(%R11,%R8,8) |
(908) 0x86183 LEA 0x3(%RAX),%R8 |
(908) 0x86187 MOV %R9,-0x8(%R10,%R8,8) |
(908) 0x8618c MOV (%RDX,%R8,8),%R9 |
(908) 0x86190 MOV %R8,(%RBX,%R9,8) |
(908) 0x86194 MOVQ $0,(%R11,%R8,8) |
(908) 0x8619c LEA 0x4(%RAX),%R8 |
(908) 0x861a0 MOV %R9,-0x8(%R10,%R8,8) |
(908) 0x861a5 MOV (%RDX,%R8,8),%R9 |
(908) 0x861a9 MOV %R8,(%RBX,%R9,8) |
(908) 0x861ad MOVQ $0,(%R11,%R8,8) |
(908) 0x861b5 LEA 0x5(%RAX),%R8 |
(908) 0x861b9 MOV %R9,-0x8(%R10,%R8,8) |
(908) 0x861be MOV (%RDX,%R8,8),%R9 |
(908) 0x861c2 MOV %R8,(%RBX,%R9,8) |
(908) 0x861c6 MOVQ $0,(%R11,%R8,8) |
(908) 0x861ce LEA 0x6(%RAX),%R8 |
(908) 0x861d2 MOV %R9,-0x8(%R10,%R8,8) |
(908) 0x861d7 MOV (%RDX,%R8,8),%R9 |
(908) 0x861db MOV %R8,(%RBX,%R9,8) |
(908) 0x861df MOVQ $0,(%R11,%R8,8) |
(908) 0x861e7 LEA 0x7(%RAX),%R8 |
(908) 0x861eb ADD $0x8,%RAX |
(908) 0x861ef MOV %R9,-0x8(%R10,%R8,8) |
(908) 0x861f4 MOV (%RDX,%R8,8),%R9 |
(908) 0x861f8 MOV %R8,(%RBX,%R9,8) |
(908) 0x861fc MOVQ $0,(%R11,%R8,8) |
(908) 0x86204 MOV %R9,-0x8(%R10,%RAX,8) |
(908) 0x86209 CMP %RSI,%RAX |
(908) 0x8620c JNE 86141 |
(898) 0x86212 MOV 0x158(%RSP),%R9 |
(898) 0x8621a MOV 0x68(%RSP),%RSI |
(898) 0x8621f LEA (%RSI,%RCX,1),%R8 |
(898) 0x86223 MOV (%RSI,%RDI,8),%RAX |
(898) 0x86227 MOV (%R8),%RSI |
(898) 0x8622a CMP %RSI,%RAX |
(898) 0x8622d JGE 8626e |
(898) 0x8622f MOV %RCX,0x158(%RSP) |
(898) 0x86237 NOPW (%RAX,%RAX,1) |
(907) 0x86240 MOV 0x120(%RSP),%RCX |
(907) 0x86248 MOV (%RCX,%RAX,8),%RDX |
(907) 0x8624c MOV 0x130(%RSP),%RCX |
(907) 0x86254 CMP (%RCX,%RDX,8),%R14 |
(907) 0x86258 JE 863a0 |
(907) 0x8625e INC %RAX |
(907) 0x86261 CMP %RSI,%RAX |
(907) 0x86264 JL 86240 |
(898) 0x86266 MOV 0x158(%RSP),%RCX |
(898) 0x8626e MOV 0x70(%RSP),%R8 |
(898) 0x86273 ADD %R8,%RCX |
(898) 0x86276 MOV (%R8,%RDI,8),%RAX |
(898) 0x8627a MOV (%RCX),%RSI |
(898) 0x8627d CMP %RSI,%RAX |
(898) 0x86280 JGE 862ae |
(898) 0x86282 NOPW (%RAX,%RAX,1) |
(906) 0x86288 MOV 0x128(%RSP),%RDX |
(906) 0x86290 MOV 0x138(%RSP),%R8 |
(906) 0x86298 MOV (%RDX,%RAX,8),%RDX |
(906) 0x8629c CMP (%R8,%RDX,8),%R14 |
(906) 0x862a0 JE 863c0 |
(906) 0x862a6 INC %RAX |
(906) 0x862a9 CMP %RSI,%RAX |
(906) 0x862ac JL 86288 |
(898) 0x862ae MOV 0x58(%RSP),%RCX |
(898) 0x862b3 MOV 0x148(%RSP),%RDX |
(898) 0x862bb MOV (%RCX,%RDI,8),%R8 |
(898) 0x862bf MOV 0x8(%RCX,%RDX,1),%RDX |
(898) 0x862c4 LEA 0x1(%R8),%RAX |
(898) 0x862c8 CMP %RDX,%RAX |
(898) 0x862cb JGE 86eac |
(898) 0x862d1 MOV 0x20(%RSP),%RCX |
(898) 0x862d6 SAL $0x3,%RAX |
(898) 0x862da VXORPD %XMM0,%XMM0,%XMM0 |
(898) 0x862de MOV %R15,0xa0(%RSP) |
(898) 0x862e6 MOV %R8,0x98(%RSP) |
(898) 0x862ee VMOVSD %XMM0,%XMM0,%XMM2 |
(898) 0x862f2 LEA (%RCX,%RAX,1),%RSI |
(898) 0x862f6 LEA (%RCX,%RDX,8),%RDX |
(898) 0x862fa MOV %RSI,0xe8(%RSP) |
(898) 0x86302 MOV 0xc8(%RSP),%RSI |
(898) 0x8630a MOV %RDX,0x158(%RSP) |
(898) 0x86312 ADD %RSI,%RAX |
(898) 0x86315 MOV 0xe8(%RSP),%RSI |
(898) 0x8631d MOV %R14,0xe8(%RSP) |
(898) 0x86325 JMP 86360 |
0x86327 NOPW (%RAX,%RAX,1) |
(903) 0x86330 MOV 0x108(%RSP),%RDX |
(903) 0x86338 MOV 0x148(%RSP),%R8 |
(903) 0x86340 MOV (%RDX,%RCX,8),%RCX |
(903) 0x86344 CMP %RCX,(%RDX,%R8,1) |
(903) 0x86348 JE 86393 |
(903) 0x8634a ADD $0x8,%RSI |
(903) 0x8634e ADD $0x8,%RAX |
(903) 0x86352 CMP %RSI,0x158(%RSP) |
(903) 0x8635a JE 866e0 |
(903) 0x86360 MOV (%RSI),%RCX |
(903) 0x86363 MOV 0x150(%RSP),%R15 |
(903) 0x8636b LEA (,%RCX,8),%R8 |
(903) 0x86373 CMP (%R15,%RCX,8),%RDI |
(903) 0x86377 JE 863e0 |
(903) 0x86379 MOV 0x110(%RSP),%R14 |
(903) 0x86381 CMPQ $-0x3,(%R14,%RCX,8) |
(903) 0x86386 JE 8634a |
(903) 0x86388 CMPQ $0x1,0x140(%RSP) |
(903) 0x86391 JNE 86330 |
(903) 0x86393 VADDSD (%RAX),%XMM0,%XMM0 |
(903) 0x86397 JMP 8634a |
0x86399 NOPL (%RAX) |
(907) 0x863a0 MOV 0x150(%RSP),%RSI |
(907) 0x863a8 INC %RAX |
(907) 0x863ab MOV %RDI,(%RSI,%RDX,8) |
(907) 0x863af MOV (%R8),%RSI |
(907) 0x863b2 CMP %RAX,%RSI |
(907) 0x863b5 JG 86240 |
(898) 0x863bb JMP 86266 |
(906) 0x863c0 MOV 0x118(%RSP),%RSI |
(906) 0x863c8 INC %RAX |
(906) 0x863cb MOV %RDI,(%RSI,%RDX,8) |
(906) 0x863cf MOV (%RCX),%RSI |
(906) 0x863d2 CMP %RAX,%RSI |
(906) 0x863d5 JG 86288 |
(898) 0x863db JMP 862ae |
(903) 0x863e0 MOV 0xd0(%RSP),%R15 |
(903) 0x863e8 MOV (%R15,%RCX,8),%RDX |
(903) 0x863ec MOV 0x8(%R15,%R8,1),%R15 |
(903) 0x863f1 CMP %R15,%RDX |
(903) 0x863f4 JGE 86563 |
(903) 0x863fa MOV %R15,%R14 |
(903) 0x863fd SUB %RDX,%R14 |
(903) 0x86400 AND $0x3,%R14D |
(903) 0x86404 JE 864a7 |
(903) 0x8640a CMP $0x1,%R14 |
(903) 0x8640e JE 86470 |
(903) 0x86410 CMP $0x2,%R14 |
(903) 0x86414 JE 86442 |
(903) 0x86416 VMOVSD (%RAX),%XMM5 |
(903) 0x8641a MOV (%R13,%RDX,8),%R14 |
(903) 0x8641f VMULSD (%R12,%RDX,8),%XMM5,%XMM6 |
(903) 0x86425 MOV (%R9,%R14,8),%R14 |
(903) 0x86429 INC %RDX |
(903) 0x8642c LEA (%R12,%R14,8),%R14 |
(903) 0x86430 VADDSD (%R14),%XMM6,%XMM7 |
(903) 0x86435 VADDSD %XMM6,%XMM2,%XMM2 |
(903) 0x86439 VADDSD %XMM6,%XMM0,%XMM0 |
(903) 0x8643d VMOVSD %XMM7,(%R14) |
(903) 0x86442 VMOVSD (%RAX),%XMM8 |
(903) 0x86446 MOV (%R13,%RDX,8),%R14 |
(903) 0x8644b VMULSD (%R12,%RDX,8),%XMM8,%XMM9 |
(903) 0x86451 MOV (%R9,%R14,8),%R14 |
(903) 0x86455 INC %RDX |
(903) 0x86458 LEA (%R12,%R14,8),%R14 |
(903) 0x8645c VADDSD (%R14),%XMM9,%XMM10 |
(903) 0x86461 VADDSD %XMM9,%XMM2,%XMM2 |
(903) 0x86466 VADDSD %XMM9,%XMM0,%XMM0 |
(903) 0x8646b VMOVSD %XMM10,(%R14) |
(903) 0x86470 VMOVSD (%RAX),%XMM11 |
(903) 0x86474 MOV (%R13,%RDX,8),%R14 |
(903) 0x86479 VMULSD (%R12,%RDX,8),%XMM11,%XMM12 |
(903) 0x8647f MOV (%R9,%R14,8),%R14 |
(903) 0x86483 INC %RDX |
(903) 0x86486 LEA (%R12,%R14,8),%R14 |
(903) 0x8648a VADDSD (%R14),%XMM12,%XMM13 |
(903) 0x8648f VADDSD %XMM12,%XMM2,%XMM2 |
(903) 0x86494 VADDSD %XMM12,%XMM0,%XMM0 |
(903) 0x86499 VMOVSD %XMM13,(%R14) |
(903) 0x8649e CMP %R15,%RDX |
(903) 0x864a1 JE 86563 |
(905) 0x864a7 VMOVSD (%RAX),%XMM14 |
(905) 0x864ab MOV (%R13,%RDX,8),%R14 |
(905) 0x864b0 VMULSD (%R12,%RDX,8),%XMM14,%XMM15 |
(905) 0x864b6 MOV (%R9,%R14,8),%R14 |
(905) 0x864ba LEA (%R12,%R14,8),%R14 |
(905) 0x864be VADDSD (%R14),%XMM15,%XMM1 |
(905) 0x864c3 VADDSD %XMM15,%XMM2,%XMM6 |
(905) 0x864c8 VADDSD %XMM15,%XMM0,%XMM7 |
(905) 0x864cd VMOVSD %XMM1,(%R14) |
(905) 0x864d2 MOV 0x8(%R13,%RDX,8),%R14 |
(905) 0x864d7 VMOVSD (%RAX),%XMM5 |
(905) 0x864db MOV (%R9,%R14,8),%R14 |
(905) 0x864df VMULSD 0x8(%R12,%RDX,8),%XMM5,%XMM8 |
(905) 0x864e6 LEA (%R12,%R14,8),%R14 |
(905) 0x864ea VADDSD (%R14),%XMM8,%XMM9 |
(905) 0x864ef VADDSD %XMM8,%XMM6,%XMM10 |
(905) 0x864f4 VADDSD %XMM8,%XMM7,%XMM11 |
(905) 0x864f9 VMOVSD %XMM9,(%R14) |
(905) 0x864fe MOV 0x10(%R13,%RDX,8),%R14 |
(905) 0x86503 VMOVSD (%RAX),%XMM12 |
(905) 0x86507 MOV (%R9,%R14,8),%R14 |
(905) 0x8650b VMULSD 0x10(%R12,%RDX,8),%XMM12,%XMM13 |
(905) 0x86512 LEA (%R12,%R14,8),%R14 |
(905) 0x86516 VADDSD (%R14),%XMM13,%XMM2 |
(905) 0x8651b VADDSD %XMM13,%XMM10,%XMM14 |
(905) 0x86520 VADDSD %XMM13,%XMM11,%XMM0 |
(905) 0x86525 VMOVSD %XMM2,(%R14) |
(905) 0x8652a MOV 0x18(%R13,%RDX,8),%R14 |
(905) 0x8652f VMOVSD (%RAX),%XMM15 |
(905) 0x86533 MOV (%R9,%R14,8),%R14 |
(905) 0x86537 VMULSD 0x18(%R12,%RDX,8),%XMM15,%XMM12 |
(905) 0x8653e ADD $0x4,%RDX |
(905) 0x86542 LEA (%R12,%R14,8),%R14 |
(905) 0x86546 VADDSD (%R14),%XMM12,%XMM1 |
(905) 0x8654b VADDSD %XMM12,%XMM14,%XMM2 |
(905) 0x86550 VADDSD %XMM12,%XMM0,%XMM0 |
(905) 0x86555 VMOVSD %XMM1,(%R14) |
(905) 0x8655a CMP %R15,%RDX |
(905) 0x8655d JNE 864a7 |
(903) 0x86563 MOV 0xd8(%RSP),%R15 |
(903) 0x8656b MOV (%R15,%RCX,8),%RDX |
(903) 0x8656f MOV 0x8(%R15,%R8,1),%R8 |
(903) 0x86574 CMP %R8,%RDX |
(903) 0x86577 JGE 8634a |
(903) 0x8657d MOV %R8,%RCX |
(903) 0x86580 SUB %RDX,%RCX |
(903) 0x86583 AND $0x3,%ECX |
(903) 0x86586 JE 86620 |
(903) 0x8658c CMP $0x1,%RCX |
(903) 0x86590 JE 865ec |
(903) 0x86592 CMP $0x2,%RCX |
(903) 0x86596 JE 865c1 |
(903) 0x86598 VMOVSD (%RAX),%XMM6 |
(903) 0x8659c MOV (%R10,%RDX,8),%R14 |
(903) 0x865a0 VMULSD (%R11,%RDX,8),%XMM6,%XMM7 |
(903) 0x865a6 MOV (%RBX,%R14,8),%R15 |
(903) 0x865aa INC %RDX |
(903) 0x865ad LEA (%R11,%R15,8),%RCX |
(903) 0x865b1 VADDSD (%RCX),%XMM7,%XMM5 |
(903) 0x865b5 VADDSD %XMM7,%XMM2,%XMM2 |
(903) 0x865b9 VADDSD %XMM7,%XMM0,%XMM0 |
(903) 0x865bd VMOVSD %XMM5,(%RCX) |
(903) 0x865c1 VMOVSD (%RAX),%XMM8 |
(903) 0x865c5 MOV (%R10,%RDX,8),%R14 |
(903) 0x865c9 VMULSD (%R11,%RDX,8),%XMM8,%XMM9 |
(903) 0x865cf MOV (%RBX,%R14,8),%R15 |
(903) 0x865d3 INC %RDX |
(903) 0x865d6 LEA (%R11,%R15,8),%RCX |
(903) 0x865da VADDSD (%RCX),%XMM9,%XMM10 |
(903) 0x865de VADDSD %XMM9,%XMM2,%XMM2 |
(903) 0x865e3 VADDSD %XMM9,%XMM0,%XMM0 |
(903) 0x865e8 VMOVSD %XMM10,(%RCX) |
(903) 0x865ec VMOVSD (%RAX),%XMM11 |
(903) 0x865f0 MOV (%R10,%RDX,8),%R14 |
(903) 0x865f4 VMULSD (%R11,%RDX,8),%XMM11,%XMM12 |
(903) 0x865fa MOV (%RBX,%R14,8),%R15 |
(903) 0x865fe INC %RDX |
(903) 0x86601 LEA (%R11,%R15,8),%RCX |
(903) 0x86605 VADDSD (%RCX),%XMM12,%XMM13 |
(903) 0x86609 VADDSD %XMM12,%XMM2,%XMM2 |
(903) 0x8660e VADDSD %XMM12,%XMM0,%XMM0 |
(903) 0x86613 VMOVSD %XMM13,(%RCX) |
(903) 0x86617 CMP %R8,%RDX |
(903) 0x8661a JE 8634a |
(904) 0x86620 VMOVSD (%RAX),%XMM12 |
(904) 0x86624 MOV (%R10,%RDX,8),%R14 |
(904) 0x86628 VMULSD (%R11,%RDX,8),%XMM12,%XMM14 |
(904) 0x8662e MOV (%RBX,%R14,8),%R15 |
(904) 0x86632 MOV 0x8(%R10,%RDX,8),%R14 |
(904) 0x86637 LEA (%R11,%R15,8),%RCX |
(904) 0x8663b MOV (%RBX,%R14,8),%R15 |
(904) 0x8663f MOV 0x10(%R10,%RDX,8),%R14 |
(904) 0x86644 VADDSD (%RCX),%XMM14,%XMM15 |
(904) 0x86648 VADDSD %XMM14,%XMM2,%XMM2 |
(904) 0x8664d VADDSD %XMM14,%XMM0,%XMM0 |
(904) 0x86652 VMOVSD %XMM15,(%RCX) |
(904) 0x86656 LEA (%R11,%R15,8),%RCX |
(904) 0x8665a MOV (%RBX,%R14,8),%R15 |
(904) 0x8665e MOV 0x18(%R10,%RDX,8),%R14 |
(904) 0x86663 VMOVSD (%RAX),%XMM1 |
(904) 0x86667 VMULSD 0x8(%R11,%RDX,8),%XMM1,%XMM6 |
(904) 0x8666e VADDSD (%RCX),%XMM6,%XMM7 |
(904) 0x86672 VADDSD %XMM6,%XMM2,%XMM8 |
(904) 0x86676 VADDSD %XMM6,%XMM0,%XMM9 |
(904) 0x8667a VMOVSD %XMM7,(%RCX) |
(904) 0x8667e LEA (%R11,%R15,8),%RCX |
(904) 0x86682 MOV (%RBX,%R14,8),%R15 |
(904) 0x86686 VMOVSD (%RAX),%XMM5 |
(904) 0x8668a VMULSD 0x10(%R11,%RDX,8),%XMM5,%XMM10 |
(904) 0x86691 VADDSD (%RCX),%XMM10,%XMM11 |
(904) 0x86695 VADDSD %XMM10,%XMM8,%XMM13 |
(904) 0x8669a VADDSD %XMM10,%XMM9,%XMM14 |
(904) 0x8669f VMOVSD %XMM11,(%RCX) |
(904) 0x866a3 LEA (%R11,%R15,8),%RCX |
(904) 0x866a7 VMOVSD (%RAX),%XMM12 |
(904) 0x866ab VMULSD 0x18(%R11,%RDX,8),%XMM12,%XMM12 |
(904) 0x866b2 ADD $0x4,%RDX |
(904) 0x866b6 VADDSD (%RCX),%XMM12,%XMM15 |
(904) 0x866ba VADDSD %XMM12,%XMM13,%XMM2 |
(904) 0x866bf VADDSD %XMM12,%XMM14,%XMM0 |
(904) 0x866c4 VMOVSD %XMM15,(%RCX) |
(904) 0x866c8 CMP %R8,%RDX |
(904) 0x866cb JNE 86620 |
(903) 0x866d1 JMP 8634a |
0x866d6 NOPW %CS:(%RAX,%RAX,1) |
(898) 0x866e0 MOV 0xa0(%RSP),%R15 |
(898) 0x866e8 MOV 0x98(%RSP),%R8 |
(898) 0x866f0 MOV 0xe8(%RSP),%R14 |
(898) 0x866f8 MOV 0x60(%RSP),%RCX |
(898) 0x866fd MOV 0x148(%RSP),%RAX |
(898) 0x86705 MOV (%RCX,%RDI,8),%RDX |
(898) 0x86709 MOV 0x8(%RCX,%RAX,1),%RCX |
(898) 0x8670e CMP %RCX,%RDX |
(898) 0x86711 JGE 86813 |
(898) 0x86717 MOV 0x30(%RSP),%RAX |
(898) 0x8671c SAL $0x3,%RDX |
(898) 0x86720 MOV %R10,0xa0(%RSP) |
(898) 0x86728 MOV %R13,0x98(%RSP) |
(898) 0x86730 LEA (%RAX,%RDX,1),%RSI |
(898) 0x86734 MOV %R8,0x90(%RSP) |
(898) 0x8673c MOV %RSI,0x158(%RSP) |
(898) 0x86744 MOV 0x28(%RSP),%RSI |
(898) 0x86749 ADD %RSI,%RDX |
(898) 0x8674c LEA (%RAX,%RCX,8),%RSI |
(898) 0x86750 MOV %R14,%RAX |
(898) 0x86753 MOV 0x38(%RSP),%R14 |
(898) 0x86758 JMP 8679c |
0x8675a NOPW (%RAX,%RAX,1) |
(901) 0x86760 MOV 0x108(%RSP),%R10 |
(901) 0x86768 MOV 0x148(%RSP),%R13 |
(901) 0x86770 MOV 0xf0(%RSP),%RCX |
(901) 0x86778 MOV (%R10,%R13,1),%R10 |
(901) 0x8677c CMP %R10,(%RCX,%R8,1) |
(901) 0x86780 JE 867ef |
(901) 0x86782 ADDQ $0x8,0x158(%RSP) |
(901) 0x8678b ADD $0x8,%RDX |
(901) 0x8678f MOV 0x158(%RSP),%RCX |
(901) 0x86797 CMP %RSI,%RCX |
(901) 0x8679a JE 867f8 |
(901) 0x8679c MOV 0x158(%RSP),%R13 |
(901) 0x867a4 MOV (%R13),%RCX |
(901) 0x867a8 TEST %R15,%R15 |
(901) 0x867ab JE 867b9 |
(901) 0x867ad MOV 0x100(%RSP),%R10 |
(901) 0x867b5 MOV (%R10,%RCX,8),%RCX |
(901) 0x867b9 LEA (,%RCX,8),%R8 |
(901) 0x867c1 TEST %RCX,%RCX |
(901) 0x867c4 JS 867d9 |
(901) 0x867c6 MOV 0x118(%RSP),%R13 |
(901) 0x867ce CMP (%R13,%RCX,8),%RDI |
(901) 0x867d3 JE 86bc0 |
(901) 0x867d9 CMPQ $-0x3,(%R14,%R8,1) |
(901) 0x867de JE 86782 |
(901) 0x867e0 CMPQ $0x1,0x140(%RSP) |
(901) 0x867e9 JNE 86760 |
(901) 0x867ef VADDSD (%RDX),%XMM0,%XMM0 |
(901) 0x867f3 JMP 86782 |
0x867f5 NOPL (%RAX) |
(898) 0x867f8 MOV 0xa0(%RSP),%R10 |
(898) 0x86800 MOV 0x98(%RSP),%R13 |
(898) 0x86808 MOV %RAX,%R14 |
(898) 0x8680b MOV 0x90(%RSP),%R8 |
(898) 0x86813 MOV 0xc8(%RSP),%RDI |
(898) 0x8681b VMULSD (%RDI,%R8,8),%XMM2,%XMM9 |
(898) 0x86821 VCOMISD %XMM3,%XMM9 |
(898) 0x86825 JE 86830 |
(898) 0x86827 VXORPD %XMM4,%XMM0,%XMM10 |
(898) 0x8682b VDIVSD %XMM9,%XMM10,%XMM12 |
(898) 0x86830 MOV 0xb8(%RSP),%R8 |
(898) 0x86838 MOV 0xc0(%RSP),%RAX |
(898) 0x86840 MOV (%R8),%RSI |
(898) 0x86843 MOV (%RAX),%RCX |
(898) 0x86846 CMP %RCX,%RSI |
(898) 0x86849 JGE 869c6 |
(898) 0x8684f SUB %RSI,%RCX |
(898) 0x86852 MOV %RSI,%RDI |
(898) 0x86855 LEA -0x1(%RCX),%RDX |
(898) 0x86859 CMP $0x2,%RDX |
(898) 0x8685d JBE 86eb9 |
(898) 0x86863 MOV %RCX,%RDX |
(898) 0x86866 LEA (%R12,%RSI,8),%RAX |
(898) 0x8686a VBROADCASTSD %XMM12,%YMM5 |
(898) 0x8686f SHR $0x2,%RDX |
(898) 0x86873 SAL $0x5,%RDX |
(898) 0x86877 LEA (%RDX,%RAX,1),%R8 |
(898) 0x8687b SUB $0x20,%RDX |
(898) 0x8687f SHR $0x5,%RDX |
(898) 0x86883 INC %RDX |
(898) 0x86886 AND $0x7,%EDX |
(898) 0x86889 JE 86913 |
(898) 0x8688f CMP $0x1,%RDX |
(898) 0x86893 JE 86901 |
(898) 0x86895 CMP $0x2,%RDX |
(898) 0x86899 JE 868f4 |
(898) 0x8689b CMP $0x3,%RDX |
(898) 0x8689f JE 868e7 |
(898) 0x868a1 CMP $0x4,%RDX |
(898) 0x868a5 JE 868da |
(898) 0x868a7 CMP $0x5,%RDX |
(898) 0x868ab JE 868cd |
(898) 0x868ad CMP $0x6,%RDX |
(898) 0x868b1 JE 868c0 |
(898) 0x868b3 VMULPD (%RAX),%YMM5,%YMM11 |
(898) 0x868b7 ADD $0x20,%RAX |
(898) 0x868bb VMOVUPD %YMM11,-0x20(%RAX) |
(898) 0x868c0 VMULPD (%RAX),%YMM5,%YMM13 |
(898) 0x868c4 ADD $0x20,%RAX |
(898) 0x868c8 VMOVUPD %YMM13,-0x20(%RAX) |
(898) 0x868cd VMULPD (%RAX),%YMM5,%YMM14 |
(898) 0x868d1 ADD $0x20,%RAX |
(898) 0x868d5 VMOVUPD %YMM14,-0x20(%RAX) |
(898) 0x868da VMULPD (%RAX),%YMM5,%YMM15 |
(898) 0x868de ADD $0x20,%RAX |
(898) 0x868e2 VMOVUPD %YMM15,-0x20(%RAX) |
(898) 0x868e7 VMULPD (%RAX),%YMM5,%YMM1 |
(898) 0x868eb ADD $0x20,%RAX |
(898) 0x868ef VMOVUPD %YMM1,-0x20(%RAX) |
(898) 0x868f4 VMULPD (%RAX),%YMM5,%YMM6 |
(898) 0x868f8 ADD $0x20,%RAX |
(898) 0x868fc VMOVUPD %YMM6,-0x20(%RAX) |
(898) 0x86901 VMULPD (%RAX),%YMM5,%YMM7 |
(898) 0x86905 ADD $0x20,%RAX |
(898) 0x86909 VMOVUPD %YMM7,-0x20(%RAX) |
(898) 0x8690e CMP %R8,%RAX |
(898) 0x86911 JE 86982 |
(900) 0x86913 VMULPD (%RAX),%YMM5,%YMM2 |
(900) 0x86917 ADD $0x100,%RAX |
(900) 0x8691d VMULPD -0xe0(%RAX),%YMM5,%YMM0 |
(900) 0x86925 VMULPD -0xc0(%RAX),%YMM5,%YMM8 |
(900) 0x8692d VMULPD -0xa0(%RAX),%YMM5,%YMM9 |
(900) 0x86935 VMULPD -0x80(%RAX),%YMM5,%YMM10 |
(900) 0x8693a VMULPD -0x60(%RAX),%YMM5,%YMM11 |
(900) 0x8693f VMOVUPD %YMM2,-0x100(%RAX) |
(900) 0x86947 VMULPD -0x40(%RAX),%YMM5,%YMM13 |
(900) 0x8694c VMOVUPD %YMM0,-0xe0(%RAX) |
(900) 0x86954 VMULPD -0x20(%RAX),%YMM5,%YMM14 |
(900) 0x86959 VMOVUPD %YMM8,-0xc0(%RAX) |
(900) 0x86961 VMOVUPD %YMM9,-0xa0(%RAX) |
(900) 0x86969 VMOVUPD %YMM10,-0x80(%RAX) |
(900) 0x8696e VMOVUPD %YMM11,-0x60(%RAX) |
(900) 0x86973 VMOVUPD %YMM13,-0x40(%RAX) |
(900) 0x86978 VMOVUPD %YMM14,-0x20(%RAX) |
(900) 0x8697d CMP %R8,%RAX |
(900) 0x86980 JNE 86913 |
(898) 0x86982 MOV %RCX,%R8 |
(898) 0x86985 AND $-0x4,%R8 |
(898) 0x86989 ADD %R8,%RSI |
(898) 0x8698c TEST $0x3,%CL |
(898) 0x8698f JE 869c6 |
(898) 0x86991 SUB %R8,%RCX |
(898) 0x86994 CMP $0x1,%RCX |
(898) 0x86998 JE 869ba |
(898) 0x8699a ADD %RDI,%R8 |
(898) 0x8699d VMOVDDUP %XMM12,%XMM5 |
(898) 0x869a2 LEA (%R12,%R8,8),%RDI |
(898) 0x869a6 VMULPD (%RDI),%XMM5,%XMM15 |
(898) 0x869aa VMOVUPD %XMM15,(%RDI) |
(898) 0x869ae TEST $0x1,%CL |
(898) 0x869b1 JE 869c6 |
(898) 0x869b3 AND $-0x2,%RCX |
(898) 0x869b7 ADD %RCX,%RSI |
(898) 0x869ba LEA (%R12,%RSI,8),%RSI |
(898) 0x869be VMULSD (%RSI),%XMM12,%XMM1 |
(898) 0x869c2 VMOVSD %XMM1,(%RSI) |
(898) 0x869c6 MOV 0xa8(%RSP),%RCX |
(898) 0x869ce MOV 0xb0(%RSP),%RAX |
(898) 0x869d6 MOV (%RCX),%RSI |
(898) 0x869d9 MOV (%RAX),%RCX |
(898) 0x869dc CMP %RSI,%RCX |
(898) 0x869df JLE 86b5c |
(898) 0x869e5 SUB %RSI,%RCX |
(898) 0x869e8 MOV %RSI,%RDI |
(898) 0x869eb LEA -0x1(%RCX),%RDX |
(898) 0x869ef CMP $0x2,%RDX |
(898) 0x869f3 JBE 86ec1 |
(898) 0x869f9 MOV %RCX,%RDX |
(898) 0x869fc LEA (%R11,%RSI,8),%RAX |
(898) 0x86a00 VBROADCASTSD %XMM12,%YMM6 |
(898) 0x86a05 SHR $0x2,%RDX |
(898) 0x86a09 SAL $0x5,%RDX |
(898) 0x86a0d LEA (%RDX,%RAX,1),%R8 |
(898) 0x86a11 SUB $0x20,%RDX |
(898) 0x86a15 SHR $0x5,%RDX |
(898) 0x86a19 INC %RDX |
(898) 0x86a1c AND $0x7,%EDX |
(898) 0x86a1f JE 86aa9 |
(898) 0x86a25 CMP $0x1,%RDX |
(898) 0x86a29 JE 86a97 |
(898) 0x86a2b CMP $0x2,%RDX |
(898) 0x86a2f JE 86a8a |
(898) 0x86a31 CMP $0x3,%RDX |
(898) 0x86a35 JE 86a7d |
(898) 0x86a37 CMP $0x4,%RDX |
(898) 0x86a3b JE 86a70 |
(898) 0x86a3d CMP $0x5,%RDX |
(898) 0x86a41 JE 86a63 |
(898) 0x86a43 CMP $0x6,%RDX |
(898) 0x86a47 JE 86a56 |
(898) 0x86a49 VMULPD (%RAX),%YMM6,%YMM7 |
(898) 0x86a4d ADD $0x20,%RAX |
(898) 0x86a51 VMOVUPD %YMM7,-0x20(%RAX) |
(898) 0x86a56 VMULPD (%RAX),%YMM6,%YMM2 |
(898) 0x86a5a ADD $0x20,%RAX |
(898) 0x86a5e VMOVUPD %YMM2,-0x20(%RAX) |
(898) 0x86a63 VMULPD (%RAX),%YMM6,%YMM0 |
(898) 0x86a67 ADD $0x20,%RAX |
(898) 0x86a6b VMOVUPD %YMM0,-0x20(%RAX) |
(898) 0x86a70 VMULPD (%RAX),%YMM6,%YMM8 |
(898) 0x86a74 ADD $0x20,%RAX |
(898) 0x86a78 VMOVUPD %YMM8,-0x20(%RAX) |
(898) 0x86a7d VMULPD (%RAX),%YMM6,%YMM9 |
(898) 0x86a81 ADD $0x20,%RAX |
(898) 0x86a85 VMOVUPD %YMM9,-0x20(%RAX) |
(898) 0x86a8a VMULPD (%RAX),%YMM6,%YMM10 |
(898) 0x86a8e ADD $0x20,%RAX |
(898) 0x86a92 VMOVUPD %YMM10,-0x20(%RAX) |
(898) 0x86a97 VMULPD (%RAX),%YMM6,%YMM11 |
(898) 0x86a9b ADD $0x20,%RAX |
(898) 0x86a9f VMOVUPD %YMM11,-0x20(%RAX) |
(898) 0x86aa4 CMP %R8,%RAX |
(898) 0x86aa7 JE 86b18 |
(899) 0x86aa9 VMULPD (%RAX),%YMM6,%YMM13 |
(899) 0x86aad ADD $0x100,%RAX |
(899) 0x86ab3 VMULPD -0xe0(%RAX),%YMM6,%YMM14 |
(899) 0x86abb VMULPD -0xc0(%RAX),%YMM6,%YMM5 |
(899) 0x86ac3 VMULPD -0xa0(%RAX),%YMM6,%YMM15 |
(899) 0x86acb VMULPD -0x80(%RAX),%YMM6,%YMM1 |
(899) 0x86ad0 VMULPD -0x60(%RAX),%YMM6,%YMM7 |
(899) 0x86ad5 VMOVUPD %YMM13,-0x100(%RAX) |
(899) 0x86add VMULPD -0x40(%RAX),%YMM6,%YMM2 |
(899) 0x86ae2 VMOVUPD %YMM14,-0xe0(%RAX) |
(899) 0x86aea VMULPD -0x20(%RAX),%YMM6,%YMM0 |
(899) 0x86aef VMOVUPD %YMM5,-0xc0(%RAX) |
(899) 0x86af7 VMOVUPD %YMM15,-0xa0(%RAX) |
(899) 0x86aff VMOVUPD %YMM1,-0x80(%RAX) |
(899) 0x86b04 VMOVUPD %YMM7,-0x60(%RAX) |
(899) 0x86b09 VMOVUPD %YMM2,-0x40(%RAX) |
(899) 0x86b0e VMOVUPD %YMM0,-0x20(%RAX) |
(899) 0x86b13 CMP %R8,%RAX |
(899) 0x86b16 JNE 86aa9 |
(898) 0x86b18 MOV %RCX,%R8 |
(898) 0x86b1b AND $-0x4,%R8 |
(898) 0x86b1f ADD %R8,%RSI |
(898) 0x86b22 TEST $0x3,%CL |
(898) 0x86b25 JE 86b5c |
(898) 0x86b27 SUB %R8,%RCX |
(898) 0x86b2a CMP $0x1,%RCX |
(898) 0x86b2e JE 86b50 |
(898) 0x86b30 ADD %RDI,%R8 |
(898) 0x86b33 VMOVDDUP %XMM12,%XMM6 |
(898) 0x86b38 LEA (%R11,%R8,8),%RDI |
(898) 0x86b3c VMULPD (%RDI),%XMM6,%XMM8 |
(898) 0x86b40 VMOVUPD %XMM8,(%RDI) |
(898) 0x86b44 TEST $0x1,%CL |
(898) 0x86b47 JE 86b5c |
(898) 0x86b49 AND $-0x2,%RCX |
(898) 0x86b4d ADD %RCX,%RSI |
(898) 0x86b50 LEA (%R11,%RSI,8),%RSI |
(898) 0x86b54 VMULSD (%RSI),%XMM12,%XMM9 |
(898) 0x86b58 VMOVSD %XMM9,(%RSI) |
(898) 0x86b5c ADDQ $0x8,0xf8(%RSP) |
(898) 0x86b65 MOV 0xf8(%RSP),%RCX |
(898) 0x86b6d CMP %RCX,0x50(%RSP) |
(898) 0x86b72 JNE 85d78 |
0x86b78 MOV %R9,%R15 |
0x86b7b VZEROUPPER |
0x86b7e MOV 0x150(%RSP),%RDI |
0x86b86 CALL c850 <hypre_Free@plt> |
0x86b8b MOV 0x118(%RSP),%RDI |
0x86b93 CALL c850 <hypre_Free@plt> |
0x86b98 MOV %R15,%RDI |
0x86b9b CALL c850 <hypre_Free@plt> |
0x86ba0 LEA -0x28(%RBP),%RSP |
0x86ba4 MOV %RBX,%RDI |
0x86ba7 POP %RBX |
0x86ba8 POP %R12 |
0x86baa POP %R13 |
0x86bac POP %R14 |
0x86bae POP %R15 |
0x86bb0 POP %RBP |
0x86bb1 JMP c850 |
0x86bb6 NOPW %CS:(%RAX,%RAX,1) |
(901) 0x86bc0 MOV 0x10(%RSP),%RCX |
(901) 0x86bc5 MOV 0x18(%RSP),%R13 |
(901) 0x86bca MOV (%RCX,%R8,1),%RCX |
(901) 0x86bce MOV 0x8(%R13,%R8,1),%R10 |
(901) 0x86bd3 ADD %RCX,%R10 |
(901) 0x86bd6 MOV %R10,0xe8(%RSP) |
(901) 0x86bde CMP %R10,%RCX |
(901) 0x86be1 JGE 86782 |
(901) 0x86be7 MOV 0x8(%RSP),%R8 |
(901) 0x86bec MOV 0xe0(%RSP),%R13 |
(901) 0x86bf4 SUB %RCX,%R10 |
(901) 0x86bf7 MOV (%R8,%R13,1),%R8 |
(901) 0x86bfb AND $0x3,%R10D |
(901) 0x86bff JE 86ce4 |
(901) 0x86c05 CMP $0x1,%R10 |
(901) 0x86c09 JE 86c95 |
(901) 0x86c0f CMP $0x2,%R10 |
(901) 0x86c13 JE 86c54 |
(901) 0x86c15 VMOVSD (%RDX),%XMM1 |
(901) 0x86c19 MOV 0x88(%RSP),%R13 |
(901) 0x86c21 MOV (%R8,%RCX,8),%R10 |
(901) 0x86c25 VMULSD (%R13,%RCX,8),%XMM1,%XMM6 |
(901) 0x86c2c TEST %R10,%R10 |
(901) 0x86c2f JS 86ec9 |
(901) 0x86c35 MOV (%RBX,%R10,8),%R10 |
(901) 0x86c39 LEA (%R11,%R10,8),%R13 |
(901) 0x86c3d VADDSD (%R13),%XMM6,%XMM7 |
(901) 0x86c43 VMOVSD %XMM7,(%R13) |
(901) 0x86c49 VADDSD %XMM6,%XMM2,%XMM2 |
(901) 0x86c4d VADDSD %XMM6,%XMM0,%XMM0 |
(901) 0x86c51 INC %RCX |
(901) 0x86c54 VMOVSD (%RDX),%XMM9 |
(901) 0x86c58 MOV 0x88(%RSP),%R13 |
(901) 0x86c60 MOV (%R8,%RCX,8),%R10 |
(901) 0x86c64 VMULSD (%R13,%RCX,8),%XMM9,%XMM10 |
(901) 0x86c6b TEST %R10,%R10 |
(901) 0x86c6e JS 86e90 |
(901) 0x86c74 MOV (%RBX,%R10,8),%R10 |
(901) 0x86c78 LEA (%R11,%R10,8),%R13 |
(901) 0x86c7c VADDSD (%R13),%XMM10,%XMM5 |
(901) 0x86c82 VMOVSD %XMM5,(%R13) |
(901) 0x86c88 VADDSD %XMM10,%XMM2,%XMM2 |
(901) 0x86c8d VADDSD %XMM10,%XMM0,%XMM0 |
(901) 0x86c92 INC %RCX |
(901) 0x86c95 VMOVSD (%RDX),%XMM13 |
(901) 0x86c99 MOV 0x88(%RSP),%R13 |
(901) 0x86ca1 MOV (%R8,%RCX,8),%R10 |
(901) 0x86ca5 VMULSD (%R13,%RCX,8),%XMM13,%XMM12 |
(901) 0x86cac TEST %R10,%R10 |
(901) 0x86caf JS 86e60 |
(901) 0x86cb5 MOV (%RBX,%R10,8),%R10 |
(901) 0x86cb9 LEA (%R11,%R10,8),%R13 |
(901) 0x86cbd VADDSD (%R13),%XMM12,%XMM14 |
(901) 0x86cc3 VMOVSD %XMM14,(%R13) |
(901) 0x86cc9 INC %RCX |
(901) 0x86ccc VADDSD %XMM12,%XMM2,%XMM2 |
(901) 0x86cd1 VADDSD %XMM12,%XMM0,%XMM0 |
(901) 0x86cd6 CMP %RCX,0xe8(%RSP) |
(901) 0x86cde JE 86782 |
(901) 0x86ce4 MOV %R14,(%RSP) |
(901) 0x86ce8 MOV 0x88(%RSP),%R13 |
(901) 0x86cf0 JMP 86d96 |
0x86cf5 NOPL (%RAX) |
(902) 0x86cf8 MOV (%RBX,%R10,8),%R14 |
(902) 0x86cfc LEA (%R11,%R14,8),%R10 |
(902) 0x86d00 VADDSD (%R10),%XMM9,%XMM10 |
(902) 0x86d05 VMOVSD %XMM10,(%R10) |
(902) 0x86d0a LEA 0x1(%RCX),%R14 |
(902) 0x86d0e VMOVSD (%RDX),%XMM14 |
(902) 0x86d12 VADDSD %XMM9,%XMM2,%XMM11 |
(902) 0x86d17 MOV (%R8,%R14,8),%R10 |
(902) 0x86d1b VADDSD %XMM9,%XMM0,%XMM13 |
(902) 0x86d20 VMULSD (%R13,%R14,8),%XMM14,%XMM15 |
(902) 0x86d27 TEST %R10,%R10 |
(902) 0x86d2a JS 86e40 |
(902) 0x86d30 MOV (%RBX,%R10,8),%R14 |
(902) 0x86d34 LEA (%R11,%R14,8),%R10 |
(902) 0x86d38 VADDSD (%R10),%XMM15,%XMM12 |
(902) 0x86d3d VMOVSD %XMM12,(%R10) |
(902) 0x86d42 LEA 0x2(%RCX),%R14 |
(902) 0x86d46 VMOVSD (%RDX),%XMM2 |
(902) 0x86d4a VADDSD %XMM15,%XMM11,%XMM6 |
(902) 0x86d4f MOV (%R8,%R14,8),%R10 |
(902) 0x86d53 VADDSD %XMM15,%XMM13,%XMM7 |
(902) 0x86d58 VMULSD (%R13,%R14,8),%XMM2,%XMM12 |
(902) 0x86d5f TEST %R10,%R10 |
(902) 0x86d62 JS 86e20 |
(902) 0x86d68 MOV (%RBX,%R10,8),%R14 |
(902) 0x86d6c LEA (%R11,%R14,8),%R10 |
(902) 0x86d70 VADDSD (%R10),%XMM12,%XMM0 |
(902) 0x86d75 VMOVSD %XMM0,(%R10) |
(902) 0x86d7a ADD $0x3,%RCX |
(902) 0x86d7e VADDSD %XMM12,%XMM6,%XMM2 |
(902) 0x86d83 VADDSD %XMM12,%XMM7,%XMM0 |
(902) 0x86d88 CMP %RCX,0xe8(%RSP) |
(902) 0x86d90 JE 86e80 |
(902) 0x86d96 VMOVSD (%RDX),%XMM12 |
(902) 0x86d9a MOV (%R8,%RCX,8),%R14 |
(902) 0x86d9e VMULSD (%R13,%RCX,8),%XMM12,%XMM1 |
(902) 0x86da5 TEST %R14,%R14 |
(902) 0x86da8 JS 86e00 |
(902) 0x86daa MOV (%RBX,%R14,8),%R10 |
(902) 0x86dae LEA (%R11,%R10,8),%R14 |
(902) 0x86db2 VADDSD (%R14),%XMM1,%XMM6 |
(902) 0x86db7 VMOVSD %XMM6,(%R14) |
(902) 0x86dbc INC %RCX |
(902) 0x86dbf VMOVSD (%RDX),%XMM8 |
(902) 0x86dc3 VADDSD %XMM1,%XMM2,%XMM2 |
(902) 0x86dc7 VADDSD %XMM1,%XMM0,%XMM0 |
(902) 0x86dcb MOV (%R8,%RCX,8),%R10 |
(902) 0x86dcf VMULSD (%R13,%RCX,8),%XMM8,%XMM9 |
(902) 0x86dd6 TEST %R10,%R10 |
(902) 0x86dd9 JNS 86cf8 |
(902) 0x86ddf NOT %R10 |
(902) 0x86de2 MOV (%R9,%R10,8),%R14 |
(902) 0x86de6 LEA (%R12,%R14,8),%R10 |
(902) 0x86dea VADDSD (%R10),%XMM9,%XMM5 |
(902) 0x86def VMOVSD %XMM5,(%R10) |
(902) 0x86df4 JMP 86d0a |
0x86df9 NOPL (%RAX) |
(902) 0x86e00 NOT %R14 |
(902) 0x86e03 MOV (%R9,%R14,8),%R10 |
(902) 0x86e07 LEA (%R12,%R10,8),%R14 |
(902) 0x86e0b VADDSD (%R14),%XMM1,%XMM7 |
(902) 0x86e10 VMOVSD %XMM7,(%R14) |
(902) 0x86e15 JMP 86dbc |
0x86e17 NOPW (%RAX,%RAX,1) |
(902) 0x86e20 NOT %R10 |
(902) 0x86e23 MOV (%R9,%R10,8),%R14 |
(902) 0x86e27 LEA (%R12,%R14,8),%R10 |
(902) 0x86e2b VADDSD (%R10),%XMM12,%XMM8 |
(902) 0x86e30 VMOVSD %XMM8,(%R10) |
(902) 0x86e35 JMP 86d7a |
0x86e3a NOPW (%RAX,%RAX,1) |
(902) 0x86e40 NOT %R10 |
(902) 0x86e43 MOV (%R9,%R10,8),%R14 |
(902) 0x86e47 LEA (%R12,%R14,8),%R10 |
(902) 0x86e4b VADDSD (%R10),%XMM15,%XMM1 |
(902) 0x86e50 VMOVSD %XMM1,(%R10) |
(902) 0x86e55 JMP 86d42 |
0x86e5a NOPW (%RAX,%RAX,1) |
(901) 0x86e60 NOT %R10 |
(901) 0x86e63 MOV (%R9,%R10,8),%R10 |
(901) 0x86e67 LEA (%R12,%R10,8),%R13 |
(901) 0x86e6b VADDSD (%R13),%XMM12,%XMM15 |
(901) 0x86e71 VMOVSD %XMM15,(%R13) |
(901) 0x86e77 JMP 86cc9 |
0x86e7c NOPL (%RAX) |
(901) 0x86e80 MOV (%RSP),%R14 |
(901) 0x86e84 JMP 86782 |
0x86e89 NOPL (%RAX) |
(901) 0x86e90 NOT %R10 |
(901) 0x86e93 MOV (%R9,%R10,8),%R10 |
(901) 0x86e97 LEA (%R12,%R10,8),%R13 |
(901) 0x86e9b VADDSD (%R13),%XMM10,%XMM11 |
(901) 0x86ea1 VMOVSD %XMM11,(%R13) |
(901) 0x86ea7 JMP 86c88 |
(898) 0x86eac VXORPD %XMM0,%XMM0,%XMM0 |
(898) 0x86eb0 VMOVSD %XMM0,%XMM0,%XMM2 |
(898) 0x86eb4 JMP 866f8 |
(898) 0x86eb9 XOR %R8D,%R8D |
(898) 0x86ebc JMP 86991 |
(898) 0x86ec1 XOR %R8D,%R8D |
(898) 0x86ec4 JMP 86b27 |
(901) 0x86ec9 NOT %R10 |
(901) 0x86ecc MOV (%R9,%R10,8),%R10 |
(901) 0x86ed0 LEA (%R12,%R10,8),%R13 |
(901) 0x86ed4 VADDSD (%R13),%XMM6,%XMM8 |
(901) 0x86eda VMOVSD %XMM8,(%R13) |
(901) 0x86ee0 JMP 86c49 |
0x86ee5 MOV %R11,0xb8(%RSP) |
0x86eed MOV $0x8,%ESI |
0x86ef2 MOV %RDX,%RDI |
0x86ef5 MOV %R10,0xc0(%RSP) |
0x86efd VMOVSD %XMM1,0xe0(%RSP) |
0x86f06 JMP 85bc3 |
0x86f0b MOV $0x8,%ESI |
0x86f10 MOV %RCX,%RDI |
0x86f13 MOV %R11,0x98(%RSP) |
0x86f1b MOV %R10,0xa0(%RSP) |
0x86f23 MOV %RDX,0xb8(%RSP) |
0x86f2b MOV %R8,0xc0(%RSP) |
0x86f33 VMOVSD %XMM1,0xe0(%RSP) |
0x86f3c CALL ce60 <hypre_CAlloc@plt> |
0x86f41 VMOVSD 0xe0(%RSP),%XMM1 |
0x86f4a MOV 0xc0(%RSP),%R8 |
0x86f52 MOV 0xb8(%RSP),%RDX |
0x86f5a MOV 0xa0(%RSP),%R10 |
0x86f62 MOV %RAX,%R15 |
0x86f65 MOV 0x98(%RSP),%R11 |
0x86f6d JMP 85b99 |
0x86f72 MOV $0x8,%ESI |
0x86f77 MOV %R14,%RDI |
0x86f7a MOV %R11,0x90(%RSP) |
0x86f82 MOV %R10,0x98(%RSP) |
0x86f8a MOV %RCX,0xa0(%RSP) |
0x86f92 MOV %RDX,0xb8(%RSP) |
0x86f9a MOV %R8,0xc0(%RSP) |
0x86fa2 VMOVSD %XMM1,0xe0(%RSP) |
0x86fab CALL ce60 <hypre_CAlloc@plt> |
0x86fb0 VMOVSD 0xe0(%RSP),%XMM1 |
0x86fb9 MOV 0xc0(%RSP),%R8 |
0x86fc1 MOV 0xb8(%RSP),%RDX |
0x86fc9 MOV 0xa0(%RSP),%RCX |
0x86fd1 MOV %RAX,0x118(%RSP) |
0x86fd9 MOV 0x98(%RSP),%R10 |
0x86fe1 MOV 0x90(%RSP),%R11 |
0x86fe9 JMP 85b8d |
0x86fee MOV %RSI,%RDI |
0x86ff1 MOV $0x8,%ESI |
0x86ff6 MOV %R11,0x98(%RSP) |
0x86ffe MOV %R10,0xa0(%RSP) |
0x87006 MOV %RCX,0xb8(%RSP) |
0x8700e MOV %RDX,0xc0(%RSP) |
0x87016 MOV %R8,0xe0(%RSP) |
0x8701e VMOVSD %XMM1,0x118(%RSP) |
0x87027 CALL ce60 <hypre_CAlloc@plt> |
0x8702c VMOVSD 0x118(%RSP),%XMM1 |
0x87035 MOV 0xe0(%RSP),%R8 |
0x8703d MOV 0xc0(%RSP),%RDX |
0x87045 MOV 0xb8(%RSP),%RCX |
0x8704d MOV %RAX,0x150(%RSP) |
0x87055 MOV 0xa0(%RSP),%R10 |
0x8705d MOV 0x98(%RSP),%R11 |
0x87065 JMP 85b78 |
0x8706a NOPW (%RAX,%RAX,1) |
Path / |
Source file and lines | par_multi_interp.c:1737-1881 |
Module | libparcsr_ls.so |
nb instructions | 260 |
nb uops | 276 |
loop length | 1576 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 4 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 44 |
micro-operation queue | 46.00 cycles |
front end | 46.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 6.80 | 6.80 | 30.67 | 30.67 | 45.00 | 6.80 | 6.80 | 45.00 | 45.00 | 45.00 | 6.80 | 30.67 |
cycles | 6.80 | 8.00 | 30.67 | 30.67 | 45.00 | 6.80 | 6.80 | 45.00 | 45.00 | 45.00 | 6.80 | 30.67 |
Cycles executing div or sqrt instructions | 10.00 |
FE+BE cycles | 45.09 |
Stall cycles | 0.93 |
RS full (events) | 4.18 |
Front-end | 46.00 |
Dispatch | 45.00 |
DIV/SQRT | 10.00 |
Overall L1 | 46.00 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 5% |
all | 6% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 1% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 11% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 13% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 13% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x20,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x160,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x148(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x138(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x130(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x128(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x108(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x100(%RDI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xf8(%RDI),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xf0(%RDI),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe8(%RDI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe0(%RDI),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x138(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x110(%RDI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x140(%RDI),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,0x130(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x120(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x118(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd8(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xd0(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc8(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc0(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb8(%RDI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R15,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%RDI),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa8(%RDI),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x98(%RDI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x80(%RDI),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x60(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R15,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa0(%RDI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x90(%RDI),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RDI),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RDI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RDI),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDI),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x108(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,0x110(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RSI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 86fee <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x167e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOVQ $0,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R14,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 86f72 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1602> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOVQ $0,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RCX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 86f0b <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x159b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %R15D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 86ee5 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1575> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R11,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R10,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM1,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL ce60 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,0x158(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
VMOVSD 0xe0(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xc0(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb8(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JLE 85c3f <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x2cf> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x158(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x150(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD %XMM1,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RAX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL c100 <memset@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
VMOVSD 0xe0(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc0(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb8(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R14,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 85c90 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x320> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x118(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%R14,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD %XMM1,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL c100 <memset@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
VMOVSD 0x158(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe0(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM1,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL c9a0 <hypre_GetThreadNum@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL cb00 <hypre_NumActiveThreads@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0xe8(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xf8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x148(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x148(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R8,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (,%R8,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVSD 0x158(%RSP),%XMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDI,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IDIV %R9 | 5 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 10 |
ADD %RCX,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
DEC %R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R11,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xb8(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RAX,%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R10,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%RCX,%R10,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xc0(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R9,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVNE %RAX,%R8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %RSI,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 86b7e <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x120e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xb0(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVQ 0x9b81b(%RIP),%XMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM3,%XMM3,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R14,%R8,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R14,%RSI,8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xe8(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xa8(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
DEC %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R9,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV 0x150(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL c850 <hypre_Free@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x118(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL c850 <hypre_Free@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL c850 <hypre_Free@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP c850 <hypre_Free@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R11,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R10,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM1,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 85bc3 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x253> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R11,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM1,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL ce60 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
VMOVSD 0xe0(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc0(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa0(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x98(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 85b99 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x229> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R14,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R11,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM1,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL ce60 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
VMOVSD 0xe0(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc0(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa0(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x90(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 85b8d <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x21d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV %RSI,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R11,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM1,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL ce60 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
VMOVSD 0x118(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe0(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc0(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb8(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa0(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x98(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 85b78 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x208> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | par_multi_interp.c:1737-1881 |
Module | libparcsr_ls.so |
nb instructions | 260 |
nb uops | 276 |
loop length | 1576 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 4 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 44 |
micro-operation queue | 46.00 cycles |
front end | 46.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 6.80 | 6.80 | 30.67 | 30.67 | 45.00 | 6.80 | 6.80 | 45.00 | 45.00 | 45.00 | 6.80 | 30.67 |
cycles | 6.80 | 8.00 | 30.67 | 30.67 | 45.00 | 6.80 | 6.80 | 45.00 | 45.00 | 45.00 | 6.80 | 30.67 |
Cycles executing div or sqrt instructions | 10.00 |
FE+BE cycles | 45.09 |
Stall cycles | 0.93 |
RS full (events) | 4.18 |
Front-end | 46.00 |
Dispatch | 45.00 |
DIV/SQRT | 10.00 |
Overall L1 | 46.00 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 5% |
all | 6% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 1% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 11% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 13% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 13% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x20,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x160,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x148(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x138(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x130(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x128(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x108(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x100(%RDI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xf8(%RDI),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xf0(%RDI),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe8(%RDI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe0(%RDI),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x138(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x110(%RDI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x140(%RDI),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,0x130(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x120(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x118(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd8(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xd0(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc8(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc0(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb8(%RDI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R15,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%RDI),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa8(%RDI),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x98(%RDI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x80(%RDI),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x60(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R15,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa0(%RDI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x90(%RDI),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RDI),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RDI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RDI),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDI),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x108(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,0x110(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RSI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 86fee <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x167e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOVQ $0,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R14,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 86f72 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1602> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOVQ $0,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RCX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 86f0b <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x159b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %R15D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 86ee5 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1575> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R11,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R10,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM1,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL ce60 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,0x158(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
VMOVSD 0xe0(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xc0(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb8(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JLE 85c3f <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x2cf> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x158(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x150(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD %XMM1,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RAX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL c100 <memset@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
VMOVSD 0xe0(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc0(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb8(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R14,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 85c90 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x320> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x118(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%R14,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD %XMM1,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL c100 <memset@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
VMOVSD 0x158(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe0(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM1,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL c9a0 <hypre_GetThreadNum@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL cb00 <hypre_NumActiveThreads@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0xe8(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xf8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x148(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x148(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R8,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (,%R8,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVSD 0x158(%RSP),%XMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDI,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IDIV %R9 | 5 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 10 |
ADD %RCX,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
DEC %R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R11,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xb8(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RAX,%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R10,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%RCX,%R10,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xc0(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R9,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVNE %RAX,%R8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %RSI,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 86b7e <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x120e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xb0(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVQ 0x9b81b(%RIP),%XMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM3,%XMM3,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R14,%R8,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R14,%RSI,8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xe8(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xa8(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
DEC %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R9,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV 0x150(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL c850 <hypre_Free@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x118(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL c850 <hypre_Free@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL c850 <hypre_Free@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP c850 <hypre_Free@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R11,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R10,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM1,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 85bc3 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x253> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R11,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM1,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL ce60 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
VMOVSD 0xe0(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc0(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa0(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x98(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 85b99 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x229> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R14,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R11,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM1,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL ce60 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
VMOVSD 0xe0(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc0(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa0(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x90(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 85b8d <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x21d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV %RSI,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R11,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM1,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL ce60 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
VMOVSD 0x118(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe0(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc0(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb8(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa0(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x98(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 85b78 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x208> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼hypre_BoomerAMGBuildMultipass._omp_fn.10– | 2.69 | 0.63 |
▼Loop 898 - par_multi_interp.c:1774-1876 - libparcsr_ls.so– | 0.38 | 0.06 |
▼Loop 903 - par_multi_interp.c:1811-1837 - libparcsr_ls.so– | 1.54 | 0.26 |
○Loop 905 - par_multi_interp.c:1816-1822 - libparcsr_ls.so | 0 | 0 |
○Loop 904 - par_multi_interp.c:1824-1830 - libparcsr_ls.so | 0 | 0 |
○Loop 907 - par_multi_interp.c:1799-1803 - libparcsr_ls.so | 0.77 | 0.13 |
○Loop 909 - par_multi_interp.c:1782-1787 - libparcsr_ls.so | 0 | 0 |
○Loop 908 - par_multi_interp.c:1792-1797 - libparcsr_ls.so | 0 | 0 |
▼Loop 901 - par_multi_interp.c:1840-1867 - libparcsr_ls.so– | 0 | 0 |
○Loop 902 - par_multi_interp.c:1851-1860 - libparcsr_ls.so | 0 | 0 |
○Loop 899 - par_multi_interp.c:1875-1876 - libparcsr_ls.so | 0 | 0 |
○Loop 906 - par_multi_interp.c:1805-1809 - libparcsr_ls.so | 0 | 0 |
○Loop 900 - par_multi_interp.c:1873-1874 - libparcsr_ls.so | 0 | 0 |