Function: hypre_BoomerAMGCorrectCFMarker | Module: exec | Source: par_strength.c:2311-2320 | Coverage: 0.01% |
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Function: hypre_BoomerAMGCorrectCFMarker | Module: exec | Source: par_strength.c:2311-2320 | Coverage: 0.01% |
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/home/eoseret/qaas_runs_CPU_9468/171-112-7443/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c: 2311 - 2320 |
-------------------------------------------------------------------------------- |
2311: for (i=0; i < num_var; i++) |
2312: { |
2313: if (CF_marker[i] > 0 ) |
2314: { |
2315: if (CF_marker[i] == 1) CF_marker[i] = new_CF_marker[cnt++]; |
2316: else { CF_marker[i] = 1; cnt++;} |
2317: } |
2318: } |
2319: |
2320: return 0; |
0x4aafb0 TEST %RSI,%RSI |
0x4aafb3 JLE 4ab10d |
0x4aafb9 CMP $0x4,%RSI |
0x4aafbd JAE 4ab000 |
0x4aafbf XOR %EAX,%EAX |
0x4aafc1 MOV %RSI,%RCX |
0x4aafc4 AND $-0x4,%RCX |
0x4aafc8 CMP %RSI,%RCX |
0x4aafcb JB 4ab14f |
0x4aafd1 JMP 4ab10d |
0x4aafd6 NOPW %CS:(%RAX,%RAX,1) |
0x4aafe5 NOPW %CS:(%RAX,%RAX,1) |
0x4aaff4 NOPW %CS:(%RAX,%RAX,1) |
0x4ab000 PUSH %RBP |
0x4ab001 MOV %RSP,%RBP |
0x4ab004 MOV %RSI,%RCX |
0x4ab007 SHR $0x2,%RCX |
0x4ab00b LEA 0x18(%RDI),%R8 |
0x4ab00f XOR %EAX,%EAX |
0x4ab011 JMP 4ab053 |
0x4ab013 NOPW %CS:(%RAX,%RAX,1) |
0x4ab022 NOPW %CS:(%RAX,%RAX,1) |
0x4ab031 NOPW %CS:(%RAX,%RAX,1) |
(2457) 0x4ab040 INC %RAX |
(2457) 0x4ab043 MOV %R9,(%R8) |
(2457) 0x4ab046 ADD $0x20,%R8 |
(2457) 0x4ab04a DEC %RCX |
(2457) 0x4ab04d JE 4ab100 |
(2457) 0x4ab053 MOV -0x18(%R8),%R10 |
(2457) 0x4ab057 TEST %R10,%R10 |
(2457) 0x4ab05a JLE 4ab073 |
(2457) 0x4ab05c MOV $0x1,%R9D |
(2457) 0x4ab062 CMP $0x1,%R10 |
(2457) 0x4ab066 JNE 4ab06c |
(2457) 0x4ab068 MOV (%RDX,%RAX,8),%R9 |
(2457) 0x4ab06c INC %RAX |
(2457) 0x4ab06f MOV %R9,-0x18(%R8) |
(2457) 0x4ab073 MOV -0x10(%R8),%R10 |
(2457) 0x4ab077 TEST %R10,%R10 |
(2457) 0x4ab07a JLE 4ab093 |
(2457) 0x4ab07c MOV $0x1,%R9D |
(2457) 0x4ab082 CMP $0x1,%R10 |
(2457) 0x4ab086 JNE 4ab08c |
(2457) 0x4ab088 MOV (%RDX,%RAX,8),%R9 |
(2457) 0x4ab08c INC %RAX |
(2457) 0x4ab08f MOV %R9,-0x10(%R8) |
(2457) 0x4ab093 MOV -0x8(%R8),%R10 |
(2457) 0x4ab097 TEST %R10,%R10 |
(2457) 0x4ab09a JLE 4ab0b3 |
(2457) 0x4ab09c MOV $0x1,%R9D |
(2457) 0x4ab0a2 CMP $0x1,%R10 |
(2457) 0x4ab0a6 JNE 4ab0ac |
(2457) 0x4ab0a8 MOV (%RDX,%RAX,8),%R9 |
(2457) 0x4ab0ac INC %RAX |
(2457) 0x4ab0af MOV %R9,-0x8(%R8) |
(2457) 0x4ab0b3 MOV (%R8),%R10 |
(2457) 0x4ab0b6 TEST %R10,%R10 |
(2457) 0x4ab0b9 JLE 4ab046 |
(2457) 0x4ab0bb MOV $0x1,%R9D |
(2457) 0x4ab0c1 CMP $0x1,%R10 |
(2457) 0x4ab0c5 JNE 4ab040 |
(2457) 0x4ab0cb MOV (%RDX,%RAX,8),%R9 |
(2457) 0x4ab0cf JMP 4ab040 |
0x4ab0d4 NOPW %CS:(%RAX,%RAX,1) |
0x4ab0e3 NOPW %CS:(%RAX,%RAX,1) |
0x4ab0f2 NOPW %CS:(%RAX,%RAX,1) |
0x4ab100 POP %RBP |
0x4ab101 MOV %RSI,%RCX |
0x4ab104 AND $-0x4,%RCX |
0x4ab108 CMP %RSI,%RCX |
0x4ab10b JB 4ab14f |
0x4ab10d XOR %EAX,%EAX |
0x4ab10f RET |
0x4ab110 NOPW %CS:(%RAX,%RAX,1) |
0x4ab11f NOPW %CS:(%RAX,%RAX,1) |
0x4ab12e NOPW %CS:(%RAX,%RAX,1) |
0x4ab13d NOPL (%RAX) |
(2456) 0x4ab140 INC %RAX |
(2456) 0x4ab143 MOV %R8,(%RDI,%RCX,8) |
(2456) 0x4ab147 INC %RCX |
(2456) 0x4ab14a CMP %RCX,%RSI |
(2456) 0x4ab14d JE 4ab10d |
(2456) 0x4ab14f MOV (%RDI,%RCX,8),%R9 |
(2456) 0x4ab153 TEST %R9,%R9 |
(2456) 0x4ab156 JLE 4ab147 |
(2456) 0x4ab158 MOV $0x1,%R8D |
(2456) 0x4ab15e CMP $0x1,%R9 |
(2456) 0x4ab162 JNE 4ab140 |
(2456) 0x4ab164 MOV (%RDX,%RAX,8),%R8 |
(2456) 0x4ab168 JMP 4ab140 |
0x4ab16a NOPW (%RAX,%RAX,1) |
Path / |
Source file and lines | par_strength.c:2311-2320 |
Module | exec |
nb instructions | 38 |
nb uops | 38 |
loop length | 258 |
used x86 registers | 7 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 6.33 cycles |
front end | 6.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 3.00 | 2.00 | 0.67 | 0.67 | 0.50 | 2.00 | 3.00 | 0.50 | 0.50 | 0.50 | 2.00 | 0.67 |
cycles | 3.00 | 2.00 | 0.67 | 0.67 | 0.50 | 2.00 | 3.00 | 0.50 | 0.50 | 0.50 | 2.00 | 0.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 6.42 |
Stall cycles | 0.00 |
Front-end | 6.33 |
Dispatch | 3.00 |
Overall L1 | 6.33 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
TEST %RSI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 4ab10d <hypre_BoomerAMGCorrectCFMarker+0x15d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4ab000 <hypre_BoomerAMGCorrectCFMarker+0x50> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RSI,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 4ab14f <hypre_BoomerAMGCorrectCFMarker+0x19f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 4ab10d <hypre_BoomerAMGCorrectCFMarker+0x15d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RSI,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(%RDI),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4ab053 <hypre_BoomerAMGCorrectCFMarker+0xa3> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
MOV %RSI,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 4ab14f <hypre_BoomerAMGCorrectCFMarker+0x19f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | par_strength.c:2311-2320 |
Module | exec |
nb instructions | 38 |
nb uops | 38 |
loop length | 258 |
used x86 registers | 7 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 6.33 cycles |
front end | 6.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 3.00 | 2.00 | 0.67 | 0.67 | 0.50 | 2.00 | 3.00 | 0.50 | 0.50 | 0.50 | 2.00 | 0.67 |
cycles | 3.00 | 2.00 | 0.67 | 0.67 | 0.50 | 2.00 | 3.00 | 0.50 | 0.50 | 0.50 | 2.00 | 0.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 6.42 |
Stall cycles | 0.00 |
Front-end | 6.33 |
Dispatch | 3.00 |
Overall L1 | 6.33 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
TEST %RSI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 4ab10d <hypre_BoomerAMGCorrectCFMarker+0x15d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4ab000 <hypre_BoomerAMGCorrectCFMarker+0x50> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RSI,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 4ab14f <hypre_BoomerAMGCorrectCFMarker+0x19f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 4ab10d <hypre_BoomerAMGCorrectCFMarker+0x15d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RSI,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(%RDI),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4ab053 <hypre_BoomerAMGCorrectCFMarker+0xa3> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
MOV %RSI,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 4ab14f <hypre_BoomerAMGCorrectCFMarker+0x19f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼hypre_BoomerAMGCorrectCFMarker– | 0.01 | 0 |
○Loop 2457 - par_strength.c:2311-2315 - exec | 0.01 | 0.05 |
○Loop 2456 - par_strength.c:2311-2315 - exec | 0 | 0 |