Loop Id: 3579 | Module: exec | Source: par_csr_matop.c:109-231 [...] | Coverage: 1.11% |
---|
Loop Id: 3579 | Module: exec | Source: par_csr_matop.c:109-231 [...] | Coverage: 1.11% |
---|
0x4e6040 MOV -0x30(%RBP),%R11 |
0x4e6044 CMP %R11,%R12 |
0x4e6047 LEA 0x1(%R12),%R12 |
0x4e604c MOV -0x38(%RBP),%R13 |
0x4e6050 JE 4e5a80 |
0x4e6056 LEA (%R13,%R12,1),%RAX |
0x4e605b MOV -0x78(%RBP),%RCX |
0x4e605f MOV (%RCX,%RAX,8),%RDI |
0x4e6063 MOV 0x20(%RBP),%RCX |
0x4e6067 MOV (%RCX,%RDI,8),%RAX |
0x4e606b MOV 0x8(%RCX,%RDI,8),%R13 |
0x4e6070 MOV %R13,%R9 |
0x4e6073 SUB %RAX,%R9 |
0x4e6076 JLE 4e6244 |
0x4e607c CMP $0x8,%R9 |
0x4e6080 JAE 4e6100 |
0x4e6086 MOV %R9,%RCX |
0x4e6089 AND $-0x8,%RCX |
0x4e608d CMP %R9,%RCX |
0x4e6090 JAE 4e6240 |
0x4e6096 ADD %RCX,%RAX |
0x4e6099 MOV 0x28(%RBP),%RSI |
0x4e609d MOV -0x30(%RBP),%R11 |
0x4e60a1 JMP 4e60cc |
(3582) 0x4e60c0 INC %RAX |
(3582) 0x4e60c3 CMP %RAX,%R13 |
(3582) 0x4e60c6 JE 4e6244 |
(3582) 0x4e60cc MOV (%RSI,%RAX,8),%RCX |
(3582) 0x4e60d0 CMP %R8,(%R14,%RCX,8) |
(3582) 0x4e60d4 JGE 4e60c0 |
(3582) 0x4e60d6 MOV %RBX,(%R14,%RCX,8) |
(3582) 0x4e60da INC %RBX |
(3582) 0x4e60dd JMP 4e60c0 |
0x4e6100 MOV %R9,%RCX |
0x4e6103 SHR $0x3,%RCX |
0x4e6107 MOV -0x70(%RBP),%RSI |
0x4e610b LEA (%RSI,%RAX,8),%R11 |
0x4e610f JMP 4e614d |
(3583) 0x4e6140 ADD $0x40,%R11 |
(3583) 0x4e6144 DEC %RCX |
(3583) 0x4e6147 JE 4e6086 |
(3583) 0x4e614d MOV -0x38(%R11),%RSI |
(3583) 0x4e6151 CMP %R8,(%R14,%RSI,8) |
(3583) 0x4e6155 JGE 4e61c0 |
(3583) 0x4e6157 MOV %RBX,(%R14,%RSI,8) |
(3583) 0x4e615b INC %RBX |
(3583) 0x4e615e MOV -0x30(%R11),%RSI |
(3583) 0x4e6162 CMP %R8,(%R14,%RSI,8) |
(3583) 0x4e6166 JL 4e61ca |
(3583) 0x4e6168 MOV -0x28(%R11),%RSI |
(3583) 0x4e616c CMP %R8,(%R14,%RSI,8) |
(3583) 0x4e6170 JGE 4e61db |
(3583) 0x4e6172 MOV %RBX,(%R14,%RSI,8) |
(3583) 0x4e6176 INC %RBX |
(3583) 0x4e6179 MOV -0x20(%R11),%RSI |
(3583) 0x4e617d CMP %R8,(%R14,%RSI,8) |
(3583) 0x4e6181 JL 4e61e5 |
(3583) 0x4e6183 MOV -0x18(%R11),%RSI |
(3583) 0x4e6187 CMP %R8,(%R14,%RSI,8) |
(3583) 0x4e618b JGE 4e61f6 |
(3583) 0x4e618d MOV %RBX,(%R14,%RSI,8) |
(3583) 0x4e6191 INC %RBX |
(3583) 0x4e6194 MOV -0x10(%R11),%RSI |
(3583) 0x4e6198 CMP %R8,(%R14,%RSI,8) |
(3583) 0x4e619c JL 4e6200 |
(3583) 0x4e619e MOV -0x8(%R11),%RSI |
(3583) 0x4e61a2 CMP %R8,(%R14,%RSI,8) |
(3583) 0x4e61a6 JGE 4e6211 |
(3583) 0x4e61a8 MOV %RBX,(%R14,%RSI,8) |
(3583) 0x4e61ac INC %RBX |
(3583) 0x4e61af MOV (%R11),%RSI |
(3583) 0x4e61b2 CMP %R8,(%R14,%RSI,8) |
(3583) 0x4e61b6 JGE 4e6140 |
(3583) 0x4e61b8 JMP 4e621e |
(3583) 0x4e61c0 MOV -0x30(%R11),%RSI |
(3583) 0x4e61c4 CMP %R8,(%R14,%RSI,8) |
(3583) 0x4e61c8 JGE 4e6168 |
(3583) 0x4e61ca MOV %RBX,(%R14,%RSI,8) |
(3583) 0x4e61ce INC %RBX |
(3583) 0x4e61d1 MOV -0x28(%R11),%RSI |
(3583) 0x4e61d5 CMP %R8,(%R14,%RSI,8) |
(3583) 0x4e61d9 JL 4e6172 |
(3583) 0x4e61db MOV -0x20(%R11),%RSI |
(3583) 0x4e61df CMP %R8,(%R14,%RSI,8) |
(3583) 0x4e61e3 JGE 4e6183 |
(3583) 0x4e61e5 MOV %RBX,(%R14,%RSI,8) |
(3583) 0x4e61e9 INC %RBX |
(3583) 0x4e61ec MOV -0x18(%R11),%RSI |
(3583) 0x4e61f0 CMP %R8,(%R14,%RSI,8) |
(3583) 0x4e61f4 JL 4e618d |
(3583) 0x4e61f6 MOV -0x10(%R11),%RSI |
(3583) 0x4e61fa CMP %R8,(%R14,%RSI,8) |
(3583) 0x4e61fe JGE 4e619e |
(3583) 0x4e6200 MOV %RBX,(%R14,%RSI,8) |
(3583) 0x4e6204 INC %RBX |
(3583) 0x4e6207 MOV -0x8(%R11),%RSI |
(3583) 0x4e620b CMP %R8,(%R14,%RSI,8) |
(3583) 0x4e620f JL 4e61a8 |
(3583) 0x4e6211 MOV (%R11),%RSI |
(3583) 0x4e6214 CMP %R8,(%R14,%RSI,8) |
(3583) 0x4e6218 JGE 4e6140 |
(3583) 0x4e621e MOV %RBX,(%R14,%RSI,8) |
(3583) 0x4e6222 INC %RBX |
(3583) 0x4e6225 JMP 4e6140 |
0x4e6240 MOV -0x30(%RBP),%R11 |
0x4e6244 MOV 0x30(%RBP),%RCX |
0x4e6248 MOV (%RCX,%RDI,8),%RAX |
0x4e624c MOV 0x8(%RCX,%RDI,8),%RCX |
0x4e6251 MOV %RCX,%RDI |
0x4e6254 SUB %RAX,%RDI |
0x4e6257 JLE 4e6044 |
0x4e625d CMP $0x4,%RDI |
0x4e6261 JAE 4e6300 |
0x4e6267 MOV 0x60(%RBP),%R13 |
0x4e626b MOV %RDI,%RSI |
0x4e626e AND $-0x4,%RSI |
0x4e6272 CMP %RDI,%RSI |
0x4e6275 JAE 4e6040 |
0x4e627b ADD %RSI,%RAX |
0x4e627e MOV 0x38(%RBP),%RDI |
0x4e6282 MOV -0x30(%RBP),%R11 |
0x4e6286 JMP 4e62cc |
(3580) 0x4e62c0 INC %RAX |
(3580) 0x4e62c3 CMP %RAX,%RCX |
(3580) 0x4e62c6 JE 4e6044 |
(3580) 0x4e62cc MOV (%RDI,%RAX,8),%RSI |
(3580) 0x4e62d0 MOV (%R13,%RSI,8),%RSI |
(3580) 0x4e62d5 ADD %R15,%RSI |
(3580) 0x4e62d8 CMP %R10,(%R14,%RSI,8) |
(3580) 0x4e62dc JGE 4e62c0 |
(3580) 0x4e62de MOV %RDX,(%R14,%RSI,8) |
(3580) 0x4e62e2 INC %RDX |
(3580) 0x4e62e5 JMP 4e62c0 |
0x4e6300 MOV %RDI,%R9 |
0x4e6303 SHR $0x2,%R9 |
0x4e6307 MOV -0xc0(%RBP),%RSI |
0x4e630e LEA (%RSI,%RAX,8),%R11 |
0x4e6312 MOV 0x60(%RBP),%R13 |
0x4e6316 JMP 4e634d |
(3581) 0x4e6340 ADD $0x20,%R11 |
(3581) 0x4e6344 DEC %R9 |
(3581) 0x4e6347 JE 4e626b |
(3581) 0x4e634d MOV -0x18(%R11),%RSI |
(3581) 0x4e6351 MOV (%R13,%RSI,8),%RSI |
(3581) 0x4e6356 ADD %R15,%RSI |
(3581) 0x4e6359 CMP %R10,(%R14,%RSI,8) |
(3581) 0x4e635d JGE 4e6366 |
(3581) 0x4e635f MOV %RDX,(%R14,%RSI,8) |
(3581) 0x4e6363 INC %RDX |
(3581) 0x4e6366 MOV -0x10(%R11),%RSI |
(3581) 0x4e636a MOV (%R13,%RSI,8),%RSI |
(3581) 0x4e636f ADD %R15,%RSI |
(3581) 0x4e6372 CMP %R10,(%R14,%RSI,8) |
(3581) 0x4e6376 JGE 4e637f |
(3581) 0x4e6378 MOV %RDX,(%R14,%RSI,8) |
(3581) 0x4e637c INC %RDX |
(3581) 0x4e637f MOV -0x8(%R11),%RSI |
(3581) 0x4e6383 MOV (%R13,%RSI,8),%RSI |
(3581) 0x4e6388 ADD %R15,%RSI |
(3581) 0x4e638b CMP %R10,(%R14,%RSI,8) |
(3581) 0x4e638f JGE 4e6398 |
(3581) 0x4e6391 MOV %RDX,(%R14,%RSI,8) |
(3581) 0x4e6395 INC %RDX |
(3581) 0x4e6398 MOV (%R11),%RSI |
(3581) 0x4e639b MOV (%R13,%RSI,8),%RSI |
(3581) 0x4e63a0 ADD %R15,%RSI |
(3581) 0x4e63a3 CMP %R10,(%R14,%RSI,8) |
(3581) 0x4e63a7 JGE 4e6340 |
(3581) 0x4e63a9 MOV %RDX,(%R14,%RSI,8) |
(3581) 0x4e63ad INC %RDX |
(3581) 0x4e63b0 JMP 4e6340 |
/home/eoseret/qaas_runs_CPU_9468/171-112-7443/intel/AMG/build/AMG/AMG/parcsr_mv/par_csr_matop.c: 109 - 231 |
-------------------------------------------------------------------------------- |
109: if (ii < rest) |
[...] |
187: for (jj2 = A_diag_i[i1]; jj2 < A_diag_i[i1+1]; jj2++) |
188: { |
189: i2 = A_diag_j[jj2]; |
[...] |
195: for (jj3 = B_diag_i[i2]; jj3 < B_diag_i[i2+1]; jj3++) |
196: { |
197: i3 = B_diag_j[jj3]; |
[...] |
205: if (B_marker[i3] < jj_row_begin_diag) |
206: { |
207: B_marker[i3] = jj_count_diag; |
208: jj_count_diag++; |
[...] |
216: if (num_cols_offd_B) |
217: { |
218: for (jj3 = B_offd_i[i2]; jj3 < B_offd_i[i2+1]; jj3++) |
219: { |
220: i3 = num_cols_diag_B+map_B_to_C[B_offd_j[jj3]]; |
[...] |
228: if (B_marker[i3] < jj_row_begin_offd) |
229: { |
230: B_marker[i3] = jj_count_offd; |
231: jj_count_offd++; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.39 |
Bottlenecks | micro-operation queue, |
Function | hypre_ParMatmul_RowSizes.extracted |
Source | par_csr_matop.c:109-109,par_csr_matop.c:187-189,par_csr_matop.c:195-195,par_csr_matop.c:208-208,par_csr_matop.c:216-218 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 8.83 |
CQA cycles if no scalar integer | 8.83 |
CQA cycles if FP arith vectorized | 8.83 |
CQA cycles if fully vectorized | 1.10 |
Front-end cycles | 8.83 |
DIV/SQRT cycles | 4.50 |
P0 cycles | 3.80 |
P1 cycles | 6.33 |
P2 cycles | 6.33 |
P3 cycles | 0.00 |
P4 cycles | 3.60 |
P5 cycles | 4.50 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 3.60 |
P10 cycles | 6.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 15.34 - 16.35 |
Stall cycles (UFS) | 6.08 - 7.09 |
Nb insns | 53.00 |
Nb uops | 53.00 |
Nb loads | 19.00 |
Nb stores | 0.00 |
Nb stack references | 10.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 17.21 |
Bytes prefetched | 0.00 |
Bytes loaded | 152.00 |
Bytes stored | 0.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.39 |
Bottlenecks | micro-operation queue, |
Function | hypre_ParMatmul_RowSizes.extracted |
Source | par_csr_matop.c:109-109,par_csr_matop.c:187-189,par_csr_matop.c:195-195,par_csr_matop.c:208-208,par_csr_matop.c:216-218 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 8.83 |
CQA cycles if no scalar integer | 8.83 |
CQA cycles if FP arith vectorized | 8.83 |
CQA cycles if fully vectorized | 1.10 |
Front-end cycles | 8.83 |
DIV/SQRT cycles | 4.50 |
P0 cycles | 3.80 |
P1 cycles | 6.33 |
P2 cycles | 6.33 |
P3 cycles | 0.00 |
P4 cycles | 3.60 |
P5 cycles | 4.50 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 3.60 |
P10 cycles | 6.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 15.34 - 16.35 |
Stall cycles (UFS) | 6.08 - 7.09 |
Nb insns | 53.00 |
Nb uops | 53.00 |
Nb loads | 19.00 |
Nb stores | 0.00 |
Nb stack references | 10.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 17.21 |
Bytes prefetched | 0.00 |
Bytes loaded | 152.00 |
Bytes stored | 0.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | hypre_ParMatmul_RowSizes.extracted |
Source file and lines | par_csr_matop.c:109-231 |
Module | exec |
nb instructions | 53 |
nb uops | 53 |
loop length | 212 |
used x86 registers | 9 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 10 |
micro-operation queue | 8.83 cycles |
front end | 8.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 4.50 | 3.80 | 6.33 | 6.33 | 0.00 | 3.60 | 4.50 | 0.00 | 0.00 | 0.00 | 3.60 | 6.33 |
cycles | 4.50 | 3.80 | 6.33 | 6.33 | 0.00 | 3.60 | 4.50 | 0.00 | 0.00 | 0.00 | 3.60 | 6.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 15.34-16.35 |
Stall cycles | 6.08-7.09 |
LM full (events) | 8.52-9.49 |
Front-end | 8.83 |
Dispatch | 6.33 |
Overall L1 | 8.83 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x30(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R11,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x1(%R12),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x38(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 4e5a80 <hypre_ParMatmul_RowSizes.extracted+0x2e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA (%R13,%R12,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x78(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RAX,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%RDI,8),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 4e6244 <hypre_ParMatmul_RowSizes.extracted+0xaa4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x8,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4e6100 <hypre_ParMatmul_RowSizes.extracted+0x960> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R9,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x8,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R9,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4e6240 <hypre_ParMatmul_RowSizes.extracted+0xaa0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x28(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4e60cc <hypre_ParMatmul_RowSizes.extracted+0x92c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %R9,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x3,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x70(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RSI,%RAX,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4e614d <hypre_ParMatmul_RowSizes.extracted+0x9ad> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x30(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%RDI,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 4e6044 <hypre_ParMatmul_RowSizes.extracted+0x8a4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4e6300 <hypre_ParMatmul_RowSizes.extracted+0xb60> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x60(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4e6040 <hypre_ParMatmul_RowSizes.extracted+0x8a0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RSI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x38(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4e62cc <hypre_ParMatmul_RowSizes.extracted+0xb2c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %RDI,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%R9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0xc0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RSI,%RAX,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x60(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4e634d <hypre_ParMatmul_RowSizes.extracted+0xbad> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
Function | hypre_ParMatmul_RowSizes.extracted |
Source file and lines | par_csr_matop.c:109-231 |
Module | exec |
nb instructions | 53 |
nb uops | 53 |
loop length | 212 |
used x86 registers | 9 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 10 |
micro-operation queue | 8.83 cycles |
front end | 8.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 4.50 | 3.80 | 6.33 | 6.33 | 0.00 | 3.60 | 4.50 | 0.00 | 0.00 | 0.00 | 3.60 | 6.33 |
cycles | 4.50 | 3.80 | 6.33 | 6.33 | 0.00 | 3.60 | 4.50 | 0.00 | 0.00 | 0.00 | 3.60 | 6.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 15.34-16.35 |
Stall cycles | 6.08-7.09 |
LM full (events) | 8.52-9.49 |
Front-end | 8.83 |
Dispatch | 6.33 |
Overall L1 | 8.83 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x30(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R11,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x1(%R12),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x38(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 4e5a80 <hypre_ParMatmul_RowSizes.extracted+0x2e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA (%R13,%R12,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x78(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RAX,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%RDI,8),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 4e6244 <hypre_ParMatmul_RowSizes.extracted+0xaa4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x8,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4e6100 <hypre_ParMatmul_RowSizes.extracted+0x960> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R9,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x8,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R9,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4e6240 <hypre_ParMatmul_RowSizes.extracted+0xaa0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x28(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4e60cc <hypre_ParMatmul_RowSizes.extracted+0x92c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %R9,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x3,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x70(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RSI,%RAX,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4e614d <hypre_ParMatmul_RowSizes.extracted+0x9ad> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x30(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%RDI,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 4e6044 <hypre_ParMatmul_RowSizes.extracted+0x8a4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4e6300 <hypre_ParMatmul_RowSizes.extracted+0xb60> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x60(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4e6040 <hypre_ParMatmul_RowSizes.extracted+0x8a0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RSI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x38(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4e62cc <hypre_ParMatmul_RowSizes.extracted+0xb2c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %RDI,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%R9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0xc0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RSI,%RAX,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x60(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4e634d <hypre_ParMatmul_RowSizes.extracted+0xbad> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |