Loop Id: 1326 | Module: exec | Source: par_lr_interp.c:1221-1675 [...] | Coverage: 0.1% |
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Loop Id: 1326 | Module: exec | Source: par_lr_interp.c:1221-1675 [...] | Coverage: 0.1% |
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0x467740 MOV -0x80(%RBP),%RCX |
0x467744 MOV (%RCX),%RCX |
0x467747 VMOVSD (%RCX,%RAX,8),%XMM5 |
0x46774c MOV -0x48(%RBP),%RDX |
0x467750 VADDSD (%RDX,%R9,8),%XMM5,%XMM5 |
0x467756 VMOVSD %XMM5,(%RCX,%RAX,8) |
0x46775b INC %R9 |
0x46775e CMP -0x98(%RBP),%R9 |
0x467765 JE 46766d |
0x46776b MOV -0xb0(%RBP),%RAX |
0x467772 MOV (%RAX,%R9,8),%R10 |
0x467776 MOV (%RBX,%R10,8),%RAX |
0x46777a CMP %RDI,%RAX |
0x46777d JGE 467740 |
0x46777f CMP %R12,%RAX |
0x467782 JNE 4678c0 |
0x467788 MOV -0x180(%RBP),%RCX |
0x46778f MOV (%RCX,%R10,8),%R11 |
0x467793 VPXOR %XMM5,%XMM5,%XMM5 |
0x467797 XOR %EAX,%EAX |
0x467799 MOV -0x48(%RBP),%RDX |
0x46779d VUCOMISD (%RDX,%R11,8),%XMM5 |
0x4677a3 MOV %R10,-0xa8(%RBP) |
0x4677aa MOV 0x8(%RCX,%R10,8),%RCX |
0x4677af SETBE %AL |
0x4677b2 LEA -0x1(%RAX,%RAX,1),%RAX |
0x4677b7 MOV %RAX,-0x70(%RBP) |
0x4677bb LEA 0x1(%R11),%R10 |
0x4677bf CMP %RCX,%R10 |
0x4677c2 MOV %R11,-0x68(%RBP) |
0x4677c6 JGE 467900 |
0x4677cc VCVTSI2SDQ -0x70(%RBP),%XMM10,%XMM6 |
0x4677d2 NOT %R11 |
0x4677d5 ADD %RCX,%R11 |
0x4677d8 MOV %R11,-0xd0(%RBP) |
0x4677df CMP $0x4,%R11 |
0x4677e3 JAE 467ac0 |
0x4677e9 MOV -0xd0(%RBP),%RDX |
0x4677f0 MOV %RDX,%RAX |
0x4677f3 AND $-0x4,%RAX |
0x4677f7 CMP %RDX,%RAX |
0x4677fa JAE 467900 |
0x467800 MOV -0x68(%RBP),%RDX |
0x467804 LEA 0x1(%RDX,%RAX,1),%RAX |
0x467809 JMP 46784c |
(1332) 0x467840 INC %RAX |
(1332) 0x467843 CMP %RAX,%RCX |
(1332) 0x467846 JE 467900 |
(1332) 0x46784c MOV -0xb0(%RBP),%RDX |
(1332) 0x467853 MOV (%RDX,%RAX,8),%RDX |
(1332) 0x467857 XOR %R11D,%R11D |
(1332) 0x46785a CMP %RDI,(%RBX,%RDX,8) |
(1332) 0x46785e SETGE %R11B |
(1332) 0x467862 XOR %R15D,%R15D |
(1332) 0x467865 CMP %R13,%RDX |
(1332) 0x467868 SETE %R15B |
(1332) 0x46786c CMP %R11B,%R15B |
(1332) 0x46786f CMOVA %R15D,%R11D |
(1332) 0x467873 CMP $0x1,%R11B |
(1332) 0x467877 JNE 467840 |
(1332) 0x467879 MOV -0x48(%RBP),%RDX |
(1332) 0x46787d VMOVSD (%RDX,%RAX,8),%XMM7 |
(1332) 0x467882 VMULSD %XMM6,%XMM7,%XMM8 |
(1332) 0x467886 VADDSD %XMM5,%XMM7,%XMM7 |
(1332) 0x46788a VCMPSD $0x1,%XMM0,%XMM8,%K1 |
(1332) 0x467891 VMOVSD %XMM7,%XMM5,%XMM5{%K1} |
(1332) 0x467897 JMP 467840 |
0x4678c0 MOV -0xe0(%RBP),%RAX |
0x4678c7 CMPQ $-0x3,(%RAX,%R10,8) |
0x4678cc JE 46775b |
0x4678d2 CMPQ $0x1,-0x178(%RBP) |
0x4678da JE 4678f1 |
0x4678dc MOV -0x170(%RBP),%RCX |
0x4678e3 MOV (%RCX,%R13,8),%RAX |
0x4678e7 CMP (%RCX,%R10,8),%RAX |
0x4678eb JNE 46775b |
0x4678f1 MOV -0x48(%RBP),%RAX |
0x4678f5 VADDSD (%RAX,%R9,8),%XMM4,%XMM4 |
0x4678fb JMP 46775b |
0x467900 MOV -0xb8(%RBP),%RAX |
0x467907 MOV (%RAX),%RAX |
0x46790a MOV %RAX,-0xd0(%RBP) |
0x467911 CMP $0x2,%RAX |
0x467915 JL 4679c0 |
0x46791b MOV -0x150(%RBP),%RDX |
0x467922 MOV -0xa8(%RBP),%R11 |
0x467929 MOV (%RDX,%R11,8),%RAX |
0x46792d MOV 0x8(%RDX,%R11,8),%R12 |
0x467932 MOV %R12,%R15 |
0x467935 SUB %RAX,%R15 |
0x467938 JLE 4679c0 |
0x46793e VCVTSI2SDQ -0x70(%RBP),%XMM10,%XMM6 |
0x467944 CMP $0x4,%R15 |
0x467948 MOV %R15,-0xe8(%RBP) |
0x46794f JAE 467c80 |
0x467955 MOV -0xe8(%RBP),%R11 |
0x46795c MOV %R11,%RDX |
0x46795f AND $-0x4,%RDX |
0x467963 CMP %R11,%RDX |
0x467966 JAE 4679c0 |
0x467968 ADD %RDX,%RAX |
0x46796b JMP 467988 |
(1330) 0x467980 INC %RAX |
(1330) 0x467983 CMP %RAX,%R12 |
(1330) 0x467986 JE 4679c0 |
(1330) 0x467988 MOV -0x88(%RBP),%RDX |
(1330) 0x46798f MOV (%RDX,%RAX,8),%RDX |
(1330) 0x467993 CMP %RSI,(%R14,%RDX,8) |
(1330) 0x467997 JL 467980 |
(1330) 0x467999 MOV -0x50(%RBP),%RDX |
(1330) 0x46799d VMOVSD (%RDX,%RAX,8),%XMM7 |
(1330) 0x4679a2 VMULSD %XMM6,%XMM7,%XMM8 |
(1330) 0x4679a6 VADDSD %XMM5,%XMM7,%XMM7 |
(1330) 0x4679aa VCMPSD $0x1,%XMM0,%XMM8,%K1 |
(1330) 0x4679b1 VMOVSD %XMM7,%XMM5,%XMM5{%K1} |
(1330) 0x4679b7 JMP 467980 |
0x4679c0 VUCOMISD %XMM0,%XMM5 |
0x4679c4 MOV -0x48(%RBP),%RAX |
0x4679c8 VMOVSD (%RAX,%R9,8),%XMM6 |
0x4679ce JE 467a80 |
0x4679d4 VDIVSD %XMM5,%XMM6,%XMM5 |
0x4679d8 CMP %RCX,%R10 |
0x4679db MOV -0x40(%RBP),%R12 |
0x4679df JGE 467e51 |
0x4679e5 VCVTSI2SDQ -0x70(%RBP),%XMM10,%XMM6 |
0x4679eb MOV -0x68(%RBP),%RDX |
0x4679ef MOV %EDX,%EAX |
0x4679f1 NOT %EAX |
0x4679f3 ADD %ECX,%EAX |
0x4679f5 TEST $0x1,%AL |
0x4679f7 JE 467e48 |
0x4679fd MOV -0xb0(%RBP),%RAX |
0x467a04 MOV 0x8(%RAX,%RDX,8),%RAX |
0x467a09 MOV (%RBX,%RAX,8),%RDX |
0x467a0d CMP %RDI,%RDX |
0x467a10 JL 467a3e |
0x467a12 MOV -0x48(%RBP),%R10 |
0x467a16 MOV -0x68(%RBP),%R11 |
0x467a1a VMOVSD 0x8(%R10,%R11,8),%XMM7 |
0x467a21 VMULSD %XMM6,%XMM7,%XMM8 |
0x467a25 VUCOMISD %XMM0,%XMM8 |
0x467a29 JAE 467a3e |
0x467a2b MOV -0x80(%RBP),%R10 |
0x467a2f MOV (%R10),%R10 |
0x467a32 VFMADD213SD (%R10,%RDX,8),%XMM5,%XMM7 |
0x467a38 VMOVSD %XMM7,(%R10,%RDX,8) |
0x467a3e CMP %R13,%RAX |
0x467a41 JNE 467e40 |
0x467a47 MOV -0x48(%RBP),%RAX |
0x467a4b MOV -0x68(%RBP),%RDX |
0x467a4f VMOVSD 0x8(%RAX,%RDX,8),%XMM7 |
0x467a55 VMULSD %XMM6,%XMM7,%XMM8 |
0x467a59 VFMADD213SD %XMM4,%XMM5,%XMM7 |
0x467a5e VCMPSD $0x1,%XMM0,%XMM8,%K1 |
0x467a65 VMOVSD %XMM7,%XMM4,%XMM4{%K1} |
0x467a6b JMP 467e44 |
0x467a80 VADDSD %XMM4,%XMM6,%XMM4 |
0x467a84 MOV -0x40(%RBP),%R12 |
0x467a88 JMP 46775b |
0x467ac0 MOV -0xd0(%RBP),%R12 |
0x467ac7 SHR $0x2,%R12 |
0x467acb MOV -0x68(%RBP),%RAX |
0x467acf LEA 0x20(,%RAX,8),%RAX |
0x467ad7 VXORPD %XMM7,%XMM7,%XMM7 |
0x467adb JMP 467b0d |
(1333) 0x467b00 ADD $0x20,%RAX |
(1333) 0x467b04 DEC %R12 |
(1333) 0x467b07 JE 4677e9 |
(1333) 0x467b0d MOV -0xb0(%RBP),%RDX |
(1333) 0x467b14 MOV -0x18(%RDX,%RAX,1),%RDX |
(1333) 0x467b19 XOR %R11D,%R11D |
(1333) 0x467b1c CMP %RDI,(%RBX,%RDX,8) |
(1333) 0x467b20 SETGE %R11B |
(1333) 0x467b24 XOR %R15D,%R15D |
(1333) 0x467b27 CMP %R13,%RDX |
(1333) 0x467b2a SETE %R15B |
(1333) 0x467b2e CMP %R11B,%R15B |
(1333) 0x467b31 CMOVA %R15D,%R11D |
(1333) 0x467b35 CMP $0x1,%R11B |
(1333) 0x467b39 JNE 467b5a |
(1333) 0x467b3b MOV -0x48(%RBP),%RDX |
(1333) 0x467b3f VMOVSD -0x18(%RDX,%RAX,1),%XMM8 |
(1333) 0x467b45 VMULSD %XMM6,%XMM8,%XMM9 |
(1333) 0x467b49 VADDSD %XMM5,%XMM8,%XMM8 |
(1333) 0x467b4d VCMPSD $0x1,%XMM7,%XMM9,%K1 |
(1333) 0x467b54 VMOVSD %XMM8,%XMM5,%XMM5{%K1} |
(1333) 0x467b5a MOV -0xb0(%RBP),%RDX |
(1333) 0x467b61 MOV -0x10(%RDX,%RAX,1),%RDX |
(1333) 0x467b66 XOR %R11D,%R11D |
(1333) 0x467b69 CMP %RDI,(%RBX,%RDX,8) |
(1333) 0x467b6d SETGE %R11B |
(1333) 0x467b71 XOR %R15D,%R15D |
(1333) 0x467b74 CMP %R13,%RDX |
(1333) 0x467b77 SETE %R15B |
(1333) 0x467b7b CMP %R11B,%R15B |
(1333) 0x467b7e CMOVA %R15D,%R11D |
(1333) 0x467b82 CMP $0x1,%R11B |
(1333) 0x467b86 JNE 467ba7 |
(1333) 0x467b88 MOV -0x48(%RBP),%RDX |
(1333) 0x467b8c VMOVSD -0x10(%RDX,%RAX,1),%XMM8 |
(1333) 0x467b92 VMULSD %XMM6,%XMM8,%XMM9 |
(1333) 0x467b96 VADDSD %XMM5,%XMM8,%XMM8 |
(1333) 0x467b9a VCMPSD $0x1,%XMM7,%XMM9,%K1 |
(1333) 0x467ba1 VMOVSD %XMM8,%XMM5,%XMM5{%K1} |
(1333) 0x467ba7 MOV -0xb0(%RBP),%RDX |
(1333) 0x467bae MOV -0x8(%RDX,%RAX,1),%RDX |
(1333) 0x467bb3 XOR %R11D,%R11D |
(1333) 0x467bb6 CMP %RDI,(%RBX,%RDX,8) |
(1333) 0x467bba SETGE %R11B |
(1333) 0x467bbe XOR %R15D,%R15D |
(1333) 0x467bc1 CMP %R13,%RDX |
(1333) 0x467bc4 SETE %R15B |
(1333) 0x467bc8 CMP %R11B,%R15B |
(1333) 0x467bcb CMOVA %R15D,%R11D |
(1333) 0x467bcf CMP $0x1,%R11B |
(1333) 0x467bd3 JNE 467bf4 |
(1333) 0x467bd5 MOV -0x48(%RBP),%RDX |
(1333) 0x467bd9 VMOVSD -0x8(%RDX,%RAX,1),%XMM8 |
(1333) 0x467bdf VMULSD %XMM6,%XMM8,%XMM9 |
(1333) 0x467be3 VADDSD %XMM5,%XMM8,%XMM8 |
(1333) 0x467be7 VCMPSD $0x1,%XMM7,%XMM9,%K1 |
(1333) 0x467bee VMOVSD %XMM8,%XMM5,%XMM5{%K1} |
(1333) 0x467bf4 MOV -0xb0(%RBP),%RDX |
(1333) 0x467bfb MOV (%RDX,%RAX,1),%RDX |
(1333) 0x467bff XOR %R11D,%R11D |
(1333) 0x467c02 CMP %RDI,(%RBX,%RDX,8) |
(1333) 0x467c06 SETGE %R11B |
(1333) 0x467c0a XOR %R15D,%R15D |
(1333) 0x467c0d CMP %R13,%RDX |
(1333) 0x467c10 SETE %R15B |
(1333) 0x467c14 CMP %R11B,%R15B |
(1333) 0x467c17 CMOVA %R15D,%R11D |
(1333) 0x467c1b CMP $0x1,%R11B |
(1333) 0x467c1f JNE 467b00 |
(1333) 0x467c25 MOV -0x48(%RBP),%RDX |
(1333) 0x467c29 VMOVSD (%RDX,%RAX,1),%XMM8 |
(1333) 0x467c2e VMULSD %XMM6,%XMM8,%XMM9 |
(1333) 0x467c32 VADDSD %XMM5,%XMM8,%XMM8 |
(1333) 0x467c36 VCMPSD $0x1,%XMM7,%XMM9,%K1 |
(1333) 0x467c3d VMOVSD %XMM8,%XMM5,%XMM5{%K1} |
(1333) 0x467c43 JMP 467b00 |
0x467c80 SHR $0x2,%R15 |
0x467c84 LEA 0x18(,%RAX,8),%RDX |
0x467c8c JMP 467ccd |
(1331) 0x467cc0 ADD $0x20,%RDX |
(1331) 0x467cc4 DEC %R15 |
(1331) 0x467cc7 JE 467955 |
(1331) 0x467ccd MOV -0x88(%RBP),%R11 |
(1331) 0x467cd4 MOV -0x18(%R11,%RDX,1),%R11 |
(1331) 0x467cd9 CMP %RSI,(%R14,%R11,8) |
(1331) 0x467cdd JGE 467d40 |
(1331) 0x467cdf MOV -0x88(%RBP),%R11 |
(1331) 0x467ce6 MOV -0x10(%R11,%RDX,1),%R11 |
(1331) 0x467ceb CMP %RSI,(%R14,%R11,8) |
(1331) 0x467cef JGE 467d76 |
(1331) 0x467cf5 MOV -0x88(%RBP),%R11 |
(1331) 0x467cfc MOV -0x8(%R11,%RDX,1),%R11 |
(1331) 0x467d01 CMP %RSI,(%R14,%R11,8) |
(1331) 0x467d05 JGE 467dac |
(1331) 0x467d0b MOV -0x88(%RBP),%R11 |
(1331) 0x467d12 MOV (%R11,%RDX,1),%R11 |
(1331) 0x467d16 CMP %RSI,(%R14,%R11,8) |
(1331) 0x467d1a JL 467cc0 |
(1331) 0x467d1c JMP 467de1 |
(1331) 0x467d40 MOV -0x50(%RBP),%R11 |
(1331) 0x467d44 VMOVSD -0x18(%R11,%RDX,1),%XMM7 |
(1331) 0x467d4b VMULSD %XMM6,%XMM7,%XMM8 |
(1331) 0x467d4f VADDSD %XMM5,%XMM7,%XMM7 |
(1331) 0x467d53 VCMPSD $0x1,%XMM0,%XMM8,%K1 |
(1331) 0x467d5a VMOVSD %XMM7,%XMM5,%XMM5{%K1} |
(1331) 0x467d60 MOV -0x88(%RBP),%R11 |
(1331) 0x467d67 MOV -0x10(%R11,%RDX,1),%R11 |
(1331) 0x467d6c CMP %RSI,(%R14,%R11,8) |
(1331) 0x467d70 JL 467cf5 |
(1331) 0x467d76 MOV -0x50(%RBP),%R11 |
(1331) 0x467d7a VMOVSD -0x10(%R11,%RDX,1),%XMM7 |
(1331) 0x467d81 VMULSD %XMM6,%XMM7,%XMM8 |
(1331) 0x467d85 VADDSD %XMM5,%XMM7,%XMM7 |
(1331) 0x467d89 VCMPSD $0x1,%XMM0,%XMM8,%K1 |
(1331) 0x467d90 VMOVSD %XMM7,%XMM5,%XMM5{%K1} |
(1331) 0x467d96 MOV -0x88(%RBP),%R11 |
(1331) 0x467d9d MOV -0x8(%R11,%RDX,1),%R11 |
(1331) 0x467da2 CMP %RSI,(%R14,%R11,8) |
(1331) 0x467da6 JL 467d0b |
(1331) 0x467dac MOV -0x50(%RBP),%R11 |
(1331) 0x467db0 VMOVSD -0x8(%R11,%RDX,1),%XMM7 |
(1331) 0x467db7 VMULSD %XMM6,%XMM7,%XMM8 |
(1331) 0x467dbb VADDSD %XMM5,%XMM7,%XMM7 |
(1331) 0x467dbf VCMPSD $0x1,%XMM0,%XMM8,%K1 |
(1331) 0x467dc6 VMOVSD %XMM7,%XMM5,%XMM5{%K1} |
(1331) 0x467dcc MOV -0x88(%RBP),%R11 |
(1331) 0x467dd3 MOV (%R11,%RDX,1),%R11 |
(1331) 0x467dd7 CMP %RSI,(%R14,%R11,8) |
(1331) 0x467ddb JL 467cc0 |
(1331) 0x467de1 MOV -0x50(%RBP),%R11 |
(1331) 0x467de5 VMOVSD (%R11,%RDX,1),%XMM7 |
(1331) 0x467deb VMULSD %XMM6,%XMM7,%XMM8 |
(1331) 0x467def VADDSD %XMM5,%XMM7,%XMM7 |
(1331) 0x467df3 VCMPSD $0x1,%XMM0,%XMM8,%K1 |
(1331) 0x467dfa VMOVSD %XMM7,%XMM5,%XMM5{%K1} |
(1331) 0x467e00 JMP 467cc0 |
0x467e40 MOV -0x68(%RBP),%RDX |
0x467e44 LEA 0x2(%RDX),%R10 |
0x467e48 LEA -0x2(%RCX),%RAX |
0x467e4c CMP %RDX,%RAX |
0x467e4f JNE 467ec9 |
0x467e51 CMPQ $0x2,-0xd0(%RBP) |
0x467e59 JL 46775b |
0x467e5f MOV -0x150(%RBP),%RCX |
0x467e66 MOV -0xa8(%RBP),%RDX |
0x467e6d MOV (%RCX,%RDX,8),%RAX |
0x467e71 MOV 0x8(%RCX,%RDX,8),%RCX |
0x467e76 MOV %RCX,%R10 |
0x467e79 SUB %RAX,%R10 |
0x467e7c JLE 46775b |
0x467e82 VCVTSI2SDQ -0x70(%RBP),%XMM10,%XMM6 |
0x467e88 CMP $0x4,%R10 |
0x467e8c JAE 468040 |
0x467e92 MOV %R10,%RDX |
0x467e95 AND $-0x4,%RDX |
0x467e99 CMP %R10,%RDX |
0x467e9c JAE 4681c0 |
0x467ea2 ADD %RDX,%RAX |
0x467ea5 MOV -0x40(%RBP),%R12 |
0x467ea9 JMP 467fcc |
(1329) 0x467ec0 ADD $0x2,%R10 |
(1329) 0x467ec4 CMP %R10,%RCX |
(1329) 0x467ec7 JE 467e51 |
(1329) 0x467ec9 MOV -0xb0(%RBP),%RAX |
(1329) 0x467ed0 MOV (%RAX,%R10,8),%RAX |
(1329) 0x467ed4 MOV (%RBX,%RAX,8),%RDX |
(1329) 0x467ed8 CMP %RDI,%RDX |
(1329) 0x467edb JL 467f04 |
(1329) 0x467edd MOV -0x48(%RBP),%R11 |
(1329) 0x467ee1 VMOVSD (%R11,%R10,8),%XMM7 |
(1329) 0x467ee7 VMULSD %XMM6,%XMM7,%XMM8 |
(1329) 0x467eeb VUCOMISD %XMM0,%XMM8 |
(1329) 0x467eef JAE 467f04 |
(1329) 0x467ef1 MOV -0x80(%RBP),%R11 |
(1329) 0x467ef5 MOV (%R11),%R15 |
(1329) 0x467ef8 VFMADD213SD (%R15,%RDX,8),%XMM5,%XMM7 |
(1329) 0x467efe VMOVSD %XMM7,(%R15,%RDX,8) |
(1329) 0x467f04 CMP %R13,%RAX |
(1329) 0x467f07 JNE 467f29 |
(1329) 0x467f09 MOV -0x48(%RBP),%RAX |
(1329) 0x467f0d VMOVSD (%RAX,%R10,8),%XMM7 |
(1329) 0x467f13 VMULSD %XMM6,%XMM7,%XMM8 |
(1329) 0x467f17 VFMADD213SD %XMM4,%XMM5,%XMM7 |
(1329) 0x467f1c VCMPSD $0x1,%XMM0,%XMM8,%K1 |
(1329) 0x467f23 VMOVSD %XMM7,%XMM4,%XMM4{%K1} |
(1329) 0x467f29 MOV -0xb0(%RBP),%RAX |
(1329) 0x467f30 MOV 0x8(%RAX,%R10,8),%RAX |
(1329) 0x467f35 MOV (%RBX,%RAX,8),%RDX |
(1329) 0x467f39 CMP %RDI,%RDX |
(1329) 0x467f3c JL 467f66 |
(1329) 0x467f3e MOV -0x48(%RBP),%R11 |
(1329) 0x467f42 VMOVSD 0x8(%R11,%R10,8),%XMM7 |
(1329) 0x467f49 VMULSD %XMM6,%XMM7,%XMM8 |
(1329) 0x467f4d VUCOMISD %XMM0,%XMM8 |
(1329) 0x467f51 JAE 467f66 |
(1329) 0x467f53 MOV -0x80(%RBP),%R11 |
(1329) 0x467f57 MOV (%R11),%R15 |
(1329) 0x467f5a VFMADD213SD (%R15,%RDX,8),%XMM5,%XMM7 |
(1329) 0x467f60 VMOVSD %XMM7,(%R15,%RDX,8) |
(1329) 0x467f66 CMP %R13,%RAX |
(1329) 0x467f69 JNE 467ec0 |
(1329) 0x467f6f MOV -0x48(%RBP),%RAX |
(1329) 0x467f73 VMOVSD 0x8(%RAX,%R10,8),%XMM7 |
(1329) 0x467f7a VMULSD %XMM6,%XMM7,%XMM8 |
(1329) 0x467f7e VFMADD213SD %XMM4,%XMM5,%XMM7 |
(1329) 0x467f83 VCMPSD $0x1,%XMM0,%XMM8,%K1 |
(1329) 0x467f8a VMOVSD %XMM7,%XMM4,%XMM4{%K1} |
(1329) 0x467f90 JMP 467ec0 |
(1327) 0x467fc0 INC %RAX |
(1327) 0x467fc3 CMP %RAX,%RCX |
(1327) 0x467fc6 JE 46775b |
(1327) 0x467fcc MOV -0x88(%RBP),%RDX |
(1327) 0x467fd3 MOV (%RDX,%RAX,8),%RDX |
(1327) 0x467fd7 MOV (%R14,%RDX,8),%RDX |
(1327) 0x467fdb CMP %RSI,%RDX |
(1327) 0x467fde JL 467fc0 |
(1327) 0x467fe0 MOV -0x50(%RBP),%R10 |
(1327) 0x467fe4 VMOVSD (%R10,%RAX,8),%XMM7 |
(1327) 0x467fea VMULSD %XMM6,%XMM7,%XMM8 |
(1327) 0x467fee VUCOMISD %XMM0,%XMM8 |
(1327) 0x467ff2 JAE 467fc0 |
(1327) 0x467ff4 MOV -0x60(%RBP),%R10 |
(1327) 0x467ff8 MOV (%R10),%R10 |
(1327) 0x467ffb VFMADD213SD (%R10,%RDX,8),%XMM5,%XMM7 |
(1327) 0x468001 VMOVSD %XMM7,(%R10,%RDX,8) |
(1327) 0x468007 JMP 467fc0 |
0x468040 MOV %R10,%RDX |
0x468043 SHR $0x2,%RDX |
0x468047 LEA 0x18(,%RAX,8),%R11 |
0x46804f JMP 46808d |
(1328) 0x468080 ADD $0x20,%R11 |
(1328) 0x468084 DEC %RDX |
(1328) 0x468087 JE 467e92 |
(1328) 0x46808d MOV -0x88(%RBP),%R15 |
(1328) 0x468094 MOV -0x18(%R15,%R11,1),%R15 |
(1328) 0x468099 MOV (%R14,%R15,8),%R15 |
(1328) 0x46809d CMP %RSI,%R15 |
(1328) 0x4680a0 JL 4680cb |
(1328) 0x4680a2 MOV -0x50(%RBP),%R12 |
(1328) 0x4680a6 VMOVSD -0x18(%R12,%R11,1),%XMM7 |
(1328) 0x4680ad VMULSD %XMM6,%XMM7,%XMM8 |
(1328) 0x4680b1 VUCOMISD %XMM0,%XMM8 |
(1328) 0x4680b5 JAE 4680cb |
(1328) 0x4680b7 MOV -0x60(%RBP),%R12 |
(1328) 0x4680bb MOV (%R12),%R12 |
(1328) 0x4680bf VFMADD213SD (%R12,%R15,8),%XMM5,%XMM7 |
(1328) 0x4680c5 VMOVSD %XMM7,(%R12,%R15,8) |
(1328) 0x4680cb MOV -0x88(%RBP),%R15 |
(1328) 0x4680d2 MOV -0x10(%R15,%R11,1),%R15 |
(1328) 0x4680d7 MOV (%R14,%R15,8),%R15 |
(1328) 0x4680db CMP %RSI,%R15 |
(1328) 0x4680de JL 468109 |
(1328) 0x4680e0 MOV -0x50(%RBP),%R12 |
(1328) 0x4680e4 VMOVSD -0x10(%R12,%R11,1),%XMM7 |
(1328) 0x4680eb VMULSD %XMM6,%XMM7,%XMM8 |
(1328) 0x4680ef VUCOMISD %XMM0,%XMM8 |
(1328) 0x4680f3 JAE 468109 |
(1328) 0x4680f5 MOV -0x60(%RBP),%R12 |
(1328) 0x4680f9 MOV (%R12),%R12 |
(1328) 0x4680fd VFMADD213SD (%R12,%R15,8),%XMM5,%XMM7 |
(1328) 0x468103 VMOVSD %XMM7,(%R12,%R15,8) |
(1328) 0x468109 MOV -0x88(%RBP),%R15 |
(1328) 0x468110 MOV -0x8(%R15,%R11,1),%R15 |
(1328) 0x468115 MOV (%R14,%R15,8),%R15 |
(1328) 0x468119 CMP %RSI,%R15 |
(1328) 0x46811c JL 468147 |
(1328) 0x46811e MOV -0x50(%RBP),%R12 |
(1328) 0x468122 VMOVSD -0x8(%R12,%R11,1),%XMM7 |
(1328) 0x468129 VMULSD %XMM6,%XMM7,%XMM8 |
(1328) 0x46812d VUCOMISD %XMM0,%XMM8 |
(1328) 0x468131 JAE 468147 |
(1328) 0x468133 MOV -0x60(%RBP),%R12 |
(1328) 0x468137 MOV (%R12),%R12 |
(1328) 0x46813b VFMADD213SD (%R12,%R15,8),%XMM5,%XMM7 |
(1328) 0x468141 VMOVSD %XMM7,(%R12,%R15,8) |
(1328) 0x468147 MOV -0x88(%RBP),%R15 |
(1328) 0x46814e MOV (%R15,%R11,1),%R15 |
(1328) 0x468152 MOV (%R14,%R15,8),%R15 |
(1328) 0x468156 CMP %RSI,%R15 |
(1328) 0x468159 JL 468080 |
(1328) 0x46815f MOV -0x50(%RBP),%R12 |
(1328) 0x468163 VMOVSD (%R12,%R11,1),%XMM7 |
(1328) 0x468169 VMULSD %XMM6,%XMM7,%XMM8 |
(1328) 0x46816d VUCOMISD %XMM0,%XMM8 |
(1328) 0x468171 JAE 468080 |
(1328) 0x468177 MOV -0x60(%RBP),%R12 |
(1328) 0x46817b MOV (%R12),%R12 |
(1328) 0x46817f VFMADD213SD (%R12,%R15,8),%XMM5,%XMM7 |
(1328) 0x468185 VMOVSD %XMM7,(%R12,%R15,8) |
(1328) 0x46818b JMP 468080 |
0x4681c0 MOV -0x40(%RBP),%R12 |
0x4681c4 JMP 46775b |
/home/eoseret/qaas_runs_CPU_9468/171-112-7443/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c: 1221 - 1675 |
-------------------------------------------------------------------------------- |
1221: if (n_fine) |
[...] |
1609: for (jj = A_diag_i[i]+1; jj < A_diag_i[i+1]; jj++) |
1610: { /* i1 is a c-point and strongly influences i, accumulate |
1611: * a_(i,i1) into interpolation weight */ |
1612: i1 = A_diag_j[jj]; |
1613: if (P_marker[i1] >= jj_begin_row) |
1614: { |
1615: P_diag_data[P_marker[i1]] += A_diag_data[jj]; |
1616: } |
1617: else if(P_marker[i1] == strong_f_marker) |
1618: { |
1619: sum = zero; |
1620: sgn = 1; |
1621: if(A_diag_data[A_diag_i[i1]] < 0) sgn = -1; |
1622: /* Loop over row of A for point i1 and calculate the sum |
1623: * of the connections to c-points that strongly influence i. */ |
1624: for(jj1 = A_diag_i[i1]+1; jj1 < A_diag_i[i1+1]; jj1++) |
1625: { |
1626: i2 = A_diag_j[jj1]; |
1627: if((P_marker[i2] >= jj_begin_row || i2 == i) && (sgn*A_diag_data[jj1]) < 0) |
1628: sum += A_diag_data[jj1]; |
1629: } |
1630: if(num_procs > 1) |
1631: { |
1632: for(jj1 = A_offd_i[i1]; jj1< A_offd_i[i1+1]; jj1++) |
1633: { |
1634: i2 = A_offd_j[jj1]; |
1635: if(P_marker_offd[i2] >= jj_begin_row_offd && |
1636: (sgn*A_offd_data[jj1]) < 0) |
1637: sum += A_offd_data[jj1]; |
1638: } |
1639: } |
1640: if(sum != 0) |
1641: { |
1642: distribute = A_diag_data[jj]/sum; |
1643: /* Loop over row of A for point i1 and do the distribution */ |
1644: for(jj1 = A_diag_i[i1]+1; jj1 < A_diag_i[i1+1]; jj1++) |
1645: { |
1646: i2 = A_diag_j[jj1]; |
1647: if(P_marker[i2] >= jj_begin_row && (sgn*A_diag_data[jj1]) < 0) |
1648: P_diag_data[P_marker[i2]] += |
1649: distribute*A_diag_data[jj1]; |
1650: if(i2 == i && (sgn*A_diag_data[jj1]) < 0) |
1651: diagonal += distribute*A_diag_data[jj1]; |
1652: } |
1653: if(num_procs > 1) |
1654: { |
1655: for(jj1 = A_offd_i[i1]; jj1 < A_offd_i[i1+1]; jj1++) |
1656: { |
1657: i2 = A_offd_j[jj1]; |
1658: if(P_marker_offd[i2] >= jj_begin_row_offd && |
1659: (sgn*A_offd_data[jj1]) < 0) |
1660: P_offd_data[P_marker_offd[i2]] += |
[...] |
1667: diagonal += A_diag_data[jj]; |
1668: } |
1669: } |
1670: /* neighbor i1 weakly influences i, accumulate a_(i,i1) into |
1671: * diagonal */ |
1672: else if (CF_marker[i1] != -3) |
1673: { |
1674: if(num_functions == 1 || dof_func[i] == dof_func[i1]) |
1675: diagonal += A_diag_data[jj]; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.83 |
CQA speedup if FP arith vectorized | 2.55 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.35 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildExtPIInterp.extracted |
Source | par_lr_interp.c:1221-1221,par_lr_interp.c:1609-1609,par_lr_interp.c:1612-1617,par_lr_interp.c:1621-1621,par_lr_interp.c:1624-1624,par_lr_interp.c:1627-1627,par_lr_interp.c:1630-1632,par_lr_interp.c:1635-1636,par_lr_interp.c:1640-1650,par_lr_interp.c:1653-1655,par_lr_interp.c:1659-1660,par_lr_interp.c:1667-1667,par_lr_interp.c:1672-1675 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 28.00 |
CQA cycles if no scalar integer | 15.33 |
CQA cycles if FP arith vectorized | 10.99 |
CQA cycles if fully vectorized | 3.50 |
Front-end cycles | 28.00 |
DIV/SQRT cycles | 16.50 |
P0 cycles | 15.20 |
P1 cycles | 20.67 |
P2 cycles | 20.67 |
P3 cycles | 4.00 |
P4 cycles | 15.40 |
P5 cycles | 16.50 |
P6 cycles | 4.00 |
P7 cycles | 4.00 |
P8 cycles | 4.00 |
P9 cycles | 15.40 |
P10 cycles | 20.67 |
P11 cycles | 4.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 28.30 - 28.31 |
Stall cycles (UFS) | 0.00 |
Nb insns | 162.00 |
Nb uops | 164.00 |
Nb loads | 62.00 |
Nb stores | 8.00 |
Nb stack references | 16.00 |
FLOP/cycle | 0.36 |
Nb FLOP add-sub | 3.00 |
Nb FLOP mul | 2.00 |
Nb FLOP fma | 2.00 |
Nb FLOP div | 1.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 20.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 496.00 |
Bytes stored | 64.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 3.33 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 6.06 |
Vector-efficiency ratio all | 12.92 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | 12.50 |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 13.26 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.83 |
CQA speedup if FP arith vectorized | 2.55 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.35 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildExtPIInterp.extracted |
Source | par_lr_interp.c:1221-1221,par_lr_interp.c:1609-1609,par_lr_interp.c:1612-1617,par_lr_interp.c:1621-1621,par_lr_interp.c:1624-1624,par_lr_interp.c:1627-1627,par_lr_interp.c:1630-1632,par_lr_interp.c:1635-1636,par_lr_interp.c:1640-1650,par_lr_interp.c:1653-1655,par_lr_interp.c:1659-1660,par_lr_interp.c:1667-1667,par_lr_interp.c:1672-1675 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 28.00 |
CQA cycles if no scalar integer | 15.33 |
CQA cycles if FP arith vectorized | 10.99 |
CQA cycles if fully vectorized | 3.50 |
Front-end cycles | 28.00 |
DIV/SQRT cycles | 16.50 |
P0 cycles | 15.20 |
P1 cycles | 20.67 |
P2 cycles | 20.67 |
P3 cycles | 4.00 |
P4 cycles | 15.40 |
P5 cycles | 16.50 |
P6 cycles | 4.00 |
P7 cycles | 4.00 |
P8 cycles | 4.00 |
P9 cycles | 15.40 |
P10 cycles | 20.67 |
P11 cycles | 4.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 28.30 - 28.31 |
Stall cycles (UFS) | 0.00 |
Nb insns | 162.00 |
Nb uops | 164.00 |
Nb loads | 62.00 |
Nb stores | 8.00 |
Nb stack references | 16.00 |
FLOP/cycle | 0.36 |
Nb FLOP add-sub | 3.00 |
Nb FLOP mul | 2.00 |
Nb FLOP fma | 2.00 |
Nb FLOP div | 1.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 20.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 496.00 |
Bytes stored | 64.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 3.33 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 6.06 |
Vector-efficiency ratio all | 12.92 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | 12.50 |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 13.26 |
Path / |
Function | hypre_BoomerAMGBuildExtPIInterp.extracted |
Source file and lines | par_lr_interp.c:1221-1675 |
Module | exec |
nb instructions | 162 |
nb uops | 164 |
loop length | 744 |
used x86 registers | 12 |
used mmx registers | 0 |
used xmm registers | 7 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 16 |
ADD-SUB / MUL ratio | 1.50 |
micro-operation queue | 28.00 cycles |
front end | 28.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 16.50 | 15.20 | 20.67 | 20.67 | 4.00 | 15.40 | 16.50 | 4.00 | 4.00 | 4.00 | 15.40 | 20.67 |
cycles | 16.50 | 15.20 | 20.67 | 20.67 | 4.00 | 15.40 | 16.50 | 4.00 | 4.00 | 4.00 | 15.40 | 20.67 |
Cycles executing div or sqrt instructions | 4.00 |
FE+BE cycles | 28.30-28.31 |
Stall cycles | 0.00 |
Front-end | 28.00 |
Dispatch | 20.67 |
DIV/SQRT | 4.00 |
Overall L1 | 28.00 |
all | 2% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 3% |
all | 5% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | 0% |
other | 16% |
all | 3% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | 0% |
other | 6% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 13% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | 12% |
div/sqrt | 12% |
other | 14% |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | 12% |
div/sqrt | 12% |
other | 13% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x80(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RCX,%RAX,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDSD (%RDX,%R9,8),%XMM5,%XMM5 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMOVSD %XMM5,(%RCX,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP -0x98(%RBP),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 46766d <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1b3d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%R9,8),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX,%R10,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 467740 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1c10> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP %R12,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 4678c0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1d90> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x180(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%R10,8),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPXOR %XMM5,%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VUCOMISD (%RDX,%R11,8),%XMM5 | 2 | 1 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R10,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%RCX,%R10,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SETBE %AL | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
LEA -0x1(%RAX,%RAX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%R11),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RCX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R11,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JGE 467900 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1dd0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDQ -0x70(%RBP),%XMM10,%XMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
NOT %R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RCX,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R11,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x4,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 467ac0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1f90> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xd0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 467900 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1dd0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x68(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDX,%RAX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JMP 46784c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1d1c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0xe0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $-0x3,(%RAX,%R10,8) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 46775b <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1c2b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x1,-0x178(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 4678f1 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1dc1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x170(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%R13,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP (%RCX,%R10,8),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 46775b <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1c2b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDSD (%RAX,%R9,8),%XMM4,%XMM4 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
JMP 46775b <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1c2b> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x2,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 4679c0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1e90> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x150(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xa8(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R11,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDX,%R11,8),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 4679c0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1e90> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDQ -0x70(%RBP),%XMM10,%XMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
CMP $0x4,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 467c80 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2150> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xe8(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R11,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4679c0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1e90> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 467988 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1e58> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
VUCOMISD %XMM0,%XMM5 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RAX,%R9,8),%XMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 467a80 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1f50> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VDIVSD %XMM5,%XMM6,%XMM5 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 4 |
CMP %RCX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x40(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 467e51 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2321> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDQ -0x70(%RBP),%XMM10,%XMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
MOV -0x68(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOT %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ECX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST $0x1,%AL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 467e48 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2318> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX,%RDX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX,%RAX,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 467a3e <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1f0e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x48(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x8(%R10,%R11,8),%XMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD %XMM6,%XMM7,%XMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VUCOMISD %XMM0,%XMM8 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JAE 467a3e <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1f0e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x80(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R10),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD213SD (%R10,%RDX,8),%XMM5,%XMM7 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM7,(%R10,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R13,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 467e40 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2310> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x8(%RAX,%RDX,8),%XMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD %XMM6,%XMM7,%XMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD213SD %XMM4,%XMM5,%XMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPSD $0x1,%XMM0,%XMM8,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVSD %XMM7,%XMM4,%XMM4{%K1} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JMP 467e44 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2314> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VADDSD %XMM4,%XMM6,%XMM4 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOV -0x40(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 46775b <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1c2b> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0xd0(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SHR $0x2,%R12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x20(,%RAX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VXORPD %XMM7,%XMM7,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 467b0d <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1fdd> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
SHR $0x2,%R15 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(,%RAX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 467ccd <hypre_BoomerAMGBuildExtPIInterp.extracted+0x219d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x68(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x2(%RDX),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x2(%RCX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 467ec9 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2399> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x2,-0xd0(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 46775b <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1c2b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x150(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xa8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RDX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%RDX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 46775b <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1c2b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDQ -0x70(%RBP),%XMM10,%XMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
CMP $0x4,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 468040 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2510> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R10,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R10,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4681c0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2690> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x40(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 467fcc <hypre_BoomerAMGBuildExtPIInterp.extracted+0x249c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV %R10,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(,%RAX,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 46808d <hypre_BoomerAMGBuildExtPIInterp.extracted+0x255d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x40(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 46775b <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1c2b> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
Function | hypre_BoomerAMGBuildExtPIInterp.extracted |
Source file and lines | par_lr_interp.c:1221-1675 |
Module | exec |
nb instructions | 162 |
nb uops | 164 |
loop length | 744 |
used x86 registers | 12 |
used mmx registers | 0 |
used xmm registers | 7 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 16 |
ADD-SUB / MUL ratio | 1.50 |
micro-operation queue | 28.00 cycles |
front end | 28.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 16.50 | 15.20 | 20.67 | 20.67 | 4.00 | 15.40 | 16.50 | 4.00 | 4.00 | 4.00 | 15.40 | 20.67 |
cycles | 16.50 | 15.20 | 20.67 | 20.67 | 4.00 | 15.40 | 16.50 | 4.00 | 4.00 | 4.00 | 15.40 | 20.67 |
Cycles executing div or sqrt instructions | 4.00 |
FE+BE cycles | 28.30-28.31 |
Stall cycles | 0.00 |
Front-end | 28.00 |
Dispatch | 20.67 |
DIV/SQRT | 4.00 |
Overall L1 | 28.00 |
all | 2% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 3% |
all | 5% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | 0% |
other | 16% |
all | 3% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | 0% |
other | 6% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 13% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | 12% |
div/sqrt | 12% |
other | 14% |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | 12% |
div/sqrt | 12% |
other | 13% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x80(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RCX,%RAX,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDSD (%RDX,%R9,8),%XMM5,%XMM5 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMOVSD %XMM5,(%RCX,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP -0x98(%RBP),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 46766d <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1b3d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%R9,8),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX,%R10,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 467740 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1c10> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP %R12,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 4678c0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1d90> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x180(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%R10,8),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPXOR %XMM5,%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VUCOMISD (%RDX,%R11,8),%XMM5 | 2 | 1 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R10,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%RCX,%R10,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SETBE %AL | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
LEA -0x1(%RAX,%RAX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%R11),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RCX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R11,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JGE 467900 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1dd0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDQ -0x70(%RBP),%XMM10,%XMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
NOT %R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RCX,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R11,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x4,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 467ac0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1f90> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xd0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 467900 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1dd0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x68(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDX,%RAX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JMP 46784c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1d1c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0xe0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $-0x3,(%RAX,%R10,8) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 46775b <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1c2b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x1,-0x178(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 4678f1 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1dc1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x170(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%R13,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP (%RCX,%R10,8),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 46775b <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1c2b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDSD (%RAX,%R9,8),%XMM4,%XMM4 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
JMP 46775b <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1c2b> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x2,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 4679c0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1e90> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x150(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xa8(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R11,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDX,%R11,8),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 4679c0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1e90> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDQ -0x70(%RBP),%XMM10,%XMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
CMP $0x4,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 467c80 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2150> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xe8(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R11,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4679c0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1e90> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 467988 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1e58> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
VUCOMISD %XMM0,%XMM5 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RAX,%R9,8),%XMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 467a80 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1f50> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VDIVSD %XMM5,%XMM6,%XMM5 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 4 |
CMP %RCX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x40(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 467e51 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2321> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDQ -0x70(%RBP),%XMM10,%XMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
MOV -0x68(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOT %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ECX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST $0x1,%AL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 467e48 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2318> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX,%RDX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX,%RAX,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 467a3e <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1f0e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x48(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x8(%R10,%R11,8),%XMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD %XMM6,%XMM7,%XMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VUCOMISD %XMM0,%XMM8 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JAE 467a3e <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1f0e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x80(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R10),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD213SD (%R10,%RDX,8),%XMM5,%XMM7 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM7,(%R10,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R13,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 467e40 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2310> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x8(%RAX,%RDX,8),%XMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD %XMM6,%XMM7,%XMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD213SD %XMM4,%XMM5,%XMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPSD $0x1,%XMM0,%XMM8,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVSD %XMM7,%XMM4,%XMM4{%K1} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JMP 467e44 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2314> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VADDSD %XMM4,%XMM6,%XMM4 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOV -0x40(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 46775b <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1c2b> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0xd0(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SHR $0x2,%R12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x20(,%RAX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VXORPD %XMM7,%XMM7,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 467b0d <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1fdd> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
SHR $0x2,%R15 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(,%RAX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 467ccd <hypre_BoomerAMGBuildExtPIInterp.extracted+0x219d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x68(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x2(%RDX),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x2(%RCX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 467ec9 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2399> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x2,-0xd0(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 46775b <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1c2b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x150(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xa8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RDX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%RDX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 46775b <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1c2b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDQ -0x70(%RBP),%XMM10,%XMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
CMP $0x4,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 468040 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2510> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R10,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R10,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4681c0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2690> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x40(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 467fcc <hypre_BoomerAMGBuildExtPIInterp.extracted+0x249c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV %R10,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(,%RAX,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 46808d <hypre_BoomerAMGBuildExtPIInterp.extracted+0x255d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x40(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 46775b <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1c2b> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |