Loop Id: 1016 | Module: exec | Source: par_multi_interp.c:917-970 [...] | Coverage: 1.02% |
---|
Loop Id: 1016 | Module: exec | Source: par_multi_interp.c:917-970 [...] | Coverage: 1.02% |
---|
0x452240 MOV -0x38(%RBP),%R10 |
0x452244 INC %R8 |
0x452247 MOV -0xa8(%RBP),%RDX |
0x45224e CMP 0x8(%RDX,%RDI,8),%R8 |
0x452253 JGE 452600 |
0x452259 MOV -0x128(%RBP),%RDX |
0x452260 MOV (%RDX,%R8,8),%R9 |
0x452264 MOV -0x118(%RBP),%RDX |
0x45226b CMP %R10,(%RDX,%R9,8) |
0x45226f JNE 452244 |
0x452271 MOV -0x58(%RBP),%RDX |
0x452275 MOV 0x8(%RDX,%R9,8),%RSI |
0x45227a TEST %RSI,%RSI |
0x45227d JLE 452340 |
0x452283 MOV -0x90(%RBP),%RDX |
0x45228a MOV (%RDX,%R9,8),%R10 |
0x45228e ADD %R10,%RSI |
0x452291 MOV -0x40(%RBP),%RDX |
0x452295 MOV -0x8(%RDX,%R12,8),%R11 |
0x45229a LEA 0x1(%R10),%RDX |
0x45229e CMP %RDX,%RSI |
0x4522a1 CMOVLE %RDX,%RSI |
0x4522a5 MOV %RSI,%RDX |
0x4522a8 SUB %R10,%RDX |
0x4522ab CMP $0x4,%RDX |
0x4522af MOV %RDX,-0x30(%RBP) |
0x4522b3 JAE 452400 |
0x4522b9 MOV -0x30(%RBP),%R14 |
0x4522bd MOV %R14,%RDX |
0x4522c0 AND $-0x4,%RDX |
0x4522c4 CMP %R14,%RDX |
0x4522c7 JAE 452340 |
0x4522cd ADD %RDX,%R10 |
0x4522d0 JMP 452308 |
(1019) 0x452300 INC %R10 |
(1019) 0x452303 CMP %R10,%RSI |
(1019) 0x452306 JE 452340 |
(1019) 0x452308 MOV (%R11,%R10,8),%RDX |
(1019) 0x45230c CMP %RDI,(%RBX,%RDX,8) |
(1019) 0x452310 JE 452300 |
(1019) 0x452312 INC %RAX |
(1019) 0x452315 MOV -0x58(%RBP),%R14 |
(1019) 0x452319 INCQ 0x8(%R14,%RDI,8) |
(1019) 0x45231e MOV %RDI,(%RBX,%RDX,8) |
(1019) 0x452322 JMP 452300 |
0x452340 MOV -0x60(%RBP),%RDX |
0x452344 MOV 0x8(%RDX,%R9,8),%RSI |
0x452349 TEST %RSI,%RSI |
0x45234c JLE 452240 |
0x452352 MOV -0x98(%RBP),%RDX |
0x452359 MOV (%RDX,%R9,8),%R9 |
0x45235d ADD %R9,%RSI |
0x452360 MOV -0x48(%RBP),%RDX |
0x452364 MOV -0x8(%RDX,%R12,8),%R10 |
0x452369 LEA 0x1(%R9),%RDX |
0x45236d CMP %RDX,%RSI |
0x452370 CMOVLE %RDX,%RSI |
0x452374 MOV %RSI,%R11 |
0x452377 SUB %R9,%R11 |
0x45237a CMP $0x4,%R11 |
0x45237e MOV %R11,-0x30(%RBP) |
0x452382 JAE 452500 |
0x452388 MOV -0x30(%RBP),%RDX |
0x45238c MOV %RDX,%R11 |
0x45238f AND $-0x4,%R11 |
0x452393 CMP %RDX,%R11 |
0x452396 JAE 452240 |
0x45239c ADD %R11,%R9 |
0x45239f JMP 4523cc |
(1017) 0x4523c0 INC %R9 |
(1017) 0x4523c3 CMP %R9,%RSI |
(1017) 0x4523c6 JE 452240 |
(1017) 0x4523cc MOV (%R10,%R9,8),%RDX |
(1017) 0x4523d0 CMP %RDI,(%R15,%RDX,8) |
(1017) 0x4523d4 JE 4523c0 |
(1017) 0x4523d6 INC %RCX |
(1017) 0x4523d9 MOV -0x60(%RBP),%R11 |
(1017) 0x4523dd INCQ 0x8(%R11,%RDI,8) |
(1017) 0x4523e2 MOV %RDI,(%R15,%RDX,8) |
(1017) 0x4523e6 JMP 4523c0 |
0x452400 MOV %RDX,%R14 |
0x452403 SHR $0x2,%R14 |
0x452407 LEA 0x18(%R11,%R10,8),%R13 |
0x45240c JMP 452451 |
(1020) 0x452440 MOV -0x50(%RBP),%R12 |
(1020) 0x452444 ADD $0x20,%R13 |
(1020) 0x452448 DEC %R14 |
(1020) 0x45244b JE 4522b9 |
(1020) 0x452451 MOV -0x18(%R13),%RDX |
(1020) 0x452455 CMP %RDI,(%RBX,%RDX,8) |
(1020) 0x452459 JNE 452480 |
(1020) 0x45245b MOV -0x10(%R13),%RDX |
(1020) 0x45245f CMP %RDI,(%RBX,%RDX,8) |
(1020) 0x452463 JNE 45249a |
(1020) 0x452465 MOV -0x8(%R13),%RDX |
(1020) 0x452469 CMP %RDI,(%RBX,%RDX,8) |
(1020) 0x45246d JNE 4524b4 |
(1020) 0x45246f MOV (%R13),%RDX |
(1020) 0x452473 CMP %RDI,(%RBX,%RDX,8) |
(1020) 0x452477 JE 452440 |
(1020) 0x452479 JMP 4524d2 |
(1020) 0x452480 INC %RAX |
(1020) 0x452483 MOV -0x58(%RBP),%R12 |
(1020) 0x452487 INCQ 0x8(%R12,%RDI,8) |
(1020) 0x45248c MOV %RDI,(%RBX,%RDX,8) |
(1020) 0x452490 MOV -0x10(%R13),%RDX |
(1020) 0x452494 CMP %RDI,(%RBX,%RDX,8) |
(1020) 0x452498 JE 452465 |
(1020) 0x45249a INC %RAX |
(1020) 0x45249d MOV -0x58(%RBP),%R12 |
(1020) 0x4524a1 INCQ 0x8(%R12,%RDI,8) |
(1020) 0x4524a6 MOV %RDI,(%RBX,%RDX,8) |
(1020) 0x4524aa MOV -0x8(%R13),%RDX |
(1020) 0x4524ae CMP %RDI,(%RBX,%RDX,8) |
(1020) 0x4524b2 JE 45246f |
(1020) 0x4524b4 INC %RAX |
(1020) 0x4524b7 MOV -0x58(%RBP),%R12 |
(1020) 0x4524bb INCQ 0x8(%R12,%RDI,8) |
(1020) 0x4524c0 MOV %RDI,(%RBX,%RDX,8) |
(1020) 0x4524c4 MOV (%R13),%RDX |
(1020) 0x4524c8 CMP %RDI,(%RBX,%RDX,8) |
(1020) 0x4524cc JE 452440 |
(1020) 0x4524d2 INC %RAX |
(1020) 0x4524d5 MOV -0x58(%RBP),%R12 |
(1020) 0x4524d9 INCQ 0x8(%R12,%RDI,8) |
(1020) 0x4524de MOV %RDI,(%RBX,%RDX,8) |
(1020) 0x4524e2 JMP 452440 |
0x452500 SHR $0x2,%R11 |
0x452504 LEA 0x18(%R10,%R9,8),%R14 |
0x452509 JMP 45254d |
(1018) 0x452540 ADD $0x20,%R14 |
(1018) 0x452544 DEC %R11 |
(1018) 0x452547 JE 452388 |
(1018) 0x45254d MOV -0x18(%R14),%R13 |
(1018) 0x452551 CMP %RDI,(%R15,%R13,8) |
(1018) 0x452555 JNE 452580 |
(1018) 0x452557 MOV -0x10(%R14),%R13 |
(1018) 0x45255b CMP %RDI,(%R15,%R13,8) |
(1018) 0x45255f JNE 45259a |
(1018) 0x452561 MOV -0x8(%R14),%R13 |
(1018) 0x452565 CMP %RDI,(%R15,%R13,8) |
(1018) 0x452569 JNE 4525b4 |
(1018) 0x45256b MOV (%R14),%R13 |
(1018) 0x45256e CMP %RDI,(%R15,%R13,8) |
(1018) 0x452572 JE 452540 |
(1018) 0x452574 JMP 4525d1 |
(1018) 0x452580 INC %RCX |
(1018) 0x452583 MOV -0x60(%RBP),%RDX |
(1018) 0x452587 INCQ 0x8(%RDX,%RDI,8) |
(1018) 0x45258c MOV %RDI,(%R15,%R13,8) |
(1018) 0x452590 MOV -0x10(%R14),%R13 |
(1018) 0x452594 CMP %RDI,(%R15,%R13,8) |
(1018) 0x452598 JE 452561 |
(1018) 0x45259a INC %RCX |
(1018) 0x45259d MOV -0x60(%RBP),%RDX |
(1018) 0x4525a1 INCQ 0x8(%RDX,%RDI,8) |
(1018) 0x4525a6 MOV %RDI,(%R15,%R13,8) |
(1018) 0x4525aa MOV -0x8(%R14),%R13 |
(1018) 0x4525ae CMP %RDI,(%R15,%R13,8) |
(1018) 0x4525b2 JE 45256b |
(1018) 0x4525b4 INC %RCX |
(1018) 0x4525b7 MOV -0x60(%RBP),%RDX |
(1018) 0x4525bb INCQ 0x8(%RDX,%RDI,8) |
(1018) 0x4525c0 MOV %RDI,(%R15,%R13,8) |
(1018) 0x4525c4 MOV (%R14),%R13 |
(1018) 0x4525c7 CMP %RDI,(%R15,%R13,8) |
(1018) 0x4525cb JE 452540 |
(1018) 0x4525d1 INC %RCX |
(1018) 0x4525d4 MOV -0x60(%RBP),%RDX |
(1018) 0x4525d8 INCQ 0x8(%RDX,%RDI,8) |
(1018) 0x4525dd MOV %RDI,(%R15,%R13,8) |
(1018) 0x4525e1 JMP 452540 |
/home/eoseret/qaas_runs_CPU_9468/171-112-7443/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 917 - 970 |
-------------------------------------------------------------------------------- |
917: for (i=0; i < n_coarse; i++) |
[...] |
944: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
945: { |
946: j1 = S_diag_j[j]; |
947: if (assigned[j1] == pass-1) |
948: { |
949: j_start = P_diag_start[j1]; |
950: j_end = j_start+P_diag_i[j1+1]; |
951: for (k=j_start; k < j_end; k++) |
952: { |
953: k1 = P_diag_pass[pass-1][k]; |
954: if (P_marker[k1] != i1) |
955: { |
956: cnt_nz++; |
957: P_diag_i[i1+1]++; |
958: P_marker[k1] = i1; |
959: } |
960: } |
961: j_start = P_offd_start[j1]; |
962: j_end = j_start+P_offd_i[j1+1]; |
963: for (k=j_start; k < j_end; k++) |
964: { |
965: k1 = P_offd_pass[pass-1][k]; |
966: if (P_marker_offd[k1] != i1) |
967: { |
968: cnt_nz_offd++; |
969: P_offd_i[i1+1]++; |
970: P_marker_offd[k1] = i1; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.60 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source | par_multi_interp.c:917-917,par_multi_interp.c:944-953,par_multi_interp.c:958-958,par_multi_interp.c:961-965,par_multi_interp.c:970-970 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 11.17 |
CQA cycles if no scalar integer | 11.17 |
CQA cycles if FP arith vectorized | 11.17 |
CQA cycles if fully vectorized | 1.40 |
Front-end cycles | 11.17 |
DIV/SQRT cycles | 6.40 |
P0 cycles | 6.40 |
P1 cycles | 7.00 |
P2 cycles | 7.00 |
P3 cycles | 1.00 |
P4 cycles | 6.40 |
P5 cycles | 6.40 |
P6 cycles | 1.00 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 6.40 |
P10 cycles | 7.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 11.38 |
Stall cycles (UFS) | 0.00 |
Nb insns | 65.00 |
Nb uops | 65.00 |
Nb loads | 21.00 |
Nb stores | 2.00 |
Nb stack references | 11.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 16.48 |
Bytes prefetched | 0.00 |
Bytes loaded | 168.00 |
Bytes stored | 16.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.60 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source | par_multi_interp.c:917-917,par_multi_interp.c:944-953,par_multi_interp.c:958-958,par_multi_interp.c:961-965,par_multi_interp.c:970-970 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 11.17 |
CQA cycles if no scalar integer | 11.17 |
CQA cycles if FP arith vectorized | 11.17 |
CQA cycles if fully vectorized | 1.40 |
Front-end cycles | 11.17 |
DIV/SQRT cycles | 6.40 |
P0 cycles | 6.40 |
P1 cycles | 7.00 |
P2 cycles | 7.00 |
P3 cycles | 1.00 |
P4 cycles | 6.40 |
P5 cycles | 6.40 |
P6 cycles | 1.00 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 6.40 |
P10 cycles | 7.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 11.38 |
Stall cycles (UFS) | 0.00 |
Nb insns | 65.00 |
Nb uops | 65.00 |
Nb loads | 21.00 |
Nb stores | 2.00 |
Nb stack references | 11.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 16.48 |
Bytes prefetched | 0.00 |
Bytes loaded | 168.00 |
Bytes stored | 16.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source file and lines | par_multi_interp.c:917-970 |
Module | exec |
nb instructions | 65 |
nb uops | 65 |
loop length | 268 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 11 |
micro-operation queue | 11.17 cycles |
front end | 11.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 6.40 | 6.40 | 7.00 | 7.00 | 1.00 | 6.40 | 6.40 | 1.00 | 1.00 | 1.00 | 6.40 | 7.00 |
cycles | 6.40 | 6.40 | 7.00 | 7.00 | 1.00 | 6.40 | 6.40 | 1.00 | 1.00 | 1.00 | 6.40 | 7.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 11.38 |
Stall cycles | 0.00 |
Front-end | 11.17 |
Dispatch | 7.00 |
Overall L1 | 11.17 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xa8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP 0x8(%RDX,%RDI,8),%R8 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 452600 <hypre_BoomerAMGBuildMultipass.extracted.34+0x760> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x128(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R8,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x118(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R10,(%RDX,%R9,8) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 452244 <hypre_BoomerAMGBuildMultipass.extracted.34+0x3a4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDX,%R9,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RSI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 452340 <hypre_BoomerAMGBuildMultipass.extracted.34+0x4a0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x90(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R9,8),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R10,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x40(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RDX,%R12,8),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%R10),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVLE %RDX,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R10,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 452400 <hypre_BoomerAMGBuildMultipass.extracted.34+0x560> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x30(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R14,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 452340 <hypre_BoomerAMGBuildMultipass.extracted.34+0x4a0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RDX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 452308 <hypre_BoomerAMGBuildMultipass.extracted.34+0x468> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x60(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDX,%R9,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RSI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 452240 <hypre_BoomerAMGBuildMultipass.extracted.34+0x3a0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x98(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R9,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R9,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RDX,%R12,8),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%R9),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVLE %RDX,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSI,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R9,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x4,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R11,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 452500 <hypre_BoomerAMGBuildMultipass.extracted.34+0x660> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RDX,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 452240 <hypre_BoomerAMGBuildMultipass.extracted.34+0x3a0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %R11,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4523cc <hypre_BoomerAMGBuildMultipass.extracted.34+0x52c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %RDX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%R14 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(%R11,%R10,8),%R13 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JMP 452451 <hypre_BoomerAMGBuildMultipass.extracted.34+0x5b1> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
SHR $0x2,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(%R10,%R9,8),%R14 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JMP 45254d <hypre_BoomerAMGBuildMultipass.extracted.34+0x6ad> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source file and lines | par_multi_interp.c:917-970 |
Module | exec |
nb instructions | 65 |
nb uops | 65 |
loop length | 268 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 11 |
micro-operation queue | 11.17 cycles |
front end | 11.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 6.40 | 6.40 | 7.00 | 7.00 | 1.00 | 6.40 | 6.40 | 1.00 | 1.00 | 1.00 | 6.40 | 7.00 |
cycles | 6.40 | 6.40 | 7.00 | 7.00 | 1.00 | 6.40 | 6.40 | 1.00 | 1.00 | 1.00 | 6.40 | 7.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 11.38 |
Stall cycles | 0.00 |
Front-end | 11.17 |
Dispatch | 7.00 |
Overall L1 | 11.17 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xa8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP 0x8(%RDX,%RDI,8),%R8 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 452600 <hypre_BoomerAMGBuildMultipass.extracted.34+0x760> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x128(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R8,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x118(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R10,(%RDX,%R9,8) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 452244 <hypre_BoomerAMGBuildMultipass.extracted.34+0x3a4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDX,%R9,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RSI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 452340 <hypre_BoomerAMGBuildMultipass.extracted.34+0x4a0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x90(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R9,8),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R10,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x40(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RDX,%R12,8),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%R10),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVLE %RDX,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R10,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 452400 <hypre_BoomerAMGBuildMultipass.extracted.34+0x560> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x30(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R14,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 452340 <hypre_BoomerAMGBuildMultipass.extracted.34+0x4a0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RDX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 452308 <hypre_BoomerAMGBuildMultipass.extracted.34+0x468> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x60(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDX,%R9,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RSI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 452240 <hypre_BoomerAMGBuildMultipass.extracted.34+0x3a0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x98(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R9,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R9,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RDX,%R12,8),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%R9),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVLE %RDX,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSI,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R9,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x4,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R11,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 452500 <hypre_BoomerAMGBuildMultipass.extracted.34+0x660> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RDX,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 452240 <hypre_BoomerAMGBuildMultipass.extracted.34+0x3a0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %R11,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4523cc <hypre_BoomerAMGBuildMultipass.extracted.34+0x52c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %RDX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%R14 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(%R11,%R10,8),%R13 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JMP 452451 <hypre_BoomerAMGBuildMultipass.extracted.34+0x5b1> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
SHR $0x2,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(%R10,%R9,8),%R14 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JMP 45254d <hypre_BoomerAMGBuildMultipass.extracted.34+0x6ad> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |