Loop Id: 2446 | Module: exec | Source: par_csr_matop.c:127-242 [...] | Coverage: 0.09% |
---|
Loop Id: 2446 | Module: exec | Source: par_csr_matop.c:127-242 [...] | Coverage: 0.09% |
---|
0x543097 CMPQ $0,0x80(%RSP) |
0x5430a0 MOV %RBX,%RCX |
0x5430a3 MOV %R10,%R8 |
0x5430a6 JNE 5431a0 |
0x5430ac MOV 0xe0(%RSP),%R11 |
0x5430b4 MOV (%R11,%RDX,8),%R12 |
0x5430b8 CMP 0x8(%R11,%RDX,8),%R12 |
0x5430bd JGE 54314e |
0x5430c3 MOV %RDX,0xe8(%RSP) |
0x5430cb MOV 0x68(%RSP),%R9 |
(2451) 0x5430d0 MOV 0xc8(%RSP),%R15 |
(2451) 0x5430d8 MOV 0xd0(%RSP),%RSI |
(2451) 0x5430e0 MOV (%R15,%R12,8),%R15 |
(2451) 0x5430e4 LEA 0x8(,%R15,8),%R13 |
(2451) 0x5430ec MOV (%RSI,%R15,8),%RAX |
(2451) 0x5430f0 LEA (%RSI,%R13,1),%R11 |
(2451) 0x5430f4 MOV (%R11),%RSI |
(2451) 0x5430f7 CMP %RSI,%RAX |
(2451) 0x5430fa JGE 543122 |
(2451) 0x5430fc NOPL (%RAX) |
(2453) 0x543100 MOV (%R9,%RAX,8),%RDX |
(2453) 0x543104 LEA (%RDI,%RDX,8),%RDX |
(2453) 0x543108 CMP (%RDX),%RBX |
(2453) 0x54310b JLE 5432c0 |
(2453) 0x543111 MOV %RCX,(%RDX) |
(2453) 0x543114 INC %RAX |
(2453) 0x543117 INC %RCX |
(2453) 0x54311a MOV (%R11),%RSI |
(2453) 0x54311d CMP %RAX,%RSI |
(2453) 0x543120 JG 543100 |
(2451) 0x543122 CMPQ $0,0xd8(%RSP) |
(2451) 0x54312b JNE 5432db |
(2451) 0x543131 MOV 0xe0(%RSP),%R13 |
(2451) 0x543139 MOV 0xe8(%RSP),%RAX |
(2451) 0x543141 INC %R12 |
(2451) 0x543144 CMP %R12,0x8(%R13,%RAX,8) |
(2451) 0x543149 JG 5430d0 |
0x54314b MOV %RAX,%RDX |
0x54314e MOV 0x78(%RSP),%R12 |
0x543153 MOV %RBX,(%R12,%RDX,8) |
0x543157 MOV 0x70(%RSP),%RBX |
0x54315c MOV %R10,(%RBX,%RDX,8) |
0x543160 INC %RDX |
0x543163 CMP %RDX,0x90(%RSP) |
0x54316b JE 543379 |
0x543171 CMPQ $0,0x88(%RSP) |
0x54317a MOV %R8,%R10 |
0x54317d MOV %RCX,%RBX |
0x543180 JE 543097 |
0x5431a0 MOV 0xb8(%RSP),%R12 |
0x5431a8 MOV (%R12,%RDX,8),%R9 |
0x5431ac MOV %R9,0xe8(%RSP) |
0x5431b4 CMP 0x8(%R12,%RDX,8),%R9 |
0x5431b9 JGE 5430ac |
0x5431bf MOV 0xf8(%RSP),%R11 |
0x5431c7 MOV 0x50(%RSP),%R12 |
0x5431cc MOV %R14,0x60(%RSP) |
0x5431d1 MOV %RDX,0xc0(%RSP) |
0x5431d9 MOV 0x48(%RSP),%R15 |
0x5431de XCHG %AX,%AX |
(2447) 0x5431e0 MOV 0x98(%RSP),%R13 |
(2447) 0x5431e8 MOV 0xe8(%RSP),%R14 |
(2447) 0x5431f0 MOV 0xb0(%RSP),%RDX |
(2447) 0x5431f8 MOV (%R13,%R14,8),%R14 |
(2447) 0x5431fd LEA 0x8(,%R14,8),%R9 |
(2447) 0x543205 MOV (%RDX,%R14,8),%RAX |
(2447) 0x543209 LEA (%RDX,%R9,1),%R13 |
(2447) 0x54320d MOV (%R13),%RSI |
(2447) 0x543211 CMP %RSI,%RAX |
(2447) 0x543214 JGE 543246 |
(2447) 0x543216 NOPW %CS:(%RAX,%RAX,1) |
(2449) 0x543220 MOV (%R12,%RAX,8),%RDX |
(2449) 0x543224 ADD %R11,%RDX |
(2449) 0x543227 LEA (%RDI,%RDX,8),%RDX |
(2449) 0x54322b CMP (%RDX),%R10 |
(2449) 0x54322e JLE 543350 |
(2449) 0x543234 MOV %R8,(%RDX) |
(2449) 0x543237 INC %RAX |
(2449) 0x54323a INC %R8 |
(2449) 0x54323d MOV (%R13),%RSI |
(2449) 0x543241 CMP %RAX,%RSI |
(2449) 0x543244 JG 543220 |
(2447) 0x543246 MOV 0xa8(%RSP),%R13 |
(2447) 0x54324e ADD %R13,%R9 |
(2447) 0x543251 MOV (%R13,%R14,8),%R14 |
(2447) 0x543256 MOV (%R9),%RSI |
(2447) 0x543259 CMP %RSI,%R14 |
(2447) 0x54325c JGE 543282 |
(2447) 0x54325e XCHG %AX,%AX |
(2448) 0x543260 MOV (%R15,%R14,8),%RAX |
(2448) 0x543264 LEA (%RDI,%RAX,8),%RDX |
(2448) 0x543268 CMP (%RDX),%RBX |
(2448) 0x54326b JLE 543368 |
(2448) 0x543271 MOV %RCX,(%RDX) |
(2448) 0x543274 INC %R14 |
(2448) 0x543277 INC %RCX |
(2448) 0x54327a MOV (%R9),%RSI |
(2448) 0x54327d CMP %R14,%RSI |
(2448) 0x543280 JG 543260 |
(2447) 0x543282 INCQ 0xe8(%RSP) |
(2447) 0x54328a MOV 0xb8(%RSP),%R13 |
(2447) 0x543292 MOV 0xc0(%RSP),%RAX |
(2447) 0x54329a MOV 0xe8(%RSP),%R9 |
(2447) 0x5432a2 CMP %R9,0x8(%R13,%RAX,8) |
(2447) 0x5432a7 JG 5431e0 |
0x5432ad MOV 0x60(%RSP),%R14 |
0x5432b2 MOV %RAX,%RDX |
0x5432b5 JMP 5430ac |
(2453) 0x5432c0 INC %RAX |
(2453) 0x5432c3 CMP %RSI,%RAX |
(2453) 0x5432c6 JL 543100 |
(2451) 0x5432cc CMPQ $0,0xd8(%RSP) |
(2451) 0x5432d5 JE 543131 |
(2451) 0x5432db MOV 0xa0(%RSP),%R11 |
(2451) 0x5432e3 ADD %R11,%R13 |
(2451) 0x5432e6 MOV (%R11,%R15,8),%RAX |
(2451) 0x5432ea MOV (%R13),%RSI |
(2451) 0x5432ee CMP %RSI,%RAX |
(2451) 0x5432f1 JGE 543131 |
(2451) 0x5432f7 NOPW (%RAX,%RAX,1) |
(2452) 0x543300 MOV (%R14,%RAX,8),%RDX |
(2452) 0x543304 MOV 0xf0(%RSP),%R11 |
(2452) 0x54330c MOV 0xf8(%RSP),%R15 |
(2452) 0x543314 ADD (%R11,%RDX,8),%R15 |
(2452) 0x543318 LEA (%RDI,%R15,8),%RDX |
(2452) 0x54331c CMP (%RDX),%R10 |
(2452) 0x54331f JLE 543340 |
(2452) 0x543321 MOV %R8,(%RDX) |
(2452) 0x543324 INC %RAX |
(2452) 0x543327 INC %R8 |
(2452) 0x54332a MOV (%R13),%RSI |
(2452) 0x54332e CMP %RAX,%RSI |
(2452) 0x543331 JG 543300 |
(2451) 0x543333 JMP 543131 |
(2452) 0x543340 INC %RAX |
(2452) 0x543343 CMP %RAX,%RSI |
(2452) 0x543346 JG 543300 |
(2451) 0x543348 JMP 543131 |
(2449) 0x543350 INC %RAX |
(2449) 0x543353 CMP %RSI,%RAX |
(2449) 0x543356 JL 543220 |
(2447) 0x54335c JMP 543246 |
(2448) 0x543368 INC %R14 |
(2448) 0x54336b CMP %RSI,%R14 |
(2448) 0x54336e JL 543260 |
(2447) 0x543374 JMP 543282 |
/home/eoseret/qaas_runs_CPU_9468/171-112-7443/intel/AMG/build/AMG/AMG/parcsr_mv/par_csr_matop.c: 127 - 242 |
-------------------------------------------------------------------------------- |
127: for (i1 = ns; i1 < ne; i1++) |
[...] |
135: if ( allsquare ) { |
[...] |
144: if (num_cols_offd_A) |
145: { |
146: for (jj2 = A_offd_i[i1]; jj2 < A_offd_i[i1+1]; jj2++) |
[...] |
154: for (jj3 = B_ext_offd_i[i2]; jj3 < B_ext_offd_i[i2+1]; jj3++) |
155: { |
156: i3 = num_cols_diag_B+B_ext_offd_j[jj3]; |
[...] |
164: if (B_marker[i3] < jj_row_begin_offd) |
165: { |
166: B_marker[i3] = jj_count_offd; |
167: jj_count_offd++; |
168: } |
169: } |
170: for (jj3 = B_ext_diag_i[i2]; jj3 < B_ext_diag_i[i2+1]; jj3++) |
171: { |
172: i3 = B_ext_diag_j[jj3]; |
173: |
174: if (B_marker[i3] < jj_row_begin_diag) |
175: { |
176: B_marker[i3] = jj_count_diag; |
177: jj_count_diag++; |
[...] |
187: for (jj2 = A_diag_i[i1]; jj2 < A_diag_i[i1+1]; jj2++) |
[...] |
195: for (jj3 = B_diag_i[i2]; jj3 < B_diag_i[i2+1]; jj3++) |
[...] |
205: if (B_marker[i3] < jj_row_begin_diag) |
206: { |
207: B_marker[i3] = jj_count_diag; |
208: jj_count_diag++; |
[...] |
216: if (num_cols_offd_B) |
217: { |
218: for (jj3 = B_offd_i[i2]; jj3 < B_offd_i[i2+1]; jj3++) |
219: { |
220: i3 = num_cols_diag_B+map_B_to_C[B_offd_j[jj3]]; |
[...] |
228: if (B_marker[i3] < jj_row_begin_offd) |
229: { |
230: B_marker[i3] = jj_count_offd; |
231: jj_count_offd++; |
[...] |
241: (*C_diag_i)[i1] = jj_row_begin_diag; |
242: (*C_offd_i)[i1] = jj_row_begin_offd; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.19 |
Bottlenecks | micro-operation queue, |
Function | hypre_ParMatmul_RowSizes._omp_fn.0 |
Source | par_csr_matop.c:127-127,par_csr_matop.c:135-135,par_csr_matop.c:144-146,par_csr_matop.c:187-187,par_csr_matop.c:241-242 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 6.33 |
CQA cycles if no scalar integer | 6.33 |
CQA cycles if FP arith vectorized | 6.33 |
CQA cycles if fully vectorized | 0.79 |
Front-end cycles | 6.33 |
DIV/SQRT cycles | 2.50 |
P0 cycles | 1.80 |
P1 cycles | 5.33 |
P2 cycles | 5.33 |
P3 cycles | 3.00 |
P4 cycles | 1.60 |
P5 cycles | 2.50 |
P6 cycles | 3.00 |
P7 cycles | 3.00 |
P8 cycles | 3.00 |
P9 cycles | 1.60 |
P10 cycles | 5.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 6.49 |
Stall cycles (UFS) | 0.00 |
Nb insns | 36.00 |
Nb uops | 36.00 |
Nb loads | 16.00 |
Nb stores | 6.00 |
Nb stack references | 14.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 27.79 |
Bytes prefetched | 0.00 |
Bytes loaded | 128.00 |
Bytes stored | 48.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.19 |
Bottlenecks | micro-operation queue, |
Function | hypre_ParMatmul_RowSizes._omp_fn.0 |
Source | par_csr_matop.c:127-127,par_csr_matop.c:135-135,par_csr_matop.c:144-146,par_csr_matop.c:187-187,par_csr_matop.c:241-242 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 6.33 |
CQA cycles if no scalar integer | 6.33 |
CQA cycles if FP arith vectorized | 6.33 |
CQA cycles if fully vectorized | 0.79 |
Front-end cycles | 6.33 |
DIV/SQRT cycles | 2.50 |
P0 cycles | 1.80 |
P1 cycles | 5.33 |
P2 cycles | 5.33 |
P3 cycles | 3.00 |
P4 cycles | 1.60 |
P5 cycles | 2.50 |
P6 cycles | 3.00 |
P7 cycles | 3.00 |
P8 cycles | 3.00 |
P9 cycles | 1.60 |
P10 cycles | 5.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 6.49 |
Stall cycles (UFS) | 0.00 |
Nb insns | 36.00 |
Nb uops | 36.00 |
Nb loads | 16.00 |
Nb stores | 6.00 |
Nb stack references | 14.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 27.79 |
Bytes prefetched | 0.00 |
Bytes loaded | 128.00 |
Bytes stored | 48.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | hypre_ParMatmul_RowSizes._omp_fn.0 |
Source file and lines | par_csr_matop.c:127-242 |
Module | exec |
nb instructions | 36 |
nb uops | 36 |
loop length | 193 |
used x86 registers | 12 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 14 |
micro-operation queue | 6.33 cycles |
front end | 6.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.50 | 1.80 | 5.33 | 5.33 | 3.00 | 1.60 | 2.50 | 3.00 | 3.00 | 3.00 | 1.60 | 5.33 |
cycles | 2.50 | 1.80 | 5.33 | 5.33 | 3.00 | 1.60 | 2.50 | 3.00 | 3.00 | 3.00 | 1.60 | 5.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 6.49 |
Stall cycles | 0.00 |
Front-end | 6.33 |
Dispatch | 5.33 |
Overall L1 | 6.33 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
CMPQ $0,0x80(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RBX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R10,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JNE 5431a0 <hypre_ParMatmul_RowSizes._omp_fn.0+0x310> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xe0(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R11,%RDX,8),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP 0x8(%R11,%RDX,8),%R12 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 54314e <hypre_ParMatmul_RowSizes._omp_fn.0+0x2be> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDX,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x78(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,(%R12,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,(%RBX,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RDX,0x90(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 543379 <hypre_ParMatmul_RowSizes._omp_fn.0+0x4e9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0,0x88(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %R8,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JE 543097 <hypre_ParMatmul_RowSizes._omp_fn.0+0x207> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xb8(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12,%RDX,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP 0x8(%R12,%RDX,8),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 5430ac <hypre_ParMatmul_RowSizes._omp_fn.0+0x21c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xf8(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x60(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 5430ac <hypre_ParMatmul_RowSizes._omp_fn.0+0x21c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
Function | hypre_ParMatmul_RowSizes._omp_fn.0 |
Source file and lines | par_csr_matop.c:127-242 |
Module | exec |
nb instructions | 36 |
nb uops | 36 |
loop length | 193 |
used x86 registers | 12 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 14 |
micro-operation queue | 6.33 cycles |
front end | 6.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.50 | 1.80 | 5.33 | 5.33 | 3.00 | 1.60 | 2.50 | 3.00 | 3.00 | 3.00 | 1.60 | 5.33 |
cycles | 2.50 | 1.80 | 5.33 | 5.33 | 3.00 | 1.60 | 2.50 | 3.00 | 3.00 | 3.00 | 1.60 | 5.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 6.49 |
Stall cycles | 0.00 |
Front-end | 6.33 |
Dispatch | 5.33 |
Overall L1 | 6.33 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
CMPQ $0,0x80(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RBX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R10,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JNE 5431a0 <hypre_ParMatmul_RowSizes._omp_fn.0+0x310> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xe0(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R11,%RDX,8),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP 0x8(%R11,%RDX,8),%R12 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 54314e <hypre_ParMatmul_RowSizes._omp_fn.0+0x2be> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDX,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x78(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,(%R12,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,(%RBX,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RDX,0x90(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 543379 <hypre_ParMatmul_RowSizes._omp_fn.0+0x4e9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0,0x88(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %R8,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JE 543097 <hypre_ParMatmul_RowSizes._omp_fn.0+0x207> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xb8(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12,%RDX,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP 0x8(%R12,%RDX,8),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 5430ac <hypre_ParMatmul_RowSizes._omp_fn.0+0x21c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xf8(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x60(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 5430ac <hypre_ParMatmul_RowSizes._omp_fn.0+0x21c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |