Loop Id: 1002 | Module: exec | Source: par_multi_interp.c:917-1125 [...] | Coverage: 0.06% |
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Loop Id: 1002 | Module: exec | Source: par_multi_interp.c:917-1125 [...] | Coverage: 0.06% |
---|
0x452bc0 MOV -0x80(%RBP),%RSI |
0x452bc4 INC %RSI |
0x452bc7 CMP -0xc8(%RBP),%RSI |
0x452bce JGE 453280 |
0x452bd4 MOV -0x88(%RBP),%RDX |
0x452bdb MOV %RSI,-0x80(%RBP) |
0x452bdf MOV (%RDX,%RSI,8),%RSI |
0x452be3 MOV -0xa8(%RBP),%RDX |
0x452bea MOV (%RDX,%RSI,8),%R8 |
0x452bee MOV %RSI,%RDI |
0x452bf1 NOT %RDI |
0x452bf4 MOV %RSI,-0x50(%RBP) |
0x452bf8 JMP 452c12 |
(1005) 0x452c00 MOV -0x38(%RBP),%R10 |
(1005) 0x452c04 INC %R8 |
(1005) 0x452c07 MOV -0xa8(%RBP),%RDX |
(1005) 0x452c0e MOV -0x50(%RBP),%RSI |
(1005) 0x452c12 CMP 0x8(%RDX,%RSI,8),%R8 |
(1005) 0x452c17 JGE 452fc0 |
(1005) 0x452c1d MOV -0x128(%RBP),%RDX |
(1005) 0x452c24 MOV (%RDX,%R8,8),%R14 |
(1005) 0x452c28 MOV -0x118(%RBP),%RDX |
(1005) 0x452c2f CMP %R10,(%RDX,%R14,8) |
(1005) 0x452c33 JNE 452c04 |
(1005) 0x452c35 MOV -0x58(%RBP),%RDX |
(1005) 0x452c39 MOV 0x8(%RDX,%R14,8),%R10 |
(1005) 0x452c3e TEST %R10,%R10 |
(1005) 0x452c41 JLE 452e04 |
(1005) 0x452c47 MOV -0x90(%RBP),%RDX |
(1005) 0x452c4e MOV %R14,-0x30(%RBP) |
(1005) 0x452c52 MOV (%RDX,%R14,8),%R11 |
(1005) 0x452c56 ADD %R11,%R10 |
(1005) 0x452c59 MOV -0x40(%RBP),%RDX |
(1005) 0x452c5d MOV -0x8(%RDX,%R12,8),%RSI |
(1005) 0x452c62 LEA 0x1(%R11),%RDX |
(1005) 0x452c66 CMP %RDX,%R10 |
(1005) 0x452c69 CMOVLE %RDX,%R10 |
(1005) 0x452c6d MOV %R10,%RDX |
(1005) 0x452c70 SUB %R11,%RDX |
(1005) 0x452c73 CMP $0x4,%RDX |
(1005) 0x452c77 MOV %RDX,-0xd0(%RBP) |
(1005) 0x452c7e JAE 452d00 |
(1005) 0x452c84 MOV -0xd0(%RBP),%R9 |
(1005) 0x452c8b MOV %R9,%RDX |
(1005) 0x452c8e AND $-0x4,%RDX |
(1005) 0x452c92 CMP %R9,%RDX |
(1005) 0x452c95 JAE 452e00 |
(1005) 0x452c9b ADD %RDX,%R11 |
(1005) 0x452c9e MOV -0x30(%RBP),%R14 |
(1005) 0x452ca2 JMP 452ccc |
(1008) 0x452cc0 INC %R11 |
(1008) 0x452cc3 CMP %R11,%R10 |
(1008) 0x452cc6 JE 452e04 |
(1008) 0x452ccc MOV (%RSI,%R11,8),%RDX |
(1008) 0x452cd0 CMP %RDI,(%RBX,%RDX,8) |
(1008) 0x452cd4 JE 452cc0 |
(1008) 0x452cd6 MOV -0x40(%RBP),%R9 |
(1008) 0x452cda MOV (%R9,%R12,8),%R9 |
(1008) 0x452cde MOV %RDX,(%R9,%RAX,8) |
(1008) 0x452ce2 INC %RAX |
(1008) 0x452ce5 MOV %RDI,(%RBX,%RDX,8) |
(1008) 0x452ce9 JMP 452cc0 |
(1005) 0x452d00 SHR $0x2,%RDX |
(1005) 0x452d04 LEA 0x18(%RSI,%R11,8),%R13 |
(1005) 0x452d09 JMP 452d4d |
(1009) 0x452d40 ADD $0x20,%R13 |
(1009) 0x452d44 DEC %RDX |
(1009) 0x452d47 JE 452c84 |
(1009) 0x452d4d MOV -0x18(%R13),%R14 |
(1009) 0x452d51 CMP %RDI,(%RBX,%R14,8) |
(1009) 0x452d55 JNE 452d80 |
(1009) 0x452d57 MOV -0x10(%R13),%R14 |
(1009) 0x452d5b CMP %RDI,(%RBX,%R14,8) |
(1009) 0x452d5f JNE 452d9d |
(1009) 0x452d61 MOV -0x8(%R13),%R14 |
(1009) 0x452d65 CMP %RDI,(%RBX,%R14,8) |
(1009) 0x452d69 JNE 452dba |
(1009) 0x452d6b MOV (%R13),%R14 |
(1009) 0x452d6f CMP %RDI,(%RBX,%R14,8) |
(1009) 0x452d73 JE 452d40 |
(1009) 0x452d75 JMP 452ddb |
(1009) 0x452d80 MOV -0x40(%RBP),%R9 |
(1009) 0x452d84 MOV (%R9,%R12,8),%R9 |
(1009) 0x452d88 MOV %R14,(%R9,%RAX,8) |
(1009) 0x452d8c INC %RAX |
(1009) 0x452d8f MOV %RDI,(%RBX,%R14,8) |
(1009) 0x452d93 MOV -0x10(%R13),%R14 |
(1009) 0x452d97 CMP %RDI,(%RBX,%R14,8) |
(1009) 0x452d9b JE 452d61 |
(1009) 0x452d9d MOV -0x40(%RBP),%R9 |
(1009) 0x452da1 MOV (%R9,%R12,8),%R9 |
(1009) 0x452da5 MOV %R14,(%R9,%RAX,8) |
(1009) 0x452da9 INC %RAX |
(1009) 0x452dac MOV %RDI,(%RBX,%R14,8) |
(1009) 0x452db0 MOV -0x8(%R13),%R14 |
(1009) 0x452db4 CMP %RDI,(%RBX,%R14,8) |
(1009) 0x452db8 JE 452d6b |
(1009) 0x452dba MOV -0x40(%RBP),%R9 |
(1009) 0x452dbe MOV (%R9,%R12,8),%R9 |
(1009) 0x452dc2 MOV %R14,(%R9,%RAX,8) |
(1009) 0x452dc6 INC %RAX |
(1009) 0x452dc9 MOV %RDI,(%RBX,%R14,8) |
(1009) 0x452dcd MOV (%R13),%R14 |
(1009) 0x452dd1 CMP %RDI,(%RBX,%R14,8) |
(1009) 0x452dd5 JE 452d40 |
(1009) 0x452ddb MOV -0x40(%RBP),%R9 |
(1009) 0x452ddf MOV (%R9,%R12,8),%R9 |
(1009) 0x452de3 MOV %R14,(%R9,%RAX,8) |
(1009) 0x452de7 INC %RAX |
(1009) 0x452dea MOV %RDI,(%RBX,%R14,8) |
(1009) 0x452dee JMP 452d40 |
(1005) 0x452e00 MOV -0x30(%RBP),%R14 |
(1005) 0x452e04 MOV -0x60(%RBP),%RDX |
(1005) 0x452e08 MOV 0x8(%RDX,%R14,8),%R10 |
(1005) 0x452e0d TEST %R10,%R10 |
(1005) 0x452e10 JLE 452c00 |
(1005) 0x452e16 MOV -0x98(%RBP),%RDX |
(1005) 0x452e1d MOV (%RDX,%R14,8),%R9 |
(1005) 0x452e21 ADD %R9,%R10 |
(1005) 0x452e24 MOV -0x48(%RBP),%RDX |
(1005) 0x452e28 MOV -0x8(%RDX,%R12,8),%RSI |
(1005) 0x452e2d LEA 0x1(%R9),%RDX |
(1005) 0x452e31 CMP %RDX,%R10 |
(1005) 0x452e34 CMOVLE %RDX,%R10 |
(1005) 0x452e38 MOV %R10,%R11 |
(1005) 0x452e3b SUB %R9,%R11 |
(1005) 0x452e3e CMP $0x4,%R11 |
(1005) 0x452e42 MOV %R11,-0x30(%RBP) |
(1005) 0x452e46 JAE 452ec0 |
(1005) 0x452e48 MOV -0x30(%RBP),%RDX |
(1005) 0x452e4c MOV %RDX,%R11 |
(1005) 0x452e4f AND $-0x4,%R11 |
(1005) 0x452e53 CMP %RDX,%R11 |
(1005) 0x452e56 JAE 452c00 |
(1005) 0x452e5c ADD %R11,%R9 |
(1005) 0x452e5f JMP 452e8c |
(1006) 0x452e80 INC %R9 |
(1006) 0x452e83 CMP %R9,%R10 |
(1006) 0x452e86 JE 452c00 |
(1006) 0x452e8c MOV (%RSI,%R9,8),%RDX |
(1006) 0x452e90 CMP %RDI,(%R15,%RDX,8) |
(1006) 0x452e94 JE 452e80 |
(1006) 0x452e96 MOV -0x48(%RBP),%R11 |
(1006) 0x452e9a MOV (%R11,%R12,8),%R11 |
(1006) 0x452e9e MOV %RDX,(%R11,%RCX,8) |
(1006) 0x452ea2 INC %RCX |
(1006) 0x452ea5 MOV %RDI,(%R15,%RDX,8) |
(1006) 0x452ea9 JMP 452e80 |
(1005) 0x452ec0 SHR $0x2,%R11 |
(1005) 0x452ec4 LEA 0x18(%RSI,%R9,8),%R14 |
(1005) 0x452ec9 JMP 452f0d |
(1007) 0x452f00 ADD $0x20,%R14 |
(1007) 0x452f04 DEC %R11 |
(1007) 0x452f07 JE 452e48 |
(1007) 0x452f0d MOV -0x18(%R14),%R13 |
(1007) 0x452f11 CMP %RDI,(%R15,%R13,8) |
(1007) 0x452f15 JNE 452f40 |
(1007) 0x452f17 MOV -0x10(%R14),%R13 |
(1007) 0x452f1b CMP %RDI,(%R15,%R13,8) |
(1007) 0x452f1f JNE 452f5d |
(1007) 0x452f21 MOV -0x8(%R14),%R13 |
(1007) 0x452f25 CMP %RDI,(%R15,%R13,8) |
(1007) 0x452f29 JNE 452f7a |
(1007) 0x452f2b MOV (%R14),%R13 |
(1007) 0x452f2e CMP %RDI,(%R15,%R13,8) |
(1007) 0x452f32 JE 452f00 |
(1007) 0x452f34 JMP 452f9a |
(1007) 0x452f40 MOV -0x48(%RBP),%RDX |
(1007) 0x452f44 MOV (%RDX,%R12,8),%RDX |
(1007) 0x452f48 MOV %R13,(%RDX,%RCX,8) |
(1007) 0x452f4c INC %RCX |
(1007) 0x452f4f MOV %RDI,(%R15,%R13,8) |
(1007) 0x452f53 MOV -0x10(%R14),%R13 |
(1007) 0x452f57 CMP %RDI,(%R15,%R13,8) |
(1007) 0x452f5b JE 452f21 |
(1007) 0x452f5d MOV -0x48(%RBP),%RDX |
(1007) 0x452f61 MOV (%RDX,%R12,8),%RDX |
(1007) 0x452f65 MOV %R13,(%RDX,%RCX,8) |
(1007) 0x452f69 INC %RCX |
(1007) 0x452f6c MOV %RDI,(%R15,%R13,8) |
(1007) 0x452f70 MOV -0x8(%R14),%R13 |
(1007) 0x452f74 CMP %RDI,(%R15,%R13,8) |
(1007) 0x452f78 JE 452f2b |
(1007) 0x452f7a MOV -0x48(%RBP),%RDX |
(1007) 0x452f7e MOV (%RDX,%R12,8),%RDX |
(1007) 0x452f82 MOV %R13,(%RDX,%RCX,8) |
(1007) 0x452f86 INC %RCX |
(1007) 0x452f89 MOV %RDI,(%R15,%R13,8) |
(1007) 0x452f8d MOV (%R14),%R13 |
(1007) 0x452f90 CMP %RDI,(%R15,%R13,8) |
(1007) 0x452f94 JE 452f00 |
(1007) 0x452f9a MOV -0x48(%RBP),%RDX |
(1007) 0x452f9e MOV (%RDX,%R12,8),%RDX |
(1007) 0x452fa2 MOV %R13,(%RDX,%RCX,8) |
(1007) 0x452fa6 INC %RCX |
(1007) 0x452fa9 MOV %RDI,(%R15,%R13,8) |
(1007) 0x452fad JMP 452f00 |
0x452fc0 MOV -0xa0(%RBP),%RDX |
0x452fc7 MOV -0x50(%RBP),%RSI |
0x452fcb MOV (%RDX,%RSI,8),%R8 |
0x452fcf MOV 0x8(%RDX,%RSI,8),%RDX |
0x452fd4 CMP %RDX,%R8 |
0x452fd7 JL 45300c |
0x452fd9 JMP 452bc0 |
(1003) 0x453000 INC %R8 |
(1003) 0x453003 CMP %RDX,%R8 |
(1003) 0x453006 JGE 452bc0 |
(1003) 0x45300c MOV -0x130(%RBP),%RSI |
(1003) 0x453013 MOV (%RSI,%R8,8),%R9 |
(1003) 0x453017 MOV -0x120(%RBP),%RSI |
(1003) 0x45301e CMP %R10,(%RSI,%R9,8) |
(1003) 0x453022 JNE 453000 |
(1003) 0x453024 MOV -0x110(%RBP),%RSI |
(1003) 0x45302b MOV 0x8(%RSI,%R9,8),%RSI |
(1003) 0x453030 TEST %RSI,%RSI |
(1003) 0x453033 JLE 453000 |
(1003) 0x453035 MOV -0x100(%RBP),%RDX |
(1003) 0x45303c MOV (%RDX,%R9,8),%R9 |
(1003) 0x453040 ADD %R9,%RSI |
(1003) 0x453043 MOV -0x108(%RBP),%RDX |
(1003) 0x45304a MOV (%RDX,%R12,8),%R11 |
(1003) 0x45304e LEA 0x1(%R9),%R10 |
(1003) 0x453052 CMP %R10,%RSI |
(1003) 0x453055 CMOVLE %R10,%RSI |
(1003) 0x453059 MOV %RSI,%RDX |
(1003) 0x45305c SUB %R9,%RDX |
(1003) 0x45305f CMP %R10,%RSI |
(1003) 0x453062 MOV %R11,-0x30(%RBP) |
(1003) 0x453066 JNE 4530c0 |
(1003) 0x453068 XOR %R11D,%R11D |
(1003) 0x45306b TEST $0x1,%DL |
(1003) 0x45306e MOV -0x38(%RBP),%R10 |
(1003) 0x453072 JE 453220 |
(1003) 0x453078 ADD %R11,%R9 |
(1003) 0x45307b MOV -0x30(%RBP),%RDX |
(1003) 0x45307f MOV (%RDX,%R9,8),%RDX |
(1003) 0x453083 TEST %RDX,%RDX |
(1003) 0x453086 JS 453200 |
(1003) 0x45308c CMP %RDI,(%R15,%RDX,8) |
(1003) 0x453090 JE 453220 |
(1003) 0x453096 MOV -0x48(%RBP),%RSI |
(1003) 0x45309a MOV (%RSI,%R12,8),%RSI |
(1003) 0x45309e MOV %RDX,(%RSI,%RCX,8) |
(1003) 0x4530a2 INC %RCX |
(1003) 0x4530a5 MOV %RDI,(%R15,%RDX,8) |
(1003) 0x4530a9 JMP 453220 |
(1003) 0x4530c0 MOV %RDX,%RSI |
(1003) 0x4530c3 AND $-0x2,%RSI |
(1003) 0x4530c7 LEA 0x8(%R11,%R9,8),%R10 |
(1003) 0x4530cc XOR %R11D,%R11D |
(1003) 0x4530cf JMP 45310d |
(1004) 0x453100 ADD $0x2,%R11 |
(1004) 0x453104 CMP %R11,%RSI |
(1004) 0x453107 JE 45306b |
(1004) 0x45310d MOV -0x8(%R10,%R11,8),%R14 |
(1004) 0x453112 TEST %R14,%R14 |
(1004) 0x453115 JS 453140 |
(1004) 0x453117 CMP %RDI,(%R15,%R14,8) |
(1004) 0x45311b JE 453160 |
(1004) 0x45311d MOV -0x48(%RBP),%R13 |
(1004) 0x453121 MOV (%R13,%R12,8),%R13 |
(1004) 0x453126 MOV %R14,(%R13,%RCX,8) |
(1004) 0x45312b INC %RCX |
(1004) 0x45312e MOV %RDI,(%R15,%R14,8) |
(1004) 0x453132 JMP 453160 |
(1004) 0x453140 NOT %R14 |
(1004) 0x453143 CMP %RDI,(%RBX,%R14,8) |
(1004) 0x453147 JE 453160 |
(1004) 0x453149 MOV -0x40(%RBP),%R13 |
(1004) 0x45314d MOV (%R13,%R12,8),%R13 |
(1004) 0x453152 MOV %R14,(%R13,%RAX,8) |
(1004) 0x453157 INC %RAX |
(1004) 0x45315a MOV %RDI,(%RBX,%R14,8) |
(1004) 0x45315e XCHG %AX,%AX |
(1004) 0x453160 MOV (%R10,%R11,8),%R14 |
(1004) 0x453164 TEST %R14,%R14 |
(1004) 0x453167 JS 4531c0 |
(1004) 0x453169 CMP %RDI,(%R15,%R14,8) |
(1004) 0x45316d JE 453100 |
(1004) 0x45316f MOV -0x48(%RBP),%R13 |
(1004) 0x453173 MOV (%R13,%R12,8),%R13 |
(1004) 0x453178 MOV %R14,(%R13,%RCX,8) |
(1004) 0x45317d INC %RCX |
(1004) 0x453180 MOV %RDI,(%R15,%R14,8) |
(1004) 0x453184 JMP 453100 |
(1004) 0x4531c0 NOT %R14 |
(1004) 0x4531c3 CMP %RDI,(%RBX,%R14,8) |
(1004) 0x4531c7 JE 453100 |
(1004) 0x4531cd MOV -0x40(%RBP),%R13 |
(1004) 0x4531d1 MOV (%R13,%R12,8),%R13 |
(1004) 0x4531d6 MOV %R14,(%R13,%RAX,8) |
(1004) 0x4531db INC %RAX |
(1004) 0x4531de MOV %RDI,(%RBX,%R14,8) |
(1004) 0x4531e2 JMP 453100 |
(1003) 0x453200 NOT %RDX |
(1003) 0x453203 CMP %RDI,(%RBX,%RDX,8) |
(1003) 0x453207 JE 453220 |
(1003) 0x453209 MOV -0x40(%RBP),%RSI |
(1003) 0x45320d MOV (%RSI,%R12,8),%RSI |
(1003) 0x453211 MOV %RDX,(%RSI,%RAX,8) |
(1003) 0x453215 INC %RAX |
(1003) 0x453218 MOV %RDI,(%RBX,%RDX,8) |
(1003) 0x45321c NOPL (%RAX) |
(1003) 0x453220 MOV -0xa0(%RBP),%RDX |
(1003) 0x453227 MOV -0x50(%RBP),%RSI |
(1003) 0x45322b MOV 0x8(%RDX,%RSI,8),%RDX |
(1003) 0x453230 INC %R8 |
(1003) 0x453233 CMP %RDX,%R8 |
(1003) 0x453236 JL 45300c |
0x45323c JMP 452bc0 |
/home/eoseret/qaas_runs_CPU_9468/171-112-7443/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 917 - 1125 |
-------------------------------------------------------------------------------- |
917: for (i=0; i < n_coarse; i++) |
[...] |
1072: for (i=thread_start; i < thread_stop; i++) |
1073: { |
1074: i1 = pass_array[i]; |
1075: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
1076: { |
1077: j1 = S_diag_j[j]; |
1078: if (assigned[j1] == pass-1) |
1079: { |
1080: j_start = P_diag_start[j1]; |
1081: j_end = j_start+P_diag_i[j1+1]; |
1082: for (k=j_start; k < j_end; k++) |
1083: { |
1084: k1 = P_diag_pass[pass-1][k]; |
1085: if (P_marker[k1] != -i1-1) |
1086: { |
1087: P_diag_pass[pass][cnt_nz++] = k1; |
1088: P_marker[k1] = -i1-1; |
1089: } |
1090: } |
1091: j_start = P_offd_start[j1]; |
1092: j_end = j_start+P_offd_i[j1+1]; |
1093: for (k=j_start; k < j_end; k++) |
1094: { |
1095: k1 = P_offd_pass[pass-1][k]; |
1096: if (P_marker_offd[k1] != -i1-1) |
1097: { |
1098: P_offd_pass[pass][cnt_nz_offd++] = k1; |
1099: P_marker_offd[k1] = -i1-1; |
1100: } |
1101: } |
1102: } |
1103: } |
1104: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
1105: { |
1106: j1 = S_offd_j[j]; |
1107: if (assigned_offd[j1] == pass-1) |
1108: { |
1109: j_start = Pext_start[j1]; |
1110: j_end = j_start+Pext_i[j1+1]; |
1111: for (k=j_start; k < j_end; k++) |
1112: { |
1113: k1 = Pext_pass[pass][k]; |
1114: if (k1 < 0) |
1115: { |
1116: if (P_marker[-k1-1] != -i1-1) |
1117: { |
1118: P_diag_pass[pass][cnt_nz++] = -k1-1; |
1119: P_marker[-k1-1] = -i1-1; |
1120: } |
1121: } |
1122: else if (P_marker_offd[k1] != -i1-1) |
1123: { |
1124: P_offd_pass[pass][cnt_nz_offd++] = k1; |
1125: P_marker_offd[k1] = -i1-1; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.05 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source | par_multi_interp.c:1072-1075,par_multi_interp.c:1078-1078,par_multi_interp.c:1099-1099,par_multi_interp.c:1104-1104 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 3.50 |
CQA cycles if no scalar integer | 3.50 |
CQA cycles if FP arith vectorized | 3.50 |
CQA cycles if fully vectorized | 0.44 |
Front-end cycles | 3.50 |
DIV/SQRT cycles | 1.00 |
P0 cycles | 1.00 |
P1 cycles | 3.33 |
P2 cycles | 3.33 |
P3 cycles | 1.00 |
P4 cycles | 1.00 |
P5 cycles | 1.00 |
P6 cycles | 1.00 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 1.00 |
P10 cycles | 3.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 3.96 |
Stall cycles (UFS) | 0.30 |
Nb insns | 21.00 |
Nb uops | 21.00 |
Nb loads | 10.00 |
Nb stores | 2.00 |
Nb stack references | 6.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 27.43 |
Bytes prefetched | 0.00 |
Bytes loaded | 80.00 |
Bytes stored | 16.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.05 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source | par_multi_interp.c:1072-1075,par_multi_interp.c:1078-1078,par_multi_interp.c:1099-1099,par_multi_interp.c:1104-1104 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 3.50 |
CQA cycles if no scalar integer | 3.50 |
CQA cycles if FP arith vectorized | 3.50 |
CQA cycles if fully vectorized | 0.44 |
Front-end cycles | 3.50 |
DIV/SQRT cycles | 1.00 |
P0 cycles | 1.00 |
P1 cycles | 3.33 |
P2 cycles | 3.33 |
P3 cycles | 1.00 |
P4 cycles | 1.00 |
P5 cycles | 1.00 |
P6 cycles | 1.00 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 1.00 |
P10 cycles | 3.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 3.96 |
Stall cycles (UFS) | 0.30 |
Nb insns | 21.00 |
Nb uops | 21.00 |
Nb loads | 10.00 |
Nb stores | 2.00 |
Nb stack references | 6.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 27.43 |
Bytes prefetched | 0.00 |
Bytes loaded | 80.00 |
Bytes stored | 16.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source file and lines | par_multi_interp.c:917-1125 |
Module | exec |
nb instructions | 21 |
nb uops | 21 |
loop length | 93 |
used x86 registers | 5 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 6 |
micro-operation queue | 3.50 cycles |
front end | 3.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.00 | 1.00 | 3.33 | 3.33 | 1.00 | 1.00 | 1.00 | 1.00 | 1.00 | 1.00 | 1.00 | 3.33 |
cycles | 1.00 | 1.00 | 3.33 | 3.33 | 1.00 | 1.00 | 1.00 | 1.00 | 1.00 | 1.00 | 1.00 | 3.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 3.96 |
Stall cycles | 0.30 |
LM full (events) | 0.80 |
Front-end | 3.50 |
Dispatch | 3.33 |
Overall L1 | 3.50 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x80(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP -0xc8(%RBP),%RSI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 453280 <hypre_BoomerAMGBuildMultipass.extracted.34+0x13e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x88(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%RSI,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xa8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%RSI,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOT %RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RSI,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 452c12 <hypre_BoomerAMGBuildMultipass.extracted.34+0xd72> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0xa0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%RSI,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDX,%RSI,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 45300c <hypre_BoomerAMGBuildMultipass.extracted.34+0x116c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 452bc0 <hypre_BoomerAMGBuildMultipass.extracted.34+0xd20> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
JMP 452bc0 <hypre_BoomerAMGBuildMultipass.extracted.34+0xd20> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source file and lines | par_multi_interp.c:917-1125 |
Module | exec |
nb instructions | 21 |
nb uops | 21 |
loop length | 93 |
used x86 registers | 5 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 6 |
micro-operation queue | 3.50 cycles |
front end | 3.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.00 | 1.00 | 3.33 | 3.33 | 1.00 | 1.00 | 1.00 | 1.00 | 1.00 | 1.00 | 1.00 | 3.33 |
cycles | 1.00 | 1.00 | 3.33 | 3.33 | 1.00 | 1.00 | 1.00 | 1.00 | 1.00 | 1.00 | 1.00 | 3.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 3.96 |
Stall cycles | 0.30 |
LM full (events) | 0.80 |
Front-end | 3.50 |
Dispatch | 3.33 |
Overall L1 | 3.50 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x80(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP -0xc8(%RBP),%RSI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 453280 <hypre_BoomerAMGBuildMultipass.extracted.34+0x13e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x88(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%RSI,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xa8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%RSI,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOT %RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RSI,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 452c12 <hypre_BoomerAMGBuildMultipass.extracted.34+0xd72> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0xa0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%RSI,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDX,%RSI,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 45300c <hypre_BoomerAMGBuildMultipass.extracted.34+0x116c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 452bc0 <hypre_BoomerAMGBuildMultipass.extracted.34+0xd20> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
JMP 452bc0 <hypre_BoomerAMGBuildMultipass.extracted.34+0xd20> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |