Function: hypre_BoomerAMGBuildMultipass.extracted.34 | Module: exec | Source: par_multi_interp.c:891-1134 [...] | Coverage: 2.8% |
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Function: hypre_BoomerAMGBuildMultipass.extracted.34 | Module: exec | Source: par_multi_interp.c:891-1134 [...] | Coverage: 2.8% |
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/home/eoseret/qaas_runs_CPU_9468/171-112-7443/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 891 - 1134 |
-------------------------------------------------------------------------------- |
891: #pragma omp parallel private(i,my_thread_num,num_threads,thread_start,thread_stop,cnt_nz,cnt_nz_offd,i1,j,j1,j_start,j_end,k1,k,P_marker,P_marker_offd) |
[...] |
900: my_thread_num = hypre_GetThreadNum(); |
901: num_threads = hypre_NumActiveThreads(); |
902: thread_start = (pass_length/num_threads)*my_thread_num; |
903: if (my_thread_num == num_threads-1) |
904: { thread_stop = pass_length; } |
905: else |
906: { thread_stop = (pass_length/num_threads)*(my_thread_num+1); } |
907: thread_start += pass_pointer[pass]; |
908: thread_stop += pass_pointer[pass]; |
[...] |
916: P_marker = hypre_CTAlloc(HYPRE_Int, n_coarse); /* marks points to see if they're counted */ |
917: for (i=0; i < n_coarse; i++) |
918: { P_marker[i] = -1; } |
919: if (new_num_cols_offd == local_index+1) |
[...] |
925: else if (n_coarse_offd) |
[...] |
939: for (i=thread_start; i < thread_stop; i++) |
940: { |
941: i1 = pass_array[i]; |
942: P_diag_start[i1] = cnt_nz; |
943: P_offd_start[i1] = cnt_nz_offd; |
944: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
945: { |
946: j1 = S_diag_j[j]; |
947: if (assigned[j1] == pass-1) |
948: { |
949: j_start = P_diag_start[j1]; |
950: j_end = j_start+P_diag_i[j1+1]; |
951: for (k=j_start; k < j_end; k++) |
952: { |
953: k1 = P_diag_pass[pass-1][k]; |
954: if (P_marker[k1] != i1) |
955: { |
956: cnt_nz++; |
957: P_diag_i[i1+1]++; |
958: P_marker[k1] = i1; |
959: } |
960: } |
961: j_start = P_offd_start[j1]; |
962: j_end = j_start+P_offd_i[j1+1]; |
963: for (k=j_start; k < j_end; k++) |
964: { |
965: k1 = P_offd_pass[pass-1][k]; |
966: if (P_marker_offd[k1] != i1) |
967: { |
968: cnt_nz_offd++; |
969: P_offd_i[i1+1]++; |
970: P_marker_offd[k1] = i1; |
[...] |
976: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
977: { |
978: j1 = S_offd_j[j]; |
979: if (assigned_offd[j1] == pass-1) |
980: { |
981: j_start = Pext_start[j1]; |
982: j_end = j_start+Pext_i[j1+1]; |
983: for (k=j_start; k < j_end; k++) |
984: { |
985: k1 = Pext_pass[pass][k]; |
986: if (k1 < 0) |
987: { |
988: if (P_marker[-k1-1] != i1) |
989: { |
990: cnt_nz++; |
991: P_diag_i[i1+1]++; |
992: P_marker[-k1-1] = i1; |
993: } |
994: } |
995: else if (P_marker_offd[k1] != i1) |
996: { |
997: cnt_nz_offd++; |
[...] |
1008: if(my_thread_num == 0) |
1009: { max_num_threads[0] = num_threads; } |
1010: cnt_nz_offd_per_thread[my_thread_num] = cnt_nz_offd; |
1011: cnt_nz_per_thread[my_thread_num] = cnt_nz; |
1012: #ifdef HYPRE_USING_OPENMP |
1013: #pragma omp barrier |
1014: #endif |
1015: if(my_thread_num == 0) |
1016: { |
1017: for(i = 1; i < max_num_threads[0]; i++) |
1018: { |
1019: cnt_nz_offd_per_thread[i] += cnt_nz_offd_per_thread[i-1]; |
1020: cnt_nz_per_thread[i] += cnt_nz_per_thread[i-1]; |
[...] |
1026: if(my_thread_num > 0) |
1027: { |
1028: /* update this thread's section of P_diag_start and P_offd_start |
1029: * with the num of nz's counted by previous threads */ |
1030: for (i=thread_start; i < thread_stop; i++) |
1031: { |
1032: i1 = pass_array[i]; |
1033: P_diag_start[i1] += cnt_nz_per_thread[my_thread_num-1]; |
1034: P_offd_start[i1] += cnt_nz_offd_per_thread[my_thread_num-1]; |
[...] |
1040: cnt_nz = cnt_nz_per_thread[max_num_threads[0]-1]; |
1041: cnt_nz_offd = cnt_nz_offd_per_thread[max_num_threads[0]-1]; |
1042: |
1043: /* Updated total nz count */ |
1044: total_nz += cnt_nz; |
1045: total_nz_offd += cnt_nz_offd; |
1046: |
1047: /* Allocate P_diag_pass and P_offd_pass for all threads */ |
1048: P_diag_pass[pass] = hypre_CTAlloc(HYPRE_Int, cnt_nz); |
1049: if (cnt_nz_offd) |
1050: P_offd_pass[pass] = hypre_CTAlloc(HYPRE_Int, cnt_nz_offd); |
1051: else if (num_procs > 1) |
[...] |
1060: if(my_thread_num > 0) |
1061: { |
1062: cnt_nz = cnt_nz_per_thread[my_thread_num-1]; |
1063: cnt_nz_offd = cnt_nz_offd_per_thread[my_thread_num-1]; |
[...] |
1072: for (i=thread_start; i < thread_stop; i++) |
1073: { |
1074: i1 = pass_array[i]; |
1075: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
1076: { |
1077: j1 = S_diag_j[j]; |
1078: if (assigned[j1] == pass-1) |
1079: { |
1080: j_start = P_diag_start[j1]; |
1081: j_end = j_start+P_diag_i[j1+1]; |
1082: for (k=j_start; k < j_end; k++) |
1083: { |
1084: k1 = P_diag_pass[pass-1][k]; |
1085: if (P_marker[k1] != -i1-1) |
1086: { |
1087: P_diag_pass[pass][cnt_nz++] = k1; |
1088: P_marker[k1] = -i1-1; |
1089: } |
1090: } |
1091: j_start = P_offd_start[j1]; |
1092: j_end = j_start+P_offd_i[j1+1]; |
1093: for (k=j_start; k < j_end; k++) |
1094: { |
1095: k1 = P_offd_pass[pass-1][k]; |
1096: if (P_marker_offd[k1] != -i1-1) |
1097: { |
1098: P_offd_pass[pass][cnt_nz_offd++] = k1; |
1099: P_marker_offd[k1] = -i1-1; |
1100: } |
1101: } |
1102: } |
1103: } |
1104: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
1105: { |
1106: j1 = S_offd_j[j]; |
1107: if (assigned_offd[j1] == pass-1) |
1108: { |
1109: j_start = Pext_start[j1]; |
1110: j_end = j_start+Pext_i[j1+1]; |
1111: for (k=j_start; k < j_end; k++) |
1112: { |
1113: k1 = Pext_pass[pass][k]; |
1114: if (k1 < 0) |
1115: { |
1116: if (P_marker[-k1-1] != -i1-1) |
1117: { |
1118: P_diag_pass[pass][cnt_nz++] = -k1-1; |
1119: P_marker[-k1-1] = -i1-1; |
1120: } |
1121: } |
1122: else if (P_marker_offd[k1] != -i1-1) |
1123: { |
1124: P_offd_pass[pass][cnt_nz_offd++] = k1; |
1125: P_marker_offd[k1] = -i1-1; |
[...] |
1132: hypre_TFree(P_marker); |
1133: if ( (n_coarse_offd) || (new_num_cols_offd == local_index+1) ) |
1134: { hypre_TFree(P_marker_offd); } |
0x444880 PUSH %RBP |
0x444881 MOV %RSP,%RBP |
0x444884 PUSH %R15 |
0x444886 PUSH %R14 |
0x444888 PUSH %R13 |
0x44488a PUSH %R12 |
0x44488c PUSH %RBX |
0x44488d SUB $0x128,%RSP |
0x444894 MOV %R9,-0x130(%RBP) |
0x44489b MOV %R8,-0xa0(%RBP) |
0x4448a2 MOV %RCX,-0x128(%RBP) |
0x4448a9 MOV %RDX,-0xa8(%RBP) |
0x4448b0 MOV %RDI,-0xc0(%RBP) |
0x4448b7 MOV 0xd0(%RBP),%RAX |
0x4448be MOV %RAX,-0x78(%RBP) |
0x4448c2 MOV 0xc8(%RBP),%RAX |
0x4448c9 MOV %RAX,-0xf0(%RBP) |
0x4448d0 MOV 0xc0(%RBP),%RAX |
0x4448d7 MOV %RAX,-0xe0(%RBP) |
0x4448de MOV 0xb8(%RBP),%RBX |
0x4448e5 MOV 0xb0(%RBP),%RAX |
0x4448ec MOV %RAX,-0xf8(%RBP) |
0x4448f3 MOV 0xa8(%RBP),%RAX |
0x4448fa MOV %RAX,-0xb8(%RBP) |
0x444901 MOV 0xa0(%RBP),%RAX |
0x444908 MOV %RAX,-0x150(%RBP) |
0x44490f MOV 0x98(%RBP),%RAX |
0x444916 MOV %RAX,-0x138(%RBP) |
0x44491d MOV 0x90(%RBP),%RAX |
0x444924 MOV %RAX,-0x120(%RBP) |
0x44492b MOV 0x88(%RBP),%RAX |
0x444932 MOV %RAX,-0x118(%RBP) |
0x444939 MOV 0x80(%RBP),%RAX |
0x444940 MOV %RAX,-0xe8(%RBP) |
0x444947 MOV 0x78(%RBP),%R15 |
0x44494b MOV 0x70(%RBP),%RAX |
0x44494f MOV %RAX,-0x50(%RBP) |
0x444953 MOV 0x68(%RBP),%RAX |
0x444957 MOV %RAX,-0x148(%RBP) |
0x44495e MOV 0x60(%RBP),%RAX |
0x444962 MOV %RAX,-0x110(%RBP) |
0x444969 MOV 0x58(%RBP),%RAX |
0x44496d MOV %RAX,-0x108(%RBP) |
0x444974 MOV 0x50(%RBP),%RAX |
0x444978 MOV %RAX,-0x48(%RBP) |
0x44497c MOV 0x48(%RBP),%RAX |
0x444980 MOV %RAX,-0x40(%RBP) |
0x444984 MOV 0x40(%RBP),%RAX |
0x444988 MOV %RAX,-0x98(%RBP) |
0x44498f MOV 0x38(%RBP),%RAX |
0x444993 MOV %RAX,-0x90(%RBP) |
0x44499a MOV 0x30(%RBP),%R13 |
0x44499e MOV 0x28(%RBP),%RAX |
0x4449a2 MOV %RAX,-0x88(%RBP) |
0x4449a9 MOV 0x20(%RBP),%RAX |
0x4449ad MOV %RAX,-0x100(%RBP) |
0x4449b4 MOV 0x18(%RBP),%RAX |
0x4449b8 MOV %RAX,-0x60(%RBP) |
0x4449bc MOV 0x10(%RBP),%RAX |
0x4449c0 MOV %RAX,-0x58(%RBP) |
0x4449c4 CALL 4e8ff0 <hypre_GetThreadNum> |
0x4449c9 MOV %RAX,%R12 |
0x4449cc CALL 4e8fe0 <hypre_NumActiveThreads> |
0x4449d1 MOV %RAX,%RCX |
0x4449d4 MOV %RBX,%RAX |
0x4449d7 OR %RCX,%RAX |
0x4449da SHR $0x20,%RAX |
0x4449de JE 4449ea |
0x4449e0 MOV %RBX,%RAX |
0x4449e3 CQTO |
0x4449e5 IDIV %RCX |
0x4449e8 JMP 4449f0 |
0x4449ea MOV %EBX,%EAX |
0x4449ec XOR %EDX,%EDX |
0x4449ee DIV %ECX |
0x4449f0 MOV %RCX,-0x140(%RBP) |
0x4449f7 DEC %RCX |
0x4449fa LEA 0x1(%R12),%RDX |
0x4449ff MOV %RAX,%R14 |
0x444a02 IMUL %RAX,%RDX |
0x444a06 MOV %R12,-0x68(%RBP) |
0x444a0a CMP %RCX,%R12 |
0x444a0d CMOVE %RBX,%RDX |
0x444a11 MOV %RDX,-0xb0(%RBP) |
0x444a18 MOV -0x50(%RBP),%RAX |
0x444a1c MOV (%RAX),%R12 |
0x444a1f MOV (%R13,%R12,8),%RAX |
0x444a24 MOV %RAX,-0xd8(%RBP) |
0x444a2b MOV $0x8,%ESI |
0x444a30 MOV %R15,%RDI |
0x444a33 CALL 4e72c0 <hypre_CAlloc> |
0x444a38 MOV %RAX,%RBX |
0x444a3b TEST %R15,%R15 |
0x444a3e JLE 444a54 |
0x444a40 SAL $0x3,%R15 |
0x444a44 MOV %RBX,%RDI |
0x444a47 MOV $0xff,%ESI |
0x444a4c MOV %R15,%RDX |
0x444a4f CALL 4f03c0 <_intel_fast_memset> |
0x444a54 IMUL -0x68(%RBP),%R14 |
0x444a59 MOV %R14,-0x70(%RBP) |
0x444a5d MOV -0xb8(%RBP),%RAX |
0x444a64 INC %RAX |
0x444a67 MOV -0xf8(%RBP),%RDI |
0x444a6e CMP %RDI,%RAX |
0x444a71 MOV %RAX,-0xb8(%RBP) |
0x444a78 JE 444a86 |
0x444a7a MOV -0xe8(%RBP),%RDI |
0x444a81 TEST %RDI,%RDI |
0x444a84 JE 444ab1 |
0x444a86 MOV $0x8,%ESI |
0x444a8b MOV %RDI,%R14 |
0x444a8e CALL 4e72c0 <hypre_CAlloc> |
0x444a93 MOV %RAX,%R15 |
0x444a96 MOV %R14,%RDX |
0x444a99 TEST %R14,%R14 |
0x444a9c JLE 444ab1 |
0x444a9e SAL $0x3,%RDX |
0x444aa2 MOV %R15,%RDI |
0x444aa5 MOV $0xff,%ESI |
0x444aaa CALL 4f03c0 <_intel_fast_memset> |
0x444aaf JMP 444ab1 |
0x444ab1 MOV -0x70(%RBP),%RDX |
0x444ab5 MOV -0xd8(%RBP),%RCX |
0x444abc LEA (%RCX,%RDX,1),%RAX |
0x444ac0 MOV -0xb0(%RBP),%RSI |
0x444ac7 ADD %RSI,%RCX |
0x444aca MOV %RCX,-0xc8(%RBP) |
0x444ad1 CMP %RSI,%RDX |
0x444ad4 MOV %RAX,-0x80(%RBP) |
0x444ad8 JGE 444fe2 |
0x444ade LEA -0x1(%R12),%R10 |
0x444ae3 XOR %ECX,%ECX |
0x444ae5 MOV %RAX,%RSI |
0x444ae8 XOR %EAX,%EAX |
0x444aea MOV %R12,-0x50(%RBP) |
0x444aee MOV %R10,-0x38(%RBP) |
0x444af2 JMP 444b17 |
0x444af4 NOPW %CS:(%RAX,%RAX,1) |
(999) 0x444b00 MOV -0xd0(%RBP),%RSI |
(999) 0x444b07 INC %RSI |
(999) 0x444b0a CMP -0xc8(%RBP),%RSI |
(999) 0x444b11 JGE 444fe6 |
(999) 0x444b17 MOV -0x88(%RBP),%RDX |
(999) 0x444b1e MOV %RSI,-0xd0(%RBP) |
(999) 0x444b25 MOV (%RDX,%RSI,8),%RDI |
(999) 0x444b29 MOV -0x90(%RBP),%RDX |
(999) 0x444b30 MOV %RAX,(%RDX,%RDI,8) |
(999) 0x444b34 MOV -0x98(%RBP),%RDX |
(999) 0x444b3b MOV %RCX,(%RDX,%RDI,8) |
(999) 0x444b3f MOV -0xa8(%RBP),%RDX |
(999) 0x444b46 MOV (%RDX,%RDI,8),%R8 |
(999) 0x444b4a JMP 444b5e |
0x444b4c NOPL (%RAX) |
(1002) 0x444b50 MOV -0x38(%RBP),%R10 |
(1002) 0x444b54 INC %R8 |
(1002) 0x444b57 MOV -0xa8(%RBP),%RDX |
(1002) 0x444b5e CMP 0x8(%RDX,%RDI,8),%R8 |
(1002) 0x444b63 JGE 444e30 |
(1002) 0x444b69 MOV -0x128(%RBP),%RDX |
(1002) 0x444b70 MOV (%RDX,%R8,8),%R9 |
(1002) 0x444b74 MOV -0x118(%RBP),%RDX |
(1002) 0x444b7b CMP %R10,(%RDX,%R9,8) |
(1002) 0x444b7f JNE 444b54 |
(1002) 0x444b81 MOV -0x58(%RBP),%RDX |
(1002) 0x444b85 MOV 0x8(%RDX,%R9,8),%RSI |
(1002) 0x444b8a TEST %RSI,%RSI |
(1002) 0x444b8d JLE 444c10 |
(1002) 0x444b93 MOV -0x90(%RBP),%RDX |
(1002) 0x444b9a MOV (%RDX,%R9,8),%R10 |
(1002) 0x444b9e ADD %R10,%RSI |
(1002) 0x444ba1 MOV -0x40(%RBP),%RDX |
(1002) 0x444ba5 MOV -0x8(%RDX,%R12,8),%R11 |
(1002) 0x444baa LEA 0x1(%R10),%RDX |
(1002) 0x444bae CMP %RDX,%RSI |
(1002) 0x444bb1 CMOVLE %RDX,%RSI |
(1002) 0x444bb5 MOV %RSI,%RDX |
(1002) 0x444bb8 SUB %R10,%RDX |
(1002) 0x444bbb CMP $0x4,%RDX |
(1002) 0x444bbf MOV %RDX,-0x30(%RBP) |
(1002) 0x444bc3 JAE 444ca8 |
(1002) 0x444bc9 MOV -0x30(%RBP),%R14 |
(1002) 0x444bcd MOV %R14,%RDX |
(1002) 0x444bd0 AND $-0x4,%RDX |
(1002) 0x444bd4 CMP %R14,%RDX |
(1002) 0x444bd7 JAE 444c10 |
(1002) 0x444bd9 ADD %RDX,%R10 |
(1002) 0x444bdc JMP 444be8 |
0x444bde XCHG %AX,%AX |
(1005) 0x444be0 INC %R10 |
(1005) 0x444be3 CMP %R10,%RSI |
(1005) 0x444be6 JE 444c10 |
(1005) 0x444be8 MOV (%R11,%R10,8),%RDX |
(1005) 0x444bec CMP %RDI,(%RBX,%RDX,8) |
(1005) 0x444bf0 JE 444be0 |
(1005) 0x444bf2 INC %RAX |
(1005) 0x444bf5 MOV -0x58(%RBP),%R14 |
(1005) 0x444bf9 INCQ 0x8(%R14,%RDI,8) |
(1005) 0x444bfe MOV %RDI,(%RBX,%RDX,8) |
(1005) 0x444c02 JMP 444be0 |
0x444c04 NOPW %CS:(%RAX,%RAX,1) |
(1002) 0x444c10 MOV -0x60(%RBP),%RDX |
(1002) 0x444c14 MOV 0x8(%RDX,%R9,8),%RSI |
(1002) 0x444c19 TEST %RSI,%RSI |
(1002) 0x444c1c JLE 444b50 |
(1002) 0x444c22 MOV -0x98(%RBP),%RDX |
(1002) 0x444c29 MOV (%RDX,%R9,8),%R9 |
(1002) 0x444c2d ADD %R9,%RSI |
(1002) 0x444c30 MOV -0x48(%RBP),%RDX |
(1002) 0x444c34 MOV -0x8(%RDX,%R12,8),%R10 |
(1002) 0x444c39 LEA 0x1(%R9),%RDX |
(1002) 0x444c3d CMP %RDX,%RSI |
(1002) 0x444c40 CMOVLE %RDX,%RSI |
(1002) 0x444c44 MOV %RSI,%R11 |
(1002) 0x444c47 SUB %R9,%R11 |
(1002) 0x444c4a CMP $0x4,%R11 |
(1002) 0x444c4e MOV %R11,-0x30(%RBP) |
(1002) 0x444c52 JAE 444d67 |
(1002) 0x444c58 MOV -0x30(%RBP),%RDX |
(1002) 0x444c5c MOV %RDX,%R11 |
(1002) 0x444c5f AND $-0x4,%R11 |
(1002) 0x444c63 CMP %RDX,%R11 |
(1002) 0x444c66 JAE 444b50 |
(1002) 0x444c6c ADD %R11,%R9 |
(1002) 0x444c6f JMP 444c8c |
0x444c71 NOPW %CS:(%RAX,%RAX,1) |
(1003) 0x444c80 INC %R9 |
(1003) 0x444c83 CMP %R9,%RSI |
(1003) 0x444c86 JE 444b50 |
(1003) 0x444c8c MOV (%R10,%R9,8),%RDX |
(1003) 0x444c90 CMP %RDI,(%R15,%RDX,8) |
(1003) 0x444c94 JE 444c80 |
(1003) 0x444c96 INC %RCX |
(1003) 0x444c99 MOV -0x60(%RBP),%R11 |
(1003) 0x444c9d INCQ 0x8(%R11,%RDI,8) |
(1003) 0x444ca2 MOV %RDI,(%R15,%RDX,8) |
(1003) 0x444ca6 JMP 444c80 |
(1002) 0x444ca8 MOV %RDX,%R14 |
(1002) 0x444cab SHR $0x2,%R14 |
(1002) 0x444caf LEA 0x18(%R11,%R10,8),%R13 |
(1002) 0x444cb4 JMP 444cd1 |
0x444cb6 NOPW %CS:(%RAX,%RAX,1) |
(1006) 0x444cc0 MOV -0x50(%RBP),%R12 |
(1006) 0x444cc4 ADD $0x20,%R13 |
(1006) 0x444cc8 DEC %R14 |
(1006) 0x444ccb JE 444bc9 |
(1006) 0x444cd1 MOV -0x18(%R13),%RDX |
(1006) 0x444cd5 CMP %RDI,(%RBX,%RDX,8) |
(1006) 0x444cd9 JNE 444d00 |
(1006) 0x444cdb MOV -0x10(%R13),%RDX |
(1006) 0x444cdf CMP %RDI,(%RBX,%RDX,8) |
(1006) 0x444ce3 JNE 444d1a |
(1006) 0x444ce5 MOV -0x8(%R13),%RDX |
(1006) 0x444ce9 CMP %RDI,(%RBX,%RDX,8) |
(1006) 0x444ced JNE 444d34 |
(1006) 0x444cef MOV (%R13),%RDX |
(1006) 0x444cf3 CMP %RDI,(%RBX,%RDX,8) |
(1006) 0x444cf7 JE 444cc0 |
(1006) 0x444cf9 JMP 444d52 |
0x444cfb NOPL (%RAX,%RAX,1) |
(1006) 0x444d00 INC %RAX |
(1006) 0x444d03 MOV -0x58(%RBP),%R12 |
(1006) 0x444d07 INCQ 0x8(%R12,%RDI,8) |
(1006) 0x444d0c MOV %RDI,(%RBX,%RDX,8) |
(1006) 0x444d10 MOV -0x10(%R13),%RDX |
(1006) 0x444d14 CMP %RDI,(%RBX,%RDX,8) |
(1006) 0x444d18 JE 444ce5 |
(1006) 0x444d1a INC %RAX |
(1006) 0x444d1d MOV -0x58(%RBP),%R12 |
(1006) 0x444d21 INCQ 0x8(%R12,%RDI,8) |
(1006) 0x444d26 MOV %RDI,(%RBX,%RDX,8) |
(1006) 0x444d2a MOV -0x8(%R13),%RDX |
(1006) 0x444d2e CMP %RDI,(%RBX,%RDX,8) |
(1006) 0x444d32 JE 444cef |
(1006) 0x444d34 INC %RAX |
(1006) 0x444d37 MOV -0x58(%RBP),%R12 |
(1006) 0x444d3b INCQ 0x8(%R12,%RDI,8) |
(1006) 0x444d40 MOV %RDI,(%RBX,%RDX,8) |
(1006) 0x444d44 MOV (%R13),%RDX |
(1006) 0x444d48 CMP %RDI,(%RBX,%RDX,8) |
(1006) 0x444d4c JE 444cc0 |
(1006) 0x444d52 INC %RAX |
(1006) 0x444d55 MOV -0x58(%RBP),%R12 |
(1006) 0x444d59 INCQ 0x8(%R12,%RDI,8) |
(1006) 0x444d5e MOV %RDI,(%RBX,%RDX,8) |
(1006) 0x444d62 JMP 444cc0 |
(1002) 0x444d67 SHR $0x2,%R11 |
(1002) 0x444d6b LEA 0x18(%R10,%R9,8),%R14 |
(1002) 0x444d70 JMP 444d8d |
0x444d72 NOPW %CS:(%RAX,%RAX,1) |
(1004) 0x444d80 ADD $0x20,%R14 |
(1004) 0x444d84 DEC %R11 |
(1004) 0x444d87 JE 444c58 |
(1004) 0x444d8d MOV -0x18(%R14),%R13 |
(1004) 0x444d91 CMP %RDI,(%R15,%R13,8) |
(1004) 0x444d95 JNE 444dc0 |
(1004) 0x444d97 MOV -0x10(%R14),%R13 |
(1004) 0x444d9b CMP %RDI,(%R15,%R13,8) |
(1004) 0x444d9f JNE 444dda |
(1004) 0x444da1 MOV -0x8(%R14),%R13 |
(1004) 0x444da5 CMP %RDI,(%R15,%R13,8) |
(1004) 0x444da9 JNE 444df4 |
(1004) 0x444dab MOV (%R14),%R13 |
(1004) 0x444dae CMP %RDI,(%R15,%R13,8) |
(1004) 0x444db2 JE 444d80 |
(1004) 0x444db4 JMP 444e11 |
0x444db6 NOPW %CS:(%RAX,%RAX,1) |
(1004) 0x444dc0 INC %RCX |
(1004) 0x444dc3 MOV -0x60(%RBP),%RDX |
(1004) 0x444dc7 INCQ 0x8(%RDX,%RDI,8) |
(1004) 0x444dcc MOV %RDI,(%R15,%R13,8) |
(1004) 0x444dd0 MOV -0x10(%R14),%R13 |
(1004) 0x444dd4 CMP %RDI,(%R15,%R13,8) |
(1004) 0x444dd8 JE 444da1 |
(1004) 0x444dda INC %RCX |
(1004) 0x444ddd MOV -0x60(%RBP),%RDX |
(1004) 0x444de1 INCQ 0x8(%RDX,%RDI,8) |
(1004) 0x444de6 MOV %RDI,(%R15,%R13,8) |
(1004) 0x444dea MOV -0x8(%R14),%R13 |
(1004) 0x444dee CMP %RDI,(%R15,%R13,8) |
(1004) 0x444df2 JE 444dab |
(1004) 0x444df4 INC %RCX |
(1004) 0x444df7 MOV -0x60(%RBP),%RDX |
(1004) 0x444dfb INCQ 0x8(%RDX,%RDI,8) |
(1004) 0x444e00 MOV %RDI,(%R15,%R13,8) |
(1004) 0x444e04 MOV (%R14),%R13 |
(1004) 0x444e07 CMP %RDI,(%R15,%R13,8) |
(1004) 0x444e0b JE 444d80 |
(1004) 0x444e11 INC %RCX |
(1004) 0x444e14 MOV -0x60(%RBP),%RDX |
(1004) 0x444e18 INCQ 0x8(%RDX,%RDI,8) |
(1004) 0x444e1d MOV %RDI,(%R15,%R13,8) |
(1004) 0x444e21 JMP 444d80 |
0x444e26 NOPW %CS:(%RAX,%RAX,1) |
(999) 0x444e30 MOV -0xa0(%RBP),%RDX |
(999) 0x444e37 MOV (%RDX,%RDI,8),%R8 |
(999) 0x444e3b MOV 0x8(%RDX,%RDI,8),%RDX |
(999) 0x444e40 CMP %RDX,%R8 |
(999) 0x444e43 JL 444e5c |
(999) 0x444e45 JMP 444b00 |
0x444e4a NOPW (%RAX,%RAX,1) |
(1000) 0x444e50 INC %R8 |
(1000) 0x444e53 CMP %RDX,%R8 |
(1000) 0x444e56 JGE 444b00 |
(1000) 0x444e5c MOV -0x130(%RBP),%RSI |
(1000) 0x444e63 MOV (%RSI,%R8,8),%R9 |
(1000) 0x444e67 MOV -0x120(%RBP),%RSI |
(1000) 0x444e6e CMP %R10,(%RSI,%R9,8) |
(1000) 0x444e72 JNE 444e50 |
(1000) 0x444e74 MOV -0x110(%RBP),%RSI |
(1000) 0x444e7b MOV 0x8(%RSI,%R9,8),%RSI |
(1000) 0x444e80 TEST %RSI,%RSI |
(1000) 0x444e83 JLE 444e50 |
(1000) 0x444e85 MOV -0x100(%RBP),%RDX |
(1000) 0x444e8c MOV (%RDX,%R9,8),%R9 |
(1000) 0x444e90 ADD %R9,%RSI |
(1000) 0x444e93 MOV -0x108(%RBP),%RDX |
(1000) 0x444e9a MOV (%RDX,%R12,8),%R13 |
(1000) 0x444e9e LEA 0x1(%R9),%R10 |
(1000) 0x444ea2 CMP %R10,%RSI |
(1000) 0x444ea5 CMOVLE %R10,%RSI |
(1000) 0x444ea9 MOV %RSI,%R11 |
(1000) 0x444eac SUB %R9,%R11 |
(1000) 0x444eaf CMP %R10,%RSI |
(1000) 0x444eb2 MOV %R11,-0x30(%RBP) |
(1000) 0x444eb6 JNE 444ef3 |
(1000) 0x444eb8 XOR %ESI,%ESI |
(1000) 0x444eba TESTB $0x1,-0x30(%RBP) |
(1000) 0x444ebe MOV -0x38(%RBP),%R10 |
(1000) 0x444ec2 JE 444fc5 |
(1000) 0x444ec8 ADD %RSI,%R9 |
(1000) 0x444ecb MOV (%R13,%R9,8),%RDX |
(1000) 0x444ed0 TEST %RDX,%RDX |
(1000) 0x444ed3 JS 444fa9 |
(1000) 0x444ed9 CMP %RDI,(%R15,%RDX,8) |
(1000) 0x444edd JE 444fc5 |
(1000) 0x444ee3 LEA (%R15,%RDX,8),%RDX |
(1000) 0x444ee7 INC %RCX |
(1000) 0x444eea MOV -0x60(%RBP),%RSI |
(1000) 0x444eee JMP 444fbd |
(1000) 0x444ef3 AND $-0x2,%R11 |
(1000) 0x444ef7 LEA 0x8(%R13,%R9,8),%R10 |
(1000) 0x444efc XOR %ESI,%ESI |
(1000) 0x444efe MOV %R13,%RDX |
(1000) 0x444f01 JMP 444f24 |
0x444f03 NOPW %CS:(%RAX,%RAX,1) |
(1001) 0x444f10 INCQ 0x8(%R13,%RDI,8) |
(1001) 0x444f15 MOV %RDI,(%R14) |
(1001) 0x444f18 MOV %RDX,%R13 |
(1001) 0x444f1b ADD $0x2,%RSI |
(1001) 0x444f1f CMP %RSI,%R11 |
(1001) 0x444f22 JE 444eba |
(1001) 0x444f24 MOV -0x8(%R10,%RSI,8),%R14 |
(1001) 0x444f29 TEST %R14,%R14 |
(1001) 0x444f2c JS 444f50 |
(1001) 0x444f2e CMP %RDI,(%R15,%R14,8) |
(1001) 0x444f32 JE 444f6f |
(1001) 0x444f34 LEA (%R15,%R14,8),%R14 |
(1001) 0x444f38 INC %RCX |
(1001) 0x444f3b MOV -0x60(%RBP),%R13 |
(1001) 0x444f3f JMP 444f64 |
0x444f41 NOPW %CS:(%RAX,%RAX,1) |
(1001) 0x444f50 NOT %R14 |
(1001) 0x444f53 CMP %RDI,(%RBX,%R14,8) |
(1001) 0x444f57 JE 444f6f |
(1001) 0x444f59 LEA (%RBX,%R14,8),%R14 |
(1001) 0x444f5d INC %RAX |
(1001) 0x444f60 MOV -0x58(%RBP),%R13 |
(1001) 0x444f64 INCQ 0x8(%R13,%RDI,8) |
(1001) 0x444f69 MOV %RDI,(%R14) |
(1001) 0x444f6c MOV %RDX,%R13 |
(1001) 0x444f6f MOV (%R10,%RSI,8),%R14 |
(1001) 0x444f73 TEST %R14,%R14 |
(1001) 0x444f76 JS 444f90 |
(1001) 0x444f78 CMP %RDI,(%R15,%R14,8) |
(1001) 0x444f7c JE 444f1b |
(1001) 0x444f7e LEA (%R15,%R14,8),%R14 |
(1001) 0x444f82 INC %RCX |
(1001) 0x444f85 MOV -0x60(%RBP),%R13 |
(1001) 0x444f89 JMP 444f10 |
0x444f8b NOPL (%RAX,%RAX,1) |
(1001) 0x444f90 NOT %R14 |
(1001) 0x444f93 CMP %RDI,(%RBX,%R14,8) |
(1001) 0x444f97 JE 444f1b |
(1001) 0x444f99 LEA (%RBX,%R14,8),%R14 |
(1001) 0x444f9d INC %RAX |
(1001) 0x444fa0 MOV -0x58(%RBP),%R13 |
(1001) 0x444fa4 JMP 444f10 |
(1000) 0x444fa9 NOT %RDX |
(1000) 0x444fac CMP %RDI,(%RBX,%RDX,8) |
(1000) 0x444fb0 JE 444fc5 |
(1000) 0x444fb2 LEA (%RBX,%RDX,8),%RDX |
(1000) 0x444fb6 INC %RAX |
(1000) 0x444fb9 MOV -0x58(%RBP),%RSI |
(1000) 0x444fbd INCQ 0x8(%RSI,%RDI,8) |
(1000) 0x444fc2 MOV %RDI,(%RDX) |
(1000) 0x444fc5 MOV -0xa0(%RBP),%RDX |
(1000) 0x444fcc MOV 0x8(%RDX,%RDI,8),%RDX |
(1000) 0x444fd1 INC %R8 |
(1000) 0x444fd4 CMP %RDX,%R8 |
(1000) 0x444fd7 JL 444e5c |
(999) 0x444fdd JMP 444b00 |
0x444fe2 XOR %EAX,%EAX |
0x444fe4 XOR %ECX,%ECX |
0x444fe6 MOV -0x68(%RBP),%R13 |
0x444fea TEST %R13,%R13 |
0x444fed JNE 445000 |
0x444fef MOV -0xe0(%RBP),%RDX |
0x444ff6 MOV -0x140(%RBP),%RSI |
0x444ffd MOV %RSI,(%RDX) |
0x445000 MOV -0x78(%RBP),%RDX |
0x445004 MOV %RCX,(%RDX,%R13,8) |
0x445008 MOV -0xf0(%RBP),%R14 |
0x44500f MOV %RAX,(%R14,%R13,8) |
0x445013 MOV -0xc0(%RBP),%RAX |
0x44501a MOV (%RAX),%ESI |
0x44501c MOV $0x533870,%EDI |
0x445021 CALL 410560 <__kmpc_barrier@plt> |
0x445026 MOV -0x78(%RBP),%RDI |
0x44502a TEST %R13,%R13 |
0x44502d MOV -0xe0(%RBP),%R13 |
0x445034 JNE 44507d |
0x445036 CMPQ $0x2,(%R13) |
0x44503b JL 44507d |
0x44503d MOV $0x1,%EAX |
0x445042 NOPW %CS:(%RAX,%RAX,1) |
(998) 0x445050 MOV -0x8(%RDI,%RAX,8),%RCX |
(998) 0x445055 LEA (%RDI,%RAX,8),%RDX |
(998) 0x445059 MOV (%RDX),%RSI |
(998) 0x44505c ADD %RCX,%RSI |
(998) 0x44505f MOV %RSI,(%RDX) |
(998) 0x445062 MOV -0x8(%R14,%RAX,8),%RCX |
(998) 0x445067 LEA (%R14,%RAX,8),%RDX |
(998) 0x44506b MOV (%RDX),%RSI |
(998) 0x44506e ADD %RCX,%RSI |
(998) 0x445071 MOV %RSI,(%RDX) |
(998) 0x445074 INC %RAX |
(998) 0x445077 CMP (%R13),%RAX |
(998) 0x44507b JL 445050 |
0x44507d MOV -0xc0(%RBP),%RAX |
0x445084 MOV (%RAX),%ESI |
0x445086 MOV $0x533890,%EDI |
0x44508b CALL 410560 <__kmpc_barrier@plt> |
0x445090 CMPQ $0,-0x68(%RBP) |
0x445095 JLE 445226 |
0x44509b MOV -0xb0(%RBP),%RAX |
0x4450a2 CMP %RAX,-0x70(%RBP) |
0x4450a6 MOV -0x98(%RBP),%R11 |
0x4450ad MOV %R14,%R10 |
0x4450b0 MOV -0x90(%RBP),%R14 |
0x4450b7 MOV -0x78(%RBP),%RSI |
0x4450bb MOV -0x68(%RBP),%R13 |
0x4450bf JGE 445291 |
0x4450c5 MOV -0x80(%RBP),%RDX |
0x4450c9 LEA 0x1(%RDX),%RAX |
0x4450cd MOV -0xc8(%RBP),%RCX |
0x4450d4 CMP %RCX,%RAX |
0x4450d7 CMOVLE %RCX,%RAX |
0x4450db MOV %RAX,-0x50(%RBP) |
0x4450df SUB %RDX,%RAX |
0x4450e2 MOV %RAX,-0x38(%RBP) |
0x4450e6 CMP $0x4,%RAX |
0x4450ea MOV %RSI,%RAX |
0x4450ed JB 4451c2 |
0x4450f3 MOV -0x38(%RBP),%RDX |
0x4450f7 SHR $0x2,%RDX |
0x4450fb MOV -0x88(%RBP),%RSI |
0x445102 MOV -0x80(%RBP),%RDI |
0x445106 LEA 0x18(%RSI,%RDI,8),%RSI |
0x44510b NOPL (%RAX,%RAX,1) |
(997) 0x445110 MOV -0x18(%RSI),%RDI |
(997) 0x445114 MOV -0x8(%R10,%R13,8),%R8 |
(997) 0x445119 LEA (%R14,%RDI,8),%R9 |
(997) 0x44511d MOV %R10,%RCX |
(997) 0x445120 MOV (%R9),%R10 |
(997) 0x445123 ADD %R8,%R10 |
(997) 0x445126 MOV %R10,(%R9) |
(997) 0x445129 MOV -0x8(%RAX,%R13,8),%R8 |
(997) 0x44512e LEA (%R11,%RDI,8),%RDI |
(997) 0x445132 MOV (%RDI),%R9 |
(997) 0x445135 ADD %R8,%R9 |
(997) 0x445138 MOV %R9,(%RDI) |
(997) 0x44513b MOV -0x10(%RSI),%RDI |
(997) 0x44513f MOV -0x8(%RCX,%R13,8),%R8 |
(997) 0x445144 LEA (%R14,%RDI,8),%R9 |
(997) 0x445148 MOV (%R9),%R10 |
(997) 0x44514b ADD %R8,%R10 |
(997) 0x44514e MOV %R10,(%R9) |
(997) 0x445151 MOV -0x8(%RAX,%R13,8),%R8 |
(997) 0x445156 LEA (%R11,%RDI,8),%RDI |
(997) 0x44515a MOV (%RDI),%R9 |
(997) 0x44515d ADD %R8,%R9 |
(997) 0x445160 MOV %R9,(%RDI) |
(997) 0x445163 MOV -0x8(%RSI),%RDI |
(997) 0x445167 MOV -0x8(%RCX,%R13,8),%R8 |
(997) 0x44516c LEA (%R14,%RDI,8),%R9 |
(997) 0x445170 MOV (%R9),%R10 |
(997) 0x445173 ADD %R8,%R10 |
(997) 0x445176 MOV %R10,(%R9) |
(997) 0x445179 MOV -0x8(%RAX,%R13,8),%R8 |
(997) 0x44517e LEA (%R11,%RDI,8),%RDI |
(997) 0x445182 MOV (%RDI),%R9 |
(997) 0x445185 ADD %R8,%R9 |
(997) 0x445188 MOV %R9,(%RDI) |
(997) 0x44518b MOV (%RSI),%RDI |
(997) 0x44518e MOV -0x8(%RCX,%R13,8),%R8 |
(997) 0x445193 LEA (%R14,%RDI,8),%R9 |
(997) 0x445197 MOV (%R9),%R10 |
(997) 0x44519a ADD %R8,%R10 |
(997) 0x44519d MOV %R10,(%R9) |
(997) 0x4451a0 MOV %RCX,%R10 |
(997) 0x4451a3 MOV -0x8(%RAX,%R13,8),%R8 |
(997) 0x4451a8 LEA (%R11,%RDI,8),%RDI |
(997) 0x4451ac MOV (%RDI),%R9 |
(997) 0x4451af ADD %R8,%R9 |
(997) 0x4451b2 MOV %R9,(%RDI) |
(997) 0x4451b5 ADD $0x20,%RSI |
(997) 0x4451b9 DEC %RDX |
(997) 0x4451bc JNE 445110 |
0x4451c2 MOV -0x38(%RBP),%RCX |
0x4451c6 MOV %RCX,%RDX |
0x4451c9 AND $-0x4,%RDX |
0x4451cd CMP %RCX,%RDX |
0x4451d0 MOV -0x88(%RBP),%R8 |
0x4451d7 MOV -0xd8(%RBP),%R9 |
0x4451de JAE 445291 |
0x4451e4 ADD -0x70(%RBP),%R9 |
0x4451e8 ADD %RDX,%R9 |
0x4451eb NOPL (%RAX,%RAX,1) |
(996) 0x4451f0 MOV (%R8,%R9,8),%RCX |
(996) 0x4451f4 MOV -0x8(%R10,%R13,8),%RDX |
(996) 0x4451f9 LEA (%R14,%RCX,8),%RSI |
(996) 0x4451fd MOV (%RSI),%RDI |
(996) 0x445200 ADD %RDX,%RDI |
(996) 0x445203 MOV %RDI,(%RSI) |
(996) 0x445206 MOV -0x8(%RAX,%R13,8),%RDX |
(996) 0x44520b LEA (%R11,%RCX,8),%RCX |
(996) 0x44520f MOV (%RCX),%RSI |
(996) 0x445212 ADD %RDX,%RSI |
(996) 0x445215 MOV %RSI,(%RCX) |
(996) 0x445218 MOV -0x50(%RBP),%RCX |
(996) 0x44521c INC %R9 |
(996) 0x44521f CMP %R9,%RCX |
(996) 0x445222 JNE 4451f0 |
0x445224 JMP 445291 |
0x445226 MOV (%R13),%RAX |
0x44522a MOV -0x8(%R14,%RAX,8),%RDI |
0x44522f MOV -0x78(%RBP),%RCX |
0x445233 MOV -0x8(%RCX,%RAX,8),%R14 |
0x445238 MOV -0x148(%RBP),%RAX |
0x44523f ADD %RDI,(%RAX) |
0x445242 MOV -0x150(%RBP),%RAX |
0x445249 ADD %R14,(%RAX) |
0x44524c MOV $0x8,%ESI |
0x445251 CALL 4e72c0 <hypre_CAlloc> |
0x445256 MOV -0x40(%RBP),%RCX |
0x44525a MOV %RAX,(%RCX,%R12,8) |
0x44525e TEST %R14,%R14 |
0x445261 JE 445272 |
0x445263 MOV $0x8,%ESI |
0x445268 MOV %R14,%RDI |
0x44526b CALL 4e72c0 <hypre_CAlloc> |
0x445270 JMP 445285 |
0x445272 MOV -0x138(%RBP),%RAX |
0x445279 CMPQ $0x2,(%RAX) |
0x44527d MOV -0x68(%RBP),%R13 |
0x445281 JL 445291 |
0x445283 XOR %EAX,%EAX |
0x445285 MOV -0x48(%RBP),%RCX |
0x445289 MOV %RAX,(%RCX,%R12,8) |
0x44528d MOV -0x68(%RBP),%R13 |
0x445291 MOV -0xc0(%RBP),%RAX |
0x445298 MOV (%RAX),%ESI |
0x44529a MOV $0x5338b0,%EDI |
0x44529f CALL 410560 <__kmpc_barrier@plt> |
0x4452a4 TEST %R13,%R13 |
0x4452a7 JLE 4452d4 |
0x4452a9 MOV -0xf0(%RBP),%RAX |
0x4452b0 MOV -0x8(%RAX,%R13,8),%RAX |
0x4452b5 MOV -0x78(%RBP),%RCX |
0x4452b9 MOV -0x8(%RCX,%R13,8),%RCX |
0x4452be MOV -0x70(%RBP),%RDX |
0x4452c2 CMP -0xb0(%RBP),%RDX |
0x4452c9 MOV -0x80(%RBP),%RSI |
0x4452cd JL 4452ed |
0x4452cf JMP 445811 |
0x4452d4 XOR %EAX,%EAX |
0x4452d6 XOR %ECX,%ECX |
0x4452d8 MOV -0x70(%RBP),%RDX |
0x4452dc CMP -0xb0(%RBP),%RDX |
0x4452e3 MOV -0x80(%RBP),%RSI |
0x4452e7 JGE 445811 |
0x4452ed LEA -0x1(%R12),%R10 |
0x4452f2 MOV %R10,-0x38(%RBP) |
0x4452f6 JMP 445314 |
0x4452f8 NOPL (%RAX,%RAX,1) |
(988) 0x445300 MOV -0x80(%RBP),%RSI |
(988) 0x445304 INC %RSI |
(988) 0x445307 CMP -0xc8(%RBP),%RSI |
(988) 0x44530e JGE 445811 |
(988) 0x445314 MOV -0x88(%RBP),%RDX |
(988) 0x44531b MOV %RSI,-0x80(%RBP) |
(988) 0x44531f MOV (%RDX,%RSI,8),%RSI |
(988) 0x445323 MOV -0xa8(%RBP),%RDX |
(988) 0x44532a MOV (%RDX,%RSI,8),%R8 |
(988) 0x44532e MOV %RSI,%RDI |
(988) 0x445331 NOT %RDI |
(988) 0x445334 MOV %RSI,-0x50(%RBP) |
(988) 0x445338 JMP 445352 |
0x44533a NOPW (%RAX,%RAX,1) |
(991) 0x445340 MOV -0x38(%RBP),%R10 |
(991) 0x445344 INC %R8 |
(991) 0x445347 MOV -0xa8(%RBP),%RDX |
(991) 0x44534e MOV -0x50(%RBP),%RSI |
(991) 0x445352 CMP 0x8(%RDX,%RSI,8),%R8 |
(991) 0x445357 JGE 445640 |
(991) 0x44535d MOV -0x128(%RBP),%RDX |
(991) 0x445364 MOV (%RDX,%R8,8),%R14 |
(991) 0x445368 MOV -0x118(%RBP),%RDX |
(991) 0x44536f CMP %R10,(%RDX,%R14,8) |
(991) 0x445373 JNE 445344 |
(991) 0x445375 MOV -0x58(%RBP),%RDX |
(991) 0x445379 MOV 0x8(%RDX,%R14,8),%R10 |
(991) 0x44537e TEST %R10,%R10 |
(991) 0x445381 JLE 4454d7 |
(991) 0x445387 MOV -0x90(%RBP),%RDX |
(991) 0x44538e MOV %R14,-0x30(%RBP) |
(991) 0x445392 MOV (%RDX,%R14,8),%R11 |
(991) 0x445396 ADD %R11,%R10 |
(991) 0x445399 MOV -0x40(%RBP),%RDX |
(991) 0x44539d MOV -0x8(%RDX,%R12,8),%RSI |
(991) 0x4453a2 LEA 0x1(%R11),%RDX |
(991) 0x4453a6 CMP %RDX,%R10 |
(991) 0x4453a9 CMOVLE %RDX,%R10 |
(991) 0x4453ad MOV %R10,%RDX |
(991) 0x4453b0 SUB %R11,%RDX |
(991) 0x4453b3 CMP $0x4,%RDX |
(991) 0x4453b7 MOV %RDX,-0xd0(%RBP) |
(991) 0x4453be JAE 44540b |
(991) 0x4453c0 MOV -0xd0(%RBP),%R9 |
(991) 0x4453c7 MOV %R9,%RDX |
(991) 0x4453ca AND $-0x4,%RDX |
(991) 0x4453ce CMP %R9,%RDX |
(991) 0x4453d1 JAE 4454d3 |
(991) 0x4453d7 ADD %RDX,%R11 |
(991) 0x4453da MOV -0x30(%RBP),%R14 |
(991) 0x4453de JMP 4453ec |
(994) 0x4453e0 INC %R11 |
(994) 0x4453e3 CMP %R11,%R10 |
(994) 0x4453e6 JE 4454d7 |
(994) 0x4453ec MOV (%RSI,%R11,8),%RDX |
(994) 0x4453f0 CMP %RDI,(%RBX,%RDX,8) |
(994) 0x4453f4 JE 4453e0 |
(994) 0x4453f6 MOV -0x40(%RBP),%R9 |
(994) 0x4453fa MOV (%R9,%R12,8),%R9 |
(994) 0x4453fe MOV %RDX,(%R9,%RAX,8) |
(994) 0x445402 INC %RAX |
(994) 0x445405 MOV %RDI,(%RBX,%RDX,8) |
(994) 0x445409 JMP 4453e0 |
(991) 0x44540b SHR $0x2,%RDX |
(991) 0x44540f LEA 0x18(%RSI,%R11,8),%R13 |
(991) 0x445414 JMP 445429 |
0x445416 NOPW %CS:(%RAX,%RAX,1) |
(995) 0x445420 ADD $0x20,%R13 |
(995) 0x445424 DEC %RDX |
(995) 0x445427 JE 4453c0 |
(995) 0x445429 MOV -0x18(%R13),%R14 |
(995) 0x44542d CMP %RDI,(%RBX,%R14,8) |
(995) 0x445431 JNE 445460 |
(995) 0x445433 MOV -0x10(%R13),%R14 |
(995) 0x445437 CMP %RDI,(%RBX,%R14,8) |
(995) 0x44543b JNE 44547d |
(995) 0x44543d MOV -0x8(%R13),%R14 |
(995) 0x445441 CMP %RDI,(%RBX,%R14,8) |
(995) 0x445445 JNE 44549a |
(995) 0x445447 MOV (%R13),%R14 |
(995) 0x44544b CMP %RDI,(%RBX,%R14,8) |
(995) 0x44544f JE 445420 |
(995) 0x445451 JMP 4454bb |
0x445453 NOPW %CS:(%RAX,%RAX,1) |
(995) 0x445460 MOV -0x40(%RBP),%R9 |
(995) 0x445464 MOV (%R9,%R12,8),%R9 |
(995) 0x445468 MOV %R14,(%R9,%RAX,8) |
(995) 0x44546c INC %RAX |
(995) 0x44546f MOV %RDI,(%RBX,%R14,8) |
(995) 0x445473 MOV -0x10(%R13),%R14 |
(995) 0x445477 CMP %RDI,(%RBX,%R14,8) |
(995) 0x44547b JE 44543d |
(995) 0x44547d MOV -0x40(%RBP),%R9 |
(995) 0x445481 MOV (%R9,%R12,8),%R9 |
(995) 0x445485 MOV %R14,(%R9,%RAX,8) |
(995) 0x445489 INC %RAX |
(995) 0x44548c MOV %RDI,(%RBX,%R14,8) |
(995) 0x445490 MOV -0x8(%R13),%R14 |
(995) 0x445494 CMP %RDI,(%RBX,%R14,8) |
(995) 0x445498 JE 445447 |
(995) 0x44549a MOV -0x40(%RBP),%R9 |
(995) 0x44549e MOV (%R9,%R12,8),%R9 |
(995) 0x4454a2 MOV %R14,(%R9,%RAX,8) |
(995) 0x4454a6 INC %RAX |
(995) 0x4454a9 MOV %RDI,(%RBX,%R14,8) |
(995) 0x4454ad MOV (%R13),%R14 |
(995) 0x4454b1 CMP %RDI,(%RBX,%R14,8) |
(995) 0x4454b5 JE 445420 |
(995) 0x4454bb MOV -0x40(%RBP),%R9 |
(995) 0x4454bf MOV (%R9,%R12,8),%R9 |
(995) 0x4454c3 MOV %R14,(%R9,%RAX,8) |
(995) 0x4454c7 INC %RAX |
(995) 0x4454ca MOV %RDI,(%RBX,%R14,8) |
(995) 0x4454ce JMP 445420 |
(991) 0x4454d3 MOV -0x30(%RBP),%R14 |
(991) 0x4454d7 MOV -0x60(%RBP),%RDX |
(991) 0x4454db MOV 0x8(%RDX,%R14,8),%R10 |
(991) 0x4454e0 TEST %R10,%R10 |
(991) 0x4454e3 JLE 445340 |
(991) 0x4454e9 MOV -0x98(%RBP),%RDX |
(991) 0x4454f0 MOV (%RDX,%R14,8),%R9 |
(991) 0x4454f4 ADD %R9,%R10 |
(991) 0x4454f7 MOV -0x48(%RBP),%RDX |
(991) 0x4454fb MOV -0x8(%RDX,%R12,8),%RSI |
(991) 0x445500 LEA 0x1(%R9),%RDX |
(991) 0x445504 CMP %RDX,%R10 |
(991) 0x445507 CMOVLE %RDX,%R10 |
(991) 0x44550b MOV %R10,%R11 |
(991) 0x44550e SUB %R9,%R11 |
(991) 0x445511 CMP $0x4,%R11 |
(991) 0x445515 MOV %R11,-0x30(%RBP) |
(991) 0x445519 JAE 44556b |
(991) 0x44551b MOV -0x30(%RBP),%RDX |
(991) 0x44551f MOV %RDX,%R11 |
(991) 0x445522 AND $-0x4,%R11 |
(991) 0x445526 CMP %RDX,%R11 |
(991) 0x445529 JAE 445340 |
(991) 0x44552f ADD %R11,%R9 |
(991) 0x445532 JMP 44554c |
0x445534 NOPW %CS:(%RAX,%RAX,1) |
(992) 0x445540 INC %R9 |
(992) 0x445543 CMP %R9,%R10 |
(992) 0x445546 JE 445340 |
(992) 0x44554c MOV (%RSI,%R9,8),%RDX |
(992) 0x445550 CMP %RDI,(%R15,%RDX,8) |
(992) 0x445554 JE 445540 |
(992) 0x445556 MOV -0x48(%RBP),%R11 |
(992) 0x44555a MOV (%R11,%R12,8),%R11 |
(992) 0x44555e MOV %RDX,(%R11,%RCX,8) |
(992) 0x445562 INC %RCX |
(992) 0x445565 MOV %RDI,(%R15,%RDX,8) |
(992) 0x445569 JMP 445540 |
(991) 0x44556b SHR $0x2,%R11 |
(991) 0x44556f LEA 0x18(%RSI,%R9,8),%R14 |
(991) 0x445574 JMP 445589 |
0x445576 NOPW %CS:(%RAX,%RAX,1) |
(993) 0x445580 ADD $0x20,%R14 |
(993) 0x445584 DEC %R11 |
(993) 0x445587 JE 44551b |
(993) 0x445589 MOV -0x18(%R14),%R13 |
(993) 0x44558d CMP %RDI,(%R15,%R13,8) |
(993) 0x445591 JNE 4455c0 |
(993) 0x445593 MOV -0x10(%R14),%R13 |
(993) 0x445597 CMP %RDI,(%R15,%R13,8) |
(993) 0x44559b JNE 4455dd |
(993) 0x44559d MOV -0x8(%R14),%R13 |
(993) 0x4455a1 CMP %RDI,(%R15,%R13,8) |
(993) 0x4455a5 JNE 4455fa |
(993) 0x4455a7 MOV (%R14),%R13 |
(993) 0x4455aa CMP %RDI,(%R15,%R13,8) |
(993) 0x4455ae JE 445580 |
(993) 0x4455b0 JMP 44561a |
0x4455b2 NOPW %CS:(%RAX,%RAX,1) |
(993) 0x4455c0 MOV -0x48(%RBP),%RDX |
(993) 0x4455c4 MOV (%RDX,%R12,8),%RDX |
(993) 0x4455c8 MOV %R13,(%RDX,%RCX,8) |
(993) 0x4455cc INC %RCX |
(993) 0x4455cf MOV %RDI,(%R15,%R13,8) |
(993) 0x4455d3 MOV -0x10(%R14),%R13 |
(993) 0x4455d7 CMP %RDI,(%R15,%R13,8) |
(993) 0x4455db JE 44559d |
(993) 0x4455dd MOV -0x48(%RBP),%RDX |
(993) 0x4455e1 MOV (%RDX,%R12,8),%RDX |
(993) 0x4455e5 MOV %R13,(%RDX,%RCX,8) |
(993) 0x4455e9 INC %RCX |
(993) 0x4455ec MOV %RDI,(%R15,%R13,8) |
(993) 0x4455f0 MOV -0x8(%R14),%R13 |
(993) 0x4455f4 CMP %RDI,(%R15,%R13,8) |
(993) 0x4455f8 JE 4455a7 |
(993) 0x4455fa MOV -0x48(%RBP),%RDX |
(993) 0x4455fe MOV (%RDX,%R12,8),%RDX |
(993) 0x445602 MOV %R13,(%RDX,%RCX,8) |
(993) 0x445606 INC %RCX |
(993) 0x445609 MOV %RDI,(%R15,%R13,8) |
(993) 0x44560d MOV (%R14),%R13 |
(993) 0x445610 CMP %RDI,(%R15,%R13,8) |
(993) 0x445614 JE 445580 |
(993) 0x44561a MOV -0x48(%RBP),%RDX |
(993) 0x44561e MOV (%RDX,%R12,8),%RDX |
(993) 0x445622 MOV %R13,(%RDX,%RCX,8) |
(993) 0x445626 INC %RCX |
(993) 0x445629 MOV %RDI,(%R15,%R13,8) |
(993) 0x44562d JMP 445580 |
0x445632 NOPW %CS:(%RAX,%RAX,1) |
(988) 0x445640 MOV -0xa0(%RBP),%RDX |
(988) 0x445647 MOV -0x50(%RBP),%RSI |
(988) 0x44564b MOV (%RDX,%RSI,8),%R8 |
(988) 0x44564f MOV 0x8(%RDX,%RSI,8),%RDX |
(988) 0x445654 CMP %RDX,%R8 |
(988) 0x445657 JL 44566c |
(988) 0x445659 JMP 445300 |
0x44565e XCHG %AX,%AX |
(989) 0x445660 INC %R8 |
(989) 0x445663 CMP %RDX,%R8 |
(989) 0x445666 JGE 445300 |
(989) 0x44566c MOV -0x130(%RBP),%RSI |
(989) 0x445673 MOV (%RSI,%R8,8),%R9 |
(989) 0x445677 MOV -0x120(%RBP),%RSI |
(989) 0x44567e CMP %R10,(%RSI,%R9,8) |
(989) 0x445682 JNE 445660 |
(989) 0x445684 MOV -0x110(%RBP),%RSI |
(989) 0x44568b MOV 0x8(%RSI,%R9,8),%RSI |
(989) 0x445690 TEST %RSI,%RSI |
(989) 0x445693 JLE 445660 |
(989) 0x445695 MOV -0x100(%RBP),%RDX |
(989) 0x44569c MOV (%RDX,%R9,8),%R9 |
(989) 0x4456a0 ADD %R9,%RSI |
(989) 0x4456a3 MOV -0x108(%RBP),%RDX |
(989) 0x4456aa MOV (%RDX,%R12,8),%R11 |
(989) 0x4456ae LEA 0x1(%R9),%R10 |
(989) 0x4456b2 CMP %R10,%RSI |
(989) 0x4456b5 CMOVLE %R10,%RSI |
(989) 0x4456b9 MOV %RSI,%RDX |
(989) 0x4456bc SUB %R9,%RDX |
(989) 0x4456bf CMP %R10,%RSI |
(989) 0x4456c2 MOV %R11,-0x30(%RBP) |
(989) 0x4456c6 JNE 44570e |
(989) 0x4456c8 XOR %R11D,%R11D |
(989) 0x4456cb TEST $0x1,%DL |
(989) 0x4456ce MOV -0x38(%RBP),%R10 |
(989) 0x4456d2 JE 4457f0 |
(989) 0x4456d8 ADD %R11,%R9 |
(989) 0x4456db MOV -0x30(%RBP),%RDX |
(989) 0x4456df MOV (%RDX,%R9,8),%RDX |
(989) 0x4456e3 TEST %RDX,%RDX |
(989) 0x4456e6 JS 4457c7 |
(989) 0x4456ec CMP %RDI,(%R15,%RDX,8) |
(989) 0x4456f0 JE 4457f0 |
(989) 0x4456f6 MOV -0x48(%RBP),%RSI |
(989) 0x4456fa MOV (%RSI,%R12,8),%RSI |
(989) 0x4456fe MOV %RDX,(%RSI,%RCX,8) |
(989) 0x445702 INC %RCX |
(989) 0x445705 MOV %RDI,(%R15,%RDX,8) |
(989) 0x445709 JMP 4457f0 |
(989) 0x44570e MOV %RDX,%RSI |
(989) 0x445711 AND $-0x2,%RSI |
(989) 0x445715 LEA 0x8(%R11,%R9,8),%R10 |
(989) 0x44571a XOR %R11D,%R11D |
(989) 0x44571d JMP 445729 |
0x44571f NOP |
(990) 0x445720 ADD $0x2,%R11 |
(990) 0x445724 CMP %R11,%RSI |
(990) 0x445727 JE 4456cb |
(990) 0x445729 MOV -0x8(%R10,%R11,8),%R14 |
(990) 0x44572e TEST %R14,%R14 |
(990) 0x445731 JS 445750 |
(990) 0x445733 CMP %RDI,(%R15,%R14,8) |
(990) 0x445737 JE 445770 |
(990) 0x445739 MOV -0x48(%RBP),%R13 |
(990) 0x44573d MOV (%R13,%R12,8),%R13 |
(990) 0x445742 MOV %R14,(%R13,%RCX,8) |
(990) 0x445747 INC %RCX |
(990) 0x44574a MOV %RDI,(%R15,%R14,8) |
(990) 0x44574e JMP 445770 |
(990) 0x445750 NOT %R14 |
(990) 0x445753 CMP %RDI,(%RBX,%R14,8) |
(990) 0x445757 JE 445770 |
(990) 0x445759 MOV -0x40(%RBP),%R13 |
(990) 0x44575d MOV (%R13,%R12,8),%R13 |
(990) 0x445762 MOV %R14,(%R13,%RAX,8) |
(990) 0x445767 INC %RAX |
(990) 0x44576a MOV %RDI,(%RBX,%R14,8) |
(990) 0x44576e XCHG %AX,%AX |
(990) 0x445770 MOV (%R10,%R11,8),%R14 |
(990) 0x445774 TEST %R14,%R14 |
(990) 0x445777 JS 4457a0 |
(990) 0x445779 CMP %RDI,(%R15,%R14,8) |
(990) 0x44577d JE 445720 |
(990) 0x44577f MOV -0x48(%RBP),%R13 |
(990) 0x445783 MOV (%R13,%R12,8),%R13 |
(990) 0x445788 MOV %R14,(%R13,%RCX,8) |
(990) 0x44578d INC %RCX |
(990) 0x445790 MOV %RDI,(%R15,%R14,8) |
(990) 0x445794 JMP 445720 |
0x445796 NOPW %CS:(%RAX,%RAX,1) |
(990) 0x4457a0 NOT %R14 |
(990) 0x4457a3 CMP %RDI,(%RBX,%R14,8) |
(990) 0x4457a7 JE 445720 |
(990) 0x4457ad MOV -0x40(%RBP),%R13 |
(990) 0x4457b1 MOV (%R13,%R12,8),%R13 |
(990) 0x4457b6 MOV %R14,(%R13,%RAX,8) |
(990) 0x4457bb INC %RAX |
(990) 0x4457be MOV %RDI,(%RBX,%R14,8) |
(990) 0x4457c2 JMP 445720 |
(989) 0x4457c7 NOT %RDX |
(989) 0x4457ca CMP %RDI,(%RBX,%RDX,8) |
(989) 0x4457ce JE 4457f0 |
(989) 0x4457d0 MOV -0x40(%RBP),%RSI |
(989) 0x4457d4 MOV (%RSI,%R12,8),%RSI |
(989) 0x4457d8 MOV %RDX,(%RSI,%RAX,8) |
(989) 0x4457dc INC %RAX |
(989) 0x4457df MOV %RDI,(%RBX,%RDX,8) |
(989) 0x4457e3 NOPW %CS:(%RAX,%RAX,1) |
(989) 0x4457f0 MOV -0xa0(%RBP),%RDX |
(989) 0x4457f7 MOV -0x50(%RBP),%RSI |
(989) 0x4457fb MOV 0x8(%RDX,%RSI,8),%RDX |
(989) 0x445800 INC %R8 |
(989) 0x445803 CMP %RDX,%R8 |
(989) 0x445806 JL 44566c |
(988) 0x44580c JMP 445300 |
0x445811 MOV %RBX,%RDI |
0x445814 CALL 4e7390 <hypre_Free> |
0x445819 CMPQ $0,-0xe8(%RBP) |
0x445821 JNE 445845 |
0x445823 MOV -0xb8(%RBP),%RAX |
0x44582a CMP -0xf8(%RBP),%RAX |
0x445831 JE 445845 |
0x445833 ADD $0x128,%RSP |
0x44583a POP %RBX |
0x44583b POP %R12 |
0x44583d POP %R13 |
0x44583f POP %R14 |
0x445841 POP %R15 |
0x445843 POP %RBP |
0x445844 RET |
0x445845 MOV %R15,%RDI |
0x445848 ADD $0x128,%RSP |
0x44584f POP %RBX |
0x445850 POP %R12 |
0x445852 POP %R13 |
0x445854 POP %R14 |
0x445856 POP %R15 |
0x445858 POP %RBP |
0x445859 JMP 4e7390 |
0x44585e XCHG %AX,%AX |
Path / |
Source file and lines | par_multi_interp.c:891-1134 |
Module | exec |
nb instructions | 304 |
nb uops | 325 |
loop length | 1455 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 60 |
micro-operation queue | 54.17 cycles |
front end | 54.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 15.80 | 15.80 | 35.00 | 35.00 | 32.50 | 15.80 | 15.80 | 32.50 | 32.50 | 32.50 | 15.80 | 35.00 |
cycles | 15.80 | 17.40 | 35.00 | 35.00 | 32.50 | 15.80 | 15.80 | 32.50 | 32.50 | 32.50 | 15.80 | 35.00 |
Cycles executing div or sqrt instructions | 16.00 |
FE+BE cycles | 52.18-52.23 |
Stall cycles | 0.00 |
Front-end | 54.17 |
Dispatch | 35.00 |
DIV/SQRT | 16.00 |
Overall L1 | 54.17 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 9% |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x128,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb8(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x150(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x138(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x120(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x80(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x148(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 4e8ff0 <hypre_GetThreadNum> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4e8fe0 <hypre_NumActiveThreads> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RBX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
OR %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x20,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
JE 4449ea <hypre_BoomerAMGBuildMultipass.extracted.34+0x16a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RBX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %RCX | 5 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 10 |
JMP 4449f0 <hypre_BoomerAMGBuildMultipass.extracted.34+0x170> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %EBX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
DIV %ECX | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV %RCX,-0x140(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
DEC %RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x1(%R12),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %RAX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R12,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RCX,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVE %RBX,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R13,%R12,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4e72c0 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
TEST %R15,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 444a54 <hypre_BoomerAMGBuildMultipass.extracted.34+0x1d4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SAL $0x3,%R15 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4f03c0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
IMUL -0x68(%RBP),%R14 | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R14,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xf8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 444a86 <hypre_BoomerAMGBuildMultipass.extracted.34+0x206> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xe8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 444ab1 <hypre_BoomerAMGBuildMultipass.extracted.34+0x231> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDI,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4e72c0 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R14,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
TEST %R14,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 444ab1 <hypre_BoomerAMGBuildMultipass.extracted.34+0x231> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SAL $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4f03c0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
JMP 444ab1 <hypre_BoomerAMGBuildMultipass.extracted.34+0x231> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xd8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RCX,%RDX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xb0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JGE 444fe2 <hypre_BoomerAMGBuildMultipass.extracted.34+0x762> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%R12),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R12,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 444b17 <hypre_BoomerAMGBuildMultipass.extracted.34+0x297> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x68(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R13,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 445000 <hypre_BoomerAMGBuildMultipass.extracted.34+0x780> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xe0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x140(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,(%RDX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x78(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,(%RDX,%R13,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xf0(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%R14,%R13,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x533870,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410560 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x78(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R13,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV -0xe0(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 44507d <hypre_BoomerAMGBuildMultipass.extracted.34+0x7fd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x2,(%R13) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 44507d <hypre_BoomerAMGBuildMultipass.extracted.34+0x7fd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x533890,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410560 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,-0x68(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 445226 <hypre_BoomerAMGBuildMultipass.extracted.34+0x9a6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RAX,-0x70(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x98(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x90(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 445291 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa11> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x80(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xc8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVLE %RCX,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x4,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RSI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JB 4451c2 <hypre_BoomerAMGBuildMultipass.extracted.34+0x942> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x38(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SHR $0x2,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x88(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x18(%RSI,%RDI,8),%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x38(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x88(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xd8(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JAE 445291 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa11> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD -0x70(%RBP),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
ADD %RDX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 445291 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa11> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV (%R13),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%R14,%RAX,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RCX,%RAX,8),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x148(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDI,(%RAX) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x150(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R14,(%RAX) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4e72c0 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x40(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX,%R12,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R14,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 445272 <hypre_BoomerAMGBuildMultipass.extracted.34+0x9f2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R14,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4e72c0 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
JMP 445285 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa05> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x138(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0x2,(%RAX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JL 445291 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa11> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x48(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX,%R12,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x68(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x5338b0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410560 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
TEST %R13,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 4452d4 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa54> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xf0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RAX,%R13,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RCX,%R13,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0xb0(%RBP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JL 4452ed <hypre_BoomerAMGBuildMultipass.extracted.34+0xa6d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 445811 <hypre_BoomerAMGBuildMultipass.extracted.34+0xf91> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0xb0(%RBP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 445811 <hypre_BoomerAMGBuildMultipass.extracted.34+0xf91> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%R12),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R10,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 445314 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa94> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4e7390 <hypre_Free> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,-0xe8(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 445845 <hypre_BoomerAMGBuildMultipass.extracted.34+0xfc5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0xf8(%RBP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 445845 <hypre_BoomerAMGBuildMultipass.extracted.34+0xfc5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD $0x128,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD $0x128,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP 4e7390 <hypre_Free> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | par_multi_interp.c:891-1134 |
Module | exec |
nb instructions | 304 |
nb uops | 325 |
loop length | 1455 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 60 |
micro-operation queue | 54.17 cycles |
front end | 54.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 15.80 | 15.80 | 35.00 | 35.00 | 32.50 | 15.80 | 15.80 | 32.50 | 32.50 | 32.50 | 15.80 | 35.00 |
cycles | 15.80 | 17.40 | 35.00 | 35.00 | 32.50 | 15.80 | 15.80 | 32.50 | 32.50 | 32.50 | 15.80 | 35.00 |
Cycles executing div or sqrt instructions | 16.00 |
FE+BE cycles | 52.18-52.23 |
Stall cycles | 0.00 |
Front-end | 54.17 |
Dispatch | 35.00 |
DIV/SQRT | 16.00 |
Overall L1 | 54.17 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 9% |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x128,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb8(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x150(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x138(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x120(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x80(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x148(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 4e8ff0 <hypre_GetThreadNum> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4e8fe0 <hypre_NumActiveThreads> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RBX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
OR %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x20,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
JE 4449ea <hypre_BoomerAMGBuildMultipass.extracted.34+0x16a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RBX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %RCX | 5 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 10 |
JMP 4449f0 <hypre_BoomerAMGBuildMultipass.extracted.34+0x170> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %EBX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
DIV %ECX | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV %RCX,-0x140(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
DEC %RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x1(%R12),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %RAX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R12,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RCX,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVE %RBX,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R13,%R12,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4e72c0 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
TEST %R15,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 444a54 <hypre_BoomerAMGBuildMultipass.extracted.34+0x1d4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SAL $0x3,%R15 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4f03c0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
IMUL -0x68(%RBP),%R14 | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R14,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xf8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 444a86 <hypre_BoomerAMGBuildMultipass.extracted.34+0x206> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xe8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 444ab1 <hypre_BoomerAMGBuildMultipass.extracted.34+0x231> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDI,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4e72c0 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R14,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
TEST %R14,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 444ab1 <hypre_BoomerAMGBuildMultipass.extracted.34+0x231> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SAL $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4f03c0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
JMP 444ab1 <hypre_BoomerAMGBuildMultipass.extracted.34+0x231> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xd8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RCX,%RDX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xb0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JGE 444fe2 <hypre_BoomerAMGBuildMultipass.extracted.34+0x762> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%R12),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R12,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 444b17 <hypre_BoomerAMGBuildMultipass.extracted.34+0x297> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x68(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R13,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 445000 <hypre_BoomerAMGBuildMultipass.extracted.34+0x780> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xe0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x140(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,(%RDX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x78(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,(%RDX,%R13,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xf0(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%R14,%R13,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x533870,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410560 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x78(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R13,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV -0xe0(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 44507d <hypre_BoomerAMGBuildMultipass.extracted.34+0x7fd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x2,(%R13) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 44507d <hypre_BoomerAMGBuildMultipass.extracted.34+0x7fd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x533890,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410560 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,-0x68(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 445226 <hypre_BoomerAMGBuildMultipass.extracted.34+0x9a6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RAX,-0x70(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x98(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x90(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 445291 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa11> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x80(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xc8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVLE %RCX,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x4,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RSI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JB 4451c2 <hypre_BoomerAMGBuildMultipass.extracted.34+0x942> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x38(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SHR $0x2,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x88(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x18(%RSI,%RDI,8),%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x38(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x88(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xd8(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JAE 445291 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa11> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD -0x70(%RBP),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
ADD %RDX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 445291 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa11> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV (%R13),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%R14,%RAX,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RCX,%RAX,8),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x148(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDI,(%RAX) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x150(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R14,(%RAX) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4e72c0 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x40(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX,%R12,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R14,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 445272 <hypre_BoomerAMGBuildMultipass.extracted.34+0x9f2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R14,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4e72c0 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
JMP 445285 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa05> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x138(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0x2,(%RAX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JL 445291 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa11> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x48(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX,%R12,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x68(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x5338b0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410560 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
TEST %R13,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 4452d4 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa54> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xf0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RAX,%R13,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RCX,%R13,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0xb0(%RBP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JL 4452ed <hypre_BoomerAMGBuildMultipass.extracted.34+0xa6d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 445811 <hypre_BoomerAMGBuildMultipass.extracted.34+0xf91> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0xb0(%RBP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 445811 <hypre_BoomerAMGBuildMultipass.extracted.34+0xf91> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%R12),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R10,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 445314 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa94> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4e7390 <hypre_Free> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,-0xe8(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 445845 <hypre_BoomerAMGBuildMultipass.extracted.34+0xfc5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0xf8(%RBP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 445845 <hypre_BoomerAMGBuildMultipass.extracted.34+0xfc5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD $0x128,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD $0x128,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP 4e7390 <hypre_Free> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼hypre_BoomerAMGBuildMultipass.extracted.34– | 2.8 | 0.35 |
○Loop 997 - par_multi_interp.c:1030-1034 - exec | 0.15 | 0.02 |
▼Loop 999 - par_multi_interp.c:917-997 - exec– | 0.06 | 0.01 |
▼Loop 1002 - par_multi_interp.c:917-970 - exec– | 0.99 | 0.1 |
○Loop 1005 - par_multi_interp.c:951-958 - exec | 0.36 | 0.04 |
○Loop 1006 - par_multi_interp.c:917-958 - exec | 0 | 0 |
○Loop 1004 - par_multi_interp.c:963-970 - exec | 0 | 0 |
○Loop 1003 - par_multi_interp.c:963-970 - exec | 0 | 0 |
▼Loop 1000 - par_multi_interp.c:976-997 - exec– | 0 | 0 |
○Loop 1001 - par_multi_interp.c:983-997 - exec | 0 | 0 |
▼Loop 988 - par_multi_interp.c:917-1125 - exec– | 0.05 | 0.01 |
▼Loop 991 - par_multi_interp.c:917-1099 - exec– | 0.84 | 0.09 |
○Loop 994 - par_multi_interp.c:1082-1088 - exec | 0.33 | 0.03 |
○Loop 992 - par_multi_interp.c:1093-1099 - exec | 0 | 0 |
○Loop 993 - par_multi_interp.c:1093-1099 - exec | 0 | 0 |
○Loop 995 - par_multi_interp.c:1082-1088 - exec | 0 | 0 |
▼Loop 989 - par_multi_interp.c:1104-1125 - exec– | 0 | 0 |
○Loop 990 - par_multi_interp.c:1111-1125 - exec | 0 | 0 |
○Loop 996 - par_multi_interp.c:1030-1034 - exec | 0 | 0 |
○Loop 998 - par_multi_interp.c:1017-1020 - exec | 0 | 0 |