Function: hypre_BoomerAMGBuildMultipass.extracted.28 | Module: exec | Source: par_multi_interp.c:1737-1881 [...] | Coverage: 2.06% |
---|
Function: hypre_BoomerAMGBuildMultipass.extracted.28 | Module: exec | Source: par_multi_interp.c:1737-1881 [...] | Coverage: 2.06% |
---|
/scratch_na/users/xoserete/qaas_runs/171-415-3661/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 1737 - 1881 |
-------------------------------------------------------------------------------- |
1737: #pragma omp parallel private(thread_start,thread_stop,my_thread_num,num_threads,k,k1,i,i1,j,j1,sum_C,sum_N,j_start,j_end,cnt,tmp_marker,tmp_marker_offd,cnt_offd,diagonal,alfa,tmp_array,tmp_array_offd) |
[...] |
1747: if (n_fine) |
1748: { tmp_marker = hypre_CTAlloc(HYPRE_Int,n_fine); } |
1749: tmp_marker_offd = NULL; |
1750: if (num_cols_offd) |
1751: { tmp_marker_offd = hypre_CTAlloc(HYPRE_Int,num_cols_offd); } |
1752: tmp_array = NULL; |
1753: if (n_coarse) |
1754: { tmp_array = hypre_CTAlloc(HYPRE_Int,n_coarse); } |
[...] |
1760: for (i=0; i < n_fine; i++) |
1761: { tmp_marker[i] = -1; } |
1762: for (i=0; i < num_cols_offd; i++) |
1763: { tmp_marker_offd[i] = -1; } |
1764: |
1765: /* Compute this thread's range of pass_length */ |
1766: my_thread_num = hypre_GetThreadNum(); |
1767: num_threads = hypre_NumActiveThreads(); |
1768: thread_start = pass_pointer[pass] + (pass_length/num_threads)*my_thread_num; |
1769: if (my_thread_num == num_threads-1) |
1770: { thread_stop = pass_pointer[pass] + pass_length; } |
1771: else |
1772: { thread_stop = pass_pointer[pass] + (pass_length/num_threads)*(my_thread_num+1); } |
1773: |
1774: for (i=thread_start; i < thread_stop; i++) |
1775: { |
1776: i1 = pass_array[i]; |
1777: sum_C = 0; |
1778: sum_N = 0; |
1779: j_start = P_diag_start[i1]; |
1780: j_end = j_start+P_diag_i[i1+1]-P_diag_i[i1]; |
1781: cnt = P_diag_i[i1]; |
1782: for (j=j_start; j < j_end; j++) |
1783: { |
1784: k1 = P_diag_pass[pass][j]; |
1785: tmp_array[k1] = cnt; |
1786: P_diag_data[cnt] = 0; |
1787: P_diag_j[cnt++] = k1; |
1788: } |
1789: j_start = P_offd_start[i1]; |
1790: j_end = j_start+P_offd_i[i1+1]-P_offd_i[i1]; |
1791: cnt_offd = P_offd_i[i1]; |
1792: for (j=j_start; j < j_end; j++) |
1793: { |
1794: k1 = P_offd_pass[pass][j]; |
1795: tmp_array_offd[k1] = cnt_offd; |
1796: P_offd_data[cnt_offd] = 0; |
1797: P_offd_j[cnt_offd++] = k1; |
1798: } |
1799: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
1800: { |
1801: j1 = S_diag_j[j]; |
1802: if (assigned[j1] == pass-1) |
1803: tmp_marker[j1] = i1; |
1804: } |
1805: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
1806: { |
1807: j1 = S_offd_j[j]; |
1808: if (assigned_offd[j1] == pass-1) |
1809: tmp_marker_offd[j1] = i1; |
1810: } |
1811: for (j=A_diag_i[i1]+1; j < A_diag_i[i1+1]; j++) |
1812: { |
1813: j1 = A_diag_j[j]; |
1814: if (tmp_marker[j1] == i1) |
1815: { |
1816: for (k=P_diag_i[j1]; k < P_diag_i[j1+1]; k++) |
1817: { |
1818: k1 = P_diag_j[k]; |
1819: alfa = A_diag_data[j]*P_diag_data[k]; |
1820: P_diag_data[tmp_array[k1]] += alfa; |
1821: sum_C += alfa; |
1822: sum_N += alfa; |
1823: } |
1824: for (k=P_offd_i[j1]; k < P_offd_i[j1+1]; k++) |
1825: { |
1826: k1 = P_offd_j[k]; |
1827: alfa = A_diag_data[j]*P_offd_data[k]; |
1828: P_offd_data[tmp_array_offd[k1]] += alfa; |
1829: sum_C += alfa; |
1830: sum_N += alfa; |
1831: } |
1832: } |
1833: else |
1834: { |
1835: if (CF_marker[j1] != -3 && |
1836: (num_functions == 1 || dof_func[i1] == dof_func[j1])) |
1837: sum_N += A_diag_data[j]; |
1838: } |
1839: } |
1840: for (j=A_offd_i[i1]; j < A_offd_i[i1+1]; j++) |
1841: { |
1842: if (col_offd_S_to_A) |
1843: j1 = map_A_to_S[A_offd_j[j]]; |
1844: else |
1845: j1 = A_offd_j[j]; |
1846: |
1847: if (j1 > -1 && tmp_marker_offd[j1] == i1) |
1848: { |
1849: j_start = Pext_start[j1]; |
1850: j_end = j_start+Pext_i[j1+1]; |
1851: for (k=j_start; k < j_end; k++) |
1852: { |
1853: k1 = Pext_pass[pass][k]; |
1854: alfa = A_offd_data[j]*Pext_data[k]; |
1855: if (k1 < 0) |
1856: P_diag_data[tmp_array[-k1-1]] += alfa; |
1857: else |
1858: P_offd_data[tmp_array_offd[k1]] += alfa; |
1859: sum_C += alfa; |
1860: sum_N += alfa; |
1861: } |
1862: } |
1863: else |
1864: { |
1865: if (CF_marker_offd[j1] != -3 && |
1866: (num_functions == 1 || dof_func_offd[j1] == dof_func[i1])) |
1867: sum_N += A_offd_data[j]; |
1868: } |
1869: } |
1870: diagonal = A_diag_data[A_diag_i[i1]]; |
1871: if (sum_C*diagonal) alfa = -sum_N/(sum_C*diagonal); |
1872: |
1873: for (j=P_diag_i[i1]; j < P_diag_i[i1+1]; j++) |
1874: P_diag_data[j] *= alfa; |
1875: for (j=P_offd_i[i1]; j < P_offd_i[i1+1]; j++) |
1876: P_offd_data[j] *= alfa; |
1877: } |
1878: hypre_TFree(tmp_marker); |
1879: hypre_TFree(tmp_marker_offd); |
1880: hypre_TFree(tmp_array); |
1881: hypre_TFree(tmp_array_offd); |
0x441d90 PUSH %RBP |
0x441d91 MOV %RSP,%RBP |
0x441d94 PUSH %R15 |
0x441d96 PUSH %R14 |
0x441d98 PUSH %R13 |
0x441d9a PUSH %R12 |
0x441d9c PUSH %RBX |
0x441d9d SUB $0x168,%RSP |
0x441da4 MOV %R9,-0xc0(%RBP) |
0x441dab MOV %R8,-0xc8(%RBP) |
0x441db2 MOV %RCX,-0xe0(%RBP) |
0x441db9 MOV %RDX,-0x160(%RBP) |
0x441dc0 MOV 0x138(%RBP),%RAX |
0x441dc7 MOV %RAX,-0x30(%RBP) |
0x441dcb MOV 0x130(%RBP),%R13 |
0x441dd2 MOV 0x128(%RBP),%RAX |
0x441dd9 MOV %RAX,-0x40(%RBP) |
0x441ddd MOV 0x120(%RBP),%RAX |
0x441de4 MOV %RAX,-0x138(%RBP) |
0x441deb MOV 0x118(%RBP),%RAX |
0x441df2 MOV %RAX,-0x108(%RBP) |
0x441df9 MOV 0x110(%RBP),%R15 |
0x441e00 MOV 0x108(%RBP),%R12 |
0x441e07 MOV 0x100(%RBP),%R14 |
0x441e0e MOV 0xf8(%RBP),%RAX |
0x441e15 MOV %RAX,-0x48(%RBP) |
0x441e19 MOV 0xf0(%RBP),%RAX |
0x441e20 MOV %RAX,-0x168(%RBP) |
0x441e27 MOV 0xe8(%RBP),%RAX |
0x441e2e MOV %RAX,-0x158(%RBP) |
0x441e35 MOV 0xe0(%RBP),%RAX |
0x441e3c MOV %RAX,-0x150(%RBP) |
0x441e43 MOV 0xd8(%RBP),%RAX |
0x441e4a MOV %RAX,-0x100(%RBP) |
0x441e51 MOV 0xd0(%RBP),%RAX |
0x441e58 MOV %RAX,-0xf8(%RBP) |
0x441e5f MOV 0xc8(%RBP),%RAX |
0x441e66 MOV %RAX,-0x68(%RBP) |
0x441e6a MOV 0xc0(%RBP),%RAX |
0x441e71 MOV %RAX,-0x130(%RBP) |
0x441e78 MOV 0xb8(%RBP),%RAX |
0x441e7f MOV %RAX,-0x70(%RBP) |
0x441e83 MOV 0xb0(%RBP),%RAX |
0x441e8a MOV %RAX,-0xb8(%RBP) |
0x441e91 MOV 0xa8(%RBP),%RAX |
0x441e98 MOV %RAX,-0x140(%RBP) |
0x441e9f MOV 0xa0(%RBP),%RAX |
0x441ea6 MOV %RAX,-0x170(%RBP) |
0x441ead MOV 0x98(%RBP),%RAX |
0x441eb4 MOV %RAX,-0x148(%RBP) |
0x441ebb MOV 0x90(%RBP),%RAX |
0x441ec2 MOV %RAX,-0x50(%RBP) |
0x441ec6 MOV 0x88(%RBP),%RAX |
0x441ecd MOV %RAX,-0x38(%RBP) |
0x441ed1 MOV 0x80(%RBP),%RAX |
0x441ed8 MOV %RAX,-0x58(%RBP) |
0x441edc MOV 0x78(%RBP),%RAX |
0x441ee0 MOV %RAX,-0x98(%RBP) |
0x441ee7 MOV 0x70(%RBP),%RAX |
0x441eeb MOV %RAX,-0xa8(%RBP) |
0x441ef2 MOV 0x68(%RBP),%RAX |
0x441ef6 MOV %RAX,-0x88(%RBP) |
0x441efd MOV 0x60(%RBP),%RBX |
0x441f01 MOV 0x58(%RBP),%RAX |
0x441f05 MOV %RAX,-0x190(%RBP) |
0x441f0c MOV 0x50(%RBP),%RAX |
0x441f10 MOV %RAX,-0xd8(%RBP) |
0x441f17 MOV 0x48(%RBP),%RAX |
0x441f1b MOV %RAX,-0x188(%RBP) |
0x441f22 MOV 0x40(%RBP),%RAX |
0x441f26 MOV %RAX,-0xd0(%RBP) |
0x441f2d MOV 0x38(%RBP),%RAX |
0x441f31 MOV %RAX,-0x180(%RBP) |
0x441f38 MOV 0x30(%RBP),%RAX |
0x441f3c MOV %RAX,-0x128(%RBP) |
0x441f43 MOV 0x28(%RBP),%RAX |
0x441f47 MOV %RAX,-0x60(%RBP) |
0x441f4b MOV 0x20(%RBP),%RAX |
0x441f4f MOV %RAX,-0x178(%RBP) |
0x441f56 MOV 0x18(%RBP),%RAX |
0x441f5a MOV %RAX,-0x120(%RBP) |
0x441f61 MOV 0x10(%RBP),%RAX |
0x441f65 MOV %RAX,-0x90(%RBP) |
0x441f6c MOV (%R14),%RDI |
0x441f6f TEST %RDI,%RDI |
0x441f72 JE 441f84 |
0x441f74 MOV $0x8,%ESI |
0x441f79 CALL 4d5130 <hypre_CAlloc> |
0x441f7e MOV %RAX,-0x80(%RBP) |
0x441f82 JMP 441f8c |
0x441f84 MOVQ $0,-0x80(%RBP) |
0x441f8c MOV (%RBX),%RDI |
0x441f8f TEST %RDI,%RDI |
0x441f92 JE 441fa4 |
0x441f94 MOV $0x8,%ESI |
0x441f99 CALL 4d5130 <hypre_CAlloc> |
0x441f9e MOV %RAX,-0x78(%RBP) |
0x441fa2 JMP 441fac |
0x441fa4 MOVQ $0,-0x78(%RBP) |
0x441fac MOV (%R12),%RDI |
0x441fb0 TEST %RDI,%RDI |
0x441fb3 JE 441fc4 |
0x441fb5 MOV $0x8,%ESI |
0x441fba CALL 4d5130 <hypre_CAlloc> |
0x441fbf MOV %RAX,%R12 |
0x441fc2 JMP 441fc7 |
0x441fc4 XOR %R12D,%R12D |
0x441fc7 CMP %R15,%R13 |
0x441fca CMOVG %R13,%R15 |
0x441fce MOV $0x8,%ESI |
0x441fd3 MOV %R15,%RDI |
0x441fd6 CALL 4d5130 <hypre_CAlloc> |
0x441fdb MOV %RAX,%R15 |
0x441fde CMPQ $0,(%R14) |
0x441fe2 MOV -0x80(%RBP),%RCX |
0x441fe6 JLE 442000 |
0x441fe8 XOR %EAX,%EAX |
0x441fea NOPW (%RAX,%RAX,1) |
(937) 0x441ff0 MOVQ $-0x1,(%RCX,%RAX,8) |
(937) 0x441ff8 INC %RAX |
(937) 0x441ffb CMP (%R14),%RAX |
(937) 0x441ffe JL 441ff0 |
0x442000 CMPQ $0,(%RBX) |
0x442004 MOV -0x78(%RBP),%RCX |
0x442008 JLE 442020 |
0x44200a XOR %EAX,%EAX |
0x44200c NOPL (%RAX) |
(936) 0x442010 MOVQ $-0x1,(%RCX,%RAX,8) |
(936) 0x442018 INC %RAX |
(936) 0x44201b CMP (%RBX),%RAX |
(936) 0x44201e JL 442010 |
0x442020 CALL 4d6df0 <hypre_GetThreadNum> |
0x442025 MOV %RAX,%RBX |
0x442028 CALL 4d6de0 <hypre_NumActiveThreads> |
0x44202d MOV %RAX,%RCX |
0x442030 MOV -0x70(%RBP),%RAX |
0x442034 MOV (%RAX),%RAX |
0x442037 MOV -0x48(%RBP),%R9 |
0x44203b MOV (%R9),%RDX |
0x44203e MOV (%RAX,%RDX,8),%RDI |
0x442042 MOV -0x30(%RBP),%RAX |
0x442046 MOV (%RAX),%RSI |
0x442049 MOV %RSI,%RAX |
0x44204c OR %RCX,%RAX |
0x44204f SHR $0x20,%RAX |
0x442053 JE 44205f |
0x442055 MOV %RSI,%RAX |
0x442058 CQTO |
0x44205a IDIV %RCX |
0x44205d JMP 442065 |
0x44205f MOV %ESI,%EAX |
0x442061 XOR %EDX,%EDX |
0x442063 DIV %ECX |
0x442065 MOV -0x40(%RBP),%R11 |
0x442069 MOV -0x50(%RBP),%RDX |
0x44206d MOV %RAX,%R8 |
0x442070 IMUL %RBX,%R8 |
0x442074 DEC %RCX |
0x442077 LEA 0x1(%RBX),%R10 |
0x44207b IMUL %RAX,%R10 |
0x44207f CMP %RCX,%RBX |
0x442082 CMOVE %RSI,%R10 |
0x442086 MOV %R10,-0xb0(%RBP) |
0x44208d CMP %R10,%R8 |
0x442090 JGE 442bc9 |
0x442096 MOV -0xb0(%RBP),%RAX |
0x44209d ADD %RDI,%RAX |
0x4420a0 MOV %RAX,-0xb0(%RBP) |
0x4420a7 ADD %RDI,%R8 |
0x4420aa MOV -0xb8(%RBP),%RAX |
0x4420b1 MOV (%RAX),%RAX |
0x4420b4 MOV %RAX,-0x118(%RBP) |
0x4420bb MOV -0xa8(%RBP),%RAX |
0x4420c2 MOV (%RAX),%RAX |
0x4420c5 MOV %RAX,-0x70(%RBP) |
0x4420c9 MOV -0x68(%RBP),%RAX |
0x4420cd MOV (%RAX),%RAX |
0x4420d0 MOV %RAX,-0xa8(%RBP) |
0x4420d7 MOV -0x38(%RBP),%RAX |
0x4420db MOV (%RAX),%RAX |
0x4420de MOV %RAX,-0x68(%RBP) |
0x4420e2 MOV -0x90(%RBP),%RAX |
0x4420e9 MOV (%RAX),%RAX |
0x4420ec MOV %RAX,-0x110(%RBP) |
0x4420f3 MOV -0x98(%RBP),%RAX |
0x4420fa ADD $0x18,%RAX |
0x4420fe MOV %RAX,-0xf0(%RBP) |
0x442105 LEA 0x18(%RDX),%RAX |
0x442109 MOV %RAX,-0xe8(%RBP) |
0x442110 VXORPD %XMM16,%XMM16,%XMM16 |
0x442116 VMOVDDUP 0xa0a00(%RIP),%XMM17 |
0x442120 JMP 442147 |
0x442122 NOPW %CS:(%RAX,%RAX,1) |
(916) 0x442130 MOV -0xb8(%RBP),%R8 |
(916) 0x442137 INC %R8 |
(916) 0x44213a CMP -0xb0(%RBP),%R8 |
(916) 0x442141 JGE 442bc9 |
(916) 0x442147 MOV %R8,-0xb8(%RBP) |
(916) 0x44214e MOV -0x118(%RBP),%RAX |
(916) 0x442155 MOV (%RAX,%R8,8),%RCX |
(916) 0x442159 MOV -0x130(%RBP),%RAX |
(916) 0x442160 MOV (%RAX,%RCX,8),%R14 |
(916) 0x442164 MOV -0x70(%RBP),%RAX |
(916) 0x442168 MOV (%RAX,%RCX,8),%R13 |
(916) 0x44216c MOV %RCX,-0x30(%RBP) |
(916) 0x442170 MOV 0x8(%RAX,%RCX,8),%RSI |
(916) 0x442175 LEA (%RSI,%R14,1),%RAX |
(916) 0x442179 SUB %R13,%RAX |
(916) 0x44217c CMP %RAX,%R14 |
(916) 0x44217f JGE 4422f6 |
(916) 0x442185 MOV -0xf8(%RBP),%RAX |
(916) 0x44218c MOV (%RAX),%RBX |
(916) 0x44218f MOV -0x88(%RBP),%RAX |
(916) 0x442196 MOV (%RAX),%RAX |
(916) 0x442199 MOV %RSI,%RCX |
(916) 0x44219c SUB %R13,%RCX |
(916) 0x44219f CMP $0xc,%RCX |
(916) 0x4421a3 JBE 4422c0 |
(916) 0x4421a9 MOV %RSI,-0x38(%RBP) |
(916) 0x4421ad LEA (%RAX,%R13,8),%RDI |
(916) 0x4421b1 LEA (,%RCX,8),%RDX |
(916) 0x4421b9 XOR %ESI,%ESI |
(916) 0x4421bb MOV %RCX,-0xa0(%RBP) |
(916) 0x4421c2 VZEROUPPER |
(916) 0x4421c5 CALL 4e0070 <__intel_avx_rep_memset> |
(916) 0x4421ca MOV -0xa0(%RBP),%R10 |
(916) 0x4421d1 MOV -0x48(%RBP),%R9 |
(916) 0x4421d5 MOV %R10,%RAX |
(916) 0x4421d8 SHR $0x2,%RAX |
(916) 0x4421dc LEA (,%R14,8),%RCX |
(916) 0x4421e4 MOV -0xf0(%RBP),%RDX |
(916) 0x4421eb LEA (%RDX,%R13,8),%RDX |
(916) 0x4421ef XOR %ESI,%ESI |
(916) 0x4421f1 NOPW %CS:(%RAX,%RAX,1) |
(934) 0x442200 MOV (%R9),%RDI |
(934) 0x442203 MOV (%RBX,%RDI,8),%RDI |
(934) 0x442207 ADD %RCX,%RDI |
(934) 0x44220a MOV (%RDI,%RSI,8),%RDI |
(934) 0x44220e LEA (%R13,%RSI,1),%R8 |
(934) 0x442213 MOV %R8,(%R12,%RDI,8) |
(934) 0x442217 MOV %RDI,-0x18(%RDX,%RSI,8) |
(934) 0x44221c MOV (%R9),%RDI |
(934) 0x44221f MOV (%RBX,%RDI,8),%RDI |
(934) 0x442223 ADD %RCX,%RDI |
(934) 0x442226 MOV 0x8(%RDI,%RSI,8),%RDI |
(934) 0x44222b LEA 0x1(%R13,%RSI,1),%R8 |
(934) 0x442230 MOV %R8,(%R12,%RDI,8) |
(934) 0x442234 MOV %RDI,-0x10(%RDX,%RSI,8) |
(934) 0x442239 MOV (%R9),%RDI |
(934) 0x44223c MOV (%RBX,%RDI,8),%RDI |
(934) 0x442240 ADD %RCX,%RDI |
(934) 0x442243 MOV 0x10(%RDI,%RSI,8),%RDI |
(934) 0x442248 LEA 0x2(%R13,%RSI,1),%R8 |
(934) 0x44224d MOV %R8,(%R12,%RDI,8) |
(934) 0x442251 MOV %RDI,-0x8(%RDX,%RSI,8) |
(934) 0x442256 MOV (%R9),%RDI |
(934) 0x442259 MOV (%RBX,%RDI,8),%RDI |
(934) 0x44225d ADD %RCX,%RDI |
(934) 0x442260 MOV 0x18(%RDI,%RSI,8),%RDI |
(934) 0x442265 LEA 0x3(%R13,%RSI,1),%R8 |
(934) 0x44226a MOV %R8,(%R12,%RDI,8) |
(934) 0x44226e MOV %RDI,(%RDX,%RSI,8) |
(934) 0x442272 ADD $0x4,%RSI |
(934) 0x442276 DEC %RAX |
(934) 0x442279 JNE 442200 |
(916) 0x44227b MOV %R10,%RAX |
(916) 0x44227e AND $-0x4,%RAX |
(916) 0x442282 CMP %R10,%RAX |
(916) 0x442285 MOV -0x40(%RBP),%R11 |
(916) 0x442289 MOV -0x98(%RBP),%RCX |
(916) 0x442290 MOV -0x38(%RBP),%RDX |
(916) 0x442294 JE 4422f6 |
(916) 0x442296 ADD %RAX,%R13 |
(916) 0x442299 ADD %RAX,%R14 |
(916) 0x44229c NOPL (%RAX) |
(935) 0x4422a0 MOV (%R9),%RAX |
(935) 0x4422a3 MOV (%RBX,%RAX,8),%RAX |
(935) 0x4422a7 MOV (%RAX,%R14,8),%RAX |
(935) 0x4422ab MOV %R13,(%R12,%RAX,8) |
(935) 0x4422af MOV %RAX,(%RCX,%R13,8) |
(935) 0x4422b3 INC %R13 |
(935) 0x4422b6 INC %R14 |
(935) 0x4422b9 CMP %R13,%RDX |
(935) 0x4422bc JNE 4422a0 |
(916) 0x4422be JMP 4422f6 |
(916) 0x4422c0 MOV -0x98(%RBP),%RDX |
(916) 0x4422c7 NOPW (%RAX,%RAX,1) |
(933) 0x4422d0 MOV (%R9),%RCX |
(933) 0x4422d3 MOV (%RBX,%RCX,8),%RCX |
(933) 0x4422d7 MOV (%RCX,%R14,8),%RCX |
(933) 0x4422db MOV %R13,(%R12,%RCX,8) |
(933) 0x4422df MOVQ $0,(%RAX,%R13,8) |
(933) 0x4422e7 MOV %RCX,(%RDX,%R13,8) |
(933) 0x4422eb INC %R13 |
(933) 0x4422ee INC %R14 |
(933) 0x4422f1 CMP %R13,%RSI |
(933) 0x4422f4 JNE 4422d0 |
(916) 0x4422f6 MOV -0xa8(%RBP),%RAX |
(916) 0x4422fd MOV -0x30(%RBP),%RCX |
(916) 0x442301 MOV (%RAX,%RCX,8),%R14 |
(916) 0x442305 MOV -0x68(%RBP),%RAX |
(916) 0x442309 MOV (%RAX,%RCX,8),%R13 |
(916) 0x44230d MOV 0x8(%RAX,%RCX,8),%RSI |
(916) 0x442312 LEA (%RSI,%R14,1),%RAX |
(916) 0x442316 SUB %R13,%RAX |
(916) 0x442319 CMP %RAX,%R14 |
(916) 0x44231c JGE 442486 |
(916) 0x442322 MOV -0x100(%RBP),%RAX |
(916) 0x442329 MOV (%RAX),%RBX |
(916) 0x44232c MOV -0x58(%RBP),%RAX |
(916) 0x442330 MOV (%RAX),%RAX |
(916) 0x442333 MOV %RSI,%RCX |
(916) 0x442336 SUB %R13,%RCX |
(916) 0x442339 CMP $0xc,%RCX |
(916) 0x44233d JBE 442450 |
(916) 0x442343 MOV %RSI,-0x38(%RBP) |
(916) 0x442347 LEA (%RAX,%R13,8),%RDI |
(916) 0x44234b LEA (,%RCX,8),%RDX |
(916) 0x442353 XOR %ESI,%ESI |
(916) 0x442355 MOV %RCX,-0xa0(%RBP) |
(916) 0x44235c VZEROUPPER |
(916) 0x44235f CALL 4e0070 <__intel_avx_rep_memset> |
(916) 0x442364 MOV -0xa0(%RBP),%R10 |
(916) 0x44236b MOV -0x48(%RBP),%R9 |
(916) 0x44236f MOV %R10,%RAX |
(916) 0x442372 SHR $0x2,%RAX |
(916) 0x442376 LEA (,%R14,8),%RCX |
(916) 0x44237e MOV -0xe8(%RBP),%RDX |
(916) 0x442385 LEA (%RDX,%R13,8),%RDX |
(916) 0x442389 XOR %ESI,%ESI |
(916) 0x44238b NOPL (%RAX,%RAX,1) |
(931) 0x442390 MOV (%R9),%RDI |
(931) 0x442393 MOV (%RBX,%RDI,8),%RDI |
(931) 0x442397 ADD %RCX,%RDI |
(931) 0x44239a MOV (%RDI,%RSI,8),%RDI |
(931) 0x44239e LEA (%R13,%RSI,1),%R8 |
(931) 0x4423a3 MOV %R8,(%R15,%RDI,8) |
(931) 0x4423a7 MOV %RDI,-0x18(%RDX,%RSI,8) |
(931) 0x4423ac MOV (%R9),%RDI |
(931) 0x4423af MOV (%RBX,%RDI,8),%RDI |
(931) 0x4423b3 ADD %RCX,%RDI |
(931) 0x4423b6 MOV 0x8(%RDI,%RSI,8),%RDI |
(931) 0x4423bb LEA 0x1(%R13,%RSI,1),%R8 |
(931) 0x4423c0 MOV %R8,(%R15,%RDI,8) |
(931) 0x4423c4 MOV %RDI,-0x10(%RDX,%RSI,8) |
(931) 0x4423c9 MOV (%R9),%RDI |
(931) 0x4423cc MOV (%RBX,%RDI,8),%RDI |
(931) 0x4423d0 ADD %RCX,%RDI |
(931) 0x4423d3 MOV 0x10(%RDI,%RSI,8),%RDI |
(931) 0x4423d8 LEA 0x2(%R13,%RSI,1),%R8 |
(931) 0x4423dd MOV %R8,(%R15,%RDI,8) |
(931) 0x4423e1 MOV %RDI,-0x8(%RDX,%RSI,8) |
(931) 0x4423e6 MOV (%R9),%RDI |
(931) 0x4423e9 MOV (%RBX,%RDI,8),%RDI |
(931) 0x4423ed ADD %RCX,%RDI |
(931) 0x4423f0 MOV 0x18(%RDI,%RSI,8),%RDI |
(931) 0x4423f5 LEA 0x3(%R13,%RSI,1),%R8 |
(931) 0x4423fa MOV %R8,(%R15,%RDI,8) |
(931) 0x4423fe MOV %RDI,(%RDX,%RSI,8) |
(931) 0x442402 ADD $0x4,%RSI |
(931) 0x442406 DEC %RAX |
(931) 0x442409 JNE 442390 |
(916) 0x44240b MOV %R10,%RAX |
(916) 0x44240e AND $-0x4,%RAX |
(916) 0x442412 CMP %R10,%RAX |
(916) 0x442415 MOV -0x40(%RBP),%R11 |
(916) 0x442419 MOV -0x50(%RBP),%RCX |
(916) 0x44241d MOV -0x38(%RBP),%RDX |
(916) 0x442421 JE 442486 |
(916) 0x442423 ADD %RAX,%R13 |
(916) 0x442426 ADD %RAX,%R14 |
(916) 0x442429 NOPL (%RAX) |
(932) 0x442430 MOV (%R9),%RAX |
(932) 0x442433 MOV (%RBX,%RAX,8),%RAX |
(932) 0x442437 MOV (%RAX,%R14,8),%RAX |
(932) 0x44243b MOV %R13,(%R15,%RAX,8) |
(932) 0x44243f MOV %RAX,(%RCX,%R13,8) |
(932) 0x442443 INC %R13 |
(932) 0x442446 INC %R14 |
(932) 0x442449 CMP %R13,%RDX |
(932) 0x44244c JNE 442430 |
(916) 0x44244e JMP 442486 |
(916) 0x442450 MOV -0x50(%RBP),%RDX |
(916) 0x442454 NOPW %CS:(%RAX,%RAX,1) |
(930) 0x442460 MOV (%R9),%RCX |
(930) 0x442463 MOV (%RBX,%RCX,8),%RCX |
(930) 0x442467 MOV (%RCX,%R14,8),%RCX |
(930) 0x44246b MOV %R13,(%R15,%RCX,8) |
(930) 0x44246f MOVQ $0,(%RAX,%R13,8) |
(930) 0x442477 MOV %RCX,(%RDX,%R13,8) |
(930) 0x44247b INC %R13 |
(930) 0x44247e INC %R14 |
(930) 0x442481 CMP %R13,%RSI |
(930) 0x442484 JNE 442460 |
(916) 0x442486 MOV -0xd0(%RBP),%RCX |
(916) 0x44248d MOV -0x30(%RBP),%RDX |
(916) 0x442491 MOV (%RCX,%RDX,8),%RAX |
(916) 0x442495 MOV 0x8(%RCX,%RDX,8),%RCX |
(916) 0x44249a CMP %RCX,%RAX |
(916) 0x44249d MOV -0xc0(%RBP),%R13 |
(916) 0x4424a4 MOV -0x58(%RBP),%RBX |
(916) 0x4424a8 MOV -0x60(%RBP),%R14 |
(916) 0x4424ac JGE 442500 |
(916) 0x4424ae MOV -0x108(%RBP),%RDX |
(916) 0x4424b5 MOV (%RDX),%RDX |
(916) 0x4424b8 JMP 4424c8 |
0x4424ba NOPW (%RAX,%RAX,1) |
(929) 0x4424c0 INC %RAX |
(929) 0x4424c3 CMP %RCX,%RAX |
(929) 0x4424c6 JGE 442500 |
(929) 0x4424c8 MOV -0x188(%RBP),%RSI |
(929) 0x4424cf MOV (%RSI,%RAX,8),%RSI |
(929) 0x4424d3 MOV (%R9),%RDI |
(929) 0x4424d6 DEC %RDI |
(929) 0x4424d9 CMP %RDI,(%RDX,%RSI,8) |
(929) 0x4424dd JNE 4424c0 |
(929) 0x4424df MOV -0x80(%RBP),%RCX |
(929) 0x4424e3 MOV -0x30(%RBP),%RDI |
(929) 0x4424e7 MOV %RDI,(%RCX,%RSI,8) |
(929) 0x4424eb MOV -0xd0(%RBP),%RCX |
(929) 0x4424f2 MOV 0x8(%RCX,%RDI,8),%RCX |
(929) 0x4424f7 JMP 4424c0 |
0x4424f9 NOPL (%RAX) |
(916) 0x442500 MOV -0xd8(%RBP),%RCX |
(916) 0x442507 MOV -0x30(%RBP),%RDX |
(916) 0x44250b MOV (%RCX,%RDX,8),%RAX |
(916) 0x44250f MOV 0x8(%RCX,%RDX,8),%RCX |
(916) 0x442514 CMP %RCX,%RAX |
(916) 0x442517 MOV -0x138(%RBP),%RDI |
(916) 0x44251e JL 442588 |
(916) 0x442520 MOV -0x120(%RBP),%RAX |
(916) 0x442527 MOV -0x30(%RBP),%RCX |
(916) 0x44252b MOV (%RAX,%RCX,8),%RDX |
(916) 0x44252f MOV 0x8(%RAX,%RCX,8),%RCX |
(916) 0x442534 MOV %RDX,%RAX |
(916) 0x442537 MOV %RDX,-0x38(%RBP) |
(916) 0x44253b INC %RDX |
(916) 0x44253e VXORPD %XMM1,%XMM1,%XMM1 |
(916) 0x442542 VXORPD %XMM0,%XMM0,%XMM0 |
(916) 0x442546 CMP %RCX,%RDX |
(916) 0x442549 JL 442714 |
(916) 0x44254f MOV -0x128(%RBP),%RAX |
(916) 0x442556 MOV -0x30(%RBP),%RDX |
(916) 0x44255a MOV (%RAX,%RDX,8),%RCX |
(916) 0x44255e MOV 0x8(%RAX,%RDX,8),%RDX |
(916) 0x442563 CMP %RDX,%RCX |
(916) 0x442566 JGE 442a90 |
(916) 0x44256c MOV -0x88(%RBP),%RAX |
(916) 0x442573 JMP 4425d6 |
0x442575 NOPW %CS:(%RAX,%RAX,1) |
(928) 0x442580 INC %RAX |
(928) 0x442583 CMP %RCX,%RAX |
(928) 0x442586 JGE 442520 |
(928) 0x442588 MOV -0x190(%RBP),%RDX |
(928) 0x44258f MOV (%RDX,%RAX,8),%RDX |
(928) 0x442593 MOV (%R9),%RSI |
(928) 0x442596 DEC %RSI |
(928) 0x442599 CMP %RSI,(%RDI,%RDX,8) |
(928) 0x44259d JNE 442580 |
(928) 0x44259f MOV -0x78(%RBP),%RCX |
(928) 0x4425a3 MOV -0x30(%RBP),%RSI |
(928) 0x4425a7 MOV %RSI,(%RCX,%RDX,8) |
(928) 0x4425ab MOV -0xd8(%RBP),%RCX |
(928) 0x4425b2 MOV 0x8(%RCX,%RSI,8),%RCX |
(928) 0x4425b7 JMP 442580 |
0x4425b9 NOPL (%RAX) |
(921) 0x4425c0 VADDSD (%R14,%RCX,8),%XMM0,%XMM0 |
(921) 0x4425c6 INC %RCX |
(921) 0x4425c9 CMP %RDX,%RCX |
(921) 0x4425cc MOV -0x48(%RBP),%R9 |
(921) 0x4425d0 JE 442a90 |
(921) 0x4425d6 MOV -0x180(%RBP),%RSI |
(921) 0x4425dd LEA (%RSI,%RCX,8),%RSI |
(921) 0x4425e1 TEST %R13,%R13 |
(921) 0x4425e4 JE 4425f4 |
(921) 0x4425e6 MOV (%RSI),%RSI |
(921) 0x4425e9 MOV -0x168(%RBP),%RDI |
(921) 0x4425f0 LEA (%RDI,%RSI,8),%RSI |
(921) 0x4425f4 MOV (%RSI),%RDI |
(921) 0x4425f7 TEST %RDI,%RDI |
(921) 0x4425fa JS 4426b0 |
(921) 0x442600 MOV -0x78(%RBP),%RSI |
(921) 0x442604 MOV -0x30(%RBP),%R8 |
(921) 0x442608 CMP %R8,(%RSI,%RDI,8) |
(921) 0x44260c JNE 4426b0 |
(921) 0x442612 MOV -0x158(%RBP),%RSI |
(921) 0x442619 MOV 0x8(%RSI,%RDI,8),%RSI |
(921) 0x44261e TEST %RSI,%RSI |
(921) 0x442621 JLE 4425c6 |
(921) 0x442623 MOV -0x148(%RBP),%R8 |
(921) 0x44262a MOV (%R8,%RDI,8),%RDI |
(921) 0x44262e ADD %RDI,%RSI |
(921) 0x442631 MOV -0x150(%RBP),%R8 |
(921) 0x442638 MOV (%R8),%R8 |
(921) 0x44263b MOV (%R9),%R9 |
(921) 0x44263e MOV (%R8,%R9,8),%R8 |
(921) 0x442642 NOPW %CS:(%RAX,%RAX,1) |
(922) 0x442650 MOV (%R8,%RDI,8),%R9 |
(922) 0x442654 VMOVSD (%R11,%RDI,8),%XMM2 |
(922) 0x44265a VMULSD (%R14,%RCX,8),%XMM2,%XMM18 |
(922) 0x442661 TEST %R9,%R9 |
(922) 0x442664 LEA (%R15,%R9,8),%R10 |
(922) 0x442668 NOT %R9 |
(922) 0x44266b LEA (%R12,%R9,8),%R9 |
(922) 0x44266f CMOVNS %R10,%R9 |
(922) 0x442673 MOV %RBX,%R10 |
(922) 0x442676 CMOVS %RAX,%R10 |
(922) 0x44267a MOV (%R10),%R10 |
(922) 0x44267d MOV (%R9),%R9 |
(922) 0x442680 VADDSD (%R10,%R9,8),%XMM18,%XMM2 |
(922) 0x442687 VMOVSD %XMM2,(%R10,%R9,8) |
(922) 0x44268d VADDSD %XMM1,%XMM18,%XMM1 |
(922) 0x442693 VADDSD %XMM0,%XMM18,%XMM0 |
(922) 0x442699 INC %RDI |
(922) 0x44269c CMP %RSI,%RDI |
(922) 0x44269f JL 442650 |
(921) 0x4426a1 JMP 4425c6 |
0x4426a6 NOPW %CS:(%RAX,%RAX,1) |
(921) 0x4426b0 MOV -0x170(%RBP),%RSI |
(921) 0x4426b7 CMPQ $-0x3,(%RSI,%RDI,8) |
(921) 0x4426bc JE 4425c6 |
(921) 0x4426c2 CMPQ $0x1,-0xe0(%RBP) |
(921) 0x4426ca JE 4425c0 |
(921) 0x4426d0 MOV -0x140(%RBP),%RSI |
(921) 0x4426d7 MOV (%RSI,%RDI,8),%RSI |
(921) 0x4426db MOV -0xc8(%RBP),%RDI |
(921) 0x4426e2 MOV -0x30(%RBP),%R8 |
(921) 0x4426e6 CMP (%RDI,%R8,8),%RSI |
(921) 0x4426ea JE 4425c0 |
(921) 0x4426f0 JMP 4425c6 |
0x4426f5 NOPW %CS:(%RAX,%RAX,1) |
(923) 0x442700 MOV -0x40(%RBP),%R11 |
(923) 0x442704 INC %RDX |
(923) 0x442707 CMP %RCX,%RDX |
(923) 0x44270a MOV -0x48(%RBP),%R9 |
(923) 0x44270e JE 44254f |
(923) 0x442714 MOV -0x178(%RBP),%RAX |
(923) 0x44271b MOV (%RAX,%RDX,8),%RSI |
(923) 0x44271f MOV -0x80(%RBP),%RAX |
(923) 0x442723 MOV -0x30(%RBP),%RDI |
(923) 0x442727 CMP %RDI,(%RAX,%RSI,8) |
(923) 0x44272b MOV -0x98(%RBP),%RAX |
(923) 0x442732 JNE 442770 |
(923) 0x442734 MOV -0x70(%RBP),%R8 |
(923) 0x442738 MOV (%R8,%RSI,8),%RDI |
(923) 0x44273c MOV 0x8(%R8,%RSI,8),%R8 |
(923) 0x442741 MOV %R8,%R11 |
(923) 0x442744 SUB %RDI,%R11 |
(923) 0x442747 JLE 442906 |
(923) 0x44274d MOV -0x90(%RBP),%R9 |
(923) 0x442754 MOV (%R9),%R9 |
(923) 0x442757 MOV -0x88(%RBP),%R10 |
(923) 0x44275e MOV (%R10),%R10 |
(923) 0x442761 CMP $0x4,%R11 |
(923) 0x442765 JAE 4427b5 |
(923) 0x442767 JMP 442894 |
0x44276c NOPL (%RAX) |
(923) 0x442770 MOV -0x160(%RBP),%RDI |
(923) 0x442777 CMPQ $-0x3,(%RDI,%RSI,8) |
(923) 0x44277c JE 442704 |
(923) 0x44277e CMPQ $0x1,-0xe0(%RBP) |
(923) 0x442786 JE 4427a1 |
(923) 0x442788 MOV -0xc8(%RBP),%R8 |
(923) 0x44278f MOV -0x30(%RBP),%RAX |
(923) 0x442793 MOV (%R8,%RAX,8),%RDI |
(923) 0x442797 CMP (%R8,%RSI,8),%RDI |
(923) 0x44279b JNE 442704 |
(923) 0x4427a1 MOV -0x90(%RBP),%RAX |
(923) 0x4427a8 MOV (%RAX),%RSI |
(923) 0x4427ab VADDSD (%RSI,%RDX,8),%XMM0,%XMM0 |
(923) 0x4427b0 JMP 442704 |
(923) 0x4427b5 MOV %R11,%RBX |
(923) 0x4427b8 SHR $0x2,%RBX |
(923) 0x4427bc LEA 0x18(,%RDI,8),%R14 |
(923) 0x4427c4 NOPW %CS:(%RAX,%RAX,1) |
(926) 0x4427d0 MOV -0x18(%RAX,%R14,1),%R13 |
(926) 0x4427d5 VMOVSD -0x18(%R10,%R14,1),%XMM2 |
(926) 0x4427dc VMOVSD (%R9,%RDX,8),%XMM3 |
(926) 0x4427e2 MOV (%R12,%R13,8),%R13 |
(926) 0x4427e6 VMOVSD (%R10,%R13,8),%XMM4 |
(926) 0x4427ec VFMADD231SD %XMM2,%XMM3,%XMM4 |
(926) 0x4427f1 VMOVSD %XMM4,(%R10,%R13,8) |
(926) 0x4427f7 MOV -0x10(%RAX,%R14,1),%R13 |
(926) 0x4427fc VMOVSD -0x10(%R10,%R14,1),%XMM4 |
(926) 0x442803 VMOVSD (%R9,%RDX,8),%XMM5 |
(926) 0x442809 MOV (%R12,%R13,8),%R13 |
(926) 0x44280d VMOVSD (%R10,%R13,8),%XMM6 |
(926) 0x442813 VFMADD231SD %XMM4,%XMM5,%XMM6 |
(926) 0x442818 VMOVSD %XMM6,(%R10,%R13,8) |
(926) 0x44281e VMOVSD -0x8(%R10,%R14,1),%XMM6 |
(926) 0x442825 VMULSD (%R9,%RDX,8),%XMM6,%XMM6 |
(926) 0x44282b MOV -0x8(%RAX,%R14,1),%R13 |
(926) 0x442830 MOV (%R12,%R13,8),%R13 |
(926) 0x442834 VADDSD (%R10,%R13,8),%XMM6,%XMM7 |
(926) 0x44283a VMOVSD %XMM7,(%R10,%R13,8) |
(926) 0x442840 VFMADD213SD %XMM6,%XMM5,%XMM4 |
(926) 0x442845 MOV (%RAX,%R14,1),%R13 |
(926) 0x442849 VMOVSD (%R10,%R14,1),%XMM5 |
(926) 0x44284f VMULSD (%R9,%RDX,8),%XMM5,%XMM18 |
(926) 0x442856 MOV (%R12,%R13,8),%R13 |
(926) 0x44285a VADDSD (%R10,%R13,8),%XMM18,%XMM5 |
(926) 0x442861 VMOVSD %XMM5,(%R10,%R13,8) |
(926) 0x442867 VADDSD %XMM1,%XMM4,%XMM1 |
(926) 0x44286b VMOVAPD %XMM2,%XMM5 |
(926) 0x44286f VFMADD213SD %XMM18,%XMM3,%XMM5 |
(926) 0x442875 VADDSD %XMM1,%XMM5,%XMM1 |
(926) 0x442879 VADDSD %XMM0,%XMM4,%XMM0 |
(926) 0x44287d VFMADD213SD %XMM18,%XMM3,%XMM2 |
(926) 0x442883 VADDSD %XMM0,%XMM2,%XMM0 |
(926) 0x442887 ADD $0x20,%R14 |
(926) 0x44288b DEC %RBX |
(926) 0x44288e JNE 4427d0 |
(923) 0x442894 MOV %R11,%RBX |
(923) 0x442897 AND $-0x4,%RBX |
(923) 0x44289b CMP %R11,%RBX |
(923) 0x44289e JNE 4428b1 |
(923) 0x4428a0 MOV -0xc0(%RBP),%R13 |
(923) 0x4428a7 MOV -0x58(%RBP),%RBX |
(923) 0x4428ab MOV -0x60(%RBP),%R14 |
(923) 0x4428af JMP 442906 |
(923) 0x4428b1 ADD %RBX,%RDI |
(923) 0x4428b4 MOV -0xc0(%RBP),%R13 |
(923) 0x4428bb MOV -0x58(%RBP),%RBX |
(923) 0x4428bf MOV -0x60(%RBP),%R14 |
(923) 0x4428c3 NOPW %CS:(%RAX,%RAX,1) |
(927) 0x4428d0 MOV (%RAX,%RDI,8),%R11 |
(927) 0x4428d4 VMOVSD (%R10,%RDI,8),%XMM2 |
(927) 0x4428da VMULSD (%R9,%RDX,8),%XMM2,%XMM18 |
(927) 0x4428e1 MOV (%R12,%R11,8),%R11 |
(927) 0x4428e5 VADDSD (%R10,%R11,8),%XMM18,%XMM2 |
(927) 0x4428ec VMOVSD %XMM2,(%R10,%R11,8) |
(927) 0x4428f2 VADDSD %XMM1,%XMM18,%XMM1 |
(927) 0x4428f8 VADDSD %XMM0,%XMM18,%XMM0 |
(927) 0x4428fe INC %RDI |
(927) 0x442901 CMP %RDI,%R8 |
(927) 0x442904 JNE 4428d0 |
(923) 0x442906 MOV -0x68(%RBP),%RAX |
(923) 0x44290a MOV (%RAX,%RSI,8),%RDI |
(923) 0x44290e MOV 0x8(%RAX,%RSI,8),%RSI |
(923) 0x442913 MOV %RSI,%R10 |
(923) 0x442916 SUB %RDI,%R10 |
(923) 0x442919 JLE 442700 |
(923) 0x44291f MOV -0x90(%RBP),%RAX |
(923) 0x442926 MOV (%RAX),%R8 |
(923) 0x442929 MOV (%RBX),%R9 |
(923) 0x44292c CMP $0x4,%R10 |
(923) 0x442930 JAE 442937 |
(923) 0x442932 JMP 442a14 |
(923) 0x442937 MOV %R10,%R11 |
(923) 0x44293a SHR $0x2,%R11 |
(923) 0x44293e LEA 0x18(,%RDI,8),%RBX |
(923) 0x442946 MOV -0x50(%RBP),%RAX |
(923) 0x44294a NOPW (%RAX,%RAX,1) |
(924) 0x442950 MOV -0x18(%RAX,%RBX,1),%R14 |
(924) 0x442955 VMOVSD -0x18(%R9,%RBX,1),%XMM2 |
(924) 0x44295c VMOVSD (%R8,%RDX,8),%XMM3 |
(924) 0x442962 MOV (%R15,%R14,8),%R14 |
(924) 0x442966 VMOVSD (%R9,%R14,8),%XMM4 |
(924) 0x44296c VFMADD231SD %XMM2,%XMM3,%XMM4 |
(924) 0x442971 VMOVSD %XMM4,(%R9,%R14,8) |
(924) 0x442977 MOV -0x10(%RAX,%RBX,1),%R14 |
(924) 0x44297c VMOVSD -0x10(%R9,%RBX,1),%XMM4 |
(924) 0x442983 VMOVSD (%R8,%RDX,8),%XMM5 |
(924) 0x442989 MOV (%R15,%R14,8),%R14 |
(924) 0x44298d VMOVSD (%R9,%R14,8),%XMM6 |
(924) 0x442993 VFMADD231SD %XMM4,%XMM5,%XMM6 |
(924) 0x442998 VMOVSD %XMM6,(%R9,%R14,8) |
(924) 0x44299e VMOVSD -0x8(%R9,%RBX,1),%XMM6 |
(924) 0x4429a5 VMULSD (%R8,%RDX,8),%XMM6,%XMM6 |
(924) 0x4429ab MOV -0x8(%RAX,%RBX,1),%R14 |
(924) 0x4429b0 MOV (%R15,%R14,8),%R14 |
(924) 0x4429b4 VADDSD (%R9,%R14,8),%XMM6,%XMM7 |
(924) 0x4429ba VMOVSD %XMM7,(%R9,%R14,8) |
(924) 0x4429c0 VFMADD213SD %XMM6,%XMM5,%XMM4 |
(924) 0x4429c5 MOV (%RAX,%RBX,1),%R14 |
(924) 0x4429c9 VMOVSD (%R9,%RBX,1),%XMM5 |
(924) 0x4429cf VMULSD (%R8,%RDX,8),%XMM5,%XMM18 |
(924) 0x4429d6 MOV (%R15,%R14,8),%R14 |
(924) 0x4429da VADDSD (%R9,%R14,8),%XMM18,%XMM5 |
(924) 0x4429e1 VMOVSD %XMM5,(%R9,%R14,8) |
(924) 0x4429e7 VADDSD %XMM1,%XMM4,%XMM1 |
(924) 0x4429eb VMOVAPD %XMM2,%XMM5 |
(924) 0x4429ef VFMADD213SD %XMM18,%XMM3,%XMM5 |
(924) 0x4429f5 VADDSD %XMM1,%XMM5,%XMM1 |
(924) 0x4429f9 VADDSD %XMM0,%XMM4,%XMM0 |
(924) 0x4429fd VFMADD213SD %XMM18,%XMM3,%XMM2 |
(924) 0x442a03 VADDSD %XMM0,%XMM2,%XMM0 |
(924) 0x442a07 ADD $0x20,%RBX |
(924) 0x442a0b DEC %R11 |
(924) 0x442a0e JNE 442950 |
(923) 0x442a14 MOV %R10,%R11 |
(923) 0x442a17 AND $-0x4,%R11 |
(923) 0x442a1b CMP %R10,%R11 |
(923) 0x442a1e JNE 442a31 |
(923) 0x442a20 MOV -0x40(%RBP),%R11 |
(923) 0x442a24 MOV -0x58(%RBP),%RBX |
(923) 0x442a28 MOV -0x60(%RBP),%R14 |
(923) 0x442a2c JMP 442704 |
(923) 0x442a31 ADD %R11,%RDI |
(923) 0x442a34 MOV -0x40(%RBP),%R11 |
(923) 0x442a38 MOV -0x50(%RBP),%RAX |
(923) 0x442a3c MOV -0x58(%RBP),%RBX |
(923) 0x442a40 MOV -0x60(%RBP),%R14 |
(923) 0x442a44 NOPW %CS:(%RAX,%RAX,1) |
(925) 0x442a50 MOV (%RAX,%RDI,8),%R10 |
(925) 0x442a54 VMOVSD (%R9,%RDI,8),%XMM2 |
(925) 0x442a5a VMULSD (%R8,%RDX,8),%XMM2,%XMM18 |
(925) 0x442a61 MOV (%R15,%R10,8),%R10 |
(925) 0x442a65 VADDSD (%R9,%R10,8),%XMM18,%XMM2 |
(925) 0x442a6c VMOVSD %XMM2,(%R9,%R10,8) |
(925) 0x442a72 VADDSD %XMM1,%XMM18,%XMM1 |
(925) 0x442a78 VADDSD %XMM0,%XMM18,%XMM0 |
(925) 0x442a7e INC %RDI |
(925) 0x442a81 CMP %RDI,%RSI |
(925) 0x442a84 JNE 442a50 |
(923) 0x442a86 JMP 442704 |
0x442a8b NOPL (%RAX,%RAX,1) |
(916) 0x442a90 MOV -0x110(%RBP),%RAX |
(916) 0x442a97 MOV -0x38(%RBP),%RCX |
(916) 0x442a9b VMULSD (%RAX,%RCX,8),%XMM1,%XMM1 |
(916) 0x442aa0 VUCOMISD %XMM16,%XMM1 |
(916) 0x442aa6 JE 442ab4 |
(916) 0x442aa8 VXORPD %XMM17,%XMM0,%XMM0 |
(916) 0x442aae VDIVSD %XMM1,%XMM0,%XMM18 |
(916) 0x442ab4 MOV -0x70(%RBP),%RAX |
(916) 0x442ab8 MOV -0x30(%RBP),%RCX |
(916) 0x442abc MOV (%RAX,%RCX,8),%RSI |
(916) 0x442ac0 MOV 0x8(%RAX,%RCX,8),%RAX |
(916) 0x442ac5 MOV %RAX,%RDI |
(916) 0x442ac8 SUB %RSI,%RDI |
(916) 0x442acb JLE 442b44 |
(916) 0x442acd MOV -0x88(%RBP),%RCX |
(916) 0x442ad4 MOV (%RCX),%RCX |
(916) 0x442ad7 MOV %RDI,%RDX |
(916) 0x442ada AND $-0x4,%RDX |
(916) 0x442ade JE 442b20 |
(916) 0x442ae0 LEA -0x1(%RDX),%R8 |
(916) 0x442ae4 VBROADCASTSD %XMM18,%YMM0 |
(916) 0x442aea LEA (%RCX,%RSI,8),%R9 |
(916) 0x442aee XOR %R10D,%R10D |
(916) 0x442af1 NOPW %CS:(%RAX,%RAX,1) |
(920) 0x442b00 VMULPD (%R9,%R10,8),%YMM0,%YMM1 |
(920) 0x442b06 VMOVUPD %YMM1,(%R9,%R10,8) |
(920) 0x442b0c ADD $0x4,%R10 |
(920) 0x442b10 CMP %R8,%R10 |
(920) 0x442b13 JBE 442b00 |
(916) 0x442b15 CMP %RDX,%RDI |
(916) 0x442b18 MOV -0x48(%RBP),%R9 |
(916) 0x442b1c JNE 442b22 |
(916) 0x442b1e JMP 442b44 |
(916) 0x442b20 XOR %EDX,%EDX |
(916) 0x442b22 ADD %RSI,%RDX |
(916) 0x442b25 NOPW %CS:(%RAX,%RAX,1) |
(919) 0x442b30 VMULSD (%RCX,%RDX,8),%XMM18,%XMM0 |
(919) 0x442b37 VMOVSD %XMM0,(%RCX,%RDX,8) |
(919) 0x442b3c INC %RDX |
(919) 0x442b3f CMP %RDX,%RAX |
(919) 0x442b42 JNE 442b30 |
(916) 0x442b44 MOV -0x68(%RBP),%RAX |
(916) 0x442b48 MOV -0x30(%RBP),%RCX |
(916) 0x442b4c MOV (%RAX,%RCX,8),%RSI |
(916) 0x442b50 MOV 0x8(%RAX,%RCX,8),%RAX |
(916) 0x442b55 MOV %RAX,%RDI |
(916) 0x442b58 SUB %RSI,%RDI |
(916) 0x442b5b JLE 442130 |
(916) 0x442b61 MOV (%RBX),%RCX |
(916) 0x442b64 MOV %RDI,%RDX |
(916) 0x442b67 AND $-0x4,%RDX |
(916) 0x442b6b JE 442ba4 |
(916) 0x442b6d LEA -0x1(%RDX),%R8 |
(916) 0x442b71 VBROADCASTSD %XMM18,%YMM0 |
(916) 0x442b77 LEA (%RCX,%RSI,8),%R9 |
(916) 0x442b7b XOR %R10D,%R10D |
(916) 0x442b7e XCHG %AX,%AX |
(918) 0x442b80 VMULPD (%R9,%R10,8),%YMM0,%YMM1 |
(918) 0x442b86 VMOVUPD %YMM1,(%R9,%R10,8) |
(918) 0x442b8c ADD $0x4,%R10 |
(918) 0x442b90 CMP %R8,%R10 |
(918) 0x442b93 JBE 442b80 |
(916) 0x442b95 CMP %RDX,%RDI |
(916) 0x442b98 MOV -0x48(%RBP),%R9 |
(916) 0x442b9c JE 442130 |
(916) 0x442ba2 JMP 442ba6 |
(916) 0x442ba4 XOR %EDX,%EDX |
(916) 0x442ba6 ADD %RSI,%RDX |
(916) 0x442ba9 NOPL (%RAX) |
(917) 0x442bb0 VMULSD (%RCX,%RDX,8),%XMM18,%XMM0 |
(917) 0x442bb7 VMOVSD %XMM0,(%RCX,%RDX,8) |
(917) 0x442bbc INC %RDX |
(917) 0x442bbf CMP %RDX,%RAX |
(917) 0x442bc2 JNE 442bb0 |
(916) 0x442bc4 JMP 442130 |
0x442bc9 MOV -0x80(%RBP),%RDI |
0x442bcd VZEROUPPER |
0x442bd0 CALL 4d5200 <hypre_Free> |
0x442bd5 MOV -0x78(%RBP),%RDI |
0x442bd9 CALL 4d5200 <hypre_Free> |
0x442bde MOV %R12,%RDI |
0x442be1 CALL 4d5200 <hypre_Free> |
0x442be6 MOV %R15,%RDI |
0x442be9 ADD $0x168,%RSP |
0x442bf0 POP %RBX |
0x442bf1 POP %R12 |
0x442bf3 POP %R13 |
0x442bf5 POP %R14 |
0x442bf7 POP %R15 |
0x442bf9 POP %RBP |
0x442bfa JMP 4d5200 |
0x442bff NOP |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Source file and lines | par_multi_interp.c:1737-1881 |
Module | exec |
nb instructions | 210 |
nb uops | 227 |
loop length | 1012 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 82 |
micro-operation queue | 37.83 cycles |
front end | 37.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 7.10 | 8.00 | 25.00 | 25.00 | 32.50 | 7.00 | 6.90 | 32.50 | 32.50 | 32.50 | 7.00 | 25.00 |
cycles | 7.10 | 11.40 | 25.00 | 25.00 | 32.50 | 7.00 | 6.90 | 32.50 | 32.50 | 32.50 | 7.00 | 25.00 |
Cycles executing div or sqrt instructions | 16.00 |
FE+BE cycles | 35.88-35.94 |
Stall cycles | 0.00 |
Front-end | 37.83 |
Dispatch | 32.50 |
DIV/SQRT | 16.00 |
Overall L1 | 37.83 |
all | 1% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 4% |
all | 50% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 2% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 8% |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 18% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 9% |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x168,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0x160(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x138(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x130(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x128(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x120(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x138(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x118(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x110(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x108(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x100(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xf8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xf0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x168(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x158(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x150(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x140(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x170(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x148(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x80(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x190(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x188(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x180(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x178(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x120(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R14),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 441f84 <hypre_BoomerAMGBuildMultipass.extracted.28+0x1f4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4d5130 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 441f8c <hypre_BoomerAMGBuildMultipass.extracted.28+0x1fc> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOVQ $0,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RBX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 441fa4 <hypre_BoomerAMGBuildMultipass.extracted.28+0x214> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4d5130 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 441fac <hypre_BoomerAMGBuildMultipass.extracted.28+0x21c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOVQ $0,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R12),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 441fc4 <hypre_BoomerAMGBuildMultipass.extracted.28+0x234> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4d5130 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 441fc7 <hypre_BoomerAMGBuildMultipass.extracted.28+0x237> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R15,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %R13,%R15 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4d5130 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMPQ $0,(%R14) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JLE 442000 <hypre_BoomerAMGBuildMultipass.extracted.28+0x270> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMPQ $0,(%RBX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JLE 442020 <hypre_BoomerAMGBuildMultipass.extracted.28+0x290> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 4d6df0 <hypre_GetThreadNum> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4d6de0 <hypre_NumActiveThreads> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R9),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RDX,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
OR %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x20,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
JE 44205f <hypre_BoomerAMGBuildMultipass.extracted.28+0x2cf> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RSI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %RCX | 5 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 10 |
JMP 442065 <hypre_BoomerAMGBuildMultipass.extracted.28+0x2d5> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %ESI,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
DIV %ECX | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV -0x40(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %RBX,%R8 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
DEC %RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x1(%RBX),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL %RAX,%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
CMP %RCX,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVE %RSI,%R10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R10,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R10,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 442bc9 <hypre_BoomerAMGBuildMultipass.extracted.28+0xe39> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RDI,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xa8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x98(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x18,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x18(%RDX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VXORPD %XMM16,%XMM16,%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVDDUP 0xa0a00(%RIP),%XMM17 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 442147 <hypre_BoomerAMGBuildMultipass.extracted.28+0x3b7> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x80(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 4d5200 <hypre_Free> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x78(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 4d5200 <hypre_Free> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4d5200 <hypre_Free> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD $0x168,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP 4d5200 <hypre_Free> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | par_multi_interp.c:1737-1881 |
Module | exec |
nb instructions | 210 |
nb uops | 227 |
loop length | 1012 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 82 |
micro-operation queue | 37.83 cycles |
front end | 37.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 7.10 | 8.00 | 25.00 | 25.00 | 32.50 | 7.00 | 6.90 | 32.50 | 32.50 | 32.50 | 7.00 | 25.00 |
cycles | 7.10 | 11.40 | 25.00 | 25.00 | 32.50 | 7.00 | 6.90 | 32.50 | 32.50 | 32.50 | 7.00 | 25.00 |
Cycles executing div or sqrt instructions | 16.00 |
FE+BE cycles | 35.88-35.94 |
Stall cycles | 0.00 |
Front-end | 37.83 |
Dispatch | 32.50 |
DIV/SQRT | 16.00 |
Overall L1 | 37.83 |
all | 1% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 4% |
all | 50% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 2% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 8% |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 18% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 9% |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x168,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0x160(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x138(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x130(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x128(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x120(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x138(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x118(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x110(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x108(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x100(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xf8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xf0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x168(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x158(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x150(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x140(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x170(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x148(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x80(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x190(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x188(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x180(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x178(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x120(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R14),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 441f84 <hypre_BoomerAMGBuildMultipass.extracted.28+0x1f4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4d5130 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 441f8c <hypre_BoomerAMGBuildMultipass.extracted.28+0x1fc> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOVQ $0,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RBX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 441fa4 <hypre_BoomerAMGBuildMultipass.extracted.28+0x214> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4d5130 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 441fac <hypre_BoomerAMGBuildMultipass.extracted.28+0x21c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOVQ $0,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R12),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 441fc4 <hypre_BoomerAMGBuildMultipass.extracted.28+0x234> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4d5130 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 441fc7 <hypre_BoomerAMGBuildMultipass.extracted.28+0x237> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R15,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %R13,%R15 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4d5130 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMPQ $0,(%R14) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JLE 442000 <hypre_BoomerAMGBuildMultipass.extracted.28+0x270> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMPQ $0,(%RBX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JLE 442020 <hypre_BoomerAMGBuildMultipass.extracted.28+0x290> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 4d6df0 <hypre_GetThreadNum> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4d6de0 <hypre_NumActiveThreads> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R9),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RDX,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
OR %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x20,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
JE 44205f <hypre_BoomerAMGBuildMultipass.extracted.28+0x2cf> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RSI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %RCX | 5 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 10 |
JMP 442065 <hypre_BoomerAMGBuildMultipass.extracted.28+0x2d5> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %ESI,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
DIV %ECX | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV -0x40(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %RBX,%R8 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
DEC %RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x1(%RBX),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL %RAX,%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
CMP %RCX,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVE %RSI,%R10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R10,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R10,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 442bc9 <hypre_BoomerAMGBuildMultipass.extracted.28+0xe39> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RDI,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xa8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x98(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x18,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x18(%RDX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VXORPD %XMM16,%XMM16,%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVDDUP 0xa0a00(%RIP),%XMM17 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 442147 <hypre_BoomerAMGBuildMultipass.extracted.28+0x3b7> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x80(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 4d5200 <hypre_Free> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x78(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 4d5200 <hypre_Free> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4d5200 <hypre_Free> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD $0x168,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP 4d5200 <hypre_Free> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼hypre_BoomerAMGBuildMultipass.extracted.28– | 2.06 | 0.31 |
○Loop 937 - par_multi_interp.c:1760-1761 - exec | 0.21 | 0.03 |
▼Loop 916 - par_multi_interp.c:1747-1876 - exec– | 0.19 | 0.02 |
▼Loop 923 - par_multi_interp.c:1747-1865 - exec– | 0.71 | 0.09 |
○Loop 927 - par_multi_interp.c:1816-1822 - exec | 0.39 | 0.05 |
○Loop 926 - par_multi_interp.c:1816-1822 - exec | 0 | 0 |
○Loop 925 - par_multi_interp.c:1824-1830 - exec | 0 | 0 |
○Loop 924 - par_multi_interp.c:1824-1830 - exec | 0 | 0 |
○Loop 929 - par_multi_interp.c:1799-1803 - exec | 0.5 | 0.06 |
○Loop 933 - par_multi_interp.c:1782-1787 - exec | 0.05 | 0.01 |
○Loop 919 - par_multi_interp.c:1873-1874 - exec | 0.01 | 0 |
○Loop 918 - par_multi_interp.c:1875-1876 - exec | 0 | 0 |
○Loop 934 - par_multi_interp.c:1782-1787 - exec | 0 | 0 |
○Loop 917 - par_multi_interp.c:1875-1876 - exec | 0 | 0 |
○Loop 932 - par_multi_interp.c:1792-1797 - exec | 0 | 0 |
○Loop 928 - par_multi_interp.c:1805-1809 - exec | 0 | 0 |
○Loop 935 - par_multi_interp.c:1782-1787 - exec | 0 | 0 |
○Loop 931 - par_multi_interp.c:1792-1797 - exec | 0 | 0 |
▼Loop 921 - par_multi_interp.c:1836-1867 - exec– | 0 | 0 |
○Loop 922 - par_multi_interp.c:1851-1860 - exec | 0 | 0 |
○Loop 930 - par_multi_interp.c:1792-1797 - exec | 0 | 0 |
○Loop 920 - par_multi_interp.c:1873-1874 - exec | 0 | 0 |
○Loop 936 - par_multi_interp.c:1762-1763 - exec | 0 | 0 |