Loop Id: 536 | Module: exec | Source: par_interp.c:3184-3187 | Coverage: 0.01% |
---|
Loop Id: 536 | Module: exec | Source: par_interp.c:3184-3187 | Coverage: 0.01% |
---|
0x430ab0 LEA 0x1(%R15),%RAX |
0x430ab4 CMP %RBX,%R15 |
0x430ab7 MOV %RAX,%R15 |
0x430aba JGE 430a50 |
0x430abc VMOVSD (%R14,%R15,8),%XMM0 [2] |
0x430ac2 VMOVUPD -0x40(%RBP),%XMM2 [3] |
0x430ac7 VANDPD %XMM2,%XMM0,%XMM0 |
0x430acb VMOVSD (%R14,%R12,8),%XMM1 [1] |
0x430ad1 VANDPD %XMM2,%XMM1,%XMM1 |
0x430ad5 VUCOMISD %XMM1,%XMM0 |
0x430ad9 JBE 430ab0 |
0x430adb INC %R13 |
0x430ade MOV -0x30(%RBP),%RDI [3] |
0x430ae2 MOV %R14,%RSI |
0x430ae5 MOV %R13,%RDX |
0x430ae8 MOV %R15,%RCX |
0x430aeb CALL 4d5cb0 <hypre_swap2> |
0x430af0 JMP 430ab0 |
/scratch_na/users/xoserete/qaas_runs/171-172-8217/intel/AMG/build/AMG/AMG/parcsr_ls/par_interp.c: 3184 - 3187 |
-------------------------------------------------------------------------------- |
3184: for (i = left+1; i <= right; i++) |
3185: if (fabs(w[i]) > fabs(w[left])) |
3186: { |
3187: hypre_swap2(v, w, ++last, i); |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.58 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 7.49 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.67 |
Bottlenecks | |
Function | hypre_qsort2abs |
Source | par_interp.c:3184-3187 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 2.50 |
CQA cycles if no scalar integer | 1.58 |
CQA cycles if FP arith vectorized | 2.50 |
CQA cycles if fully vectorized | 0.33 |
Front-end cycles | 2.50 |
DIV/SQRT cycles | 1.50 |
P0 cycles | 1.00 |
P1 cycles | 1.17 |
P2 cycles | 1.17 |
P3 cycles | 0.25 |
P4 cycles | 1.00 |
P5 cycles | 1.50 |
P6 cycles | 0.25 |
P7 cycles | 0.25 |
P8 cycles | 0.25 |
P9 cycles | 1.00 |
P10 cycles | 1.17 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 2.55 |
Stall cycles (UFS) | 0.00 |
Nb insns | 14.50 |
Nb uops | 15.00 |
Nb loads | 3.50 |
Nb stores | 0.00 |
Nb stack references | 1.50 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 15.04 |
Bytes prefetched | 0.00 |
Bytes loaded | 36.00 |
Bytes stored | 0.00 |
Stride 0 | 2.00 |
Stride 1 | 0.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 1.00 |
Vectorization ratio all | 38.64 |
Vectorization ratio load | 29.17 |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 47.62 |
Vector-efficiency ratio all | 17.33 |
Vector-efficiency ratio load | 16.15 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 18.45 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 2.11 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 7.58 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 2.11 |
Bottlenecks | micro-operation queue, |
Function | hypre_qsort2abs |
Source | par_interp.c:3184-3187 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 3.17 |
CQA cycles if no scalar integer | 1.50 |
CQA cycles if FP arith vectorized | 3.17 |
CQA cycles if fully vectorized | 0.42 |
Front-end cycles | 3.17 |
DIV/SQRT cycles | 1.50 |
P0 cycles | 1.00 |
P1 cycles | 1.33 |
P2 cycles | 1.33 |
P3 cycles | 0.50 |
P4 cycles | 1.00 |
P5 cycles | 1.50 |
P6 cycles | 0.50 |
P7 cycles | 0.50 |
P8 cycles | 0.50 |
P9 cycles | 1.00 |
P10 cycles | 1.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 3.13 |
Stall cycles (UFS) | 0.00 |
Nb insns | 18.00 |
Nb uops | 19.00 |
Nb loads | 4.00 |
Nb stores | 0.00 |
Nb stack references | 2.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 12.63 |
Bytes prefetched | 0.00 |
Bytes loaded | 40.00 |
Bytes stored | 0.00 |
Stride 0 | 2.00 |
Stride 1 | 0.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 1.00 |
Vectorization ratio all | 27.27 |
Vectorization ratio load | 25.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 28.57 |
Vector-efficiency ratio all | 15.91 |
Vector-efficiency ratio load | 15.63 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 16.07 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.10 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 7.33 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.22 |
Bottlenecks | micro-operation queue, |
Function | hypre_qsort2abs |
Source | par_interp.c:3184-3187 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 1.83 |
CQA cycles if no scalar integer | 1.67 |
CQA cycles if FP arith vectorized | 1.83 |
CQA cycles if fully vectorized | 0.25 |
Front-end cycles | 1.83 |
DIV/SQRT cycles | 1.50 |
P0 cycles | 1.00 |
P1 cycles | 1.00 |
P2 cycles | 1.00 |
P3 cycles | 0.00 |
P4 cycles | 1.00 |
P5 cycles | 1.50 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 1.00 |
P10 cycles | 1.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 1.97 |
Stall cycles (UFS) | 0.00 |
Nb insns | 11.00 |
Nb uops | 11.00 |
Nb loads | 3.00 |
Nb stores | 0.00 |
Nb stack references | 1.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 17.45 |
Bytes prefetched | 0.00 |
Bytes loaded | 32.00 |
Bytes stored | 0.00 |
Stride 0 | 2.00 |
Stride 1 | 0.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 1.00 |
Vectorization ratio all | 50.00 |
Vectorization ratio load | 33.33 |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 66.67 |
Vector-efficiency ratio all | 18.75 |
Vector-efficiency ratio load | 16.67 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 20.83 |
Path / |
Function | hypre_qsort2abs |
Source file and lines | par_interp.c:3184-3187 |
Module | exec |
nb instructions | 14.50 |
nb uops | 15 |
loop length | 54.50 |
used x86 registers | 8.50 |
used mmx registers | 0 |
used xmm registers | 3 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 1.50 |
micro-operation queue | 2.50 cycles |
front end | 2.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.50 | 1.00 | 1.17 | 1.17 | 0.25 | 1.00 | 1.50 | 0.25 | 0.25 | 0.25 | 1.00 | 1.17 |
cycles | 1.50 | 1.00 | 1.17 | 1.17 | 0.25 | 1.00 | 1.50 | 0.25 | 0.25 | 0.25 | 1.00 | 1.17 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 2.55 |
Stall cycles | 0.00 |
Front-end | 2.50 |
Dispatch | 1.50 |
Data deps. | 1.00 |
Overall L1 | 2.50 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 50% |
load | 33% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 66% |
all | 38% |
load | 29% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 47% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 18% |
load | 16% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 20% |
all | 17% |
load | 16% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 18% |
Function | hypre_qsort2abs |
Source file and lines | par_interp.c:3184-3187 |
Module | exec |
nb instructions | 18 |
nb uops | 19 |
loop length | 66 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 3 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 2 |
micro-operation queue | 3.17 cycles |
front end | 3.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.50 | 1.00 | 1.33 | 1.33 | 0.50 | 1.00 | 1.50 | 0.50 | 0.50 | 0.50 | 1.00 | 1.33 |
cycles | 1.50 | 1.00 | 1.33 | 1.33 | 0.50 | 1.00 | 1.50 | 0.50 | 0.50 | 0.50 | 1.00 | 1.33 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 3.13 |
Stall cycles | 0.00 |
Front-end | 3.17 |
Dispatch | 1.50 |
Data deps. | 1.00 |
Overall L1 | 3.17 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 50% |
load | 33% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 66% |
all | 27% |
load | 25% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 28% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 18% |
load | 16% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 20% |
all | 15% |
load | 15% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 16% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
LEA 0x1(%R15),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RBX,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JGE 430a50 <hypre_qsort2abs+0x40> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVSD (%R14,%R15,8),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVUPD -0x40(%RBP),%XMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VANDPD %XMM2,%XMM0,%XMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMOVSD (%R14,%R12,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM2,%XMM1,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VUCOMISD %XMM1,%XMM0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JBE 430ab0 <hypre_qsort2abs+0xa0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
INC %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x30(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R13,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R15,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4d5cb0 <hypre_swap2> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
JMP 430ab0 <hypre_qsort2abs+0xa0> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
Function | hypre_qsort2abs |
Source file and lines | par_interp.c:3184-3187 |
Module | exec |
nb instructions | 11 |
nb uops | 11 |
loop length | 43 |
used x86 registers | 6 |
used mmx registers | 0 |
used xmm registers | 3 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 1 |
micro-operation queue | 1.83 cycles |
front end | 1.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.50 | 1.00 | 1.00 | 1.00 | 0.00 | 1.00 | 1.50 | 0.00 | 0.00 | 0.00 | 1.00 | 1.00 |
cycles | 1.50 | 1.00 | 1.00 | 1.00 | 0.00 | 1.00 | 1.50 | 0.00 | 0.00 | 0.00 | 1.00 | 1.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 1.97 |
Stall cycles | 0.00 |
Front-end | 1.83 |
Dispatch | 1.50 |
Data deps. | 1.00 |
Overall L1 | 1.83 |
all | 50% |
load | 33% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 66% |
all | 18% |
load | 16% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 20% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
LEA 0x1(%R15),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RBX,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JGE 430a50 <hypre_qsort2abs+0x40> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVSD (%R14,%R15,8),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVUPD -0x40(%RBP),%XMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VANDPD %XMM2,%XMM0,%XMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMOVSD (%R14,%R12,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM2,%XMM1,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VUCOMISD %XMM1,%XMM0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JBE 430ab0 <hypre_qsort2abs+0xa0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |