Loop Id: 745 | Module: exec | Source: par_lr_interp.c:1624-1627 | Coverage: 0.12% |
---|
Loop Id: 745 | Module: exec | Source: par_lr_interp.c:1624-1627 | Coverage: 0.12% |
---|
0x478499 VMOVDQU -0x8(%RSI,%R12,1),%YMM14 [5] |
0x4784a0 VMOVDQA %YMM12,%YMM15 |
0x4784a5 SUB $-0x80,%RSI |
0x4784a9 VPGATHERQQ %YMM15,(%R15,%YMM14,8),%YMM0 [2] |
0x4784af VPCMPEQQ %YMM14,%YMM9,%YMM15 |
0x4784b4 VPCMPGTQ %YMM0,%YMM8,%YMM14 |
0x4784b9 VPCMPEQQ %YMM7,%YMM14,%YMM0 |
0x4784be VPOR %YMM0,%YMM15,%YMM0 |
0x4784c2 VMASKMOVPD -0x80(%RSI),%YMM0,%YMM14 [1] |
0x4784c8 VMULPD %YMM6,%YMM14,%YMM15 |
0x4784cc VCMPPD $0x1,%YMM13,%YMM15,%YMM15 |
0x4784d2 VPAND %YMM15,%YMM0,%YMM0 |
0x4784d7 VMOVDQU -0x68(%RSI,%R12,1),%YMM15 [3] |
0x4784de VANDPD %YMM0,%YMM14,%YMM14 |
0x4784e2 VADDPD %YMM14,%YMM1,%YMM14 |
0x4784e7 VMOVDQA %YMM12,%YMM1 |
0x4784eb VPGATHERQQ %YMM1,(%R15,%YMM15,8),%YMM0 [7] |
0x4784f1 VPCMPEQQ %YMM15,%YMM9,%YMM1 |
0x4784f6 VPCMPGTQ %YMM0,%YMM8,%YMM15 |
0x4784fb VPCMPEQQ %YMM7,%YMM15,%YMM0 |
0x478500 VPOR %YMM0,%YMM1,%YMM0 |
0x478504 VMASKMOVPD -0x60(%RSI),%YMM0,%YMM1 [1] |
0x47850a VMULPD %YMM6,%YMM1,%YMM15 |
0x47850e VCMPPD $0x1,%YMM13,%YMM15,%YMM15 |
0x478514 VPAND %YMM15,%YMM0,%YMM0 |
0x478519 VMOVDQU -0x48(%RSI,%R12,1),%YMM15 [3] |
0x478520 VANDPD %YMM0,%YMM1,%YMM1 |
0x478524 VADDPD %YMM1,%YMM14,%YMM14 |
0x478528 VMOVDQA %YMM12,%YMM1 |
0x47852c VPGATHERQQ %YMM1,(%R15,%YMM15,8),%YMM0 [4] |
0x478532 VPCMPEQQ %YMM15,%YMM9,%YMM1 |
0x478537 VPCMPGTQ %YMM0,%YMM8,%YMM15 |
0x47853c VPCMPEQQ %YMM7,%YMM15,%YMM0 |
0x478541 VPOR %YMM0,%YMM1,%YMM0 |
0x478545 VMASKMOVPD -0x40(%RSI),%YMM0,%YMM1 [1] |
0x47854b VMULPD %YMM6,%YMM1,%YMM15 |
0x47854f VCMPPD $0x1,%YMM13,%YMM15,%YMM15 |
0x478555 VPAND %YMM15,%YMM0,%YMM0 |
0x47855a VMOVDQA %YMM12,%YMM15 |
0x47855f VANDPD %YMM0,%YMM1,%YMM1 |
0x478563 VADDPD %YMM1,%YMM14,%YMM1 |
0x478567 VMOVDQU -0x28(%RSI,%R12,1),%YMM14 [3] |
0x47856e VPGATHERQQ %YMM15,(%R15,%YMM14,8),%YMM0 [6] |
0x478574 VPCMPEQQ %YMM14,%YMM9,%YMM15 |
0x478579 VPCMPGTQ %YMM0,%YMM8,%YMM14 |
0x47857e VPCMPEQQ %YMM7,%YMM14,%YMM0 |
0x478583 VPOR %YMM0,%YMM15,%YMM0 |
0x478587 VMASKMOVPD -0x20(%RSI),%YMM0,%YMM14 [1] |
0x47858d VMULPD %YMM6,%YMM14,%YMM15 |
0x478591 VCMPPD $0x1,%YMM13,%YMM15,%YMM15 |
0x478597 VPAND %YMM15,%YMM0,%YMM0 |
0x47859c VANDPD %YMM0,%YMM14,%YMM14 |
0x4785a0 VADDPD %YMM14,%YMM1,%YMM1 |
0x4785a5 CMP %R14,%RSI |
0x4785a8 JNE 478499 |
/scratch_na/users/xoserete/qaas_runs/171-172-8217/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c: 1624 - 1627 |
-------------------------------------------------------------------------------- |
1624: for(jj1 = A_diag_i[i1]+1; jj1 < A_diag_i[i1+1]; jj1++) |
1625: { |
1626: i2 = A_diag_j[jj1]; |
1627: if((P_marker[i2] >= jj_begin_row || i2 == i) && (sgn*A_diag_data[jj1]) < 0) |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.21 |
CQA speedup if fully vectorized | 2.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 4.88 - 11.89 |
Bottlenecks | |
Function | hypre_BoomerAMGBuildExtPIInterp._omp_fn.0 |
Source | par_lr_interp.c:1624-1627 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 92.00 - 224.00 |
CQA cycles if no scalar integer | 92.00 - 224.00 |
CQA cycles if FP arith vectorized | 76.11 - 185.31 |
CQA cycles if fully vectorized | 46.00 - 112.00 |
Front-end cycles | 12.33 |
DIV/SQRT cycles | 18.83 |
P0 cycles | 18.67 |
P1 cycles | 8.00 |
P2 cycles | 8.00 |
P3 cycles | 0.00 |
P4 cycles | 18.50 |
P5 cycles | 1.00 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 0.00 |
P10 cycles | 8.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 92 - 224 |
FE+BE cycles (UFS) | 105.89 - 564.47 |
Stall cycles (UFS) | 93.06 - 551.65 |
Nb insns | 55.00 |
Nb uops | 74.00 |
Nb loads | 12.00 |
Nb stores | 0.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.35 - 0.14 |
Nb FLOP add-sub | 16.00 |
Nb FLOP mul | 16.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 1.71 - 4.17 |
Bytes prefetched | 0.00 |
Bytes loaded | 384.00 |
Bytes stored | 0.00 |
Stride 0 | 0.00 |
Stride 1 | 2.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 2.00 |
Vectorization ratio all | 100.00 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 100.00 |
Vector-efficiency ratio all | 50.00 |
Vector-efficiency ratio load | 50.00 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | 50.00 |
Vector-efficiency ratio add_sub | 50.00 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 50.00 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.21 |
CQA speedup if fully vectorized | 2.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 4.88 - 11.89 |
Bottlenecks | |
Function | hypre_BoomerAMGBuildExtPIInterp._omp_fn.0 |
Source | par_lr_interp.c:1624-1627 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 92.00 - 224.00 |
CQA cycles if no scalar integer | 92.00 - 224.00 |
CQA cycles if FP arith vectorized | 76.11 - 185.31 |
CQA cycles if fully vectorized | 46.00 - 112.00 |
Front-end cycles | 12.33 |
DIV/SQRT cycles | 18.83 |
P0 cycles | 18.67 |
P1 cycles | 8.00 |
P2 cycles | 8.00 |
P3 cycles | 0.00 |
P4 cycles | 18.50 |
P5 cycles | 1.00 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 0.00 |
P10 cycles | 8.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 92 - 224 |
FE+BE cycles (UFS) | 105.89 - 564.47 |
Stall cycles (UFS) | 93.06 - 551.65 |
Nb insns | 55.00 |
Nb uops | 74.00 |
Nb loads | 12.00 |
Nb stores | 0.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.35 - 0.14 |
Nb FLOP add-sub | 16.00 |
Nb FLOP mul | 16.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 1.71 - 4.17 |
Bytes prefetched | 0.00 |
Bytes loaded | 384.00 |
Bytes stored | 0.00 |
Stride 0 | 0.00 |
Stride 1 | 2.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 2.00 |
Vectorization ratio all | 100.00 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 100.00 |
Vector-efficiency ratio all | 50.00 |
Vector-efficiency ratio load | 50.00 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | 50.00 |
Vector-efficiency ratio add_sub | 50.00 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 50.00 |
Path / |
Function | hypre_BoomerAMGBuildExtPIInterp._omp_fn.0 |
Source file and lines | par_lr_interp.c:1624-1627 |
Module | exec |
nb instructions | 55 |
nb uops | 74 |
loop length | 277 |
used x86 registers | 4 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 10 |
used zmm registers | 0 |
nb stack references | 0 |
ADD-SUB / MUL ratio | 1.00 |
micro-operation queue | 12.33 cycles |
front end | 12.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 18.83 | 18.67 | 8.00 | 8.00 | 0.00 | 18.50 | 1.00 | 0.00 | 0.00 | 0.00 | 0.00 | 8.00 |
cycles | 18.83 | 18.67 | 8.00 | 8.00 | 0.00 | 18.50 | 1.00 | 0.00 | 0.00 | 0.00 | 0.00 | 8.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 92.00-224.00 |
FE+BE cycles | 105.89-564.47 |
Stall cycles | 93.06-551.65 |
RS full (events) | 105.37-564.00 |
Front-end | 12.33 |
Dispatch | 18.83 |
Data deps. | 92.00-224.00 |
Overall L1 | 92.00-224.00 |
all | 100% |
load | 100% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 100% |
all | 100% |
load | 100% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 100% |
load | 100% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 50% |
load | 50% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 50% |
all | 50% |
load | 50% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 50% |
add-sub | 50% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 50% |
all | 50% |
load | 50% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 50% |
add-sub | 50% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 50% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMOVDQU -0x8(%RSI,%R12,1),%YMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVDQA %YMM12,%YMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
SUB $-0x80,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VPGATHERQQ %YMM15,(%R15,%YMM14,8),%YMM0 | 5 | 1.33 | 1.33 | 1.33 | 1.33 | 0 | 1.33 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
VPCMPEQQ %YMM14,%YMM9,%YMM15 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPCMPGTQ %YMM0,%YMM8,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0-3 | 1 |
VPCMPEQQ %YMM7,%YMM14,%YMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPOR %YMM0,%YMM15,%YMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMASKMOVPD -0x80(%RSI),%YMM0,%YMM14 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 8-9 | 0.40 |
VMULPD %YMM6,%YMM14,%YMM15 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPPD $0x1,%YMM13,%YMM15,%YMM15 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VPAND %YMM15,%YMM0,%YMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMOVDQU -0x68(%RSI,%R12,1),%YMM15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VANDPD %YMM0,%YMM14,%YMM14 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDPD %YMM14,%YMM1,%YMM14 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVDQA %YMM12,%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPGATHERQQ %YMM1,(%R15,%YMM15,8),%YMM0 | 5 | 1.33 | 1.33 | 1.33 | 1.33 | 0 | 1.33 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
VPCMPEQQ %YMM15,%YMM9,%YMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPCMPGTQ %YMM0,%YMM8,%YMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0-3 | 1 |
VPCMPEQQ %YMM7,%YMM15,%YMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPOR %YMM0,%YMM1,%YMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMASKMOVPD -0x60(%RSI),%YMM0,%YMM1 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 8-9 | 0.40 |
VMULPD %YMM6,%YMM1,%YMM15 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPPD $0x1,%YMM13,%YMM15,%YMM15 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VPAND %YMM15,%YMM0,%YMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMOVDQU -0x48(%RSI,%R12,1),%YMM15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VANDPD %YMM0,%YMM1,%YMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDPD %YMM1,%YMM14,%YMM14 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVDQA %YMM12,%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPGATHERQQ %YMM1,(%R15,%YMM15,8),%YMM0 | 5 | 1.33 | 1.33 | 1.33 | 1.33 | 0 | 1.33 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
VPCMPEQQ %YMM15,%YMM9,%YMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPCMPGTQ %YMM0,%YMM8,%YMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0-3 | 1 |
VPCMPEQQ %YMM7,%YMM15,%YMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPOR %YMM0,%YMM1,%YMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMASKMOVPD -0x40(%RSI),%YMM0,%YMM1 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 8-9 | 0.40 |
VMULPD %YMM6,%YMM1,%YMM15 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPPD $0x1,%YMM13,%YMM15,%YMM15 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VPAND %YMM15,%YMM0,%YMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMOVDQA %YMM12,%YMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VANDPD %YMM0,%YMM1,%YMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDPD %YMM1,%YMM14,%YMM1 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVDQU -0x28(%RSI,%R12,1),%YMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VPGATHERQQ %YMM15,(%R15,%YMM14,8),%YMM0 | 5 | 1.33 | 1.33 | 1.33 | 1.33 | 0 | 1.33 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
VPCMPEQQ %YMM14,%YMM9,%YMM15 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPCMPGTQ %YMM0,%YMM8,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0-3 | 1 |
VPCMPEQQ %YMM7,%YMM14,%YMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPOR %YMM0,%YMM15,%YMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMASKMOVPD -0x20(%RSI),%YMM0,%YMM14 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 8-9 | 0.40 |
VMULPD %YMM6,%YMM14,%YMM15 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPPD $0x1,%YMM13,%YMM15,%YMM15 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VPAND %YMM15,%YMM0,%YMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VANDPD %YMM0,%YMM14,%YMM14 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDPD %YMM14,%YMM1,%YMM1 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
CMP %R14,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 478499 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1859> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
Function | hypre_BoomerAMGBuildExtPIInterp._omp_fn.0 |
Source file and lines | par_lr_interp.c:1624-1627 |
Module | exec |
nb instructions | 55 |
nb uops | 74 |
loop length | 277 |
used x86 registers | 4 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 10 |
used zmm registers | 0 |
nb stack references | 0 |
ADD-SUB / MUL ratio | 1.00 |
micro-operation queue | 12.33 cycles |
front end | 12.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 18.83 | 18.67 | 8.00 | 8.00 | 0.00 | 18.50 | 1.00 | 0.00 | 0.00 | 0.00 | 0.00 | 8.00 |
cycles | 18.83 | 18.67 | 8.00 | 8.00 | 0.00 | 18.50 | 1.00 | 0.00 | 0.00 | 0.00 | 0.00 | 8.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 92.00-224.00 |
FE+BE cycles | 105.89-564.47 |
Stall cycles | 93.06-551.65 |
RS full (events) | 105.37-564.00 |
Front-end | 12.33 |
Dispatch | 18.83 |
Data deps. | 92.00-224.00 |
Overall L1 | 92.00-224.00 |
all | 100% |
load | 100% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 100% |
all | 100% |
load | 100% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 100% |
load | 100% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 50% |
load | 50% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 50% |
all | 50% |
load | 50% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 50% |
add-sub | 50% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 50% |
all | 50% |
load | 50% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 50% |
add-sub | 50% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 50% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMOVDQU -0x8(%RSI,%R12,1),%YMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVDQA %YMM12,%YMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
SUB $-0x80,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VPGATHERQQ %YMM15,(%R15,%YMM14,8),%YMM0 | 5 | 1.33 | 1.33 | 1.33 | 1.33 | 0 | 1.33 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
VPCMPEQQ %YMM14,%YMM9,%YMM15 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPCMPGTQ %YMM0,%YMM8,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0-3 | 1 |
VPCMPEQQ %YMM7,%YMM14,%YMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPOR %YMM0,%YMM15,%YMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMASKMOVPD -0x80(%RSI),%YMM0,%YMM14 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 8-9 | 0.40 |
VMULPD %YMM6,%YMM14,%YMM15 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPPD $0x1,%YMM13,%YMM15,%YMM15 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VPAND %YMM15,%YMM0,%YMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMOVDQU -0x68(%RSI,%R12,1),%YMM15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VANDPD %YMM0,%YMM14,%YMM14 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDPD %YMM14,%YMM1,%YMM14 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVDQA %YMM12,%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPGATHERQQ %YMM1,(%R15,%YMM15,8),%YMM0 | 5 | 1.33 | 1.33 | 1.33 | 1.33 | 0 | 1.33 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
VPCMPEQQ %YMM15,%YMM9,%YMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPCMPGTQ %YMM0,%YMM8,%YMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0-3 | 1 |
VPCMPEQQ %YMM7,%YMM15,%YMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPOR %YMM0,%YMM1,%YMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMASKMOVPD -0x60(%RSI),%YMM0,%YMM1 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 8-9 | 0.40 |
VMULPD %YMM6,%YMM1,%YMM15 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPPD $0x1,%YMM13,%YMM15,%YMM15 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VPAND %YMM15,%YMM0,%YMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMOVDQU -0x48(%RSI,%R12,1),%YMM15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VANDPD %YMM0,%YMM1,%YMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDPD %YMM1,%YMM14,%YMM14 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVDQA %YMM12,%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPGATHERQQ %YMM1,(%R15,%YMM15,8),%YMM0 | 5 | 1.33 | 1.33 | 1.33 | 1.33 | 0 | 1.33 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
VPCMPEQQ %YMM15,%YMM9,%YMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPCMPGTQ %YMM0,%YMM8,%YMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0-3 | 1 |
VPCMPEQQ %YMM7,%YMM15,%YMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPOR %YMM0,%YMM1,%YMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMASKMOVPD -0x40(%RSI),%YMM0,%YMM1 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 8-9 | 0.40 |
VMULPD %YMM6,%YMM1,%YMM15 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPPD $0x1,%YMM13,%YMM15,%YMM15 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VPAND %YMM15,%YMM0,%YMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMOVDQA %YMM12,%YMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VANDPD %YMM0,%YMM1,%YMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDPD %YMM1,%YMM14,%YMM1 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVDQU -0x28(%RSI,%R12,1),%YMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VPGATHERQQ %YMM15,(%R15,%YMM14,8),%YMM0 | 5 | 1.33 | 1.33 | 1.33 | 1.33 | 0 | 1.33 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
VPCMPEQQ %YMM14,%YMM9,%YMM15 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPCMPGTQ %YMM0,%YMM8,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0-3 | 1 |
VPCMPEQQ %YMM7,%YMM14,%YMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPOR %YMM0,%YMM15,%YMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMASKMOVPD -0x20(%RSI),%YMM0,%YMM14 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 8-9 | 0.40 |
VMULPD %YMM6,%YMM14,%YMM15 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPPD $0x1,%YMM13,%YMM15,%YMM15 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VPAND %YMM15,%YMM0,%YMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VANDPD %YMM0,%YMM14,%YMM14 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDPD %YMM14,%YMM1,%YMM1 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
CMP %R14,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 478499 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1859> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |