Function: hypre_BoomerAMGBuildMultipass.extracted.34 | Module: libparcsr_ls.so | Source: par_multi_interp.c:891-1134 [...] | Coverage: 1.8% |
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Function: hypre_BoomerAMGBuildMultipass.extracted.34 | Module: libparcsr_ls.so | Source: par_multi_interp.c:891-1134 [...] | Coverage: 1.8% |
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/scratch_na/users/xoserete/qaas_runs/171-587-0005/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 891 - 1134 |
-------------------------------------------------------------------------------- |
891: #pragma omp parallel private(i,my_thread_num,num_threads,thread_start,thread_stop,cnt_nz,cnt_nz_offd,i1,j,j1,j_start,j_end,k1,k,P_marker,P_marker_offd) |
[...] |
900: my_thread_num = hypre_GetThreadNum(); |
901: num_threads = hypre_NumActiveThreads(); |
902: thread_start = (pass_length/num_threads)*my_thread_num; |
903: if (my_thread_num == num_threads-1) |
904: { thread_stop = pass_length; } |
905: else |
906: { thread_stop = (pass_length/num_threads)*(my_thread_num+1); } |
907: thread_start += pass_pointer[pass]; |
908: thread_stop += pass_pointer[pass]; |
[...] |
916: P_marker = hypre_CTAlloc(HYPRE_Int, n_coarse); /* marks points to see if they're counted */ |
917: for (i=0; i < n_coarse; i++) |
918: { P_marker[i] = -1; } |
919: if (new_num_cols_offd == local_index+1) |
920: { |
921: P_marker_offd = hypre_CTAlloc(HYPRE_Int,new_num_cols_offd); |
922: for (i=0; i < new_num_cols_offd; i++) |
923: { P_marker_offd[i] = -1; } |
924: } |
925: else if (n_coarse_offd) |
926: { |
927: P_marker_offd = hypre_CTAlloc(HYPRE_Int, n_coarse_offd); |
[...] |
939: for (i=thread_start; i < thread_stop; i++) |
940: { |
941: i1 = pass_array[i]; |
942: P_diag_start[i1] = cnt_nz; |
943: P_offd_start[i1] = cnt_nz_offd; |
944: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
945: { |
946: j1 = S_diag_j[j]; |
947: if (assigned[j1] == pass-1) |
948: { |
949: j_start = P_diag_start[j1]; |
950: j_end = j_start+P_diag_i[j1+1]; |
951: for (k=j_start; k < j_end; k++) |
952: { |
953: k1 = P_diag_pass[pass-1][k]; |
954: if (P_marker[k1] != i1) |
955: { |
956: cnt_nz++; |
957: P_diag_i[i1+1]++; |
958: P_marker[k1] = i1; |
959: } |
960: } |
961: j_start = P_offd_start[j1]; |
962: j_end = j_start+P_offd_i[j1+1]; |
963: for (k=j_start; k < j_end; k++) |
964: { |
965: k1 = P_offd_pass[pass-1][k]; |
966: if (P_marker_offd[k1] != i1) |
967: { |
968: cnt_nz_offd++; |
969: P_offd_i[i1+1]++; |
970: P_marker_offd[k1] = i1; |
[...] |
976: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
977: { |
978: j1 = S_offd_j[j]; |
979: if (assigned_offd[j1] == pass-1) |
980: { |
981: j_start = Pext_start[j1]; |
982: j_end = j_start+Pext_i[j1+1]; |
983: for (k=j_start; k < j_end; k++) |
984: { |
985: k1 = Pext_pass[pass][k]; |
986: if (k1 < 0) |
987: { |
988: if (P_marker[-k1-1] != i1) |
989: { |
990: cnt_nz++; |
991: P_diag_i[i1+1]++; |
992: P_marker[-k1-1] = i1; |
993: } |
994: } |
995: else if (P_marker_offd[k1] != i1) |
996: { |
997: cnt_nz_offd++; |
998: P_offd_i[i1+1]++; |
999: P_marker_offd[k1] = i1; |
[...] |
1008: if(my_thread_num == 0) |
1009: { max_num_threads[0] = num_threads; } |
1010: cnt_nz_offd_per_thread[my_thread_num] = cnt_nz_offd; |
1011: cnt_nz_per_thread[my_thread_num] = cnt_nz; |
1012: #ifdef HYPRE_USING_OPENMP |
1013: #pragma omp barrier |
1014: #endif |
1015: if(my_thread_num == 0) |
1016: { |
1017: for(i = 1; i < max_num_threads[0]; i++) |
1018: { |
1019: cnt_nz_offd_per_thread[i] += cnt_nz_offd_per_thread[i-1]; |
1020: cnt_nz_per_thread[i] += cnt_nz_per_thread[i-1]; |
[...] |
1026: if(my_thread_num > 0) |
1027: { |
1028: /* update this thread's section of P_diag_start and P_offd_start |
1029: * with the num of nz's counted by previous threads */ |
1030: for (i=thread_start; i < thread_stop; i++) |
1031: { |
1032: i1 = pass_array[i]; |
1033: P_diag_start[i1] += cnt_nz_per_thread[my_thread_num-1]; |
1034: P_offd_start[i1] += cnt_nz_offd_per_thread[my_thread_num-1]; |
[...] |
1040: cnt_nz = cnt_nz_per_thread[max_num_threads[0]-1]; |
1041: cnt_nz_offd = cnt_nz_offd_per_thread[max_num_threads[0]-1]; |
1042: |
1043: /* Updated total nz count */ |
1044: total_nz += cnt_nz; |
1045: total_nz_offd += cnt_nz_offd; |
1046: |
1047: /* Allocate P_diag_pass and P_offd_pass for all threads */ |
1048: P_diag_pass[pass] = hypre_CTAlloc(HYPRE_Int, cnt_nz); |
1049: if (cnt_nz_offd) |
1050: P_offd_pass[pass] = hypre_CTAlloc(HYPRE_Int, cnt_nz_offd); |
1051: else if (num_procs > 1) |
1052: P_offd_pass[pass] = NULL; |
[...] |
1060: if(my_thread_num > 0) |
1061: { |
1062: cnt_nz = cnt_nz_per_thread[my_thread_num-1]; |
1063: cnt_nz_offd = cnt_nz_offd_per_thread[my_thread_num-1]; |
[...] |
1072: for (i=thread_start; i < thread_stop; i++) |
1073: { |
1074: i1 = pass_array[i]; |
1075: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
1076: { |
1077: j1 = S_diag_j[j]; |
1078: if (assigned[j1] == pass-1) |
1079: { |
1080: j_start = P_diag_start[j1]; |
1081: j_end = j_start+P_diag_i[j1+1]; |
1082: for (k=j_start; k < j_end; k++) |
1083: { |
1084: k1 = P_diag_pass[pass-1][k]; |
1085: if (P_marker[k1] != -i1-1) |
1086: { |
1087: P_diag_pass[pass][cnt_nz++] = k1; |
1088: P_marker[k1] = -i1-1; |
1089: } |
1090: } |
1091: j_start = P_offd_start[j1]; |
1092: j_end = j_start+P_offd_i[j1+1]; |
1093: for (k=j_start; k < j_end; k++) |
1094: { |
1095: k1 = P_offd_pass[pass-1][k]; |
1096: if (P_marker_offd[k1] != -i1-1) |
1097: { |
1098: P_offd_pass[pass][cnt_nz_offd++] = k1; |
1099: P_marker_offd[k1] = -i1-1; |
1100: } |
1101: } |
1102: } |
1103: } |
1104: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
1105: { |
1106: j1 = S_offd_j[j]; |
1107: if (assigned_offd[j1] == pass-1) |
1108: { |
1109: j_start = Pext_start[j1]; |
1110: j_end = j_start+Pext_i[j1+1]; |
1111: for (k=j_start; k < j_end; k++) |
1112: { |
1113: k1 = Pext_pass[pass][k]; |
1114: if (k1 < 0) |
1115: { |
1116: if (P_marker[-k1-1] != -i1-1) |
1117: { |
1118: P_diag_pass[pass][cnt_nz++] = -k1-1; |
1119: P_marker[-k1-1] = -i1-1; |
1120: } |
1121: } |
1122: else if (P_marker_offd[k1] != -i1-1) |
1123: { |
1124: P_offd_pass[pass][cnt_nz_offd++] = k1; |
1125: P_marker_offd[k1] = -i1-1; |
[...] |
1132: hypre_TFree(P_marker); |
1133: if ( (n_coarse_offd) || (new_num_cols_offd == local_index+1) ) |
1134: { hypre_TFree(P_marker_offd); } |
0x4ed20 PUSH %RBP |
0x4ed21 MOV %RSP,%RBP |
0x4ed24 PUSH %R15 |
0x4ed26 PUSH %R14 |
0x4ed28 PUSH %R13 |
0x4ed2a PUSH %R12 |
0x4ed2c PUSH %RBX |
0x4ed2d SUB $0x148,%RSP |
0x4ed34 MOV %R9,-0x148(%RBP) |
0x4ed3b MOV %R8,-0x98(%RBP) |
0x4ed42 MOV %RCX,-0x140(%RBP) |
0x4ed49 MOV %RDX,-0xa0(%RBP) |
0x4ed50 MOV %RDI,-0xd8(%RBP) |
0x4ed57 MOV 0xd0(%RBP),%RAX |
0x4ed5e MOV %RAX,-0x90(%RBP) |
0x4ed65 MOV 0xc8(%RBP),%RAX |
0x4ed6c MOV %RAX,-0x88(%RBP) |
0x4ed73 MOV 0xc0(%RBP),%RAX |
0x4ed7a MOV %RAX,-0xb8(%RBP) |
0x4ed81 MOV 0xb0(%RBP),%RAX |
0x4ed88 MOV %RAX,-0xc8(%RBP) |
0x4ed8f MOV 0xa8(%RBP),%R13 |
0x4ed96 MOV 0xa0(%RBP),%RAX |
0x4ed9d MOV %RAX,-0x168(%RBP) |
0x4eda4 MOV 0x98(%RBP),%RAX |
0x4edab MOV %RAX,-0x150(%RBP) |
0x4edb2 MOV 0x90(%RBP),%RAX |
0x4edb9 MOV %RAX,-0x138(%RBP) |
0x4edc0 MOV 0x88(%RBP),%RAX |
0x4edc7 MOV %RAX,-0x110(%RBP) |
0x4edce MOV 0x80(%RBP),%RAX |
0x4edd5 MOV %RAX,-0xc0(%RBP) |
0x4eddc MOV 0x78(%RBP),%R15 |
0x4ede0 MOV 0x70(%RBP),%R14 |
0x4ede4 MOV 0x68(%RBP),%RAX |
0x4ede8 MOV %RAX,-0x160(%RBP) |
0x4edef MOV 0x60(%RBP),%RAX |
0x4edf3 MOV %RAX,-0x130(%RBP) |
0x4edfa MOV 0x58(%RBP),%RAX |
0x4edfe MOV %RAX,-0x128(%RBP) |
0x4ee05 MOV 0x50(%RBP),%RAX |
0x4ee09 MOV %RAX,-0x78(%RBP) |
0x4ee0d MOV 0x48(%RBP),%RAX |
0x4ee11 MOV %RAX,-0xa8(%RBP) |
0x4ee18 MOV 0x40(%RBP),%RAX |
0x4ee1c MOV %RAX,-0xe8(%RBP) |
0x4ee23 MOV 0x38(%RBP),%RAX |
0x4ee27 MOV %RAX,-0x68(%RBP) |
0x4ee2b MOV 0x30(%RBP),%RBX |
0x4ee2f MOV 0x28(%RBP),%RAX |
0x4ee33 MOV %RAX,-0xb0(%RBP) |
0x4ee3a MOV 0x20(%RBP),%RAX |
0x4ee3e MOV %RAX,-0x120(%RBP) |
0x4ee45 MOV 0x18(%RBP),%RAX |
0x4ee49 MOV %RAX,-0x100(%RBP) |
0x4ee50 MOV 0x10(%RBP),%RAX |
0x4ee54 MOV %RAX,-0xf8(%RBP) |
0x4ee5b MOV 0xb8(%RBP),%R12 |
0x4ee62 CALL def0 <hypre_GetThreadNum@plt> |
0x4ee67 MOV %RAX,-0x40(%RBP) |
0x4ee6b CALL e6c0 <hypre_NumActiveThreads@plt> |
0x4ee70 MOV %RAX,%RSI |
0x4ee73 MOV (%R12),%RCX |
0x4ee77 MOV %RCX,%RAX |
0x4ee7a OR %RSI,%RAX |
0x4ee7d SHR $0x20,%RAX |
0x4ee81 JE 4ee8d |
0x4ee83 MOV %RCX,%RAX |
0x4ee86 CQTO |
0x4ee88 IDIV %RSI |
0x4ee8b JMP 4ee93 |
0x4ee8d MOV %ECX,%EAX |
0x4ee8f XOR %EDX,%EDX |
0x4ee91 DIV %ESI |
0x4ee93 MOV %RSI,-0x158(%RBP) |
0x4ee9a DEC %RSI |
0x4ee9d MOV -0x40(%RBP),%RDX |
0x4eea1 LEA 0x1(%RDX),%RDI |
0x4eea5 MOV %RAX,%R12 |
0x4eea8 IMUL %RAX,%RDI |
0x4eeac CMP %RSI,%RDX |
0x4eeaf CMOVE %RCX,%RDI |
0x4eeb3 MOV %RDI,-0xd0(%RBP) |
0x4eeba MOV (%RBX),%RAX |
0x4eebd MOV (%R14),%RCX |
0x4eec0 MOV (%RAX,%RCX,8),%RAX |
0x4eec4 MOV %RAX,-0x108(%RBP) |
0x4eecb MOV (%R15),%RDI |
0x4eece MOV $0x8,%ESI |
0x4eed3 CALL e860 <hypre_CAlloc@plt> |
0x4eed8 MOV %RAX,%RBX |
0x4eedb CMPQ $0,(%R15) |
0x4eedf JLE 4ef00 |
0x4eee1 XOR %EAX,%EAX |
0x4eee3 NOPW %CS:(%RAX,%RAX,1) |
(1332) 0x4eef0 MOVQ $-0x1,(%RBX,%RAX,8) |
(1332) 0x4eef8 INC %RAX |
(1332) 0x4eefb CMP (%R15),%RAX |
(1332) 0x4eefe JL 4eef0 |
0x4ef00 IMUL -0x40(%RBP),%R12 |
0x4ef05 INC %R13 |
0x4ef08 MOV -0xc8(%RBP),%RDI |
0x4ef0f MOV %R13,-0x170(%RBP) |
0x4ef16 CMP %RDI,%R13 |
0x4ef19 JNE 4ef36 |
0x4ef1b MOV $0x8,%ESI |
0x4ef20 CALL e860 <hypre_CAlloc@plt> |
0x4ef25 MOV %RAX,%R15 |
0x4ef28 MOV -0xc8(%RBP),%RAX |
0x4ef2f TEST %RAX,%RAX |
0x4ef32 JG 4ef5b |
0x4ef34 JMP 4ef72 |
0x4ef36 MOV -0xc0(%RBP),%RDI |
0x4ef3d TEST %RDI,%RDI |
0x4ef40 JE 4ef72 |
0x4ef42 MOV $0x8,%ESI |
0x4ef47 CALL e860 <hypre_CAlloc@plt> |
0x4ef4c MOV %RAX,%R15 |
0x4ef4f MOV -0xc0(%RBP),%RAX |
0x4ef56 TEST %RAX,%RAX |
0x4ef59 JLE 4ef72 |
0x4ef5b LEA (,%RAX,8),%RDX |
0x4ef63 MOV %R15,%RDI |
0x4ef66 MOV $0xff,%ESI |
0x4ef6b CALL e690 <_intel_fast_memset@plt> |
0x4ef70 JMP 4ef72 |
0x4ef72 MOV -0x108(%RBP),%RAX |
0x4ef79 LEA (%RAX,%R12,1),%RSI |
0x4ef7d MOV -0xd0(%RBP),%RCX |
0x4ef84 ADD %RCX,%RAX |
0x4ef87 MOV %RAX,-0xe0(%RBP) |
0x4ef8e MOV %R12,-0x80(%RBP) |
0x4ef92 CMP %RCX,%R12 |
0x4ef95 MOV -0x68(%RBP),%RDX |
0x4ef99 MOV %RSI,-0x58(%RBP) |
0x4ef9d JGE 4f3d1 |
0x4efa3 MOV -0xb0(%RBP),%RAX |
0x4efaa MOV (%RAX),%RAX |
0x4efad MOV %RAX,-0xf0(%RBP) |
0x4efb4 MOV -0xe8(%RBP),%RAX |
0x4efbb MOV (%RAX),%RAX |
0x4efbe MOV %RAX,-0x50(%RBP) |
0x4efc2 XOR %ECX,%ECX |
0x4efc4 MOV %RSI,%RDI |
0x4efc7 XOR %EAX,%EAX |
0x4efc9 JMP 4efe8 |
0x4efcb NOPL (%RAX,%RAX,1) |
(1324) 0x4efd0 MOV -0x60(%RBP),%RDI |
(1324) 0x4efd4 INC %RDI |
(1324) 0x4efd7 CMP -0xe0(%RBP),%RDI |
(1324) 0x4efde MOV -0x68(%RBP),%RDX |
(1324) 0x4efe2 JGE 4f3d5 |
(1324) 0x4efe8 MOV -0xf0(%RBP),%RSI |
(1324) 0x4efef MOV %RDI,-0x60(%RBP) |
(1324) 0x4eff3 MOV (%RSI,%RDI,8),%R8 |
(1324) 0x4eff7 MOV %RAX,(%RDX,%R8,8) |
(1324) 0x4effb MOV -0x50(%RBP),%RDX |
(1324) 0x4efff MOV %RCX,(%RDX,%R8,8) |
(1324) 0x4f003 MOV -0xa0(%RBP),%RDX |
(1324) 0x4f00a MOV (%RDX,%R8,8),%RSI |
(1324) 0x4f00e CMP 0x8(%RDX,%R8,8),%RSI |
(1324) 0x4f013 JGE 4f2e0 |
(1324) 0x4f019 MOV -0x110(%RBP),%RDX |
(1324) 0x4f020 MOV (%RDX),%RDI |
(1324) 0x4f023 MOV %RDI,-0x48(%RBP) |
(1324) 0x4f027 JMP 4f04d |
0x4f029 NOPL (%RAX) |
(1327) 0x4f030 MOV -0x30(%RBP),%RSI |
(1327) 0x4f034 MOV -0x48(%RBP),%RDI |
(1327) 0x4f038 INC %RSI |
(1327) 0x4f03b MOV -0xa0(%RBP),%RDX |
(1327) 0x4f042 CMP 0x8(%RDX,%R8,8),%RSI |
(1327) 0x4f047 JGE 4f2e0 |
(1327) 0x4f04d MOV -0x140(%RBP),%RDX |
(1327) 0x4f054 MOV (%RDX,%RSI,8),%R11 |
(1327) 0x4f058 MOV (%R14),%RDX |
(1327) 0x4f05b DEC %RDX |
(1327) 0x4f05e CMP %RDX,(%RDI,%R11,8) |
(1327) 0x4f062 JNE 4f038 |
(1327) 0x4f064 MOV %RSI,-0x30(%RBP) |
(1327) 0x4f068 MOV -0xf8(%RBP),%RDX |
(1327) 0x4f06f MOV (%RDX),%RDX |
(1327) 0x4f072 MOV 0x8(%RDX,%R11,8),%RSI |
(1327) 0x4f077 TEST %RSI,%RSI |
(1327) 0x4f07a JLE 4f0cc |
(1327) 0x4f07c MOV -0x68(%RBP),%RDI |
(1327) 0x4f080 MOV %R11,-0x38(%RBP) |
(1327) 0x4f084 MOV (%RDI,%R11,8),%RDI |
(1327) 0x4f088 ADD %RDI,%RSI |
(1327) 0x4f08b MOV -0xa8(%RBP),%R9 |
(1327) 0x4f092 MOV (%R9),%R10 |
(1327) 0x4f095 LEA 0x1(%RDI),%R9 |
(1327) 0x4f099 CMP %R9,%RSI |
(1327) 0x4f09c CMOVLE %R9,%RSI |
(1327) 0x4f0a0 MOV %RSI,%R9 |
(1327) 0x4f0a3 SUB %RDI,%R9 |
(1327) 0x4f0a6 CMP $0x4,%R9 |
(1327) 0x4f0aa MOV %R9,-0x70(%RBP) |
(1327) 0x4f0ae JAE 4f15c |
(1327) 0x4f0b4 MOV -0x70(%RBP),%R11 |
(1327) 0x4f0b8 MOV %R11,%R9 |
(1327) 0x4f0bb AND $-0x4,%R9 |
(1327) 0x4f0bf CMP %R11,%R9 |
(1327) 0x4f0c2 JNE 4f1fd |
(1327) 0x4f0c8 MOV -0x38(%RBP),%R11 |
(1327) 0x4f0cc MOV -0x100(%RBP),%RDX |
(1327) 0x4f0d3 MOV (%RDX),%RDX |
(1327) 0x4f0d6 MOV 0x8(%RDX,%R11,8),%RSI |
(1327) 0x4f0db TEST %RSI,%RSI |
(1327) 0x4f0de JLE 4f030 |
(1327) 0x4f0e4 MOV -0x50(%RBP),%RDI |
(1327) 0x4f0e8 MOV (%RDI,%R11,8),%RDI |
(1327) 0x4f0ec ADD %RDI,%RSI |
(1327) 0x4f0ef MOV -0x78(%RBP),%R9 |
(1327) 0x4f0f3 MOV (%R9),%R10 |
(1327) 0x4f0f6 LEA 0x1(%RDI),%R9 |
(1327) 0x4f0fa CMP %R9,%RSI |
(1327) 0x4f0fd CMOVLE %R9,%RSI |
(1327) 0x4f101 MOV %RSI,%R9 |
(1327) 0x4f104 SUB %RDI,%R9 |
(1327) 0x4f107 CMP $0x4,%R9 |
(1327) 0x4f10b MOV %R9,-0x38(%RBP) |
(1327) 0x4f10f JAE 4f23c |
(1327) 0x4f115 MOV -0x38(%RBP),%R11 |
(1327) 0x4f119 MOV %R11,%R9 |
(1327) 0x4f11c AND $-0x4,%R9 |
(1327) 0x4f120 CMP %R11,%R9 |
(1327) 0x4f123 JE 4f030 |
(1327) 0x4f129 ADD %R9,%RDI |
(1327) 0x4f12c JMP 4f13c |
0x4f12e XCHG %AX,%AX |
(1328) 0x4f130 INC %RDI |
(1328) 0x4f133 CMP %RDI,%RSI |
(1328) 0x4f136 JE 4f030 |
(1328) 0x4f13c MOV (%R14),%R9 |
(1328) 0x4f13f MOV -0x8(%R10,%R9,8),%R9 |
(1328) 0x4f144 MOV (%R9,%RDI,8),%R9 |
(1328) 0x4f148 CMP %R8,(%R15,%R9,8) |
(1328) 0x4f14c JE 4f130 |
(1328) 0x4f14e INC %RCX |
(1328) 0x4f151 INCQ 0x8(%RDX,%R8,8) |
(1328) 0x4f156 MOV %R8,(%R15,%R9,8) |
(1328) 0x4f15a JMP 4f130 |
(1327) 0x4f15c MOV %R9,%R13 |
(1327) 0x4f15f SHR $0x2,%R13 |
(1327) 0x4f163 LEA (,%RDI,8),%R12 |
(1327) 0x4f16b JMP 4f17d |
0x4f16d NOPL (%RAX) |
(1331) 0x4f170 ADD $0x20,%R12 |
(1331) 0x4f174 DEC %R13 |
(1331) 0x4f177 JE 4f0b4 |
(1331) 0x4f17d MOV (%R14),%R9 |
(1331) 0x4f180 MOV -0x8(%R10,%R9,8),%R11 |
(1331) 0x4f185 MOV (%R11,%R12,1),%R9 |
(1331) 0x4f189 CMP %R8,(%RBX,%R9,8) |
(1331) 0x4f18d JE 4f1a3 |
(1331) 0x4f18f INCQ 0x8(%RDX,%R8,8) |
(1331) 0x4f194 INC %RAX |
(1331) 0x4f197 MOV %R8,(%RBX,%R9,8) |
(1331) 0x4f19b MOV (%R14),%R9 |
(1331) 0x4f19e MOV -0x8(%R10,%R9,8),%R11 |
(1331) 0x4f1a3 MOV 0x8(%R11,%R12,1),%R9 |
(1331) 0x4f1a8 CMP %R8,(%RBX,%R9,8) |
(1331) 0x4f1ac JE 4f1c2 |
(1331) 0x4f1ae INCQ 0x8(%RDX,%R8,8) |
(1331) 0x4f1b3 INC %RAX |
(1331) 0x4f1b6 MOV %R8,(%RBX,%R9,8) |
(1331) 0x4f1ba MOV (%R14),%R9 |
(1331) 0x4f1bd MOV -0x8(%R10,%R9,8),%R11 |
(1331) 0x4f1c2 MOV 0x10(%R11,%R12,1),%R9 |
(1331) 0x4f1c7 CMP %R8,(%RBX,%R9,8) |
(1331) 0x4f1cb JE 4f1e1 |
(1331) 0x4f1cd INCQ 0x8(%RDX,%R8,8) |
(1331) 0x4f1d2 INC %RAX |
(1331) 0x4f1d5 MOV %R8,(%RBX,%R9,8) |
(1331) 0x4f1d9 MOV (%R14),%R9 |
(1331) 0x4f1dc MOV -0x8(%R10,%R9,8),%R11 |
(1331) 0x4f1e1 MOV 0x18(%R11,%R12,1),%R9 |
(1331) 0x4f1e6 CMP %R8,(%RBX,%R9,8) |
(1331) 0x4f1ea JE 4f170 |
(1331) 0x4f1ec INC %RAX |
(1331) 0x4f1ef INCQ 0x8(%RDX,%R8,8) |
(1331) 0x4f1f4 MOV %R8,(%RBX,%R9,8) |
(1331) 0x4f1f8 JMP 4f170 |
(1327) 0x4f1fd ADD %R9,%RDI |
(1327) 0x4f200 MOV -0x38(%RBP),%R11 |
(1327) 0x4f204 JMP 4f21c |
0x4f206 NOPW %CS:(%RAX,%RAX,1) |
(1330) 0x4f210 INC %RDI |
(1330) 0x4f213 CMP %RDI,%RSI |
(1330) 0x4f216 JE 4f0cc |
(1330) 0x4f21c MOV (%R14),%R9 |
(1330) 0x4f21f MOV -0x8(%R10,%R9,8),%R9 |
(1330) 0x4f224 MOV (%R9,%RDI,8),%R9 |
(1330) 0x4f228 CMP %R8,(%RBX,%R9,8) |
(1330) 0x4f22c JE 4f210 |
(1330) 0x4f22e INC %RAX |
(1330) 0x4f231 INCQ 0x8(%RDX,%R8,8) |
(1330) 0x4f236 MOV %R8,(%RBX,%R9,8) |
(1330) 0x4f23a JMP 4f210 |
(1327) 0x4f23c MOV %R9,%R12 |
(1327) 0x4f23f SHR $0x2,%R12 |
(1327) 0x4f243 LEA (,%RDI,8),%R13 |
(1327) 0x4f24b JMP 4f25d |
0x4f24d NOPL (%RAX) |
(1329) 0x4f250 ADD $0x20,%R13 |
(1329) 0x4f254 DEC %R12 |
(1329) 0x4f257 JE 4f115 |
(1329) 0x4f25d MOV (%R14),%R9 |
(1329) 0x4f260 MOV -0x8(%R10,%R9,8),%R11 |
(1329) 0x4f265 MOV (%R11,%R13,1),%R9 |
(1329) 0x4f269 CMP %R8,(%R15,%R9,8) |
(1329) 0x4f26d JE 4f283 |
(1329) 0x4f26f INCQ 0x8(%RDX,%R8,8) |
(1329) 0x4f274 INC %RCX |
(1329) 0x4f277 MOV %R8,(%R15,%R9,8) |
(1329) 0x4f27b MOV (%R14),%R9 |
(1329) 0x4f27e MOV -0x8(%R10,%R9,8),%R11 |
(1329) 0x4f283 MOV 0x8(%R11,%R13,1),%R9 |
(1329) 0x4f288 CMP %R8,(%R15,%R9,8) |
(1329) 0x4f28c JE 4f2a2 |
(1329) 0x4f28e INCQ 0x8(%RDX,%R8,8) |
(1329) 0x4f293 INC %RCX |
(1329) 0x4f296 MOV %R8,(%R15,%R9,8) |
(1329) 0x4f29a MOV (%R14),%R9 |
(1329) 0x4f29d MOV -0x8(%R10,%R9,8),%R11 |
(1329) 0x4f2a2 MOV 0x10(%R11,%R13,1),%R9 |
(1329) 0x4f2a7 CMP %R8,(%R15,%R9,8) |
(1329) 0x4f2ab JE 4f2c1 |
(1329) 0x4f2ad INCQ 0x8(%RDX,%R8,8) |
(1329) 0x4f2b2 INC %RCX |
(1329) 0x4f2b5 MOV %R8,(%R15,%R9,8) |
(1329) 0x4f2b9 MOV (%R14),%R9 |
(1329) 0x4f2bc MOV -0x8(%R10,%R9,8),%R11 |
(1329) 0x4f2c1 MOV 0x18(%R11,%R13,1),%R9 |
(1329) 0x4f2c6 CMP %R8,(%R15,%R9,8) |
(1329) 0x4f2ca JE 4f250 |
(1329) 0x4f2cc INC %RCX |
(1329) 0x4f2cf INCQ 0x8(%RDX,%R8,8) |
(1329) 0x4f2d4 MOV %R8,(%R15,%R9,8) |
(1329) 0x4f2d8 JMP 4f250 |
0x4f2dd NOPL (%RAX) |
(1324) 0x4f2e0 MOV -0x98(%RBP),%RSI |
(1324) 0x4f2e7 MOV (%RSI,%R8,8),%RDX |
(1324) 0x4f2eb MOV 0x8(%RSI,%R8,8),%RDI |
(1324) 0x4f2f0 JMP 4f30f |
0x4f2f2 NOPW %CS:(%RAX,%RAX,1) |
(1325) 0x4f300 MOV -0x98(%RBP),%RSI |
(1325) 0x4f307 MOV 0x8(%RSI,%R8,8),%RDI |
(1325) 0x4f30c INC %RDX |
(1325) 0x4f30f CMP %RDI,%RDX |
(1325) 0x4f312 JGE 4efd0 |
(1325) 0x4f318 MOV -0x148(%RBP),%RSI |
(1325) 0x4f31f MOV (%RSI,%RDX,8),%R9 |
(1325) 0x4f323 MOV (%R14),%RSI |
(1325) 0x4f326 DEC %RSI |
(1325) 0x4f329 MOV -0x138(%RBP),%R10 |
(1325) 0x4f330 CMP %RSI,(%R10,%R9,8) |
(1325) 0x4f334 JNE 4f30c |
(1325) 0x4f336 MOV -0x130(%RBP),%RSI |
(1325) 0x4f33d MOV 0x8(%RSI,%R9,8),%RSI |
(1325) 0x4f342 TEST %RSI,%RSI |
(1325) 0x4f345 JLE 4f30c |
(1325) 0x4f347 MOV -0x120(%RBP),%RDI |
(1325) 0x4f34e MOV (%RDI,%R9,8),%RDI |
(1325) 0x4f352 ADD %RDI,%RSI |
(1325) 0x4f355 MOV -0x128(%RBP),%R9 |
(1325) 0x4f35c MOV (%R9),%R9 |
(1325) 0x4f35f JMP 4f378 |
0x4f361 NOPW %CS:(%RAX,%RAX,1) |
(1326) 0x4f370 INC %RDI |
(1326) 0x4f373 CMP %RSI,%RDI |
(1326) 0x4f376 JGE 4f300 |
(1326) 0x4f378 MOV (%R14),%R10 |
(1326) 0x4f37b MOV (%R9,%R10,8),%R10 |
(1326) 0x4f37f MOV (%R10,%RDI,8),%R10 |
(1326) 0x4f383 TEST %R10,%R10 |
(1326) 0x4f386 JS 4f3b0 |
(1326) 0x4f388 CMP %R8,(%R15,%R10,8) |
(1326) 0x4f38c JE 4f370 |
(1326) 0x4f38e INC %RCX |
(1326) 0x4f391 MOV -0x100(%RBP),%R11 |
(1326) 0x4f398 MOV (%R11),%R11 |
(1326) 0x4f39b INCQ 0x8(%R11,%R8,8) |
(1326) 0x4f3a0 MOV %R8,(%R15,%R10,8) |
(1326) 0x4f3a4 JMP 4f370 |
0x4f3a6 NOPW %CS:(%RAX,%RAX,1) |
(1326) 0x4f3b0 NOT %R10 |
(1326) 0x4f3b3 CMP %R8,(%RBX,%R10,8) |
(1326) 0x4f3b7 JE 4f370 |
(1326) 0x4f3b9 INC %RAX |
(1326) 0x4f3bc MOV -0xf8(%RBP),%R11 |
(1326) 0x4f3c3 MOV (%R11),%R11 |
(1326) 0x4f3c6 INCQ 0x8(%R11,%R8,8) |
(1326) 0x4f3cb MOV %R8,(%RBX,%R10,8) |
(1326) 0x4f3cf JMP 4f370 |
0x4f3d1 XOR %EAX,%EAX |
0x4f3d3 XOR %ECX,%ECX |
0x4f3d5 MOV -0x40(%RBP),%RDX |
0x4f3d9 TEST %RDX,%RDX |
0x4f3dc JNE 4f3ef |
0x4f3de MOV -0xb8(%RBP),%RSI |
0x4f3e5 MOV -0x158(%RBP),%RDI |
0x4f3ec MOV %RDI,(%RSI) |
0x4f3ef MOV -0x90(%RBP),%R12 |
0x4f3f6 MOV %RCX,(%R12,%RDX,8) |
0x4f3fa MOV -0x88(%RBP),%R13 |
0x4f401 MOV %RAX,(%R13,%RDX,8) |
0x4f406 MOV -0xd8(%RBP),%RAX |
0x4f40d MOV (%RAX),%ESI |
0x4f40f LEA 0x2680ba(%RIP),%RDI |
0x4f416 CALL e870 <__kmpc_barrier@plt> |
0x4f41b CMPQ $0,-0x40(%RBP) |
0x4f420 MOV -0xb8(%RBP),%RDI |
0x4f427 JNE 4f45a |
0x4f429 CMPQ $0x2,(%RDI) |
0x4f42d JL 4f45a |
0x4f42f MOV %R13,%RSI |
0x4f432 MOV %R12,%RDX |
0x4f435 MOV $0x1,%EAX |
0x4f43a NOPW (%RAX,%RAX,1) |
(1323) 0x4f440 MOV -0x8(%RDX,%RAX,8),%RCX |
(1323) 0x4f445 ADD %RCX,(%RDX,%RAX,8) |
(1323) 0x4f449 MOV -0x8(%RSI,%RAX,8),%RCX |
(1323) 0x4f44e ADD %RCX,(%RSI,%RAX,8) |
(1323) 0x4f452 INC %RAX |
(1323) 0x4f455 CMP (%RDI),%RAX |
(1323) 0x4f458 JL 4f440 |
0x4f45a MOV -0xd8(%RBP),%RAX |
0x4f461 MOV (%RAX),%ESI |
0x4f463 LEA 0x268086(%RIP),%RDI |
0x4f46a CALL e870 <__kmpc_barrier@plt> |
0x4f46f MOV -0x40(%RBP),%R8 |
0x4f473 TEST %R8,%R8 |
0x4f476 JLE 4f5a9 |
0x4f47c MOV -0xd0(%RBP),%RAX |
0x4f483 CMP %RAX,-0x80(%RBP) |
0x4f487 MOV -0x68(%RBP),%R11 |
0x4f48b MOV -0x90(%RBP),%R12 |
0x4f492 MOV -0x88(%RBP),%R13 |
0x4f499 JGE 4f638 |
0x4f49f MOV -0xb0(%RBP),%RAX |
0x4f4a6 MOV (%RAX),%RAX |
0x4f4a9 MOV -0xe8(%RBP),%RCX |
0x4f4b0 MOV (%RCX),%RCX |
0x4f4b3 MOV -0x58(%RBP),%RDI |
0x4f4b7 LEA 0x1(%RDI),%RDX |
0x4f4bb MOV -0xe0(%RBP),%RSI |
0x4f4c2 CMP %RSI,%RDX |
0x4f4c5 CMOVLE %RSI,%RDX |
0x4f4c9 MOV %RDX,%RSI |
0x4f4cc SUB %RDI,%RSI |
0x4f4cf MOV %RSI,-0x30(%RBP) |
0x4f4d3 CMP $0x4,%RSI |
0x4f4d7 MOV %R8,%RSI |
0x4f4da JB 4f550 |
0x4f4dc MOV -0x30(%RBP),%RDI |
0x4f4e0 SHR $0x2,%RDI |
0x4f4e4 MOV -0x58(%RBP),%R8 |
0x4f4e8 LEA (%RAX,%R8,8),%R8 |
0x4f4ec ADD $0x18,%R8 |
(1322) 0x4f4f0 MOV -0x18(%R8),%R9 |
(1322) 0x4f4f4 MOV -0x8(%R13,%RSI,8),%R10 |
(1322) 0x4f4f9 ADD %R10,(%R11,%R9,8) |
(1322) 0x4f4fd MOV -0x8(%R12,%RSI,8),%R10 |
(1322) 0x4f502 ADD %R10,(%RCX,%R9,8) |
(1322) 0x4f506 MOV -0x10(%R8),%R9 |
(1322) 0x4f50a MOV -0x8(%R13,%RSI,8),%R10 |
(1322) 0x4f50f ADD %R10,(%R11,%R9,8) |
(1322) 0x4f513 MOV -0x8(%R12,%RSI,8),%R10 |
(1322) 0x4f518 ADD %R10,(%RCX,%R9,8) |
(1322) 0x4f51c MOV -0x8(%R8),%R9 |
(1322) 0x4f520 MOV -0x8(%R13,%RSI,8),%R10 |
(1322) 0x4f525 ADD %R10,(%R11,%R9,8) |
(1322) 0x4f529 MOV -0x8(%R12,%RSI,8),%R10 |
(1322) 0x4f52e ADD %R10,(%RCX,%R9,8) |
(1322) 0x4f532 MOV (%R8),%R9 |
(1322) 0x4f535 MOV -0x8(%R13,%RSI,8),%R10 |
(1322) 0x4f53a ADD %R10,(%R11,%R9,8) |
(1322) 0x4f53e MOV -0x8(%R12,%RSI,8),%R10 |
(1322) 0x4f543 ADD %R10,(%RCX,%R9,8) |
(1322) 0x4f547 ADD $0x20,%R8 |
(1322) 0x4f54b DEC %RDI |
(1322) 0x4f54e JNE 4f4f0 |
0x4f550 MOV -0x30(%RBP),%R8 |
0x4f554 MOV %R8,%RDI |
0x4f557 AND $-0x4,%RDI |
0x4f55b CMP %R8,%RDI |
0x4f55e MOV %RSI,%R8 |
0x4f561 MOV -0x108(%RBP),%RSI |
0x4f568 JE 4f638 |
0x4f56e ADD -0x80(%RBP),%RSI |
0x4f572 ADD %RDI,%RSI |
0x4f575 NOPW %CS:(%RAX,%RAX,1) |
(1321) 0x4f580 MOV %RSI,%R9 |
(1321) 0x4f583 MOV (%RAX,%RSI,8),%RSI |
(1321) 0x4f587 MOV -0x8(%R13,%R8,8),%RDI |
(1321) 0x4f58c ADD %RDI,(%R11,%RSI,8) |
(1321) 0x4f590 MOV -0x8(%R12,%R8,8),%RDI |
(1321) 0x4f595 ADD %RDI,(%RCX,%RSI,8) |
(1321) 0x4f599 MOV %R9,%RSI |
(1321) 0x4f59c INC %RSI |
(1321) 0x4f59f CMP %RSI,%RDX |
(1321) 0x4f5a2 JNE 4f580 |
0x4f5a4 JMP 4f638 |
0x4f5a9 MOV -0xb8(%RBP),%RAX |
0x4f5b0 MOV (%RAX),%RAX |
0x4f5b3 MOV -0x88(%RBP),%RCX |
0x4f5ba MOV -0x8(%RCX,%RAX,8),%RDI |
0x4f5bf MOV -0x90(%RBP),%RCX |
0x4f5c6 MOV -0x8(%RCX,%RAX,8),%R12 |
0x4f5cb MOV -0x160(%RBP),%RAX |
0x4f5d2 ADD %RDI,(%RAX) |
0x4f5d5 MOV -0x168(%RBP),%RAX |
0x4f5dc ADD %R12,(%RAX) |
0x4f5df MOV $0x8,%ESI |
0x4f5e4 CALL e860 <hypre_CAlloc@plt> |
0x4f5e9 MOV -0xa8(%RBP),%RCX |
0x4f5f0 MOV (%RCX),%RDX |
0x4f5f3 MOV (%R14),%RCX |
0x4f5f6 MOV %RAX,(%RDX,%RCX,8) |
0x4f5fa TEST %R12,%R12 |
0x4f5fd JE 4f61c |
0x4f5ff MOV $0x8,%ESI |
0x4f604 MOV %R12,%RDI |
0x4f607 CALL e860 <hypre_CAlloc@plt> |
0x4f60c MOV -0x78(%RBP),%RCX |
0x4f610 MOV (%RCX),%RCX |
0x4f613 MOV (%R14),%RDX |
0x4f616 MOV %RAX,(%RCX,%RDX,8) |
0x4f61a JMP 4f638 |
0x4f61c MOV -0x150(%RBP),%RAX |
0x4f623 CMPQ $0x2,(%RAX) |
0x4f627 JL 4f638 |
0x4f629 MOV -0x78(%RBP),%RAX |
0x4f62d MOV (%RAX),%RAX |
0x4f630 MOVQ $0,(%RAX,%RCX,8) |
0x4f638 MOV -0xd8(%RBP),%RAX |
0x4f63f MOV (%RAX),%ESI |
0x4f641 LEA 0x267ec8(%RIP),%RDI |
0x4f648 CALL e870 <__kmpc_barrier@plt> |
0x4f64d MOV -0x40(%RBP),%RDX |
0x4f651 TEST %RDX,%RDX |
0x4f654 JLE 4f670 |
0x4f656 MOV -0x88(%RBP),%RAX |
0x4f65d MOV -0x8(%RAX,%RDX,8),%RAX |
0x4f662 MOV -0x90(%RBP),%RCX |
0x4f669 MOV -0x8(%RCX,%RDX,8),%RCX |
0x4f66e JMP 4f674 |
0x4f670 XOR %EAX,%EAX |
0x4f672 XOR %ECX,%ECX |
0x4f674 MOV -0x80(%RBP),%RDX |
0x4f678 CMP -0xd0(%RBP),%RDX |
0x4f67f MOV -0x58(%RBP),%RDX |
0x4f683 JGE 4fb90 |
0x4f689 MOV -0xb0(%RBP),%RSI |
0x4f690 MOV (%RSI),%RSI |
0x4f693 MOV %RSI,-0x40(%RBP) |
0x4f697 MOV %RBX,-0x38(%RBP) |
0x4f69b MOV %R14,-0x30(%RBP) |
0x4f69f MOV %R15,-0x118(%RBP) |
0x4f6a6 JMP 4f6c4 |
0x4f6a8 NOPL (%RAX,%RAX,1) |
(1313) 0x4f6b0 MOV -0x58(%RBP),%RDX |
(1313) 0x4f6b4 INC %RDX |
(1313) 0x4f6b7 CMP -0xe0(%RBP),%RDX |
(1313) 0x4f6be JGE 4fb90 |
(1313) 0x4f6c4 MOV %RDX,-0x58(%RBP) |
(1313) 0x4f6c8 MOV -0x40(%RBP),%RSI |
(1313) 0x4f6cc MOV (%RSI,%RDX,8),%RSI |
(1313) 0x4f6d0 MOV -0xa0(%RBP),%RDX |
(1313) 0x4f6d7 MOV (%RDX,%RSI,8),%R8 |
(1313) 0x4f6db MOV %RSI,%RDI |
(1313) 0x4f6de NOT %RDI |
(1313) 0x4f6e1 CMP 0x8(%RDX,%RSI,8),%R8 |
(1313) 0x4f6e6 JGE 4fa80 |
(1313) 0x4f6ec MOV -0x110(%RBP),%RDX |
(1313) 0x4f6f3 MOV (%RDX),%R9 |
(1313) 0x4f6f6 MOV %R9,-0x60(%RBP) |
(1313) 0x4f6fa JMP 4f71d |
(1316) 0x4f6fc MOV -0x38(%RBP),%RBX |
(1316) 0x4f700 MOV -0x70(%RBP),%R8 |
(1316) 0x4f704 MOV -0x60(%RBP),%R9 |
(1316) 0x4f708 INC %R8 |
(1316) 0x4f70b MOV -0xa0(%RBP),%RDX |
(1316) 0x4f712 CMP 0x8(%RDX,%RSI,8),%R8 |
(1316) 0x4f717 JGE 4fa80 |
(1316) 0x4f71d MOV -0x140(%RBP),%RDX |
(1316) 0x4f724 MOV (%RDX,%R8,8),%R12 |
(1316) 0x4f728 MOV (%R14),%RDX |
(1316) 0x4f72b DEC %RDX |
(1316) 0x4f72e CMP %RDX,(%R9,%R12,8) |
(1316) 0x4f732 JNE 4f708 |
(1316) 0x4f734 MOV %R8,-0x70(%RBP) |
(1316) 0x4f738 MOV -0xf8(%RBP),%RDX |
(1316) 0x4f73f MOV (%RDX),%RDX |
(1316) 0x4f742 MOV 0x8(%RDX,%R12,8),%R10 |
(1316) 0x4f747 TEST %R10,%R10 |
(1316) 0x4f74a JLE 4f7a7 |
(1316) 0x4f74c MOV -0x68(%RBP),%RDX |
(1316) 0x4f750 MOV %R12,-0x48(%RBP) |
(1316) 0x4f754 MOV (%RDX,%R12,8),%RDX |
(1316) 0x4f758 ADD %RDX,%R10 |
(1316) 0x4f75b MOV -0xa8(%RBP),%R8 |
(1316) 0x4f762 MOV (%R8),%R9 |
(1316) 0x4f765 LEA 0x1(%RDX),%R8 |
(1316) 0x4f769 CMP %R8,%R10 |
(1316) 0x4f76c CMOVLE %R8,%R10 |
(1316) 0x4f770 MOV %R10,-0xf0(%RBP) |
(1316) 0x4f777 SUB %RDX,%R10 |
(1316) 0x4f77a CMP $0x4,%R10 |
(1316) 0x4f77e MOV %R10,-0x50(%RBP) |
(1316) 0x4f782 JAE 4f856 |
(1316) 0x4f788 MOV -0x50(%RBP),%R10 |
(1316) 0x4f78c MOV %R10,%R8 |
(1316) 0x4f78f AND $-0x4,%R8 |
(1316) 0x4f793 CMP %R10,%R8 |
(1316) 0x4f796 JNE 4f94b |
(1316) 0x4f79c MOV -0x118(%RBP),%R15 |
(1316) 0x4f7a3 MOV -0x48(%RBP),%R12 |
(1316) 0x4f7a7 MOV -0x100(%RBP),%RDX |
(1316) 0x4f7ae MOV (%RDX),%RDX |
(1316) 0x4f7b1 MOV 0x8(%RDX,%R12,8),%R10 |
(1316) 0x4f7b6 TEST %R10,%R10 |
(1316) 0x4f7b9 JLE 4f700 |
(1316) 0x4f7bf MOV -0xe8(%RBP),%RDX |
(1316) 0x4f7c6 MOV (%RDX),%RDX |
(1316) 0x4f7c9 MOV (%RDX,%R12,8),%RDX |
(1316) 0x4f7cd ADD %RDX,%R10 |
(1316) 0x4f7d0 MOV -0x78(%RBP),%R8 |
(1316) 0x4f7d4 MOV (%R8),%R9 |
(1316) 0x4f7d7 LEA 0x1(%RDX),%R8 |
(1316) 0x4f7db CMP %R8,%R10 |
(1316) 0x4f7de CMOVLE %R8,%R10 |
(1316) 0x4f7e2 MOV %R10,-0x50(%RBP) |
(1316) 0x4f7e6 SUB %RDX,%R10 |
(1316) 0x4f7e9 CMP $0x4,%R10 |
(1316) 0x4f7ed MOV %R10,-0x48(%RBP) |
(1316) 0x4f7f1 JAE 4f9a6 |
(1316) 0x4f7f7 MOV -0x48(%RBP),%R10 |
(1316) 0x4f7fb MOV %R10,%R8 |
(1316) 0x4f7fe AND $-0x4,%R8 |
(1316) 0x4f802 CMP %R10,%R8 |
(1316) 0x4f805 JE 4f6fc |
(1316) 0x4f80b ADD %R8,%RDX |
(1316) 0x4f80e MOV -0x38(%RBP),%RBX |
(1316) 0x4f812 MOV -0x50(%RBP),%R12 |
(1316) 0x4f816 JMP 4f82c |
0x4f818 NOPL (%RAX,%RAX,1) |
(1317) 0x4f820 INC %RDX |
(1317) 0x4f823 CMP %RDX,%R12 |
(1317) 0x4f826 JE 4f700 |
(1317) 0x4f82c MOV (%R14),%R10 |
(1317) 0x4f82f MOV -0x8(%R9,%R10,8),%R8 |
(1317) 0x4f834 MOV (%R8,%RDX,8),%R8 |
(1317) 0x4f838 MOV (%R15,%R8,8),%R11 |
(1317) 0x4f83c XOR %RSI,%R11 |
(1317) 0x4f83f CMP $-0x1,%R11 |
(1317) 0x4f843 JE 4f820 |
(1317) 0x4f845 MOV (%R9,%R10,8),%R10 |
(1317) 0x4f849 MOV %R8,(%R10,%RCX,8) |
(1317) 0x4f84d INC %RCX |
(1317) 0x4f850 MOV %RDI,(%R15,%R8,8) |
(1317) 0x4f854 JMP 4f820 |
(1316) 0x4f856 MOV %R10,%R13 |
(1316) 0x4f859 SHR $0x2,%R13 |
(1316) 0x4f85d LEA (,%RDX,8),%R12 |
(1316) 0x4f865 JMP 4f893 |
0x4f867 NOPW (%RAX,%RAX,1) |
(1320) 0x4f870 MOV (%R9,%R10,8),%R10 |
(1320) 0x4f874 MOV %R8,(%R10,%RAX,8) |
(1320) 0x4f878 INC %RAX |
(1320) 0x4f87b MOV %R15,%RDI |
(1320) 0x4f87e MOV %R15,(%RBX,%R8,8) |
(1320) 0x4f882 MOV -0x30(%RBP),%R14 |
(1320) 0x4f886 ADD $0x20,%R12 |
(1320) 0x4f88a DEC %R13 |
(1320) 0x4f88d JE 4f788 |
(1320) 0x4f893 MOV %RDI,%R15 |
(1320) 0x4f896 MOV (%R14),%R10 |
(1320) 0x4f899 MOV -0x8(%R9,%R10,8),%R8 |
(1320) 0x4f89e MOV (%R8,%R12,1),%R11 |
(1320) 0x4f8a2 MOV %R14,%RDI |
(1320) 0x4f8a5 MOV %RBX,%R14 |
(1320) 0x4f8a8 MOV (%RBX,%R11,8),%RBX |
(1320) 0x4f8ac XOR %RSI,%RBX |
(1320) 0x4f8af CMP $-0x1,%RBX |
(1320) 0x4f8b3 JE 4f8cc |
(1320) 0x4f8b5 MOV (%R9,%R10,8),%R8 |
(1320) 0x4f8b9 MOV %R11,(%R8,%RAX,8) |
(1320) 0x4f8bd INC %RAX |
(1320) 0x4f8c0 MOV %R15,(%R14,%R11,8) |
(1320) 0x4f8c4 MOV (%RDI),%R10 |
(1320) 0x4f8c7 MOV -0x8(%R9,%R10,8),%R8 |
(1320) 0x4f8cc MOV 0x8(%R8,%R12,1),%R11 |
(1320) 0x4f8d1 MOV (%R14,%R11,8),%RBX |
(1320) 0x4f8d5 XOR %RSI,%RBX |
(1320) 0x4f8d8 CMP $-0x1,%RBX |
(1320) 0x4f8dc JE 4f8f9 |
(1320) 0x4f8de MOV (%R9,%R10,8),%R8 |
(1320) 0x4f8e2 MOV %R11,(%R8,%RAX,8) |
(1320) 0x4f8e6 INC %RAX |
(1320) 0x4f8e9 MOV %R15,(%R14,%R11,8) |
(1320) 0x4f8ed MOV -0x30(%RBP),%RDI |
(1320) 0x4f8f1 MOV (%RDI),%R10 |
(1320) 0x4f8f4 MOV -0x8(%R9,%R10,8),%R8 |
(1320) 0x4f8f9 MOV 0x10(%R8,%R12,1),%R11 |
(1320) 0x4f8fe MOV (%R14,%R11,8),%RBX |
(1320) 0x4f902 XOR %RSI,%RBX |
(1320) 0x4f905 CMP $-0x1,%RBX |
(1320) 0x4f909 JE 4f926 |
(1320) 0x4f90b MOV (%R9,%R10,8),%R8 |
(1320) 0x4f90f MOV %R11,(%R8,%RAX,8) |
(1320) 0x4f913 INC %RAX |
(1320) 0x4f916 MOV %R15,(%R14,%R11,8) |
(1320) 0x4f91a MOV -0x30(%RBP),%RDI |
(1320) 0x4f91e MOV (%RDI),%R10 |
(1320) 0x4f921 MOV -0x8(%R9,%R10,8),%R8 |
(1320) 0x4f926 MOV %R14,%RBX |
(1320) 0x4f929 MOV 0x18(%R8,%R12,1),%R8 |
(1320) 0x4f92e MOV (%R14,%R8,8),%R11 |
(1320) 0x4f932 XOR %RSI,%R11 |
(1320) 0x4f935 CMP $-0x1,%R11 |
(1320) 0x4f939 JNE 4f870 |
(1320) 0x4f93f MOV -0x30(%RBP),%R14 |
(1320) 0x4f943 MOV %R15,%RDI |
(1320) 0x4f946 JMP 4f886 |
(1316) 0x4f94b ADD %R8,%RDX |
(1316) 0x4f94e MOV -0x118(%RBP),%R15 |
(1316) 0x4f955 MOV -0x48(%RBP),%R12 |
(1316) 0x4f959 MOV -0xf0(%RBP),%R13 |
(1316) 0x4f960 JMP 4f97c |
0x4f962 NOPW %CS:(%RAX,%RAX,1) |
(1319) 0x4f970 INC %RDX |
(1319) 0x4f973 CMP %RDX,%R13 |
(1319) 0x4f976 JE 4f7a7 |
(1319) 0x4f97c MOV (%R14),%R10 |
(1319) 0x4f97f MOV -0x8(%R9,%R10,8),%R8 |
(1319) 0x4f984 MOV (%R8,%RDX,8),%R8 |
(1319) 0x4f988 MOV (%RBX,%R8,8),%R11 |
(1319) 0x4f98c XOR %RSI,%R11 |
(1319) 0x4f98f CMP $-0x1,%R11 |
(1319) 0x4f993 JE 4f970 |
(1319) 0x4f995 MOV (%R9,%R10,8),%R10 |
(1319) 0x4f999 MOV %R8,(%R10,%RAX,8) |
(1319) 0x4f99d INC %RAX |
(1319) 0x4f9a0 MOV %RDI,(%RBX,%R8,8) |
(1319) 0x4f9a4 JMP 4f970 |
(1316) 0x4f9a6 MOV %R10,%R12 |
(1316) 0x4f9a9 SHR $0x2,%R12 |
(1316) 0x4f9ad LEA (,%RDX,8),%R13 |
(1316) 0x4f9b5 JMP 4f9cd |
0x4f9b7 NOPW (%RAX,%RAX,1) |
(1318) 0x4f9c0 ADD $0x20,%R13 |
(1318) 0x4f9c4 DEC %R12 |
(1318) 0x4f9c7 JE 4f7f7 |
(1318) 0x4f9cd MOV (%R14),%R10 |
(1318) 0x4f9d0 MOV -0x8(%R9,%R10,8),%R8 |
(1318) 0x4f9d5 MOV (%R8,%R13,1),%R11 |
(1318) 0x4f9d9 MOV (%R15,%R11,8),%RBX |
(1318) 0x4f9dd XOR %RSI,%RBX |
(1318) 0x4f9e0 CMP $-0x1,%RBX |
(1318) 0x4f9e4 JE 4f9fd |
(1318) 0x4f9e6 MOV (%R9,%R10,8),%R8 |
(1318) 0x4f9ea MOV %R11,(%R8,%RCX,8) |
(1318) 0x4f9ee INC %RCX |
(1318) 0x4f9f1 MOV %RDI,(%R15,%R11,8) |
(1318) 0x4f9f5 MOV (%R14),%R10 |
(1318) 0x4f9f8 MOV -0x8(%R9,%R10,8),%R8 |
(1318) 0x4f9fd MOV 0x8(%R8,%R13,1),%R11 |
(1318) 0x4fa02 MOV (%R15,%R11,8),%RBX |
(1318) 0x4fa06 XOR %RSI,%RBX |
(1318) 0x4fa09 CMP $-0x1,%RBX |
(1318) 0x4fa0d JE 4fa26 |
(1318) 0x4fa0f MOV (%R9,%R10,8),%R8 |
(1318) 0x4fa13 MOV %R11,(%R8,%RCX,8) |
(1318) 0x4fa17 INC %RCX |
(1318) 0x4fa1a MOV %RDI,(%R15,%R11,8) |
(1318) 0x4fa1e MOV (%R14),%R10 |
(1318) 0x4fa21 MOV -0x8(%R9,%R10,8),%R8 |
(1318) 0x4fa26 MOV 0x10(%R8,%R13,1),%R11 |
(1318) 0x4fa2b MOV (%R15,%R11,8),%RBX |
(1318) 0x4fa2f XOR %RSI,%RBX |
(1318) 0x4fa32 CMP $-0x1,%RBX |
(1318) 0x4fa36 JE 4fa4f |
(1318) 0x4fa38 MOV (%R9,%R10,8),%R8 |
(1318) 0x4fa3c MOV %R11,(%R8,%RCX,8) |
(1318) 0x4fa40 INC %RCX |
(1318) 0x4fa43 MOV %RDI,(%R15,%R11,8) |
(1318) 0x4fa47 MOV (%R14),%R10 |
(1318) 0x4fa4a MOV -0x8(%R9,%R10,8),%R8 |
(1318) 0x4fa4f MOV 0x18(%R8,%R13,1),%R8 |
(1318) 0x4fa54 MOV (%R15,%R8,8),%R11 |
(1318) 0x4fa58 XOR %RSI,%R11 |
(1318) 0x4fa5b CMP $-0x1,%R11 |
(1318) 0x4fa5f JE 4f9c0 |
(1318) 0x4fa65 MOV (%R9,%R10,8),%R10 |
(1318) 0x4fa69 MOV %R8,(%R10,%RCX,8) |
(1318) 0x4fa6d INC %RCX |
(1318) 0x4fa70 MOV %RDI,(%R15,%R8,8) |
(1318) 0x4fa74 JMP 4f9c0 |
0x4fa79 NOPL (%RAX) |
(1313) 0x4fa80 MOV -0x98(%RBP),%R8 |
(1313) 0x4fa87 MOV (%R8,%RSI,8),%RDX |
(1313) 0x4fa8b MOV 0x8(%R8,%RSI,8),%R9 |
(1313) 0x4fa90 JMP 4faaf |
0x4fa92 NOPW %CS:(%RAX,%RAX,1) |
(1314) 0x4faa0 MOV -0x98(%RBP),%R8 |
(1314) 0x4faa7 MOV 0x8(%R8,%RSI,8),%R9 |
(1314) 0x4faac INC %RDX |
(1314) 0x4faaf CMP %R9,%RDX |
(1314) 0x4fab2 JGE 4f6b0 |
(1314) 0x4fab8 MOV -0x148(%RBP),%R8 |
(1314) 0x4fabf MOV (%R8,%RDX,8),%R10 |
(1314) 0x4fac3 MOV (%R14),%R8 |
(1314) 0x4fac6 DEC %R8 |
(1314) 0x4fac9 MOV -0x138(%RBP),%R11 |
(1314) 0x4fad0 CMP %R8,(%R11,%R10,8) |
(1314) 0x4fad4 JNE 4faac |
(1314) 0x4fad6 MOV -0x130(%RBP),%R8 |
(1314) 0x4fadd MOV 0x8(%R8,%R10,8),%R8 |
(1314) 0x4fae2 TEST %R8,%R8 |
(1314) 0x4fae5 JLE 4faac |
(1314) 0x4fae7 MOV -0x120(%RBP),%R9 |
(1314) 0x4faee MOV (%R9,%R10,8),%R9 |
(1314) 0x4faf2 ADD %R9,%R8 |
(1314) 0x4faf5 MOV -0x128(%RBP),%R10 |
(1314) 0x4fafc MOV (%R10),%R10 |
(1314) 0x4faff JMP 4fb18 |
0x4fb01 NOPW %CS:(%RAX,%RAX,1) |
(1315) 0x4fb10 INC %R9 |
(1315) 0x4fb13 CMP %R8,%R9 |
(1315) 0x4fb16 JGE 4faa0 |
(1315) 0x4fb18 MOV (%R14),%R12 |
(1315) 0x4fb1b MOV (%R10,%R12,8),%R11 |
(1315) 0x4fb1f MOV (%R11,%R9,8),%R11 |
(1315) 0x4fb23 TEST %R11,%R11 |
(1315) 0x4fb26 JS 4fb60 |
(1315) 0x4fb28 MOV (%R15,%R11,8),%R13 |
(1315) 0x4fb2c XOR %RSI,%R13 |
(1315) 0x4fb2f CMP $-0x1,%R13 |
(1315) 0x4fb33 JE 4fb10 |
(1315) 0x4fb35 MOV -0x78(%RBP),%RBX |
(1315) 0x4fb39 MOV (%RBX),%R13 |
(1315) 0x4fb3c MOV -0x38(%RBP),%RBX |
(1315) 0x4fb40 MOV (%R13,%R12,8),%R12 |
(1315) 0x4fb45 MOV %R11,(%R12,%RCX,8) |
(1315) 0x4fb49 INC %RCX |
(1315) 0x4fb4c MOV %RDI,(%R15,%R11,8) |
(1315) 0x4fb50 JMP 4fb10 |
0x4fb52 NOPW %CS:(%RAX,%RAX,1) |
(1315) 0x4fb60 NOT %R11 |
(1315) 0x4fb63 MOV (%RBX,%R11,8),%R13 |
(1315) 0x4fb67 XOR %RSI,%R13 |
(1315) 0x4fb6a CMP $-0x1,%R13 |
(1315) 0x4fb6e JE 4fb10 |
(1315) 0x4fb70 MOV -0xa8(%RBP),%RBX |
(1315) 0x4fb77 MOV (%RBX),%R13 |
(1315) 0x4fb7a MOV -0x38(%RBP),%RBX |
(1315) 0x4fb7e MOV (%R13,%R12,8),%R12 |
(1315) 0x4fb83 MOV %R11,(%R12,%RAX,8) |
(1315) 0x4fb87 INC %RAX |
(1315) 0x4fb8a MOV %RDI,(%RBX,%R11,8) |
(1315) 0x4fb8e JMP 4fb10 |
0x4fb90 MOV %RBX,%RDI |
0x4fb93 CALL e250 <hypre_Free@plt> |
0x4fb98 CMPQ $0,-0xc0(%RBP) |
0x4fba0 JNE 4fbc4 |
0x4fba2 MOV -0x170(%RBP),%RAX |
0x4fba9 CMP -0xc8(%RBP),%RAX |
0x4fbb0 JE 4fbc4 |
0x4fbb2 ADD $0x148,%RSP |
0x4fbb9 POP %RBX |
0x4fbba POP %R12 |
0x4fbbc POP %R13 |
0x4fbbe POP %R14 |
0x4fbc0 POP %R15 |
0x4fbc2 POP %RBP |
0x4fbc3 RET |
0x4fbc4 MOV %R15,%RDI |
0x4fbc7 ADD $0x148,%RSP |
0x4fbce POP %RBX |
0x4fbcf POP %R12 |
0x4fbd1 POP %R13 |
0x4fbd3 POP %R14 |
0x4fbd5 POP %R15 |
0x4fbd7 POP %RBP |
0x4fbd8 JMP e250 |
0x4fbdd NOPL (%RAX) |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Source file and lines | par_multi_interp.c:891-1134 |
Module | libparcsr_ls.so |
nb instructions | 312 |
nb uops | 333 |
loop length | 1486 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 63 |
micro-operation queue | 55.50 cycles |
front end | 55.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 14.60 | 14.60 | 40.33 | 40.33 | 33.00 | 14.60 | 14.60 | 33.00 | 33.00 | 33.00 | 14.60 | 40.33 |
cycles | 14.60 | 15.80 | 40.33 | 40.33 | 33.00 | 14.60 | 14.60 | 33.00 | 33.00 | 33.00 | 14.60 | 40.33 |
Cycles executing div or sqrt instructions | 16.00 |
FE+BE cycles | 53.52-53.55 |
Stall cycles | 0.00 |
Front-end | 55.50 |
Dispatch | 40.33 |
DIV/SQRT | 16.00 |
Overall L1 | 55.50 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 9% |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x148,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,-0x148(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x140(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa8(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x168(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x150(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x138(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x80(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x70(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x160(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x120(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb8(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL def0 <hypre_GetThreadNum@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL e6c0 <hypre_NumActiveThreads@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV (%R12),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
OR %RSI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x20,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
JE 4ee8d <hypre_BoomerAMGBuildMultipass.extracted.34+0x16d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RCX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %RSI | 5 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 10 |
JMP 4ee93 <hypre_BoomerAMGBuildMultipass.extracted.34+0x173> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %ECX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
DIV %ESI | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV %RSI,-0x158(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
DEC %RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x40(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %RAX,%RDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
CMP %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVE %RCX,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RBX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R15),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL e860 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMPQ $0,(%R15) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 4ef00 <hypre_BoomerAMGBuildMultipass.extracted.34+0x1e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL -0x40(%RBP),%R12 | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
INC %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xc8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13,-0x170(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RDI,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 4ef36 <hypre_BoomerAMGBuildMultipass.extracted.34+0x216> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL e860 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JG 4ef5b <hypre_BoomerAMGBuildMultipass.extracted.34+0x23b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 4ef72 <hypre_BoomerAMGBuildMultipass.extracted.34+0x252> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0xc0(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 4ef72 <hypre_BoomerAMGBuildMultipass.extracted.34+0x252> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL e860 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 4ef72 <hypre_BoomerAMGBuildMultipass.extracted.34+0x252> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA (,%RAX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL e690 <_intel_fast_memset@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
JMP 4ef72 <hypre_BoomerAMGBuildMultipass.extracted.34+0x252> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x108(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%R12,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xd0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RCX,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x68(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JGE 4f3d1 <hypre_BoomerAMGBuildMultipass.extracted.34+0x6b1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xe8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RSI,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4efe8 <hypre_BoomerAMGBuildMultipass.extracted.34+0x2c8> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x40(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 4f3ef <hypre_BoomerAMGBuildMultipass.extracted.34+0x6cf> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb8(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x158(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,(%RSI) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x90(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,(%R12,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x88(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%R13,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xd8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x2680ba(%RIP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL e870 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,-0x40(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0xb8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 4f45a <hypre_BoomerAMGBuildMultipass.extracted.34+0x73a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x2,(%RDI) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 4f45a <hypre_BoomerAMGBuildMultipass.extracted.34+0x73a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R13,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R12,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xd8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x268086(%RIP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL e870 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x40(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R8,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 4f5a9 <hypre_BoomerAMGBuildMultipass.extracted.34+0x889> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xd0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RAX,-0x80(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x90(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x88(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 4f638 <hypre_BoomerAMGBuildMultipass.extracted.34+0x918> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xe8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xe0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVLE %RSI,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RSI,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x4,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JB 4f550 <hypre_BoomerAMGBuildMultipass.extracted.34+0x830> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x30(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SHR $0x2,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x58(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%R8,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x18,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x30(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R8,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RSI,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x108(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 4f638 <hypre_BoomerAMGBuildMultipass.extracted.34+0x918> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD -0x80(%RBP),%RSI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
ADD %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4f638 <hypre_BoomerAMGBuildMultipass.extracted.34+0x918> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x88(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RCX,%RAX,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x90(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RCX,%RAX,8),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x160(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDI,(%RAX) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x168(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R12,(%RAX) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL e860 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xa8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RDX,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R12,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 4f61c <hypre_BoomerAMGBuildMultipass.extracted.34+0x8fc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL e860 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x78(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 4f638 <hypre_BoomerAMGBuildMultipass.extracted.34+0x918> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x150(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0x2,(%RAX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 4f638 <hypre_BoomerAMGBuildMultipass.extracted.34+0x918> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x78(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVQ $0,(%RAX,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xd8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x267ec8(%RIP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL e870 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x40(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 4f670 <hypre_BoomerAMGBuildMultipass.extracted.34+0x950> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RAX,%RDX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x90(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RCX,%RDX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4f674 <hypre_BoomerAMGBuildMultipass.extracted.34+0x954> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x80(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0xd0(%RBP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 4fb90 <hypre_BoomerAMGBuildMultipass.extracted.34+0xe70> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 4f6c4 <hypre_BoomerAMGBuildMultipass.extracted.34+0x9a4> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL e250 <hypre_Free@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,-0xc0(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 4fbc4 <hypre_BoomerAMGBuildMultipass.extracted.34+0xea4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x170(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0xc8(%RBP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 4fbc4 <hypre_BoomerAMGBuildMultipass.extracted.34+0xea4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD $0x148,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD $0x148,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP e250 <hypre_Free@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | par_multi_interp.c:891-1134 |
Module | libparcsr_ls.so |
nb instructions | 312 |
nb uops | 333 |
loop length | 1486 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 63 |
micro-operation queue | 55.50 cycles |
front end | 55.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 14.60 | 14.60 | 40.33 | 40.33 | 33.00 | 14.60 | 14.60 | 33.00 | 33.00 | 33.00 | 14.60 | 40.33 |
cycles | 14.60 | 15.80 | 40.33 | 40.33 | 33.00 | 14.60 | 14.60 | 33.00 | 33.00 | 33.00 | 14.60 | 40.33 |
Cycles executing div or sqrt instructions | 16.00 |
FE+BE cycles | 53.52-53.55 |
Stall cycles | 0.00 |
Front-end | 55.50 |
Dispatch | 40.33 |
DIV/SQRT | 16.00 |
Overall L1 | 55.50 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 9% |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x148,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,-0x148(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x140(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa8(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x168(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x150(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x138(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x80(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x70(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x160(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x120(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb8(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL def0 <hypre_GetThreadNum@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL e6c0 <hypre_NumActiveThreads@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV (%R12),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
OR %RSI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x20,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
JE 4ee8d <hypre_BoomerAMGBuildMultipass.extracted.34+0x16d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RCX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %RSI | 5 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 10 |
JMP 4ee93 <hypre_BoomerAMGBuildMultipass.extracted.34+0x173> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %ECX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
DIV %ESI | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV %RSI,-0x158(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
DEC %RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x40(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %RAX,%RDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
CMP %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVE %RCX,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RBX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R15),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL e860 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMPQ $0,(%R15) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 4ef00 <hypre_BoomerAMGBuildMultipass.extracted.34+0x1e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL -0x40(%RBP),%R12 | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
INC %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xc8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13,-0x170(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RDI,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 4ef36 <hypre_BoomerAMGBuildMultipass.extracted.34+0x216> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL e860 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JG 4ef5b <hypre_BoomerAMGBuildMultipass.extracted.34+0x23b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 4ef72 <hypre_BoomerAMGBuildMultipass.extracted.34+0x252> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0xc0(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 4ef72 <hypre_BoomerAMGBuildMultipass.extracted.34+0x252> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL e860 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 4ef72 <hypre_BoomerAMGBuildMultipass.extracted.34+0x252> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA (,%RAX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL e690 <_intel_fast_memset@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
JMP 4ef72 <hypre_BoomerAMGBuildMultipass.extracted.34+0x252> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x108(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%R12,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xd0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RCX,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x68(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JGE 4f3d1 <hypre_BoomerAMGBuildMultipass.extracted.34+0x6b1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xe8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RSI,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4efe8 <hypre_BoomerAMGBuildMultipass.extracted.34+0x2c8> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x40(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 4f3ef <hypre_BoomerAMGBuildMultipass.extracted.34+0x6cf> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb8(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x158(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,(%RSI) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x90(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,(%R12,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x88(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%R13,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xd8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x2680ba(%RIP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL e870 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,-0x40(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0xb8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 4f45a <hypre_BoomerAMGBuildMultipass.extracted.34+0x73a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x2,(%RDI) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 4f45a <hypre_BoomerAMGBuildMultipass.extracted.34+0x73a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R13,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R12,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xd8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x268086(%RIP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL e870 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x40(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R8,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 4f5a9 <hypre_BoomerAMGBuildMultipass.extracted.34+0x889> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xd0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RAX,-0x80(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x90(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x88(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 4f638 <hypre_BoomerAMGBuildMultipass.extracted.34+0x918> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xe8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xe0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVLE %RSI,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RSI,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x4,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JB 4f550 <hypre_BoomerAMGBuildMultipass.extracted.34+0x830> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x30(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SHR $0x2,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x58(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%R8,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x18,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x30(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R8,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RSI,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x108(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 4f638 <hypre_BoomerAMGBuildMultipass.extracted.34+0x918> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD -0x80(%RBP),%RSI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
ADD %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4f638 <hypre_BoomerAMGBuildMultipass.extracted.34+0x918> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x88(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RCX,%RAX,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x90(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RCX,%RAX,8),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x160(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDI,(%RAX) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x168(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R12,(%RAX) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL e860 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xa8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RDX,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R12,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 4f61c <hypre_BoomerAMGBuildMultipass.extracted.34+0x8fc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL e860 <hypre_CAlloc@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x78(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 4f638 <hypre_BoomerAMGBuildMultipass.extracted.34+0x918> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x150(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0x2,(%RAX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 4f638 <hypre_BoomerAMGBuildMultipass.extracted.34+0x918> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x78(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVQ $0,(%RAX,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xd8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x267ec8(%RIP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL e870 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x40(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 4f670 <hypre_BoomerAMGBuildMultipass.extracted.34+0x950> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RAX,%RDX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x90(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RCX,%RDX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4f674 <hypre_BoomerAMGBuildMultipass.extracted.34+0x954> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x80(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0xd0(%RBP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 4fb90 <hypre_BoomerAMGBuildMultipass.extracted.34+0xe70> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 4f6c4 <hypre_BoomerAMGBuildMultipass.extracted.34+0x9a4> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL e250 <hypre_Free@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,-0xc0(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 4fbc4 <hypre_BoomerAMGBuildMultipass.extracted.34+0xea4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x170(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0xc8(%RBP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 4fbc4 <hypre_BoomerAMGBuildMultipass.extracted.34+0xea4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD $0x148,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD $0x148,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP e250 <hypre_Free@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼hypre_BoomerAMGBuildMultipass.extracted.34– | 1.8 | 0.73 |
○Loop 1322 - par_multi_interp.c:1030-1034 - libparcsr_ls.so | 0.11 | 0.04 |
▼Loop 1324 - par_multi_interp.c:917-999 - libparcsr_ls.so– | 0.05 | 0.02 |
▼Loop 1327 - par_multi_interp.c:917-970 - libparcsr_ls.so– | 0.63 | 0.21 |
○Loop 1330 - par_multi_interp.c:951-958 - libparcsr_ls.so | 0.21 | 0.07 |
○Loop 1329 - par_multi_interp.c:963-970 - libparcsr_ls.so | 0 | 0 |
○Loop 1331 - par_multi_interp.c:951-958 - libparcsr_ls.so | 0 | 0.01 |
○Loop 1328 - par_multi_interp.c:963-970 - libparcsr_ls.so | 0 | 0 |
▼Loop 1325 - par_multi_interp.c:976-999 - libparcsr_ls.so– | 0 | 0 |
○Loop 1326 - par_multi_interp.c:983-999 - libparcsr_ls.so | 0 | 0 |
▼Loop 1313 - par_multi_interp.c:917-1125 - libparcsr_ls.so– | 0.05 | 0.02 |
▼Loop 1316 - par_multi_interp.c:917-1099 - libparcsr_ls.so– | 0.54 | 0.18 |
○Loop 1319 - par_multi_interp.c:1082-1088 - libparcsr_ls.so | 0.2 | 0.07 |
○Loop 1317 - par_multi_interp.c:1093-1099 - libparcsr_ls.so | 0 | 0 |
○Loop 1318 - par_multi_interp.c:1093-1099 - libparcsr_ls.so | 0 | 0 |
○Loop 1320 - par_multi_interp.c:1082-1088 - libparcsr_ls.so | 0 | 0.01 |
▼Loop 1314 - par_multi_interp.c:1104-1125 - libparcsr_ls.so– | 0 | 0 |
○Loop 1315 - par_multi_interp.c:1111-1125 - libparcsr_ls.so | 0 | 0 |
○Loop 1332 - par_multi_interp.c:917-918 - libparcsr_ls.so | 0.01 | 0.01 |
○Loop 1323 - par_multi_interp.c:1017-1020 - libparcsr_ls.so | 0 | 0 |
○Loop 1321 - par_multi_interp.c:1030-1034 - libparcsr_ls.so | 0 | 0 |