Function: hypre_BoomerAMGBuildExtPIInterp.extracted | Module: exec | Source: par_lr_interp.c:1196-1757 [...] | Coverage: 0.33% |
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Function: hypre_BoomerAMGBuildExtPIInterp.extracted | Module: exec | Source: par_lr_interp.c:1196-1757 [...] | Coverage: 0.33% |
---|
/scratch_na/users/xoserete/qaas_runs/171-172-8218/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c: 1196 - 1757 |
-------------------------------------------------------------------------------- |
1196: #pragma omp parallel private(i,my_thread_num,num_threads,start,stop,coarse_counter,jj_counter,jj_counter_offd, P_marker, P_marker_offd,jj,kk,i1,k1,loc_col,jj_begin_row,jj_begin_row_offd,jj_end_row,jj_end_row_offd,diagonal,sum,sgn,jj1,i2,distribute,strong_f_marker) |
[...] |
1221: if (n_fine) |
1222: { |
1223: P_marker = hypre_CTAlloc(HYPRE_Int, n_fine); |
1224: for (i = 0; i < n_fine; i++) |
1225: { P_marker[i] = -1; } |
1226: } |
1227: if (full_off_procNodes) |
1228: { |
1229: P_marker_offd = hypre_CTAlloc(HYPRE_Int, full_off_procNodes); |
1230: for (i = 0; i < full_off_procNodes; i++) |
1231: { P_marker_offd[i] = -1;} |
1232: } |
1233: |
1234: /* this thread's row range */ |
1235: my_thread_num = hypre_GetThreadNum(); |
1236: num_threads = hypre_NumActiveThreads(); |
1237: start = (n_fine/num_threads)*my_thread_num; |
1238: if (my_thread_num == num_threads-1) |
[...] |
1244: for (i = start; i < stop; i++) |
1245: { |
1246: P_diag_i[i] = jj_counter; |
1247: if (num_procs > 1) |
1248: P_offd_i[i] = jj_counter_offd; |
1249: |
1250: if (CF_marker[i] >= 0) |
1251: { |
1252: jj_counter++; |
1253: fine_to_coarse[i] = coarse_counter; |
1254: coarse_counter++; |
[...] |
1262: else if (CF_marker[i] != -3) |
1263: { |
1264: for (jj = S_diag_i[i]; jj < S_diag_i[i+1]; jj++) |
1265: { |
1266: i1 = S_diag_j[jj]; |
1267: if (CF_marker[i1] >= 0) |
1268: { /* i1 is a C point */ |
1269: if (P_marker[i1] < P_diag_i[i]) |
1270: { |
1271: P_marker[i1] = jj_counter; |
1272: jj_counter++; |
1273: } |
1274: } |
1275: else if (CF_marker[i1] != -3) |
1276: { /* i1 is a F point, loop through it's strong neighbors */ |
1277: for (kk = S_diag_i[i1]; kk < S_diag_i[i1+1]; kk++) |
1278: { |
1279: k1 = S_diag_j[kk]; |
1280: if (CF_marker[k1] >= 0) |
1281: { |
1282: if(P_marker[k1] < P_diag_i[i]) |
1283: { |
1284: P_marker[k1] = jj_counter; |
1285: jj_counter++; |
1286: } |
1287: } |
1288: } |
1289: if(num_procs > 1) |
1290: { |
1291: for (kk = S_offd_i[i1]; kk < S_offd_i[i1+1]; kk++) |
1292: { |
1293: if(col_offd_S_to_A) |
1294: k1 = col_offd_S_to_A[S_offd_j[kk]]; |
1295: else |
1296: k1 = S_offd_j[kk]; |
1297: if (CF_marker_offd[k1] >= 0) |
1298: { |
1299: if(P_marker_offd[k1] < P_offd_i[i]) |
1300: { |
1301: tmp_CF_marker_offd[k1] = 1; |
1302: P_marker_offd[k1] = jj_counter_offd; |
1303: jj_counter_offd++; |
[...] |
1311: if (num_procs > 1) |
1312: { |
1313: for (jj = S_offd_i[i]; jj < S_offd_i[i+1]; jj++) |
1314: { |
1315: i1 = S_offd_j[jj]; |
1316: if(col_offd_S_to_A) |
1317: i1 = col_offd_S_to_A[i1]; |
1318: if (CF_marker_offd[i1] >= 0) |
1319: { |
1320: if(P_marker_offd[i1] < P_offd_i[i]) |
1321: { |
1322: tmp_CF_marker_offd[i1] = 1; |
1323: P_marker_offd[i1] = jj_counter_offd; |
1324: jj_counter_offd++; |
1325: } |
1326: } |
1327: else if (CF_marker_offd[i1] != -3) |
1328: { /* F point; look at neighbors of i1. Sop contains global col |
1329: * numbers and entries that could be in S_diag or S_offd or |
1330: * neither. */ |
1331: for(kk = Sop_i[i1]; kk < Sop_i[i1+1]; kk++) |
1332: { |
1333: k1 = Sop_j[kk]; |
1334: if(k1 >= col_1 && k1 < col_n) |
1335: { /* In S_diag */ |
1336: loc_col = k1-col_1; |
1337: if(P_marker[loc_col] < P_diag_i[i]) |
1338: { |
1339: P_marker[loc_col] = jj_counter; |
1340: jj_counter++; |
1341: } |
1342: } |
1343: else |
1344: { |
1345: loc_col = -k1 - 1; |
1346: if(P_marker_offd[loc_col] < P_offd_i[i]) |
1347: { |
1348: P_marker_offd[loc_col] = jj_counter_offd; |
1349: tmp_CF_marker_offd[loc_col] = 1; |
1350: jj_counter_offd++; |
[...] |
1365: P_diag_i[stop] = jj_counter; |
1366: P_offd_i[stop] = jj_counter_offd; |
1367: fine_to_coarse_offset[my_thread_num] = coarse_counter; |
1368: diag_offset[my_thread_num] = jj_counter; |
1369: offd_offset[my_thread_num] = jj_counter_offd; |
[...] |
1375: if(my_thread_num == 0) |
1376: { |
1377: /* Calculate the offset for P_diag_i and P_offd_i for each thread */ |
1378: for (i = 1; i < num_threads; i++) |
1379: { |
1380: diag_offset[i] = diag_offset[i-1] + diag_offset[i]; |
1381: fine_to_coarse_offset[i] = fine_to_coarse_offset[i-1] + fine_to_coarse_offset[i]; |
1382: offd_offset[i] = offd_offset[i-1] + offd_offset[i]; |
[...] |
1389: if(my_thread_num > 0) |
1390: { |
1391: /* update row pointer array with offset, |
1392: * making sure to update the row stop index */ |
1393: for (i = start+1; i <= stop; i++) |
1394: { |
1395: P_diag_i[i] += diag_offset[my_thread_num-1]; |
1396: P_offd_i[i] += offd_offset[my_thread_num-1]; |
1397: } |
1398: /* update fine_to_coarse by offsetting with the offset |
1399: * from the preceding thread */ |
1400: for (i = start; i < stop; i++) |
1401: { |
1402: if(fine_to_coarse[i] >= 0) |
1403: { fine_to_coarse[i] += fine_to_coarse_offset[my_thread_num-1]; } |
[...] |
1410: if(my_thread_num == 0) |
1411: { |
1412: if (debug_flag==4) |
1413: { |
1414: wall_time = time_getWallclockSeconds() - wall_time; |
1415: hypre_printf("Proc = %d determine structure %f\n", |
1416: my_id, wall_time); |
1417: fflush(NULL); |
[...] |
1423: if (debug_flag== 4) wall_time = time_getWallclockSeconds(); |
1424: |
1425: P_diag_size = P_diag_i[n_fine]; |
1426: P_offd_size = P_offd_i[n_fine]; |
1427: |
1428: if (P_diag_size) |
1429: { |
1430: P_diag_j = hypre_CTAlloc(HYPRE_Int, P_diag_size); |
1431: P_diag_data = hypre_CTAlloc(HYPRE_Real, P_diag_size); |
1432: } |
1433: |
1434: if (P_offd_size) |
1435: { |
1436: P_offd_j = hypre_CTAlloc(HYPRE_Int, P_offd_size); |
1437: P_offd_data = hypre_CTAlloc(HYPRE_Real, P_offd_size); |
1438: } |
1439: } |
1440: |
1441: /* Fine to coarse mapping */ |
1442: if(num_procs > 1 && my_thread_num == 0) |
1443: { |
1444: for (i = 0; i < n_fine; i++) |
1445: fine_to_coarse[i] += my_first_cpt; |
1446: |
1447: hypre_alt_insert_new_nodes(comm_pkg, extend_comm_pkg, fine_to_coarse, |
1448: full_off_procNodes, |
1449: fine_to_coarse_offd); |
1450: |
1451: for (i = 0; i < n_fine; i++) |
1452: fine_to_coarse[i] -= my_first_cpt; |
1453: } |
1454: |
1455: for (i = 0; i < n_fine; i++) |
1456: P_marker[i] = -1; |
1457: |
1458: for (i = 0; i < full_off_procNodes; i++) |
1459: P_marker_offd[i] = -1; |
[...] |
1469: for (i = start; i < stop; i++) |
1470: { |
1471: jj_begin_row = P_diag_i[i]; |
1472: jj_begin_row_offd = P_offd_i[i]; |
[...] |
1480: if (CF_marker[i] >= 0) |
1481: { |
1482: P_diag_j[jj_counter] = fine_to_coarse[i]; |
1483: P_diag_data[jj_counter] = one; |
[...] |
1491: else if (CF_marker[i] != -3) |
1492: { |
1493: strong_f_marker--; |
1494: for (jj = S_diag_i[i]; jj < S_diag_i[i+1]; jj++) |
1495: { |
1496: i1 = S_diag_j[jj]; |
[...] |
1503: if (CF_marker[i1] >= 0) |
1504: { |
1505: if (P_marker[i1] < jj_begin_row) |
1506: { |
1507: P_marker[i1] = jj_counter; |
1508: P_diag_j[jj_counter] = fine_to_coarse[i1]; |
1509: P_diag_data[jj_counter] = zero; |
1510: jj_counter++; |
1511: } |
1512: } |
1513: else if (CF_marker[i1] != -3) |
1514: { |
1515: P_marker[i1] = strong_f_marker; |
1516: for (kk = S_diag_i[i1]; kk < S_diag_i[i1+1]; kk++) |
1517: { |
1518: k1 = S_diag_j[kk]; |
1519: if (CF_marker[k1] >= 0) |
1520: { |
1521: if(P_marker[k1] < jj_begin_row) |
1522: { |
1523: P_marker[k1] = jj_counter; |
1524: P_diag_j[jj_counter] = fine_to_coarse[k1]; |
1525: P_diag_data[jj_counter] = zero; |
1526: jj_counter++; |
1527: } |
1528: } |
1529: } |
1530: if(num_procs > 1) |
1531: { |
1532: for (kk = S_offd_i[i1]; kk < S_offd_i[i1+1]; kk++) |
1533: { |
1534: if(col_offd_S_to_A) |
1535: k1 = col_offd_S_to_A[S_offd_j[kk]]; |
1536: else |
1537: k1 = S_offd_j[kk]; |
1538: if(CF_marker_offd[k1] >= 0) |
1539: { |
1540: if(P_marker_offd[k1] < jj_begin_row_offd) |
1541: { |
1542: P_marker_offd[k1] = jj_counter_offd; |
1543: P_offd_j[jj_counter_offd] = k1; |
1544: P_offd_data[jj_counter_offd] = zero; |
1545: jj_counter_offd++; |
[...] |
1553: if ( num_procs > 1) |
1554: { |
1555: for (jj=S_offd_i[i]; jj < S_offd_i[i+1]; jj++) |
1556: { |
1557: i1 = S_offd_j[jj]; |
1558: if(col_offd_S_to_A) |
1559: i1 = col_offd_S_to_A[i1]; |
1560: if ( CF_marker_offd[i1] >= 0) |
1561: { |
1562: if(P_marker_offd[i1] < jj_begin_row_offd) |
1563: { |
1564: P_marker_offd[i1] = jj_counter_offd; |
1565: P_offd_j[jj_counter_offd] = i1; |
1566: P_offd_data[jj_counter_offd] = zero; |
1567: jj_counter_offd++; |
1568: } |
1569: } |
1570: else if (CF_marker_offd[i1] != -3) |
1571: { |
1572: P_marker_offd[i1] = strong_f_marker; |
1573: for(kk = Sop_i[i1]; kk < Sop_i[i1+1]; kk++) |
1574: { |
1575: k1 = Sop_j[kk]; |
1576: /* Find local col number */ |
1577: if(k1 >= col_1 && k1 < col_n) |
1578: { |
1579: loc_col = k1-col_1; |
1580: if(P_marker[loc_col] < jj_begin_row) |
1581: { |
1582: P_marker[loc_col] = jj_counter; |
1583: P_diag_j[jj_counter] = fine_to_coarse[loc_col]; |
1584: P_diag_data[jj_counter] = zero; |
1585: jj_counter++; |
1586: } |
1587: } |
1588: else |
1589: { |
1590: loc_col = -k1 - 1; |
1591: if(P_marker_offd[loc_col] < jj_begin_row_offd) |
1592: { |
1593: P_marker_offd[loc_col] = jj_counter_offd; |
1594: P_offd_j[jj_counter_offd]=loc_col; |
1595: P_offd_data[jj_counter_offd] = zero; |
1596: jj_counter_offd++; |
[...] |
1607: diagonal = A_diag_data[A_diag_i[i]]; |
1608: |
1609: for (jj = A_diag_i[i]+1; jj < A_diag_i[i+1]; jj++) |
1610: { /* i1 is a c-point and strongly influences i, accumulate |
1611: * a_(i,i1) into interpolation weight */ |
1612: i1 = A_diag_j[jj]; |
1613: if (P_marker[i1] >= jj_begin_row) |
1614: { |
1615: P_diag_data[P_marker[i1]] += A_diag_data[jj]; |
1616: } |
1617: else if(P_marker[i1] == strong_f_marker) |
1618: { |
1619: sum = zero; |
1620: sgn = 1; |
1621: if(A_diag_data[A_diag_i[i1]] < 0) sgn = -1; |
1622: /* Loop over row of A for point i1 and calculate the sum |
1623: * of the connections to c-points that strongly influence i. */ |
1624: for(jj1 = A_diag_i[i1]+1; jj1 < A_diag_i[i1+1]; jj1++) |
1625: { |
1626: i2 = A_diag_j[jj1]; |
1627: if((P_marker[i2] >= jj_begin_row || i2 == i) && (sgn*A_diag_data[jj1]) < 0) |
1628: sum += A_diag_data[jj1]; |
1629: } |
1630: if(num_procs > 1) |
1631: { |
1632: for(jj1 = A_offd_i[i1]; jj1< A_offd_i[i1+1]; jj1++) |
1633: { |
1634: i2 = A_offd_j[jj1]; |
1635: if(P_marker_offd[i2] >= jj_begin_row_offd && |
1636: (sgn*A_offd_data[jj1]) < 0) |
1637: sum += A_offd_data[jj1]; |
1638: } |
1639: } |
1640: if(sum != 0) |
1641: { |
1642: distribute = A_diag_data[jj]/sum; |
1643: /* Loop over row of A for point i1 and do the distribution */ |
1644: for(jj1 = A_diag_i[i1]+1; jj1 < A_diag_i[i1+1]; jj1++) |
1645: { |
1646: i2 = A_diag_j[jj1]; |
1647: if(P_marker[i2] >= jj_begin_row && (sgn*A_diag_data[jj1]) < 0) |
1648: P_diag_data[P_marker[i2]] += |
1649: distribute*A_diag_data[jj1]; |
1650: if(i2 == i && (sgn*A_diag_data[jj1]) < 0) |
1651: diagonal += distribute*A_diag_data[jj1]; |
1652: } |
1653: if(num_procs > 1) |
1654: { |
1655: for(jj1 = A_offd_i[i1]; jj1 < A_offd_i[i1+1]; jj1++) |
1656: { |
1657: i2 = A_offd_j[jj1]; |
1658: if(P_marker_offd[i2] >= jj_begin_row_offd && |
1659: (sgn*A_offd_data[jj1]) < 0) |
1660: P_offd_data[P_marker_offd[i2]] += |
[...] |
1667: diagonal += A_diag_data[jj]; |
1668: } |
1669: } |
1670: /* neighbor i1 weakly influences i, accumulate a_(i,i1) into |
1671: * diagonal */ |
1672: else if (CF_marker[i1] != -3) |
1673: { |
1674: if(num_functions == 1 || dof_func[i] == dof_func[i1]) |
1675: diagonal += A_diag_data[jj]; |
1676: } |
1677: } |
1678: if(num_procs > 1) |
1679: { |
1680: for(jj = A_offd_i[i]; jj < A_offd_i[i+1]; jj++) |
1681: { |
1682: i1 = A_offd_j[jj]; |
1683: if(P_marker_offd[i1] >= jj_begin_row_offd) |
1684: P_offd_data[P_marker_offd[i1]] += A_offd_data[jj]; |
1685: else if(P_marker_offd[i1] == strong_f_marker) |
1686: { |
1687: sum = zero; |
1688: for(jj1 = A_ext_i[i1]; jj1 < A_ext_i[i1+1]; jj1++) |
1689: { |
1690: k1 = A_ext_j[jj1]; |
1691: if(k1 >= col_1 && k1 < col_n) |
1692: { /* diag */ |
1693: loc_col = k1 - col_1; |
1694: if(P_marker[loc_col] >= jj_begin_row || loc_col == i) |
1695: sum += A_ext_data[jj1]; |
1696: } |
1697: else |
1698: { |
1699: loc_col = -k1 - 1; |
1700: if(P_marker_offd[loc_col] >= jj_begin_row_offd) |
1701: sum += A_ext_data[jj1]; |
1702: } |
1703: } |
1704: if(sum != 0) |
1705: { |
1706: distribute = A_offd_data[jj] / sum; |
1707: for(jj1 = A_ext_i[i1]; jj1 < A_ext_i[i1+1]; jj1++) |
1708: { |
1709: k1 = A_ext_j[jj1]; |
1710: if(k1 >= col_1 && k1 < col_n) |
1711: { /* diag */ |
1712: loc_col = k1 - col_1; |
1713: if(P_marker[loc_col] >= jj_begin_row) |
1714: P_diag_data[P_marker[loc_col]] += distribute* |
1715: A_ext_data[jj1]; |
1716: if(loc_col == i) |
1717: diagonal += distribute*A_ext_data[jj1]; |
1718: } |
1719: else |
1720: { |
1721: loc_col = -k1 - 1; |
1722: if(P_marker_offd[loc_col] >= jj_begin_row_offd) |
1723: P_offd_data[P_marker_offd[loc_col]] += distribute* |
1724: A_ext_data[jj1]; |
[...] |
1730: diagonal += A_offd_data[jj]; |
1731: } |
1732: } |
1733: else if (CF_marker_offd[i1] != -3) |
1734: { |
1735: if(num_functions == 1 || dof_func[i] == dof_func_offd[i1]) |
1736: diagonal += A_offd_data[jj]; |
1737: } |
1738: } |
1739: } |
1740: if (diagonal) |
1741: { |
1742: for(jj = jj_begin_row; jj < jj_end_row; jj++) |
1743: P_diag_data[jj] /= -diagonal; |
1744: for(jj = jj_begin_row_offd; jj < jj_end_row_offd; jj++) |
1745: P_offd_data[jj] /= -diagonal; |
1746: } |
1747: } |
1748: strong_f_marker--; |
[...] |
1754: if (n_fine) |
1755: { hypre_TFree(P_marker); } |
1756: if (full_off_procNodes) |
1757: { hypre_TFree(P_marker_offd); } |
0x455240 PUSH %RBP |
0x455241 MOV %RSP,%RBP |
0x455244 PUSH %R15 |
0x455246 PUSH %R14 |
0x455248 PUSH %R13 |
0x45524a PUSH %R12 |
0x45524c PUSH %RBX |
0x45524d SUB $0x1b8,%RSP |
0x455254 MOV %R9,-0x1b8(%RBP) |
0x45525b MOV %R8,-0x188(%RBP) |
0x455262 MOV %RCX,-0x190(%RBP) |
0x455269 MOV %RDX,%R14 |
0x45526c MOV %RDI,-0x90(%RBP) |
0x455273 MOV 0x170(%RBP),%RAX |
0x45527a MOV %RAX,-0x170(%RBP) |
0x455281 MOV 0x168(%RBP),%RAX |
0x455288 MOV %RAX,-0x1b0(%RBP) |
0x45528f MOV 0x150(%RBP),%RAX |
0x455296 MOV %RAX,-0xb8(%RBP) |
0x45529d MOV 0x148(%RBP),%RAX |
0x4552a4 MOV %RAX,-0x158(%RBP) |
0x4552ab MOV 0x140(%RBP),%RAX |
0x4552b2 MOV %RAX,-0xc0(%RBP) |
0x4552b9 MOV 0x130(%RBP),%RAX |
0x4552c0 MOV %RAX,-0x1a0(%RBP) |
0x4552c7 MOV 0x128(%RBP),%RAX |
0x4552ce MOV %RAX,-0x140(%RBP) |
0x4552d5 MOV 0x120(%RBP),%RAX |
0x4552dc MOV 0x118(%RBP),%RCX |
0x4552e3 MOV %RCX,-0x178(%RBP) |
0x4552ea MOV 0x110(%RBP),%R15 |
0x4552f1 MOV 0x108(%RBP),%RCX |
0x4552f8 MOV %RCX,-0x148(%RBP) |
0x4552ff MOV 0x100(%RBP),%RCX |
0x455306 MOV %RCX,-0x1d8(%RBP) |
0x45530d MOV 0xf8(%RBP),%RCX |
0x455314 MOV %RCX,-0x100(%RBP) |
0x45531b MOV 0xf0(%RBP),%RCX |
0x455322 MOV %RCX,-0x1d0(%RBP) |
0x455329 MOV 0xe8(%RBP),%RCX |
0x455330 MOV %RCX,-0x40(%RBP) |
0x455334 MOV 0xe0(%RBP),%RCX |
0x45533b MOV %RCX,-0x128(%RBP) |
0x455342 MOV 0xd8(%RBP),%RCX |
0x455349 MOV %RCX,-0x1c8(%RBP) |
0x455350 MOV 0xd0(%RBP),%RCX |
0x455357 MOV %RCX,-0x1c0(%RBP) |
0x45535e MOV 0xc8(%RBP),%RCX |
0x455365 MOV %RCX,-0x130(%RBP) |
0x45536c MOV 0xc0(%RBP),%RCX |
0x455373 MOV %RCX,-0x48(%RBP) |
0x455377 MOV 0xb8(%RBP),%RCX |
0x45537e MOV %RCX,-0x78(%RBP) |
0x455382 MOV 0xb0(%RBP),%RCX |
0x455389 MOV %RCX,-0x138(%RBP) |
0x455390 MOV 0xa8(%RBP),%RCX |
0x455397 MOV %RCX,-0x38(%RBP) |
0x45539b MOV 0xa0(%RBP),%RCX |
0x4553a2 MOV %RCX,-0xa8(%RBP) |
0x4553a9 MOV 0x98(%RBP),%RCX |
0x4553b0 MOV %RCX,-0x110(%RBP) |
0x4553b7 MOV 0x90(%RBP),%RCX |
0x4553be MOV %RCX,-0xa0(%RBP) |
0x4553c5 MOV 0x88(%RBP),%RCX |
0x4553cc MOV %RCX,-0x150(%RBP) |
0x4553d3 MOV 0x80(%RBP),%RCX |
0x4553da MOV %RCX,-0xd0(%RBP) |
0x4553e1 MOV 0x78(%RBP),%RCX |
0x4553e5 MOV %RCX,-0x50(%RBP) |
0x4553e9 MOV 0x70(%RBP),%RCX |
0x4553ed MOV %RCX,-0x118(%RBP) |
0x4553f4 MOV 0x68(%RBP),%RCX |
0x4553f8 MOV %RCX,-0x120(%RBP) |
0x4553ff MOV 0x60(%RBP),%R12 |
0x455403 MOV 0x58(%RBP),%RCX |
0x455407 MOV %RCX,-0x80(%RBP) |
0x45540b MOV 0x50(%RBP),%RCX |
0x45540f MOV %RCX,-0x160(%RBP) |
0x455416 MOV 0x48(%RBP),%RCX |
0x45541a MOV %RCX,-0x60(%RBP) |
0x45541e MOV 0x40(%RBP),%RCX |
0x455422 MOV %RCX,-0xb0(%RBP) |
0x455429 MOV 0x38(%RBP),%RCX |
0x45542d MOV %RCX,-0x198(%RBP) |
0x455434 MOV 0x30(%RBP),%RCX |
0x455438 MOV %RCX,-0x68(%RBP) |
0x45543c MOV 0x28(%RBP),%RCX |
0x455440 MOV %RCX,-0xc8(%RBP) |
0x455447 MOV 0x20(%RBP),%RCX |
0x45544b MOV %RCX,-0x1a8(%RBP) |
0x455452 MOV 0x18(%RBP),%RCX |
0x455456 MOV %RCX,-0x168(%RBP) |
0x45545d MOV 0x10(%RBP),%RCX |
0x455461 MOV %RCX,-0x108(%RBP) |
0x455468 TEST %R12,%R12 |
0x45546b MOV %RAX,-0xd8(%RBP) |
0x455472 JE 4554e2 |
0x455474 MOV $0x8,%ESI |
0x455479 MOV %R12,%RDI |
0x45547c CALL 4f7e60 <hypre_CAlloc> |
0x455481 MOV %RAX,%RBX |
0x455484 TEST %R12,%R12 |
0x455487 JLE 45549e |
0x455489 LEA (,%R12,8),%RDX |
0x455491 MOV %RBX,%RDI |
0x455494 MOV $0xff,%ESI |
0x455499 CALL 5011c0 <_intel_fast_memset> |
0x45549e MOV -0xd8(%RBP),%RAX |
0x4554a5 MOV (%RAX),%RDI |
0x4554a8 TEST %RDI,%RDI |
0x4554ab JE 4554ea |
0x4554ad MOV $0x8,%ESI |
0x4554b2 CALL 4f7e60 <hypre_CAlloc> |
0x4554b7 MOV -0xd8(%RBP),%RCX |
0x4554be MOV %RAX,-0x30(%RBP) |
0x4554c2 CMPQ $0,(%RCX) |
0x4554c6 JLE 4554ea |
0x4554c8 XOR %EAX,%EAX |
0x4554ca MOV -0x30(%RBP),%RDX |
0x4554ce XCHG %AX,%AX |
(1095) 0x4554d0 MOVQ $-0x1,(%RDX,%RAX,8) |
(1095) 0x4554d8 INC %RAX |
(1095) 0x4554db CMP (%RCX),%RAX |
(1095) 0x4554de JL 4554d0 |
0x4554e0 JMP 4554ea |
0x4554e2 MOV (%RAX),%RDI |
0x4554e5 TEST %RDI,%RDI |
0x4554e8 JNE 4554ad |
0x4554ea CALL 4f9c90 <hypre_GetThreadNum> |
0x4554ef MOV %RAX,-0x98(%RBP) |
0x4554f6 CALL 4f9c80 <hypre_NumActiveThreads> |
0x4554fb MOV %RAX,%RSI |
0x4554fe MOV %R12,%RAX |
0x455501 OR %RSI,%RAX |
0x455504 SHR $0x20,%RAX |
0x455508 JE 455514 |
0x45550a MOV %R12,%RAX |
0x45550d CQTO |
0x45550f IDIV %RSI |
0x455512 JMP 45551b |
0x455514 MOV %R12D,%EAX |
0x455517 XOR %EDX,%EDX |
0x455519 DIV %ESI |
0x45551b MOV -0x38(%RBP),%R10 |
0x45551f MOV %R15,-0x70(%RBP) |
0x455523 MOV %RAX,%R13 |
0x455526 MOV -0x98(%RBP),%RCX |
0x45552d IMUL %RCX,%R13 |
0x455531 LEA -0x1(%RSI),%RDI |
0x455535 LEA 0x1(%RCX),%RDX |
0x455539 MOV %RAX,-0x180(%RBP) |
0x455540 IMUL %RAX,%RDX |
0x455544 MOV %RDI,%RAX |
0x455547 MOV %RDI,-0xe8(%RBP) |
0x45554e CMP %RDI,%RCX |
0x455551 MOV %R12,-0xf8(%RBP) |
0x455558 CMOVE %R12,%RDX |
0x45555c MOV %RDX,-0xe0(%RBP) |
0x455563 CMP %R13,%RDX |
0x455566 MOV -0x48(%RBP),%RDX |
0x45556a MOV %RSI,-0xf0(%RBP) |
0x455571 MOV %R14,-0x88(%RBP) |
0x455578 JG 455695 |
0x45557e XOR %EDI,%EDI |
0x455580 XOR %R12D,%R12D |
0x455583 XOR %R15D,%R15D |
0x455586 MOV %RDI,-0x58(%RBP) |
0x45558a MOV -0x90(%RBP),%RAX |
0x455591 MOV (%RAX),%ESI |
0x455593 MOV $0x749f90,%EDI |
0x455598 CALL 410130 <__kmpc_barrier@plt> |
0x45559d MOV -0xe0(%RBP),%RAX |
0x4555a4 MOV -0x38(%RBP),%RCX |
0x4555a8 MOV %R12,(%RCX,%RAX,8) |
0x4555ac MOV -0x48(%RBP),%RCX |
0x4555b0 MOV %R15,(%RCX,%RAX,8) |
0x4555b4 MOV -0x98(%RBP),%RCX |
0x4555bb MOV -0x158(%RBP),%RAX |
0x4555c2 MOV -0x58(%RBP),%RDX |
0x4555c6 MOV %RDX,(%RAX,%RCX,8) |
0x4555ca MOV -0xc0(%RBP),%RDX |
0x4555d1 MOV %R12,(%RDX,%RCX,8) |
0x4555d5 MOV %RAX,%R12 |
0x4555d8 MOV -0xb8(%RBP),%RAX |
0x4555df MOV %R15,(%RAX,%RCX,8) |
0x4555e3 MOV %RAX,%R15 |
0x4555e6 MOV -0x90(%RBP),%RAX |
0x4555ed MOV (%RAX),%ESI |
0x4555ef MOV $0x749fb0,%EDI |
0x4555f4 CALL 410130 <__kmpc_barrier@plt> |
0x4555f9 MOV -0xc0(%RBP),%R11 |
0x455600 MOV %R15,%R10 |
0x455603 CMPQ $0,-0x98(%RBP) |
0x45560b MOV -0x30(%RBP),%R15 |
0x45560f MOV -0xf0(%RBP),%R9 |
0x455616 JNE 455b53 |
0x45561c CMP $0x1,%R9 |
0x455620 JLE 455b53 |
0x455626 MOV -0xe8(%RBP),%RDX |
0x45562d LEA (%R11,%RDX,8),%RAX |
0x455631 CMP %R12,%RAX |
0x455634 SETAE %DIL |
0x455638 LEA (%R12,%RDX,8),%RCX |
0x45563c CMP %R11,%RCX |
0x45563f SETAE %R8B |
0x455643 CMP %R10,%RAX |
0x455646 SETB %AL |
0x455649 LEA (%R10,%RDX,8),%RDX |
0x45564d CMP %R11,%RDX |
0x455650 SETB %SIL |
0x455654 CMP %R10,%RCX |
0x455657 SETB %CL |
0x45565a CMP %R12,%RDX |
0x45565d SETB %DL |
0x455660 TEST %R8B,%DIL |
0x455663 JNE 455a12 |
0x455669 OR %SIL,%AL |
0x45566c JE 455a12 |
0x455672 OR %DL,%CL |
0x455674 JE 455a12 |
0x45567a MOV (%R11),%RDX |
0x45567d MOV (%R12),%RCX |
0x455681 MOV (%R10),%RAX |
0x455684 CMP $0x2,%R9 |
0x455688 JNE 455aa5 |
0x45568e XOR %ESI,%ESI |
0x455690 JMP 455b05 |
0x455695 XOR %R15D,%R15D |
0x455698 MOV %R13,%RAX |
0x45569b XOR %R12D,%R12D |
0x45569e XOR %EDI,%EDI |
0x4556a0 JMP 4556d7 |
0x4556a2 NOPW %CS:(%RAX,%RAX,1) |
(1088) 0x4556b0 MOV (%R14,%RAX,8),%RCX |
(1088) 0x4556b4 TEST %RCX,%RCX |
(1088) 0x4556b7 JS 4556f0 |
(1088) 0x4556b9 INC %R12 |
(1088) 0x4556bc MOV -0x70(%RBP),%RCX |
(1088) 0x4556c0 MOV %RDI,(%RCX,%RAX,8) |
(1088) 0x4556c4 INC %RDI |
(1088) 0x4556c7 INC %RAX |
(1088) 0x4556ca CMP -0xe0(%RBP),%RAX |
(1088) 0x4556d1 JGE 455586 |
(1088) 0x4556d7 MOV %R12,(%R10,%RAX,8) |
(1088) 0x4556db MOV -0xc8(%RBP),%RCX |
(1088) 0x4556e2 CMPQ $0x2,(%RCX) |
(1088) 0x4556e6 JL 4556b0 |
(1088) 0x4556e8 MOV %R15,(%RDX,%RAX,8) |
(1088) 0x4556ec JMP 4556b0 |
0x4556ee XCHG %AX,%AX |
(1088) 0x4556f0 CMP $-0x3,%RCX |
(1088) 0x4556f4 JE 4556c7 |
(1088) 0x4556f6 MOV -0xd0(%RBP),%RDX |
(1088) 0x4556fd MOV (%RDX,%RAX,8),%RCX |
(1088) 0x455701 CMP 0x8(%RDX,%RAX,8),%RCX |
(1088) 0x455706 MOV %RDI,-0x58(%RBP) |
(1088) 0x45570a JL 455865 |
(1088) 0x455710 MOV -0xc8(%RBP),%RCX |
(1088) 0x455717 CMPQ $0x2,(%RCX) |
(1088) 0x45571b JL 4559fc |
(1088) 0x455721 MOV -0xa0(%RBP),%RDX |
(1088) 0x455728 MOV (%RDX,%RAX,8),%RCX |
(1088) 0x45572c CMP 0x8(%RDX,%RAX,8),%RCX |
(1088) 0x455731 JGE 4559fc |
(1088) 0x455737 MOV -0x128(%RBP),%RDX |
(1088) 0x45573e MOV (%RDX),%RDX |
(1088) 0x455741 JMP 455765 |
0x455743 NOPW %CS:(%RAX,%RAX,1) |
(1089) 0x455750 INC %RCX |
(1089) 0x455753 MOV -0xa0(%RBP),%RSI |
(1089) 0x45575a CMP 0x8(%RSI,%RAX,8),%RCX |
(1089) 0x45575f JGE 455a05 |
(1089) 0x455765 MOV -0x110(%RBP),%RSI |
(1089) 0x45576c MOV (%RSI,%RCX,8),%RSI |
(1089) 0x455770 MOV -0x108(%RBP),%RDI |
(1089) 0x455777 TEST %RDI,%RDI |
(1089) 0x45577a JE 455780 |
(1089) 0x45577c MOV (%RDI,%RSI,8),%RSI |
(1089) 0x455780 MOV (%RDX,%RSI,8),%RDI |
(1089) 0x455784 TEST %RDI,%RDI |
(1089) 0x455787 JS 4557b0 |
(1089) 0x455789 MOV -0x30(%RBP),%R9 |
(1089) 0x45578d MOV (%R9,%RSI,8),%RDI |
(1089) 0x455791 MOV -0x48(%RBP),%R8 |
(1089) 0x455795 CMP (%R8,%RAX,8),%RDI |
(1089) 0x455799 JGE 455750 |
(1089) 0x45579b MOV -0x40(%RBP),%RDI |
(1089) 0x45579f MOVQ $0x1,(%RDI,%RSI,8) |
(1089) 0x4557a7 MOV %R15,(%R9,%RSI,8) |
(1089) 0x4557ab INC %R15 |
(1089) 0x4557ae JMP 455750 |
(1089) 0x4557b0 CMP $-0x3,%RDI |
(1089) 0x4557b4 JE 455750 |
(1089) 0x4557b6 MOV -0x140(%RBP),%R8 |
(1089) 0x4557bd MOV (%R8,%RSI,8),%RDI |
(1089) 0x4557c1 JMP 4557de |
0x4557c3 NOPW %CS:(%RAX,%RAX,1) |
(1090) 0x4557d0 MOV -0x38(%RBP),%R10 |
(1090) 0x4557d4 INC %RDI |
(1090) 0x4557d7 MOV -0x140(%RBP),%R8 |
(1090) 0x4557de CMP 0x8(%R8,%RSI,8),%RDI |
(1090) 0x4557e3 JGE 455750 |
(1090) 0x4557e9 MOV -0x1a0(%RBP),%R8 |
(1090) 0x4557f0 MOV (%R8,%RDI,8),%R8 |
(1090) 0x4557f4 MOV %R8,%R9 |
(1090) 0x4557f7 SUB -0x120(%RBP),%R9 |
(1090) 0x4557fe JL 455820 |
(1090) 0x455800 CMP -0x118(%RBP),%R8 |
(1090) 0x455807 JGE 455820 |
(1090) 0x455809 MOV (%RBX,%R9,8),%R8 |
(1090) 0x45580d CMP (%R10,%RAX,8),%R8 |
(1090) 0x455811 JGE 4557d4 |
(1090) 0x455813 MOV %R12,(%RBX,%R9,8) |
(1090) 0x455817 INC %R12 |
(1090) 0x45581a JMP 4557d4 |
0x45581c NOPL (%RAX) |
(1090) 0x455820 NOT %R8 |
(1090) 0x455823 MOV -0x30(%RBP),%R11 |
(1090) 0x455827 MOV (%R11,%R8,8),%R9 |
(1090) 0x45582b MOV -0x48(%RBP),%R10 |
(1090) 0x45582f CMP (%R10,%RAX,8),%R9 |
(1090) 0x455833 JGE 4557d0 |
(1090) 0x455835 MOV %R15,(%R11,%R8,8) |
(1090) 0x455839 MOV -0x40(%RBP),%R9 |
(1090) 0x45583d MOVQ $0x1,(%R9,%R8,8) |
(1090) 0x455845 INC %R15 |
(1090) 0x455848 JMP 4557d0 |
(1091) 0x45584a MOV -0x58(%RBP),%RDI |
(1091) 0x45584e XCHG %AX,%AX |
(1091) 0x455850 INC %RCX |
(1091) 0x455853 MOV -0xd0(%RBP),%RDX |
(1091) 0x45585a CMP 0x8(%RDX,%RAX,8),%RCX |
(1091) 0x45585f JGE 455710 |
(1091) 0x455865 MOV -0x150(%RBP),%RDX |
(1091) 0x45586c MOV (%RDX,%RCX,8),%RDX |
(1091) 0x455870 MOV (%R14,%RDX,8),%RSI |
(1091) 0x455874 TEST %RSI,%RSI |
(1091) 0x455877 JS 455890 |
(1091) 0x455879 MOV (%RBX,%RDX,8),%RSI |
(1091) 0x45587d CMP (%R10,%RAX,8),%RSI |
(1091) 0x455881 JGE 455850 |
(1091) 0x455883 MOV %R12,(%RBX,%RDX,8) |
(1091) 0x455887 INC %R12 |
(1091) 0x45588a JMP 455850 |
0x45588c NOPL (%RAX) |
(1091) 0x455890 CMP $-0x3,%RSI |
(1091) 0x455894 JE 455850 |
(1091) 0x455896 MOV -0xd0(%RBP),%RDI |
(1091) 0x45589d MOV (%RDI,%RDX,8),%RSI |
(1091) 0x4558a1 MOV 0x8(%RDI,%RDX,8),%RDI |
(1091) 0x4558a6 JMP 4558b3 |
0x4558a8 NOPL (%RAX,%RAX,1) |
(1094) 0x4558b0 INC %RSI |
(1094) 0x4558b3 CMP %RDI,%RSI |
(1094) 0x4558b6 JGE 4558e9 |
(1094) 0x4558b8 MOV -0x150(%RBP),%R8 |
(1094) 0x4558bf MOV (%R8,%RSI,8),%R8 |
(1094) 0x4558c3 CMPQ $0,(%R14,%R8,8) |
(1094) 0x4558c8 JS 4558b0 |
(1094) 0x4558ca MOV (%RBX,%R8,8),%R9 |
(1094) 0x4558ce CMP (%R10,%RAX,8),%R9 |
(1094) 0x4558d2 JGE 4558b0 |
(1094) 0x4558d4 MOV %R12,(%RBX,%R8,8) |
(1094) 0x4558d8 INC %R12 |
(1094) 0x4558db MOV -0xd0(%RBP),%RDI |
(1094) 0x4558e2 MOV 0x8(%RDI,%RDX,8),%RDI |
(1094) 0x4558e7 JMP 4558b0 |
(1091) 0x4558e9 MOV -0xc8(%RBP),%RSI |
(1091) 0x4558f0 CMPQ $0x2,(%RSI) |
(1091) 0x4558f4 JL 45584a |
(1091) 0x4558fa MOV -0xa0(%RBP),%RDI |
(1091) 0x455901 MOV (%RDI,%RDX,8),%RSI |
(1091) 0x455905 MOV 0x8(%RDI,%RDX,8),%R8 |
(1091) 0x45590a CMP %R8,%RSI |
(1091) 0x45590d JGE 45584a |
(1091) 0x455913 MOV -0x128(%RBP),%RDI |
(1091) 0x45591a MOV (%RDI),%RDI |
(1091) 0x45591d CMPQ $0,-0x108(%RBP) |
(1091) 0x455925 JNE 455947 |
(1091) 0x455927 JMP 4559b7 |
0x45592c NOPL (%RAX) |
(1092) 0x455930 MOV -0x38(%RBP),%R10 |
(1092) 0x455934 MOV -0x88(%RBP),%R14 |
(1092) 0x45593b INC %RSI |
(1092) 0x45593e CMP %R8,%RSI |
(1092) 0x455941 JGE 45584a |
(1092) 0x455947 MOV -0x110(%RBP),%R9 |
(1092) 0x45594e MOV (%R9,%RSI,8),%R9 |
(1092) 0x455952 MOV -0x108(%RBP),%R11 |
(1092) 0x455959 MOV (%R11,%R9,8),%R9 |
(1092) 0x45595d CMPQ $0,(%RDI,%R9,8) |
(1092) 0x455962 JS 45593b |
(1092) 0x455964 MOV -0x30(%RBP),%R14 |
(1092) 0x455968 MOV (%R14,%R9,8),%R10 |
(1092) 0x45596c MOV -0x48(%RBP),%R11 |
(1092) 0x455970 CMP (%R11,%RAX,8),%R10 |
(1092) 0x455974 JGE 455930 |
(1092) 0x455976 MOV -0x40(%RBP),%R8 |
(1092) 0x45597a MOVQ $0x1,(%R8,%R9,8) |
(1092) 0x455982 MOV %R15,(%R14,%R9,8) |
(1092) 0x455986 INC %R15 |
(1092) 0x455989 MOV -0xa0(%RBP),%R8 |
(1092) 0x455990 MOV 0x8(%R8,%RDX,8),%R8 |
(1092) 0x455995 JMP 455930 |
0x455997 NOPW (%RAX,%RAX,1) |
(1093) 0x4559a0 MOV -0x38(%RBP),%R10 |
(1093) 0x4559a4 MOV -0x88(%RBP),%R14 |
(1093) 0x4559ab INC %RSI |
(1093) 0x4559ae CMP %R8,%RSI |
(1093) 0x4559b1 JGE 45584a |
(1093) 0x4559b7 MOV -0x110(%RBP),%R9 |
(1093) 0x4559be MOV (%R9,%RSI,8),%R9 |
(1093) 0x4559c2 CMPQ $0,(%RDI,%R9,8) |
(1093) 0x4559c7 JS 4559ab |
(1093) 0x4559c9 MOV -0x30(%RBP),%R14 |
(1093) 0x4559cd MOV (%R14,%R9,8),%R10 |
(1093) 0x4559d1 MOV -0x48(%RBP),%R11 |
(1093) 0x4559d5 CMP (%R11,%RAX,8),%R10 |
(1093) 0x4559d9 JGE 4559a0 |
(1093) 0x4559db MOV -0x40(%RBP),%R8 |
(1093) 0x4559df MOVQ $0x1,(%R8,%R9,8) |
(1093) 0x4559e7 MOV %R15,(%R14,%R9,8) |
(1093) 0x4559eb INC %R15 |
(1093) 0x4559ee MOV -0xa0(%RBP),%R8 |
(1093) 0x4559f5 MOV 0x8(%R8,%RDX,8),%R8 |
(1093) 0x4559fa JMP 4559a0 |
(1088) 0x4559fc MOV -0x48(%RBP),%RDX |
(1088) 0x455a00 JMP 4556c7 |
(1088) 0x455a05 MOV -0x48(%RBP),%RDX |
(1088) 0x455a09 MOV -0x58(%RBP),%RDI |
(1088) 0x455a0d JMP 4556c7 |
0x455a12 LEA (%R12,%R9,8),%RDX |
0x455a16 CMP %R11,%RDX |
0x455a19 SETA %DIL |
0x455a1d LEA (%R11,%R9,8),%RAX |
0x455a21 CMP %R12,%RAX |
0x455a24 SETA %R8B |
0x455a28 LEA (%R10,%R9,8),%R9 |
0x455a2c CMP %R11,%R9 |
0x455a2f SETA %CL |
0x455a32 CMP %R10,%RAX |
0x455a35 SETA %SIL |
0x455a39 CMP %R12,%R9 |
0x455a3c SETA %AL |
0x455a3f CMP %R10,%RDX |
0x455a42 SETA %DL |
0x455a45 TEST %R8B,%DIL |
0x455a48 JNE 455b1f |
0x455a4e AND %SIL,%CL |
0x455a51 JNE 455b1f |
0x455a57 AND %DL,%AL |
0x455a59 JNE 455b1f |
0x455a5f MOV (%R11),%RAX |
0x455a62 MOV (%R10),%RCX |
0x455a65 MOV (%R12),%RDX |
0x455a69 MOV $0x1,%ESI |
0x455a6e MOV -0xf0(%RBP),%RDI |
0x455a75 NOPW %CS:(%RAX,%RAX,1) |
(1086) 0x455a80 ADD (%R11,%RSI,8),%RAX |
(1086) 0x455a84 MOV %RAX,(%R11,%RSI,8) |
(1086) 0x455a88 ADD (%R12,%RSI,8),%RDX |
(1086) 0x455a8c MOV %RDX,(%R12,%RSI,8) |
(1086) 0x455a90 ADD (%R10,%RSI,8),%RCX |
(1086) 0x455a94 MOV %RCX,(%R10,%RSI,8) |
(1086) 0x455a98 INC %RSI |
(1086) 0x455a9b CMP %RSI,%RDI |
(1086) 0x455a9e JNE 455a80 |
0x455aa0 JMP 455b53 |
0x455aa5 MOV -0xe8(%RBP),%RDI |
0x455aac AND $-0x2,%RDI |
0x455ab0 XOR %ESI,%ESI |
0x455ab2 NOPW %CS:(%RAX,%RAX,1) |
(1087) 0x455ac0 ADD 0x8(%R11,%RSI,8),%RDX |
(1087) 0x455ac5 MOV %RDX,0x8(%R11,%RSI,8) |
(1087) 0x455aca ADD 0x8(%R12,%RSI,8),%RCX |
(1087) 0x455acf MOV %RCX,0x8(%R12,%RSI,8) |
(1087) 0x455ad4 ADD 0x8(%R10,%RSI,8),%RAX |
(1087) 0x455ad9 MOV %RAX,0x8(%R10,%RSI,8) |
(1087) 0x455ade ADD 0x10(%R11,%RSI,8),%RDX |
(1087) 0x455ae3 MOV %RDX,0x10(%R11,%RSI,8) |
(1087) 0x455ae8 ADD 0x10(%R12,%RSI,8),%RCX |
(1087) 0x455aed MOV %RCX,0x10(%R12,%RSI,8) |
(1087) 0x455af2 ADD 0x10(%R10,%RSI,8),%RAX |
(1087) 0x455af7 MOV %RAX,0x10(%R10,%RSI,8) |
(1087) 0x455afc ADD $0x2,%RSI |
(1087) 0x455b00 CMP %RSI,%RDI |
(1087) 0x455b03 JNE 455ac0 |
0x455b05 TESTB $0x1,-0xe8(%RBP) |
0x455b0c JE 455b53 |
0x455b0e ADD %RDX,0x8(%R11,%RSI,8) |
0x455b13 ADD %RCX,0x8(%R12,%RSI,8) |
0x455b18 ADD %RAX,0x8(%R10,%RSI,8) |
0x455b1d JMP 455b53 |
0x455b1f MOV $0x1,%EAX |
0x455b24 MOV -0xf0(%RBP),%RDX |
0x455b2b NOPL (%RAX,%RAX,1) |
(1085) 0x455b30 MOV -0x8(%R11,%RAX,8),%RCX |
(1085) 0x455b35 ADD %RCX,(%R11,%RAX,8) |
(1085) 0x455b39 MOV -0x8(%R12,%RAX,8),%RCX |
(1085) 0x455b3e ADD %RCX,(%R12,%RAX,8) |
(1085) 0x455b42 MOV -0x8(%R10,%RAX,8),%RCX |
(1085) 0x455b47 ADD %RCX,(%R10,%RAX,8) |
(1085) 0x455b4b INC %RAX |
(1085) 0x455b4e CMP %RAX,%RDX |
(1085) 0x455b51 JNE 455b30 |
0x455b53 MOV -0x90(%RBP),%RAX |
0x455b5a MOV (%RAX),%ESI |
0x455b5c MOV $0x749fd0,%EDI |
0x455b61 CALL 410130 <__kmpc_barrier@plt> |
0x455b66 CMPQ $0,-0x98(%RBP) |
0x455b6e MOV -0x38(%RBP),%RCX |
0x455b72 MOV -0xe0(%RBP),%RDX |
0x455b79 JLE 455f46 |
0x455b7f MOV %RDX,%RAX |
0x455b82 SUB %R13,%RAX |
0x455b85 JLE 455f46 |
0x455b8b MOV %RAX,-0xf0(%RBP) |
0x455b92 LEA (%RCX,%RDX,8),%R8 |
0x455b96 MOV -0x48(%RBP),%RAX |
0x455b9a LEA (%RAX,%RDX,8),%R11 |
0x455b9e MOV -0x98(%RBP),%RDX |
0x455ba5 MOV -0xc0(%RBP),%RSI |
0x455bac LEA -0x8(%RSI,%RDX,8),%RSI |
0x455bb1 MOV -0xb8(%RBP),%RDI |
0x455bb8 LEA (%RDI,%RDX,8),%RDI |
0x455bbc ADD $-0x8,%RDI |
0x455bc0 LEA (%RCX,%R13,8),%R12 |
0x455bc4 ADD $0x8,%R12 |
0x455bc8 CMP %R12,%RSI |
0x455bcb SETAEB -0x58(%RBP) |
0x455bcf CMP %RSI,%R8 |
0x455bd2 SETAE %CL |
0x455bd5 LEA (%RAX,%R13,8),%RAX |
0x455bd9 ADD $0x8,%RAX |
0x455bdd CMP %RAX,%RSI |
0x455be0 SETB %R15B |
0x455be4 CMP %RSI,%R11 |
0x455be7 SETBB -0xc0(%RBP) |
0x455bee CMP %RAX,%R8 |
0x455bf1 SETB %R10B |
0x455bf5 CMP %R12,%R11 |
0x455bf8 SETBB -0xb8(%RBP) |
0x455bff CMP %RDI,%R8 |
0x455c02 SETB %R9B |
0x455c06 CMP %R12,%RDI |
0x455c09 LEA -0x1(%RDX),%RDX |
0x455c0d SETB %R12B |
0x455c11 CMP %RAX,%RDI |
0x455c14 SETB %R8B |
0x455c18 CMP %RDI,%R11 |
0x455c1b LEA 0x1(%R13),%RAX |
0x455c1f MOV %RAX,-0xe8(%RBP) |
0x455c26 SETB %R11B |
0x455c2a TEST %CL,-0x58(%RBP) |
0x455c2d MOV %RDX,-0x40(%RBP) |
0x455c31 JNE 455d05 |
0x455c37 OR -0xc0(%RBP),%R15B |
0x455c3e JE 455d05 |
0x455c44 OR -0xb8(%RBP),%R10B |
0x455c4b JE 455d05 |
0x455c51 OR %R12B,%R9B |
0x455c54 JE 455d05 |
0x455c5a OR %R11B,%R8B |
0x455c5d JE 455d05 |
0x455c63 MOV (%RSI),%RSI |
0x455c66 MOV (%RDI),%RDI |
0x455c69 MOV -0xf0(%RBP),%RCX |
0x455c70 CMP $0x4,%RCX |
0x455c74 MOV -0x48(%RBP),%RDX |
0x455c78 MOV -0x38(%RBP),%R10 |
0x455c7c JB 455ccf |
0x455c7e MOV %RCX,%R8 |
0x455c81 SHR $0x2,%R8 |
0x455c85 MOV -0x180(%RBP),%RAX |
0x455c8c IMUL -0x98(%RBP),%RAX |
0x455c94 LEA 0x20(,%RAX,8),%R9 |
0x455c9c NOPL (%RAX) |
(1084) 0x455ca0 ADD %RSI,-0x18(%R10,%R9,1) |
(1084) 0x455ca5 ADD %RDI,-0x18(%RDX,%R9,1) |
(1084) 0x455caa ADD %RSI,-0x10(%R10,%R9,1) |
(1084) 0x455caf ADD %RDI,-0x10(%RDX,%R9,1) |
(1084) 0x455cb4 ADD %RSI,-0x8(%R10,%R9,1) |
(1084) 0x455cb9 ADD %RDI,-0x8(%RDX,%R9,1) |
(1084) 0x455cbe ADD %RSI,(%R10,%R9,1) |
(1084) 0x455cc2 ADD %RDI,(%RDX,%R9,1) |
(1084) 0x455cc6 ADD $0x20,%R9 |
(1084) 0x455cca DEC %R8 |
(1084) 0x455ccd JNE 455ca0 |
0x455ccf MOV %RCX,%R8 |
0x455cd2 AND $-0x4,%R8 |
0x455cd6 AND $0x3,%ECX |
0x455cd9 CMP $0x1,%RCX |
0x455cdd MOV -0x70(%RBP),%R9 |
0x455ce1 MOV -0x30(%RBP),%R15 |
0x455ce5 MOV -0xe0(%RBP),%R11 |
0x455cec MOV -0x158(%RBP),%R12 |
0x455cf3 JE 455d62 |
0x455cf5 CMP $0x3,%ECX |
0x455cf8 JE 455d4a |
0x455cfa CMP $0x2,%ECX |
0x455cfd JNE 455d71 |
0x455cff LEA (%R8,%R13,1),%RCX |
0x455d03 JMP 455d58 |
0x455d05 MOV %R13,%RCX |
0x455d08 MOV -0x70(%RBP),%R9 |
0x455d0c MOV -0x48(%RBP),%RDX |
0x455d10 MOV -0x38(%RBP),%R8 |
0x455d14 MOV -0x30(%RBP),%R15 |
0x455d18 MOV -0xe0(%RBP),%R11 |
0x455d1f MOV -0x158(%RBP),%R12 |
0x455d26 NOPW %CS:(%RAX,%RAX,1) |
(1081) 0x455d30 MOV (%RSI),%RAX |
(1081) 0x455d33 ADD %RAX,0x8(%R8,%RCX,8) |
(1081) 0x455d38 MOV (%RDI),%RAX |
(1081) 0x455d3b ADD %RAX,0x8(%RDX,%RCX,8) |
(1081) 0x455d40 INC %RCX |
(1081) 0x455d43 CMP %RCX,%R11 |
(1081) 0x455d46 JNE 455d30 |
0x455d48 JMP 455d71 |
0x455d4a LEA (%R8,%R13,1),%RCX |
0x455d4e ADD %RSI,0x18(%R10,%RCX,8) |
0x455d53 ADD %RDI,0x18(%RDX,%RCX,8) |
0x455d58 ADD %RSI,0x10(%R10,%RCX,8) |
0x455d5d ADD %RDI,0x10(%RDX,%RCX,8) |
0x455d62 ADD -0xe8(%RBP),%R8 |
0x455d69 ADD %RSI,(%R10,%R8,8) |
0x455d6d ADD %RDI,(%RDX,%R8,8) |
0x455d71 LEA (%R9,%R11,8),%RAX |
0x455d75 ADD $-0x8,%RAX |
0x455d79 MOV -0x40(%RBP),%RCX |
0x455d7d LEA (%R12,%RCX,8),%RDX |
0x455d81 CMP %RDX,%RAX |
0x455d84 JB 455dbe |
0x455d86 LEA (%R9,%R13,8),%RAX |
0x455d8a CMP %RAX,%RDX |
0x455d8d JB 455dbe |
0x455d8f MOV %R13,%RAX |
0x455d92 JMP 455dac |
0x455d94 NOPW %CS:(%RAX,%RAX,1) |
(1083) 0x455da0 INC %RAX |
(1083) 0x455da3 CMP %RAX,%R11 |
(1083) 0x455da6 JE 455f46 |
(1083) 0x455dac MOV (%R9,%RAX,8),%RCX |
(1083) 0x455db0 TEST %RCX,%RCX |
(1083) 0x455db3 JS 455da0 |
(1083) 0x455db5 ADD (%RDX),%RCX |
(1083) 0x455db8 MOV %RCX,(%R9,%RAX,8) |
(1083) 0x455dbc JMP 455da0 |
0x455dbe MOV -0xf0(%RBP),%R8 |
0x455dc5 CMP $0x8,%R8 |
0x455dc9 JAE 455df9 |
0x455dcb MOV %R8D,%ECX |
0x455dce AND $0x7,%ECX |
0x455dd1 DEC %RCX |
0x455dd4 CMP $0x6,%RCX |
0x455dd8 JA 455f46 |
0x455dde AND $-0x8,%R8 |
0x455de2 MOV -0xe8(%RBP),%RAX |
0x455de9 JMP 0x517908(,%RCX,8) |
0x455df0 LEA (%R8,%R13,1),%RSI |
0x455df4 JMP 455f0e |
0x455df9 MOV %R8,%RSI |
0x455dfc SHR $0x3,%RSI |
0x455e00 MOV -0x180(%RBP),%RAX |
0x455e07 IMUL -0x98(%RBP),%RAX |
0x455e0f LEA (%R9,%RAX,8),%RDI |
0x455e13 ADD $0x38,%RDI |
0x455e17 JMP 455e29 |
0x455e19 NOPL (%RAX) |
(1082) 0x455e20 ADD $0x40,%RDI |
(1082) 0x455e24 DEC %RSI |
(1082) 0x455e27 JE 455dcb |
(1082) 0x455e29 MOV -0x38(%RDI),%RCX |
(1082) 0x455e2d TEST %RCX,%RCX |
(1082) 0x455e30 JS 455e39 |
(1082) 0x455e32 ADD (%RDX),%RCX |
(1082) 0x455e35 MOV %RCX,-0x38(%RDI) |
(1082) 0x455e39 MOV -0x30(%RDI),%RCX |
(1082) 0x455e3d TEST %RCX,%RCX |
(1082) 0x455e40 JS 455e49 |
(1082) 0x455e42 ADD (%RDX),%RCX |
(1082) 0x455e45 MOV %RCX,-0x30(%RDI) |
(1082) 0x455e49 MOV -0x28(%RDI),%RCX |
(1082) 0x455e4d TEST %RCX,%RCX |
(1082) 0x455e50 JS 455e59 |
(1082) 0x455e52 ADD (%RDX),%RCX |
(1082) 0x455e55 MOV %RCX,-0x28(%RDI) |
(1082) 0x455e59 MOV -0x20(%RDI),%RCX |
(1082) 0x455e5d TEST %RCX,%RCX |
(1082) 0x455e60 JS 455e69 |
(1082) 0x455e62 ADD (%RDX),%RCX |
(1082) 0x455e65 MOV %RCX,-0x20(%RDI) |
(1082) 0x455e69 MOV -0x18(%RDI),%RCX |
(1082) 0x455e6d TEST %RCX,%RCX |
(1082) 0x455e70 JS 455e79 |
(1082) 0x455e72 ADD (%RDX),%RCX |
(1082) 0x455e75 MOV %RCX,-0x18(%RDI) |
(1082) 0x455e79 MOV -0x10(%RDI),%RCX |
(1082) 0x455e7d TEST %RCX,%RCX |
(1082) 0x455e80 JS 455e89 |
(1082) 0x455e82 ADD (%RDX),%RCX |
(1082) 0x455e85 MOV %RCX,-0x10(%RDI) |
(1082) 0x455e89 MOV -0x8(%RDI),%RCX |
(1082) 0x455e8d TEST %RCX,%RCX |
(1082) 0x455e90 JS 455e99 |
(1082) 0x455e92 ADD (%RDX),%RCX |
(1082) 0x455e95 MOV %RCX,-0x8(%RDI) |
(1082) 0x455e99 MOV (%RDI),%RCX |
(1082) 0x455e9c TEST %RCX,%RCX |
(1082) 0x455e9f JS 455e20 |
(1082) 0x455ea5 ADD (%RDX),%RCX |
(1082) 0x455ea8 MOV %RCX,(%RDI) |
(1082) 0x455eab JMP 455e20 |
0x455eb0 LEA (%R8,%R13,1),%RSI |
0x455eb4 JMP 455efc |
0x455eb6 LEA (%R8,%R13,1),%RSI |
0x455eba JMP 455eea |
0x455ebc LEA (%R8,%R13,1),%RSI |
0x455ec0 JMP 455ed8 |
0x455ec2 LEA (%R8,%R13,1),%RSI |
0x455ec6 MOV 0x30(%R9,%RSI,8),%RCX |
0x455ecb TEST %RCX,%RCX |
0x455ece JS 455ed8 |
0x455ed0 ADD (%RDX),%RCX |
0x455ed3 MOV %RCX,0x30(%R9,%RSI,8) |
0x455ed8 MOV 0x28(%R9,%RSI,8),%RCX |
0x455edd TEST %RCX,%RCX |
0x455ee0 JS 455eea |
0x455ee2 ADD (%RDX),%RCX |
0x455ee5 MOV %RCX,0x28(%R9,%RSI,8) |
0x455eea MOV 0x20(%R9,%RSI,8),%RCX |
0x455eef TEST %RCX,%RCX |
0x455ef2 JS 455efc |
0x455ef4 ADD (%RDX),%RCX |
0x455ef7 MOV %RCX,0x20(%R9,%RSI,8) |
0x455efc MOV 0x18(%R9,%RSI,8),%RCX |
0x455f01 TEST %RCX,%RCX |
0x455f04 JS 455f0e |
0x455f06 ADD (%RDX),%RCX |
0x455f09 MOV %RCX,0x18(%R9,%RSI,8) |
0x455f0e MOV 0x10(%R9,%RSI,8),%RCX |
0x455f13 TEST %RCX,%RCX |
0x455f16 JS 455f20 |
0x455f18 ADD (%RDX),%RCX |
0x455f1b MOV %RCX,0x10(%R9,%RSI,8) |
0x455f20 ADD %R8,%RAX |
0x455f23 MOV (%R9,%RAX,8),%RCX |
0x455f27 TEST %RCX,%RCX |
0x455f2a JS 455f33 |
0x455f2c ADD (%RDX),%RCX |
0x455f2f MOV %RCX,(%R9,%RAX,8) |
0x455f33 ADD %R13,%R8 |
0x455f36 MOV (%R9,%R8,8),%RCX |
0x455f3a TEST %RCX,%RCX |
0x455f3d JS 455f46 |
0x455f3f ADD (%RDX),%RCX |
0x455f42 MOV %RCX,(%R9,%R8,8) |
0x455f46 MOV -0x90(%RBP),%RAX |
0x455f4d MOV (%RAX),%ESI |
0x455f4f MOV $0x749ff0,%EDI |
0x455f54 CALL 410130 <__kmpc_barrier@plt> |
0x455f59 CMPQ $0,-0x98(%RBP) |
0x455f61 MOV -0x50(%RBP),%RDX |
0x455f65 JNE 4561a4 |
0x455f6b CMPQ $0x4,-0x1b8(%RBP) |
0x455f73 JNE 455fb6 |
0x455f75 CALL 4f9d20 <time_getWallclockSeconds> |
0x455f7a MOV -0x1b0(%RBP),%R12 |
0x455f81 VSUBSD (%R12),%XMM0,%XMM0 |
0x455f87 MOV -0x1a8(%RBP),%RAX |
0x455f8e MOV (%RAX),%RSI |
0x455f91 MOV $0x1,%EAX |
0x455f96 MOV $0x517efc,%EDI |
0x455f9b CALL 4f8030 <hypre_printf> |
0x455fa0 XOR %EDI,%EDI |
0x455fa2 CALL 4102c0 <fflush@plt> |
0x455fa7 CALL 4f9d20 <time_getWallclockSeconds> |
0x455fac MOV -0x50(%RBP),%RDX |
0x455fb0 VMOVSD %XMM0,(%R12) |
0x455fb6 MOV -0x38(%RBP),%RAX |
0x455fba MOV -0xf8(%RBP),%RCX |
0x455fc1 MOV (%RAX,%RCX,8),%RDI |
0x455fc5 MOV -0x1c0(%RBP),%RAX |
0x455fcc MOV %RDI,(%RAX) |
0x455fcf MOV -0x48(%RBP),%RAX |
0x455fd3 MOV (%RAX,%RCX,8),%R12 |
0x455fd7 MOV -0x1c8(%RBP),%RAX |
0x455fde MOV %R12,(%RAX) |
0x455fe1 TEST %RDI,%RDI |
0x455fe4 JE 45601a |
0x455fe6 MOV $0x8,%ESI |
0x455feb MOV %RDI,-0x40(%RBP) |
0x455fef CALL 4f7e60 <hypre_CAlloc> |
0x455ff4 MOV -0x138(%RBP),%RCX |
0x455ffb MOV %RAX,(%RCX) |
0x455ffe MOV $0x8,%ESI |
0x456003 MOV -0x40(%RBP),%RDI |
0x456007 CALL 4f7e60 <hypre_CAlloc> |
0x45600c MOV -0x50(%RBP),%RDX |
0x456010 MOV -0xa8(%RBP),%RCX |
0x456017 MOV %RAX,(%RCX) |
0x45601a TEST %R12,%R12 |
0x45601d JE 45604e |
0x45601f MOV $0x8,%ESI |
0x456024 MOV %R12,%RDI |
0x456027 CALL 4f7e60 <hypre_CAlloc> |
0x45602c MOV -0x130(%RBP),%RCX |
0x456033 MOV %RAX,(%RCX) |
0x456036 MOV $0x8,%ESI |
0x45603b MOV %R12,%RDI |
0x45603e CALL 4f7e60 <hypre_CAlloc> |
0x456043 MOV -0x50(%RBP),%RDX |
0x456047 MOV -0x78(%RBP),%RCX |
0x45604b MOV %RAX,(%RCX) |
0x45604e MOV -0xc8(%RBP),%RAX |
0x456055 CMPQ $0x2,(%RAX) |
0x456059 JL 4561a4 |
0x45605f MOV -0xf8(%RBP),%R12 |
0x456066 TEST %R12,%R12 |
0x456069 JLE 4575f1 |
0x45606f MOV %R12,%R15 |
0x456072 SHR $0x3,%R15 |
0x456076 CMP $0x8,%R12 |
0x45607a JB 4560b8 |
0x45607c MOV -0x70(%RBP),%RAX |
0x456080 ADD $0x38,%RAX |
0x456084 MOV %R15,%RCX |
0x456087 NOPW (%RAX,%RAX,1) |
(1080) 0x456090 ADD %RDX,-0x38(%RAX) |
(1080) 0x456094 ADD %RDX,-0x30(%RAX) |
(1080) 0x456098 ADD %RDX,-0x28(%RAX) |
(1080) 0x45609c ADD %RDX,-0x20(%RAX) |
(1080) 0x4560a0 ADD %RDX,-0x18(%RAX) |
(1080) 0x4560a4 ADD %RDX,-0x10(%RAX) |
(1080) 0x4560a8 ADD %RDX,-0x8(%RAX) |
(1080) 0x4560ac ADD %RDX,(%RAX) |
(1080) 0x4560af ADD $0x40,%RAX |
(1080) 0x4560b3 DEC %RCX |
(1080) 0x4560b6 JNE 456090 |
0x4560b8 MOV %R12,%RSI |
0x4560bb AND $-0x8,%RSI |
0x4560bf AND $0x7,%R12D |
0x4560c3 DEC %R12 |
0x4560c6 CMP $0x6,%R12 |
0x4560ca MOV -0xd8(%RBP),%RAX |
0x4560d1 JA 456101 |
0x4560d3 MOV -0x70(%RBP),%RCX |
0x4560d7 JMP 0x517940(,%R12,8) |
0x4560df ADD %RDX,0x30(%RCX,%RSI,8) |
0x4560e4 ADD %RDX,0x28(%RCX,%RSI,8) |
0x4560e9 ADD %RDX,0x20(%RCX,%RSI,8) |
0x4560ee ADD %RDX,0x18(%RCX,%RSI,8) |
0x4560f3 ADD %RDX,0x10(%RCX,%RSI,8) |
0x4560f8 ADD %RDX,0x8(%RCX,%RSI,8) |
0x4560fd ADD %RDX,(%RCX,%RSI,8) |
0x456101 MOV %RSI,-0x40(%RBP) |
0x456105 MOV -0x170(%RBP),%RCX |
0x45610c MOV (%RCX),%RSI |
0x45610f MOV (%RAX),%RCX |
0x456112 MOV -0x168(%RBP),%RDI |
0x456119 MOV -0x70(%RBP),%RDX |
0x45611d MOV -0x178(%RBP),%R8 |
0x456124 CALL 4ba8c0 <hypre_alt_insert_new_nodes> |
0x456129 MOV -0x50(%RBP),%RCX |
0x45612d CMPQ $0x8,-0xf8(%RBP) |
0x456135 JB 456168 |
0x456137 MOV -0x70(%RBP),%RAX |
0x45613b ADD $0x38,%RAX |
0x45613f NOP |
(1079) 0x456140 SUB %RCX,-0x38(%RAX) |
(1079) 0x456144 SUB %RCX,-0x30(%RAX) |
(1079) 0x456148 SUB %RCX,-0x28(%RAX) |
(1079) 0x45614c SUB %RCX,-0x20(%RAX) |
(1079) 0x456150 SUB %RCX,-0x18(%RAX) |
(1079) 0x456154 SUB %RCX,-0x10(%RAX) |
(1079) 0x456158 SUB %RCX,-0x8(%RAX) |
(1079) 0x45615c SUB %RCX,(%RAX) |
(1079) 0x45615f ADD $0x40,%RAX |
(1079) 0x456163 DEC %R15 |
(1079) 0x456166 JNE 456140 |
0x456168 CMP $0x6,%R12 |
0x45616c MOV -0x30(%RBP),%R15 |
0x456170 JA 4561a4 |
0x456172 MOV -0x70(%RBP),%RAX |
0x456176 MOV -0x40(%RBP),%RDX |
0x45617a JMP 0x517978(,%R12,8) |
0x456182 SUB %RCX,0x30(%RAX,%RDX,8) |
0x456187 SUB %RCX,0x28(%RAX,%RDX,8) |
0x45618c SUB %RCX,0x20(%RAX,%RDX,8) |
0x456191 SUB %RCX,0x18(%RAX,%RDX,8) |
0x456196 SUB %RCX,0x10(%RAX,%RDX,8) |
0x45619b SUB %RCX,0x8(%RAX,%RDX,8) |
0x4561a0 SUB %RCX,(%RAX,%RDX,8) |
0x4561a4 CMPQ $0,-0xf8(%RBP) |
0x4561ac JLE 4561ca |
0x4561ae MOV -0xf8(%RBP),%RAX |
0x4561b5 LEA (,%RAX,8),%RDX |
0x4561bd MOV %RBX,%RDI |
0x4561c0 MOV $0xff,%ESI |
0x4561c5 CALL 5011c0 <_intel_fast_memset> |
0x4561ca MOV -0xd8(%RBP),%RCX |
0x4561d1 CMPQ $0,(%RCX) |
0x4561d5 JLE 4561f0 |
0x4561d7 XOR %EAX,%EAX |
0x4561d9 NOPL (%RAX) |
(1078) 0x4561e0 MOVQ $-0x1,(%R15,%RAX,8) |
(1078) 0x4561e8 INC %RAX |
(1078) 0x4561eb CMP (%RCX),%RAX |
(1078) 0x4561ee JL 4561e0 |
0x4561f0 MOV -0x90(%RBP),%RAX |
0x4561f7 MOV (%RAX),%ESI |
0x4561f9 MOV $0x74a010,%EDI |
0x4561fe CALL 410130 <__kmpc_barrier@plt> |
0x456203 CMP %R13,-0xe0(%RBP) |
0x45620a MOV -0x48(%RBP),%RDX |
0x45620e MOV -0x38(%RBP),%R10 |
0x456212 JG 456250 |
0x456214 CMPQ $0,-0xf8(%RBP) |
0x45621c JE 456226 |
0x45621e MOV %RBX,%RDI |
0x456221 CALL 4f7f50 <hypre_Free> |
0x456226 MOV -0xd8(%RBP),%RAX |
0x45622d CMPQ $0,(%RAX) |
0x456231 JE 4575df |
0x456237 MOV %R15,%RDI |
0x45623a ADD $0x1b8,%RSP |
0x456241 POP %RBX |
0x456242 POP %R12 |
0x456244 POP %R13 |
0x456246 POP %R14 |
0x456248 POP %R15 |
0x45624a POP %RBP |
0x45624b JMP 4f7f50 |
0x456250 MOVQ $-0x2,-0x58(%RBP) |
0x456258 MOV $0x3ff0000000000000,%R8 |
0x456262 VXORPD %XMM0,%XMM0,%XMM0 |
0x456266 VMOVDDUP 0xbbd72(%RIP),%XMM1 |
0x45626e VMOVSD 0xb9b5a(%RIP),%XMM2 |
0x456276 VMOVDDUP 0xbbd62(%RIP),%XMM3 |
0x45627e JMP 4562b8 |
(1059) 0x456280 MOV -0x70(%RBP),%RAX |
(1059) 0x456284 MOV (%RAX,%R13,8),%RAX |
(1059) 0x456288 MOV -0x138(%RBP),%RCX |
(1059) 0x45628f MOV (%RCX),%RCX |
(1059) 0x456292 MOV %RAX,(%RCX,%RDI,8) |
(1059) 0x456296 MOV -0xa8(%RBP),%RAX |
(1059) 0x45629d MOV (%RAX),%RAX |
(1059) 0x4562a0 MOV %R8,(%RAX,%RDI,8) |
(1059) 0x4562a4 DECQ -0x58(%RBP) |
(1059) 0x4562a8 INC %R13 |
(1059) 0x4562ab CMP -0xe0(%RBP),%R13 |
(1059) 0x4562b2 JGE 456214 |
(1059) 0x4562b8 MOV (%R10,%R13,8),%RDI |
(1059) 0x4562bc MOV (%R14,%R13,8),%RAX |
(1059) 0x4562c0 TEST %RAX,%RAX |
(1059) 0x4562c3 JNS 456280 |
(1059) 0x4562c5 CMP $-0x3,%RAX |
(1059) 0x4562c9 JE 4562a4 |
(1059) 0x4562cb MOV (%RDX,%R13,8),%RDX |
(1059) 0x4562cf DECQ -0x58(%RBP) |
(1059) 0x4562d3 MOV -0xd0(%RBP),%RAX |
(1059) 0x4562da MOV (%RAX,%R13,8),%RCX |
(1059) 0x4562de MOV %RDI,%R8 |
(1059) 0x4562e1 MOV %RDX,-0x40(%RBP) |
(1059) 0x4562e5 CMP 0x8(%RAX,%R13,8),%RCX |
(1059) 0x4562ea JGE 4564f1 |
(1059) 0x4562f0 MOV %RDX,-0x40(%RBP) |
(1059) 0x4562f4 MOV %RDI,%R8 |
(1059) 0x4562f7 JMP 456315 |
(1074) 0x4562f9 MOV -0x38(%RBP),%R10 |
(1074) 0x4562fd NOPL (%RAX) |
(1074) 0x456300 INC %RCX |
(1074) 0x456303 MOV -0xd0(%RBP),%RAX |
(1074) 0x45630a CMP 0x8(%RAX,%R13,8),%RCX |
(1074) 0x45630f JGE 4564f1 |
(1074) 0x456315 MOV -0x150(%RBP),%RAX |
(1074) 0x45631c MOV (%RAX,%RCX,8),%R9 |
(1074) 0x456320 MOV (%R14,%R9,8),%RAX |
(1074) 0x456324 TEST %RAX,%RAX |
(1074) 0x456327 JS 456360 |
(1074) 0x456329 CMP %RDI,(%RBX,%R9,8) |
(1074) 0x45632d JGE 456300 |
(1074) 0x45632f MOV %R8,(%RBX,%R9,8) |
(1074) 0x456333 MOV -0x70(%RBP),%RAX |
(1074) 0x456337 MOV (%RAX,%R9,8),%RAX |
(1074) 0x45633b MOV -0x138(%RBP),%RSI |
(1074) 0x456342 MOV (%RSI),%RSI |
(1074) 0x456345 MOV %RAX,(%RSI,%R8,8) |
(1074) 0x456349 MOV -0xa8(%RBP),%RAX |
(1074) 0x456350 MOV (%RAX),%RAX |
(1074) 0x456353 MOVQ $0,(%RAX,%R8,8) |
(1074) 0x45635b INC %R8 |
(1074) 0x45635e JMP 456300 |
(1074) 0x456360 CMP $-0x3,%RAX |
(1074) 0x456364 JE 456300 |
(1074) 0x456366 MOV -0x58(%RBP),%RAX |
(1074) 0x45636a MOV %RAX,(%RBX,%R9,8) |
(1074) 0x45636e MOV -0xd0(%RBP),%RSI |
(1074) 0x456375 MOV (%RSI,%R9,8),%RAX |
(1074) 0x456379 MOV 0x8(%RSI,%R9,8),%RSI |
(1074) 0x45637e JMP 456383 |
(1077) 0x456380 INC %RAX |
(1077) 0x456383 CMP %RSI,%RAX |
(1077) 0x456386 JGE 4563dd |
(1077) 0x456388 MOV -0x150(%RBP),%R10 |
(1077) 0x45638f MOV (%R10,%RAX,8),%R10 |
(1077) 0x456393 CMPQ $0,(%R14,%R10,8) |
(1077) 0x456398 JS 456380 |
(1077) 0x45639a CMP %RDI,(%RBX,%R10,8) |
(1077) 0x45639e JGE 456380 |
(1077) 0x4563a0 MOV %R8,(%RBX,%R10,8) |
(1077) 0x4563a4 MOV -0x70(%RBP),%RSI |
(1077) 0x4563a8 MOV (%RSI,%R10,8),%RSI |
(1077) 0x4563ac MOV -0x138(%RBP),%R10 |
(1077) 0x4563b3 MOV (%R10),%R10 |
(1077) 0x4563b6 MOV %RSI,(%R10,%R8,8) |
(1077) 0x4563ba MOV -0xa8(%RBP),%RSI |
(1077) 0x4563c1 MOV (%RSI),%RSI |
(1077) 0x4563c4 MOVQ $0,(%RSI,%R8,8) |
(1077) 0x4563cc INC %R8 |
(1077) 0x4563cf MOV -0xd0(%RBP),%RSI |
(1077) 0x4563d6 MOV 0x8(%RSI,%R9,8),%RSI |
(1077) 0x4563db JMP 456380 |
(1074) 0x4563dd MOV -0xc8(%RBP),%RAX |
(1074) 0x4563e4 CMPQ $0x2,(%RAX) |
(1074) 0x4563e8 JL 4562f9 |
(1074) 0x4563ee MOV -0xa0(%RBP),%RSI |
(1074) 0x4563f5 MOV (%RSI,%R9,8),%RAX |
(1074) 0x4563f9 MOV 0x8(%RSI,%R9,8),%R10 |
(1074) 0x4563fe CMP %R10,%RAX |
(1074) 0x456401 JGE 4562f9 |
(1074) 0x456407 MOV -0x128(%RBP),%RSI |
(1074) 0x45640e MOV (%RSI),%RSI |
(1074) 0x456411 CMPQ $0,-0x108(%RBP) |
(1074) 0x456419 JNE 456490 |
(1074) 0x45641b JMP 45642c |
0x45641d NOPL (%RAX) |
(1076) 0x456420 INC %RAX |
(1076) 0x456423 CMP %R10,%RAX |
(1076) 0x456426 JGE 4562f9 |
(1076) 0x45642c MOV -0x110(%RBP),%R11 |
(1076) 0x456433 MOV (%R11,%RAX,8),%R11 |
(1076) 0x456437 CMPQ $0,(%RSI,%R11,8) |
(1076) 0x45643c JS 456420 |
(1076) 0x45643e CMP %RDX,(%R15,%R11,8) |
(1076) 0x456442 JGE 456420 |
(1076) 0x456444 MOV -0x40(%RBP),%R12 |
(1076) 0x456448 MOV %R12,(%R15,%R11,8) |
(1076) 0x45644c MOV -0x130(%RBP),%R10 |
(1076) 0x456453 MOV (%R10),%R10 |
(1076) 0x456456 MOV %R11,(%R10,%R12,8) |
(1076) 0x45645a MOV -0x78(%RBP),%R10 |
(1076) 0x45645e MOV (%R10),%R10 |
(1076) 0x456461 MOVQ $0,(%R10,%R12,8) |
(1076) 0x456469 INC %R12 |
(1076) 0x45646c MOV %R12,-0x40(%RBP) |
(1076) 0x456470 MOV -0xa0(%RBP),%R10 |
(1076) 0x456477 MOV 0x8(%R10,%R9,8),%R10 |
(1076) 0x45647c JMP 456420 |
0x45647e XCHG %AX,%AX |
(1075) 0x456480 MOV -0x30(%RBP),%R15 |
(1075) 0x456484 INC %RAX |
(1075) 0x456487 CMP %R10,%RAX |
(1075) 0x45648a JGE 4562f9 |
(1075) 0x456490 MOV -0x110(%RBP),%R11 |
(1075) 0x456497 MOV (%R11,%RAX,8),%R11 |
(1075) 0x45649b MOV -0x108(%RBP),%R15 |
(1075) 0x4564a2 MOV (%R15,%R11,8),%R11 |
(1075) 0x4564a6 CMPQ $0,(%RSI,%R11,8) |
(1075) 0x4564ab JS 456480 |
(1075) 0x4564ad MOV -0x30(%RBP),%R15 |
(1075) 0x4564b1 CMP %RDX,(%R15,%R11,8) |
(1075) 0x4564b5 JGE 456484 |
(1075) 0x4564b7 MOV -0x40(%RBP),%R12 |
(1075) 0x4564bb MOV %R12,(%R15,%R11,8) |
(1075) 0x4564bf MOV -0x130(%RBP),%R10 |
(1075) 0x4564c6 MOV (%R10),%R10 |
(1075) 0x4564c9 MOV %R11,(%R10,%R12,8) |
(1075) 0x4564cd MOV -0x78(%RBP),%R10 |
(1075) 0x4564d1 MOV (%R10),%R10 |
(1075) 0x4564d4 MOVQ $0,(%R10,%R12,8) |
(1075) 0x4564dc INC %R12 |
(1075) 0x4564df MOV %R12,-0x40(%RBP) |
(1075) 0x4564e3 MOV -0xa0(%RBP),%R10 |
(1075) 0x4564ea MOV 0x8(%R10,%R9,8),%R10 |
(1075) 0x4564ef JMP 456484 |
(1059) 0x4564f1 MOV -0xc8(%RBP),%RAX |
(1059) 0x4564f8 CMPQ $0x2,(%RAX) |
(1059) 0x4564fc JL 45667a |
(1059) 0x456502 MOV -0xa0(%RBP),%RCX |
(1059) 0x456509 MOV (%RCX,%R13,8),%RAX |
(1059) 0x45650d CMP 0x8(%RCX,%R13,8),%RAX |
(1059) 0x456512 JGE 45667a |
(1059) 0x456518 MOV -0x128(%RBP),%RCX |
(1059) 0x45651f MOV (%RCX),%RCX |
(1059) 0x456522 JMP 456549 |
0x456524 NOPW %CS:(%RAX,%RAX,1) |
(1072) 0x456530 INC %RAX |
(1072) 0x456533 MOV -0xa0(%RBP),%RSI |
(1072) 0x45653a CMP 0x8(%RSI,%R13,8),%RAX |
(1072) 0x45653f MOV -0x38(%RBP),%R10 |
(1072) 0x456543 JGE 45667a |
(1072) 0x456549 MOV -0x110(%RBP),%RSI |
(1072) 0x456550 MOV (%RSI,%RAX,8),%RSI |
(1072) 0x456554 MOV -0x108(%RBP),%R9 |
(1072) 0x45655b TEST %R9,%R9 |
(1072) 0x45655e JE 456564 |
(1072) 0x456560 MOV (%R9,%RSI,8),%RSI |
(1072) 0x456564 MOV (%RCX,%RSI,8),%R9 |
(1072) 0x456568 TEST %R9,%R9 |
(1072) 0x45656b JS 4565b0 |
(1072) 0x45656d CMP %RDX,(%R15,%RSI,8) |
(1072) 0x456571 JGE 456530 |
(1072) 0x456573 MOV -0x40(%RBP),%R10 |
(1072) 0x456577 MOV %R10,(%R15,%RSI,8) |
(1072) 0x45657b MOV -0x130(%RBP),%R9 |
(1072) 0x456582 MOV (%R9),%R9 |
(1072) 0x456585 MOV %RSI,(%R9,%R10,8) |
(1072) 0x456589 MOV -0x78(%RBP),%RSI |
(1072) 0x45658d MOV (%RSI),%RSI |
(1072) 0x456590 MOVQ $0,(%RSI,%R10,8) |
(1072) 0x456598 INC %R10 |
(1072) 0x45659b MOV %R10,-0x40(%RBP) |
(1072) 0x45659f JMP 456530 |
0x4565a1 NOPW %CS:(%RAX,%RAX,1) |
(1072) 0x4565b0 CMP $-0x3,%R9 |
(1072) 0x4565b4 JE 456530 |
(1072) 0x4565ba MOV -0x58(%RBP),%R9 |
(1072) 0x4565be MOV %R9,(%R15,%RSI,8) |
(1072) 0x4565c2 MOV -0x140(%RBP),%R10 |
(1072) 0x4565c9 MOV (%R10,%RSI,8),%R9 |
(1072) 0x4565cd JMP 4565da |
0x4565cf NOP |
(1073) 0x4565d0 INC %R9 |
(1073) 0x4565d3 MOV -0x140(%RBP),%R10 |
(1073) 0x4565da CMP 0x8(%R10,%RSI,8),%R9 |
(1073) 0x4565df JGE 456530 |
(1073) 0x4565e5 MOV -0x1a0(%RBP),%R10 |
(1073) 0x4565ec MOV (%R10,%R9,8),%R10 |
(1073) 0x4565f0 MOV %R10,%R11 |
(1073) 0x4565f3 SUB -0x120(%RBP),%R11 |
(1073) 0x4565fa JL 456640 |
(1073) 0x4565fc CMP -0x118(%RBP),%R10 |
(1073) 0x456603 JGE 456640 |
(1073) 0x456605 CMP %RDI,(%RBX,%R11,8) |
(1073) 0x456609 JGE 4565d0 |
(1073) 0x45660b MOV %R8,(%RBX,%R11,8) |
(1073) 0x45660f MOV -0x70(%RBP),%R10 |
(1073) 0x456613 MOV (%R10,%R11,8),%R10 |
(1073) 0x456617 MOV -0x138(%RBP),%R11 |
(1073) 0x45661e MOV (%R11),%R11 |
(1073) 0x456621 MOV %R10,(%R11,%R8,8) |
(1073) 0x456625 MOV -0xa8(%RBP),%R10 |
(1073) 0x45662c MOV (%R10),%R10 |
(1073) 0x45662f MOVQ $0,(%R10,%R8,8) |
(1073) 0x456637 INC %R8 |
(1073) 0x45663a JMP 4565d0 |
0x45663c NOPL (%RAX) |
(1073) 0x456640 NOT %R10 |
(1073) 0x456643 CMP %RDX,(%R15,%R10,8) |
(1073) 0x456647 JGE 4565d0 |
(1073) 0x456649 MOV -0x40(%RBP),%R12 |
(1073) 0x45664d MOV %R12,(%R15,%R10,8) |
(1073) 0x456651 MOV -0x130(%RBP),%R11 |
(1073) 0x456658 MOV (%R11),%R11 |
(1073) 0x45665b MOV %R10,(%R11,%R12,8) |
(1073) 0x45665f MOV -0x78(%RBP),%R10 |
(1073) 0x456663 MOV (%R10),%R10 |
(1073) 0x456666 MOVQ $0,(%R10,%R12,8) |
(1073) 0x45666e INC %R12 |
(1073) 0x456671 MOV %R12,-0x40(%RBP) |
(1073) 0x456675 JMP 4565d0 |
(1059) 0x45667a MOV -0x198(%RBP),%RAX |
(1059) 0x456681 MOV (%RAX,%R13,8),%R9 |
(1059) 0x456685 MOV 0x8(%RAX,%R13,8),%RCX |
(1059) 0x45668a MOV -0x68(%RBP),%RAX |
(1059) 0x45668e VMOVSD (%RAX,%R9,8),%XMM4 |
(1059) 0x456694 INC %R9 |
(1059) 0x456697 MOV %RCX,-0x98(%RBP) |
(1059) 0x45669e CMP %RCX,%R9 |
(1059) 0x4566a1 JL 45680e |
(1059) 0x4566a7 MOV -0xc8(%RBP),%RAX |
(1059) 0x4566ae CMPQ $0x2,(%RAX) |
(1059) 0x4566b2 JL 4566cd |
(1059) 0x4566b4 MOV -0x160(%RBP),%RAX |
(1059) 0x4566bb MOV (%RAX,%R13,8),%RCX |
(1059) 0x4566bf MOV 0x8(%RAX,%R13,8),%R9 |
(1059) 0x4566c4 CMP %R9,%RCX |
(1059) 0x4566c7 JL 4570eb |
(1059) 0x4566cd VUCOMISD %XMM0,%XMM4 |
(1059) 0x4566d1 JE 45737f |
(1060) 0x4566d7 VDIVSD %XMM4,%XMM2,%XMM4 |
(1060) 0x4566db SUB %RDI,%R8 |
(1060) 0x4566de JLE 457438 |
(1060) 0x4566e4 MOV -0xa8(%RBP),%RAX |
(1060) 0x4566eb MOV (%RAX),%RAX |
(1060) 0x4566ee CMP $0x8,%R8 |
(1060) 0x4566f2 JB 4567ab |
(1060) 0x4566f8 MOV %R8,%RCX |
(1060) 0x4566fb SHR $0x3,%RCX |
(1060) 0x4566ff LEA (%RAX,%RDI,8),%RSI |
(1060) 0x456703 ADD $0x38,%RSI |
(1060) 0x456707 NOPW (%RAX,%RAX,1) |
(1062) 0x456710 VMOVSD -0x38(%RSI),%XMM5 |
(1062) 0x456715 VMOVSD -0x30(%RSI),%XMM6 |
(1062) 0x45671a VMOVSD -0x28(%RSI),%XMM7 |
(1062) 0x45671f VMOVSD -0x20(%RSI),%XMM8 |
(1062) 0x456724 VXORPD %XMM1,%XMM5,%XMM5 |
(1062) 0x456728 VMULSD %XMM5,%XMM4,%XMM5 |
(1062) 0x45672c VMOVSD %XMM5,-0x38(%RSI) |
(1062) 0x456731 VXORPD %XMM1,%XMM6,%XMM5 |
(1062) 0x456735 VMULSD %XMM5,%XMM4,%XMM5 |
(1062) 0x456739 VMOVSD %XMM5,-0x30(%RSI) |
(1062) 0x45673e VXORPD %XMM1,%XMM7,%XMM5 |
(1062) 0x456742 VMULSD %XMM5,%XMM4,%XMM5 |
(1062) 0x456746 VMOVSD %XMM5,-0x28(%RSI) |
(1062) 0x45674b VXORPD %XMM1,%XMM8,%XMM5 |
(1062) 0x45674f VMULSD %XMM5,%XMM4,%XMM5 |
(1062) 0x456753 VMOVSD %XMM5,-0x20(%RSI) |
(1062) 0x456758 VMOVSD -0x18(%RSI),%XMM5 |
(1062) 0x45675d VXORPD %XMM1,%XMM5,%XMM5 |
(1062) 0x456761 VMULSD %XMM5,%XMM4,%XMM5 |
(1062) 0x456765 VMOVSD %XMM5,-0x18(%RSI) |
(1062) 0x45676a VMOVSD -0x10(%RSI),%XMM5 |
(1062) 0x45676f VXORPD %XMM1,%XMM5,%XMM5 |
(1062) 0x456773 VMULSD %XMM5,%XMM4,%XMM5 |
(1062) 0x456777 VMOVSD %XMM5,-0x10(%RSI) |
(1062) 0x45677c VMOVSD -0x8(%RSI),%XMM5 |
(1062) 0x456781 VXORPD %XMM1,%XMM5,%XMM5 |
(1062) 0x456785 VMULSD %XMM5,%XMM4,%XMM5 |
(1062) 0x456789 VMOVSD %XMM5,-0x8(%RSI) |
(1062) 0x45678e VMOVSD (%RSI),%XMM5 |
(1062) 0x456792 VXORPD %XMM1,%XMM5,%XMM5 |
(1062) 0x456796 VMULSD %XMM5,%XMM4,%XMM5 |
(1062) 0x45679a VMOVSD %XMM5,(%RSI) |
(1062) 0x45679e ADD $0x40,%RSI |
(1062) 0x4567a2 DEC %RCX |
(1062) 0x4567a5 JNE 456710 |
(1060) 0x4567ab MOV %R8D,%ECX |
(1060) 0x4567ae AND $0x7,%ECX |
(1060) 0x4567b1 DEC %RCX |
(1060) 0x4567b4 CMP $0x6,%RCX |
(1060) 0x4567b8 JA 457438 |
0x4567be AND $-0x8,%R8 |
0x4567c2 JMP 0x5179b0(,%RCX,8) |
0x4567c9 ADD %R8,%RDI |
0x4567cc JMP 457426 |
0x4567d1 NOPW %CS:(%RAX,%RAX,1) |
(1066) 0x4567e0 MOV -0xa8(%RBP),%RCX |
(1066) 0x4567e7 MOV (%RCX),%RCX |
(1066) 0x4567ea VMOVSD (%RCX,%RAX,8),%XMM5 |
(1066) 0x4567ef MOV -0x68(%RBP),%RSI |
(1066) 0x4567f3 VADDSD (%RSI,%R9,8),%XMM5,%XMM5 |
(1066) 0x4567f9 VMOVSD %XMM5,(%RCX,%RAX,8) |
(1066) 0x4567fe INC %R9 |
(1066) 0x456801 CMP -0x98(%RBP),%R9 |
(1066) 0x456808 JE 4566a7 |
(1066) 0x45680e MOV -0xb0(%RBP),%RAX |
(1066) 0x456815 MOV (%RAX,%R9,8),%RCX |
(1066) 0x456819 MOV (%RBX,%RCX,8),%RAX |
(1066) 0x45681d CMP %RDI,%RAX |
(1066) 0x456820 JGE 4567e0 |
(1066) 0x456822 CMP -0x58(%RBP),%RAX |
(1066) 0x456826 JNE 4568f0 |
(1066) 0x45682c MOV %RCX,%R10 |
(1066) 0x45682f MOV -0x198(%RBP),%RCX |
(1066) 0x456836 MOV (%RCX,%R10,8),%R11 |
(1066) 0x45683a VXORPD %XMM5,%XMM5,%XMM5 |
(1066) 0x45683e XOR %EAX,%EAX |
(1066) 0x456840 MOV -0x68(%RBP),%RSI |
(1066) 0x456844 VUCOMISD (%RSI,%R11,8),%XMM5 |
(1066) 0x45684a SETBE %AL |
(1066) 0x45684d MOV %R10,-0xc0(%RBP) |
(1066) 0x456854 MOV 0x8(%RCX,%R10,8),%RCX |
(1066) 0x456859 LEA -0x1(,%RAX,2),%RAX |
(1066) 0x456861 MOV %RAX,-0x90(%RBP) |
(1066) 0x456868 LEA 0x1(%R11),%R10 |
(1066) 0x45686c CMP %RCX,%R10 |
(1066) 0x45686f JGE 456bb0 |
(1066) 0x456875 MOV %R11,%RSI |
(1066) 0x456878 VCVTSI2SDL -0x90(%RBP),%XMM10,%XMM6 |
(1066) 0x456880 MOV %RCX,%RAX |
(1066) 0x456883 MOV %RSI,-0xb8(%RBP) |
(1066) 0x45688a SUB %R11,%RAX |
(1066) 0x45688d LEA -0x1(%RAX),%RSI |
(1066) 0x456891 MOV %RSI,-0x50(%RBP) |
(1066) 0x456895 CMP $0x4,%RSI |
(1066) 0x456899 JAE 45692c |
(1066) 0x45689f MOV -0x50(%RBP),%RSI |
(1066) 0x4568a3 AND $-0x4,%RSI |
(1066) 0x4568a7 SUB %RSI,%RAX |
(1066) 0x4568aa CMP $0x2,%RAX |
(1066) 0x4568ae JE 456a94 |
(1066) 0x4568b4 CMP $0x4,%RAX |
(1066) 0x4568b8 JE 456aa4 |
(1066) 0x4568be CMP $0x3,%RAX |
(1066) 0x4568c2 MOV -0x88(%RBP),%R14 |
(1066) 0x4568c9 MOV -0x30(%RBP),%R15 |
(1066) 0x4568cd JNE 456bb0 |
(1066) 0x4568d3 MOV %RSI,-0x50(%RBP) |
(1066) 0x4568d7 MOV -0xb8(%RBP),%R12 |
(1066) 0x4568de ADD %RSI,%R12 |
(1066) 0x4568e1 JMP 456b08 |
0x4568e6 NOPW %CS:(%RAX,%RAX,1) |
(1066) 0x4568f0 CMPQ $-0x3,(%R14,%RCX,8) |
(1066) 0x4568f5 JE 4567fe |
(1066) 0x4568fb CMPQ $0x1,-0x190(%RBP) |
(1066) 0x456903 JE 45691d |
(1066) 0x456905 MOV %RCX,%RSI |
(1066) 0x456908 MOV -0x188(%RBP),%RCX |
(1066) 0x45690f MOV (%RCX,%R13,8),%RAX |
(1066) 0x456913 CMP (%RCX,%RSI,8),%RAX |
(1066) 0x456917 JNE 4567fe |
(1066) 0x45691d MOV -0x68(%RBP),%RAX |
(1066) 0x456921 VADDSD (%RAX,%R9,8),%XMM4,%XMM4 |
(1066) 0x456927 JMP 4567fe |
(1066) 0x45692c MOV -0x50(%RBP),%R15 |
(1066) 0x456930 SHR $0x2,%R15 |
(1066) 0x456934 MOV -0xb8(%RBP),%RSI |
(1066) 0x45693b LEA 0x20(,%RSI,8),%RSI |
(1066) 0x456943 VXORPD %XMM7,%XMM7,%XMM7 |
(1066) 0x456947 JMP 45695d |
0x456949 NOPL (%RAX) |
(1071) 0x456950 ADD $0x20,%RSI |
(1071) 0x456954 DEC %R15 |
(1071) 0x456957 JE 45689f |
(1071) 0x45695d MOV -0xb0(%RBP),%R11 |
(1071) 0x456964 MOV -0x18(%R11,%RSI,1),%R12 |
(1071) 0x456969 XOR %R14D,%R14D |
(1071) 0x45696c CMP %RDI,(%RBX,%R12,8) |
(1071) 0x456970 SETGE %R14B |
(1071) 0x456974 XOR %R11D,%R11D |
(1071) 0x456977 CMP %R13,%R12 |
(1071) 0x45697a SETE %R11B |
(1071) 0x45697e CMP %R14B,%R11B |
(1071) 0x456981 CMOVA %R11D,%R14D |
(1071) 0x456985 CMP $0x1,%R14B |
(1071) 0x456989 JNE 4569a9 |
(1071) 0x45698b MOV -0x68(%RBP),%R11 |
(1071) 0x45698f VMOVSD -0x18(%R11,%RSI,1),%XMM8 |
(1071) 0x456996 VMULSD %XMM6,%XMM8,%XMM9 |
(1071) 0x45699a VCMPSD $0x1,%XMM7,%XMM9,%XMM9 |
(1071) 0x45699f VBLENDVPD %XMM9,%XMM8,%XMM1,%XMM8 |
(1071) 0x4569a5 VADDSD %XMM5,%XMM8,%XMM5 |
(1071) 0x4569a9 MOV -0xb0(%RBP),%R11 |
(1071) 0x4569b0 MOV -0x10(%R11,%RSI,1),%R11 |
(1071) 0x4569b5 XOR %R14D,%R14D |
(1071) 0x4569b8 CMP %RDI,(%RBX,%R11,8) |
(1071) 0x4569bc SETGE %R14B |
(1071) 0x4569c0 XOR %R12D,%R12D |
(1071) 0x4569c3 CMP %R13,%R11 |
(1071) 0x4569c6 SETE %R12B |
(1071) 0x4569ca CMP %R14B,%R12B |
(1071) 0x4569cd CMOVA %R12D,%R14D |
(1071) 0x4569d1 CMP $0x1,%R14B |
(1071) 0x4569d5 JNE 4569f5 |
(1071) 0x4569d7 MOV -0x68(%RBP),%R11 |
(1071) 0x4569db VMOVSD -0x10(%R11,%RSI,1),%XMM8 |
(1071) 0x4569e2 VMULSD %XMM6,%XMM8,%XMM9 |
(1071) 0x4569e6 VCMPSD $0x1,%XMM7,%XMM9,%XMM9 |
(1071) 0x4569eb VBLENDVPD %XMM9,%XMM8,%XMM1,%XMM8 |
(1071) 0x4569f1 VADDSD %XMM5,%XMM8,%XMM5 |
(1071) 0x4569f5 MOV -0xb0(%RBP),%R11 |
(1071) 0x4569fc MOV -0x8(%R11,%RSI,1),%R11 |
(1071) 0x456a01 XOR %R14D,%R14D |
(1071) 0x456a04 CMP %RDI,(%RBX,%R11,8) |
(1071) 0x456a08 SETGE %R14B |
(1071) 0x456a0c XOR %R12D,%R12D |
(1071) 0x456a0f CMP %R13,%R11 |
(1071) 0x456a12 SETE %R12B |
(1071) 0x456a16 CMP %R14B,%R12B |
(1071) 0x456a19 CMOVA %R12D,%R14D |
(1071) 0x456a1d CMP $0x1,%R14B |
(1071) 0x456a21 JNE 456a41 |
(1071) 0x456a23 MOV -0x68(%RBP),%R11 |
(1071) 0x456a27 VMOVSD -0x8(%R11,%RSI,1),%XMM8 |
(1071) 0x456a2e VMULSD %XMM6,%XMM8,%XMM9 |
(1071) 0x456a32 VCMPSD $0x1,%XMM7,%XMM9,%XMM9 |
(1071) 0x456a37 VBLENDVPD %XMM9,%XMM8,%XMM1,%XMM8 |
(1071) 0x456a3d VADDSD %XMM5,%XMM8,%XMM5 |
(1071) 0x456a41 MOV -0xb0(%RBP),%R11 |
(1071) 0x456a48 MOV (%R11,%RSI,1),%R11 |
(1071) 0x456a4c XOR %R14D,%R14D |
(1071) 0x456a4f CMP %RDI,(%RBX,%R11,8) |
(1071) 0x456a53 SETGE %R14B |
(1071) 0x456a57 XOR %R12D,%R12D |
(1071) 0x456a5a CMP %R13,%R11 |
(1071) 0x456a5d SETE %R12B |
(1071) 0x456a61 CMP %R14B,%R12B |
(1071) 0x456a64 CMOVA %R12D,%R14D |
(1071) 0x456a68 CMP $0x1,%R14B |
(1071) 0x456a6c JNE 456950 |
(1071) 0x456a72 MOV -0x68(%RBP),%R11 |
(1071) 0x456a76 VMOVSD (%R11,%RSI,1),%XMM8 |
(1071) 0x456a7c VMULSD %XMM6,%XMM8,%XMM9 |
(1071) 0x456a80 VCMPSD $0x1,%XMM7,%XMM9,%XMM9 |
(1071) 0x456a85 VBLENDVPD %XMM9,%XMM8,%XMM1,%XMM8 |
(1071) 0x456a8b VADDSD %XMM5,%XMM8,%XMM5 |
(1071) 0x456a8f JMP 456950 |
(1066) 0x456a94 MOV -0x88(%RBP),%R14 |
(1066) 0x456a9b MOV -0x30(%RBP),%R15 |
(1066) 0x456a9f JMP 456b57 |
(1066) 0x456aa4 MOV %RSI,-0x50(%RBP) |
(1066) 0x456aa8 MOV -0xb8(%RBP),%R12 |
(1066) 0x456aaf ADD %RSI,%R12 |
(1066) 0x456ab2 MOV -0xb0(%RBP),%RAX |
(1066) 0x456ab9 MOV 0x18(%RAX,%R12,8),%RAX |
(1066) 0x456abe XOR %ESI,%ESI |
(1066) 0x456ac0 CMP %RDI,(%RBX,%RAX,8) |
(1066) 0x456ac4 SETGE %SIL |
(1066) 0x456ac8 XOR %R11D,%R11D |
(1066) 0x456acb CMP %R13,%RAX |
(1066) 0x456ace SETE %R11B |
(1066) 0x456ad2 CMP %SIL,%R11B |
(1066) 0x456ad5 CMOVA %R11D,%ESI |
(1066) 0x456ad9 CMP $0x1,%SIL |
(1066) 0x456add MOV -0x88(%RBP),%R14 |
(1066) 0x456ae4 MOV -0x30(%RBP),%R15 |
(1066) 0x456ae8 JNE 456b08 |
(1066) 0x456aea MOV -0x68(%RBP),%RAX |
(1066) 0x456aee VMOVSD 0x18(%RAX,%R12,8),%XMM7 |
(1066) 0x456af5 VMULSD %XMM6,%XMM7,%XMM8 |
(1066) 0x456af9 VCMPSD $0x1,%XMM0,%XMM8,%XMM8 |
(1066) 0x456afe VBLENDVPD %XMM8,%XMM7,%XMM1,%XMM7 |
(1066) 0x456b04 VADDSD %XMM5,%XMM7,%XMM5 |
(1066) 0x456b08 MOV -0xb0(%RBP),%RAX |
(1066) 0x456b0f MOV 0x10(%RAX,%R12,8),%RAX |
(1066) 0x456b14 XOR %ESI,%ESI |
(1066) 0x456b16 CMP %RDI,(%RBX,%RAX,8) |
(1066) 0x456b1a SETGE %SIL |
(1066) 0x456b1e XOR %R11D,%R11D |
(1066) 0x456b21 CMP %R13,%RAX |
(1066) 0x456b24 SETE %R11B |
(1066) 0x456b28 CMP %SIL,%R11B |
(1066) 0x456b2b CMOVA %R11D,%ESI |
(1066) 0x456b2f CMP $0x1,%SIL |
(1066) 0x456b33 JNE 456b53 |
(1066) 0x456b35 MOV -0x68(%RBP),%RAX |
(1066) 0x456b39 VMOVSD 0x10(%RAX,%R12,8),%XMM7 |
(1066) 0x456b40 VMULSD %XMM6,%XMM7,%XMM8 |
(1066) 0x456b44 VCMPSD $0x1,%XMM0,%XMM8,%XMM8 |
(1066) 0x456b49 VBLENDVPD %XMM8,%XMM7,%XMM1,%XMM7 |
(1066) 0x456b4f VADDSD %XMM5,%XMM7,%XMM5 |
(1066) 0x456b53 MOV -0x50(%RBP),%RSI |
(1066) 0x456b57 ADD %R10,%RSI |
(1066) 0x456b5a MOV -0xb0(%RBP),%RAX |
(1066) 0x456b61 MOV (%RAX,%RSI,8),%RAX |
(1066) 0x456b65 MOV %RSI,%R12 |
(1066) 0x456b68 XOR %ESI,%ESI |
(1066) 0x456b6a CMP %RDI,(%RBX,%RAX,8) |
(1066) 0x456b6e SETGE %SIL |
(1066) 0x456b72 XOR %R11D,%R11D |
(1066) 0x456b75 CMP %R13,%RAX |
(1066) 0x456b78 SETE %R11B |
(1066) 0x456b7c CMP %SIL,%R11B |
(1066) 0x456b7f CMOVA %R11D,%ESI |
(1066) 0x456b83 CMP $0x1,%SIL |
(1066) 0x456b87 JNE 456bb0 |
(1066) 0x456b89 MOV -0x68(%RBP),%RAX |
(1066) 0x456b8d VMOVSD (%RAX,%R12,8),%XMM7 |
(1066) 0x456b93 VMULSD %XMM6,%XMM7,%XMM6 |
(1066) 0x456b97 VCMPSD $0x1,%XMM0,%XMM6,%XMM6 |
(1066) 0x456b9c VBLENDVPD %XMM6,%XMM7,%XMM1,%XMM6 |
(1066) 0x456ba2 VADDSD %XMM5,%XMM6,%XMM5 |
(1066) 0x456ba6 NOPW %CS:(%RAX,%RAX,1) |
(1066) 0x456bb0 MOV -0xc8(%RBP),%RAX |
(1066) 0x456bb7 MOV (%RAX),%R12 |
(1066) 0x456bba CMP $0x2,%R12 |
(1066) 0x456bbe JL 456dde |
(1066) 0x456bc4 MOV %R12,-0x50(%RBP) |
(1066) 0x456bc8 MOV -0x160(%RBP),%RAX |
(1066) 0x456bcf MOV -0xc0(%RBP),%RSI |
(1066) 0x456bd6 MOV (%RAX,%RSI,8),%R12 |
(1066) 0x456bda MOV 0x8(%RAX,%RSI,8),%RAX |
(1066) 0x456bdf SUB %R12,%RAX |
(1066) 0x456be2 JLE 456dda |
(1066) 0x456be8 VCVTSI2SDL -0x90(%RBP),%XMM10,%XMM6 |
(1066) 0x456bf0 CMP $0x4,%RAX |
(1066) 0x456bf4 JAE 456c72 |
(1066) 0x456bf6 MOV %RAX,%RSI |
(1066) 0x456bf9 AND $-0x4,%RSI |
(1066) 0x456bfd AND $0x3,%EAX |
(1066) 0x456c00 CMP $0x1,%RAX |
(1066) 0x456c04 JE 456d68 |
(1066) 0x456c0a CMP $0x3,%EAX |
(1066) 0x456c0d MOV -0x30(%RBP),%R15 |
(1066) 0x456c11 MOV -0x88(%RBP),%R14 |
(1066) 0x456c18 JE 456d86 |
(1066) 0x456c1e CMP $0x2,%EAX |
(1066) 0x456c21 JNE 456dda |
(1066) 0x456c27 ADD %RSI,%R12 |
(1066) 0x456c2a MOV -0x80(%RBP),%RAX |
(1066) 0x456c2e MOV 0x8(%RAX,%R12,8),%RAX |
(1066) 0x456c33 CMP %RDX,(%R15,%RAX,8) |
(1066) 0x456c37 JL 456daf |
(1066) 0x456c3d MOV -0x60(%RBP),%RAX |
(1066) 0x456c41 VMOVSD 0x8(%RAX,%R12,8),%XMM7 |
(1066) 0x456c48 VMULSD %XMM6,%XMM7,%XMM8 |
(1066) 0x456c4c VCMPSD $0x1,%XMM0,%XMM8,%XMM8 |
(1066) 0x456c51 VBLENDVPD %XMM8,%XMM7,%XMM1,%XMM7 |
(1066) 0x456c57 VADDSD %XMM5,%XMM7,%XMM5 |
(1066) 0x456c5b MOV -0x80(%RBP),%RAX |
(1066) 0x456c5f MOV (%RAX,%R12,8),%RAX |
(1066) 0x456c63 CMP %RDX,(%R15,%RAX,8) |
(1066) 0x456c67 JGE 456dbd |
(1066) 0x456c6d JMP 456dda |
(1066) 0x456c72 MOV %RAX,%RSI |
(1066) 0x456c75 SHR $0x2,%RSI |
(1066) 0x456c79 LEA 0x18(,%R12,8),%R15 |
(1066) 0x456c81 JMP 456c9d |
0x456c83 NOPW %CS:(%RAX,%RAX,1) |
(1070) 0x456c90 ADD $0x20,%R15 |
(1070) 0x456c94 DEC %RSI |
(1070) 0x456c97 JE 456bf6 |
(1070) 0x456c9d MOV -0x80(%RBP),%R11 |
(1070) 0x456ca1 MOV -0x18(%R11,%R15,1),%R11 |
(1070) 0x456ca6 MOV -0x30(%RBP),%R14 |
(1070) 0x456caa CMP %RDX,(%R14,%R11,8) |
(1070) 0x456cae JL 456cce |
(1070) 0x456cb0 MOV -0x60(%RBP),%R11 |
(1070) 0x456cb4 VMOVSD -0x18(%R11,%R15,1),%XMM7 |
(1070) 0x456cbb VMULSD %XMM6,%XMM7,%XMM8 |
(1070) 0x456cbf VCMPSD $0x1,%XMM0,%XMM8,%XMM8 |
(1070) 0x456cc4 VBLENDVPD %XMM8,%XMM7,%XMM1,%XMM7 |
(1070) 0x456cca VADDSD %XMM5,%XMM7,%XMM5 |
(1070) 0x456cce MOV -0x80(%RBP),%R11 |
(1070) 0x456cd2 MOV -0x10(%R11,%R15,1),%R11 |
(1070) 0x456cd7 MOV -0x30(%RBP),%R14 |
(1070) 0x456cdb CMP %RDX,(%R14,%R11,8) |
(1070) 0x456cdf JL 456cff |
(1070) 0x456ce1 MOV -0x60(%RBP),%R11 |
(1070) 0x456ce5 VMOVSD -0x10(%R11,%R15,1),%XMM7 |
(1070) 0x456cec VMULSD %XMM6,%XMM7,%XMM8 |
(1070) 0x456cf0 VCMPSD $0x1,%XMM0,%XMM8,%XMM8 |
(1070) 0x456cf5 VBLENDVPD %XMM8,%XMM7,%XMM1,%XMM7 |
(1070) 0x456cfb VADDSD %XMM5,%XMM7,%XMM5 |
(1070) 0x456cff MOV -0x80(%RBP),%R11 |
(1070) 0x456d03 MOV -0x8(%R11,%R15,1),%R11 |
(1070) 0x456d08 MOV -0x30(%RBP),%R14 |
(1070) 0x456d0c CMP %RDX,(%R14,%R11,8) |
(1070) 0x456d10 JL 456d30 |
(1070) 0x456d12 MOV -0x60(%RBP),%R11 |
(1070) 0x456d16 VMOVSD -0x8(%R11,%R15,1),%XMM7 |
(1070) 0x456d1d VMULSD %XMM6,%XMM7,%XMM8 |
(1070) 0x456d21 VCMPSD $0x1,%XMM0,%XMM8,%XMM8 |
(1070) 0x456d26 VBLENDVPD %XMM8,%XMM7,%XMM1,%XMM7 |
(1070) 0x456d2c VADDSD %XMM5,%XMM7,%XMM5 |
(1070) 0x456d30 MOV -0x80(%RBP),%R11 |
(1070) 0x456d34 MOV (%R11,%R15,1),%R11 |
(1070) 0x456d38 MOV -0x30(%RBP),%R14 |
(1070) 0x456d3c CMP %RDX,(%R14,%R11,8) |
(1070) 0x456d40 JL 456c90 |
(1070) 0x456d46 MOV -0x60(%RBP),%R11 |
(1070) 0x456d4a VMOVSD (%R11,%R15,1),%XMM7 |
(1070) 0x456d50 VMULSD %XMM6,%XMM7,%XMM8 |
(1070) 0x456d54 VCMPSD $0x1,%XMM0,%XMM8,%XMM8 |
(1070) 0x456d59 VBLENDVPD %XMM8,%XMM7,%XMM1,%XMM7 |
(1070) 0x456d5f VADDSD %XMM5,%XMM7,%XMM5 |
(1070) 0x456d63 JMP 456c90 |
(1066) 0x456d68 ADD %RSI,%R12 |
(1066) 0x456d6b MOV -0x30(%RBP),%R15 |
(1066) 0x456d6f MOV -0x88(%RBP),%R14 |
(1066) 0x456d76 MOV -0x80(%RBP),%RAX |
(1066) 0x456d7a MOV (%RAX,%R12,8),%RAX |
(1066) 0x456d7e CMP %RDX,(%R15,%RAX,8) |
(1066) 0x456d82 JGE 456dbd |
(1066) 0x456d84 JMP 456dda |
(1066) 0x456d86 ADD %RSI,%R12 |
(1066) 0x456d89 MOV -0x80(%RBP),%RAX |
(1066) 0x456d8d MOV 0x10(%RAX,%R12,8),%RAX |
(1066) 0x456d92 CMP %RDX,(%R15,%RAX,8) |
(1066) 0x456d96 JGE 457080 |
(1066) 0x456d9c MOV -0x80(%RBP),%RAX |
(1066) 0x456da0 MOV 0x8(%RAX,%R12,8),%RAX |
(1066) 0x456da5 CMP %RDX,(%R15,%RAX,8) |
(1066) 0x456da9 JGE 456c3d |
(1066) 0x456daf MOV -0x80(%RBP),%RAX |
(1066) 0x456db3 MOV (%RAX,%R12,8),%RAX |
(1066) 0x456db7 CMP %RDX,(%R15,%RAX,8) |
(1066) 0x456dbb JL 456dda |
(1066) 0x456dbd MOV -0x60(%RBP),%RAX |
(1066) 0x456dc1 VMOVSD (%RAX,%R12,8),%XMM7 |
(1066) 0x456dc7 VMULSD %XMM6,%XMM7,%XMM6 |
(1066) 0x456dcb VCMPSD $0x1,%XMM0,%XMM6,%XMM6 |
(1066) 0x456dd0 VBLENDVPD %XMM6,%XMM7,%XMM1,%XMM6 |
(1066) 0x456dd6 VADDSD %XMM5,%XMM6,%XMM5 |
(1066) 0x456dda MOV -0x50(%RBP),%R12 |
(1066) 0x456dde VUCOMISD %XMM0,%XMM5 |
(1066) 0x456de2 MOV -0x68(%RBP),%RAX |
(1066) 0x456de6 VMOVSD (%RAX,%R9,8),%XMM6 |
(1066) 0x456dec JE 456f3a |
(1066) 0x456df2 VDIVSD %XMM5,%XMM6,%XMM5 |
(1066) 0x456df6 CMP %RCX,%R10 |
(1066) 0x456df9 JGE 456e82 |
(1066) 0x456dff VCVTSI2SDL -0x90(%RBP),%XMM10,%XMM6 |
(1066) 0x456e07 JMP 456e18 |
0x456e09 NOPL (%RAX) |
(1069) 0x456e10 INC %R10 |
(1069) 0x456e13 CMP %R10,%RCX |
(1069) 0x456e16 JE 456e82 |
(1069) 0x456e18 MOV -0xb0(%RBP),%RAX |
(1069) 0x456e1f MOV (%RAX,%R10,8),%RAX |
(1069) 0x456e23 MOV (%RBX,%RAX,8),%RSI |
(1069) 0x456e27 CMP %RDI,%RSI |
(1069) 0x456e2a JL 456e5a |
(1069) 0x456e2c MOV -0x68(%RBP),%R11 |
(1069) 0x456e30 VMOVSD (%R11,%R10,8),%XMM7 |
(1069) 0x456e36 VMULSD %XMM6,%XMM7,%XMM8 |
(1069) 0x456e3a VUCOMISD %XMM0,%XMM8 |
(1069) 0x456e3e JAE 456e5a |
(1069) 0x456e40 MOV -0xa8(%RBP),%R11 |
(1069) 0x456e47 MOV (%R11),%R15 |
(1069) 0x456e4a VFMADD213SD (%R15,%RSI,8),%XMM5,%XMM7 |
(1069) 0x456e50 VMOVSD %XMM7,(%R15,%RSI,8) |
(1069) 0x456e56 MOV -0x30(%RBP),%R15 |
(1069) 0x456e5a CMP %R13,%RAX |
(1069) 0x456e5d JNE 456e10 |
(1069) 0x456e5f MOV -0x68(%RBP),%RAX |
(1069) 0x456e63 VMOVSD (%RAX,%R10,8),%XMM7 |
(1069) 0x456e69 VMULSD %XMM6,%XMM7,%XMM8 |
(1069) 0x456e6d VMULSD %XMM5,%XMM7,%XMM7 |
(1069) 0x456e71 VCMPSD $0x1,%XMM0,%XMM8,%XMM8 |
(1069) 0x456e76 VBLENDVPD %XMM8,%XMM7,%XMM1,%XMM7 |
(1069) 0x456e7c VADDSD %XMM4,%XMM7,%XMM4 |
(1069) 0x456e80 JMP 456e10 |
(1066) 0x456e82 CMP $0x2,%R12 |
(1066) 0x456e86 JL 456f3e |
(1066) 0x456e8c MOV -0x160(%RBP),%RCX |
(1066) 0x456e93 MOV -0xc0(%RBP),%RSI |
(1066) 0x456e9a MOV (%RCX,%RSI,8),%RAX |
(1066) 0x456e9e MOV 0x8(%RCX,%RSI,8),%RCX |
(1066) 0x456ea3 MOV %RCX,%RSI |
(1066) 0x456ea6 SUB %RAX,%RSI |
(1066) 0x456ea9 MOV -0x38(%RBP),%R10 |
(1066) 0x456ead JLE 4567fe |
(1066) 0x456eb3 VCVTSI2SDL -0x90(%RBP),%XMM10,%XMM6 |
(1066) 0x456ebb CMP $0x4,%RSI |
(1066) 0x456ebf JAE 456f47 |
(1066) 0x456ec5 MOV %RSI,%R10 |
(1066) 0x456ec8 AND $-0x4,%R10 |
(1066) 0x456ecc CMP %RSI,%R10 |
(1066) 0x456ecf JAE 457070 |
(1066) 0x456ed5 ADD %R10,%RAX |
(1066) 0x456ed8 MOV -0x88(%RBP),%R14 |
(1066) 0x456edf MOV -0x38(%RBP),%R10 |
(1066) 0x456ee3 JMP 456efc |
0x456ee5 NOPW %CS:(%RAX,%RAX,1) |
(1067) 0x456ef0 INC %RAX |
(1067) 0x456ef3 CMP %RAX,%RCX |
(1067) 0x456ef6 JE 4567fe |
(1067) 0x456efc MOV -0x80(%RBP),%RSI |
(1067) 0x456f00 MOV (%RSI,%RAX,8),%RSI |
(1067) 0x456f04 MOV (%R15,%RSI,8),%RSI |
(1067) 0x456f08 CMP %RDX,%RSI |
(1067) 0x456f0b JL 456ef0 |
(1067) 0x456f0d MOV -0x60(%RBP),%R11 |
(1067) 0x456f11 VMOVSD (%R11,%RAX,8),%XMM7 |
(1067) 0x456f17 VMULSD %XMM6,%XMM7,%XMM8 |
(1067) 0x456f1b VUCOMISD %XMM0,%XMM8 |
(1067) 0x456f1f JAE 456ef0 |
(1067) 0x456f21 MOV -0x78(%RBP),%R10 |
(1067) 0x456f25 MOV (%R10),%R10 |
(1067) 0x456f28 VFMADD213SD (%R10,%RSI,8),%XMM5,%XMM7 |
(1067) 0x456f2e VMOVSD %XMM7,(%R10,%RSI,8) |
(1067) 0x456f34 MOV -0x38(%RBP),%R10 |
(1067) 0x456f38 JMP 456ef0 |
(1066) 0x456f3a VADDSD %XMM4,%XMM6,%XMM4 |
(1066) 0x456f3e MOV -0x38(%RBP),%R10 |
(1066) 0x456f42 JMP 4567fe |
(1066) 0x456f47 MOV %RSI,%R10 |
(1066) 0x456f4a SHR $0x2,%R10 |
(1066) 0x456f4e LEA 0x18(,%RAX,8),%R11 |
(1066) 0x456f56 JMP 456f71 |
0x456f58 NOPL (%RAX,%RAX,1) |
(1068) 0x456f60 ADD $0x20,%R11 |
(1068) 0x456f64 DEC %R10 |
(1068) 0x456f67 MOV -0x30(%RBP),%R15 |
(1068) 0x456f6b JE 456ec5 |
(1068) 0x456f71 MOV -0x80(%RBP),%R14 |
(1068) 0x456f75 MOV -0x18(%R14,%R11,1),%R14 |
(1068) 0x456f7a MOV (%R15,%R14,8),%R15 |
(1068) 0x456f7e CMP %RDX,%R15 |
(1068) 0x456f81 JL 456fab |
(1068) 0x456f83 MOV -0x60(%RBP),%R14 |
(1068) 0x456f87 VMOVSD -0x18(%R14,%R11,1),%XMM7 |
(1068) 0x456f8e VMULSD %XMM6,%XMM7,%XMM8 |
(1068) 0x456f92 VUCOMISD %XMM0,%XMM8 |
(1068) 0x456f96 JAE 456fab |
(1068) 0x456f98 MOV -0x78(%RBP),%R14 |
(1068) 0x456f9c MOV (%R14),%R14 |
(1068) 0x456f9f VFMADD213SD (%R14,%R15,8),%XMM5,%XMM7 |
(1068) 0x456fa5 VMOVSD %XMM7,(%R14,%R15,8) |
(1068) 0x456fab MOV -0x80(%RBP),%R14 |
(1068) 0x456faf MOV -0x10(%R14,%R11,1),%R14 |
(1068) 0x456fb4 MOV -0x30(%RBP),%R15 |
(1068) 0x456fb8 MOV (%R15,%R14,8),%R15 |
(1068) 0x456fbc CMP %RDX,%R15 |
(1068) 0x456fbf JL 456fe9 |
(1068) 0x456fc1 MOV -0x60(%RBP),%R14 |
(1068) 0x456fc5 VMOVSD -0x10(%R14,%R11,1),%XMM7 |
(1068) 0x456fcc VMULSD %XMM6,%XMM7,%XMM8 |
(1068) 0x456fd0 VUCOMISD %XMM0,%XMM8 |
(1068) 0x456fd4 JAE 456fe9 |
(1068) 0x456fd6 MOV -0x78(%RBP),%R14 |
(1068) 0x456fda MOV (%R14),%R14 |
(1068) 0x456fdd VFMADD213SD (%R14,%R15,8),%XMM5,%XMM7 |
(1068) 0x456fe3 VMOVSD %XMM7,(%R14,%R15,8) |
(1068) 0x456fe9 MOV -0x80(%RBP),%R14 |
(1068) 0x456fed MOV -0x8(%R14,%R11,1),%R14 |
(1068) 0x456ff2 MOV -0x30(%RBP),%R15 |
(1068) 0x456ff6 MOV (%R15,%R14,8),%R15 |
(1068) 0x456ffa CMP %RDX,%R15 |
(1068) 0x456ffd JL 457027 |
(1068) 0x456fff MOV -0x60(%RBP),%R14 |
(1068) 0x457003 VMOVSD -0x8(%R14,%R11,1),%XMM7 |
(1068) 0x45700a VMULSD %XMM6,%XMM7,%XMM8 |
(1068) 0x45700e VUCOMISD %XMM0,%XMM8 |
(1068) 0x457012 JAE 457027 |
(1068) 0x457014 MOV -0x78(%RBP),%R14 |
(1068) 0x457018 MOV (%R14),%R14 |
(1068) 0x45701b VFMADD213SD (%R14,%R15,8),%XMM5,%XMM7 |
(1068) 0x457021 VMOVSD %XMM7,(%R14,%R15,8) |
(1068) 0x457027 MOV -0x80(%RBP),%R14 |
(1068) 0x45702b MOV (%R14,%R11,1),%R14 |
(1068) 0x45702f MOV -0x30(%RBP),%R15 |
(1068) 0x457033 MOV (%R15,%R14,8),%R15 |
(1068) 0x457037 CMP %RDX,%R15 |
(1068) 0x45703a JL 456f60 |
(1068) 0x457040 MOV -0x60(%RBP),%R14 |
(1068) 0x457044 VMOVSD (%R14,%R11,1),%XMM7 |
(1068) 0x45704a VMULSD %XMM6,%XMM7,%XMM8 |
(1068) 0x45704e VUCOMISD %XMM0,%XMM8 |
(1068) 0x457052 JAE 456f60 |
(1068) 0x457058 MOV -0x78(%RBP),%R14 |
(1068) 0x45705c MOV (%R14),%R14 |
(1068) 0x45705f VFMADD213SD (%R14,%R15,8),%XMM5,%XMM7 |
(1068) 0x457065 VMOVSD %XMM7,(%R14,%R15,8) |
(1068) 0x45706b JMP 456f60 |
(1066) 0x457070 MOV -0x88(%RBP),%R14 |
(1066) 0x457077 MOV -0x38(%RBP),%R10 |
(1066) 0x45707b JMP 4567fe |
(1066) 0x457080 MOV -0x60(%RBP),%RAX |
(1066) 0x457084 VMOVSD 0x10(%RAX,%R12,8),%XMM7 |
(1066) 0x45708b VMULSD %XMM6,%XMM7,%XMM8 |
(1066) 0x45708f VCMPSD $0x1,%XMM0,%XMM8,%XMM8 |
(1066) 0x457094 VBLENDVPD %XMM8,%XMM7,%XMM1,%XMM7 |
(1066) 0x45709a VADDSD %XMM5,%XMM7,%XMM5 |
(1066) 0x45709e MOV -0x80(%RBP),%RAX |
(1066) 0x4570a2 MOV 0x8(%RAX,%R12,8),%RAX |
(1066) 0x4570a7 CMP %RDX,(%R15,%RAX,8) |
(1066) 0x4570ab JL 456daf |
(1066) 0x4570b1 JMP 456c3d |
0x4570b6 NOPW %CS:(%RAX,%RAX,1) |
(1063) 0x4570c0 MOV -0x78(%RBP),%RAX |
(1063) 0x4570c4 MOV (%RAX),%RAX |
(1063) 0x4570c7 VMOVSD (%RAX,%RSI,8),%XMM5 |
(1063) 0x4570cc MOV -0x60(%RBP),%R10 |
(1063) 0x4570d0 VADDSD (%R10,%RCX,8),%XMM5,%XMM5 |
(1063) 0x4570d6 VMOVSD %XMM5,(%RAX,%RSI,8) |
(1063) 0x4570db INC %RCX |
(1063) 0x4570de CMP %R9,%RCX |
(1063) 0x4570e1 MOV -0x38(%RBP),%R10 |
(1063) 0x4570e5 JE 4566cd |
(1063) 0x4570eb MOV -0x80(%RBP),%RAX |
(1063) 0x4570ef MOV (%RAX,%RCX,8),%RAX |
(1063) 0x4570f3 MOV (%R15,%RAX,8),%RSI |
(1063) 0x4570f7 CMP %RDX,%RSI |
(1063) 0x4570fa JGE 4570c0 |
(1063) 0x4570fc CMP -0x58(%RBP),%RSI |
(1063) 0x457100 JNE 457170 |
(1063) 0x457102 MOV -0x1d8(%RBP),%RSI |
(1063) 0x457109 MOV (%RSI,%RAX,8),%R10 |
(1063) 0x45710d MOV 0x8(%RSI,%RAX,8),%R11 |
(1063) 0x457112 CMP %R10,%R11 |
(1063) 0x457115 JLE 4571bc |
(1063) 0x45711b MOV %R11D,%R15D |
(1063) 0x45711e SUB %R10D,%R15D |
(1063) 0x457121 LEA 0x1(%R10),%RSI |
(1063) 0x457125 VXORPD %XMM5,%XMM5,%XMM5 |
(1063) 0x457129 MOV %R10,%RAX |
(1063) 0x45712c TEST $0x1,%R15B |
(1063) 0x457130 JE 4571e7 |
(1063) 0x457136 MOV -0x148(%RBP),%RAX |
(1063) 0x45713d MOV (%RAX,%R10,8),%R15 |
(1063) 0x457141 MOV %R15,%RAX |
(1063) 0x457144 SUB -0x120(%RBP),%RAX |
(1063) 0x45714b JL 4571ca |
(1063) 0x45714d CMP -0x118(%RBP),%R15 |
(1063) 0x457154 JGE 4571ca |
(1063) 0x457156 CMP %RDI,(%RBX,%RAX,8) |
(1063) 0x45715a JGE 4571d7 |
(1063) 0x45715c CMP %R13,%RAX |
(1063) 0x45715f JNE 4571e4 |
(1063) 0x457165 JMP 4571d7 |
0x457167 NOPW (%RAX,%RAX,1) |
(1063) 0x457170 MOV -0x128(%RBP),%RSI |
(1063) 0x457177 MOV (%RSI),%RSI |
(1063) 0x45717a CMPQ $-0x3,(%RSI,%RAX,8) |
(1063) 0x45717f JE 4570db |
(1063) 0x457185 CMPQ $0x1,-0x190(%RBP) |
(1063) 0x45718d JE 4571ae |
(1063) 0x45718f MOV -0x188(%RBP),%RSI |
(1063) 0x457196 MOV (%RSI,%R13,8),%RSI |
(1063) 0x45719a MOV -0x1d0(%RBP),%R10 |
(1063) 0x4571a1 MOV (%R10),%R10 |
(1063) 0x4571a4 CMP (%R10,%RAX,8),%RSI |
(1063) 0x4571a8 JNE 4570db |
(1063) 0x4571ae MOV -0x60(%RBP),%RAX |
(1063) 0x4571b2 VADDSD (%RAX,%RCX,8),%XMM4,%XMM4 |
(1063) 0x4571b7 JMP 4570db |
(1063) 0x4571bc MOV -0x60(%RBP),%RAX |
(1063) 0x4571c0 VMOVSD (%RAX,%RCX,8),%XMM6 |
(1063) 0x4571c5 JMP 457376 |
(1063) 0x4571ca NOT %R15 |
(1063) 0x4571cd MOV -0x30(%RBP),%RAX |
(1063) 0x4571d1 CMP %RDX,(%RAX,%R15,8) |
(1063) 0x4571d5 JL 4571e4 |
(1063) 0x4571d7 MOV -0x100(%RBP),%RAX |
(1063) 0x4571de VMOVSD (%RAX,%R10,8),%XMM5 |
(1063) 0x4571e4 MOV %RSI,%RAX |
(1063) 0x4571e7 CMP %RSI,%R11 |
(1063) 0x4571ea JNE 4572ca |
(1063) 0x4571f0 VUCOMISD %XMM0,%XMM5 |
(1063) 0x4571f4 MOV -0x60(%RBP),%RAX |
(1063) 0x4571f8 VMOVSD (%RAX,%RCX,8),%XMM6 |
(1063) 0x4571fd MOV -0x30(%RBP),%R15 |
(1063) 0x457201 JE 457376 |
(1063) 0x457207 VDIVSD %XMM5,%XMM6,%XMM5 |
(1063) 0x45720b JMP 45721c |
0x45720d NOPL (%RAX) |
(1064) 0x457210 INC %R10 |
(1064) 0x457213 CMP %R10,%R11 |
(1064) 0x457216 JE 4570db |
(1064) 0x45721c MOV -0x148(%RBP),%RAX |
(1064) 0x457223 MOV (%RAX,%R10,8),%RSI |
(1064) 0x457227 MOV %RSI,%RAX |
(1064) 0x45722a SUB -0x120(%RBP),%RAX |
(1064) 0x457231 JL 457280 |
(1064) 0x457233 CMP -0x118(%RBP),%RSI |
(1064) 0x45723a JGE 457280 |
(1064) 0x45723c MOV (%RBX,%RAX,8),%RSI |
(1064) 0x457240 CMP %RDI,%RSI |
(1064) 0x457243 JL 45726c |
(1064) 0x457245 MOV -0x100(%RBP),%R15 |
(1064) 0x45724c VMOVSD (%R15,%R10,8),%XMM6 |
(1064) 0x457252 MOV -0xa8(%RBP),%R15 |
(1064) 0x457259 MOV (%R15),%R15 |
(1064) 0x45725c VFMADD213SD (%R15,%RSI,8),%XMM5,%XMM6 |
(1064) 0x457262 VMOVSD %XMM6,(%R15,%RSI,8) |
(1064) 0x457268 MOV -0x30(%RBP),%R15 |
(1064) 0x45726c CMP %R13,%RAX |
(1064) 0x45726f JNE 457210 |
(1064) 0x457271 MOV -0x100(%RBP),%RAX |
(1064) 0x457278 VFMADD231SD (%RAX,%R10,8),%XMM5,%XMM4 |
(1064) 0x45727e JMP 457210 |
(1064) 0x457280 NOT %RSI |
(1064) 0x457283 MOV (%R15,%RSI,8),%RAX |
(1064) 0x457287 CMP %RDX,%RAX |
(1064) 0x45728a JL 457210 |
(1064) 0x45728c MOV -0x100(%RBP),%RSI |
(1064) 0x457293 VMOVSD (%RSI,%R10,8),%XMM6 |
(1064) 0x457299 MOV -0x78(%RBP),%RSI |
(1064) 0x45729d MOV (%RSI),%RSI |
(1064) 0x4572a0 VFMADD213SD (%RSI,%RAX,8),%XMM5,%XMM6 |
(1064) 0x4572a6 VMOVSD %XMM6,(%RSI,%RAX,8) |
(1064) 0x4572ab JMP 457210 |
(1065) 0x4572b0 MOV -0x100(%RBP),%RSI |
(1065) 0x4572b7 VADDSD 0x8(%RSI,%RAX,8),%XMM5,%XMM5 |
(1065) 0x4572bd ADD $0x2,%RAX |
(1065) 0x4572c1 CMP %RAX,%R11 |
(1065) 0x4572c4 JE 4571f0 |
(1065) 0x4572ca MOV -0x148(%RBP),%RSI |
(1065) 0x4572d1 MOV (%RSI,%RAX,8),%R15 |
(1065) 0x4572d5 MOV %R15,%RSI |
(1065) 0x4572d8 SUB -0x120(%RBP),%RSI |
(1065) 0x4572df JL 457300 |
(1065) 0x4572e1 CMP -0x118(%RBP),%R15 |
(1065) 0x4572e8 JGE 457300 |
(1065) 0x4572ea CMP %RDI,(%RBX,%RSI,8) |
(1065) 0x4572ee JGE 45730d |
(1065) 0x4572f0 CMP %R13,%RSI |
(1065) 0x4572f3 JNE 457319 |
(1065) 0x4572f5 JMP 45730d |
0x4572f7 NOPW (%RAX,%RAX,1) |
(1065) 0x457300 NOT %R15 |
(1065) 0x457303 MOV -0x30(%RBP),%RSI |
(1065) 0x457307 CMP %RDX,(%RSI,%R15,8) |
(1065) 0x45730b JL 457319 |
(1065) 0x45730d MOV -0x100(%RBP),%RSI |
(1065) 0x457314 VADDSD (%RSI,%RAX,8),%XMM5,%XMM5 |
(1065) 0x457319 MOV -0x148(%RBP),%RSI |
(1065) 0x457320 MOV 0x8(%RSI,%RAX,8),%R15 |
(1065) 0x457325 MOV %R15,%RSI |
(1065) 0x457328 SUB -0x120(%RBP),%RSI |
(1065) 0x45732f JL 457360 |
(1065) 0x457331 CMP -0x118(%RBP),%R15 |
(1065) 0x457338 JGE 457360 |
(1065) 0x45733a CMP %RDI,(%RBX,%RSI,8) |
(1065) 0x45733e JGE 4572b0 |
(1065) 0x457344 CMP %R13,%RSI |
(1065) 0x457347 JNE 4572bd |
(1065) 0x45734d JMP 4572b0 |
0x457352 NOPW %CS:(%RAX,%RAX,1) |
(1065) 0x457360 NOT %R15 |
(1065) 0x457363 MOV -0x30(%RBP),%RSI |
(1065) 0x457367 CMP %RDX,(%RSI,%R15,8) |
(1065) 0x45736b JL 4572bd |
(1065) 0x457371 JMP 4572b0 |
(1063) 0x457376 VADDSD %XMM4,%XMM6,%XMM4 |
(1063) 0x45737a JMP 4570db |
(1059) 0x45737f MOV -0x48(%RBP),%RDX |
(1059) 0x457383 MOV $0x3ff0000000000000,%R8 |
(1059) 0x45738d JMP 4562a4 |
0x457392 ADD %R8,%RDI |
0x457395 JMP 457412 |
0x457397 ADD %R8,%RDI |
0x45739a JMP 4573fe |
0x45739c ADD %R8,%RDI |
0x45739f JMP 4573ea |
0x4573a1 ADD %R8,%RDI |
0x4573a4 JMP 4573d6 |
0x4573a6 ADD %R8,%RDI |
0x4573a9 JMP 4573c2 |
0x4573ab ADD %R8,%RDI |
0x4573ae VMOVSD 0x30(%RAX,%RDI,8),%XMM5 |
0x4573b4 VXORPD %XMM3,%XMM5,%XMM5 |
0x4573b8 VMULSD %XMM5,%XMM4,%XMM5 |
0x4573bc VMOVSD %XMM5,0x30(%RAX,%RDI,8) |
0x4573c2 VMOVSD 0x28(%RAX,%RDI,8),%XMM5 |
0x4573c8 VXORPD %XMM3,%XMM5,%XMM5 |
0x4573cc VMULSD %XMM5,%XMM4,%XMM5 |
0x4573d0 VMOVSD %XMM5,0x28(%RAX,%RDI,8) |
0x4573d6 VMOVSD 0x20(%RAX,%RDI,8),%XMM5 |
0x4573dc VXORPD %XMM3,%XMM5,%XMM5 |
0x4573e0 VMULSD %XMM5,%XMM4,%XMM5 |
0x4573e4 VMOVSD %XMM5,0x20(%RAX,%RDI,8) |
0x4573ea VMOVSD 0x18(%RAX,%RDI,8),%XMM5 |
0x4573f0 VXORPD %XMM3,%XMM5,%XMM5 |
0x4573f4 VMULSD %XMM5,%XMM4,%XMM5 |
0x4573f8 VMOVSD %XMM5,0x18(%RAX,%RDI,8) |
0x4573fe VMOVSD 0x10(%RAX,%RDI,8),%XMM5 |
0x457404 VXORPD %XMM3,%XMM5,%XMM5 |
0x457408 VMULSD %XMM5,%XMM4,%XMM5 |
0x45740c VMOVSD %XMM5,0x10(%RAX,%RDI,8) |
0x457412 VMOVSD 0x8(%RAX,%RDI,8),%XMM5 |
0x457418 VXORPD %XMM3,%XMM5,%XMM5 |
0x45741c VMULSD %XMM5,%XMM4,%XMM5 |
0x457420 VMOVSD %XMM5,0x8(%RAX,%RDI,8) |
0x457426 VMOVSD (%RAX,%RDI,8),%XMM5 |
0x45742b VXORPD %XMM3,%XMM5,%XMM5 |
0x45742f VMULSD %XMM5,%XMM4,%XMM5 |
0x457433 VMOVSD %XMM5,(%RAX,%RDI,8) |
(1060) 0x457438 MOV -0x40(%RBP),%RDI |
(1060) 0x45743c SUB %RDX,%RDI |
(1060) 0x45743f MOV $0x3ff0000000000000,%R8 |
(1060) 0x457449 JLE 4575d6 |
(1060) 0x45744f MOV -0x78(%RBP),%RAX |
(1060) 0x457453 MOV (%RAX),%RAX |
(1060) 0x457456 CMP $0x8,%RDI |
(1060) 0x45745a JB 45750b |
(1060) 0x457460 MOV %RDI,%RCX |
(1060) 0x457463 SHR $0x3,%RCX |
(1060) 0x457467 LEA (%RAX,%RDX,8),%RSI |
(1060) 0x45746b ADD $0x38,%RSI |
(1060) 0x45746f NOP |
(1061) 0x457470 VMOVSD -0x38(%RSI),%XMM5 |
(1061) 0x457475 VMOVSD -0x30(%RSI),%XMM6 |
(1061) 0x45747a VMOVSD -0x28(%RSI),%XMM7 |
(1061) 0x45747f VMOVSD -0x20(%RSI),%XMM8 |
(1061) 0x457484 VXORPD %XMM1,%XMM5,%XMM5 |
(1061) 0x457488 VMULSD %XMM5,%XMM4,%XMM5 |
(1061) 0x45748c VMOVSD %XMM5,-0x38(%RSI) |
(1061) 0x457491 VXORPD %XMM1,%XMM6,%XMM5 |
(1061) 0x457495 VMULSD %XMM5,%XMM4,%XMM5 |
(1061) 0x457499 VMOVSD %XMM5,-0x30(%RSI) |
(1061) 0x45749e VXORPD %XMM1,%XMM7,%XMM5 |
(1061) 0x4574a2 VMULSD %XMM5,%XMM4,%XMM5 |
(1061) 0x4574a6 VMOVSD %XMM5,-0x28(%RSI) |
(1061) 0x4574ab VXORPD %XMM1,%XMM8,%XMM5 |
(1061) 0x4574af VMULSD %XMM5,%XMM4,%XMM5 |
(1061) 0x4574b3 VMOVSD %XMM5,-0x20(%RSI) |
(1061) 0x4574b8 VMOVSD -0x18(%RSI),%XMM5 |
(1061) 0x4574bd VXORPD %XMM1,%XMM5,%XMM5 |
(1061) 0x4574c1 VMULSD %XMM5,%XMM4,%XMM5 |
(1061) 0x4574c5 VMOVSD %XMM5,-0x18(%RSI) |
(1061) 0x4574ca VMOVSD -0x10(%RSI),%XMM5 |
(1061) 0x4574cf VXORPD %XMM1,%XMM5,%XMM5 |
(1061) 0x4574d3 VMULSD %XMM5,%XMM4,%XMM5 |
(1061) 0x4574d7 VMOVSD %XMM5,-0x10(%RSI) |
(1061) 0x4574dc VMOVSD -0x8(%RSI),%XMM5 |
(1061) 0x4574e1 VXORPD %XMM1,%XMM5,%XMM5 |
(1061) 0x4574e5 VMULSD %XMM5,%XMM4,%XMM5 |
(1061) 0x4574e9 VMOVSD %XMM5,-0x8(%RSI) |
(1061) 0x4574ee VMOVSD (%RSI),%XMM5 |
(1061) 0x4574f2 VXORPD %XMM1,%XMM5,%XMM5 |
(1061) 0x4574f6 VMULSD %XMM5,%XMM4,%XMM5 |
(1061) 0x4574fa VMOVSD %XMM5,(%RSI) |
(1061) 0x4574fe ADD $0x40,%RSI |
(1061) 0x457502 DEC %RCX |
(1061) 0x457505 JNE 457470 |
(1060) 0x45750b MOV %EDI,%ECX |
(1060) 0x45750d AND $0x7,%ECX |
(1060) 0x457510 DEC %RCX |
(1060) 0x457513 CMP $0x6,%RCX |
(1060) 0x457517 JA 4575d6 |
0x45751d AND $-0x8,%RDI |
0x457521 JMP 0x5179e8(,%RCX,8) |
0x457528 ADD %RDI,%RDX |
0x45752b JMP 4575c4 |
0x457530 ADD %RDI,%RDX |
0x457533 JMP 4575b0 |
0x457535 ADD %RDI,%RDX |
0x457538 JMP 45759c |
0x45753a ADD %RDI,%RDX |
0x45753d JMP 457588 |
0x45753f ADD %RDI,%RDX |
0x457542 JMP 457574 |
0x457544 ADD %RDI,%RDX |
0x457547 JMP 457560 |
0x457549 ADD %RDI,%RDX |
0x45754c VMOVSD 0x30(%RAX,%RDX,8),%XMM5 |
0x457552 VXORPD %XMM3,%XMM5,%XMM5 |
0x457556 VMULSD %XMM5,%XMM4,%XMM5 |
0x45755a VMOVSD %XMM5,0x30(%RAX,%RDX,8) |
0x457560 VMOVSD 0x28(%RAX,%RDX,8),%XMM5 |
0x457566 VXORPD %XMM3,%XMM5,%XMM5 |
0x45756a VMULSD %XMM5,%XMM4,%XMM5 |
0x45756e VMOVSD %XMM5,0x28(%RAX,%RDX,8) |
0x457574 VMOVSD 0x20(%RAX,%RDX,8),%XMM5 |
0x45757a VXORPD %XMM3,%XMM5,%XMM5 |
0x45757e VMULSD %XMM5,%XMM4,%XMM5 |
0x457582 VMOVSD %XMM5,0x20(%RAX,%RDX,8) |
0x457588 VMOVSD 0x18(%RAX,%RDX,8),%XMM5 |
0x45758e VXORPD %XMM3,%XMM5,%XMM5 |
0x457592 VMULSD %XMM5,%XMM4,%XMM5 |
0x457596 VMOVSD %XMM5,0x18(%RAX,%RDX,8) |
0x45759c VMOVSD 0x10(%RAX,%RDX,8),%XMM5 |
0x4575a2 VXORPD %XMM3,%XMM5,%XMM5 |
0x4575a6 VMULSD %XMM5,%XMM4,%XMM5 |
0x4575aa VMOVSD %XMM5,0x10(%RAX,%RDX,8) |
0x4575b0 VMOVSD 0x8(%RAX,%RDX,8),%XMM5 |
0x4575b6 VXORPD %XMM3,%XMM5,%XMM5 |
0x4575ba VMULSD %XMM5,%XMM4,%XMM5 |
0x4575be VMOVSD %XMM5,0x8(%RAX,%RDX,8) |
0x4575c4 VMOVSD (%RAX,%RDX,8),%XMM5 |
0x4575c9 VXORPD %XMM3,%XMM5,%XMM5 |
0x4575cd VMULSD %XMM5,%XMM4,%XMM4 |
0x4575d1 VMOVSD %XMM4,(%RAX,%RDX,8) |
(1060) 0x4575d6 MOV -0x48(%RBP),%RDX |
(1060) 0x4575da JMP 4562a4 |
0x4575df ADD $0x1b8,%RSP |
0x4575e6 POP %RBX |
0x4575e7 POP %R12 |
0x4575e9 POP %R13 |
0x4575eb POP %R14 |
0x4575ed POP %R15 |
0x4575ef POP %RBP |
0x4575f0 RET |
0x4575f1 MOV -0x170(%RBP),%RAX |
0x4575f8 MOV (%RAX),%RSI |
0x4575fb MOV -0xd8(%RBP),%RAX |
0x457602 MOV (%RAX),%RCX |
0x457605 MOV -0x168(%RBP),%RDI |
0x45760c MOV -0x70(%RBP),%RDX |
0x457610 MOV -0x178(%RBP),%R8 |
0x457617 CALL 4ba8c0 <hypre_alt_insert_new_nodes> |
0x45761c MOV -0xd8(%RBP),%RCX |
0x457623 CMPQ $0,(%RCX) |
0x457627 JG 4561d7 |
0x45762d JMP 4561f0 |
0x457632 NOPW %CS:(%RAX,%RAX,1) |
Path / |
Source file and lines | par_lr_interp.c:1196-1757 |
Module | exec |
nb instructions | 741 |
nb uops | 802 |
loop length | 3478 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 6 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 96 |
ADD-SUB / MUL ratio | 0.07 |
micro-operation queue | 133.67 cycles |
front end | 133.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 58.10 | 58.00 | 82.67 | 82.67 | 73.50 | 58.00 | 57.90 | 73.50 | 73.50 | 73.50 | 58.00 | 82.67 |
cycles | 58.10 | 58.00 | 82.67 | 82.67 | 73.50 | 58.00 | 57.90 | 73.50 | 73.50 | 73.50 | 58.00 | 82.67 |
Cycles executing div or sqrt instructions | 16.00 |
FE+BE cycles | 142.73-143.24 |
Stall cycles | 0.99-1.51 |
LM full (events) | 1.49-2.01 |
Front-end | 133.67 |
Dispatch | 82.67 |
DIV/SQRT | 16.00 |
Overall L1 | 133.67 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 24% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 6% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 17% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 15% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 13% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 9% |
other | 14% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x1b8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,-0x1b8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0x188(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x190(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDI,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x170(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x170(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x168(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x1b0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x150(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x148(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x158(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x140(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x130(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x1a0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x128(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x140(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x120(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x118(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x178(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x110(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x108(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x148(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x100(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x1d8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xf8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xf0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x1d0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x1c8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x1c0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x138(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x90(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x150(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x80(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x120(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x160(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x198(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x1a8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x168(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R12,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV %RAX,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 4554e2 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2a2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4f7e60 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
TEST %R12,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 45549e <hypre_BoomerAMGBuildExtPIInterp.extracted+0x25e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA (,%R12,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 5011c0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xd8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 4554ea <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2aa> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4f7e60 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xd8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMPQ $0,(%RCX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 4554ea <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2aa> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4554ea <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2aa> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV (%RAX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 4554ad <hypre_BoomerAMGBuildExtPIInterp.extracted+0x26d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CALL 4f9c90 <hypre_GetThreadNum> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 4f9c80 <hypre_NumActiveThreads> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R12,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
OR %RSI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x20,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
JE 455514 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2d4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R12,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %RSI | 5 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 10 |
JMP 45551b <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2db> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %R12D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
DIV %ESI | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R15,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x98(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RCX,%R13 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA -0x1(%RSI),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x1(%RCX),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0x180(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %RAX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RDI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDI,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RDI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMOVE %R12,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R13,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JG 455695 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x455> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R15D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDI,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x749f90,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410130 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xe0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,(%RCX,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x48(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R15,(%RCX,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x98(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x158(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,(%RAX,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xc0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,(%RDX,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R15,(%RAX,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x749fb0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410130 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xc0(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R15,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMPQ $0,-0x98(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xf0(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 455b53 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x913> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x1,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 455b53 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x913> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xe8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R11,%RDX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R12,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETAE %DIL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (%R12,%RDX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R11,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETAE %R8B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %R10,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %AL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (%R10,%RDX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R11,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %SIL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %R10,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %CL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %R12,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %DL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
TEST %R8B,%DIL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 455a12 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x7d2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
OR %SIL,%AL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 455a12 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x7d2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
OR %DL,%CL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 455a12 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x7d2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R11),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R10),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP $0x2,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 455aa5 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x865> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 455b05 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x8c5> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XOR %R15D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R13,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4556d7 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x497> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R12,%R9,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R11,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETA %DIL | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
LEA (%R11,%R9,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R12,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETA %R8B | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
LEA (%R10,%R9,8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R11,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETA %CL | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
CMP %R10,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETA %SIL | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
CMP %R12,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETA %AL | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
CMP %R10,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETA %DL | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
TEST %R8B,%DIL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 455b1f <hypre_BoomerAMGBuildExtPIInterp.extracted+0x8df> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
AND %SIL,%CL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JNE 455b1f <hypre_BoomerAMGBuildExtPIInterp.extracted+0x8df> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
AND %DL,%AL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JNE 455b1f <hypre_BoomerAMGBuildExtPIInterp.extracted+0x8df> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R11),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R10),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x1,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xf0(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 455b53 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x913> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0xe8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
AND $-0x2,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
TESTB $0x1,-0xe8(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 2 | 0.33 |
JE 455b53 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x913> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RDX,0x8(%R11,%RSI,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %RCX,0x8(%R12,%RSI,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %RAX,0x8(%R10,%RSI,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
JMP 455b53 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x913> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xf0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x749fd0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410130 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,-0x98(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xe0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JLE 455f46 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xd06> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R13,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 455f46 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xd06> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RAX,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RCX,%RDX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%RDX,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x98(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xc0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x8(%RSI,%RDX,8),%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0xb8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RDI,%RDX,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $-0x8,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%RCX,%R13,8),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x8,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R12,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETAEB -0x58(%RBP) | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RSI,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETAE %CL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (%RAX,%R13,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x8,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RAX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %R15B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %RSI,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETBB -0xc0(%RBP) | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RAX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %R10B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %R12,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETBB -0xb8(%RBP) | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RDI,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %R9B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %R12,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%RDX),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SETB %R12B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %R8B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %RDI,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x1(%R13),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SETB %R11B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
TEST %CL,-0x58(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 2 | 0.33 |
MOV %RDX,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JNE 455d05 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xac5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
OR -0xc0(%RBP),%R15B | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1-2 | 0.33 |
JE 455d05 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xac5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
OR -0xb8(%RBP),%R10B | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1-2 | 0.33 |
JE 455d05 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xac5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
OR %R12B,%R9B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 455d05 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xac5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
OR %R11B,%R8B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 455d05 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xac5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%RSI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDI),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xf0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP $0x4,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JB 455ccf <hypre_BoomerAMGBuildExtPIInterp.extracted+0xa8f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RCX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%R8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x180(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL -0x98(%RBP),%RAX | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
LEA 0x20(,%RAX,8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RCX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
AND $0x3,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP $0x1,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x70(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xe0(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x158(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 455d62 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xb22> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x3,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 455d4a <hypre_BoomerAMGBuildExtPIInterp.extracted+0xb0a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x2,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 455d71 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xb31> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA (%R8,%R13,1),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 455d58 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xb18> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %R13,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x70(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xe0(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x158(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 455d71 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xb31> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
LEA (%R8,%R13,1),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RSI,0x18(%R10,%RCX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %RDI,0x18(%RDX,%RCX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %RSI,0x10(%R10,%RCX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %RDI,0x10(%RDX,%RCX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD -0xe8(%RBP),%R8 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
ADD %RSI,(%R10,%R8,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %RDI,(%RDX,%R8,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
LEA (%R9,%R11,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $-0x8,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x40(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R12,%RCX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 455dbe <hypre_BoomerAMGBuildExtPIInterp.extracted+0xb7e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA (%R9,%R13,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 455dbe <hypre_BoomerAMGBuildExtPIInterp.extracted+0xb7e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R13,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 455dac <hypre_BoomerAMGBuildExtPIInterp.extracted+0xb6c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xf0(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP $0x8,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 455df9 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xbb9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R8D,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $0x7,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
DEC %RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP $0x6,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JA 455f46 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xd06> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
AND $-0x8,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV -0xe8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 0x517908(,%RCX,8) | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 |
LEA (%R8,%R13,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 455f0e <hypre_BoomerAMGBuildExtPIInterp.extracted+0xcce> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV %R8,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x3,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x180(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL -0x98(%RBP),%RAX | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
LEA (%R9,%RAX,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x38,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 455e29 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xbe9> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R8,%R13,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 455efc <hypre_BoomerAMGBuildExtPIInterp.extracted+0xcbc> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
LEA (%R8,%R13,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 455eea <hypre_BoomerAMGBuildExtPIInterp.extracted+0xcaa> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
LEA (%R8,%R13,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 455ed8 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xc98> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
LEA (%R8,%R13,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x30(%R9,%RSI,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RCX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 455ed8 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xc98> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD (%RDX),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RCX,0x30(%R9,%RSI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%R9,%RSI,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RCX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 455eea <hypre_BoomerAMGBuildExtPIInterp.extracted+0xcaa> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD (%RDX),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RCX,0x28(%R9,%RSI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%R9,%RSI,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RCX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 455efc <hypre_BoomerAMGBuildExtPIInterp.extracted+0xcbc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD (%RDX),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RCX,0x20(%R9,%RSI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%R9,%RSI,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RCX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 455f0e <hypre_BoomerAMGBuildExtPIInterp.extracted+0xcce> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD (%RDX),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RCX,0x18(%R9,%RSI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R9,%RSI,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RCX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 455f20 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xce0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD (%RDX),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RCX,0x10(%R9,%RSI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV (%R9,%RAX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RCX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 455f33 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xcf3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD (%RDX),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RCX,(%R9,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R13,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV (%R9,%R8,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RCX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 455f46 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xd06> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD (%RDX),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RCX,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x749ff0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410130 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,-0x98(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 4561a4 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xf64> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x4,-0x1b8(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 455fb6 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xd76> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CALL 4f9d20 <time_getWallclockSeconds> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x1b0(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VSUBSD (%R12),%XMM0,%XMM0 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
MOV -0x1a8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x517efc,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4f8030 <hypre_printf> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 4102c0 <fflush@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CALL 4f9d20 <time_getWallclockSeconds> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x50(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD %XMM0,(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xf8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x1c0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x1c8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 45601a <hypre_BoomerAMGBuildExtPIInterp.extracted+0xdda> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 4f7e60 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x138(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x40(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 4f7e60 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x50(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xa8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R12,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 45604e <hypre_BoomerAMGBuildExtPIInterp.extracted+0xe0e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4f7e60 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x130(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4f7e60 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x50(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0x2,(%RAX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 4561a4 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xf64> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xf8(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R12,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 4575f1 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x23b1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R12,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x3,%R15 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
CMP $0x8,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 4560b8 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xe78> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x38,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R15,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R12,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x8,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
AND $0x7,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
DEC %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP $0x6,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xd8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JA 456101 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xec1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x70(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 0x517940(,%R12,8) | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 |
ADD %RDX,0x30(%RCX,%RSI,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %RDX,0x28(%RCX,%RSI,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %RDX,0x20(%RCX,%RSI,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %RDX,0x18(%RCX,%RSI,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %RDX,0x10(%RCX,%RSI,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %RDX,0x8(%RCX,%RSI,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %RDX,(%RCX,%RSI,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV %RSI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x170(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x168(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x178(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 4ba8c0 <hypre_alt_insert_new_nodes> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x50(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0x8,-0xf8(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JB 456168 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xf28> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x38,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP $0x6,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x30(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JA 4561a4 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xf64> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x40(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 0x517978(,%R12,8) | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 |
SUB %RCX,0x30(%RAX,%RDX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
SUB %RCX,0x28(%RAX,%RDX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
SUB %RCX,0x20(%RAX,%RDX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
SUB %RCX,0x18(%RAX,%RDX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
SUB %RCX,0x10(%RAX,%RDX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
SUB %RCX,0x8(%RAX,%RDX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
SUB %RCX,(%RAX,%RDX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
CMPQ $0,-0xf8(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 4561ca <hypre_BoomerAMGBuildExtPIInterp.extracted+0xf8a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xf8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (,%RAX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 5011c0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xd8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0,(%RCX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 4561f0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xfb0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x74a010,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410130 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMP %R13,-0xe0(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JG 456250 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1010> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0,-0xf8(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 456226 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xfe6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4f7f50 <hypre_Free> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xd8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0,(%RAX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 4575df <hypre_BoomerAMGBuildExtPIInterp.extracted+0x239f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD $0x1b8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP 4f7f50 <hypre_Free> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOVQ $-0x2,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x3ff0000000000000,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 |
VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVDDUP 0xbbd72(%RIP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0xb9b5a(%RIP),%XMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDDUP 0xbbd62(%RIP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4562b8 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1078> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $-0x8,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JMP 0x5179b0(,%RCX,8) | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 |
ADD %R8,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 457426 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x21e6> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %R8,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 457412 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x21d2> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %R8,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4573fe <hypre_BoomerAMGBuildExtPIInterp.extracted+0x21be> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %R8,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4573ea <hypre_BoomerAMGBuildExtPIInterp.extracted+0x21aa> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %R8,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4573d6 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2196> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %R8,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4573c2 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2182> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %R8,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD 0x30(%RAX,%RDI,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM3,%XMM5,%XMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMULSD %XMM5,%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,0x30(%RAX,%RDI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0x28(%RAX,%RDI,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM3,%XMM5,%XMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMULSD %XMM5,%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,0x28(%RAX,%RDI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0x20(%RAX,%RDI,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM3,%XMM5,%XMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMULSD %XMM5,%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,0x20(%RAX,%RDI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0x18(%RAX,%RDI,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM3,%XMM5,%XMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMULSD %XMM5,%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,0x18(%RAX,%RDI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0x10(%RAX,%RDI,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM3,%XMM5,%XMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMULSD %XMM5,%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,0x10(%RAX,%RDI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0x8(%RAX,%RDI,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM3,%XMM5,%XMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMULSD %XMM5,%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,0x8(%RAX,%RDI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD (%RAX,%RDI,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM3,%XMM5,%XMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMULSD %XMM5,%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,(%RAX,%RDI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
AND $-0x8,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JMP 0x5179e8(,%RCX,8) | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 |
ADD %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4575c4 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2384> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4575b0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2370> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 45759c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x235c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 457588 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2348> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 457574 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2334> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 457560 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2320> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD 0x30(%RAX,%RDX,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM3,%XMM5,%XMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMULSD %XMM5,%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,0x30(%RAX,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0x28(%RAX,%RDX,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM3,%XMM5,%XMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMULSD %XMM5,%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,0x28(%RAX,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0x20(%RAX,%RDX,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM3,%XMM5,%XMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMULSD %XMM5,%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,0x20(%RAX,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0x18(%RAX,%RDX,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM3,%XMM5,%XMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMULSD %XMM5,%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,0x18(%RAX,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0x10(%RAX,%RDX,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM3,%XMM5,%XMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMULSD %XMM5,%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,0x10(%RAX,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0x8(%RAX,%RDX,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM3,%XMM5,%XMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMULSD %XMM5,%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,0x8(%RAX,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD (%RAX,%RDX,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM3,%XMM5,%XMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMULSD %XMM5,%XMM4,%XMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM4,(%RAX,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD $0x1b8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV -0x170(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xd8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x168(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x178(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 4ba8c0 <hypre_alt_insert_new_nodes> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xd8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0,(%RCX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JG 4561d7 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xf97> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 4561f0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xfb0> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | par_lr_interp.c:1196-1757 |
Module | exec |
nb instructions | 741 |
nb uops | 802 |
loop length | 3478 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 6 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 96 |
ADD-SUB / MUL ratio | 0.07 |
micro-operation queue | 133.67 cycles |
front end | 133.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 58.10 | 58.00 | 82.67 | 82.67 | 73.50 | 58.00 | 57.90 | 73.50 | 73.50 | 73.50 | 58.00 | 82.67 |
cycles | 58.10 | 58.00 | 82.67 | 82.67 | 73.50 | 58.00 | 57.90 | 73.50 | 73.50 | 73.50 | 58.00 | 82.67 |
Cycles executing div or sqrt instructions | 16.00 |
FE+BE cycles | 142.73-143.24 |
Stall cycles | 0.99-1.51 |
LM full (events) | 1.49-2.01 |
Front-end | 133.67 |
Dispatch | 82.67 |
DIV/SQRT | 16.00 |
Overall L1 | 133.67 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 24% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 6% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 17% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 15% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 13% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 9% |
other | 14% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x1b8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,-0x1b8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0x188(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x190(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDI,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x170(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x170(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x168(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x1b0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x150(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x148(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x158(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x140(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x130(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x1a0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x128(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x140(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x120(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x118(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x178(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x110(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x108(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x148(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x100(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x1d8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xf8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xf0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x1d0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x1c8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x1c0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x138(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x90(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x150(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x80(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x120(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x160(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x198(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x1a8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x168(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R12,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV %RAX,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 4554e2 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2a2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4f7e60 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
TEST %R12,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 45549e <hypre_BoomerAMGBuildExtPIInterp.extracted+0x25e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA (,%R12,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 5011c0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xd8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 4554ea <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2aa> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4f7e60 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xd8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMPQ $0,(%RCX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 4554ea <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2aa> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4554ea <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2aa> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV (%RAX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 4554ad <hypre_BoomerAMGBuildExtPIInterp.extracted+0x26d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CALL 4f9c90 <hypre_GetThreadNum> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 4f9c80 <hypre_NumActiveThreads> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R12,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
OR %RSI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x20,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
JE 455514 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2d4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R12,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %RSI | 5 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 10 |
JMP 45551b <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2db> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %R12D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
DIV %ESI | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R15,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x98(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RCX,%R13 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA -0x1(%RSI),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x1(%RCX),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0x180(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %RAX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RDI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDI,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RDI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMOVE %R12,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R13,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JG 455695 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x455> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R15D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDI,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x749f90,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410130 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xe0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,(%RCX,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x48(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R15,(%RCX,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x98(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x158(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,(%RAX,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xc0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,(%RDX,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R15,(%RAX,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x749fb0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410130 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xc0(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R15,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMPQ $0,-0x98(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xf0(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 455b53 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x913> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x1,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 455b53 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x913> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xe8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R11,%RDX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R12,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETAE %DIL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (%R12,%RDX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R11,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETAE %R8B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %R10,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %AL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (%R10,%RDX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R11,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %SIL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %R10,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %CL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %R12,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %DL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
TEST %R8B,%DIL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 455a12 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x7d2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
OR %SIL,%AL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 455a12 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x7d2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
OR %DL,%CL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 455a12 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x7d2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R11),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R10),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP $0x2,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 455aa5 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x865> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 455b05 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x8c5> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XOR %R15D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R13,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4556d7 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x497> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R12,%R9,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R11,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETA %DIL | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
LEA (%R11,%R9,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R12,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETA %R8B | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
LEA (%R10,%R9,8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R11,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETA %CL | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
CMP %R10,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETA %SIL | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
CMP %R12,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETA %AL | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
CMP %R10,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETA %DL | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
TEST %R8B,%DIL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 455b1f <hypre_BoomerAMGBuildExtPIInterp.extracted+0x8df> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
AND %SIL,%CL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JNE 455b1f <hypre_BoomerAMGBuildExtPIInterp.extracted+0x8df> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
AND %DL,%AL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JNE 455b1f <hypre_BoomerAMGBuildExtPIInterp.extracted+0x8df> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R11),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R10),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x1,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xf0(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 455b53 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x913> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0xe8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
AND $-0x2,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
TESTB $0x1,-0xe8(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 2 | 0.33 |
JE 455b53 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x913> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RDX,0x8(%R11,%RSI,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %RCX,0x8(%R12,%RSI,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %RAX,0x8(%R10,%RSI,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
JMP 455b53 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x913> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xf0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x749fd0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410130 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,-0x98(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xe0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JLE 455f46 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xd06> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R13,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 455f46 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xd06> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RAX,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RCX,%RDX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%RDX,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x98(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xc0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x8(%RSI,%RDX,8),%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0xb8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RDI,%RDX,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $-0x8,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%RCX,%R13,8),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x8,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R12,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETAEB -0x58(%RBP) | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RSI,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETAE %CL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (%RAX,%R13,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x8,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RAX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %R15B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %RSI,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETBB -0xc0(%RBP) | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RAX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %R10B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %R12,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETBB -0xb8(%RBP) | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RDI,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %R9B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %R12,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%RDX),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SETB %R12B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %R8B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %RDI,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x1(%R13),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SETB %R11B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
TEST %CL,-0x58(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 2 | 0.33 |
MOV %RDX,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JNE 455d05 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xac5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
OR -0xc0(%RBP),%R15B | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1-2 | 0.33 |
JE 455d05 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xac5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
OR -0xb8(%RBP),%R10B | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1-2 | 0.33 |
JE 455d05 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xac5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
OR %R12B,%R9B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 455d05 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xac5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
OR %R11B,%R8B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 455d05 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xac5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%RSI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDI),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xf0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP $0x4,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JB 455ccf <hypre_BoomerAMGBuildExtPIInterp.extracted+0xa8f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RCX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%R8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x180(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL -0x98(%RBP),%RAX | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
LEA 0x20(,%RAX,8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RCX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
AND $0x3,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP $0x1,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x70(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xe0(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x158(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 455d62 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xb22> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x3,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 455d4a <hypre_BoomerAMGBuildExtPIInterp.extracted+0xb0a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x2,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 455d71 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xb31> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA (%R8,%R13,1),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 455d58 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xb18> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %R13,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x70(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xe0(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x158(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 455d71 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xb31> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
LEA (%R8,%R13,1),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RSI,0x18(%R10,%RCX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %RDI,0x18(%RDX,%RCX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %RSI,0x10(%R10,%RCX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %RDI,0x10(%RDX,%RCX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD -0xe8(%RBP),%R8 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
ADD %RSI,(%R10,%R8,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %RDI,(%RDX,%R8,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
LEA (%R9,%R11,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $-0x8,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x40(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R12,%RCX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 455dbe <hypre_BoomerAMGBuildExtPIInterp.extracted+0xb7e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA (%R9,%R13,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 455dbe <hypre_BoomerAMGBuildExtPIInterp.extracted+0xb7e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R13,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 455dac <hypre_BoomerAMGBuildExtPIInterp.extracted+0xb6c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xf0(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP $0x8,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 455df9 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xbb9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R8D,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $0x7,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
DEC %RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP $0x6,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JA 455f46 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xd06> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
AND $-0x8,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV -0xe8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 0x517908(,%RCX,8) | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 |
LEA (%R8,%R13,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 455f0e <hypre_BoomerAMGBuildExtPIInterp.extracted+0xcce> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV %R8,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x3,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x180(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL -0x98(%RBP),%RAX | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
LEA (%R9,%RAX,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x38,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 455e29 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xbe9> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R8,%R13,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 455efc <hypre_BoomerAMGBuildExtPIInterp.extracted+0xcbc> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
LEA (%R8,%R13,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 455eea <hypre_BoomerAMGBuildExtPIInterp.extracted+0xcaa> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
LEA (%R8,%R13,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 455ed8 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xc98> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
LEA (%R8,%R13,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x30(%R9,%RSI,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RCX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 455ed8 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xc98> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD (%RDX),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RCX,0x30(%R9,%RSI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%R9,%RSI,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RCX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 455eea <hypre_BoomerAMGBuildExtPIInterp.extracted+0xcaa> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD (%RDX),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RCX,0x28(%R9,%RSI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%R9,%RSI,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RCX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 455efc <hypre_BoomerAMGBuildExtPIInterp.extracted+0xcbc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD (%RDX),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RCX,0x20(%R9,%RSI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%R9,%RSI,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RCX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 455f0e <hypre_BoomerAMGBuildExtPIInterp.extracted+0xcce> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD (%RDX),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RCX,0x18(%R9,%RSI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R9,%RSI,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RCX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 455f20 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xce0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD (%RDX),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RCX,0x10(%R9,%RSI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV (%R9,%RAX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RCX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 455f33 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xcf3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD (%RDX),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RCX,(%R9,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R13,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV (%R9,%R8,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RCX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 455f46 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xd06> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD (%RDX),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RCX,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x749ff0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410130 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,-0x98(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 4561a4 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xf64> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x4,-0x1b8(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 455fb6 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xd76> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CALL 4f9d20 <time_getWallclockSeconds> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x1b0(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VSUBSD (%R12),%XMM0,%XMM0 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
MOV -0x1a8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x517efc,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4f8030 <hypre_printf> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 4102c0 <fflush@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CALL 4f9d20 <time_getWallclockSeconds> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x50(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD %XMM0,(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xf8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x1c0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x1c8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 45601a <hypre_BoomerAMGBuildExtPIInterp.extracted+0xdda> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 4f7e60 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x138(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x40(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 4f7e60 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x50(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xa8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R12,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 45604e <hypre_BoomerAMGBuildExtPIInterp.extracted+0xe0e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4f7e60 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x130(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4f7e60 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x50(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0x2,(%RAX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 4561a4 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xf64> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xf8(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R12,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 4575f1 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x23b1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R12,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x3,%R15 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
CMP $0x8,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 4560b8 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xe78> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x38,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R15,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R12,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x8,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
AND $0x7,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
DEC %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP $0x6,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xd8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JA 456101 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xec1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x70(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 0x517940(,%R12,8) | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 |
ADD %RDX,0x30(%RCX,%RSI,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %RDX,0x28(%RCX,%RSI,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %RDX,0x20(%RCX,%RSI,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %RDX,0x18(%RCX,%RSI,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %RDX,0x10(%RCX,%RSI,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %RDX,0x8(%RCX,%RSI,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %RDX,(%RCX,%RSI,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV %RSI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x170(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x168(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x178(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 4ba8c0 <hypre_alt_insert_new_nodes> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x50(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0x8,-0xf8(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JB 456168 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xf28> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x38,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP $0x6,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x30(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JA 4561a4 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xf64> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x40(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 0x517978(,%R12,8) | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 |
SUB %RCX,0x30(%RAX,%RDX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
SUB %RCX,0x28(%RAX,%RDX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
SUB %RCX,0x20(%RAX,%RDX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
SUB %RCX,0x18(%RAX,%RDX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
SUB %RCX,0x10(%RAX,%RDX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
SUB %RCX,0x8(%RAX,%RDX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
SUB %RCX,(%RAX,%RDX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
CMPQ $0,-0xf8(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 4561ca <hypre_BoomerAMGBuildExtPIInterp.extracted+0xf8a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xf8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (,%RAX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 5011c0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xd8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0,(%RCX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 4561f0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xfb0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x74a010,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410130 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMP %R13,-0xe0(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JG 456250 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1010> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0,-0xf8(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 456226 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xfe6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4f7f50 <hypre_Free> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xd8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0,(%RAX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 4575df <hypre_BoomerAMGBuildExtPIInterp.extracted+0x239f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD $0x1b8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP 4f7f50 <hypre_Free> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOVQ $-0x2,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x3ff0000000000000,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 |
VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVDDUP 0xbbd72(%RIP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0xb9b5a(%RIP),%XMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDDUP 0xbbd62(%RIP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4562b8 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1078> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $-0x8,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JMP 0x5179b0(,%RCX,8) | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 |
ADD %R8,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 457426 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x21e6> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %R8,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 457412 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x21d2> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %R8,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4573fe <hypre_BoomerAMGBuildExtPIInterp.extracted+0x21be> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %R8,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4573ea <hypre_BoomerAMGBuildExtPIInterp.extracted+0x21aa> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %R8,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4573d6 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2196> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %R8,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4573c2 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2182> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %R8,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD 0x30(%RAX,%RDI,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM3,%XMM5,%XMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMULSD %XMM5,%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,0x30(%RAX,%RDI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0x28(%RAX,%RDI,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM3,%XMM5,%XMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMULSD %XMM5,%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,0x28(%RAX,%RDI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0x20(%RAX,%RDI,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM3,%XMM5,%XMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMULSD %XMM5,%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,0x20(%RAX,%RDI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0x18(%RAX,%RDI,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM3,%XMM5,%XMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMULSD %XMM5,%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,0x18(%RAX,%RDI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0x10(%RAX,%RDI,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM3,%XMM5,%XMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMULSD %XMM5,%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,0x10(%RAX,%RDI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0x8(%RAX,%RDI,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM3,%XMM5,%XMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMULSD %XMM5,%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,0x8(%RAX,%RDI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD (%RAX,%RDI,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM3,%XMM5,%XMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMULSD %XMM5,%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,(%RAX,%RDI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
AND $-0x8,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JMP 0x5179e8(,%RCX,8) | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 |
ADD %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4575c4 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2384> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4575b0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2370> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 45759c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x235c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 457588 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2348> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 457574 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2334> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 457560 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2320> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD 0x30(%RAX,%RDX,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM3,%XMM5,%XMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMULSD %XMM5,%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,0x30(%RAX,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0x28(%RAX,%RDX,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM3,%XMM5,%XMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMULSD %XMM5,%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,0x28(%RAX,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0x20(%RAX,%RDX,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM3,%XMM5,%XMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMULSD %XMM5,%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,0x20(%RAX,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0x18(%RAX,%RDX,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM3,%XMM5,%XMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMULSD %XMM5,%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,0x18(%RAX,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0x10(%RAX,%RDX,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM3,%XMM5,%XMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMULSD %XMM5,%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,0x10(%RAX,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0x8(%RAX,%RDX,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM3,%XMM5,%XMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMULSD %XMM5,%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,0x8(%RAX,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD (%RAX,%RDX,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM3,%XMM5,%XMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMULSD %XMM5,%XMM4,%XMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM4,(%RAX,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD $0x1b8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV -0x170(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xd8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x168(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x178(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 4ba8c0 <hypre_alt_insert_new_nodes> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xd8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0,(%RCX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JG 4561d7 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xf97> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 4561f0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xfb0> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼hypre_BoomerAMGBuildExtPIInterp.extracted– | 0.33 | 0.08 |
○Loop 1086 - par_lr_interp.c:1378-1382 - exec | 0 | 0 |
○Loop 1081 - par_lr_interp.c:1393-1396 - exec | 0 | 0 |
○Loop 1087 - par_lr_interp.c:1378-1382 - exec | 0 | 0 |
○Loop 1080 - par_lr_interp.c:1444-1445 - exec | 0 | 0 |
○Loop 1084 - par_lr_interp.c:1393-1396 - exec | 0 | 0 |
▼Loop 1088 - par_lr_interp.c:1244-1350 - exec– | 0 | 0 |
▼Loop 1091 - par_lr_interp.c:1264-1350 - exec– | 0.01 | 0.01 |
○Loop 1094 - par_lr_interp.c:1277-1285 - exec | 0.03 | 0.01 |
○Loop 1093 - par_lr_interp.c:1291-1303 - exec | 0 | 0 |
○Loop 1092 - par_lr_interp.c:1291-1303 - exec | 0 | 0 |
▼Loop 1089 - par_lr_interp.c:1293-1350 - exec– | 0 | 0 |
○Loop 1090 - par_lr_interp.c:1331-1350 - exec | 0 | 0.01 |
○Loop 1082 - par_lr_interp.c:1400-1403 - exec | 0 | 0 |
○Loop 1085 - par_lr_interp.c:1378-1382 - exec | 0 | 0 |
○Loop 1083 - par_lr_interp.c:1400-1403 - exec | 0 | 0 |
○Loop 1095 - par_lr_interp.c:1230-1231 - exec | 0 | 0 |
▼Loop 1060 - par_lr_interp.c:1221-1748 - exec– | 0 | 0 |
○Loop 1062 - par_lr_interp.c:1742-1743 - exec | 0 | 0 |
▼Loop 1059 - par_lr_interp.c:1221-1748 - exec– | 0 | 0 |
▼Loop 1066 - par_lr_interp.c:1221-1743 - exec– | 0.06 | 0.01 |
○Loop 1071 - par_lr_interp.c:1624-1627 - exec | 0.11 | 0.02 |
○Loop 1069 - par_lr_interp.c:1644-1650 - exec | 0.05 | 0.01 |
○Loop 1070 - par_lr_interp.c:1632-1636 - exec | 0 | 0 |
○Loop 1067 - par_lr_interp.c:1655-1660 - exec | 0 | 0 |
○Loop 1068 - par_lr_interp.c:1655-1660 - exec | 0 | 0 |
▼Loop 1074 - par_lr_interp.c:1494-1545 - exec– | 0.01 | 0.01 |
○Loop 1077 - par_lr_interp.c:1516-1526 - exec | 0.04 | 0.01 |
○Loop 1076 - par_lr_interp.c:1532-1545 - exec | 0 | 0 |
○Loop 1075 - par_lr_interp.c:1532-1545 - exec | 0 | 0 |
▼Loop 1063 - par_lr_interp.c:1635-1736 - exec– | 0 | 0 |
○Loop 1064 - par_lr_interp.c:1707-1724 - exec | 0 | 0 |
○Loop 1065 - par_lr_interp.c:1688-1723 - exec | 0 | 0 |
▼Loop 1072 - par_lr_interp.c:1534-1596 - exec– | 0 | 0 |
○Loop 1073 - par_lr_interp.c:1573-1596 - exec | 0 | 0 |
○Loop 1061 - par_lr_interp.c:1744-1745 - exec | 0 | 0 |
○Loop 1078 - par_lr_interp.c:1458-1459 - exec | 0 | 0 |
○Loop 1079 - par_lr_interp.c:1451-1452 - exec | 0 | 0 |