Loop Id: 868 | Module: exec | Source: par_multi_interp.c:646-661 | Coverage: 0.01% |
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Loop Id: 868 | Module: exec | Source: par_multi_interp.c:646-661 | Coverage: 0.01% |
---|
0x43db10 INC %RAX |
0x43db13 MOV 0xb0(%RSP),%RCX |
0x43db1b CMP 0x10(%RCX),%RAX |
0x43db1f JGE 43dc0b |
0x43db25 MOV 0x108(%RSP),%RCX |
0x43db2d MOV (%RCX,%RAX,8),%RCX |
0x43db31 MOV 0x198(%RSP),%RDX |
0x43db39 MOV %R14,(%RDX,%RCX,8) |
0x43db3d MOV 0x190(%RSP),%RDX |
0x43db45 MOV %R11,(%RDX,%RCX,8) |
0x43db49 MOV 0x188(%RSP),%RSI |
0x43db51 MOV (%RSI,%RCX,8),%RDX |
0x43db55 MOV 0x8(%RSI,%RCX,8),%RSI |
0x43db5a JMP 43db63 |
(870) 0x43db60 INC %RDX |
(870) 0x43db63 CMP %RSI,%RDX |
(870) 0x43db66 JGE 43dbb0 |
(870) 0x43db68 MOV (%R9,%RDX,8),%RDI |
(870) 0x43db6c CMPQ $0x1,(%R8,%RDI,8) |
(870) 0x43db71 JNE 43db60 |
(870) 0x43db73 MOV 0x1e0(%RSP),%RSI |
(870) 0x43db7b MOV (%RSI,%RDI,8),%RSI |
(870) 0x43db7f MOV 0x150(%RSP),%RDI |
(870) 0x43db87 MOV 0x8(%RDI),%RDI |
(870) 0x43db8b MOV %RSI,(%RDI,%R14,8) |
(870) 0x43db8f INC %R14 |
(870) 0x43db92 MOV 0x188(%RSP),%RSI |
(870) 0x43db9a MOV 0x8(%RSI,%RCX,8),%RSI |
(870) 0x43db9f JMP 43db60 |
0x43dbb0 MOV (%R10,%RCX,8),%RDX |
0x43dbb4 MOV 0x8(%R10,%RCX,8),%RSI |
0x43dbb9 JMP 43dbc3 |
(869) 0x43dbc0 INC %RDX |
(869) 0x43dbc3 CMP %RSI,%RDX |
(869) 0x43dbc6 JGE 43db10 |
(869) 0x43dbcc MOV 0x180(%RSP),%RDI |
(869) 0x43dbd4 MOV (%RDI,%RDX,8),%RDI |
(869) 0x43dbd8 CMPQ $0x1,(%RBX,%RDI,8) |
(869) 0x43dbdd JNE 43dbc0 |
(869) 0x43dbdf MOV 0x1d8(%RSP),%RSI |
(869) 0x43dbe7 MOV (%RSI,%RDI,8),%RSI |
(869) 0x43dbeb MOV 0xe8(%RSP),%RDI |
(869) 0x43dbf3 MOV 0x8(%RDI),%RDI |
(869) 0x43dbf7 MOV %RSI,(%RDI,%R11,8) |
(869) 0x43dbfb INC %R11 |
(869) 0x43dbfe MOV 0x8(%R10,%RCX,8),%RSI |
(869) 0x43dc03 JMP 43dbc0 |
/scratch_na/users/xoserete/qaas_runs/171-172-8218/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 646 - 661 |
-------------------------------------------------------------------------------- |
646: for (i=pass_pointer[1]; i < pass_pointer[2]; i++) |
647: { |
648: i1 = pass_array[i]; |
649: P_diag_start[i1] = cnt_nz; |
650: P_offd_start[i1] = cnt_nz_offd; |
651: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
652: { |
653: j1 = S_diag_j[j]; |
654: if (CF_marker[j1] == 1) |
655: { P_diag_pass[1][cnt_nz++] = fine_to_coarse[j1]; } |
656: } |
657: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
658: { |
659: j1 = S_offd_j[j]; |
660: if (CF_marker_offd[j1] == 1) |
661: { P_offd_pass[1][cnt_nz_offd++] = map_S_to_new[j1]; } |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.29 |
Bottlenecks | P2, P3, P11, |
Function | hypre_BoomerAMGBuildMultipass |
Source | par_multi_interp.c:646-651,par_multi_interp.c:657-657 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 3.67 |
CQA cycles if no scalar integer | 3.67 |
CQA cycles if FP arith vectorized | 3.67 |
CQA cycles if fully vectorized | 0.46 |
Front-end cycles | 2.83 |
DIV/SQRT cycles | 0.50 |
P0 cycles | 0.40 |
P1 cycles | 3.67 |
P2 cycles | 3.67 |
P3 cycles | 1.00 |
P4 cycles | 0.40 |
P5 cycles | 0.50 |
P6 cycles | 1.00 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 0.20 |
P10 cycles | 3.67 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 4.56 |
Stall cycles (UFS) | 1.62 |
Nb insns | 17.00 |
Nb uops | 17.00 |
Nb loads | 11.00 |
Nb stores | 2.00 |
Nb stack references | 5.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 28.36 |
Bytes prefetched | 0.00 |
Bytes loaded | 88.00 |
Bytes stored | 16.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | NA |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | NA |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | NA |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.29 |
Bottlenecks | P2, P3, P11, |
Function | hypre_BoomerAMGBuildMultipass |
Source | par_multi_interp.c:646-651,par_multi_interp.c:657-657 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 3.67 |
CQA cycles if no scalar integer | 3.67 |
CQA cycles if FP arith vectorized | 3.67 |
CQA cycles if fully vectorized | 0.46 |
Front-end cycles | 2.83 |
DIV/SQRT cycles | 0.50 |
P0 cycles | 0.40 |
P1 cycles | 3.67 |
P2 cycles | 3.67 |
P3 cycles | 1.00 |
P4 cycles | 0.40 |
P5 cycles | 0.50 |
P6 cycles | 1.00 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 0.20 |
P10 cycles | 3.67 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 4.56 |
Stall cycles (UFS) | 1.62 |
Nb insns | 17.00 |
Nb uops | 17.00 |
Nb loads | 11.00 |
Nb stores | 2.00 |
Nb stack references | 5.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 28.36 |
Bytes prefetched | 0.00 |
Bytes loaded | 88.00 |
Bytes stored | 16.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | NA |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | NA |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | NA |
Path / |
Function | hypre_BoomerAMGBuildMultipass |
Source file and lines | par_multi_interp.c:646-661 |
Module | exec |
nb instructions | 17 |
nb uops | 17 |
loop length | 87 |
used x86 registers | 8 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 5 |
micro-operation queue | 2.83 cycles |
front end | 2.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 0.50 | 0.40 | 3.67 | 3.67 | 1.00 | 0.40 | 0.50 | 1.00 | 1.00 | 1.00 | 0.20 | 3.67 |
cycles | 0.50 | 0.40 | 3.67 | 3.67 | 1.00 | 0.40 | 0.50 | 1.00 | 1.00 | 1.00 | 0.20 | 3.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 4.56 |
Stall cycles | 1.62 |
LM full (events) | 3.93 |
Front-end | 2.83 |
Dispatch | 3.67 |
Overall L1 | 3.67 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | NA (no load vectorizable/vectorized instructions) |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xb0(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP 0x10(%RCX),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 43dc0b <hypre_BoomerAMGBuildMultipass+0x1a8b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x108(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RAX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x198(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,(%RDX,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x190(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,(%RDX,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x188(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI,%RCX,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RSI,%RCX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 43db63 <hypre_BoomerAMGBuildMultipass+0x19e3> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV (%R10,%RCX,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R10,%RCX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 43dbc3 <hypre_BoomerAMGBuildMultipass+0x1a43> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
Function | hypre_BoomerAMGBuildMultipass |
Source file and lines | par_multi_interp.c:646-661 |
Module | exec |
nb instructions | 17 |
nb uops | 17 |
loop length | 87 |
used x86 registers | 8 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 5 |
micro-operation queue | 2.83 cycles |
front end | 2.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 0.50 | 0.40 | 3.67 | 3.67 | 1.00 | 0.40 | 0.50 | 1.00 | 1.00 | 1.00 | 0.20 | 3.67 |
cycles | 0.50 | 0.40 | 3.67 | 3.67 | 1.00 | 0.40 | 0.50 | 1.00 | 1.00 | 1.00 | 0.20 | 3.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 4.56 |
Stall cycles | 1.62 |
LM full (events) | 3.93 |
Front-end | 2.83 |
Dispatch | 3.67 |
Overall L1 | 3.67 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | NA (no load vectorizable/vectorized instructions) |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xb0(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP 0x10(%RCX),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 43dc0b <hypre_BoomerAMGBuildMultipass+0x1a8b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x108(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RAX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x198(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,(%RDX,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x190(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,(%RDX,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x188(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI,%RCX,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RSI,%RCX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 43db63 <hypre_BoomerAMGBuildMultipass+0x19e3> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV (%R10,%RCX,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R10,%RCX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 43dbc3 <hypre_BoomerAMGBuildMultipass+0x1a43> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |