Loop Id: 3226 | Module: exec | Source: ams.c:3672-3675 | Coverage: 2.88% |
---|
Loop Id: 3226 | Module: exec | Source: ams.c:3672-3675 | Coverage: 2.88% |
---|
0x4aa830 MOV (%R12,%R8,8),%RAX [1] |
0x4aa834 VMOVSD (%R13,%RAX,8),%XMM3 [2] |
0x4aa83b VFNMADD231SD (%R15,%R8,8),%XMM3,%XMM2 [3] |
0x4aa841 INC %R8 |
0x4aa844 CMP %R8,%RDI |
0x4aa847 JNE 4aa830 |
/scratch_na/users/xoserete/qaas_runs/171-172-8218/intel/AMG/build/AMG/AMG/parcsr_ls/ams.c: 3672 - 3675 |
-------------------------------------------------------------------------------- |
3672: for (jj = A_diag_i[i]; jj < A_diag_i[i+1]; jj++) |
3673: { |
3674: ii = A_diag_j[jj]; |
3675: res -= A_diag_data[jj] * Vtemp_data[ii]; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 2.91 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 4.00 |
Bottlenecks | |
Function | hypre_ParCSRRelaxThreads.extracted.57 |
Source | ams.c:3672-3675 |
Source loop unroll info | unrolled by 4 |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | peel/tail |
Unroll factor | 1 |
CQA cycles | 4.00 |
CQA cycles if no scalar integer | 4.00 |
CQA cycles if FP arith vectorized | 1.38 |
CQA cycles if fully vectorized | 0.50 |
Front-end cycles | 1.00 |
DIV/SQRT cycles | 1.00 |
P0 cycles | 0.50 |
P1 cycles | 1.00 |
P2 cycles | 1.00 |
P3 cycles | 0.00 |
P4 cycles | 0.00 |
P5 cycles | 0.50 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 0.00 |
P10 cycles | 1.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 4 |
FE+BE cycles (UFS) | 4.15 |
Stall cycles (UFS) | 2.52 |
Nb insns | 6.00 |
Nb uops | 5.00 |
Nb loads | 3.00 |
Nb stores | 0.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.50 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 1.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 6.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 24.00 |
Bytes stored | 0.00 |
Stride 0 | 0.00 |
Stride 1 | 2.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 1.00 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | 12.50 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | NA |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 2.91 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 4.00 |
Bottlenecks | |
Function | hypre_ParCSRRelaxThreads.extracted.57 |
Source | ams.c:3672-3675 |
Source loop unroll info | unrolled by 4 |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | peel/tail |
Unroll factor | 1 |
CQA cycles | 4.00 |
CQA cycles if no scalar integer | 4.00 |
CQA cycles if FP arith vectorized | 1.38 |
CQA cycles if fully vectorized | 0.50 |
Front-end cycles | 1.00 |
DIV/SQRT cycles | 1.00 |
P0 cycles | 0.50 |
P1 cycles | 1.00 |
P2 cycles | 1.00 |
P3 cycles | 0.00 |
P4 cycles | 0.00 |
P5 cycles | 0.50 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 0.00 |
P10 cycles | 1.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 4 |
FE+BE cycles (UFS) | 4.15 |
Stall cycles (UFS) | 2.52 |
Nb insns | 6.00 |
Nb uops | 5.00 |
Nb loads | 3.00 |
Nb stores | 0.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.50 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 1.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 6.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 24.00 |
Bytes stored | 0.00 |
Stride 0 | 0.00 |
Stride 1 | 2.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 1.00 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | 12.50 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | NA |
Path / |
Function | hypre_ParCSRRelaxThreads.extracted.57 |
Source file and lines | ams.c:3672-3675 |
Module | exec |
nb instructions | 6 |
nb uops | 5 |
loop length | 25 |
used x86 registers | 6 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 1.00 cycles |
front end | 1.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.00 | 0.50 | 1.00 | 1.00 | 0.00 | 0.00 | 0.50 | 0.00 | 0.00 | 0.00 | 0.00 | 1.00 |
cycles | 1.00 | 0.50 | 1.00 | 1.00 | 0.00 | 0.00 | 0.50 | 0.00 | 0.00 | 0.00 | 0.00 | 1.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 4.00 |
FE+BE cycles | 4.15 |
Stall cycles | 2.52 |
LB full (events) | 2.42 |
LM full (events) | 0.23 |
Front-end | 1.00 |
Dispatch | 1.00 |
Data deps. | 4.00 |
Overall L1 | 4.00 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV (%R12,%R8,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%R13,%RAX,8),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFNMADD231SD (%R15,%R8,8),%XMM3,%XMM2 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
INC %R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R8,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 4aa830 <hypre_ParCSRRelaxThreads.extracted.57+0x1d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
Function | hypre_ParCSRRelaxThreads.extracted.57 |
Source file and lines | ams.c:3672-3675 |
Module | exec |
nb instructions | 6 |
nb uops | 5 |
loop length | 25 |
used x86 registers | 6 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 1.00 cycles |
front end | 1.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.00 | 0.50 | 1.00 | 1.00 | 0.00 | 0.00 | 0.50 | 0.00 | 0.00 | 0.00 | 0.00 | 1.00 |
cycles | 1.00 | 0.50 | 1.00 | 1.00 | 0.00 | 0.00 | 0.50 | 0.00 | 0.00 | 0.00 | 0.00 | 1.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 4.00 |
FE+BE cycles | 4.15 |
Stall cycles | 2.52 |
LB full (events) | 2.42 |
LM full (events) | 0.23 |
Front-end | 1.00 |
Dispatch | 1.00 |
Data deps. | 4.00 |
Overall L1 | 4.00 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV (%R12,%R8,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%R13,%RAX,8),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFNMADD231SD (%R15,%R8,8),%XMM3,%XMM2 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
INC %R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R8,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 4aa830 <hypre_ParCSRRelaxThreads.extracted.57+0x1d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |