Function: hypre_BoomerAMGBuildMultipass.extracted.34 | Module: exec | Source: par_multi_interp.c:891-1134 [...] | Coverage: 1.61% |
---|
Function: hypre_BoomerAMGBuildMultipass.extracted.34 | Module: exec | Source: par_multi_interp.c:891-1134 [...] | Coverage: 1.61% |
---|
/scratch_na/users/xoserete/qaas_runs/171-172-8218/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 891 - 1134 |
-------------------------------------------------------------------------------- |
891: #pragma omp parallel private(i,my_thread_num,num_threads,thread_start,thread_stop,cnt_nz,cnt_nz_offd,i1,j,j1,j_start,j_end,k1,k,P_marker,P_marker_offd) |
[...] |
900: my_thread_num = hypre_GetThreadNum(); |
901: num_threads = hypre_NumActiveThreads(); |
902: thread_start = (pass_length/num_threads)*my_thread_num; |
903: if (my_thread_num == num_threads-1) |
904: { thread_stop = pass_length; } |
905: else |
906: { thread_stop = (pass_length/num_threads)*(my_thread_num+1); } |
907: thread_start += pass_pointer[pass]; |
908: thread_stop += pass_pointer[pass]; |
[...] |
916: P_marker = hypre_CTAlloc(HYPRE_Int, n_coarse); /* marks points to see if they're counted */ |
917: for (i=0; i < n_coarse; i++) |
918: { P_marker[i] = -1; } |
919: if (new_num_cols_offd == local_index+1) |
[...] |
925: else if (n_coarse_offd) |
[...] |
939: for (i=thread_start; i < thread_stop; i++) |
940: { |
941: i1 = pass_array[i]; |
942: P_diag_start[i1] = cnt_nz; |
943: P_offd_start[i1] = cnt_nz_offd; |
944: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
945: { |
946: j1 = S_diag_j[j]; |
947: if (assigned[j1] == pass-1) |
948: { |
949: j_start = P_diag_start[j1]; |
950: j_end = j_start+P_diag_i[j1+1]; |
951: for (k=j_start; k < j_end; k++) |
952: { |
953: k1 = P_diag_pass[pass-1][k]; |
954: if (P_marker[k1] != i1) |
955: { |
956: cnt_nz++; |
957: P_diag_i[i1+1]++; |
958: P_marker[k1] = i1; |
959: } |
960: } |
961: j_start = P_offd_start[j1]; |
962: j_end = j_start+P_offd_i[j1+1]; |
963: for (k=j_start; k < j_end; k++) |
964: { |
965: k1 = P_offd_pass[pass-1][k]; |
966: if (P_marker_offd[k1] != i1) |
967: { |
968: cnt_nz_offd++; |
969: P_offd_i[i1+1]++; |
970: P_marker_offd[k1] = i1; |
[...] |
976: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
977: { |
978: j1 = S_offd_j[j]; |
979: if (assigned_offd[j1] == pass-1) |
980: { |
981: j_start = Pext_start[j1]; |
982: j_end = j_start+Pext_i[j1+1]; |
983: for (k=j_start; k < j_end; k++) |
984: { |
985: k1 = Pext_pass[pass][k]; |
986: if (k1 < 0) |
987: { |
988: if (P_marker[-k1-1] != i1) |
989: { |
990: cnt_nz++; |
991: P_diag_i[i1+1]++; |
992: P_marker[-k1-1] = i1; |
993: } |
994: } |
995: else if (P_marker_offd[k1] != i1) |
996: { |
997: cnt_nz_offd++; |
[...] |
1008: if(my_thread_num == 0) |
1009: { max_num_threads[0] = num_threads; } |
1010: cnt_nz_offd_per_thread[my_thread_num] = cnt_nz_offd; |
1011: cnt_nz_per_thread[my_thread_num] = cnt_nz; |
1012: #ifdef HYPRE_USING_OPENMP |
1013: #pragma omp barrier |
1014: #endif |
1015: if(my_thread_num == 0) |
1016: { |
1017: for(i = 1; i < max_num_threads[0]; i++) |
1018: { |
1019: cnt_nz_offd_per_thread[i] += cnt_nz_offd_per_thread[i-1]; |
1020: cnt_nz_per_thread[i] += cnt_nz_per_thread[i-1]; |
[...] |
1026: if(my_thread_num > 0) |
1027: { |
1028: /* update this thread's section of P_diag_start and P_offd_start |
1029: * with the num of nz's counted by previous threads */ |
1030: for (i=thread_start; i < thread_stop; i++) |
1031: { |
1032: i1 = pass_array[i]; |
1033: P_diag_start[i1] += cnt_nz_per_thread[my_thread_num-1]; |
1034: P_offd_start[i1] += cnt_nz_offd_per_thread[my_thread_num-1]; |
[...] |
1040: cnt_nz = cnt_nz_per_thread[max_num_threads[0]-1]; |
1041: cnt_nz_offd = cnt_nz_offd_per_thread[max_num_threads[0]-1]; |
1042: |
1043: /* Updated total nz count */ |
1044: total_nz += cnt_nz; |
1045: total_nz_offd += cnt_nz_offd; |
1046: |
1047: /* Allocate P_diag_pass and P_offd_pass for all threads */ |
1048: P_diag_pass[pass] = hypre_CTAlloc(HYPRE_Int, cnt_nz); |
1049: if (cnt_nz_offd) |
1050: P_offd_pass[pass] = hypre_CTAlloc(HYPRE_Int, cnt_nz_offd); |
1051: else if (num_procs > 1) |
[...] |
1060: if(my_thread_num > 0) |
1061: { |
1062: cnt_nz = cnt_nz_per_thread[my_thread_num-1]; |
1063: cnt_nz_offd = cnt_nz_offd_per_thread[my_thread_num-1]; |
[...] |
1072: for (i=thread_start; i < thread_stop; i++) |
1073: { |
1074: i1 = pass_array[i]; |
1075: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
1076: { |
1077: j1 = S_diag_j[j]; |
1078: if (assigned[j1] == pass-1) |
1079: { |
1080: j_start = P_diag_start[j1]; |
1081: j_end = j_start+P_diag_i[j1+1]; |
1082: for (k=j_start; k < j_end; k++) |
1083: { |
1084: k1 = P_diag_pass[pass-1][k]; |
1085: if (P_marker[k1] != -i1-1) |
1086: { |
1087: P_diag_pass[pass][cnt_nz++] = k1; |
1088: P_marker[k1] = -i1-1; |
1089: } |
1090: } |
1091: j_start = P_offd_start[j1]; |
1092: j_end = j_start+P_offd_i[j1+1]; |
1093: for (k=j_start; k < j_end; k++) |
1094: { |
1095: k1 = P_offd_pass[pass-1][k]; |
1096: if (P_marker_offd[k1] != -i1-1) |
1097: { |
1098: P_offd_pass[pass][cnt_nz_offd++] = k1; |
1099: P_marker_offd[k1] = -i1-1; |
1100: } |
1101: } |
1102: } |
1103: } |
1104: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
1105: { |
1106: j1 = S_offd_j[j]; |
1107: if (assigned_offd[j1] == pass-1) |
1108: { |
1109: j_start = Pext_start[j1]; |
1110: j_end = j_start+Pext_i[j1+1]; |
1111: for (k=j_start; k < j_end; k++) |
1112: { |
1113: k1 = Pext_pass[pass][k]; |
1114: if (k1 < 0) |
1115: { |
1116: if (P_marker[-k1-1] != -i1-1) |
1117: { |
1118: P_diag_pass[pass][cnt_nz++] = -k1-1; |
1119: P_marker[-k1-1] = -i1-1; |
1120: } |
1121: } |
1122: else if (P_marker_offd[k1] != -i1-1) |
1123: { |
1124: P_offd_pass[pass][cnt_nz_offd++] = k1; |
1125: P_marker_offd[k1] = -i1-1; |
[...] |
1132: hypre_TFree(P_marker); |
1133: if ( (n_coarse_offd) || (new_num_cols_offd == local_index+1) ) |
1134: { hypre_TFree(P_marker_offd); } |
0x445130 PUSH %RBP |
0x445131 MOV %RSP,%RBP |
0x445134 PUSH %R15 |
0x445136 PUSH %R14 |
0x445138 PUSH %R13 |
0x44513a PUSH %R12 |
0x44513c PUSH %RBX |
0x44513d SUB $0x128,%RSP |
0x445144 MOV %R9,-0x120(%RBP) |
0x44514b MOV %R8,-0xa0(%RBP) |
0x445152 MOV %RCX,-0x118(%RBP) |
0x445159 MOV %RDX,-0xa8(%RBP) |
0x445160 MOV %RDI,-0xc8(%RBP) |
0x445167 MOV 0xd0(%RBP),%RAX |
0x44516e MOV %RAX,-0x80(%RBP) |
0x445172 MOV 0xc8(%RBP),%RAX |
0x445179 MOV %RAX,-0x148(%RBP) |
0x445180 MOV 0xc0(%RBP),%RAX |
0x445187 MOV %RAX,-0xb0(%RBP) |
0x44518e MOV 0xb8(%RBP),%RBX |
0x445195 MOV 0xb0(%RBP),%RAX |
0x44519c MOV %RAX,-0xe8(%RBP) |
0x4451a3 MOV 0xa8(%RBP),%RAX |
0x4451aa MOV %RAX,-0xc0(%RBP) |
0x4451b1 MOV 0xa0(%RBP),%RAX |
0x4451b8 MOV %RAX,-0x140(%RBP) |
0x4451bf MOV 0x98(%RBP),%RAX |
0x4451c6 MOV %RAX,-0x128(%RBP) |
0x4451cd MOV 0x90(%RBP),%RAX |
0x4451d4 MOV %RAX,-0x110(%RBP) |
0x4451db MOV 0x88(%RBP),%RAX |
0x4451e2 MOV %RAX,-0x108(%RBP) |
0x4451e9 MOV 0x80(%RBP),%RAX |
0x4451f0 MOV %RAX,-0xe0(%RBP) |
0x4451f7 MOV 0x78(%RBP),%R15 |
0x4451fb MOV 0x70(%RBP),%R12 |
0x4451ff MOV 0x68(%RBP),%RAX |
0x445203 MOV %RAX,-0x138(%RBP) |
0x44520a MOV 0x60(%RBP),%RAX |
0x44520e MOV %RAX,-0x100(%RBP) |
0x445215 MOV 0x58(%RBP),%RAX |
0x445219 MOV %RAX,-0xf8(%RBP) |
0x445220 MOV 0x50(%RBP),%RAX |
0x445224 MOV %RAX,-0x60(%RBP) |
0x445228 MOV 0x48(%RBP),%RAX |
0x44522c MOV %RAX,-0x58(%RBP) |
0x445230 MOV 0x40(%RBP),%RAX |
0x445234 MOV %RAX,-0x50(%RBP) |
0x445238 MOV 0x38(%RBP),%RAX |
0x44523c MOV %RAX,-0x98(%RBP) |
0x445243 MOV 0x30(%RBP),%R13 |
0x445247 MOV 0x28(%RBP),%RAX |
0x44524b MOV %RAX,-0x90(%RBP) |
0x445252 MOV 0x20(%RBP),%RAX |
0x445256 MOV %RAX,-0xf0(%RBP) |
0x44525d MOV 0x18(%RBP),%RAX |
0x445261 MOV %RAX,-0x48(%RBP) |
0x445265 MOV 0x10(%RBP),%RAX |
0x445269 MOV %RAX,-0x40(%RBP) |
0x44526d CALL 4f9c90 <hypre_GetThreadNum> |
0x445272 MOV %RAX,-0x30(%RBP) |
0x445276 CALL 4f9c80 <hypre_NumActiveThreads> |
0x44527b MOV %RAX,%RCX |
0x44527e MOV %RBX,%RAX |
0x445281 OR %RCX,%RAX |
0x445284 SHR $0x20,%RAX |
0x445288 JE 445294 |
0x44528a MOV %RBX,%RAX |
0x44528d CQTO |
0x44528f IDIV %RCX |
0x445292 JMP 44529a |
0x445294 MOV %EBX,%EAX |
0x445296 XOR %EDX,%EDX |
0x445298 DIV %ECX |
0x44529a MOV %RCX,-0x130(%RBP) |
0x4452a1 MOV %RCX,%RDX |
0x4452a4 DEC %RDX |
0x4452a7 MOV -0x30(%RBP),%RCX |
0x4452ab LEA 0x1(%RCX),%RSI |
0x4452af MOV %RAX,%R14 |
0x4452b2 IMUL %RAX,%RSI |
0x4452b6 CMP %RDX,%RCX |
0x4452b9 CMOVE %RBX,%RSI |
0x4452bd MOV %RSI,-0xb8(%RBP) |
0x4452c4 MOV (%R12),%R12 |
0x4452c8 MOV (%R13,%R12,8),%RAX |
0x4452cd MOV %RAX,-0xd8(%RBP) |
0x4452d4 MOV $0x8,%ESI |
0x4452d9 MOV %R15,%RDI |
0x4452dc CALL 4f7e60 <hypre_CAlloc> |
0x4452e1 MOV %RAX,%RBX |
0x4452e4 TEST %R15,%R15 |
0x4452e7 JLE 4452fd |
0x4452e9 SAL $0x3,%R15 |
0x4452ed MOV %RBX,%RDI |
0x4452f0 MOV $0xff,%ESI |
0x4452f5 MOV %R15,%RDX |
0x4452f8 CALL 5011c0 <_intel_fast_memset> |
0x4452fd IMUL -0x30(%RBP),%R14 |
0x445302 MOV %R14,-0x88(%RBP) |
0x445309 MOV -0xc0(%RBP),%RAX |
0x445310 INC %RAX |
0x445313 MOV -0xe8(%RBP),%RDI |
0x44531a CMP %RDI,%RAX |
0x44531d MOV %RAX,-0xc0(%RBP) |
0x445324 JE 445332 |
0x445326 MOV -0xe0(%RBP),%RDI |
0x44532d TEST %RDI,%RDI |
0x445330 JE 44535d |
0x445332 MOV $0x8,%ESI |
0x445337 MOV %RDI,%R14 |
0x44533a CALL 4f7e60 <hypre_CAlloc> |
0x44533f MOV %RAX,%R15 |
0x445342 MOV %R14,%RDX |
0x445345 TEST %R14,%R14 |
0x445348 JLE 44535d |
0x44534a SAL $0x3,%RDX |
0x44534e MOV %R15,%RDI |
0x445351 MOV $0xff,%ESI |
0x445356 CALL 5011c0 <_intel_fast_memset> |
0x44535b JMP 44535d |
0x44535d MOV -0x88(%RBP),%RDX |
0x445364 MOV -0xd8(%RBP),%RCX |
0x44536b LEA (%RCX,%RDX,1),%RAX |
0x44536f MOV -0xb8(%RBP),%RSI |
0x445376 ADD %RSI,%RCX |
0x445379 MOV %RCX,-0xd0(%RBP) |
0x445380 CMP %RSI,%RDX |
0x445383 MOV %RAX,-0x70(%RBP) |
0x445387 JGE 445882 |
0x44538d LEA -0x1(%R12),%R10 |
0x445392 XOR %ECX,%ECX |
0x445394 MOV %RAX,%RSI |
0x445397 XOR %EAX,%EAX |
0x445399 MOV %R10,-0x68(%RBP) |
0x44539d JMP 4453b7 |
0x44539f NOP |
(802) 0x4453a0 MOV -0x150(%RBP),%RSI |
(802) 0x4453a7 INC %RSI |
(802) 0x4453aa CMP -0xd0(%RBP),%RSI |
(802) 0x4453b1 JGE 445886 |
(802) 0x4453b7 MOV -0x90(%RBP),%RDX |
(802) 0x4453be MOV %RSI,-0x150(%RBP) |
(802) 0x4453c5 MOV (%RDX,%RSI,8),%RDI |
(802) 0x4453c9 MOV -0x98(%RBP),%RDX |
(802) 0x4453d0 MOV %RAX,(%RDX,%RDI,8) |
(802) 0x4453d4 MOV -0x50(%RBP),%RDX |
(802) 0x4453d8 MOV %RCX,(%RDX,%RDI,8) |
(802) 0x4453dc MOV -0xa8(%RBP),%RDX |
(802) 0x4453e3 MOV (%RDX,%RDI,8),%R8 |
(802) 0x4453e7 JMP 4453fe |
0x4453e9 NOPL (%RAX) |
(805) 0x4453f0 MOV -0x68(%RBP),%R10 |
(805) 0x4453f4 INC %R8 |
(805) 0x4453f7 MOV -0xa8(%RBP),%RDX |
(805) 0x4453fe CMP 0x8(%RDX,%RDI,8),%R8 |
(805) 0x445403 JGE 4456d0 |
(805) 0x445409 MOV -0x118(%RBP),%RDX |
(805) 0x445410 MOV (%RDX,%R8,8),%R14 |
(805) 0x445414 MOV -0x108(%RBP),%RDX |
(805) 0x44541b CMP %R10,(%RDX,%R14,8) |
(805) 0x44541f JNE 4453f4 |
(805) 0x445421 MOV -0x40(%RBP),%RDX |
(805) 0x445425 MOV 0x8(%RDX,%R14,8),%RSI |
(805) 0x44542a TEST %RSI,%RSI |
(805) 0x44542d JLE 44557b |
(805) 0x445433 MOV -0x98(%RBP),%RDX |
(805) 0x44543a MOV %R14,-0x38(%RBP) |
(805) 0x44543e MOV (%RDX,%R14,8),%R10 |
(805) 0x445442 ADD %R10,%RSI |
(805) 0x445445 MOV -0x58(%RBP),%RDX |
(805) 0x445449 MOV -0x8(%RDX,%R12,8),%R11 |
(805) 0x44544e LEA 0x1(%R10),%RDX |
(805) 0x445452 CMP %RDX,%RSI |
(805) 0x445455 CMOVLE %RDX,%RSI |
(805) 0x445459 MOV %RSI,%RDX |
(805) 0x44545c SUB %R10,%RDX |
(805) 0x44545f CMP $0x4,%RDX |
(805) 0x445463 MOV %RDX,-0x78(%RBP) |
(805) 0x445467 JAE 4454b8 |
(805) 0x445469 MOV -0x78(%RBP),%R9 |
(805) 0x44546d MOV %R9,%RDX |
(805) 0x445470 AND $-0x4,%RDX |
(805) 0x445474 CMP %R9,%RDX |
(805) 0x445477 JAE 445577 |
(805) 0x44547d ADD %RDX,%R10 |
(805) 0x445480 MOV -0x38(%RBP),%R14 |
(805) 0x445484 JMP 44549c |
0x445486 NOPW %CS:(%RAX,%RAX,1) |
(808) 0x445490 INC %R10 |
(808) 0x445493 CMP %R10,%RSI |
(808) 0x445496 JE 44557b |
(808) 0x44549c MOV (%R11,%R10,8),%RDX |
(808) 0x4454a0 CMP %RDI,(%RBX,%RDX,8) |
(808) 0x4454a4 JE 445490 |
(808) 0x4454a6 INC %RAX |
(808) 0x4454a9 MOV -0x40(%RBP),%R9 |
(808) 0x4454ad INCQ 0x8(%R9,%RDI,8) |
(808) 0x4454b2 MOV %RDI,(%RBX,%RDX,8) |
(808) 0x4454b6 JMP 445490 |
(805) 0x4454b8 MOV %RDX,%R14 |
(805) 0x4454bb SHR $0x2,%R14 |
(805) 0x4454bf LEA (%R11,%R10,8),%R13 |
(805) 0x4454c3 ADD $0x18,%R13 |
(805) 0x4454c7 JMP 4454d9 |
0x4454c9 NOPL (%RAX) |
(809) 0x4454d0 ADD $0x20,%R13 |
(809) 0x4454d4 DEC %R14 |
(809) 0x4454d7 JE 445469 |
(809) 0x4454d9 MOV -0x18(%R13),%RDX |
(809) 0x4454dd CMP %RDI,(%RBX,%RDX,8) |
(809) 0x4454e1 JNE 445510 |
(809) 0x4454e3 MOV -0x10(%R13),%RDX |
(809) 0x4454e7 CMP %RDI,(%RBX,%RDX,8) |
(809) 0x4454eb JNE 44552a |
(809) 0x4454ed MOV -0x8(%R13),%RDX |
(809) 0x4454f1 CMP %RDI,(%RBX,%RDX,8) |
(809) 0x4454f5 JNE 445544 |
(809) 0x4454f7 MOV (%R13),%RDX |
(809) 0x4454fb CMP %RDI,(%RBX,%RDX,8) |
(809) 0x4454ff JE 4454d0 |
(809) 0x445501 JMP 445562 |
0x445503 NOPW %CS:(%RAX,%RAX,1) |
(809) 0x445510 INC %RAX |
(809) 0x445513 MOV -0x40(%RBP),%R9 |
(809) 0x445517 INCQ 0x8(%R9,%RDI,8) |
(809) 0x44551c MOV %RDI,(%RBX,%RDX,8) |
(809) 0x445520 MOV -0x10(%R13),%RDX |
(809) 0x445524 CMP %RDI,(%RBX,%RDX,8) |
(809) 0x445528 JE 4454ed |
(809) 0x44552a INC %RAX |
(809) 0x44552d MOV -0x40(%RBP),%R9 |
(809) 0x445531 INCQ 0x8(%R9,%RDI,8) |
(809) 0x445536 MOV %RDI,(%RBX,%RDX,8) |
(809) 0x44553a MOV -0x8(%R13),%RDX |
(809) 0x44553e CMP %RDI,(%RBX,%RDX,8) |
(809) 0x445542 JE 4454f7 |
(809) 0x445544 INC %RAX |
(809) 0x445547 MOV -0x40(%RBP),%R9 |
(809) 0x44554b INCQ 0x8(%R9,%RDI,8) |
(809) 0x445550 MOV %RDI,(%RBX,%RDX,8) |
(809) 0x445554 MOV (%R13),%RDX |
(809) 0x445558 CMP %RDI,(%RBX,%RDX,8) |
(809) 0x44555c JE 4454d0 |
(809) 0x445562 INC %RAX |
(809) 0x445565 MOV -0x40(%RBP),%R9 |
(809) 0x445569 INCQ 0x8(%R9,%RDI,8) |
(809) 0x44556e MOV %RDI,(%RBX,%RDX,8) |
(809) 0x445572 JMP 4454d0 |
(805) 0x445577 MOV -0x38(%RBP),%R14 |
(805) 0x44557b MOV -0x48(%RBP),%RDX |
(805) 0x44557f MOV 0x8(%RDX,%R14,8),%RSI |
(805) 0x445584 TEST %RSI,%RSI |
(805) 0x445587 JLE 4453f0 |
(805) 0x44558d MOV -0x50(%RBP),%RDX |
(805) 0x445591 MOV (%RDX,%R14,8),%R9 |
(805) 0x445595 ADD %R9,%RSI |
(805) 0x445598 MOV -0x60(%RBP),%RDX |
(805) 0x44559c MOV -0x8(%RDX,%R12,8),%R10 |
(805) 0x4455a1 LEA 0x1(%R9),%RDX |
(805) 0x4455a5 CMP %RDX,%RSI |
(805) 0x4455a8 CMOVLE %RDX,%RSI |
(805) 0x4455ac MOV %RSI,%R11 |
(805) 0x4455af SUB %R9,%R11 |
(805) 0x4455b2 CMP $0x4,%R11 |
(805) 0x4455b6 MOV %R11,-0x38(%RBP) |
(805) 0x4455ba JAE 445608 |
(805) 0x4455bc MOV -0x38(%RBP),%RDX |
(805) 0x4455c0 MOV %RDX,%R11 |
(805) 0x4455c3 AND $-0x4,%R11 |
(805) 0x4455c7 CMP %RDX,%R11 |
(805) 0x4455ca JAE 4453f0 |
(805) 0x4455d0 ADD %R11,%R9 |
(805) 0x4455d3 JMP 4455ec |
0x4455d5 NOPW %CS:(%RAX,%RAX,1) |
(806) 0x4455e0 INC %R9 |
(806) 0x4455e3 CMP %R9,%RSI |
(806) 0x4455e6 JE 4453f0 |
(806) 0x4455ec MOV (%R10,%R9,8),%RDX |
(806) 0x4455f0 CMP %RDI,(%R15,%RDX,8) |
(806) 0x4455f4 JE 4455e0 |
(806) 0x4455f6 INC %RCX |
(806) 0x4455f9 MOV -0x48(%RBP),%R11 |
(806) 0x4455fd INCQ 0x8(%R11,%RDI,8) |
(806) 0x445602 MOV %RDI,(%R15,%RDX,8) |
(806) 0x445606 JMP 4455e0 |
(805) 0x445608 SHR $0x2,%R11 |
(805) 0x44560c LEA (%R10,%R9,8),%R14 |
(805) 0x445610 ADD $0x18,%R14 |
(805) 0x445614 JMP 445629 |
0x445616 NOPW %CS:(%RAX,%RAX,1) |
(807) 0x445620 ADD $0x20,%R14 |
(807) 0x445624 DEC %R11 |
(807) 0x445627 JE 4455bc |
(807) 0x445629 MOV -0x18(%R14),%R13 |
(807) 0x44562d CMP %RDI,(%R15,%R13,8) |
(807) 0x445631 JNE 445660 |
(807) 0x445633 MOV -0x10(%R14),%R13 |
(807) 0x445637 CMP %RDI,(%R15,%R13,8) |
(807) 0x44563b JNE 44567a |
(807) 0x44563d MOV -0x8(%R14),%R13 |
(807) 0x445641 CMP %RDI,(%R15,%R13,8) |
(807) 0x445645 JNE 445694 |
(807) 0x445647 MOV (%R14),%R13 |
(807) 0x44564a CMP %RDI,(%R15,%R13,8) |
(807) 0x44564e JE 445620 |
(807) 0x445650 JMP 4456b1 |
0x445652 NOPW %CS:(%RAX,%RAX,1) |
(807) 0x445660 INC %RCX |
(807) 0x445663 MOV -0x48(%RBP),%RDX |
(807) 0x445667 INCQ 0x8(%RDX,%RDI,8) |
(807) 0x44566c MOV %RDI,(%R15,%R13,8) |
(807) 0x445670 MOV -0x10(%R14),%R13 |
(807) 0x445674 CMP %RDI,(%R15,%R13,8) |
(807) 0x445678 JE 44563d |
(807) 0x44567a INC %RCX |
(807) 0x44567d MOV -0x48(%RBP),%RDX |
(807) 0x445681 INCQ 0x8(%RDX,%RDI,8) |
(807) 0x445686 MOV %RDI,(%R15,%R13,8) |
(807) 0x44568a MOV -0x8(%R14),%R13 |
(807) 0x44568e CMP %RDI,(%R15,%R13,8) |
(807) 0x445692 JE 445647 |
(807) 0x445694 INC %RCX |
(807) 0x445697 MOV -0x48(%RBP),%RDX |
(807) 0x44569b INCQ 0x8(%RDX,%RDI,8) |
(807) 0x4456a0 MOV %RDI,(%R15,%R13,8) |
(807) 0x4456a4 MOV (%R14),%R13 |
(807) 0x4456a7 CMP %RDI,(%R15,%R13,8) |
(807) 0x4456ab JE 445620 |
(807) 0x4456b1 INC %RCX |
(807) 0x4456b4 MOV -0x48(%RBP),%RDX |
(807) 0x4456b8 INCQ 0x8(%RDX,%RDI,8) |
(807) 0x4456bd MOV %RDI,(%R15,%R13,8) |
(807) 0x4456c1 JMP 445620 |
0x4456c6 NOPW %CS:(%RAX,%RAX,1) |
(802) 0x4456d0 MOV -0xa0(%RBP),%RDX |
(802) 0x4456d7 MOV (%RDX,%RDI,8),%R8 |
(802) 0x4456db MOV 0x8(%RDX,%RDI,8),%RDX |
(802) 0x4456e0 CMP %RDX,%R8 |
(802) 0x4456e3 JL 4456fc |
(802) 0x4456e5 JMP 4453a0 |
0x4456ea NOPW (%RAX,%RAX,1) |
(803) 0x4456f0 INC %R8 |
(803) 0x4456f3 CMP %RDX,%R8 |
(803) 0x4456f6 JGE 4453a0 |
(803) 0x4456fc MOV -0x120(%RBP),%RSI |
(803) 0x445703 MOV (%RSI,%R8,8),%R9 |
(803) 0x445707 MOV -0x110(%RBP),%RSI |
(803) 0x44570e CMP %R10,(%RSI,%R9,8) |
(803) 0x445712 JNE 4456f0 |
(803) 0x445714 MOV -0x100(%RBP),%RSI |
(803) 0x44571b MOV 0x8(%RSI,%R9,8),%RSI |
(803) 0x445720 TEST %RSI,%RSI |
(803) 0x445723 JLE 4456f0 |
(803) 0x445725 MOV -0xf0(%RBP),%RDX |
(803) 0x44572c MOV (%RDX,%R9,8),%R9 |
(803) 0x445730 ADD %R9,%RSI |
(803) 0x445733 MOV -0xf8(%RBP),%RDX |
(803) 0x44573a MOV (%RDX,%R12,8),%R13 |
(803) 0x44573e LEA 0x1(%R9),%R10 |
(803) 0x445742 CMP %R10,%RSI |
(803) 0x445745 CMOVLE %R10,%RSI |
(803) 0x445749 MOV %RSI,%R11 |
(803) 0x44574c SUB %R9,%R11 |
(803) 0x44574f CMP %R10,%RSI |
(803) 0x445752 MOV %R11,-0x38(%RBP) |
(803) 0x445756 JNE 445793 |
(803) 0x445758 XOR %ESI,%ESI |
(803) 0x44575a TESTB $0x1,-0x38(%RBP) |
(803) 0x44575e MOV -0x68(%RBP),%R10 |
(803) 0x445762 JE 445865 |
(803) 0x445768 ADD %RSI,%R9 |
(803) 0x44576b MOV (%R13,%R9,8),%RDX |
(803) 0x445770 TEST %RDX,%RDX |
(803) 0x445773 JS 445849 |
(803) 0x445779 CMP %RDI,(%R15,%RDX,8) |
(803) 0x44577d JE 445865 |
(803) 0x445783 LEA (%R15,%RDX,8),%RDX |
(803) 0x445787 INC %RCX |
(803) 0x44578a MOV -0x48(%RBP),%RSI |
(803) 0x44578e JMP 44585d |
(803) 0x445793 AND $-0x2,%R11 |
(803) 0x445797 LEA 0x8(,%R9,8),%R10 |
(803) 0x44579f ADD %R13,%R10 |
(803) 0x4457a2 XOR %ESI,%ESI |
(803) 0x4457a4 MOV %R13,%RDX |
(803) 0x4457a7 JMP 4457c4 |
0x4457a9 NOPL (%RAX) |
(804) 0x4457b0 INCQ 0x8(%R13,%RDI,8) |
(804) 0x4457b5 MOV %RDI,(%R14) |
(804) 0x4457b8 MOV %RDX,%R13 |
(804) 0x4457bb ADD $0x2,%RSI |
(804) 0x4457bf CMP %RSI,%R11 |
(804) 0x4457c2 JE 44575a |
(804) 0x4457c4 MOV -0x8(%R10,%RSI,8),%R14 |
(804) 0x4457c9 TEST %R14,%R14 |
(804) 0x4457cc JS 4457f0 |
(804) 0x4457ce CMP %RDI,(%R15,%R14,8) |
(804) 0x4457d2 JE 44580f |
(804) 0x4457d4 LEA (%R15,%R14,8),%R14 |
(804) 0x4457d8 INC %RCX |
(804) 0x4457db MOV -0x48(%RBP),%R13 |
(804) 0x4457df JMP 445804 |
0x4457e1 NOPW %CS:(%RAX,%RAX,1) |
(804) 0x4457f0 NOT %R14 |
(804) 0x4457f3 CMP %RDI,(%RBX,%R14,8) |
(804) 0x4457f7 JE 44580f |
(804) 0x4457f9 LEA (%RBX,%R14,8),%R14 |
(804) 0x4457fd INC %RAX |
(804) 0x445800 MOV -0x40(%RBP),%R13 |
(804) 0x445804 INCQ 0x8(%R13,%RDI,8) |
(804) 0x445809 MOV %RDI,(%R14) |
(804) 0x44580c MOV %RDX,%R13 |
(804) 0x44580f MOV (%R10,%RSI,8),%R14 |
(804) 0x445813 TEST %R14,%R14 |
(804) 0x445816 JS 445830 |
(804) 0x445818 CMP %RDI,(%R15,%R14,8) |
(804) 0x44581c JE 4457bb |
(804) 0x44581e LEA (%R15,%R14,8),%R14 |
(804) 0x445822 INC %RCX |
(804) 0x445825 MOV -0x48(%RBP),%R13 |
(804) 0x445829 JMP 4457b0 |
0x44582b NOPL (%RAX,%RAX,1) |
(804) 0x445830 NOT %R14 |
(804) 0x445833 CMP %RDI,(%RBX,%R14,8) |
(804) 0x445837 JE 4457bb |
(804) 0x445839 LEA (%RBX,%R14,8),%R14 |
(804) 0x44583d INC %RAX |
(804) 0x445840 MOV -0x40(%RBP),%R13 |
(804) 0x445844 JMP 4457b0 |
(803) 0x445849 NOT %RDX |
(803) 0x44584c CMP %RDI,(%RBX,%RDX,8) |
(803) 0x445850 JE 445865 |
(803) 0x445852 LEA (%RBX,%RDX,8),%RDX |
(803) 0x445856 INC %RAX |
(803) 0x445859 MOV -0x40(%RBP),%RSI |
(803) 0x44585d INCQ 0x8(%RSI,%RDI,8) |
(803) 0x445862 MOV %RDI,(%RDX) |
(803) 0x445865 MOV -0xa0(%RBP),%RDX |
(803) 0x44586c MOV 0x8(%RDX,%RDI,8),%RDX |
(803) 0x445871 INC %R8 |
(803) 0x445874 CMP %RDX,%R8 |
(803) 0x445877 JL 4456fc |
(802) 0x44587d JMP 4453a0 |
0x445882 XOR %EAX,%EAX |
0x445884 XOR %ECX,%ECX |
0x445886 MOV -0x30(%RBP),%RDX |
0x44588a TEST %RDX,%RDX |
0x44588d JNE 4458a0 |
0x44588f MOV -0xb0(%RBP),%RSI |
0x445896 MOV -0x130(%RBP),%RDI |
0x44589d MOV %RDI,(%RSI) |
0x4458a0 MOV -0x80(%RBP),%R14 |
0x4458a4 MOV %RCX,(%R14,%RDX,8) |
0x4458a8 MOV -0x148(%RBP),%R13 |
0x4458af MOV %RAX,(%R13,%RDX,8) |
0x4458b4 MOV -0xc8(%RBP),%RAX |
0x4458bb MOV (%RAX),%ESI |
0x4458bd MOV $0x7498b0,%EDI |
0x4458c2 CALL 410130 <__kmpc_barrier@plt> |
0x4458c7 MOV %R14,%RDX |
0x4458ca MOV %R13,%R14 |
0x4458cd CMPQ $0,-0x30(%RBP) |
0x4458d2 MOV -0xb0(%RBP),%RSI |
0x4458d9 JNE 44590a |
0x4458db CMPQ $0x2,(%RSI) |
0x4458df JL 44590a |
0x4458e1 MOV $0x1,%EAX |
0x4458e6 NOPW %CS:(%RAX,%RAX,1) |
(801) 0x4458f0 MOV -0x8(%RDX,%RAX,8),%RCX |
(801) 0x4458f5 ADD %RCX,(%RDX,%RAX,8) |
(801) 0x4458f9 MOV -0x8(%R14,%RAX,8),%RCX |
(801) 0x4458fe ADD %RCX,(%R14,%RAX,8) |
(801) 0x445902 INC %RAX |
(801) 0x445905 CMP (%RSI),%RAX |
(801) 0x445908 JL 4458f0 |
0x44590a MOV -0xc8(%RBP),%RAX |
0x445911 MOV (%RAX),%ESI |
0x445913 MOV $0x7498d0,%EDI |
0x445918 CALL 410130 <__kmpc_barrier@plt> |
0x44591d MOV -0x30(%RBP),%R8 |
0x445921 TEST %R8,%R8 |
0x445924 JLE 445a80 |
0x44592a MOV -0xb8(%RBP),%RAX |
0x445931 CMP %RAX,-0x88(%RBP) |
0x445938 MOV -0x50(%RBP),%RDI |
0x44593c MOV -0x98(%RBP),%R10 |
0x445943 MOV -0x80(%RBP),%R11 |
0x445947 JGE 445ae9 |
0x44594d MOV -0x70(%RBP),%RDX |
0x445951 LEA 0x1(%RDX),%RAX |
0x445955 MOV -0xd0(%RBP),%RCX |
0x44595c CMP %RCX,%RAX |
0x44595f CMOVLE %RCX,%RAX |
0x445963 MOV %RAX,%RCX |
0x445966 SUB %RDX,%RCX |
0x445969 CMP $0x4,%RCX |
0x44596d JB 445a2c |
0x445973 MOV %RCX,%RDX |
0x445976 SHR $0x2,%RDX |
0x44597a MOV -0x90(%RBP),%RSI |
0x445981 MOV -0x70(%RBP),%RDI |
0x445985 LEA (%RSI,%RDI,8),%RSI |
0x445989 ADD $0x18,%RSI |
0x44598d NOPL (%RAX) |
(800) 0x445990 MOV -0x18(%RSI),%RDI |
(800) 0x445994 MOV -0x30(%RBP),%R8 |
(800) 0x445998 MOV -0x8(%R14,%R8,8),%R8 |
(800) 0x44599d ADD %R8,(%R10,%RDI,8) |
(800) 0x4459a1 MOV -0x30(%RBP),%R8 |
(800) 0x4459a5 MOV -0x8(%R11,%R8,8),%R8 |
(800) 0x4459aa MOV -0x50(%RBP),%R9 |
(800) 0x4459ae ADD %R8,(%R9,%RDI,8) |
(800) 0x4459b2 MOV -0x10(%RSI),%RDI |
(800) 0x4459b6 MOV -0x30(%RBP),%R8 |
(800) 0x4459ba MOV -0x8(%R14,%R8,8),%R8 |
(800) 0x4459bf ADD %R8,(%R10,%RDI,8) |
(800) 0x4459c3 MOV -0x30(%RBP),%R8 |
(800) 0x4459c7 MOV -0x8(%R11,%R8,8),%R8 |
(800) 0x4459cc MOV -0x50(%RBP),%R9 |
(800) 0x4459d0 ADD %R8,(%R9,%RDI,8) |
(800) 0x4459d4 MOV -0x8(%RSI),%RDI |
(800) 0x4459d8 MOV -0x30(%RBP),%R8 |
(800) 0x4459dc MOV -0x8(%R14,%R8,8),%R8 |
(800) 0x4459e1 ADD %R8,(%R10,%RDI,8) |
(800) 0x4459e5 MOV -0x30(%RBP),%R8 |
(800) 0x4459e9 MOV -0x8(%R11,%R8,8),%R8 |
(800) 0x4459ee MOV -0x50(%RBP),%R9 |
(800) 0x4459f2 ADD %R8,(%R9,%RDI,8) |
(800) 0x4459f6 MOV (%RSI),%RDI |
(800) 0x4459f9 MOV -0x30(%RBP),%R8 |
(800) 0x4459fd MOV -0x8(%R14,%R8,8),%R8 |
(800) 0x445a02 ADD %R8,(%R10,%RDI,8) |
(800) 0x445a06 MOV -0x30(%RBP),%R8 |
(800) 0x445a0a MOV -0x8(%R11,%R8,8),%R8 |
(800) 0x445a0f MOV -0x50(%RBP),%R9 |
(800) 0x445a13 ADD %R8,(%R9,%RDI,8) |
(800) 0x445a17 MOV -0x30(%RBP),%R8 |
(800) 0x445a1b MOV -0x50(%RBP),%RDI |
(800) 0x445a1f ADD $0x20,%RSI |
(800) 0x445a23 DEC %RDX |
(800) 0x445a26 JNE 445990 |
0x445a2c MOV %RCX,%RDX |
0x445a2f AND $-0x4,%RDX |
0x445a33 CMP %RCX,%RDX |
0x445a36 MOV -0x90(%RBP),%RSI |
0x445a3d MOV -0xd8(%RBP),%R9 |
0x445a44 JAE 445ae9 |
0x445a4a ADD -0x88(%RBP),%R9 |
0x445a51 ADD %RDX,%R9 |
0x445a54 NOPW %CS:(%RAX,%RAX,1) |
(799) 0x445a60 MOV (%RSI,%R9,8),%RCX |
(799) 0x445a64 MOV -0x8(%R14,%R8,8),%RDX |
(799) 0x445a69 ADD %RDX,(%R10,%RCX,8) |
(799) 0x445a6d MOV -0x8(%R11,%R8,8),%RDX |
(799) 0x445a72 ADD %RDX,(%RDI,%RCX,8) |
(799) 0x445a76 INC %R9 |
(799) 0x445a79 CMP %R9,%RAX |
(799) 0x445a7c JNE 445a60 |
0x445a7e JMP 445ae9 |
0x445a80 MOV -0xb0(%RBP),%RAX |
0x445a87 MOV (%RAX),%RAX |
0x445a8a MOV -0x8(%R14,%RAX,8),%RDI |
0x445a8f MOV -0x80(%RBP),%RCX |
0x445a93 MOV -0x8(%RCX,%RAX,8),%R13 |
0x445a98 MOV -0x138(%RBP),%RAX |
0x445a9f ADD %RDI,(%RAX) |
0x445aa2 MOV -0x140(%RBP),%RAX |
0x445aa9 ADD %R13,(%RAX) |
0x445aac MOV $0x8,%ESI |
0x445ab1 CALL 4f7e60 <hypre_CAlloc> |
0x445ab6 MOV -0x58(%RBP),%RCX |
0x445aba MOV %RAX,(%RCX,%R12,8) |
0x445abe TEST %R13,%R13 |
0x445ac1 JE 445ad2 |
0x445ac3 MOV $0x8,%ESI |
0x445ac8 MOV %R13,%RDI |
0x445acb CALL 4f7e60 <hypre_CAlloc> |
0x445ad0 JMP 445ae1 |
0x445ad2 MOV -0x128(%RBP),%RAX |
0x445ad9 CMPQ $0x2,(%RAX) |
0x445add JL 445ae9 |
0x445adf XOR %EAX,%EAX |
0x445ae1 MOV -0x60(%RBP),%RCX |
0x445ae5 MOV %RAX,(%RCX,%R12,8) |
0x445ae9 MOV -0xc8(%RBP),%RAX |
0x445af0 MOV (%RAX),%ESI |
0x445af2 MOV $0x7498f0,%EDI |
0x445af7 CALL 410130 <__kmpc_barrier@plt> |
0x445afc MOV -0x30(%RBP),%RDX |
0x445b00 TEST %RDX,%RDX |
0x445b03 JLE 445b2c |
0x445b05 MOV -0x8(%R14,%RDX,8),%RAX |
0x445b0a MOV -0x80(%RBP),%RCX |
0x445b0e MOV -0x8(%RCX,%RDX,8),%RCX |
0x445b13 MOV -0x70(%RBP),%RSI |
0x445b17 MOV -0xb8(%RBP),%RDX |
0x445b1e CMP %RDX,-0x88(%RBP) |
0x445b25 JL 445b48 |
0x445b27 JMP 445f91 |
0x445b2c XOR %EAX,%EAX |
0x445b2e XOR %ECX,%ECX |
0x445b30 MOV -0x70(%RBP),%RSI |
0x445b34 MOV -0xb8(%RBP),%RDX |
0x445b3b CMP %RDX,-0x88(%RBP) |
0x445b42 JGE 445f91 |
0x445b48 LEA -0x1(%R12),%R14 |
0x445b4d MOV %R14,-0x38(%RBP) |
0x445b51 JMP 445b74 |
0x445b53 NOPW %CS:(%RAX,%RAX,1) |
(791) 0x445b60 MOV -0x70(%RBP),%RSI |
(791) 0x445b64 INC %RSI |
(791) 0x445b67 CMP -0xd0(%RBP),%RSI |
(791) 0x445b6e JGE 445f91 |
(791) 0x445b74 MOV -0x90(%RBP),%RDX |
(791) 0x445b7b MOV %RSI,-0x70(%RBP) |
(791) 0x445b7f MOV (%RDX,%RSI,8),%RSI |
(791) 0x445b83 MOV -0xa8(%RBP),%RDX |
(791) 0x445b8a MOV (%RDX,%RSI,8),%R8 |
(791) 0x445b8e MOV %RSI,%RDI |
(791) 0x445b91 NOT %RDI |
(791) 0x445b94 MOV %RSI,-0x68(%RBP) |
(791) 0x445b98 JMP 445bae |
(794) 0x445b9a MOV -0x38(%RBP),%R14 |
(794) 0x445b9e XCHG %AX,%AX |
(794) 0x445ba0 INC %R8 |
(794) 0x445ba3 MOV -0xa8(%RBP),%RDX |
(794) 0x445baa MOV -0x68(%RBP),%RSI |
(794) 0x445bae CMP 0x8(%RDX,%RSI,8),%R8 |
(794) 0x445bb3 JGE 445ea0 |
(794) 0x445bb9 MOV -0x118(%RBP),%RDX |
(794) 0x445bc0 MOV (%RDX,%R8,8),%R13 |
(794) 0x445bc4 MOV -0x108(%RBP),%RDX |
(794) 0x445bcb CMP %R14,(%RDX,%R13,8) |
(794) 0x445bcf JNE 445ba0 |
(794) 0x445bd1 MOV -0x40(%RBP),%RDX |
(794) 0x445bd5 MOV 0x8(%RDX,%R13,8),%R10 |
(794) 0x445bda TEST %R10,%R10 |
(794) 0x445bdd JLE 445d3b |
(794) 0x445be3 MOV -0x98(%RBP),%RDX |
(794) 0x445bea MOV %R13,-0x78(%RBP) |
(794) 0x445bee MOV (%RDX,%R13,8),%R11 |
(794) 0x445bf2 ADD %R11,%R10 |
(794) 0x445bf5 MOV -0x58(%RBP),%RDX |
(794) 0x445bf9 MOV -0x8(%RDX,%R12,8),%RSI |
(794) 0x445bfe LEA 0x1(%R11),%RDX |
(794) 0x445c02 CMP %RDX,%R10 |
(794) 0x445c05 CMOVLE %RDX,%R10 |
(794) 0x445c09 MOV %R10,%RDX |
(794) 0x445c0c SUB %R11,%RDX |
(794) 0x445c0f CMP $0x4,%RDX |
(794) 0x445c13 MOV %RDX,-0x30(%RBP) |
(794) 0x445c17 JAE 445c6b |
(794) 0x445c19 MOV -0x30(%RBP),%R9 |
(794) 0x445c1d MOV %R9,%RDX |
(794) 0x445c20 AND $-0x4,%RDX |
(794) 0x445c24 CMP %R9,%RDX |
(794) 0x445c27 JAE 445d33 |
(794) 0x445c2d ADD %RDX,%R11 |
(794) 0x445c30 MOV -0x38(%RBP),%R14 |
(794) 0x445c34 MOV -0x78(%RBP),%R13 |
(794) 0x445c38 JMP 445c4c |
0x445c3a NOPW (%RAX,%RAX,1) |
(797) 0x445c40 INC %R11 |
(797) 0x445c43 CMP %R11,%R10 |
(797) 0x445c46 JE 445d3b |
(797) 0x445c4c MOV (%RSI,%R11,8),%RDX |
(797) 0x445c50 CMP %RDI,(%RBX,%RDX,8) |
(797) 0x445c54 JE 445c40 |
(797) 0x445c56 MOV -0x58(%RBP),%R9 |
(797) 0x445c5a MOV (%R9,%R12,8),%R9 |
(797) 0x445c5e MOV %RDX,(%R9,%RAX,8) |
(797) 0x445c62 INC %RAX |
(797) 0x445c65 MOV %RDI,(%RBX,%RDX,8) |
(797) 0x445c69 JMP 445c40 |
(794) 0x445c6b SHR $0x2,%RDX |
(794) 0x445c6f LEA (%RSI,%R11,8),%R13 |
(794) 0x445c73 ADD $0x18,%R13 |
(794) 0x445c77 JMP 445c89 |
0x445c79 NOPL (%RAX) |
(798) 0x445c80 ADD $0x20,%R13 |
(798) 0x445c84 DEC %RDX |
(798) 0x445c87 JE 445c19 |
(798) 0x445c89 MOV -0x18(%R13),%R14 |
(798) 0x445c8d CMP %RDI,(%RBX,%R14,8) |
(798) 0x445c91 JNE 445cc0 |
(798) 0x445c93 MOV -0x10(%R13),%R14 |
(798) 0x445c97 CMP %RDI,(%RBX,%R14,8) |
(798) 0x445c9b JNE 445cdd |
(798) 0x445c9d MOV -0x8(%R13),%R14 |
(798) 0x445ca1 CMP %RDI,(%RBX,%R14,8) |
(798) 0x445ca5 JNE 445cfa |
(798) 0x445ca7 MOV (%R13),%R14 |
(798) 0x445cab CMP %RDI,(%RBX,%R14,8) |
(798) 0x445caf JE 445c80 |
(798) 0x445cb1 JMP 445d1b |
0x445cb3 NOPW %CS:(%RAX,%RAX,1) |
(798) 0x445cc0 MOV -0x58(%RBP),%R9 |
(798) 0x445cc4 MOV (%R9,%R12,8),%R9 |
(798) 0x445cc8 MOV %R14,(%R9,%RAX,8) |
(798) 0x445ccc INC %RAX |
(798) 0x445ccf MOV %RDI,(%RBX,%R14,8) |
(798) 0x445cd3 MOV -0x10(%R13),%R14 |
(798) 0x445cd7 CMP %RDI,(%RBX,%R14,8) |
(798) 0x445cdb JE 445c9d |
(798) 0x445cdd MOV -0x58(%RBP),%R9 |
(798) 0x445ce1 MOV (%R9,%R12,8),%R9 |
(798) 0x445ce5 MOV %R14,(%R9,%RAX,8) |
(798) 0x445ce9 INC %RAX |
(798) 0x445cec MOV %RDI,(%RBX,%R14,8) |
(798) 0x445cf0 MOV -0x8(%R13),%R14 |
(798) 0x445cf4 CMP %RDI,(%RBX,%R14,8) |
(798) 0x445cf8 JE 445ca7 |
(798) 0x445cfa MOV -0x58(%RBP),%R9 |
(798) 0x445cfe MOV (%R9,%R12,8),%R9 |
(798) 0x445d02 MOV %R14,(%R9,%RAX,8) |
(798) 0x445d06 INC %RAX |
(798) 0x445d09 MOV %RDI,(%RBX,%R14,8) |
(798) 0x445d0d MOV (%R13),%R14 |
(798) 0x445d11 CMP %RDI,(%RBX,%R14,8) |
(798) 0x445d15 JE 445c80 |
(798) 0x445d1b MOV -0x58(%RBP),%R9 |
(798) 0x445d1f MOV (%R9,%R12,8),%R9 |
(798) 0x445d23 MOV %R14,(%R9,%RAX,8) |
(798) 0x445d27 INC %RAX |
(798) 0x445d2a MOV %RDI,(%RBX,%R14,8) |
(798) 0x445d2e JMP 445c80 |
(794) 0x445d33 MOV -0x38(%RBP),%R14 |
(794) 0x445d37 MOV -0x78(%RBP),%R13 |
(794) 0x445d3b MOV -0x48(%RBP),%RDX |
(794) 0x445d3f MOV 0x8(%RDX,%R13,8),%R10 |
(794) 0x445d44 TEST %R10,%R10 |
(794) 0x445d47 JLE 445ba0 |
(794) 0x445d4d MOV -0x50(%RBP),%RDX |
(794) 0x445d51 MOV (%RDX,%R13,8),%R9 |
(794) 0x445d55 ADD %R9,%R10 |
(794) 0x445d58 MOV -0x60(%RBP),%RDX |
(794) 0x445d5c MOV -0x8(%RDX,%R12,8),%RSI |
(794) 0x445d61 LEA 0x1(%R9),%RDX |
(794) 0x445d65 CMP %RDX,%R10 |
(794) 0x445d68 CMOVLE %RDX,%R10 |
(794) 0x445d6c MOV %R10,%R11 |
(794) 0x445d6f SUB %R9,%R11 |
(794) 0x445d72 CMP $0x4,%R11 |
(794) 0x445d76 MOV %R11,-0x78(%RBP) |
(794) 0x445d7a JAE 445dcb |
(794) 0x445d7c MOV -0x78(%RBP),%RDX |
(794) 0x445d80 MOV %RDX,%R11 |
(794) 0x445d83 AND $-0x4,%R11 |
(794) 0x445d87 CMP %RDX,%R11 |
(794) 0x445d8a JAE 445b9a |
(794) 0x445d90 ADD %R11,%R9 |
(794) 0x445d93 MOV -0x38(%RBP),%R14 |
(794) 0x445d97 JMP 445dac |
0x445d99 NOPL (%RAX) |
(795) 0x445da0 INC %R9 |
(795) 0x445da3 CMP %R9,%R10 |
(795) 0x445da6 JE 445ba0 |
(795) 0x445dac MOV (%RSI,%R9,8),%RDX |
(795) 0x445db0 CMP %RDI,(%R15,%RDX,8) |
(795) 0x445db4 JE 445da0 |
(795) 0x445db6 MOV -0x60(%RBP),%R11 |
(795) 0x445dba MOV (%R11,%R12,8),%R11 |
(795) 0x445dbe MOV %RDX,(%R11,%RCX,8) |
(795) 0x445dc2 INC %RCX |
(795) 0x445dc5 MOV %RDI,(%R15,%RDX,8) |
(795) 0x445dc9 JMP 445da0 |
(794) 0x445dcb SHR $0x2,%R11 |
(794) 0x445dcf LEA (%RSI,%R9,8),%R14 |
(794) 0x445dd3 ADD $0x18,%R14 |
(794) 0x445dd7 JMP 445de9 |
0x445dd9 NOPL (%RAX) |
(796) 0x445de0 ADD $0x20,%R14 |
(796) 0x445de4 DEC %R11 |
(796) 0x445de7 JE 445d7c |
(796) 0x445de9 MOV -0x18(%R14),%R13 |
(796) 0x445ded CMP %RDI,(%R15,%R13,8) |
(796) 0x445df1 JNE 445e20 |
(796) 0x445df3 MOV -0x10(%R14),%R13 |
(796) 0x445df7 CMP %RDI,(%R15,%R13,8) |
(796) 0x445dfb JNE 445e3d |
(796) 0x445dfd MOV -0x8(%R14),%R13 |
(796) 0x445e01 CMP %RDI,(%R15,%R13,8) |
(796) 0x445e05 JNE 445e5a |
(796) 0x445e07 MOV (%R14),%R13 |
(796) 0x445e0a CMP %RDI,(%R15,%R13,8) |
(796) 0x445e0e JE 445de0 |
(796) 0x445e10 JMP 445e7a |
0x445e12 NOPW %CS:(%RAX,%RAX,1) |
(796) 0x445e20 MOV -0x60(%RBP),%RDX |
(796) 0x445e24 MOV (%RDX,%R12,8),%RDX |
(796) 0x445e28 MOV %R13,(%RDX,%RCX,8) |
(796) 0x445e2c INC %RCX |
(796) 0x445e2f MOV %RDI,(%R15,%R13,8) |
(796) 0x445e33 MOV -0x10(%R14),%R13 |
(796) 0x445e37 CMP %RDI,(%R15,%R13,8) |
(796) 0x445e3b JE 445dfd |
(796) 0x445e3d MOV -0x60(%RBP),%RDX |
(796) 0x445e41 MOV (%RDX,%R12,8),%RDX |
(796) 0x445e45 MOV %R13,(%RDX,%RCX,8) |
(796) 0x445e49 INC %RCX |
(796) 0x445e4c MOV %RDI,(%R15,%R13,8) |
(796) 0x445e50 MOV -0x8(%R14),%R13 |
(796) 0x445e54 CMP %RDI,(%R15,%R13,8) |
(796) 0x445e58 JE 445e07 |
(796) 0x445e5a MOV -0x60(%RBP),%RDX |
(796) 0x445e5e MOV (%RDX,%R12,8),%RDX |
(796) 0x445e62 MOV %R13,(%RDX,%RCX,8) |
(796) 0x445e66 INC %RCX |
(796) 0x445e69 MOV %RDI,(%R15,%R13,8) |
(796) 0x445e6d MOV (%R14),%R13 |
(796) 0x445e70 CMP %RDI,(%R15,%R13,8) |
(796) 0x445e74 JE 445de0 |
(796) 0x445e7a MOV -0x60(%RBP),%RDX |
(796) 0x445e7e MOV (%RDX,%R12,8),%RDX |
(796) 0x445e82 MOV %R13,(%RDX,%RCX,8) |
(796) 0x445e86 INC %RCX |
(796) 0x445e89 MOV %RDI,(%R15,%R13,8) |
(796) 0x445e8d JMP 445de0 |
0x445e92 NOPW %CS:(%RAX,%RAX,1) |
(791) 0x445ea0 MOV -0xa0(%RBP),%RDX |
(791) 0x445ea7 MOV -0x68(%RBP),%R8 |
(791) 0x445eab MOV (%RDX,%R8,8),%RSI |
(791) 0x445eaf MOV 0x8(%RDX,%R8,8),%R8 |
(791) 0x445eb4 CMP %R8,%RSI |
(791) 0x445eb7 JL 445ecc |
(791) 0x445eb9 JMP 445b60 |
0x445ebe XCHG %AX,%AX |
(792) 0x445ec0 INC %RSI |
(792) 0x445ec3 CMP %R8,%RSI |
(792) 0x445ec6 JGE 445b60 |
(792) 0x445ecc MOV -0x120(%RBP),%RDX |
(792) 0x445ed3 MOV (%RDX,%RSI,8),%R9 |
(792) 0x445ed7 MOV -0x110(%RBP),%RDX |
(792) 0x445ede CMP %R14,(%RDX,%R9,8) |
(792) 0x445ee2 JNE 445ec0 |
(792) 0x445ee4 MOV -0x100(%RBP),%RDX |
(792) 0x445eeb MOV 0x8(%RDX,%R9,8),%RDX |
(792) 0x445ef0 TEST %RDX,%RDX |
(792) 0x445ef3 JLE 445ec0 |
(792) 0x445ef5 MOV -0xf0(%RBP),%R8 |
(792) 0x445efc MOV (%R8,%R9,8),%R8 |
(792) 0x445f00 ADD %R8,%RDX |
(792) 0x445f03 MOV -0xf8(%RBP),%R9 |
(792) 0x445f0a MOV (%R9,%R12,8),%R9 |
(792) 0x445f0e LEA 0x1(%R8),%R10 |
(792) 0x445f12 CMP %R10,%RDX |
(792) 0x445f15 CMOVLE %R10,%RDX |
(792) 0x445f19 JMP 445f28 |
0x445f1b NOPL (%RAX,%RAX,1) |
(793) 0x445f20 INC %R8 |
(793) 0x445f23 CMP %R8,%RDX |
(793) 0x445f26 JE 445f70 |
(793) 0x445f28 MOV (%R9,%R8,8),%R10 |
(793) 0x445f2c TEST %R10,%R10 |
(793) 0x445f2f JS 445f50 |
(793) 0x445f31 CMP %RDI,(%R15,%R10,8) |
(793) 0x445f35 JE 445f20 |
(793) 0x445f37 MOV -0x60(%RBP),%R11 |
(793) 0x445f3b MOV (%R11,%R12,8),%R11 |
(793) 0x445f3f MOV %R10,(%R11,%RCX,8) |
(793) 0x445f43 INC %RCX |
(793) 0x445f46 MOV %RDI,(%R15,%R10,8) |
(793) 0x445f4a JMP 445f20 |
0x445f4c NOPL (%RAX) |
(793) 0x445f50 NOT %R10 |
(793) 0x445f53 CMP %RDI,(%RBX,%R10,8) |
(793) 0x445f57 JE 445f20 |
(793) 0x445f59 MOV -0x58(%RBP),%R11 |
(793) 0x445f5d MOV (%R11,%R12,8),%R11 |
(793) 0x445f61 MOV %R10,(%R11,%RAX,8) |
(793) 0x445f65 INC %RAX |
(793) 0x445f68 MOV %RDI,(%RBX,%R10,8) |
(793) 0x445f6c JMP 445f20 |
0x445f6e XCHG %AX,%AX |
(792) 0x445f70 MOV -0xa0(%RBP),%RDX |
(792) 0x445f77 MOV -0x68(%RBP),%R8 |
(792) 0x445f7b MOV 0x8(%RDX,%R8,8),%R8 |
(792) 0x445f80 INC %RSI |
(792) 0x445f83 CMP %R8,%RSI |
(792) 0x445f86 JL 445ecc |
(791) 0x445f8c JMP 445b60 |
0x445f91 MOV %RBX,%RDI |
0x445f94 CALL 4f7f50 <hypre_Free> |
0x445f99 CMPQ $0,-0xe0(%RBP) |
0x445fa1 JNE 445fc5 |
0x445fa3 MOV -0xc0(%RBP),%RAX |
0x445faa CMP -0xe8(%RBP),%RAX |
0x445fb1 JE 445fc5 |
0x445fb3 ADD $0x128,%RSP |
0x445fba POP %RBX |
0x445fbb POP %R12 |
0x445fbd POP %R13 |
0x445fbf POP %R14 |
0x445fc1 POP %R15 |
0x445fc3 POP %RBP |
0x445fc4 RET |
0x445fc5 MOV %R15,%RDI |
0x445fc8 ADD $0x128,%RSP |
0x445fcf POP %RBX |
0x445fd0 POP %R12 |
0x445fd2 POP %R13 |
0x445fd4 POP %R14 |
0x445fd6 POP %R15 |
0x445fd8 POP %RBP |
0x445fd9 JMP 4f7f50 |
0x445fde XCHG %AX,%AX |
Path / |
Source file and lines | par_multi_interp.c:891-1134 |
Module | exec |
nb instructions | 299 |
nb uops | 320 |
loop length | 1421 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 60 |
micro-operation queue | 53.33 cycles |
front end | 53.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 15.60 | 15.60 | 33.67 | 33.67 | 30.50 | 15.60 | 15.60 | 30.50 | 30.50 | 30.50 | 15.60 | 33.67 |
cycles | 15.60 | 16.40 | 33.67 | 33.67 | 30.50 | 15.60 | 15.60 | 30.50 | 30.50 | 30.50 | 15.60 | 33.67 |
Cycles executing div or sqrt instructions | 16.00 |
FE+BE cycles | 51.35-51.39 |
Stall cycles | 0.00 |
Front-end | 53.33 |
Dispatch | 33.67 |
DIV/SQRT | 16.00 |
Overall L1 | 53.33 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 9% |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x128,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,-0x120(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x148(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb8(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x140(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x80(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x70(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x138(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 4f9c90 <hypre_GetThreadNum> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 4f9c80 <hypre_NumActiveThreads> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RBX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
OR %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x20,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
JE 445294 <hypre_BoomerAMGBuildMultipass.extracted.34+0x164> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RBX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %RCX | 5 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 10 |
JMP 44529a <hypre_BoomerAMGBuildMultipass.extracted.34+0x16a> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %EBX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
DIV %ECX | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV %RCX,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
DEC %RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RCX),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %RAX,%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
CMP %RDX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVE %RBX,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSI,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R12),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R13,%R12,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4f7e60 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
TEST %R15,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 4452fd <hypre_BoomerAMGBuildMultipass.extracted.34+0x1cd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SAL $0x3,%R15 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 5011c0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
IMUL -0x30(%RBP),%R14 | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R14,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xe8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 445332 <hypre_BoomerAMGBuildMultipass.extracted.34+0x202> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xe0(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 44535d <hypre_BoomerAMGBuildMultipass.extracted.34+0x22d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDI,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4f7e60 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R14,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
TEST %R14,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 44535d <hypre_BoomerAMGBuildMultipass.extracted.34+0x22d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SAL $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 5011c0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
JMP 44535d <hypre_BoomerAMGBuildMultipass.extracted.34+0x22d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x88(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xd8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RCX,%RDX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xb8(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JGE 445882 <hypre_BoomerAMGBuildMultipass.extracted.34+0x752> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%R12),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R10,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 4453b7 <hypre_BoomerAMGBuildMultipass.extracted.34+0x287> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 4458a0 <hypre_BoomerAMGBuildMultipass.extracted.34+0x770> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x130(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,(%RSI) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x80(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,(%R14,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x148(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%R13,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x7498b0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410130 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %R14,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R13,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMPQ $0,-0x30(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0xb0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 44590a <hypre_BoomerAMGBuildMultipass.extracted.34+0x7da> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x2,(%RSI) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 44590a <hypre_BoomerAMGBuildMultipass.extracted.34+0x7da> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x7498d0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410130 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x30(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R8,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 445a80 <hypre_BoomerAMGBuildMultipass.extracted.34+0x950> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RAX,-0x88(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x98(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 445ae9 <hypre_BoomerAMGBuildMultipass.extracted.34+0x9b9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xd0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVLE %RCX,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RDX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x4,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 445a2c <hypre_BoomerAMGBuildMultipass.extracted.34+0x8fc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RCX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x90(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RSI,%RDI,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x18,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RCX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x90(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xd8(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JAE 445ae9 <hypre_BoomerAMGBuildMultipass.extracted.34+0x9b9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD -0x88(%RBP),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
ADD %RDX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 445ae9 <hypre_BoomerAMGBuildMultipass.extracted.34+0x9b9> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%R14,%RAX,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RCX,%RAX,8),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x138(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDI,(%RAX) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x140(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R13,(%RAX) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4f7e60 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x58(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX,%R12,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R13,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 445ad2 <hypre_BoomerAMGBuildMultipass.extracted.34+0x9a2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R13,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4f7e60 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
JMP 445ae1 <hypre_BoomerAMGBuildMultipass.extracted.34+0x9b1> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x128(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0x2,(%RAX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 445ae9 <hypre_BoomerAMGBuildMultipass.extracted.34+0x9b9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x60(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX,%R12,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x7498f0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410130 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 445b2c <hypre_BoomerAMGBuildMultipass.extracted.34+0x9fc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x8(%R14,%RDX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RCX,%RDX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xb8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDX,-0x88(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 445b48 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa18> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 445f91 <hypre_BoomerAMGBuildMultipass.extracted.34+0xe61> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x70(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xb8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDX,-0x88(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 445f91 <hypre_BoomerAMGBuildMultipass.extracted.34+0xe61> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%R12),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 445b74 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa44> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4f7f50 <hypre_Free> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,-0xe0(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 445fc5 <hypre_BoomerAMGBuildMultipass.extracted.34+0xe95> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0xe8(%RBP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 445fc5 <hypre_BoomerAMGBuildMultipass.extracted.34+0xe95> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD $0x128,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD $0x128,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP 4f7f50 <hypre_Free> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | par_multi_interp.c:891-1134 |
Module | exec |
nb instructions | 299 |
nb uops | 320 |
loop length | 1421 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 60 |
micro-operation queue | 53.33 cycles |
front end | 53.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 15.60 | 15.60 | 33.67 | 33.67 | 30.50 | 15.60 | 15.60 | 30.50 | 30.50 | 30.50 | 15.60 | 33.67 |
cycles | 15.60 | 16.40 | 33.67 | 33.67 | 30.50 | 15.60 | 15.60 | 30.50 | 30.50 | 30.50 | 15.60 | 33.67 |
Cycles executing div or sqrt instructions | 16.00 |
FE+BE cycles | 51.35-51.39 |
Stall cycles | 0.00 |
Front-end | 53.33 |
Dispatch | 33.67 |
DIV/SQRT | 16.00 |
Overall L1 | 53.33 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 9% |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x128,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,-0x120(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x148(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb8(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x140(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x80(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x70(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x138(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 4f9c90 <hypre_GetThreadNum> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 4f9c80 <hypre_NumActiveThreads> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RBX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
OR %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x20,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
JE 445294 <hypre_BoomerAMGBuildMultipass.extracted.34+0x164> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RBX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %RCX | 5 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 10 |
JMP 44529a <hypre_BoomerAMGBuildMultipass.extracted.34+0x16a> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %EBX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
DIV %ECX | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV %RCX,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
DEC %RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RCX),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %RAX,%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
CMP %RDX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVE %RBX,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSI,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R12),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R13,%R12,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4f7e60 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
TEST %R15,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 4452fd <hypre_BoomerAMGBuildMultipass.extracted.34+0x1cd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SAL $0x3,%R15 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 5011c0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
IMUL -0x30(%RBP),%R14 | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R14,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xe8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 445332 <hypre_BoomerAMGBuildMultipass.extracted.34+0x202> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xe0(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 44535d <hypre_BoomerAMGBuildMultipass.extracted.34+0x22d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDI,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4f7e60 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R14,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
TEST %R14,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 44535d <hypre_BoomerAMGBuildMultipass.extracted.34+0x22d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SAL $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 5011c0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
JMP 44535d <hypre_BoomerAMGBuildMultipass.extracted.34+0x22d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x88(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xd8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RCX,%RDX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xb8(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JGE 445882 <hypre_BoomerAMGBuildMultipass.extracted.34+0x752> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%R12),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R10,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 4453b7 <hypre_BoomerAMGBuildMultipass.extracted.34+0x287> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 4458a0 <hypre_BoomerAMGBuildMultipass.extracted.34+0x770> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x130(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,(%RSI) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x80(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,(%R14,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x148(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%R13,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x7498b0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410130 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %R14,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R13,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMPQ $0,-0x30(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0xb0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 44590a <hypre_BoomerAMGBuildMultipass.extracted.34+0x7da> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x2,(%RSI) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 44590a <hypre_BoomerAMGBuildMultipass.extracted.34+0x7da> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x7498d0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410130 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x30(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R8,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 445a80 <hypre_BoomerAMGBuildMultipass.extracted.34+0x950> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RAX,-0x88(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x98(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 445ae9 <hypre_BoomerAMGBuildMultipass.extracted.34+0x9b9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xd0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVLE %RCX,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RDX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x4,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 445a2c <hypre_BoomerAMGBuildMultipass.extracted.34+0x8fc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RCX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x90(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RSI,%RDI,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x18,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RCX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x90(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xd8(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JAE 445ae9 <hypre_BoomerAMGBuildMultipass.extracted.34+0x9b9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD -0x88(%RBP),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
ADD %RDX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 445ae9 <hypre_BoomerAMGBuildMultipass.extracted.34+0x9b9> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%R14,%RAX,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RCX,%RAX,8),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x138(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDI,(%RAX) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x140(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R13,(%RAX) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4f7e60 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x58(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX,%R12,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R13,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 445ad2 <hypre_BoomerAMGBuildMultipass.extracted.34+0x9a2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R13,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4f7e60 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
JMP 445ae1 <hypre_BoomerAMGBuildMultipass.extracted.34+0x9b1> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x128(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0x2,(%RAX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 445ae9 <hypre_BoomerAMGBuildMultipass.extracted.34+0x9b9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x60(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX,%R12,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x7498f0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410130 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 445b2c <hypre_BoomerAMGBuildMultipass.extracted.34+0x9fc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x8(%R14,%RDX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RCX,%RDX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xb8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDX,-0x88(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 445b48 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa18> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 445f91 <hypre_BoomerAMGBuildMultipass.extracted.34+0xe61> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x70(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xb8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDX,-0x88(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 445f91 <hypre_BoomerAMGBuildMultipass.extracted.34+0xe61> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%R12),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 445b74 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa44> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4f7f50 <hypre_Free> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,-0xe0(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 445fc5 <hypre_BoomerAMGBuildMultipass.extracted.34+0xe95> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0xe8(%RBP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 445fc5 <hypre_BoomerAMGBuildMultipass.extracted.34+0xe95> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD $0x128,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD $0x128,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP 4f7f50 <hypre_Free> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼hypre_BoomerAMGBuildMultipass.extracted.34– | 1.61 | 0.37 |
○Loop 800 - par_multi_interp.c:1030-1034 - exec | 0.1 | 0.02 |
▼Loop 802 - par_multi_interp.c:917-997 - exec– | 0.04 | 0.01 |
▼Loop 805 - par_multi_interp.c:917-970 - exec– | 0.56 | 0.11 |
○Loop 808 - par_multi_interp.c:951-958 - exec | 0.2 | 0.04 |
○Loop 809 - par_multi_interp.c:951-958 - exec | 0 | 0 |
○Loop 806 - par_multi_interp.c:963-970 - exec | 0 | 0 |
○Loop 807 - par_multi_interp.c:963-970 - exec | 0 | 0 |
▼Loop 803 - par_multi_interp.c:976-997 - exec– | 0 | 0 |
○Loop 804 - par_multi_interp.c:983-997 - exec | 0 | 0 |
▼Loop 791 - par_multi_interp.c:917-1125 - exec– | 0.04 | 0.01 |
▼Loop 794 - par_multi_interp.c:917-1099 - exec– | 0.5 | 0.1 |
○Loop 797 - par_multi_interp.c:1082-1088 - exec | 0.18 | 0.04 |
○Loop 798 - par_multi_interp.c:1082-1088 - exec | 0 | 0.01 |
○Loop 795 - par_multi_interp.c:1093-1099 - exec | 0 | 0 |
○Loop 796 - par_multi_interp.c:1093-1099 - exec | 0 | 0 |
▼Loop 792 - par_multi_interp.c:1104-1125 - exec– | 0 | 0 |
○Loop 793 - par_multi_interp.c:1111-1125 - exec | 0 | 0 |
○Loop 801 - par_multi_interp.c:1017-1020 - exec | 0 | 0 |
○Loop 799 - par_multi_interp.c:1030-1034 - exec | 0 | 0 |