Function: hypre_ParCSRComputeL1NormsThreads.extracted | Module: exec | Source: ams.c:3363-3540 [...] | Coverage: 0.21% |
---|
Function: hypre_ParCSRComputeL1NormsThreads.extracted | Module: exec | Source: ams.c:3363-3540 [...] | Coverage: 0.21% |
---|
/scratch_na/users/xoserete/qaas_runs/171-172-8218/intel/AMG/build/AMG/AMG/parcsr_ls/ams.c: 3363 - 3540 |
-------------------------------------------------------------------------------- |
3363: #pragma omp parallel for private(i,ii,j,k,ns,ne,rest,size,diag,cf_diag) HYPRE_SMP_SCHEDULE |
3364: #endif |
3365: for (k = 0; k < num_threads; k++) |
3366: { |
3367: size = num_rows/num_threads; |
3368: rest = num_rows - size*num_threads; |
3369: if (k < rest) |
3370: { |
3371: ns = k*size+k; |
3372: ne = (k+1)*size+k+1; |
3373: } |
3374: else |
3375: { |
3376: ns = k*size+rest; |
3377: ne = (k+1)*size+rest; |
3378: } |
3379: |
3380: if (option == 1) |
3381: { |
3382: for (i = ns; i < ne; i++) |
3383: { |
3384: l1_norm[i] = 0.0; |
3385: if (cf_marker == NULL) |
3386: { |
3387: /* Add the l1 norm of the diag part of the ith row */ |
3388: for (j = A_diag_I[i]; j < A_diag_I[i+1]; j++) |
3389: l1_norm[i] += fabs(A_diag_data[j]); |
3390: /* Add the l1 norm of the offd part of the ith row */ |
3391: if (num_cols_offd) |
3392: { |
3393: for (j = A_offd_I[i]; j < A_offd_I[i+1]; j++) |
3394: l1_norm[i] += fabs(A_offd_data[j]); |
3395: } |
3396: } |
3397: else |
3398: { |
3399: cf_diag = cf_marker[i]; |
3400: /* Add the CF l1 norm of the diag part of the ith row */ |
3401: for (j = A_diag_I[i]; j < A_diag_I[i+1]; j++) |
3402: if (cf_diag == cf_marker[A_diag_J[j]]) |
3403: l1_norm[i] += fabs(A_diag_data[j]); |
3404: /* Add the CF l1 norm of the offd part of the ith row */ |
3405: if (num_cols_offd) |
3406: { |
3407: for (j = A_offd_I[i]; j < A_offd_I[i+1]; j++) |
3408: if (cf_diag == cf_marker_offd[A_offd_J[j]]) |
3409: l1_norm[i] += fabs(A_offd_data[j]); |
[...] |
3416: for (i = ns; i < ne; i++) |
3417: { |
3418: l1_norm[i] = 0.0; |
3419: if (cf_marker == NULL) |
3420: { |
3421: /* Add the diagonal and the local off-thread part of the ith row */ |
3422: for (j = A_diag_I[i]; j < A_diag_I[i+1]; j++) |
3423: { |
3424: ii = A_diag_J[j]; |
3425: if (ii == i || ii < ns || ii >= ne) |
3426: l1_norm[i] += fabs(A_diag_data[j]); |
3427: } |
3428: /* Add the l1 norm of the offd part of the ith row */ |
3429: if (num_cols_offd) |
3430: { |
3431: for (j = A_offd_I[i]; j < A_offd_I[i+1]; j++) |
3432: l1_norm[i] += fabs(A_offd_data[j]); |
3433: } |
3434: } |
3435: else |
3436: { |
3437: cf_diag = cf_marker[i]; |
3438: /* Add the diagonal and the local off-thread part of the ith row */ |
3439: for (j = A_diag_I[i]; j < A_diag_I[i+1]; j++) |
3440: { |
3441: ii = A_diag_J[j]; |
3442: if ((ii == i || ii < ns || ii >= ne) && |
3443: (cf_diag == cf_marker[A_diag_J[j]])) |
3444: l1_norm[i] += fabs(A_diag_data[j]); |
3445: } |
3446: /* Add the CF l1 norm of the offd part of the ith row */ |
3447: if (num_cols_offd) |
3448: { |
3449: for (j = A_offd_I[i]; j < A_offd_I[i+1]; j++) |
3450: if (cf_diag == cf_marker_offd[A_offd_J[j]]) |
3451: l1_norm[i] += fabs(A_offd_data[j]); |
[...] |
3458: for (i = ns; i < ne; i++) |
3459: { |
3460: l1_norm[i] = 0.0; |
3461: for (j = A_diag_I[i]; j < A_diag_I[i+1]; j++) |
3462: l1_norm[i] += A_diag_data[j] * A_diag_data[j]; |
3463: if (num_cols_offd) |
3464: for (j = A_offd_I[i]; j < A_offd_I[i+1]; j++) |
3465: l1_norm[i] += A_offd_data[j] * A_offd_data[j]; |
3466: } |
3467: } |
3468: else if (option == 4) |
3469: { |
3470: for (i = ns; i < ne; i++) |
3471: { |
3472: l1_norm[i] = 0.0; |
3473: if (cf_marker == NULL) |
3474: { |
3475: /* Add the diagonal and the local off-thread part of the ith row */ |
3476: for (j = A_diag_I[i]; j < A_diag_I[i+1]; j++) |
3477: { |
3478: ii = A_diag_J[j]; |
3479: if (ii == i || ii < ns || ii >= ne) |
[...] |
3487: l1_norm[i] += 0.5*fabs(A_diag_data[j]); |
3488: } |
3489: } |
3490: /* Add the l1 norm of the offd part of the ith row */ |
3491: if (num_cols_offd) |
3492: { |
3493: for (j = A_offd_I[i]; j < A_offd_I[i+1]; j++) |
3494: l1_norm[i] += 0.5*fabs(A_offd_data[j]); |
3495: } |
3496: } |
3497: else |
3498: { |
3499: cf_diag = cf_marker[i]; |
3500: /* Add the diagonal and the local off-thread part of the ith row */ |
3501: for (j = A_diag_I[i]; j < A_diag_I[i+1]; j++) |
3502: { |
3503: ii = A_diag_J[j]; |
3504: if ((ii == i || ii < ns || ii >= ne) && |
3505: (cf_diag == cf_marker[A_diag_J[j]])) |
3506: { |
3507: if (ii == i) |
3508: { |
3509: diag = fabs(A_diag_data[j]); |
3510: l1_norm[i] += fabs(A_diag_data[j]); |
3511: } |
3512: else |
3513: l1_norm[i] += 0.5*fabs(A_diag_data[j]); |
3514: } |
3515: } |
3516: /* Add the CF l1 norm of the offd part of the ith row */ |
3517: if (num_cols_offd) |
3518: { |
3519: for (j = A_offd_I[i]; j < A_offd_I[i+1]; j++) |
3520: if (cf_diag == cf_marker_offd[A_offd_J[j]]) |
3521: l1_norm[i] += 0.5*fabs(A_offd_data[j]); |
3522: } |
3523: } |
3524: |
3525: /* Truncate according to Remark 6.2 */ |
3526: if (l1_norm[i] <= 4.0/3.0*diag) |
3527: l1_norm[i] = diag; |
3528: } |
3529: } |
3530: |
3531: /* Handle negative definite matrices */ |
3532: for (i = ns; i < ne; i++) |
3533: if (A_diag_data[A_diag_I[i]] < 0) |
3534: l1_norm[i] = -l1_norm[i]; |
3535: |
3536: for (i = ns; i < ne; i++) |
3537: /* if (fabs(l1_norm[i]) < DBL_EPSILON) */ |
3538: if (fabs(l1_norm[i]) == 0.0) |
3539: { |
3540: hypre_error_in_arg(1); |
0x4b6580 PUSH %RBP |
0x4b6581 MOV %RSP,%RBP |
0x4b6584 PUSH %R15 |
0x4b6586 PUSH %R14 |
0x4b6588 PUSH %R13 |
0x4b658a PUSH %R12 |
0x4b658c PUSH %RBX |
0x4b658d SUB $0xf8,%RSP |
0x4b6594 MOV %R9,-0xa8(%RBP) |
0x4b659b MOV %R8,%R14 |
0x4b659e MOV %RCX,-0x58(%RBP) |
0x4b65a2 MOV %RDX,-0xb8(%RBP) |
0x4b65a9 MOV 0x50(%RBP),%R15 |
0x4b65ad MOV 0x48(%RBP),%RAX |
0x4b65b1 MOV %RAX,-0x30(%RBP) |
0x4b65b5 MOV 0x40(%RBP),%RAX |
0x4b65b9 MOV %RAX,-0x98(%RBP) |
0x4b65c0 MOV 0x38(%RBP),%RAX |
0x4b65c4 MOV %RAX,-0x38(%RBP) |
0x4b65c8 MOV 0x30(%RBP),%R13 |
0x4b65cc MOV 0x28(%RBP),%RAX |
0x4b65d0 MOV %RAX,-0xa0(%RBP) |
0x4b65d7 MOV 0x20(%RBP),%R12 |
0x4b65db MOV 0x18(%RBP),%RBX |
0x4b65df MOV 0x10(%RBP),%RAX |
0x4b65e3 MOV %RAX,-0x40(%RBP) |
0x4b65e7 MOVL $0,-0xe0(%RBP) |
0x4b65f1 MOV (%RDI),%ESI |
0x4b65f3 MOVQ $0,-0xf8(%RBP) |
0x4b65fe MOVQ $0x1,-0x120(%RBP) |
0x4b6609 SUB $0x8,%RSP |
0x4b660d LEA -0x120(%RBP),%RAX |
0x4b6614 LEA -0xe0(%RBP),%RCX |
0x4b661b LEA -0xf8(%RBP),%R8 |
0x4b6622 LEA 0x60(%RBP),%R9 |
0x4b6626 MOV $0x74c910,%EDI |
0x4b662b MOV %ESI,-0xdc(%RBP) |
0x4b6631 MOV $0x22,%EDX |
0x4b6636 PUSH $0x1 |
0x4b6638 PUSH $0x1 |
0x4b663a PUSH %RAX |
0x4b663b CALL 40fff0 <__kmpc_for_static_init_8@plt> |
0x4b6640 MOV -0x40(%RBP),%R9 |
0x4b6644 MOV -0x38(%RBP),%R11 |
0x4b6648 ADD $0x20,%RSP |
0x4b664c MOV -0xf8(%RBP),%RSI |
0x4b6653 MOV 0x60(%RBP),%RAX |
0x4b6657 MOV %RAX,-0x110(%RBP) |
0x4b665e CMP %RAX,%RSI |
0x4b6661 JBE 4b6684 |
0x4b6663 MOV $0x74c930,%EDI |
0x4b6668 MOV -0xdc(%RBP),%ESI |
0x4b666e ADD $0xf8,%RSP |
0x4b6675 POP %RBX |
0x4b6676 POP %R12 |
0x4b6678 POP %R13 |
0x4b667a POP %R14 |
0x4b667c POP %R15 |
0x4b667e POP %RBP |
0x4b667f JMP 40fd40 |
0x4b6684 MOV -0xa8(%RBP),%RAX |
0x4b668b MOV %RAX,%RDX |
0x4b668e MOV -0x58(%RBP),%RCX |
0x4b6692 OR %RCX,%RDX |
0x4b6695 SHR $0x20,%RDX |
0x4b6699 JE 4b66ac |
0x4b669b CQTO |
0x4b669d IDIV %RCX |
0x4b66a0 MOV %RDX,-0x90(%RBP) |
0x4b66a7 MOV %RAX,%R8 |
0x4b66aa JMP 4b66ba |
0x4b66ac XOR %EDX,%EDX |
0x4b66ae DIV %ECX |
0x4b66b0 MOV %RDX,-0x90(%RBP) |
0x4b66b7 MOV %EAX,%R8D |
0x4b66ba MOV -0xb8(%RBP),%RCX |
0x4b66c1 LEA 0x1(%R8),%RAX |
0x4b66c5 MOV %RAX,-0x100(%RBP) |
0x4b66cc LEA 0x38(%R11),%RAX |
0x4b66d0 MOV %RAX,-0xc0(%RBP) |
0x4b66d7 LEA 0x38(%R12),%RAX |
0x4b66dc MOV %RAX,-0xc8(%RBP) |
0x4b66e3 MOV %RSI,%RAX |
0x4b66e6 IMUL %R8,%RAX |
0x4b66ea LEA (%R9,%RAX,8),%RDI |
0x4b66ee ADD $0x10,%RDI |
0x4b66f2 LEA (,%R8,8),%RDX |
0x4b66fa MOV %RDX,-0x108(%RBP) |
0x4b6701 MOV -0x30(%RBP),%RDX |
0x4b6705 MOV %R8,%R10 |
0x4b6708 LEA 0x10(%RDX,%RAX,8),%R8 |
0x4b670d MOV %R8,-0xa8(%RBP) |
0x4b6714 MOV %R10,%R8 |
0x4b6717 LEA (%RDX,%RAX,8),%R10 |
0x4b671b MOV %RDI,%RDX |
0x4b671e LEA (%R9,%RAX,8),%RAX |
0x4b6722 MOV %RAX,-0xe8(%RBP) |
0x4b6729 DEC %RCX |
0x4b672c MOV %RCX,-0xb8(%RBP) |
0x4b6733 VXORPD %XMM9,%XMM9,%XMM9 |
0x4b6738 VMOVDDUP 0x5b8a0(%RIP),%XMM10 |
0x4b6740 VMOVDDUP 0x5ab30(%RIP),%XMM11 |
0x4b6748 VMOVDDUP 0x5ab28(%RIP),%XMM12 |
0x4b6750 VMOVSD 0x5a4f8(%RIP),%XMM13 |
0x4b6758 VMOVSD 0x5a500(%RIP),%XMM14 |
0x4b6760 MOV %R14,-0x58(%RBP) |
0x4b6764 MOV %R8,-0x48(%RBP) |
0x4b6768 JMP 4b680a |
0x4b676d NOPL (%RAX) |
(2582) 0x4b6770 MOV $0x524c20,%EDI |
(2582) 0x4b6775 MOV $0xdd4,%ESI |
(2582) 0x4b677a MOV $0xc,%EDX |
(2582) 0x4b677f XOR %ECX,%ECX |
(2582) 0x4b6781 VMOVUPD %XMM15,-0x80(%RBP) |
(2582) 0x4b6786 CALL 4faac0 <hypre_error_handler> |
(2582) 0x4b678b VMOVUPD -0x80(%RBP),%XMM15 |
(2582) 0x4b6790 MOV -0x60(%RBP),%RSI |
(2582) 0x4b6794 VMOVSD 0x5a4c4(%RIP),%XMM14 |
(2582) 0x4b679c VMOVSD 0x5a4ac(%RIP),%XMM13 |
(2582) 0x4b67a4 VMOVDDUP 0x5aacc(%RIP),%XMM12 |
(2582) 0x4b67ac VMOVDDUP 0x5aac4(%RIP),%XMM11 |
(2582) 0x4b67b4 VMOVDDUP 0x5b824(%RIP),%XMM10 |
(2582) 0x4b67bc VXORPD %XMM9,%XMM9,%XMM9 |
(2582) 0x4b67c1 MOV -0xd8(%RBP),%R10 |
(2582) 0x4b67c8 MOV -0x48(%RBP),%R8 |
(2582) 0x4b67cc MOV -0x40(%RBP),%R9 |
(2582) 0x4b67d0 MOV -0x38(%RBP),%R11 |
(2582) 0x4b67d4 MOV -0xf0(%RBP),%RDX |
(2582) 0x4b67db MOV -0x108(%RBP),%RAX |
(2582) 0x4b67e2 ADD %RAX,%RDX |
(2582) 0x4b67e5 ADD %RAX,-0xa8(%RBP) |
(2582) 0x4b67ec ADD %RAX,%R10 |
(2582) 0x4b67ef ADD %RAX,-0xe8(%RBP) |
(2582) 0x4b67f6 CMP -0x110(%RBP),%RSI |
(2582) 0x4b67fd MOV -0x118(%RBP),%RSI |
(2582) 0x4b6804 JE 4b6663 |
(2582) 0x4b680a MOV -0x90(%RBP),%RAX |
(2582) 0x4b6811 CMP %RSI,%RAX |
(2582) 0x4b6814 MOV %RSI,%RCX |
(2582) 0x4b6817 CMOVL %RAX,%RCX |
(2582) 0x4b681b MOV %RCX,-0xd0(%RBP) |
(2582) 0x4b6822 LEA 0x1(%RSI),%RCX |
(2582) 0x4b6826 CMP %RAX,%RSI |
(2582) 0x4b6829 MOV %RSI,-0x60(%RBP) |
(2582) 0x4b682d JGE 4b6850 |
(2582) 0x4b682f MOV -0x100(%RBP),%RAX |
(2582) 0x4b6836 IMUL %RSI,%RAX |
(2582) 0x4b683a MOV %RAX,-0xb0(%RBP) |
(2582) 0x4b6841 MOV %RCX,%RDI |
(2582) 0x4b6844 JMP 4b6864 |
0x4b6846 NOPW %CS:(%RAX,%RAX,1) |
(2582) 0x4b6850 MOV %R8,%RDI |
(2582) 0x4b6853 IMUL %RSI,%RDI |
(2582) 0x4b6857 ADD %RAX,%RDI |
(2582) 0x4b685a MOV %RDI,-0xb0(%RBP) |
(2582) 0x4b6861 MOV %RAX,%RDI |
(2582) 0x4b6864 MOV -0xb8(%RBP),%RAX |
(2582) 0x4b686b MOV %RCX,%RSI |
(2582) 0x4b686e IMUL %R8,%RSI |
(2582) 0x4b6872 MOV %RDI,%R8 |
(2582) 0x4b6875 MOV %RDI,-0x88(%RBP) |
(2582) 0x4b687c ADD %RDI,%RSI |
(2582) 0x4b687f CMP $0x3,%RAX |
(2582) 0x4b6883 MOV %R10,-0xd8(%RBP) |
(2582) 0x4b688a MOV %RCX,-0x118(%RBP) |
(2582) 0x4b6891 MOV %RDX,-0xf0(%RBP) |
(2582) 0x4b6898 JA 4b8330 |
0x4b689e JMP 0x523ff8(,%RAX,8) |
0x4b68a5 CMP %RSI,-0xb0(%RBP) |
0x4b68ac JGE 4b8330 |
0x4b68b2 MOV -0x90(%RBP),%RAX |
0x4b68b9 MOV -0x60(%RBP),%RDI |
0x4b68bd CMP %RAX,%RDI |
0x4b68c0 MOV %RAX,%R8 |
0x4b68c3 CMOVL %RDI,%R8 |
0x4b68c7 MOV -0x48(%RBP),%RAX |
0x4b68cb MOV %R8,-0x80(%RBP) |
0x4b68cf SUB %R8,%RAX |
0x4b68d2 MOV -0x88(%RBP),%RDI |
0x4b68d9 ADD %RDI,%RAX |
0x4b68dc DEC %RAX |
0x4b68df MOV %RAX,-0x50(%RBP) |
0x4b68e3 TEST %R14,%R14 |
0x4b68e6 JE 4b7a13 |
0x4b68ec CMPQ $0,-0x98(%RBP) |
0x4b68f4 JE 4b7c16 |
0x4b68fa MOV -0x48(%RBP),%RAX |
0x4b68fe IMUL -0x60(%RBP),%RAX |
0x4b6903 ADD %RAX,-0x80(%RBP) |
0x4b6907 XOR %ECX,%ECX |
0x4b6909 JMP 4b6926 |
0x4b690b NOPL (%RAX,%RAX,1) |
(2632) 0x4b6910 MOV -0x68(%RBP),%RCX |
(2632) 0x4b6914 CMP -0x50(%RBP),%RCX |
(2632) 0x4b6918 LEA 0x1(%RCX),%RCX |
(2632) 0x4b691c MOV -0x40(%RBP),%R9 |
(2632) 0x4b6920 JE 4b7fa0 |
(2632) 0x4b6926 MOV -0x80(%RBP),%RAX |
(2632) 0x4b692a MOV %RCX,-0x68(%RBP) |
(2632) 0x4b692e LEA (%RAX,%RCX,1),%RDX |
(2632) 0x4b6932 MOV -0x30(%RBP),%RAX |
(2632) 0x4b6936 MOVQ $0,(%RAX,%RDX,8) |
(2632) 0x4b693e MOV (%R9,%RDX,8),%RAX |
(2632) 0x4b6942 MOV 0x8(%R9,%RDX,8),%R10 |
(2632) 0x4b6947 MOV (%R14,%RDX,8),%R9 |
(2632) 0x4b694b VXORPD %XMM0,%XMM0,%XMM0 |
(2632) 0x4b694f MOV %R10,%R8 |
(2632) 0x4b6952 SUB %RAX,%R8 |
(2632) 0x4b6955 JLE 4b69b0 |
(2632) 0x4b6957 CMP $0x4,%R8 |
(2632) 0x4b695b JAE 4b6a30 |
(2632) 0x4b6961 MOV %R8,%RDI |
(2632) 0x4b6964 AND $-0x4,%RDI |
(2632) 0x4b6968 CMP %R8,%RDI |
(2632) 0x4b696b JAE 4b69b0 |
(2632) 0x4b696d ADD %RDI,%RAX |
(2632) 0x4b6970 JMP 4b6988 |
0x4b6972 NOPW %CS:(%RAX,%RAX,1) |
(2635) 0x4b6980 INC %RAX |
(2635) 0x4b6983 CMP %RAX,%R10 |
(2635) 0x4b6986 JE 4b69b0 |
(2635) 0x4b6988 MOV (%RBX,%RAX,8),%RDI |
(2635) 0x4b698c CMP (%R14,%RDI,8),%R9 |
(2635) 0x4b6990 JNE 4b6980 |
(2635) 0x4b6992 VMOVSD (%R12,%RAX,8),%XMM1 |
(2635) 0x4b6998 VANDPD %XMM1,%XMM11,%XMM1 |
(2635) 0x4b699c VADDSD %XMM1,%XMM0,%XMM0 |
(2635) 0x4b69a0 MOV -0x30(%RBP),%RCX |
(2635) 0x4b69a4 VMOVSD %XMM0,(%RCX,%RDX,8) |
(2635) 0x4b69a9 JMP 4b6980 |
0x4b69ab NOPL (%RAX,%RAX,1) |
(2632) 0x4b69b0 MOV -0xa0(%RBP),%RCX |
(2632) 0x4b69b7 MOV (%RCX,%RDX,8),%RAX |
(2632) 0x4b69bb MOV 0x8(%RCX,%RDX,8),%R10 |
(2632) 0x4b69c0 MOV %R10,%R11 |
(2632) 0x4b69c3 SUB %RAX,%R11 |
(2632) 0x4b69c6 JLE 4b6910 |
(2632) 0x4b69cc CMP $0x4,%R11 |
(2632) 0x4b69d0 JAE 4b6b30 |
(2632) 0x4b69d6 MOV %R11,%RDI |
(2632) 0x4b69d9 AND $-0x4,%RDI |
(2632) 0x4b69dd CMP %R11,%RDI |
(2632) 0x4b69e0 JAE 4b6910 |
(2632) 0x4b69e6 ADD %RDI,%RAX |
(2632) 0x4b69e9 JMP 4b69fc |
0x4b69eb NOPL (%RAX,%RAX,1) |
(2633) 0x4b69f0 INC %RAX |
(2633) 0x4b69f3 CMP %RAX,%R10 |
(2633) 0x4b69f6 JE 4b6910 |
(2633) 0x4b69fc MOV (%R13,%RAX,8),%RDI |
(2633) 0x4b6a01 CMP (%R15,%RDI,8),%R9 |
(2633) 0x4b6a05 JNE 4b69f0 |
(2633) 0x4b6a07 MOV -0x38(%RBP),%RCX |
(2633) 0x4b6a0b VMOVSD (%RCX,%RAX,8),%XMM1 |
(2633) 0x4b6a10 VANDPD %XMM1,%XMM11,%XMM1 |
(2633) 0x4b6a14 VADDSD %XMM1,%XMM0,%XMM0 |
(2633) 0x4b6a18 MOV -0x30(%RBP),%RCX |
(2633) 0x4b6a1c VMOVSD %XMM0,(%RCX,%RDX,8) |
(2633) 0x4b6a21 JMP 4b69f0 |
0x4b6a23 NOPW %CS:(%RAX,%RAX,1) |
(2632) 0x4b6a30 MOV %R8,%R11 |
(2632) 0x4b6a33 SHR $0x2,%R11 |
(2632) 0x4b6a37 LEA 0x18(,%RAX,8),%RDI |
(2632) 0x4b6a3f JMP 4b6a5d |
0x4b6a41 NOPW %CS:(%RAX,%RAX,1) |
(2636) 0x4b6a50 ADD $0x20,%RDI |
(2636) 0x4b6a54 DEC %R11 |
(2636) 0x4b6a57 JE 4b6961 |
(2636) 0x4b6a5d MOV -0x18(%RBX,%RDI,1),%R14 |
(2636) 0x4b6a62 MOV -0x58(%RBP),%RCX |
(2636) 0x4b6a66 CMP (%RCX,%R14,8),%R9 |
(2636) 0x4b6a6a JNE 4b6af0 |
(2636) 0x4b6a70 VMOVSD -0x18(%R12,%RDI,1),%XMM1 |
(2636) 0x4b6a77 VANDPD %XMM1,%XMM11,%XMM1 |
(2636) 0x4b6a7b VADDSD %XMM1,%XMM0,%XMM0 |
(2636) 0x4b6a7f MOV -0x30(%RBP),%RCX |
(2636) 0x4b6a83 VMOVSD %XMM0,(%RCX,%RDX,8) |
(2636) 0x4b6a88 MOV -0x10(%RBX,%RDI,1),%R14 |
(2636) 0x4b6a8d MOV -0x58(%RBP),%RCX |
(2636) 0x4b6a91 CMP (%RCX,%R14,8),%R9 |
(2636) 0x4b6a95 JE 4b6aff |
(2636) 0x4b6a97 MOV -0x8(%RBX,%RDI,1),%R14 |
(2636) 0x4b6a9c MOV -0x58(%RBP),%RCX |
(2636) 0x4b6aa0 CMP (%RCX,%R14,8),%R9 |
(2636) 0x4b6aa4 JNE 4b6abe |
(2636) 0x4b6aa6 VMOVSD -0x8(%R12,%RDI,1),%XMM1 |
(2636) 0x4b6aad VANDPD %XMM1,%XMM11,%XMM1 |
(2636) 0x4b6ab1 VADDSD %XMM1,%XMM0,%XMM0 |
(2636) 0x4b6ab5 MOV -0x30(%RBP),%RCX |
(2636) 0x4b6ab9 VMOVSD %XMM0,(%RCX,%RDX,8) |
(2636) 0x4b6abe MOV (%RBX,%RDI,1),%R14 |
(2636) 0x4b6ac2 MOV -0x58(%RBP),%RCX |
(2636) 0x4b6ac6 CMP (%RCX,%R14,8),%R9 |
(2636) 0x4b6aca MOV %RCX,%R14 |
(2636) 0x4b6acd JNE 4b6a50 |
(2636) 0x4b6acf VMOVSD (%R12,%RDI,1),%XMM1 |
(2636) 0x4b6ad5 VANDPD %XMM1,%XMM11,%XMM1 |
(2636) 0x4b6ad9 VADDSD %XMM1,%XMM0,%XMM0 |
(2636) 0x4b6add MOV -0x30(%RBP),%RCX |
(2636) 0x4b6ae1 VMOVSD %XMM0,(%RCX,%RDX,8) |
(2636) 0x4b6ae6 JMP 4b6a50 |
0x4b6aeb NOPL (%RAX,%RAX,1) |
(2636) 0x4b6af0 MOV -0x10(%RBX,%RDI,1),%R14 |
(2636) 0x4b6af5 MOV -0x58(%RBP),%RCX |
(2636) 0x4b6af9 CMP (%RCX,%R14,8),%R9 |
(2636) 0x4b6afd JNE 4b6a97 |
(2636) 0x4b6aff VMOVSD -0x10(%R12,%RDI,1),%XMM1 |
(2636) 0x4b6b06 VANDPD %XMM1,%XMM11,%XMM1 |
(2636) 0x4b6b0a VADDSD %XMM1,%XMM0,%XMM0 |
(2636) 0x4b6b0e MOV -0x30(%RBP),%RCX |
(2636) 0x4b6b12 VMOVSD %XMM0,(%RCX,%RDX,8) |
(2636) 0x4b6b17 MOV -0x8(%RBX,%RDI,1),%R14 |
(2636) 0x4b6b1c MOV -0x58(%RBP),%RCX |
(2636) 0x4b6b20 CMP (%RCX,%R14,8),%R9 |
(2636) 0x4b6b24 JE 4b6aa6 |
(2636) 0x4b6b2a JMP 4b6abe |
0x4b6b2c NOPL (%RAX) |
(2632) 0x4b6b30 MOV %R11,%R8 |
(2632) 0x4b6b33 SHR $0x2,%R8 |
(2632) 0x4b6b37 LEA 0x18(,%RAX,8),%RDI |
(2632) 0x4b6b3f JMP 4b6b61 |
0x4b6b41 NOPW %CS:(%RAX,%RAX,1) |
(2634) 0x4b6b50 MOV -0x58(%RBP),%R14 |
(2634) 0x4b6b54 ADD $0x20,%RDI |
(2634) 0x4b6b58 DEC %R8 |
(2634) 0x4b6b5b JE 4b69d6 |
(2634) 0x4b6b61 MOV -0x18(%R13,%RDI,1),%R14 |
(2634) 0x4b6b66 CMP (%R15,%R14,8),%R9 |
(2634) 0x4b6b6a JNE 4b6bd0 |
(2634) 0x4b6b6c MOV -0x38(%RBP),%RCX |
(2634) 0x4b6b70 VMOVSD -0x18(%RCX,%RDI,1),%XMM1 |
(2634) 0x4b6b76 VANDPD %XMM1,%XMM11,%XMM1 |
(2634) 0x4b6b7a VADDSD %XMM1,%XMM0,%XMM0 |
(2634) 0x4b6b7e MOV -0x30(%RBP),%RCX |
(2634) 0x4b6b82 VMOVSD %XMM0,(%RCX,%RDX,8) |
(2634) 0x4b6b87 MOV -0x10(%R13,%RDI,1),%R14 |
(2634) 0x4b6b8c CMP (%R15,%R14,8),%R9 |
(2634) 0x4b6b90 JE 4b6bdb |
(2634) 0x4b6b92 MOV -0x8(%R13,%RDI,1),%R14 |
(2634) 0x4b6b97 CMP (%R15,%R14,8),%R9 |
(2634) 0x4b6b9b JNE 4b6c01 |
(2634) 0x4b6b9d MOV -0x38(%RBP),%RCX |
(2634) 0x4b6ba1 VMOVSD -0x8(%RCX,%RDI,1),%XMM1 |
(2634) 0x4b6ba7 VANDPD %XMM1,%XMM11,%XMM1 |
(2634) 0x4b6bab VADDSD %XMM1,%XMM0,%XMM0 |
(2634) 0x4b6baf MOV -0x30(%RBP),%RCX |
(2634) 0x4b6bb3 VMOVSD %XMM0,(%RCX,%RDX,8) |
(2634) 0x4b6bb8 MOV (%R13,%RDI,1),%R14 |
(2634) 0x4b6bbd CMP (%R15,%R14,8),%R9 |
(2634) 0x4b6bc1 JNE 4b6b50 |
(2634) 0x4b6bc3 JMP 4b6c10 |
0x4b6bc5 NOPW %CS:(%RAX,%RAX,1) |
(2634) 0x4b6bd0 MOV -0x10(%R13,%RDI,1),%R14 |
(2634) 0x4b6bd5 CMP (%R15,%R14,8),%R9 |
(2634) 0x4b6bd9 JNE 4b6b92 |
(2634) 0x4b6bdb MOV -0x38(%RBP),%RCX |
(2634) 0x4b6bdf VMOVSD -0x10(%RCX,%RDI,1),%XMM1 |
(2634) 0x4b6be5 VANDPD %XMM1,%XMM11,%XMM1 |
(2634) 0x4b6be9 VADDSD %XMM1,%XMM0,%XMM0 |
(2634) 0x4b6bed MOV -0x30(%RBP),%RCX |
(2634) 0x4b6bf1 VMOVSD %XMM0,(%RCX,%RDX,8) |
(2634) 0x4b6bf6 MOV -0x8(%R13,%RDI,1),%R14 |
(2634) 0x4b6bfb CMP (%R15,%R14,8),%R9 |
(2634) 0x4b6bff JE 4b6b9d |
(2634) 0x4b6c01 MOV (%R13,%RDI,1),%R14 |
(2634) 0x4b6c06 CMP (%R15,%R14,8),%R9 |
(2634) 0x4b6c0a JNE 4b6b50 |
(2634) 0x4b6c10 MOV -0x38(%RBP),%RCX |
(2634) 0x4b6c14 VMOVSD (%RCX,%RDI,1),%XMM1 |
(2634) 0x4b6c19 VANDPD %XMM1,%XMM11,%XMM1 |
(2634) 0x4b6c1d VADDSD %XMM1,%XMM0,%XMM0 |
(2634) 0x4b6c21 MOV -0x30(%RBP),%RCX |
(2634) 0x4b6c25 VMOVSD %XMM0,(%RCX,%RDX,8) |
(2634) 0x4b6c2a JMP 4b6b50 |
0x4b6c2f NOP |
0x4b6c30 CMP %RSI,-0xb0(%RBP) |
0x4b6c37 JGE 4b8330 |
0x4b6c3d MOV -0x90(%RBP),%RDI |
0x4b6c44 MOV -0x60(%RBP),%RAX |
0x4b6c48 CMP %RDI,%RAX |
0x4b6c4b CMOVL %RAX,%RDI |
0x4b6c4f MOV -0x48(%RBP),%RAX |
0x4b6c53 SUB %RDI,%RAX |
0x4b6c56 MOV -0x88(%RBP),%R8 |
0x4b6c5d ADD %R8,%RAX |
0x4b6c60 DEC %RAX |
0x4b6c63 MOV %RAX,-0x80(%RBP) |
0x4b6c67 TEST %R14,%R14 |
0x4b6c6a JE 4b7a36 |
0x4b6c70 CMPQ $0,-0x98(%RBP) |
0x4b6c78 JE 4b7ddd |
0x4b6c7e MOV -0x48(%RBP),%RAX |
0x4b6c82 IMUL -0x60(%RBP),%RAX |
0x4b6c87 ADD %RAX,%RDI |
0x4b6c8a XOR %EAX,%EAX |
0x4b6c8c JMP 4b6ca2 |
0x4b6c8e XCHG %AX,%AX |
(2624) 0x4b6c90 MOV -0x50(%RBP),%RAX |
(2624) 0x4b6c94 CMP -0x80(%RBP),%RAX |
(2624) 0x4b6c98 LEA 0x1(%RAX),%RAX |
(2624) 0x4b6c9c JE 4b831d |
(2624) 0x4b6ca2 MOV %RAX,-0x50(%RBP) |
(2624) 0x4b6ca6 LEA (%RDI,%RAX,1),%R9 |
(2624) 0x4b6caa MOV -0x30(%RBP),%RAX |
(2624) 0x4b6cae MOVQ $0,(%RAX,%R9,8) |
(2624) 0x4b6cb6 MOV -0x40(%RBP),%RAX |
(2624) 0x4b6cba MOV (%RAX,%R9,8),%RDX |
(2624) 0x4b6cbe MOV 0x8(%RAX,%R9,8),%R11 |
(2624) 0x4b6cc3 MOV (%R14,%R9,8),%R10 |
(2624) 0x4b6cc7 VXORPD %XMM0,%XMM0,%XMM0 |
(2624) 0x4b6ccb MOV %R11,%RAX |
(2624) 0x4b6cce SUB %RDX,%RAX |
(2624) 0x4b6cd1 JLE 4b6d40 |
(2624) 0x4b6cd3 MOV %RAX,-0x68(%RBP) |
(2624) 0x4b6cd7 CMP $0x4,%RAX |
(2624) 0x4b6cdb JAE 4b6dd0 |
(2624) 0x4b6ce1 MOV -0x68(%RBP),%RCX |
(2624) 0x4b6ce5 MOV %RCX,%RAX |
(2624) 0x4b6ce8 AND $-0x4,%RAX |
(2624) 0x4b6cec CMP %RCX,%RAX |
(2624) 0x4b6cef JAE 4b6d40 |
(2624) 0x4b6cf1 ADD %RAX,%RDX |
(2624) 0x4b6cf4 JMP 4b6d08 |
0x4b6cf6 NOPW %CS:(%RAX,%RAX,1) |
(2627) 0x4b6d00 INC %RDX |
(2627) 0x4b6d03 CMP %RDX,%R11 |
(2627) 0x4b6d06 JE 4b6d40 |
(2627) 0x4b6d08 MOV (%RBX,%RDX,8),%RAX |
(2627) 0x4b6d0c CMP %R9,%RAX |
(2627) 0x4b6d0f JE 4b6d1b |
(2627) 0x4b6d11 CMP %RDI,%RAX |
(2627) 0x4b6d14 JL 4b6d1b |
(2627) 0x4b6d16 CMP %RSI,%RAX |
(2627) 0x4b6d19 JL 4b6d00 |
(2627) 0x4b6d1b CMP (%R14,%RAX,8),%R10 |
(2627) 0x4b6d1f JNE 4b6d00 |
(2627) 0x4b6d21 VMOVSD (%R12,%RDX,8),%XMM1 |
(2627) 0x4b6d27 VANDPD %XMM1,%XMM11,%XMM1 |
(2627) 0x4b6d2b VADDSD %XMM1,%XMM0,%XMM0 |
(2627) 0x4b6d2f MOV -0x30(%RBP),%RAX |
(2627) 0x4b6d33 VMOVSD %XMM0,(%RAX,%R9,8) |
(2627) 0x4b6d39 JMP 4b6d00 |
0x4b6d3b NOPL (%RAX,%RAX,1) |
(2624) 0x4b6d40 MOV -0xa0(%RBP),%RCX |
(2624) 0x4b6d47 MOV (%RCX,%R9,8),%RAX |
(2624) 0x4b6d4b MOV 0x8(%RCX,%R9,8),%RCX |
(2624) 0x4b6d50 MOV %RCX,%RDX |
(2624) 0x4b6d53 SUB %RAX,%RDX |
(2624) 0x4b6d56 MOV -0x38(%RBP),%R11 |
(2624) 0x4b6d5a JLE 4b6c90 |
(2624) 0x4b6d60 CMP $0x4,%RDX |
(2624) 0x4b6d64 JAE 4b6ee0 |
(2624) 0x4b6d6a MOV %RDX,%R8 |
(2624) 0x4b6d6d AND $-0x4,%R8 |
(2624) 0x4b6d71 CMP %RDX,%R8 |
(2624) 0x4b6d74 MOV -0x38(%RBP),%R11 |
(2624) 0x4b6d78 JAE 4b6c90 |
(2624) 0x4b6d7e ADD %R8,%RAX |
(2624) 0x4b6d81 JMP 4b6d9c |
0x4b6d83 NOPW %CS:(%RAX,%RAX,1) |
(2625) 0x4b6d90 INC %RAX |
(2625) 0x4b6d93 CMP %RAX,%RCX |
(2625) 0x4b6d96 JE 4b6c90 |
(2625) 0x4b6d9c MOV (%R13,%RAX,8),%RDX |
(2625) 0x4b6da1 CMP (%R15,%RDX,8),%R10 |
(2625) 0x4b6da5 JNE 4b6d90 |
(2625) 0x4b6da7 VMOVSD (%R11,%RAX,8),%XMM1 |
(2625) 0x4b6dad VANDPD %XMM1,%XMM11,%XMM1 |
(2625) 0x4b6db1 VADDSD %XMM1,%XMM0,%XMM0 |
(2625) 0x4b6db5 MOV -0x30(%RBP),%RDX |
(2625) 0x4b6db9 VMOVSD %XMM0,(%RDX,%R9,8) |
(2625) 0x4b6dbf JMP 4b6d90 |
0x4b6dc1 NOPW %CS:(%RAX,%RAX,1) |
(2624) 0x4b6dd0 MOV -0x68(%RBP),%RAX |
(2624) 0x4b6dd4 SHR $0x2,%RAX |
(2624) 0x4b6dd8 LEA 0x18(,%RDX,8),%RCX |
(2624) 0x4b6de0 JMP 4b6dfd |
0x4b6de2 NOPW %CS:(%RAX,%RAX,1) |
(2628) 0x4b6df0 ADD $0x20,%RCX |
(2628) 0x4b6df4 DEC %RAX |
(2628) 0x4b6df7 JE 4b6ce1 |
(2628) 0x4b6dfd MOV -0x18(%RBX,%RCX,1),%R8 |
(2628) 0x4b6e02 CMP %R9,%R8 |
(2628) 0x4b6e05 JE 4b6e11 |
(2628) 0x4b6e07 CMP %RDI,%R8 |
(2628) 0x4b6e0a JL 4b6e11 |
(2628) 0x4b6e0c CMP %RSI,%R8 |
(2628) 0x4b6e0f JL 4b6e30 |
(2628) 0x4b6e11 CMP (%R14,%R8,8),%R10 |
(2628) 0x4b6e15 JNE 4b6e30 |
(2628) 0x4b6e17 VMOVSD -0x18(%R12,%RCX,1),%XMM1 |
(2628) 0x4b6e1e VANDPD %XMM1,%XMM11,%XMM1 |
(2628) 0x4b6e22 VADDSD %XMM1,%XMM0,%XMM0 |
(2628) 0x4b6e26 MOV -0x30(%RBP),%R8 |
(2628) 0x4b6e2a VMOVSD %XMM0,(%R8,%R9,8) |
(2628) 0x4b6e30 MOV -0x10(%RBX,%RCX,1),%R8 |
(2628) 0x4b6e35 CMP %R9,%R8 |
(2628) 0x4b6e38 JE 4b6e44 |
(2628) 0x4b6e3a CMP %RDI,%R8 |
(2628) 0x4b6e3d JL 4b6e44 |
(2628) 0x4b6e3f CMP %RSI,%R8 |
(2628) 0x4b6e42 JL 4b6e63 |
(2628) 0x4b6e44 CMP (%R14,%R8,8),%R10 |
(2628) 0x4b6e48 JNE 4b6e63 |
(2628) 0x4b6e4a VMOVSD -0x10(%R12,%RCX,1),%XMM1 |
(2628) 0x4b6e51 VANDPD %XMM1,%XMM11,%XMM1 |
(2628) 0x4b6e55 VADDSD %XMM1,%XMM0,%XMM0 |
(2628) 0x4b6e59 MOV -0x30(%RBP),%R8 |
(2628) 0x4b6e5d VMOVSD %XMM0,(%R8,%R9,8) |
(2628) 0x4b6e63 MOV -0x8(%RBX,%RCX,1),%R8 |
(2628) 0x4b6e68 CMP %R9,%R8 |
(2628) 0x4b6e6b JE 4b6e77 |
(2628) 0x4b6e6d CMP %RDI,%R8 |
(2628) 0x4b6e70 JL 4b6e77 |
(2628) 0x4b6e72 CMP %RSI,%R8 |
(2628) 0x4b6e75 JL 4b6e96 |
(2628) 0x4b6e77 CMP (%R14,%R8,8),%R10 |
(2628) 0x4b6e7b JNE 4b6e96 |
(2628) 0x4b6e7d VMOVSD -0x8(%R12,%RCX,1),%XMM1 |
(2628) 0x4b6e84 VANDPD %XMM1,%XMM11,%XMM1 |
(2628) 0x4b6e88 VADDSD %XMM1,%XMM0,%XMM0 |
(2628) 0x4b6e8c MOV -0x30(%RBP),%R8 |
(2628) 0x4b6e90 VMOVSD %XMM0,(%R8,%R9,8) |
(2628) 0x4b6e96 MOV (%RBX,%RCX,1),%R8 |
(2628) 0x4b6e9a CMP %R9,%R8 |
(2628) 0x4b6e9d JE 4b6ead |
(2628) 0x4b6e9f CMP %RDI,%R8 |
(2628) 0x4b6ea2 JL 4b6ead |
(2628) 0x4b6ea4 CMP %RSI,%R8 |
(2628) 0x4b6ea7 JL 4b6df0 |
(2628) 0x4b6ead CMP (%R14,%R8,8),%R10 |
(2628) 0x4b6eb1 JNE 4b6df0 |
(2628) 0x4b6eb7 VMOVSD (%R12,%RCX,1),%XMM1 |
(2628) 0x4b6ebd VANDPD %XMM1,%XMM11,%XMM1 |
(2628) 0x4b6ec1 VADDSD %XMM1,%XMM0,%XMM0 |
(2628) 0x4b6ec5 MOV -0x30(%RBP),%R8 |
(2628) 0x4b6ec9 VMOVSD %XMM0,(%R8,%R9,8) |
(2628) 0x4b6ecf JMP 4b6df0 |
0x4b6ed4 NOPW %CS:(%RAX,%RAX,1) |
(2624) 0x4b6ee0 MOV %RDX,%R8 |
(2624) 0x4b6ee3 SHR $0x2,%R8 |
(2624) 0x4b6ee7 LEA 0x18(,%RAX,8),%R11 |
(2624) 0x4b6eef JMP 4b6f11 |
0x4b6ef1 NOPW %CS:(%RAX,%RAX,1) |
(2626) 0x4b6f00 MOV -0x58(%RBP),%R14 |
(2626) 0x4b6f04 ADD $0x20,%R11 |
(2626) 0x4b6f08 DEC %R8 |
(2626) 0x4b6f0b JE 4b6d6a |
(2626) 0x4b6f11 MOV -0x18(%R13,%R11,1),%R14 |
(2626) 0x4b6f16 CMP (%R15,%R14,8),%R10 |
(2626) 0x4b6f1a JNE 4b6f80 |
(2626) 0x4b6f1c MOV -0x38(%RBP),%R14 |
(2626) 0x4b6f20 VMOVSD -0x18(%R14,%R11,1),%XMM1 |
(2626) 0x4b6f27 VANDPD %XMM1,%XMM11,%XMM1 |
(2626) 0x4b6f2b VADDSD %XMM1,%XMM0,%XMM0 |
(2626) 0x4b6f2f MOV -0x30(%RBP),%R14 |
(2626) 0x4b6f33 VMOVSD %XMM0,(%R14,%R9,8) |
(2626) 0x4b6f39 MOV -0x10(%R13,%R11,1),%R14 |
(2626) 0x4b6f3e CMP (%R15,%R14,8),%R10 |
(2626) 0x4b6f42 JE 4b6f8b |
(2626) 0x4b6f44 MOV -0x8(%R13,%R11,1),%R14 |
(2626) 0x4b6f49 CMP (%R15,%R14,8),%R10 |
(2626) 0x4b6f4d JNE 4b6fb3 |
(2626) 0x4b6f4f MOV -0x38(%RBP),%R14 |
(2626) 0x4b6f53 VMOVSD -0x8(%R14,%R11,1),%XMM1 |
(2626) 0x4b6f5a VANDPD %XMM1,%XMM11,%XMM1 |
(2626) 0x4b6f5e VADDSD %XMM1,%XMM0,%XMM0 |
(2626) 0x4b6f62 MOV -0x30(%RBP),%R14 |
(2626) 0x4b6f66 VMOVSD %XMM0,(%R14,%R9,8) |
(2626) 0x4b6f6c MOV (%R13,%R11,1),%R14 |
(2626) 0x4b6f71 CMP (%R15,%R14,8),%R10 |
(2626) 0x4b6f75 JNE 4b6f00 |
(2626) 0x4b6f77 JMP 4b6fc2 |
0x4b6f79 NOPL (%RAX) |
(2626) 0x4b6f80 MOV -0x10(%R13,%R11,1),%R14 |
(2626) 0x4b6f85 CMP (%R15,%R14,8),%R10 |
(2626) 0x4b6f89 JNE 4b6f44 |
(2626) 0x4b6f8b MOV -0x38(%RBP),%R14 |
(2626) 0x4b6f8f VMOVSD -0x10(%R14,%R11,1),%XMM1 |
(2626) 0x4b6f96 VANDPD %XMM1,%XMM11,%XMM1 |
(2626) 0x4b6f9a VADDSD %XMM1,%XMM0,%XMM0 |
(2626) 0x4b6f9e MOV -0x30(%RBP),%R14 |
(2626) 0x4b6fa2 VMOVSD %XMM0,(%R14,%R9,8) |
(2626) 0x4b6fa8 MOV -0x8(%R13,%R11,1),%R14 |
(2626) 0x4b6fad CMP (%R15,%R14,8),%R10 |
(2626) 0x4b6fb1 JE 4b6f4f |
(2626) 0x4b6fb3 MOV (%R13,%R11,1),%R14 |
(2626) 0x4b6fb8 CMP (%R15,%R14,8),%R10 |
(2626) 0x4b6fbc JNE 4b6f00 |
(2626) 0x4b6fc2 MOV -0x38(%RBP),%R14 |
(2626) 0x4b6fc6 VMOVSD (%R14,%R11,1),%XMM1 |
(2626) 0x4b6fcc VANDPD %XMM1,%XMM11,%XMM1 |
(2626) 0x4b6fd0 VADDSD %XMM1,%XMM0,%XMM0 |
(2626) 0x4b6fd4 MOV -0x30(%RBP),%R14 |
(2626) 0x4b6fd8 VMOVSD %XMM0,(%R14,%R9,8) |
(2626) 0x4b6fde JMP 4b6f00 |
0x4b6fe3 NOPW %CS:(%RAX,%RAX,1) |
0x4b6ff0 CMP %RSI,-0xb0(%RBP) |
0x4b6ff7 JGE 4b8330 |
0x4b6ffd MOV -0x90(%RBP),%RDI |
0x4b7004 MOV -0x60(%RBP),%R8 |
0x4b7008 CMP %RDI,%R8 |
0x4b700b CMOVL %R8,%RDI |
0x4b700f MOV -0x48(%RBP),%R10 |
0x4b7013 MOV %R10,%RAX |
0x4b7016 SUB %RDI,%RAX |
0x4b7019 MOV -0x88(%RBP),%R9 |
0x4b7020 ADD %R9,%RAX |
0x4b7023 DEC %RAX |
0x4b7026 MOV %RAX,-0x80(%RBP) |
0x4b702a CMPQ $0,-0x98(%RBP) |
0x4b7032 JE 4b7a57 |
0x4b7038 MOV %R10,%RAX |
0x4b703b IMUL %R8,%RAX |
0x4b703f ADD %RAX,%RDI |
0x4b7042 XOR %R9D,%R9D |
0x4b7045 JMP 4b773b |
0x4b704a NOPW (%RAX,%RAX,1) |
0x4b7050 CMP %RSI,-0xb0(%RBP) |
0x4b7057 JGE 4b8330 |
0x4b705d MOV -0x90(%RBP),%RAX |
0x4b7064 MOV -0x60(%RBP),%RDX |
0x4b7068 CMP %RAX,%RDX |
0x4b706b CMOVL %RDX,%RAX |
0x4b706f MOV -0x48(%RBP),%R8 |
0x4b7073 MOV %R8,%RCX |
0x4b7076 SUB %RAX,%RCX |
0x4b7079 MOV -0x88(%RBP),%RDI |
0x4b7080 ADD %RDI,%RCX |
0x4b7083 DEC %RCX |
0x4b7086 MOV %RCX,-0x50(%RBP) |
0x4b708a IMUL %RDX,%R8 |
0x4b708e ADD %RAX,%R8 |
0x4b7091 XOR %EDI,%EDI |
0x4b7093 JMP 4b70ae |
0x4b7095 NOPW %CS:(%RAX,%RAX,1) |
(2610) 0x4b70a0 CMP -0x50(%RBP),%RDI |
(2610) 0x4b70a4 LEA 0x1(%RDI),%RDI |
(2610) 0x4b70a8 JE 4b8330 |
(2610) 0x4b70ae LEA (%R8,%RDI,1),%R11 |
(2610) 0x4b70b2 MOV -0x30(%RBP),%RAX |
(2610) 0x4b70b6 LEA (%RAX,%R11,8),%R10 |
(2610) 0x4b70ba MOVQ $0,(%RAX,%R11,8) |
(2610) 0x4b70c2 MOV (%R9,%R11,8),%RCX |
(2610) 0x4b70c6 TEST %R14,%R14 |
(2610) 0x4b70c9 MOV %RDI,-0x80(%RBP) |
(2610) 0x4b70cd JE 4b71e0 |
(2610) 0x4b70d3 MOV (%R14,%R11,8),%RDX |
(2610) 0x4b70d7 MOV 0x8(%R9,%R11,8),%RAX |
(2610) 0x4b70dc VXORPD %XMM0,%XMM0,%XMM0 |
(2610) 0x4b70e0 CMP %RAX,%RCX |
(2610) 0x4b70e3 JL 4b715b |
(2610) 0x4b70e5 CMPQ $0,-0x98(%RBP) |
(2610) 0x4b70ed JE 4b71c0 |
(2610) 0x4b70f3 MOV -0xa0(%RBP),%RCX |
(2610) 0x4b70fa MOV (%RCX,%R11,8),%RAX |
(2610) 0x4b70fe MOV 0x8(%RCX,%R11,8),%RCX |
(2610) 0x4b7103 MOV %RCX,%RDI |
(2610) 0x4b7106 SUB %RAX,%RDI |
(2610) 0x4b7109 JLE 4b71c0 |
(2610) 0x4b710f CMP $0x4,%RDI |
(2610) 0x4b7113 JAE 4b7276 |
(2610) 0x4b7119 MOV %RDI,%R9 |
(2610) 0x4b711c AND $-0x4,%R9 |
(2610) 0x4b7120 CMP %RDI,%R9 |
(2610) 0x4b7123 JAE 4b736b |
(2610) 0x4b7129 ADD %R9,%RAX |
(2610) 0x4b712c MOV -0x38(%RBP),%R11 |
(2610) 0x4b7130 MOV -0x40(%RBP),%R9 |
(2610) 0x4b7134 JMP 4b7198 |
0x4b7136 NOPW %CS:(%RAX,%RAX,1) |
(2617) 0x4b7140 VMOVSD (%R12,%RCX,8),%XMM1 |
(2617) 0x4b7146 VANDPD %XMM1,%XMM11,%XMM15 |
(2617) 0x4b714a VADDSD %XMM0,%XMM15,%XMM0 |
(2617) 0x4b714e VMOVSD %XMM0,(%R10) |
(2617) 0x4b7153 INC %RCX |
(2617) 0x4b7156 CMP %RCX,%RAX |
(2617) 0x4b7159 JE 4b70e5 |
(2617) 0x4b715b MOV (%RBX,%RCX,8),%RDI |
(2617) 0x4b715f CMP %R11,%RDI |
(2617) 0x4b7162 JE 4b7140 |
(2617) 0x4b7164 CMP %R8,%RDI |
(2617) 0x4b7167 JL 4b716e |
(2617) 0x4b7169 CMP %RSI,%RDI |
(2617) 0x4b716c JL 4b7153 |
(2617) 0x4b716e CMP (%R14,%RDI,8),%RDX |
(2617) 0x4b7172 JNE 4b7153 |
(2617) 0x4b7174 VMOVSD (%R12,%RCX,8),%XMM1 |
(2617) 0x4b717a VANDPD %XMM1,%XMM11,%XMM1 |
(2617) 0x4b717e VFMADD231SD %XMM13,%XMM1,%XMM0 |
(2617) 0x4b7183 JMP 4b714e |
0x4b7185 NOPW %CS:(%RAX,%RAX,1) |
(2615) 0x4b7190 INC %RAX |
(2615) 0x4b7193 CMP %RAX,%RCX |
(2615) 0x4b7196 JE 4b71c4 |
(2615) 0x4b7198 MOV (%R13,%RAX,8),%RDI |
(2615) 0x4b719d CMP (%R15,%RDI,8),%RDX |
(2615) 0x4b71a1 JNE 4b7190 |
(2615) 0x4b71a3 VMOVSD (%R11,%RAX,8),%XMM1 |
(2615) 0x4b71a9 VANDPD %XMM1,%XMM11,%XMM1 |
(2615) 0x4b71ad VFMADD231SD %XMM13,%XMM1,%XMM0 |
(2615) 0x4b71b2 VMOVSD %XMM0,(%R10) |
(2615) 0x4b71b7 JMP 4b7190 |
0x4b71b9 NOPL (%RAX) |
(2610) 0x4b71c0 MOV -0x38(%RBP),%R11 |
(2610) 0x4b71c4 MOV -0x80(%RBP),%RDI |
(2610) 0x4b71c8 VMULSD %XMM14,%XMM15,%XMM1 |
(2610) 0x4b71cd VUCOMISD %XMM1,%XMM0 |
(2610) 0x4b71d1 JA 4b70a0 |
(2610) 0x4b71d7 JMP 4b7543 |
0x4b71dc NOPL (%RAX) |
(2610) 0x4b71e0 MOV 0x8(%R9,%R11,8),%RDX |
(2610) 0x4b71e5 VXORPD %XMM0,%XMM0,%XMM0 |
(2610) 0x4b71e9 MOV %RDX,%RAX |
(2610) 0x4b71ec SUB %RCX,%RAX |
(2610) 0x4b71ef JLE 4b74ca |
(2610) 0x4b71f5 CMP $0x4,%RAX |
(2610) 0x4b71f9 MOV %RAX,-0x68(%RBP) |
(2610) 0x4b71fd JAE 4b7378 |
(2610) 0x4b7203 MOV -0x68(%RBP),%RDI |
(2610) 0x4b7207 MOV %RDI,%RAX |
(2610) 0x4b720a AND $-0x4,%RAX |
(2610) 0x4b720e CMP %RDI,%RAX |
(2610) 0x4b7211 JAE 4b74c2 |
(2610) 0x4b7217 ADD %RAX,%RCX |
(2610) 0x4b721a MOV -0x40(%RBP),%R9 |
(2610) 0x4b721e MOV -0x80(%RBP),%RDI |
(2610) 0x4b7222 JMP 4b7253 |
0x4b7224 NOPW %CS:(%RAX,%RAX,1) |
(2613) 0x4b7230 VMOVSD (%R12,%RCX,8),%XMM1 |
(2613) 0x4b7236 VANDPD %XMM1,%XMM11,%XMM1 |
(2613) 0x4b723a VMOVAPD %XMM1,%XMM15 |
(2613) 0x4b723e VADDSD %XMM0,%XMM1,%XMM0 |
(2613) 0x4b7242 VMOVSD %XMM0,(%R10) |
(2613) 0x4b7247 INC %RCX |
(2613) 0x4b724a CMP %RCX,%RDX |
(2613) 0x4b724d JE 4b74ca |
(2613) 0x4b7253 MOV (%RBX,%RCX,8),%RAX |
(2613) 0x4b7257 CMP %R11,%RAX |
(2613) 0x4b725a JE 4b7230 |
(2613) 0x4b725c CMP %R8,%RAX |
(2613) 0x4b725f JL 4b7266 |
(2613) 0x4b7261 CMP %RSI,%RAX |
(2613) 0x4b7264 JL 4b7247 |
(2613) 0x4b7266 VMOVSD (%R12,%RCX,8),%XMM1 |
(2613) 0x4b726c VANDPD %XMM1,%XMM11,%XMM1 |
(2613) 0x4b7270 VMULSD %XMM1,%XMM13,%XMM1 |
(2613) 0x4b7274 JMP 4b723e |
(2610) 0x4b7276 MOV %RDI,%R11 |
(2610) 0x4b7279 SHR $0x2,%R11 |
(2610) 0x4b727d LEA 0x18(,%RAX,8),%R9 |
(2610) 0x4b7285 JMP 4b72a1 |
0x4b7287 NOPW (%RAX,%RAX,1) |
(2616) 0x4b7290 MOV -0x58(%RBP),%R14 |
(2616) 0x4b7294 ADD $0x20,%R9 |
(2616) 0x4b7298 DEC %R11 |
(2616) 0x4b729b JE 4b7119 |
(2616) 0x4b72a1 MOV -0x18(%R13,%R9,1),%R14 |
(2616) 0x4b72a6 CMP (%R15,%R14,8),%RDX |
(2616) 0x4b72aa JNE 4b7310 |
(2616) 0x4b72ac MOV -0x38(%RBP),%R14 |
(2616) 0x4b72b0 VMOVSD -0x18(%R14,%R9,1),%XMM1 |
(2616) 0x4b72b7 VANDPD %XMM1,%XMM11,%XMM1 |
(2616) 0x4b72bb VFMADD231SD %XMM13,%XMM1,%XMM0 |
(2616) 0x4b72c0 VMOVSD %XMM0,(%R10) |
(2616) 0x4b72c5 MOV -0x10(%R13,%R9,1),%R14 |
(2616) 0x4b72ca CMP (%R15,%R14,8),%RDX |
(2616) 0x4b72ce JE 4b731b |
(2616) 0x4b72d0 MOV -0x8(%R13,%R9,1),%R14 |
(2616) 0x4b72d5 CMP (%R15,%R14,8),%RDX |
(2616) 0x4b72d9 JNE 4b733f |
(2616) 0x4b72db MOV -0x38(%RBP),%R14 |
(2616) 0x4b72df VMOVSD -0x8(%R14,%R9,1),%XMM1 |
(2616) 0x4b72e6 VANDPD %XMM1,%XMM11,%XMM1 |
(2616) 0x4b72ea VFMADD231SD %XMM13,%XMM1,%XMM0 |
(2616) 0x4b72ef VMOVSD %XMM0,(%R10) |
(2616) 0x4b72f4 MOV (%R13,%R9,1),%R14 |
(2616) 0x4b72f9 CMP (%R15,%R14,8),%RDX |
(2616) 0x4b72fd JNE 4b7290 |
(2616) 0x4b72ff JMP 4b734e |
0x4b7301 NOPW %CS:(%RAX,%RAX,1) |
(2616) 0x4b7310 MOV -0x10(%R13,%R9,1),%R14 |
(2616) 0x4b7315 CMP (%R15,%R14,8),%RDX |
(2616) 0x4b7319 JNE 4b72d0 |
(2616) 0x4b731b MOV -0x38(%RBP),%R14 |
(2616) 0x4b731f VMOVSD -0x10(%R14,%R9,1),%XMM1 |
(2616) 0x4b7326 VANDPD %XMM1,%XMM11,%XMM1 |
(2616) 0x4b732a VFMADD231SD %XMM13,%XMM1,%XMM0 |
(2616) 0x4b732f VMOVSD %XMM0,(%R10) |
(2616) 0x4b7334 MOV -0x8(%R13,%R9,1),%R14 |
(2616) 0x4b7339 CMP (%R15,%R14,8),%RDX |
(2616) 0x4b733d JE 4b72db |
(2616) 0x4b733f MOV (%R13,%R9,1),%R14 |
(2616) 0x4b7344 CMP (%R15,%R14,8),%RDX |
(2616) 0x4b7348 JNE 4b7290 |
(2616) 0x4b734e MOV -0x38(%RBP),%R14 |
(2616) 0x4b7352 VMOVSD (%R14,%R9,1),%XMM1 |
(2616) 0x4b7358 VANDPD %XMM1,%XMM11,%XMM1 |
(2616) 0x4b735c VFMADD231SD %XMM13,%XMM1,%XMM0 |
(2616) 0x4b7361 VMOVSD %XMM0,(%R10) |
(2616) 0x4b7366 JMP 4b7290 |
(2610) 0x4b736b MOV -0x38(%RBP),%R11 |
(2610) 0x4b736f MOV -0x40(%RBP),%R9 |
(2610) 0x4b7373 JMP 4b71c4 |
(2610) 0x4b7378 MOV %RAX,%RDI |
(2610) 0x4b737b SHR $0x2,%RDI |
(2610) 0x4b737f LEA 0x18(,%RCX,8),%RAX |
(2610) 0x4b7387 JMP 4b73b4 |
0x4b7389 NOPL (%RAX) |
(2614) 0x4b7390 VMOVSD (%R12,%RAX,1),%XMM1 |
(2614) 0x4b7396 VANDPD %XMM1,%XMM11,%XMM1 |
(2614) 0x4b739a VMOVAPD %XMM1,%XMM15 |
(2614) 0x4b739e VADDSD %XMM0,%XMM1,%XMM0 |
(2614) 0x4b73a2 VMOVSD %XMM0,(%R10) |
(2614) 0x4b73a7 ADD $0x20,%RAX |
(2614) 0x4b73ab DEC %RDI |
(2614) 0x4b73ae JE 4b7203 |
(2614) 0x4b73b4 MOV -0x18(%RBX,%RAX,1),%R9 |
(2614) 0x4b73b9 CMP %R11,%R9 |
(2614) 0x4b73bc JNE 4b73d0 |
(2614) 0x4b73be VMOVSD -0x18(%R12,%RAX,1),%XMM1 |
(2614) 0x4b73c5 VANDPD %XMM1,%XMM11,%XMM1 |
(2614) 0x4b73c9 VMOVAPD %XMM1,%XMM15 |
(2614) 0x4b73cd JMP 4b740f |
0x4b73cf NOP |
(2614) 0x4b73d0 CMP %R8,%R9 |
(2614) 0x4b73d3 JL 4b7400 |
(2614) 0x4b73d5 CMP %RSI,%R9 |
(2614) 0x4b73d8 JGE 4b7400 |
(2614) 0x4b73da MOV -0x10(%RBX,%RAX,1),%R9 |
(2614) 0x4b73df CMP %R11,%R9 |
(2614) 0x4b73e2 JNE 4b7422 |
(2614) 0x4b73e4 VMOVSD -0x10(%R12,%RAX,1),%XMM1 |
(2614) 0x4b73eb VANDPD %XMM1,%XMM11,%XMM1 |
(2614) 0x4b73ef VMOVAPD %XMM1,%XMM15 |
(2614) 0x4b73f3 JMP 4b745f |
0x4b73f5 NOPW %CS:(%RAX,%RAX,1) |
(2614) 0x4b7400 VMOVSD -0x18(%R12,%RAX,1),%XMM1 |
(2614) 0x4b7407 VANDPD %XMM1,%XMM11,%XMM1 |
(2614) 0x4b740b VMULSD %XMM1,%XMM13,%XMM1 |
(2614) 0x4b740f VADDSD %XMM0,%XMM1,%XMM0 |
(2614) 0x4b7413 VMOVSD %XMM0,(%R10) |
(2614) 0x4b7418 MOV -0x10(%RBX,%RAX,1),%R9 |
(2614) 0x4b741d CMP %R11,%R9 |
(2614) 0x4b7420 JE 4b73e4 |
(2614) 0x4b7422 CMP %R8,%R9 |
(2614) 0x4b7425 JL 4b7450 |
(2614) 0x4b7427 CMP %RSI,%R9 |
(2614) 0x4b742a JGE 4b7450 |
(2614) 0x4b742c MOV -0x8(%RBX,%RAX,1),%R9 |
(2614) 0x4b7431 CMP %R11,%R9 |
(2614) 0x4b7434 JNE 4b7472 |
(2614) 0x4b7436 VMOVSD -0x8(%R12,%RAX,1),%XMM1 |
(2614) 0x4b743d VANDPD %XMM1,%XMM11,%XMM1 |
(2614) 0x4b7441 VMOVAPD %XMM1,%XMM15 |
(2614) 0x4b7445 JMP 4b748b |
0x4b7447 NOPW (%RAX,%RAX,1) |
(2614) 0x4b7450 VMOVSD -0x10(%R12,%RAX,1),%XMM1 |
(2614) 0x4b7457 VANDPD %XMM1,%XMM11,%XMM1 |
(2614) 0x4b745b VMULSD %XMM1,%XMM13,%XMM1 |
(2614) 0x4b745f VADDSD %XMM0,%XMM1,%XMM0 |
(2614) 0x4b7463 VMOVSD %XMM0,(%R10) |
(2614) 0x4b7468 MOV -0x8(%RBX,%RAX,1),%R9 |
(2614) 0x4b746d CMP %R11,%R9 |
(2614) 0x4b7470 JE 4b7436 |
(2614) 0x4b7472 CMP %R8,%R9 |
(2614) 0x4b7475 JL 4b747c |
(2614) 0x4b7477 CMP %RSI,%R9 |
(2614) 0x4b747a JL 4b7494 |
(2614) 0x4b747c VMOVSD -0x8(%R12,%RAX,1),%XMM1 |
(2614) 0x4b7483 VANDPD %XMM1,%XMM11,%XMM1 |
(2614) 0x4b7487 VMULSD %XMM1,%XMM13,%XMM1 |
(2614) 0x4b748b VADDSD %XMM0,%XMM1,%XMM0 |
(2614) 0x4b748f VMOVSD %XMM0,(%R10) |
(2614) 0x4b7494 MOV (%RBX,%RAX,1),%R9 |
(2614) 0x4b7498 CMP %R11,%R9 |
(2614) 0x4b749b JE 4b7390 |
(2614) 0x4b74a1 CMP %R8,%R9 |
(2614) 0x4b74a4 JL 4b74af |
(2614) 0x4b74a6 CMP %RSI,%R9 |
(2614) 0x4b74a9 JL 4b73a7 |
(2614) 0x4b74af VMOVSD (%R12,%RAX,1),%XMM1 |
(2614) 0x4b74b5 VANDPD %XMM1,%XMM11,%XMM1 |
(2614) 0x4b74b9 VMULSD %XMM1,%XMM13,%XMM1 |
(2614) 0x4b74bd JMP 4b739e |
(2610) 0x4b74c2 MOV -0x40(%RBP),%R9 |
(2610) 0x4b74c6 MOV -0x80(%RBP),%RDI |
(2610) 0x4b74ca CMPQ $0,-0x98(%RBP) |
(2610) 0x4b74d2 JE 4b7530 |
(2610) 0x4b74d4 MOV -0xa0(%RBP),%RAX |
(2610) 0x4b74db MOV (%RAX,%R11,8),%RCX |
(2610) 0x4b74df MOV 0x8(%RAX,%R11,8),%RDX |
(2610) 0x4b74e4 MOV %RDX,%RAX |
(2610) 0x4b74e7 SUB %RCX,%RAX |
(2610) 0x4b74ea JLE 4b7530 |
(2610) 0x4b74ec MOV -0x38(%RBP),%R11 |
(2610) 0x4b74f0 LEA (%R11,%RDX,8),%RDI |
(2610) 0x4b74f4 ADD $-0x8,%RDI |
(2610) 0x4b74f8 CMP %R10,%RDI |
(2610) 0x4b74fb JB 4b754d |
(2610) 0x4b74fd LEA (%R11,%RCX,8),%RDI |
(2610) 0x4b7501 CMP %RDI,%R10 |
(2610) 0x4b7504 JB 4b754d |
(2610) 0x4b7506 MOV -0x80(%RBP),%RDI |
(2610) 0x4b750a NOPW (%RAX,%RAX,1) |
(2612) 0x4b7510 VMOVSD (%R11,%RCX,8),%XMM1 |
(2612) 0x4b7516 VANDPD %XMM1,%XMM11,%XMM1 |
(2612) 0x4b751a VFMADD231SD %XMM13,%XMM1,%XMM0 |
(2612) 0x4b751f VMOVSD %XMM0,(%R10) |
(2612) 0x4b7524 INC %RCX |
(2612) 0x4b7527 CMP %RCX,%RDX |
(2612) 0x4b752a JNE 4b7510 |
(2610) 0x4b752c JMP 4b7534 |
0x4b752e XCHG %AX,%AX |
(2610) 0x4b7530 MOV -0x38(%RBP),%R11 |
(2610) 0x4b7534 VMULSD %XMM14,%XMM15,%XMM1 |
(2610) 0x4b7539 VUCOMISD %XMM1,%XMM0 |
(2610) 0x4b753d JA 4b70a0 |
(2610) 0x4b7543 VMOVSD %XMM15,(%R10) |
(2610) 0x4b7548 JMP 4b70a0 |
(2610) 0x4b754d CMP $0x8,%RAX |
(2610) 0x4b7551 JB 4b75e7 |
(2610) 0x4b7557 MOV %RAX,%RDX |
(2610) 0x4b755a SHR $0x3,%RDX |
(2610) 0x4b755e MOV -0xc0(%RBP),%RDI |
(2610) 0x4b7565 LEA (%RDI,%RCX,8),%RDI |
(2610) 0x4b7569 NOPL (%RAX) |
(2611) 0x4b7570 VMOVSD -0x38(%RDI),%XMM1 |
(2611) 0x4b7575 VMOVSD -0x30(%RDI),%XMM2 |
(2611) 0x4b757a VMOVSD -0x28(%RDI),%XMM3 |
(2611) 0x4b757f VMOVSD -0x20(%RDI),%XMM4 |
(2611) 0x4b7584 VANDPD %XMM1,%XMM12,%XMM1 |
(2611) 0x4b7588 VFMADD213SD %XMM0,%XMM13,%XMM1 |
(2611) 0x4b758d VANDPD %XMM2,%XMM12,%XMM0 |
(2611) 0x4b7591 VFMADD213SD %XMM1,%XMM13,%XMM0 |
(2611) 0x4b7596 VANDPD %XMM3,%XMM12,%XMM1 |
(2611) 0x4b759a VFMADD213SD %XMM0,%XMM13,%XMM1 |
(2611) 0x4b759f VANDPD %XMM4,%XMM12,%XMM0 |
(2611) 0x4b75a3 VFMADD213SD %XMM1,%XMM13,%XMM0 |
(2611) 0x4b75a8 VMOVSD -0x18(%RDI),%XMM1 |
(2611) 0x4b75ad VANDPD %XMM1,%XMM12,%XMM1 |
(2611) 0x4b75b1 VFMADD213SD %XMM0,%XMM13,%XMM1 |
(2611) 0x4b75b6 VMOVSD -0x10(%RDI),%XMM0 |
(2611) 0x4b75bb VANDPD %XMM0,%XMM12,%XMM2 |
(2611) 0x4b75bf VFMADD213SD %XMM1,%XMM13,%XMM2 |
(2611) 0x4b75c4 VMOVSD -0x8(%RDI),%XMM0 |
(2611) 0x4b75c9 VANDPD %XMM0,%XMM12,%XMM0 |
(2611) 0x4b75cd VMOVSD (%RDI),%XMM1 |
(2611) 0x4b75d1 VANDPD %XMM1,%XMM12,%XMM1 |
(2611) 0x4b75d5 VADDSD %XMM0,%XMM1,%XMM0 |
(2611) 0x4b75d9 VFMADD213SD %XMM2,%XMM13,%XMM0 |
(2611) 0x4b75de ADD $0x40,%RDI |
(2611) 0x4b75e2 DEC %RDX |
(2611) 0x4b75e5 JNE 4b7570 |
(2610) 0x4b75e7 MOV %EAX,%EDX |
(2610) 0x4b75e9 AND $0x7,%EDX |
(2610) 0x4b75ec DEC %RDX |
(2610) 0x4b75ef CMP $0x6,%RDX |
(2610) 0x4b75f3 JA 4b760c |
0x4b75f5 AND $-0x8,%RAX |
0x4b75f9 MOV -0x80(%RBP),%RDI |
0x4b75fd JMP 0x524018(,%RDX,8) |
0x4b7604 ADD %RAX,%RCX |
0x4b7607 JMP 4b76a6 |
(2610) 0x4b760c VMOVSD %XMM0,(%R10) |
(2610) 0x4b7611 JMP 4b71c4 |
0x4b7616 ADD %RAX,%RCX |
0x4b7619 JMP 4b7692 |
0x4b761b ADD %RAX,%RCX |
0x4b761e JMP 4b767e |
0x4b7620 ADD %RAX,%RCX |
0x4b7623 JMP 4b766a |
0x4b7625 ADD %RAX,%RCX |
0x4b7628 JMP 4b7656 |
0x4b762a ADD %RAX,%RCX |
0x4b762d JMP 4b7642 |
0x4b762f ADD %RAX,%RCX |
0x4b7632 VMOVSD 0x30(%R11,%RCX,8),%XMM1 |
0x4b7639 VANDPD %XMM1,%XMM11,%XMM1 |
0x4b763d VFMADD231SD %XMM13,%XMM1,%XMM0 |
0x4b7642 VMOVSD 0x28(%R11,%RCX,8),%XMM1 |
0x4b7649 VANDPD %XMM1,%XMM11,%XMM1 |
0x4b764d VFMADD132SD %XMM13,%XMM0,%XMM1 |
0x4b7652 VMOVAPD %XMM1,%XMM0 |
0x4b7656 VMOVSD 0x20(%R11,%RCX,8),%XMM1 |
0x4b765d VANDPD %XMM1,%XMM11,%XMM1 |
0x4b7661 VFMADD132SD %XMM13,%XMM0,%XMM1 |
0x4b7666 VMOVAPD %XMM1,%XMM0 |
0x4b766a VMOVSD 0x18(%R11,%RCX,8),%XMM1 |
0x4b7671 VANDPD %XMM1,%XMM11,%XMM1 |
0x4b7675 VFMADD132SD %XMM13,%XMM0,%XMM1 |
0x4b767a VMOVAPD %XMM1,%XMM0 |
0x4b767e VMOVSD 0x10(%R11,%RCX,8),%XMM1 |
0x4b7685 VANDPD %XMM1,%XMM11,%XMM1 |
0x4b7689 VFMADD132SD %XMM13,%XMM0,%XMM1 |
0x4b768e VMOVAPD %XMM1,%XMM0 |
0x4b7692 VMOVSD 0x8(%R11,%RCX,8),%XMM1 |
0x4b7699 VANDPD %XMM1,%XMM11,%XMM1 |
0x4b769d VFMADD132SD %XMM13,%XMM0,%XMM1 |
0x4b76a2 VMOVAPD %XMM1,%XMM0 |
0x4b76a6 VMOVSD (%R11,%RCX,8),%XMM1 |
0x4b76ac VANDPD %XMM1,%XMM11,%XMM1 |
0x4b76b0 VFMADD132SD %XMM13,%XMM0,%XMM1 |
0x4b76b5 VMOVSD %XMM1,(%R10) |
0x4b76ba VMOVAPD %XMM1,%XMM0 |
0x4b76be VMULSD %XMM14,%XMM15,%XMM1 |
0x4b76c3 VUCOMISD %XMM1,%XMM0 |
0x4b76c7 JA 4b70a0 |
0x4b76cd JMP 4b7543 |
0x4b76d2 ADD %RAX,%RDX |
0x4b76d5 VMOVSD 0x30(%R11,%RDX,8),%XMM1 |
0x4b76dc VFMADD231SD %XMM1,%XMM1,%XMM0 |
0x4b76e1 VMOVSD 0x28(%R11,%RDX,8),%XMM1 |
0x4b76e8 VFMADD231SD %XMM1,%XMM1,%XMM0 |
0x4b76ed VMOVSD 0x20(%R11,%RDX,8),%XMM1 |
0x4b76f4 VFMADD231SD %XMM1,%XMM1,%XMM0 |
0x4b76f9 VMOVSD 0x18(%R11,%RDX,8),%XMM1 |
0x4b7700 VFMADD231SD %XMM1,%XMM1,%XMM0 |
0x4b7705 VMOVSD 0x10(%R11,%RDX,8),%XMM1 |
0x4b770c VFMADD231SD %XMM1,%XMM1,%XMM0 |
0x4b7711 VMOVSD 0x8(%R11,%RDX,8),%XMM1 |
0x4b7718 VFMADD231SD %XMM1,%XMM1,%XMM0 |
0x4b771d VMOVSD (%R11,%RDX,8),%XMM1 |
0x4b7723 VFMADD213SD %XMM0,%XMM1,%XMM1 |
0x4b7728 VMOVSD %XMM1,(%R10) |
(2605) 0x4b772d CMP -0x80(%RBP),%R9 |
(2605) 0x4b7731 LEA 0x1(%R9),%R9 |
(2605) 0x4b7735 JE 4b831d |
(2605) 0x4b773b LEA (%RDI,%R9,1),%RCX |
(2605) 0x4b773f MOV -0x30(%RBP),%RAX |
(2605) 0x4b7743 LEA (%RAX,%RCX,8),%R10 |
(2605) 0x4b7747 MOVQ $0,(%RAX,%RCX,8) |
(2605) 0x4b774f MOV -0x40(%RBP),%RAX |
(2605) 0x4b7753 MOV (%RAX,%RCX,8),%RDX |
(2605) 0x4b7757 MOV 0x8(%RAX,%RCX,8),%R8 |
(2605) 0x4b775c VXORPD %XMM0,%XMM0,%XMM0 |
(2605) 0x4b7760 MOV %R8,%RAX |
(2605) 0x4b7763 SUB %RDX,%RAX |
(2605) 0x4b7766 JLE 4b78e0 |
(2605) 0x4b776c LEA (%R12,%R8,8),%R11 |
(2605) 0x4b7770 ADD $-0x8,%R11 |
(2605) 0x4b7774 CMP %R10,%R11 |
(2605) 0x4b7777 JB 4b77b0 |
(2605) 0x4b7779 LEA (%R12,%RDX,8),%R11 |
(2605) 0x4b777d CMP %R11,%R10 |
(2605) 0x4b7780 JB 4b77b0 |
(2605) 0x4b7782 MOV -0x38(%RBP),%R11 |
(2605) 0x4b7786 NOPW %CS:(%RAX,%RAX,1) |
(2609) 0x4b7790 VMOVSD (%R12,%RDX,8),%XMM1 |
(2609) 0x4b7796 VFMADD231SD %XMM1,%XMM1,%XMM0 |
(2609) 0x4b779b VMOVSD %XMM0,(%R10) |
(2609) 0x4b77a0 INC %RDX |
(2609) 0x4b77a3 CMP %RDX,%R8 |
(2609) 0x4b77a6 JNE 4b7790 |
(2605) 0x4b77a8 JMP 4b78e0 |
0x4b77ad NOPL (%RAX) |
(2605) 0x4b77b0 VXORPD %XMM1,%XMM1,%XMM1 |
(2605) 0x4b77b4 CMP $0x8,%RAX |
(2605) 0x4b77b8 JB 4b7830 |
(2605) 0x4b77ba MOV %RAX,%R11 |
(2605) 0x4b77bd SHR $0x3,%R11 |
(2605) 0x4b77c1 MOV -0xc8(%RBP),%R8 |
(2605) 0x4b77c8 LEA (%R8,%RDX,8),%R8 |
(2605) 0x4b77cc NOPL (%RAX) |
(2608) 0x4b77d0 VMOVSD -0x38(%R8),%XMM0 |
(2608) 0x4b77d6 VMOVSD -0x30(%R8),%XMM2 |
(2608) 0x4b77dc VFMADD213SD %XMM1,%XMM0,%XMM0 |
(2608) 0x4b77e1 VFMADD231SD %XMM2,%XMM2,%XMM0 |
(2608) 0x4b77e6 VMOVSD -0x28(%R8),%XMM1 |
(2608) 0x4b77ec VFMADD213SD %XMM0,%XMM1,%XMM1 |
(2608) 0x4b77f1 VMOVSD -0x20(%R8),%XMM0 |
(2608) 0x4b77f7 VFMADD213SD %XMM1,%XMM0,%XMM0 |
(2608) 0x4b77fc VMOVSD -0x18(%R8),%XMM1 |
(2608) 0x4b7802 VFMADD213SD %XMM0,%XMM1,%XMM1 |
(2608) 0x4b7807 VMOVSD -0x10(%R8),%XMM0 |
(2608) 0x4b780d VFMADD213SD %XMM1,%XMM0,%XMM0 |
(2608) 0x4b7812 VMOVSD -0x8(%R8),%XMM2 |
(2608) 0x4b7818 VFMADD213SD %XMM0,%XMM2,%XMM2 |
(2608) 0x4b781d VMOVSD (%R8),%XMM1 |
(2608) 0x4b7822 VFMADD213SD %XMM2,%XMM1,%XMM1 |
(2608) 0x4b7827 ADD $0x40,%R8 |
(2608) 0x4b782b DEC %R11 |
(2608) 0x4b782e JNE 4b77d0 |
(2605) 0x4b7830 MOV %EAX,%R8D |
(2605) 0x4b7833 AND $0x7,%R8D |
(2605) 0x4b7837 DEC %R8 |
(2605) 0x4b783a CMP $0x6,%R8 |
(2605) 0x4b783e JA 4b7855 |
0x4b7840 AND $-0x8,%RAX |
0x4b7844 JMP 0x524050(,%R8,8) |
0x4b784c ADD %RAX,%RDX |
0x4b784f MOV -0x38(%RBP),%R11 |
0x4b7853 JMP 4b78d0 |
(2605) 0x4b7855 VMOVSD %XMM1,(%R10) |
(2605) 0x4b785a VMOVAPD %XMM1,%XMM0 |
(2605) 0x4b785e MOV -0x38(%RBP),%R11 |
(2605) 0x4b7862 JMP 4b78e0 |
0x4b7864 ADD %RAX,%RDX |
0x4b7867 MOV -0x38(%RBP),%R11 |
0x4b786b JMP 4b78c4 |
0x4b786d ADD %RAX,%RDX |
0x4b7870 JMP 4b78b4 |
0x4b7872 ADD %RAX,%RDX |
0x4b7875 JMP 4b78a8 |
0x4b7877 ADD %RAX,%RDX |
0x4b787a JMP 4b789c |
0x4b787c ADD %RAX,%RDX |
0x4b787f JMP 4b7890 |
0x4b7881 ADD %RAX,%RDX |
0x4b7884 VMOVSD 0x30(%R12,%RDX,8),%XMM0 |
0x4b788b VFMADD231SD %XMM0,%XMM0,%XMM1 |
0x4b7890 VMOVSD 0x28(%R12,%RDX,8),%XMM0 |
0x4b7897 VFMADD231SD %XMM0,%XMM0,%XMM1 |
0x4b789c VMOVSD 0x20(%R12,%RDX,8),%XMM0 |
0x4b78a3 VFMADD231SD %XMM0,%XMM0,%XMM1 |
0x4b78a8 VMOVSD 0x18(%R12,%RDX,8),%XMM0 |
0x4b78af VFMADD231SD %XMM0,%XMM0,%XMM1 |
0x4b78b4 MOV -0x38(%RBP),%R11 |
0x4b78b8 VMOVSD 0x10(%R12,%RDX,8),%XMM0 |
0x4b78bf VFMADD231SD %XMM0,%XMM0,%XMM1 |
0x4b78c4 VMOVSD 0x8(%R12,%RDX,8),%XMM0 |
0x4b78cb VFMADD231SD %XMM0,%XMM0,%XMM1 |
0x4b78d0 VMOVSD (%R12,%RDX,8),%XMM0 |
0x4b78d6 VFMADD213SD %XMM1,%XMM0,%XMM0 |
0x4b78db VMOVSD %XMM0,(%R10) |
(2605) 0x4b78e0 MOV -0xa0(%RBP),%RAX |
(2605) 0x4b78e7 MOV (%RAX,%RCX,8),%RDX |
(2605) 0x4b78eb MOV 0x8(%RAX,%RCX,8),%RCX |
(2605) 0x4b78f0 MOV %RCX,%RAX |
(2605) 0x4b78f3 SUB %RDX,%RAX |
(2605) 0x4b78f6 JLE 4b772d |
(2605) 0x4b78fc LEA (%R11,%RCX,8),%R8 |
(2605) 0x4b7900 ADD $-0x8,%R8 |
(2605) 0x4b7904 CMP %R10,%R8 |
(2605) 0x4b7907 JB 4b7940 |
(2605) 0x4b7909 LEA (%R11,%RDX,8),%R8 |
(2605) 0x4b790d CMP %R8,%R10 |
(2605) 0x4b7910 JB 4b7940 |
(2605) 0x4b7912 NOPW %CS:(%RAX,%RAX,1) |
(2607) 0x4b7920 VMOVSD (%R11,%RDX,8),%XMM1 |
(2607) 0x4b7926 VFMADD231SD %XMM1,%XMM1,%XMM0 |
(2607) 0x4b792b VMOVSD %XMM0,(%R10) |
(2607) 0x4b7930 INC %RDX |
(2607) 0x4b7933 CMP %RDX,%RCX |
(2607) 0x4b7936 JNE 4b7920 |
(2605) 0x4b7938 JMP 4b772d |
0x4b793d NOPL (%RAX) |
(2605) 0x4b7940 CMP $0x8,%RAX |
(2605) 0x4b7944 JB 4b79c0 |
(2605) 0x4b7946 MOV %RAX,%RCX |
(2605) 0x4b7949 SHR $0x3,%RCX |
(2605) 0x4b794d MOV -0xc0(%RBP),%R8 |
(2605) 0x4b7954 LEA (%R8,%RDX,8),%R8 |
(2605) 0x4b7958 NOPL (%RAX,%RAX,1) |
(2606) 0x4b7960 VMOVSD -0x38(%R8),%XMM1 |
(2606) 0x4b7966 VMOVSD -0x30(%R8),%XMM2 |
(2606) 0x4b796c VFMADD213SD %XMM0,%XMM1,%XMM1 |
(2606) 0x4b7971 VFMADD231SD %XMM2,%XMM2,%XMM1 |
(2606) 0x4b7976 VMOVSD -0x28(%R8),%XMM0 |
(2606) 0x4b797c VFMADD213SD %XMM1,%XMM0,%XMM0 |
(2606) 0x4b7981 VMOVSD -0x20(%R8),%XMM1 |
(2606) 0x4b7987 VFMADD213SD %XMM0,%XMM1,%XMM1 |
(2606) 0x4b798c VMOVSD -0x18(%R8),%XMM0 |
(2606) 0x4b7992 VFMADD213SD %XMM1,%XMM0,%XMM0 |
(2606) 0x4b7997 VMOVSD -0x10(%R8),%XMM1 |
(2606) 0x4b799d VFMADD213SD %XMM0,%XMM1,%XMM1 |
(2606) 0x4b79a2 VMOVSD -0x8(%R8),%XMM2 |
(2606) 0x4b79a8 VFMADD213SD %XMM1,%XMM2,%XMM2 |
(2606) 0x4b79ad VMOVSD (%R8),%XMM0 |
(2606) 0x4b79b2 VFMADD213SD %XMM2,%XMM0,%XMM0 |
(2606) 0x4b79b7 ADD $0x40,%R8 |
(2606) 0x4b79bb DEC %RCX |
(2606) 0x4b79be JNE 4b7960 |
(2605) 0x4b79c0 MOV %EAX,%ECX |
(2605) 0x4b79c2 AND $0x7,%ECX |
(2605) 0x4b79c5 DEC %RCX |
(2605) 0x4b79c8 CMP $0x6,%RCX |
(2605) 0x4b79cc JA 4b79e1 |
0x4b79ce AND $-0x8,%RAX |
0x4b79d2 JMP 0x524088(,%RCX,8) |
0x4b79d9 ADD %RAX,%RDX |
0x4b79dc JMP 4b771d |
(2605) 0x4b79e1 VMOVSD %XMM0,(%R10) |
(2605) 0x4b79e6 JMP 4b772d |
0x4b79eb ADD %RAX,%RDX |
0x4b79ee JMP 4b7711 |
0x4b79f3 ADD %RAX,%RDX |
0x4b79f6 JMP 4b7705 |
0x4b79fb ADD %RAX,%RDX |
0x4b79fe JMP 4b76f9 |
0x4b7a03 ADD %RAX,%RDX |
0x4b7a06 JMP 4b76ed |
0x4b7a0b ADD %RAX,%RDX |
0x4b7a0e JMP 4b76e1 |
0x4b7a13 CMPQ $0,-0x98(%RBP) |
0x4b7a1b JE 4b88c5 |
0x4b7a21 MOV -0x48(%RBP),%RAX |
0x4b7a25 IMUL -0x60(%RBP),%RAX |
0x4b7a2a ADD %RAX,-0x80(%RBP) |
0x4b7a2e XOR %R9D,%R9D |
0x4b7a31 JMP 4b8018 |
0x4b7a36 CMPQ $0,-0x98(%RBP) |
0x4b7a3e JE 4b88d9 |
0x4b7a44 MOV -0x48(%RBP),%RAX |
0x4b7a48 IMUL -0x60(%RBP),%RAX |
0x4b7a4d ADD %RAX,%RDI |
0x4b7a50 XOR %EAX,%EAX |
0x4b7a52 JMP 4b85f4 |
0x4b7a57 MOV %R10,%RAX |
0x4b7a5a IMUL %R8,%RAX |
0x4b7a5e ADD %RAX,%RDI |
0x4b7a61 XOR %ECX,%ECX |
0x4b7a63 JMP 4b7ace |
0x4b7a65 ADD %RAX,%RDX |
0x4b7a68 VMOVSD 0x30(%R12,%RDX,8),%XMM1 |
0x4b7a6f VFMADD231SD %XMM1,%XMM1,%XMM0 |
0x4b7a74 VMOVSD 0x28(%R12,%RDX,8),%XMM1 |
0x4b7a7b VFMADD231SD %XMM1,%XMM1,%XMM0 |
0x4b7a80 VMOVSD 0x20(%R12,%RDX,8),%XMM1 |
0x4b7a87 VFMADD231SD %XMM1,%XMM1,%XMM0 |
0x4b7a8c VMOVSD 0x18(%R12,%RDX,8),%XMM1 |
0x4b7a93 VFMADD231SD %XMM1,%XMM1,%XMM0 |
0x4b7a98 VMOVSD 0x10(%R12,%RDX,8),%XMM1 |
0x4b7a9f VFMADD231SD %XMM1,%XMM1,%XMM0 |
0x4b7aa4 VMOVSD 0x8(%R12,%RDX,8),%XMM1 |
0x4b7aab VFMADD231SD %XMM1,%XMM1,%XMM0 |
0x4b7ab0 VMOVSD (%R12,%RDX,8),%XMM1 |
0x4b7ab6 VFMADD213SD %XMM0,%XMM1,%XMM1 |
0x4b7abb VMOVSD %XMM1,(%R9) |
(2602) 0x4b7ac0 CMP -0x80(%RBP),%RCX |
(2602) 0x4b7ac4 LEA 0x1(%RCX),%RCX |
(2602) 0x4b7ac8 JE 4b831d |
(2602) 0x4b7ace LEA (%RDI,%RCX,1),%R9 |
(2602) 0x4b7ad2 MOV -0x30(%RBP),%RAX |
(2602) 0x4b7ad6 MOVQ $0,(%RAX,%R9,8) |
(2602) 0x4b7ade MOV -0x40(%RBP),%RAX |
(2602) 0x4b7ae2 MOV (%RAX,%R9,8),%RDX |
(2602) 0x4b7ae6 MOV 0x8(%RAX,%R9,8),%R8 |
(2602) 0x4b7aeb MOV %R8,%RAX |
(2602) 0x4b7aee SUB %RDX,%RAX |
(2602) 0x4b7af1 JLE 4b7ac0 |
(2602) 0x4b7af3 MOV -0x30(%RBP),%R10 |
(2602) 0x4b7af7 LEA (%R10,%R9,8),%R9 |
(2602) 0x4b7afb LEA (%R12,%R8,8),%R10 |
(2602) 0x4b7aff ADD $-0x8,%R10 |
(2602) 0x4b7b03 CMP %R9,%R10 |
(2602) 0x4b7b06 JB 4b7b40 |
(2602) 0x4b7b08 LEA (%R12,%RDX,8),%R10 |
(2602) 0x4b7b0c CMP %R10,%R9 |
(2602) 0x4b7b0f JB 4b7b40 |
(2602) 0x4b7b11 VXORPD %XMM0,%XMM0,%XMM0 |
(2602) 0x4b7b15 NOPW %CS:(%RAX,%RAX,1) |
(2604) 0x4b7b20 VMOVSD (%R12,%RDX,8),%XMM1 |
(2604) 0x4b7b26 VFMADD231SD %XMM1,%XMM1,%XMM0 |
(2604) 0x4b7b2b VMOVSD %XMM0,(%R9) |
(2604) 0x4b7b30 INC %RDX |
(2604) 0x4b7b33 CMP %RDX,%R8 |
(2604) 0x4b7b36 JNE 4b7b20 |
(2602) 0x4b7b38 JMP 4b7ac0 |
0x4b7b3a NOPW (%RAX,%RAX,1) |
(2602) 0x4b7b40 VXORPD %XMM0,%XMM0,%XMM0 |
(2602) 0x4b7b44 CMP $0x8,%RAX |
(2602) 0x4b7b48 JB 4b7bc0 |
(2602) 0x4b7b4a MOV %RAX,%R10 |
(2602) 0x4b7b4d SHR $0x3,%R10 |
(2602) 0x4b7b51 MOV -0xc8(%RBP),%R8 |
(2602) 0x4b7b58 LEA (%R8,%RDX,8),%R8 |
(2602) 0x4b7b5c NOPL (%RAX) |
(2603) 0x4b7b60 VMOVSD -0x38(%R8),%XMM1 |
(2603) 0x4b7b66 VMOVSD -0x30(%R8),%XMM2 |
(2603) 0x4b7b6c VFMADD213SD %XMM0,%XMM1,%XMM1 |
(2603) 0x4b7b71 VFMADD231SD %XMM2,%XMM2,%XMM1 |
(2603) 0x4b7b76 VMOVSD -0x28(%R8),%XMM0 |
(2603) 0x4b7b7c VFMADD213SD %XMM1,%XMM0,%XMM0 |
(2603) 0x4b7b81 VMOVSD -0x20(%R8),%XMM1 |
(2603) 0x4b7b87 VFMADD213SD %XMM0,%XMM1,%XMM1 |
(2603) 0x4b7b8c VMOVSD -0x18(%R8),%XMM0 |
(2603) 0x4b7b92 VFMADD213SD %XMM1,%XMM0,%XMM0 |
(2603) 0x4b7b97 VMOVSD -0x10(%R8),%XMM1 |
(2603) 0x4b7b9d VFMADD213SD %XMM0,%XMM1,%XMM1 |
(2603) 0x4b7ba2 VMOVSD -0x8(%R8),%XMM2 |
(2603) 0x4b7ba8 VFMADD213SD %XMM1,%XMM2,%XMM2 |
(2603) 0x4b7bad VMOVSD (%R8),%XMM0 |
(2603) 0x4b7bb2 VFMADD213SD %XMM2,%XMM0,%XMM0 |
(2603) 0x4b7bb7 ADD $0x40,%R8 |
(2603) 0x4b7bbb DEC %R10 |
(2603) 0x4b7bbe JNE 4b7b60 |
(2602) 0x4b7bc0 MOV %EAX,%R8D |
(2602) 0x4b7bc3 AND $0x7,%R8D |
(2602) 0x4b7bc7 DEC %R8 |
(2602) 0x4b7bca CMP $0x6,%R8 |
(2602) 0x4b7bce JA 4b7be4 |
0x4b7bd0 AND $-0x8,%RAX |
0x4b7bd4 JMP 0x5240c0(,%R8,8) |
0x4b7bdc ADD %RAX,%RDX |
0x4b7bdf JMP 4b7ab0 |
(2602) 0x4b7be4 VMOVSD %XMM0,(%R9) |
(2602) 0x4b7be9 JMP 4b7ac0 |
0x4b7bee ADD %RAX,%RDX |
0x4b7bf1 JMP 4b7aa4 |
0x4b7bf6 ADD %RAX,%RDX |
0x4b7bf9 JMP 4b7a98 |
0x4b7bfe ADD %RAX,%RDX |
0x4b7c01 JMP 4b7a8c |
0x4b7c06 ADD %RAX,%RDX |
0x4b7c09 JMP 4b7a80 |
0x4b7c0e ADD %RAX,%RDX |
0x4b7c11 JMP 4b7a74 |
0x4b7c16 MOV -0x48(%RBP),%RAX |
0x4b7c1a IMUL -0x60(%RBP),%RAX |
0x4b7c1f ADD %RAX,-0x80(%RBP) |
0x4b7c23 XOR %EAX,%EAX |
0x4b7c25 JMP 4b7c42 |
0x4b7c27 NOPW (%RAX,%RAX,1) |
(2629) 0x4b7c30 CMP -0x50(%RBP),%RAX |
(2629) 0x4b7c34 LEA 0x1(%RAX),%RAX |
(2629) 0x4b7c38 MOV -0x40(%RBP),%R9 |
(2629) 0x4b7c3c JE 4b8330 |
(2629) 0x4b7c42 MOV -0x80(%RBP),%RCX |
(2629) 0x4b7c46 ADD %RAX,%RCX |
(2629) 0x4b7c49 MOV -0x30(%RBP),%RDX |
(2629) 0x4b7c4d MOVQ $0,(%RDX,%RCX,8) |
(2629) 0x4b7c55 MOV (%R9,%RCX,8),%RDX |
(2629) 0x4b7c59 MOV 0x8(%R9,%RCX,8),%R9 |
(2629) 0x4b7c5e MOV %R9,%RDI |
(2629) 0x4b7c61 SUB %RDX,%RDI |
(2629) 0x4b7c64 JLE 4b7c30 |
(2629) 0x4b7c66 MOV (%R14,%RCX,8),%R10 |
(2629) 0x4b7c6a VXORPD %XMM0,%XMM0,%XMM0 |
(2629) 0x4b7c6e MOV %RDI,-0x68(%RBP) |
(2629) 0x4b7c72 CMP $0x4,%RDI |
(2629) 0x4b7c76 JAE 4b7cd0 |
(2629) 0x4b7c78 MOV -0x68(%RBP),%R8 |
(2629) 0x4b7c7c MOV %R8,%RDI |
(2629) 0x4b7c7f AND $-0x4,%RDI |
(2629) 0x4b7c83 CMP %R8,%RDI |
(2629) 0x4b7c86 MOV -0x38(%RBP),%R11 |
(2629) 0x4b7c8a JAE 4b7c30 |
(2629) 0x4b7c8c ADD %RDI,%RDX |
(2629) 0x4b7c8f JMP 4b7ca8 |
0x4b7c91 NOPW %CS:(%RAX,%RAX,1) |
(2630) 0x4b7ca0 INC %RDX |
(2630) 0x4b7ca3 CMP %RDX,%R9 |
(2630) 0x4b7ca6 JE 4b7c30 |
(2630) 0x4b7ca8 MOV (%RBX,%RDX,8),%RDI |
(2630) 0x4b7cac CMP (%R14,%RDI,8),%R10 |
(2630) 0x4b7cb0 JNE 4b7ca0 |
(2630) 0x4b7cb2 VMOVSD (%R12,%RDX,8),%XMM1 |
(2630) 0x4b7cb8 VANDPD %XMM1,%XMM11,%XMM1 |
(2630) 0x4b7cbc VADDSD %XMM1,%XMM0,%XMM0 |
(2630) 0x4b7cc0 MOV -0x30(%RBP),%RDI |
(2630) 0x4b7cc4 VMOVSD %XMM0,(%RDI,%RCX,8) |
(2630) 0x4b7cc9 JMP 4b7ca0 |
0x4b7ccb NOPL (%RAX,%RAX,1) |
(2629) 0x4b7cd0 MOV -0x68(%RBP),%R8 |
(2629) 0x4b7cd4 SHR $0x2,%R8 |
(2629) 0x4b7cd8 LEA 0x18(,%RDX,8),%RDI |
(2629) 0x4b7ce0 JMP 4b7cfd |
0x4b7ce2 NOPW %CS:(%RAX,%RAX,1) |
(2631) 0x4b7cf0 ADD $0x20,%RDI |
(2631) 0x4b7cf4 DEC %R8 |
(2631) 0x4b7cf7 JE 4b7c78 |
(2631) 0x4b7cfd MOV -0x18(%RBX,%RDI,1),%R14 |
(2631) 0x4b7d02 MOV -0x58(%RBP),%R11 |
(2631) 0x4b7d06 CMP (%R11,%R14,8),%R10 |
(2631) 0x4b7d0a JNE 4b7da0 |
(2631) 0x4b7d10 VMOVSD -0x18(%R12,%RDI,1),%XMM1 |
(2631) 0x4b7d17 VANDPD %XMM1,%XMM11,%XMM1 |
(2631) 0x4b7d1b VADDSD %XMM1,%XMM0,%XMM0 |
(2631) 0x4b7d1f MOV -0x30(%RBP),%R11 |
(2631) 0x4b7d23 VMOVSD %XMM0,(%R11,%RCX,8) |
(2631) 0x4b7d29 MOV -0x10(%RBX,%RDI,1),%R14 |
(2631) 0x4b7d2e MOV -0x58(%RBP),%R11 |
(2631) 0x4b7d32 CMP (%R11,%R14,8),%R10 |
(2631) 0x4b7d36 JE 4b7daf |
(2631) 0x4b7d38 MOV -0x8(%RBX,%RDI,1),%R14 |
(2631) 0x4b7d3d MOV -0x58(%RBP),%R11 |
(2631) 0x4b7d41 CMP (%R11,%R14,8),%R10 |
(2631) 0x4b7d45 JNE 4b7d60 |
(2631) 0x4b7d47 VMOVSD -0x8(%R12,%RDI,1),%XMM1 |
(2631) 0x4b7d4e VANDPD %XMM1,%XMM11,%XMM1 |
(2631) 0x4b7d52 VADDSD %XMM1,%XMM0,%XMM0 |
(2631) 0x4b7d56 MOV -0x30(%RBP),%R11 |
(2631) 0x4b7d5a VMOVSD %XMM0,(%R11,%RCX,8) |
(2631) 0x4b7d60 MOV (%RBX,%RDI,1),%R14 |
(2631) 0x4b7d64 MOV -0x58(%RBP),%R11 |
(2631) 0x4b7d68 CMP (%R11,%R14,8),%R10 |
(2631) 0x4b7d6c MOV %R11,%R14 |
(2631) 0x4b7d6f JNE 4b7cf0 |
(2631) 0x4b7d75 VMOVSD (%R12,%RDI,1),%XMM1 |
(2631) 0x4b7d7b VANDPD %XMM1,%XMM11,%XMM1 |
(2631) 0x4b7d7f VADDSD %XMM1,%XMM0,%XMM0 |
(2631) 0x4b7d83 MOV -0x30(%RBP),%R11 |
(2631) 0x4b7d87 VMOVSD %XMM0,(%R11,%RCX,8) |
(2631) 0x4b7d8d JMP 4b7cf0 |
0x4b7d92 NOPW %CS:(%RAX,%RAX,1) |
(2631) 0x4b7da0 MOV -0x10(%RBX,%RDI,1),%R14 |
(2631) 0x4b7da5 MOV -0x58(%RBP),%R11 |
(2631) 0x4b7da9 CMP (%R11,%R14,8),%R10 |
(2631) 0x4b7dad JNE 4b7d38 |
(2631) 0x4b7daf VMOVSD -0x10(%R12,%RDI,1),%XMM1 |
(2631) 0x4b7db6 VANDPD %XMM1,%XMM11,%XMM1 |
(2631) 0x4b7dba VADDSD %XMM1,%XMM0,%XMM0 |
(2631) 0x4b7dbe MOV -0x30(%RBP),%R11 |
(2631) 0x4b7dc2 VMOVSD %XMM0,(%R11,%RCX,8) |
(2631) 0x4b7dc8 MOV -0x8(%RBX,%RDI,1),%R14 |
(2631) 0x4b7dcd MOV -0x58(%RBP),%R11 |
(2631) 0x4b7dd1 CMP (%R11,%R14,8),%R10 |
(2631) 0x4b7dd5 JE 4b7d47 |
(2631) 0x4b7ddb JMP 4b7d60 |
0x4b7ddd MOV -0x48(%RBP),%RAX |
0x4b7de1 IMUL -0x60(%RBP),%RAX |
0x4b7de6 ADD %RAX,%RDI |
0x4b7de9 XOR %ECX,%ECX |
0x4b7deb JMP 4b7e02 |
0x4b7ded NOPL (%RAX) |
(2621) 0x4b7df0 CMP -0x80(%RBP),%RCX |
(2621) 0x4b7df4 LEA 0x1(%RCX),%RCX |
(2621) 0x4b7df8 MOV -0x40(%RBP),%R9 |
(2621) 0x4b7dfc JE 4b7fa0 |
(2621) 0x4b7e02 LEA (%RDI,%RCX,1),%RDX |
(2621) 0x4b7e06 MOV -0x30(%RBP),%RAX |
(2621) 0x4b7e0a MOVQ $0,(%RAX,%RDX,8) |
(2621) 0x4b7e12 MOV %R9,%RAX |
(2621) 0x4b7e15 MOV (%R9,%RDX,8),%R9 |
(2621) 0x4b7e19 MOV 0x8(%RAX,%RDX,8),%R10 |
(2621) 0x4b7e1e MOV %R10,%RAX |
(2621) 0x4b7e21 SUB %R9,%RAX |
(2621) 0x4b7e24 JLE 4b7df0 |
(2621) 0x4b7e26 MOV %RCX,-0x68(%RBP) |
(2621) 0x4b7e2a MOV (%R14,%RDX,8),%R11 |
(2621) 0x4b7e2e VXORPD %XMM0,%XMM0,%XMM0 |
(2621) 0x4b7e32 MOV %RAX,-0x50(%RBP) |
(2621) 0x4b7e36 CMP $0x4,%RAX |
(2621) 0x4b7e3a JAE 4b7ea0 |
(2621) 0x4b7e3c MOV -0x50(%RBP),%RCX |
(2621) 0x4b7e40 MOV %RCX,%RAX |
(2621) 0x4b7e43 AND $-0x4,%RAX |
(2621) 0x4b7e47 CMP %RCX,%RAX |
(2621) 0x4b7e4a MOV -0x68(%RBP),%RCX |
(2621) 0x4b7e4e JAE 4b7df0 |
(2621) 0x4b7e50 ADD %RAX,%R9 |
(2621) 0x4b7e53 JMP 4b7e68 |
0x4b7e55 NOPW %CS:(%RAX,%RAX,1) |
(2622) 0x4b7e60 INC %R9 |
(2622) 0x4b7e63 CMP %R9,%R10 |
(2622) 0x4b7e66 JE 4b7df0 |
(2622) 0x4b7e68 MOV (%RBX,%R9,8),%RAX |
(2622) 0x4b7e6c CMP %RDX,%RAX |
(2622) 0x4b7e6f JE 4b7e7b |
(2622) 0x4b7e71 CMP %RDI,%RAX |
(2622) 0x4b7e74 JL 4b7e7b |
(2622) 0x4b7e76 CMP %RSI,%RAX |
(2622) 0x4b7e79 JL 4b7e60 |
(2622) 0x4b7e7b CMP (%R14,%RAX,8),%R11 |
(2622) 0x4b7e7f JNE 4b7e60 |
(2622) 0x4b7e81 VMOVSD (%R12,%R9,8),%XMM1 |
(2622) 0x4b7e87 VANDPD %XMM1,%XMM11,%XMM1 |
(2622) 0x4b7e8b VADDSD %XMM1,%XMM0,%XMM0 |
(2622) 0x4b7e8f MOV -0x30(%RBP),%RAX |
(2622) 0x4b7e93 VMOVSD %XMM0,(%RAX,%RDX,8) |
(2622) 0x4b7e98 JMP 4b7e60 |
0x4b7e9a NOPW (%RAX,%RAX,1) |
(2621) 0x4b7ea0 MOV -0x50(%RBP),%R8 |
(2621) 0x4b7ea4 SHR $0x2,%R8 |
(2621) 0x4b7ea8 LEA 0x18(,%R9,8),%RAX |
(2621) 0x4b7eb0 JMP 4b7ecd |
0x4b7eb2 NOPW %CS:(%RAX,%RAX,1) |
(2623) 0x4b7ec0 ADD $0x20,%RAX |
(2623) 0x4b7ec4 DEC %R8 |
(2623) 0x4b7ec7 JE 4b7e3c |
(2623) 0x4b7ecd MOV -0x18(%RBX,%RAX,1),%RCX |
(2623) 0x4b7ed2 CMP %RDX,%RCX |
(2623) 0x4b7ed5 JE 4b7ee1 |
(2623) 0x4b7ed7 CMP %RDI,%RCX |
(2623) 0x4b7eda JL 4b7ee1 |
(2623) 0x4b7edc CMP %RSI,%RCX |
(2623) 0x4b7edf JL 4b7eff |
(2623) 0x4b7ee1 CMP (%R14,%RCX,8),%R11 |
(2623) 0x4b7ee5 JNE 4b7eff |
(2623) 0x4b7ee7 VMOVSD -0x18(%R12,%RAX,1),%XMM1 |
(2623) 0x4b7eee VANDPD %XMM1,%XMM11,%XMM1 |
(2623) 0x4b7ef2 VADDSD %XMM1,%XMM0,%XMM0 |
(2623) 0x4b7ef6 MOV -0x30(%RBP),%RCX |
(2623) 0x4b7efa VMOVSD %XMM0,(%RCX,%RDX,8) |
(2623) 0x4b7eff MOV -0x10(%RBX,%RAX,1),%RCX |
(2623) 0x4b7f04 CMP %RDX,%RCX |
(2623) 0x4b7f07 JE 4b7f13 |
(2623) 0x4b7f09 CMP %RDI,%RCX |
(2623) 0x4b7f0c JL 4b7f13 |
(2623) 0x4b7f0e CMP %RSI,%RCX |
(2623) 0x4b7f11 JL 4b7f31 |
(2623) 0x4b7f13 CMP (%R14,%RCX,8),%R11 |
(2623) 0x4b7f17 JNE 4b7f31 |
(2623) 0x4b7f19 VMOVSD -0x10(%R12,%RAX,1),%XMM1 |
(2623) 0x4b7f20 VANDPD %XMM1,%XMM11,%XMM1 |
(2623) 0x4b7f24 VADDSD %XMM1,%XMM0,%XMM0 |
(2623) 0x4b7f28 MOV -0x30(%RBP),%RCX |
(2623) 0x4b7f2c VMOVSD %XMM0,(%RCX,%RDX,8) |
(2623) 0x4b7f31 MOV -0x8(%RBX,%RAX,1),%RCX |
(2623) 0x4b7f36 CMP %RDX,%RCX |
(2623) 0x4b7f39 JE 4b7f45 |
(2623) 0x4b7f3b CMP %RDI,%RCX |
(2623) 0x4b7f3e JL 4b7f45 |
(2623) 0x4b7f40 CMP %RSI,%RCX |
(2623) 0x4b7f43 JL 4b7f63 |
(2623) 0x4b7f45 CMP (%R14,%RCX,8),%R11 |
(2623) 0x4b7f49 JNE 4b7f63 |
(2623) 0x4b7f4b VMOVSD -0x8(%R12,%RAX,1),%XMM1 |
(2623) 0x4b7f52 VANDPD %XMM1,%XMM11,%XMM1 |
(2623) 0x4b7f56 VADDSD %XMM1,%XMM0,%XMM0 |
(2623) 0x4b7f5a MOV -0x30(%RBP),%RCX |
(2623) 0x4b7f5e VMOVSD %XMM0,(%RCX,%RDX,8) |
(2623) 0x4b7f63 MOV (%RBX,%RAX,1),%RCX |
(2623) 0x4b7f67 CMP %RDX,%RCX |
(2623) 0x4b7f6a JE 4b7f7a |
(2623) 0x4b7f6c CMP %RDI,%RCX |
(2623) 0x4b7f6f JL 4b7f7a |
(2623) 0x4b7f71 CMP %RSI,%RCX |
(2623) 0x4b7f74 JL 4b7ec0 |
(2623) 0x4b7f7a CMP (%R14,%RCX,8),%R11 |
(2623) 0x4b7f7e JNE 4b7ec0 |
(2623) 0x4b7f84 VMOVSD (%R12,%RAX,1),%XMM1 |
(2623) 0x4b7f8a VANDPD %XMM1,%XMM11,%XMM1 |
(2623) 0x4b7f8e VADDSD %XMM1,%XMM0,%XMM0 |
(2623) 0x4b7f92 MOV -0x30(%RBP),%RCX |
(2623) 0x4b7f96 VMOVSD %XMM0,(%RCX,%RDX,8) |
(2623) 0x4b7f9b JMP 4b7ec0 |
0x4b7fa0 MOV -0x38(%RBP),%R11 |
0x4b7fa4 JMP 4b8330 |
0x4b7fa9 ADD %RAX,%RDX |
0x4b7fac VMOVSD 0x28(%R11,%RDX,8),%XMM1 |
0x4b7fb3 VANDPD %XMM1,%XMM11,%XMM1 |
0x4b7fb7 VADDSD %XMM1,%XMM0,%XMM0 |
0x4b7fbb VMOVSD 0x20(%R11,%RDX,8),%XMM1 |
0x4b7fc2 VANDPD %XMM1,%XMM11,%XMM1 |
0x4b7fc6 VADDSD %XMM1,%XMM0,%XMM0 |
0x4b7fca VMOVSD 0x18(%R11,%RDX,8),%XMM1 |
0x4b7fd1 VANDPD %XMM1,%XMM11,%XMM1 |
0x4b7fd5 VADDSD %XMM1,%XMM0,%XMM0 |
0x4b7fd9 VMOVSD 0x10(%R11,%RDX,8),%XMM1 |
0x4b7fe0 VANDPD %XMM1,%XMM11,%XMM1 |
0x4b7fe4 VADDSD %XMM1,%XMM0,%XMM0 |
0x4b7fe8 VMOVSD 0x8(%R11,%RDX,8),%XMM1 |
0x4b7fef VANDPD %XMM1,%XMM11,%XMM1 |
0x4b7ff3 VADDSD %XMM1,%XMM0,%XMM0 |
0x4b7ff7 VMOVSD (%R11,%RDX,8),%XMM1 |
0x4b7ffd VANDPD %XMM1,%XMM11,%XMM1 |
0x4b8001 VADDSD %XMM1,%XMM0,%XMM0 |
(2597) 0x4b8005 VMOVSD %XMM0,(%R10) |
(2596) 0x4b800a CMP -0x50(%RBP),%R9 |
(2596) 0x4b800e LEA 0x1(%R9),%R9 |
(2596) 0x4b8012 JE 4b831d |
(2596) 0x4b8018 MOV -0x80(%RBP),%RAX |
(2596) 0x4b801c LEA (%RAX,%R9,1),%RCX |
(2596) 0x4b8020 MOV -0x30(%RBP),%RAX |
(2596) 0x4b8024 LEA (%RAX,%RCX,8),%R10 |
(2596) 0x4b8028 MOVQ $0,(%RAX,%RCX,8) |
(2596) 0x4b8030 MOV -0x40(%RBP),%RAX |
(2596) 0x4b8034 MOV (%RAX,%RCX,8),%RDX |
(2596) 0x4b8038 MOV 0x8(%RAX,%RCX,8),%RDI |
(2596) 0x4b803d VXORPD %XMM0,%XMM0,%XMM0 |
(2596) 0x4b8041 MOV %RDI,%RAX |
(2596) 0x4b8044 SUB %RDX,%RAX |
(2596) 0x4b8047 JLE 4b81d4 |
(2596) 0x4b804d LEA (%R12,%RDI,8),%R8 |
(2596) 0x4b8051 ADD $-0x8,%R8 |
(2596) 0x4b8055 CMP %R10,%R8 |
(2596) 0x4b8058 JB 4b8090 |
(2596) 0x4b805a LEA (%R12,%RDX,8),%R8 |
(2596) 0x4b805e CMP %R8,%R10 |
(2596) 0x4b8061 JB 4b8090 |
(2596) 0x4b8063 NOPW %CS:(%RAX,%RAX,1) |
(2601) 0x4b8070 VMOVSD (%R12,%RDX,8),%XMM1 |
(2601) 0x4b8076 VANDPD %XMM1,%XMM11,%XMM1 |
(2601) 0x4b807a VADDSD %XMM1,%XMM0,%XMM0 |
(2601) 0x4b807e VMOVSD %XMM0,(%R10) |
(2601) 0x4b8083 INC %RDX |
(2601) 0x4b8086 CMP %RDX,%RDI |
(2601) 0x4b8089 JNE 4b8070 |
(2596) 0x4b808b JMP 4b81d4 |
(2596) 0x4b8090 CMP $0x8,%RAX |
(2596) 0x4b8094 JB 4b8129 |
(2596) 0x4b809a MOV %RAX,%RDI |
(2596) 0x4b809d SHR $0x3,%RDI |
(2596) 0x4b80a1 MOV -0xc8(%RBP),%R8 |
(2596) 0x4b80a8 LEA (%R8,%RDX,8),%R8 |
(2596) 0x4b80ac NOPL (%RAX) |
(2600) 0x4b80b0 VMOVSD -0x38(%R8),%XMM1 |
(2600) 0x4b80b6 VMOVSD -0x30(%R8),%XMM2 |
(2600) 0x4b80bc VMOVSD -0x28(%R8),%XMM3 |
(2600) 0x4b80c2 VMOVSD -0x20(%R8),%XMM4 |
(2600) 0x4b80c8 VANDPD %XMM1,%XMM12,%XMM1 |
(2600) 0x4b80cc VANDPD %XMM2,%XMM12,%XMM2 |
(2600) 0x4b80d0 VANDPD %XMM3,%XMM12,%XMM3 |
(2600) 0x4b80d4 VANDPD %XMM4,%XMM12,%XMM4 |
(2600) 0x4b80d8 VMOVSD -0x18(%R8),%XMM5 |
(2600) 0x4b80de VANDPD %XMM5,%XMM12,%XMM5 |
(2600) 0x4b80e2 VMOVSD -0x10(%R8),%XMM6 |
(2600) 0x4b80e8 VANDPD %XMM6,%XMM12,%XMM6 |
(2600) 0x4b80ec VMOVSD -0x8(%R8),%XMM7 |
(2600) 0x4b80f2 VANDPD %XMM7,%XMM12,%XMM7 |
(2600) 0x4b80f6 VMOVSD (%R8),%XMM8 |
(2600) 0x4b80fb VANDPD %XMM12,%XMM8,%XMM8 |
(2600) 0x4b8100 VADDSD %XMM7,%XMM8,%XMM7 |
(2600) 0x4b8104 VADDSD %XMM0,%XMM7,%XMM0 |
(2600) 0x4b8108 VADDSD %XMM5,%XMM4,%XMM4 |
(2600) 0x4b810c VADDSD %XMM6,%XMM3,%XMM3 |
(2600) 0x4b8110 VADDSD %XMM4,%XMM3,%XMM3 |
(2600) 0x4b8114 VADDSD %XMM2,%XMM1,%XMM1 |
(2600) 0x4b8118 VADDSD %XMM1,%XMM0,%XMM0 |
(2600) 0x4b811c VADDSD %XMM3,%XMM0,%XMM0 |
(2600) 0x4b8120 ADD $0x40,%R8 |
(2600) 0x4b8124 DEC %RDI |
(2600) 0x4b8127 JNE 4b80b0 |
(2596) 0x4b8129 MOV %EAX,%EDI |
(2596) 0x4b812b AND $0x7,%EDI |
(2596) 0x4b812e DEC %RDI |
(2596) 0x4b8131 CMP $0x6,%RDI |
(2596) 0x4b8135 JA 4b81cf |
0x4b813b AND $-0x8,%RAX |
0x4b813f JMP 0x524130(,%RDI,8) |
0x4b8146 ADD %RAX,%RDX |
0x4b8149 JMP 4b81c1 |
0x4b814b ADD %RAX,%RDX |
0x4b814e JMP 4b81b2 |
0x4b8150 ADD %RAX,%RDX |
0x4b8153 JMP 4b81a3 |
0x4b8155 ADD %RAX,%RDX |
0x4b8158 JMP 4b8194 |
0x4b815a ADD %RAX,%RDX |
0x4b815d JMP 4b8185 |
0x4b815f ADD %RAX,%RDX |
0x4b8162 JMP 4b8176 |
0x4b8164 ADD %RAX,%RDX |
0x4b8167 VMOVSD 0x30(%R12,%RDX,8),%XMM1 |
0x4b816e VANDPD %XMM1,%XMM11,%XMM1 |
0x4b8172 VADDSD %XMM1,%XMM0,%XMM0 |
0x4b8176 VMOVSD 0x28(%R12,%RDX,8),%XMM1 |
0x4b817d VANDPD %XMM1,%XMM11,%XMM1 |
0x4b8181 VADDSD %XMM1,%XMM0,%XMM0 |
0x4b8185 VMOVSD 0x20(%R12,%RDX,8),%XMM1 |
0x4b818c VANDPD %XMM1,%XMM11,%XMM1 |
0x4b8190 VADDSD %XMM1,%XMM0,%XMM0 |
0x4b8194 VMOVSD 0x18(%R12,%RDX,8),%XMM1 |
0x4b819b VANDPD %XMM1,%XMM11,%XMM1 |
0x4b819f VADDSD %XMM1,%XMM0,%XMM0 |
0x4b81a3 VMOVSD 0x10(%R12,%RDX,8),%XMM1 |
0x4b81aa VANDPD %XMM1,%XMM11,%XMM1 |
0x4b81ae VADDSD %XMM1,%XMM0,%XMM0 |
0x4b81b2 VMOVSD 0x8(%R12,%RDX,8),%XMM1 |
0x4b81b9 VANDPD %XMM1,%XMM11,%XMM1 |
0x4b81bd VADDSD %XMM1,%XMM0,%XMM0 |
0x4b81c1 VMOVSD (%R12,%RDX,8),%XMM1 |
0x4b81c7 VANDPD %XMM1,%XMM11,%XMM1 |
0x4b81cb VADDSD %XMM1,%XMM0,%XMM0 |
(2596) 0x4b81cf VMOVSD %XMM0,(%R10) |
(2596) 0x4b81d4 MOV -0xa0(%RBP),%RAX |
(2596) 0x4b81db MOV (%RAX,%RCX,8),%RDX |
(2596) 0x4b81df MOV 0x8(%RAX,%RCX,8),%RCX |
(2596) 0x4b81e4 MOV %RCX,%RAX |
(2596) 0x4b81e7 SUB %RDX,%RAX |
(2596) 0x4b81ea JLE 4b800a |
(2596) 0x4b81f0 LEA (%R11,%RCX,8),%RDI |
(2596) 0x4b81f4 ADD $-0x8,%RDI |
(2596) 0x4b81f8 CMP %R10,%RDI |
(2596) 0x4b81fb JB 4b8230 |
(2596) 0x4b81fd LEA (%R11,%RDX,8),%RDI |
(2596) 0x4b8201 CMP %RDI,%R10 |
(2596) 0x4b8204 JB 4b8230 |
(2596) 0x4b8206 NOPW %CS:(%RAX,%RAX,1) |
(2599) 0x4b8210 VMOVSD (%R11,%RDX,8),%XMM1 |
(2599) 0x4b8216 VANDPD %XMM1,%XMM11,%XMM1 |
(2599) 0x4b821a VADDSD %XMM1,%XMM0,%XMM0 |
(2599) 0x4b821e VMOVSD %XMM0,(%R10) |
(2599) 0x4b8223 INC %RDX |
(2599) 0x4b8226 CMP %RDX,%RCX |
(2599) 0x4b8229 JNE 4b8210 |
(2596) 0x4b822b JMP 4b800a |
(2597) 0x4b8230 CMP $0x8,%RAX |
(2597) 0x4b8234 JB 4b82c1 |
(2597) 0x4b823a MOV %RAX,%RCX |
(2597) 0x4b823d SHR $0x3,%RCX |
(2597) 0x4b8241 MOV -0xc0(%RBP),%RDI |
(2597) 0x4b8248 LEA (%RDI,%RDX,8),%RDI |
(2597) 0x4b824c NOPL (%RAX) |
(2598) 0x4b8250 VMOVSD -0x38(%RDI),%XMM1 |
(2598) 0x4b8255 VMOVSD -0x30(%RDI),%XMM2 |
(2598) 0x4b825a VMOVSD -0x28(%RDI),%XMM3 |
(2598) 0x4b825f VMOVSD -0x20(%RDI),%XMM4 |
(2598) 0x4b8264 VANDPD %XMM1,%XMM12,%XMM1 |
(2598) 0x4b8268 VANDPD %XMM2,%XMM12,%XMM2 |
(2598) 0x4b826c VANDPD %XMM3,%XMM12,%XMM3 |
(2598) 0x4b8270 VANDPD %XMM4,%XMM12,%XMM4 |
(2598) 0x4b8274 VMOVSD -0x18(%RDI),%XMM5 |
(2598) 0x4b8279 VANDPD %XMM5,%XMM12,%XMM5 |
(2598) 0x4b827d VMOVSD -0x10(%RDI),%XMM6 |
(2598) 0x4b8282 VANDPD %XMM6,%XMM12,%XMM6 |
(2598) 0x4b8286 VMOVSD -0x8(%RDI),%XMM7 |
(2598) 0x4b828b VANDPD %XMM7,%XMM12,%XMM7 |
(2598) 0x4b828f VMOVSD (%RDI),%XMM8 |
(2598) 0x4b8293 VANDPD %XMM12,%XMM8,%XMM8 |
(2598) 0x4b8298 VADDSD %XMM7,%XMM8,%XMM7 |
(2598) 0x4b829c VADDSD %XMM0,%XMM7,%XMM0 |
(2598) 0x4b82a0 VADDSD %XMM5,%XMM4,%XMM4 |
(2598) 0x4b82a4 VADDSD %XMM6,%XMM3,%XMM3 |
(2598) 0x4b82a8 VADDSD %XMM4,%XMM3,%XMM3 |
(2598) 0x4b82ac VADDSD %XMM2,%XMM1,%XMM1 |
(2598) 0x4b82b0 VADDSD %XMM1,%XMM0,%XMM0 |
(2598) 0x4b82b4 VADDSD %XMM3,%XMM0,%XMM0 |
(2598) 0x4b82b8 ADD $0x40,%RDI |
(2598) 0x4b82bc DEC %RCX |
(2598) 0x4b82bf JNE 4b8250 |
(2597) 0x4b82c1 MOV %EAX,%ECX |
(2597) 0x4b82c3 AND $0x7,%ECX |
(2597) 0x4b82c6 DEC %RCX |
(2597) 0x4b82c9 CMP $0x6,%RCX |
(2597) 0x4b82cd JA 4b8005 |
0x4b82d3 AND $-0x8,%RAX |
0x4b82d7 JMP 0x524168(,%RCX,8) |
0x4b82de ADD %RAX,%RDX |
0x4b82e1 JMP 4b7ff7 |
0x4b82e6 ADD %RAX,%RDX |
0x4b82e9 JMP 4b7fe8 |
0x4b82ee ADD %RAX,%RDX |
0x4b82f1 JMP 4b7fd9 |
0x4b82f6 ADD %RAX,%RDX |
0x4b82f9 JMP 4b7fca |
0x4b82fe ADD %RAX,%RDX |
0x4b8301 JMP 4b7fbb |
0x4b8306 ADD %RAX,%RDX |
0x4b8309 VMOVSD 0x30(%R11,%RDX,8),%XMM1 |
0x4b8310 VANDPD %XMM1,%XMM11,%XMM1 |
0x4b8314 VADDSD %XMM1,%XMM0,%XMM0 |
0x4b8318 JMP 4b7fac |
0x4b831d MOV -0x40(%RBP),%R9 |
0x4b8321 NOPW %CS:(%RAX,%RAX,1) |
(2582) 0x4b8330 CMP %RSI,-0xb0(%RBP) |
(2582) 0x4b8337 MOV -0x48(%RBP),%R8 |
(2582) 0x4b833b MOV -0xd8(%RBP),%R10 |
(2582) 0x4b8342 MOV -0x60(%RBP),%RSI |
(2582) 0x4b8346 JGE 4b67d4 |
(2582) 0x4b834c MOV -0x90(%RBP),%RAX |
(2582) 0x4b8353 CMP %RAX,%RSI |
(2582) 0x4b8356 CMOVL %RSI,%RAX |
(2582) 0x4b835a MOV -0xd0(%RBP),%RCX |
(2582) 0x4b8361 LEA (,%RCX,8),%RDX |
(2582) 0x4b8369 MOV %R8,%RCX |
(2582) 0x4b836c SUB %RAX,%RCX |
(2582) 0x4b836f ADD -0x88(%RBP),%RCX |
(2582) 0x4b8376 CMP $0x4,%RCX |
(2582) 0x4b837a JAE 4b8480 |
(2582) 0x4b8380 MOV %RCX,%RSI |
(2582) 0x4b8383 AND $-0x4,%RSI |
(2582) 0x4b8387 CMP %RCX,%RSI |
(2582) 0x4b838a MOV -0xd8(%RBP),%R10 |
(2582) 0x4b8391 JAE 4b83f0 |
(2582) 0x4b8393 MOV -0x88(%RBP),%RSI |
(2582) 0x4b839a MOV -0x48(%RBP),%RDI |
(2582) 0x4b839e ADD %RDI,%RSI |
(2582) 0x4b83a1 MOV %RSI,%RDI |
(2582) 0x4b83a4 MOV -0xd0(%RBP),%R8 |
(2582) 0x4b83ab SUB %R8,%RDI |
(2582) 0x4b83ae AND $-0x4,%RDI |
(2582) 0x4b83b2 ADD %R8,%RDI |
(2582) 0x4b83b5 JMP 4b83c8 |
0x4b83b7 NOPW (%RAX,%RAX,1) |
(2584) 0x4b83c0 INC %RDI |
(2584) 0x4b83c3 CMP %RDI,%RSI |
(2584) 0x4b83c6 JE 4b83f0 |
(2584) 0x4b83c8 MOV -0xe8(%RBP),%R8 |
(2584) 0x4b83cf MOV (%R8,%RDI,8),%R8 |
(2584) 0x4b83d3 VUCOMISD (%R12,%R8,8),%XMM9 |
(2584) 0x4b83d9 JBE 4b83c0 |
(2584) 0x4b83db VMOVSD (%R10,%RDI,8),%XMM0 |
(2584) 0x4b83e1 VXORPD %XMM0,%XMM10,%XMM0 |
(2584) 0x4b83e5 VMOVLPD %XMM0,(%R10,%RDI,8) |
(2584) 0x4b83eb JMP 4b83c0 |
0x4b83ed NOPL (%RAX) |
(2582) 0x4b83f0 CMP $0x2,%RCX |
(2582) 0x4b83f4 MOV -0x60(%RBP),%RSI |
(2582) 0x4b83f8 MOV -0x48(%RBP),%R8 |
(2582) 0x4b83fc JB 4b8442 |
(2582) 0x4b83fe MOV -0x88(%RBP),%RDI |
(2582) 0x4b8405 ADD %R8,%RDI |
(2582) 0x4b8408 SUB -0xd0(%RBP),%RDI |
(2582) 0x4b840f SHR $0x1,%RDI |
(2582) 0x4b8412 NOPW %CS:(%RAX,%RAX,1) |
(2583) 0x4b8420 VUCOMISD (%R10,%RDX,1),%XMM9 |
(2583) 0x4b8426 JE 4b6770 |
(2583) 0x4b842c VUCOMISD 0x8(%R10,%RDX,1),%XMM9 |
(2583) 0x4b8433 JE 4b6770 |
(2583) 0x4b8439 ADD $0x10,%RDX |
(2583) 0x4b843d DEC %RDI |
(2583) 0x4b8440 JNE 4b8420 |
(2582) 0x4b8442 MOV %RCX,%RDX |
(2582) 0x4b8445 AND $-0x2,%RDX |
(2582) 0x4b8449 CMP %RCX,%RDX |
(2582) 0x4b844c JAE 4b67d4 |
(2582) 0x4b8452 MOV %R8,%RCX |
(2582) 0x4b8455 IMUL %RSI,%RCX |
(2582) 0x4b8459 ADD %RDX,%RAX |
(2582) 0x4b845c ADD %RCX,%RAX |
(2582) 0x4b845f MOV -0x30(%RBP),%RCX |
(2582) 0x4b8463 VUCOMISD (%RCX,%RAX,8),%XMM9 |
(2582) 0x4b8468 JE 4b6770 |
(2582) 0x4b846e JMP 4b67d4 |
0x4b8473 NOPW %CS:(%RAX,%RAX,1) |
(2582) 0x4b8480 MOV -0x88(%RBP),%RSI |
(2582) 0x4b8487 MOV -0x48(%RBP),%RDI |
(2582) 0x4b848b ADD %RDI,%RSI |
(2582) 0x4b848e SUB -0xd0(%RBP),%RSI |
(2582) 0x4b8495 SHR $0x2,%RSI |
(2582) 0x4b8499 MOV %RDX,%RDI |
(2582) 0x4b849c JMP 4b84ad |
0x4b849e XCHG %AX,%AX |
(2585) 0x4b84a0 ADD $0x20,%RDI |
(2585) 0x4b84a4 DEC %RSI |
(2585) 0x4b84a7 JE 4b8380 |
(2585) 0x4b84ad MOV -0xf0(%RBP),%R10 |
(2585) 0x4b84b4 MOV -0x10(%R10,%RDI,1),%R8 |
(2585) 0x4b84b9 VUCOMISD (%R12,%R8,8),%XMM9 |
(2585) 0x4b84bf JBE 4b8520 |
(2585) 0x4b84c1 MOV -0xa8(%RBP),%R8 |
(2585) 0x4b84c8 VMOVSD -0x10(%R8,%RDI,1),%XMM0 |
(2585) 0x4b84cf VXORPD %XMM0,%XMM10,%XMM0 |
(2585) 0x4b84d3 VMOVLPD %XMM0,-0x10(%R8,%RDI,1) |
(2585) 0x4b84da MOV -0x8(%R10,%RDI,1),%R8 |
(2585) 0x4b84df VUCOMISD (%R12,%R8,8),%XMM9 |
(2585) 0x4b84e5 JA 4b852d |
(2585) 0x4b84e7 MOV (%R10,%RDI,1),%R8 |
(2585) 0x4b84eb VUCOMISD (%R12,%R8,8),%XMM9 |
(2585) 0x4b84f1 JBE 4b8552 |
(2585) 0x4b84f3 MOV -0xa8(%RBP),%R8 |
(2585) 0x4b84fa VMOVSD (%R8,%RDI,1),%XMM0 |
(2585) 0x4b8500 VXORPD %XMM0,%XMM10,%XMM0 |
(2585) 0x4b8504 VMOVLPD %XMM0,(%R8,%RDI,1) |
(2585) 0x4b850a MOV 0x8(%R10,%RDI,1),%R8 |
(2585) 0x4b850f VUCOMISD (%R12,%R8,8),%XMM9 |
(2585) 0x4b8515 JBE 4b84a0 |
(2585) 0x4b8517 JMP 4b8563 |
0x4b8519 NOPL (%RAX) |
(2585) 0x4b8520 MOV -0x8(%R10,%RDI,1),%R8 |
(2585) 0x4b8525 VUCOMISD (%R12,%R8,8),%XMM9 |
(2585) 0x4b852b JBE 4b84e7 |
(2585) 0x4b852d MOV -0xa8(%RBP),%R8 |
(2585) 0x4b8534 VMOVSD -0x8(%R8,%RDI,1),%XMM0 |
(2585) 0x4b853b VXORPD %XMM0,%XMM10,%XMM0 |
(2585) 0x4b853f VMOVLPD %XMM0,-0x8(%R8,%RDI,1) |
(2585) 0x4b8546 MOV (%R10,%RDI,1),%R8 |
(2585) 0x4b854a VUCOMISD (%R12,%R8,8),%XMM9 |
(2585) 0x4b8550 JA 4b84f3 |
(2585) 0x4b8552 MOV 0x8(%R10,%RDI,1),%R8 |
(2585) 0x4b8557 VUCOMISD (%R12,%R8,8),%XMM9 |
(2585) 0x4b855d JBE 4b84a0 |
(2585) 0x4b8563 MOV -0xa8(%RBP),%R8 |
(2585) 0x4b856a VMOVSD 0x8(%R8,%RDI,1),%XMM0 |
(2585) 0x4b8571 VXORPD %XMM0,%XMM10,%XMM0 |
(2585) 0x4b8575 VMOVLPD %XMM0,0x8(%R8,%RDI,1) |
(2585) 0x4b857c JMP 4b84a0 |
0x4b8581 ADD %RAX,%RCX |
0x4b8584 VMOVSD 0x28(%R11,%RCX,8),%XMM1 |
0x4b858b VANDPD %XMM1,%XMM11,%XMM1 |
0x4b858f VADDSD %XMM1,%XMM0,%XMM0 |
0x4b8593 VMOVSD 0x20(%R11,%RCX,8),%XMM1 |
0x4b859a VANDPD %XMM1,%XMM11,%XMM1 |
0x4b859e VADDSD %XMM1,%XMM0,%XMM0 |
0x4b85a2 VMOVSD 0x18(%R11,%RCX,8),%XMM1 |
0x4b85a9 VANDPD %XMM1,%XMM11,%XMM1 |
0x4b85ad VADDSD %XMM1,%XMM0,%XMM0 |
0x4b85b1 VMOVSD 0x10(%R11,%RCX,8),%XMM1 |
0x4b85b8 VANDPD %XMM1,%XMM11,%XMM1 |
0x4b85bc VADDSD %XMM1,%XMM0,%XMM0 |
0x4b85c0 VMOVSD 0x8(%R11,%RCX,8),%XMM1 |
0x4b85c7 VANDPD %XMM1,%XMM11,%XMM1 |
0x4b85cb VADDSD %XMM1,%XMM0,%XMM0 |
0x4b85cf VMOVSD (%R11,%RCX,8),%XMM1 |
0x4b85d5 VANDPD %XMM1,%XMM11,%XMM1 |
0x4b85d9 VADDSD %XMM1,%XMM0,%XMM0 |
(2591) 0x4b85dd VMOVSD %XMM0,(%R10) |
(2590) 0x4b85e2 MOV -0x50(%RBP),%RAX |
(2590) 0x4b85e6 CMP -0x80(%RBP),%RAX |
(2590) 0x4b85ea LEA 0x1(%RAX),%RAX |
(2590) 0x4b85ee JE 4b8330 |
(2590) 0x4b85f4 MOV %RAX,-0x50(%RBP) |
(2590) 0x4b85f8 ADD %RDI,%RAX |
(2590) 0x4b85fb MOV -0x30(%RBP),%RCX |
(2590) 0x4b85ff LEA (%RCX,%RAX,8),%R10 |
(2590) 0x4b8603 MOVQ $0,(%RCX,%RAX,8) |
(2590) 0x4b860b MOV (%R9,%RAX,8),%RCX |
(2590) 0x4b860f MOV 0x8(%R9,%RAX,8),%RDX |
(2590) 0x4b8614 VXORPD %XMM0,%XMM0,%XMM0 |
(2590) 0x4b8618 MOV %RDX,%R8 |
(2590) 0x4b861b SUB %RCX,%R8 |
(2590) 0x4b861e JLE 4b8778 |
(2590) 0x4b8624 MOV %R8,-0x68(%RBP) |
(2590) 0x4b8628 CMP $0x4,%R8 |
(2590) 0x4b862c JAE 4b8690 |
(2590) 0x4b862e MOV -0x68(%RBP),%R9 |
(2590) 0x4b8632 MOV %R9,%R8 |
(2590) 0x4b8635 AND $-0x4,%R8 |
(2590) 0x4b8639 CMP %R9,%R8 |
(2590) 0x4b863c JAE 4b8770 |
(2590) 0x4b8642 ADD %R8,%RCX |
(2590) 0x4b8645 MOV -0x38(%RBP),%R11 |
(2590) 0x4b8649 MOV -0x40(%RBP),%R9 |
(2590) 0x4b864d JMP 4b866f |
0x4b864f NOP |
(2594) 0x4b8650 VMOVSD (%R12,%RCX,8),%XMM1 |
(2594) 0x4b8656 VANDPD %XMM1,%XMM11,%XMM1 |
(2594) 0x4b865a VADDSD %XMM1,%XMM0,%XMM0 |
(2594) 0x4b865e VMOVSD %XMM0,(%R10) |
(2594) 0x4b8663 INC %RCX |
(2594) 0x4b8666 CMP %RCX,%RDX |
(2594) 0x4b8669 JE 4b8778 |
(2594) 0x4b866f MOV (%RBX,%RCX,8),%R8 |
(2594) 0x4b8673 CMP %RAX,%R8 |
(2594) 0x4b8676 JE 4b8650 |
(2594) 0x4b8678 CMP %RDI,%R8 |
(2594) 0x4b867b JL 4b8650 |
(2594) 0x4b867d CMP %RSI,%R8 |
(2594) 0x4b8680 JL 4b8663 |
(2594) 0x4b8682 JMP 4b8650 |
0x4b8684 NOPW %CS:(%RAX,%RAX,1) |
(2590) 0x4b8690 MOV -0x68(%RBP),%R11 |
(2590) 0x4b8694 SHR $0x2,%R11 |
(2590) 0x4b8698 LEA 0x18(,%RCX,8),%R9 |
(2590) 0x4b86a0 JMP 4b86d0 |
0x4b86a2 NOPW %CS:(%RAX,%RAX,1) |
(2595) 0x4b86b0 VMOVSD (%R12,%R9,1),%XMM1 |
(2595) 0x4b86b6 VANDPD %XMM1,%XMM11,%XMM1 |
(2595) 0x4b86ba VADDSD %XMM1,%XMM0,%XMM0 |
(2595) 0x4b86be VMOVSD %XMM0,(%R10) |
(2595) 0x4b86c3 ADD $0x20,%R9 |
(2595) 0x4b86c7 DEC %R11 |
(2595) 0x4b86ca JE 4b862e |
(2595) 0x4b86d0 MOV -0x18(%RBX,%R9,1),%R8 |
(2595) 0x4b86d5 CMP %RAX,%R8 |
(2595) 0x4b86d8 JE 4b86e4 |
(2595) 0x4b86da CMP %RDI,%R8 |
(2595) 0x4b86dd JL 4b86e4 |
(2595) 0x4b86df CMP %RSI,%R8 |
(2595) 0x4b86e2 JL 4b86f8 |
(2595) 0x4b86e4 VMOVSD -0x18(%R12,%R9,1),%XMM1 |
(2595) 0x4b86eb VANDPD %XMM1,%XMM11,%XMM1 |
(2595) 0x4b86ef VADDSD %XMM1,%XMM0,%XMM0 |
(2595) 0x4b86f3 VMOVSD %XMM0,(%R10) |
(2595) 0x4b86f8 MOV -0x10(%RBX,%R9,1),%R8 |
(2595) 0x4b86fd CMP %RAX,%R8 |
(2595) 0x4b8700 JE 4b870c |
(2595) 0x4b8702 CMP %RDI,%R8 |
(2595) 0x4b8705 JL 4b870c |
(2595) 0x4b8707 CMP %RSI,%R8 |
(2595) 0x4b870a JL 4b8720 |
(2595) 0x4b870c VMOVSD -0x10(%R12,%R9,1),%XMM1 |
(2595) 0x4b8713 VANDPD %XMM1,%XMM11,%XMM1 |
(2595) 0x4b8717 VADDSD %XMM1,%XMM0,%XMM0 |
(2595) 0x4b871b VMOVSD %XMM0,(%R10) |
(2595) 0x4b8720 MOV -0x8(%RBX,%R9,1),%R8 |
(2595) 0x4b8725 CMP %RAX,%R8 |
(2595) 0x4b8728 JE 4b8734 |
(2595) 0x4b872a CMP %RDI,%R8 |
(2595) 0x4b872d JL 4b8734 |
(2595) 0x4b872f CMP %RSI,%R8 |
(2595) 0x4b8732 JL 4b8748 |
(2595) 0x4b8734 VMOVSD -0x8(%R12,%R9,1),%XMM1 |
(2595) 0x4b873b VANDPD %XMM1,%XMM11,%XMM1 |
(2595) 0x4b873f VADDSD %XMM1,%XMM0,%XMM0 |
(2595) 0x4b8743 VMOVSD %XMM0,(%R10) |
(2595) 0x4b8748 MOV (%RBX,%R9,1),%R8 |
(2595) 0x4b874c CMP %RAX,%R8 |
(2595) 0x4b874f JE 4b86b0 |
(2595) 0x4b8755 CMP %RDI,%R8 |
(2595) 0x4b8758 JL 4b86b0 |
(2595) 0x4b875e CMP %RSI,%R8 |
(2595) 0x4b8761 JL 4b86c3 |
(2595) 0x4b8767 JMP 4b86b0 |
0x4b876c NOPL (%RAX) |
(2590) 0x4b8770 MOV -0x38(%RBP),%R11 |
(2590) 0x4b8774 MOV -0x40(%RBP),%R9 |
(2590) 0x4b8778 MOV -0xa0(%RBP),%RDX |
(2590) 0x4b877f MOV (%RDX,%RAX,8),%RCX |
(2590) 0x4b8783 MOV 0x8(%RDX,%RAX,8),%RDX |
(2590) 0x4b8788 MOV %RDX,%RAX |
(2590) 0x4b878b SUB %RCX,%RAX |
(2590) 0x4b878e JLE 4b85e2 |
(2590) 0x4b8794 LEA (%R11,%RDX,8),%R8 |
(2590) 0x4b8798 ADD $-0x8,%R8 |
(2590) 0x4b879c CMP %R10,%R8 |
(2590) 0x4b879f JB 4b87d0 |
(2590) 0x4b87a1 LEA (%R11,%RCX,8),%R8 |
(2590) 0x4b87a5 CMP %R8,%R10 |
(2590) 0x4b87a8 JB 4b87d0 |
(2590) 0x4b87aa NOPW (%RAX,%RAX,1) |
(2593) 0x4b87b0 VMOVSD (%R11,%RCX,8),%XMM1 |
(2593) 0x4b87b6 VANDPD %XMM1,%XMM11,%XMM1 |
(2593) 0x4b87ba VADDSD %XMM1,%XMM0,%XMM0 |
(2593) 0x4b87be VMOVSD %XMM0,(%R10) |
(2593) 0x4b87c3 INC %RCX |
(2593) 0x4b87c6 CMP %RCX,%RDX |
(2593) 0x4b87c9 JNE 4b87b0 |
(2590) 0x4b87cb JMP 4b85e2 |
(2591) 0x4b87d0 CMP $0x8,%RAX |
(2591) 0x4b87d4 JB 4b8869 |
(2591) 0x4b87da MOV %RAX,%RDX |
(2591) 0x4b87dd SHR $0x3,%RDX |
(2591) 0x4b87e1 MOV -0xc0(%RBP),%R8 |
(2591) 0x4b87e8 LEA (%R8,%RCX,8),%R8 |
(2591) 0x4b87ec NOPL (%RAX) |
(2592) 0x4b87f0 VMOVSD -0x38(%R8),%XMM1 |
(2592) 0x4b87f6 VMOVSD -0x30(%R8),%XMM2 |
(2592) 0x4b87fc VMOVSD -0x28(%R8),%XMM3 |
(2592) 0x4b8802 VMOVSD -0x20(%R8),%XMM4 |
(2592) 0x4b8808 VANDPD %XMM1,%XMM12,%XMM1 |
(2592) 0x4b880c VANDPD %XMM2,%XMM12,%XMM2 |
(2592) 0x4b8810 VANDPD %XMM3,%XMM12,%XMM3 |
(2592) 0x4b8814 VANDPD %XMM4,%XMM12,%XMM4 |
(2592) 0x4b8818 VMOVSD -0x18(%R8),%XMM5 |
(2592) 0x4b881e VANDPD %XMM5,%XMM12,%XMM5 |
(2592) 0x4b8822 VMOVSD -0x10(%R8),%XMM6 |
(2592) 0x4b8828 VANDPD %XMM6,%XMM12,%XMM6 |
(2592) 0x4b882c VMOVSD -0x8(%R8),%XMM7 |
(2592) 0x4b8832 VANDPD %XMM7,%XMM12,%XMM7 |
(2592) 0x4b8836 VMOVSD (%R8),%XMM8 |
(2592) 0x4b883b VANDPD %XMM12,%XMM8,%XMM8 |
(2592) 0x4b8840 VADDSD %XMM7,%XMM8,%XMM7 |
(2592) 0x4b8844 VADDSD %XMM0,%XMM7,%XMM0 |
(2592) 0x4b8848 VADDSD %XMM5,%XMM4,%XMM4 |
(2592) 0x4b884c VADDSD %XMM6,%XMM3,%XMM3 |
(2592) 0x4b8850 VADDSD %XMM4,%XMM3,%XMM3 |
(2592) 0x4b8854 VADDSD %XMM2,%XMM1,%XMM1 |
(2592) 0x4b8858 VADDSD %XMM1,%XMM0,%XMM0 |
(2592) 0x4b885c VADDSD %XMM3,%XMM0,%XMM0 |
(2592) 0x4b8860 ADD $0x40,%R8 |
(2592) 0x4b8864 DEC %RDX |
(2592) 0x4b8867 JNE 4b87f0 |
(2591) 0x4b8869 MOV %EAX,%EDX |
(2591) 0x4b886b AND $0x7,%EDX |
(2591) 0x4b886e DEC %RDX |
(2591) 0x4b8871 CMP $0x6,%RDX |
(2591) 0x4b8875 JA 4b85dd |
0x4b887b AND $-0x8,%RAX |
0x4b887f JMP 0x5240f8(,%RDX,8) |
0x4b8886 ADD %RAX,%RCX |
0x4b8889 JMP 4b85cf |
0x4b888e ADD %RAX,%RCX |
0x4b8891 JMP 4b85c0 |
0x4b8896 ADD %RAX,%RCX |
0x4b8899 JMP 4b85b1 |
0x4b889e ADD %RAX,%RCX |
0x4b88a1 JMP 4b85a2 |
0x4b88a6 ADD %RAX,%RCX |
0x4b88a9 JMP 4b8593 |
0x4b88ae ADD %RAX,%RCX |
0x4b88b1 VMOVSD 0x30(%R11,%RCX,8),%XMM1 |
0x4b88b8 VANDPD %XMM1,%XMM11,%XMM1 |
0x4b88bc VADDSD %XMM1,%XMM0,%XMM0 |
0x4b88c0 JMP 4b8584 |
0x4b88c5 MOV -0x48(%RBP),%RAX |
0x4b88c9 IMUL -0x60(%RBP),%RAX |
0x4b88ce ADD %RAX,-0x80(%RBP) |
0x4b88d2 XOR %ECX,%ECX |
0x4b88d4 JMP 4b8b02 |
0x4b88d9 MOV -0x48(%RBP),%RAX |
0x4b88dd IMUL -0x60(%RBP),%RAX |
0x4b88e2 ADD %RAX,%RDI |
0x4b88e5 XOR %EAX,%EAX |
0x4b88e7 JMP 4b8902 |
0x4b88e9 NOPL (%RAX) |
(2618) 0x4b88f0 CMP -0x80(%RBP),%RAX |
(2618) 0x4b88f4 LEA 0x1(%RAX),%RAX |
(2618) 0x4b88f8 MOV -0x40(%RBP),%R9 |
(2618) 0x4b88fc JE 4b8330 |
(2618) 0x4b8902 LEA (%RDI,%RAX,1),%RCX |
(2618) 0x4b8906 MOV -0x30(%RBP),%RDX |
(2618) 0x4b890a MOVQ $0,(%RDX,%RCX,8) |
(2618) 0x4b8912 MOV (%R9,%RCX,8),%RDX |
(2618) 0x4b8916 MOV 0x8(%R9,%RCX,8),%R9 |
(2618) 0x4b891b MOV %R9,%R8 |
(2618) 0x4b891e SUB %RDX,%R8 |
(2618) 0x4b8921 JLE 4b88f0 |
(2618) 0x4b8923 VXORPD %XMM0,%XMM0,%XMM0 |
(2618) 0x4b8927 MOV %R8,-0x50(%RBP) |
(2618) 0x4b892b CMP $0x4,%R8 |
(2618) 0x4b892f JAE 4b8990 |
(2618) 0x4b8931 MOV -0x50(%RBP),%R10 |
(2618) 0x4b8935 MOV %R10,%R8 |
(2618) 0x4b8938 AND $-0x4,%R8 |
(2618) 0x4b893c CMP %R10,%R8 |
(2618) 0x4b893f MOV -0x38(%RBP),%R11 |
(2618) 0x4b8943 JAE 4b88f0 |
(2618) 0x4b8945 ADD %R8,%RDX |
(2618) 0x4b8948 JMP 4b8970 |
0x4b894a NOPW (%RAX,%RAX,1) |
(2619) 0x4b8950 VMOVSD (%R12,%RDX,8),%XMM1 |
(2619) 0x4b8956 VANDPD %XMM1,%XMM11,%XMM1 |
(2619) 0x4b895a VADDSD %XMM1,%XMM0,%XMM0 |
(2619) 0x4b895e MOV -0x30(%RBP),%R8 |
(2619) 0x4b8962 VMOVSD %XMM0,(%R8,%RCX,8) |
(2619) 0x4b8968 INC %RDX |
(2619) 0x4b896b CMP %RDX,%R9 |
(2619) 0x4b896e JE 4b88f0 |
(2619) 0x4b8970 MOV (%RBX,%RDX,8),%R8 |
(2619) 0x4b8974 CMP %RCX,%R8 |
(2619) 0x4b8977 JE 4b8950 |
(2619) 0x4b8979 CMP %RDI,%R8 |
(2619) 0x4b897c JL 4b8950 |
(2619) 0x4b897e CMP %RSI,%R8 |
(2619) 0x4b8981 JL 4b8968 |
(2619) 0x4b8983 JMP 4b8950 |
0x4b8985 NOPW %CS:(%RAX,%RAX,1) |
(2618) 0x4b8990 MOV -0x50(%RBP),%R10 |
(2618) 0x4b8994 SHR $0x2,%R10 |
(2618) 0x4b8998 LEA 0x18(,%RDX,8),%R11 |
(2618) 0x4b89a0 JMP 4b89d5 |
0x4b89a2 NOPW %CS:(%RAX,%RAX,1) |
(2620) 0x4b89b0 VMOVSD (%R12,%R11,1),%XMM1 |
(2620) 0x4b89b6 VANDPD %XMM1,%XMM11,%XMM1 |
(2620) 0x4b89ba VADDSD %XMM1,%XMM0,%XMM0 |
(2620) 0x4b89be MOV -0x30(%RBP),%R8 |
(2620) 0x4b89c2 VMOVSD %XMM0,(%R8,%RCX,8) |
(2620) 0x4b89c8 ADD $0x20,%R11 |
(2620) 0x4b89cc DEC %R10 |
(2620) 0x4b89cf JE 4b8931 |
(2620) 0x4b89d5 MOV -0x18(%RBX,%R11,1),%R8 |
(2620) 0x4b89da CMP %RCX,%R8 |
(2620) 0x4b89dd JE 4b89e9 |
(2620) 0x4b89df CMP %RDI,%R8 |
(2620) 0x4b89e2 JL 4b89e9 |
(2620) 0x4b89e4 CMP %RSI,%R8 |
(2620) 0x4b89e7 JL 4b8a02 |
(2620) 0x4b89e9 VMOVSD -0x18(%R12,%R11,1),%XMM1 |
(2620) 0x4b89f0 VANDPD %XMM1,%XMM11,%XMM1 |
(2620) 0x4b89f4 VADDSD %XMM1,%XMM0,%XMM0 |
(2620) 0x4b89f8 MOV -0x30(%RBP),%R8 |
(2620) 0x4b89fc VMOVSD %XMM0,(%R8,%RCX,8) |
(2620) 0x4b8a02 MOV -0x10(%RBX,%R11,1),%R8 |
(2620) 0x4b8a07 CMP %RCX,%R8 |
(2620) 0x4b8a0a JE 4b8a16 |
(2620) 0x4b8a0c CMP %RDI,%R8 |
(2620) 0x4b8a0f JL 4b8a16 |
(2620) 0x4b8a11 CMP %RSI,%R8 |
(2620) 0x4b8a14 JL 4b8a2f |
(2620) 0x4b8a16 VMOVSD -0x10(%R12,%R11,1),%XMM1 |
(2620) 0x4b8a1d VANDPD %XMM1,%XMM11,%XMM1 |
(2620) 0x4b8a21 VADDSD %XMM1,%XMM0,%XMM0 |
(2620) 0x4b8a25 MOV -0x30(%RBP),%R8 |
(2620) 0x4b8a29 VMOVSD %XMM0,(%R8,%RCX,8) |
(2620) 0x4b8a2f MOV -0x8(%RBX,%R11,1),%R8 |
(2620) 0x4b8a34 CMP %RCX,%R8 |
(2620) 0x4b8a37 JE 4b8a43 |
(2620) 0x4b8a39 CMP %RDI,%R8 |
(2620) 0x4b8a3c JL 4b8a43 |
(2620) 0x4b8a3e CMP %RSI,%R8 |
(2620) 0x4b8a41 JL 4b8a5c |
(2620) 0x4b8a43 VMOVSD -0x8(%R12,%R11,1),%XMM1 |
(2620) 0x4b8a4a VANDPD %XMM1,%XMM11,%XMM1 |
(2620) 0x4b8a4e VADDSD %XMM1,%XMM0,%XMM0 |
(2620) 0x4b8a52 MOV -0x30(%RBP),%R8 |
(2620) 0x4b8a56 VMOVSD %XMM0,(%R8,%RCX,8) |
(2620) 0x4b8a5c MOV (%RBX,%R11,1),%R8 |
(2620) 0x4b8a60 CMP %RCX,%R8 |
(2620) 0x4b8a63 JE 4b89b0 |
(2620) 0x4b8a69 CMP %RDI,%R8 |
(2620) 0x4b8a6c JL 4b89b0 |
(2620) 0x4b8a72 CMP %RSI,%R8 |
(2620) 0x4b8a75 JL 4b89c8 |
(2620) 0x4b8a7b JMP 4b89b0 |
0x4b8a80 ADD %RAX,%RDX |
0x4b8a83 VMOVSD 0x30(%R12,%RDX,8),%XMM1 |
0x4b8a8a VANDPD %XMM1,%XMM11,%XMM1 |
0x4b8a8e VADDSD %XMM1,%XMM0,%XMM0 |
0x4b8a92 VMOVSD 0x28(%R12,%RDX,8),%XMM1 |
0x4b8a99 VANDPD %XMM1,%XMM11,%XMM1 |
0x4b8a9d VADDSD %XMM1,%XMM0,%XMM0 |
0x4b8aa1 VMOVSD 0x20(%R12,%RDX,8),%XMM1 |
0x4b8aa8 VANDPD %XMM1,%XMM11,%XMM1 |
0x4b8aac VADDSD %XMM1,%XMM0,%XMM0 |
0x4b8ab0 VMOVSD 0x18(%R12,%RDX,8),%XMM1 |
0x4b8ab7 VANDPD %XMM1,%XMM11,%XMM1 |
0x4b8abb VADDSD %XMM1,%XMM0,%XMM0 |
0x4b8abf VMOVSD 0x10(%R12,%RDX,8),%XMM1 |
0x4b8ac6 VANDPD %XMM1,%XMM11,%XMM1 |
0x4b8aca VADDSD %XMM1,%XMM0,%XMM0 |
0x4b8ace VMOVSD 0x8(%R12,%RDX,8),%XMM1 |
0x4b8ad5 VANDPD %XMM1,%XMM11,%XMM1 |
0x4b8ad9 VADDSD %XMM1,%XMM0,%XMM0 |
0x4b8add VMOVSD (%R12,%RDX,8),%XMM1 |
0x4b8ae3 VANDPD %XMM1,%XMM11,%XMM1 |
0x4b8ae7 VADDSD %XMM1,%XMM0,%XMM0 |
(2587) 0x4b8aeb VMOVSD %XMM0,(%R9) |
(2586) 0x4b8af0 CMP -0x50(%RBP),%RCX |
(2586) 0x4b8af4 LEA 0x1(%RCX),%RCX |
(2586) 0x4b8af8 MOV -0x40(%RBP),%R9 |
(2586) 0x4b8afc JE 4b8330 |
(2586) 0x4b8b02 MOV -0x80(%RBP),%RAX |
(2586) 0x4b8b06 LEA (%RAX,%RCX,1),%R8 |
(2586) 0x4b8b0a MOV -0x30(%RBP),%RAX |
(2586) 0x4b8b0e MOVQ $0,(%RAX,%R8,8) |
(2586) 0x4b8b16 MOV (%R9,%R8,8),%RDX |
(2586) 0x4b8b1a MOV 0x8(%R9,%R8,8),%RDI |
(2586) 0x4b8b1f MOV %RDI,%RAX |
(2586) 0x4b8b22 SUB %RDX,%RAX |
(2586) 0x4b8b25 JLE 4b8af0 |
(2586) 0x4b8b27 MOV -0x30(%RBP),%R9 |
(2586) 0x4b8b2b LEA (%R9,%R8,8),%R9 |
(2586) 0x4b8b2f LEA (%R12,%RDI,8),%R8 |
(2586) 0x4b8b33 ADD $-0x8,%R8 |
(2586) 0x4b8b37 CMP %R9,%R8 |
(2586) 0x4b8b3a JB 4b8b70 |
(2586) 0x4b8b3c LEA (%R12,%RDX,8),%R8 |
(2586) 0x4b8b40 CMP %R8,%R9 |
(2586) 0x4b8b43 JB 4b8b70 |
(2586) 0x4b8b45 VXORPD %XMM0,%XMM0,%XMM0 |
(2586) 0x4b8b49 NOPL (%RAX) |
(2589) 0x4b8b50 VMOVSD (%R12,%RDX,8),%XMM1 |
(2589) 0x4b8b56 VANDPD %XMM1,%XMM11,%XMM1 |
(2589) 0x4b8b5a VADDSD %XMM1,%XMM0,%XMM0 |
(2589) 0x4b8b5e VMOVSD %XMM0,(%R9) |
(2589) 0x4b8b63 INC %RDX |
(2589) 0x4b8b66 CMP %RDX,%RDI |
(2589) 0x4b8b69 JNE 4b8b50 |
(2586) 0x4b8b6b JMP 4b8af0 |
0x4b8b6d NOPL (%RAX) |
(2587) 0x4b8b70 VXORPD %XMM0,%XMM0,%XMM0 |
(2587) 0x4b8b74 CMP $0x8,%RAX |
(2587) 0x4b8b78 JB 4b8c09 |
(2587) 0x4b8b7e MOV %RAX,%RDI |
(2587) 0x4b8b81 SHR $0x3,%RDI |
(2587) 0x4b8b85 MOV -0xc8(%RBP),%R8 |
(2587) 0x4b8b8c LEA (%R8,%RDX,8),%R8 |
(2588) 0x4b8b90 VMOVSD -0x38(%R8),%XMM1 |
(2588) 0x4b8b96 VMOVSD -0x30(%R8),%XMM2 |
(2588) 0x4b8b9c VMOVSD -0x28(%R8),%XMM3 |
(2588) 0x4b8ba2 VMOVSD -0x20(%R8),%XMM4 |
(2588) 0x4b8ba8 VANDPD %XMM1,%XMM12,%XMM1 |
(2588) 0x4b8bac VANDPD %XMM2,%XMM12,%XMM2 |
(2588) 0x4b8bb0 VANDPD %XMM3,%XMM12,%XMM3 |
(2588) 0x4b8bb4 VANDPD %XMM4,%XMM12,%XMM4 |
(2588) 0x4b8bb8 VMOVSD -0x18(%R8),%XMM5 |
(2588) 0x4b8bbe VANDPD %XMM5,%XMM12,%XMM5 |
(2588) 0x4b8bc2 VMOVSD -0x10(%R8),%XMM6 |
(2588) 0x4b8bc8 VANDPD %XMM6,%XMM12,%XMM6 |
(2588) 0x4b8bcc VMOVSD -0x8(%R8),%XMM7 |
(2588) 0x4b8bd2 VANDPD %XMM7,%XMM12,%XMM7 |
(2588) 0x4b8bd6 VMOVSD (%R8),%XMM8 |
(2588) 0x4b8bdb VANDPD %XMM12,%XMM8,%XMM8 |
(2588) 0x4b8be0 VADDSD %XMM7,%XMM8,%XMM7 |
(2588) 0x4b8be4 VADDSD %XMM0,%XMM7,%XMM0 |
(2588) 0x4b8be8 VADDSD %XMM5,%XMM4,%XMM4 |
(2588) 0x4b8bec VADDSD %XMM6,%XMM3,%XMM3 |
(2588) 0x4b8bf0 VADDSD %XMM4,%XMM3,%XMM3 |
(2588) 0x4b8bf4 VADDSD %XMM2,%XMM1,%XMM1 |
(2588) 0x4b8bf8 VADDSD %XMM1,%XMM0,%XMM0 |
(2588) 0x4b8bfc VADDSD %XMM3,%XMM0,%XMM0 |
(2588) 0x4b8c00 ADD $0x40,%R8 |
(2588) 0x4b8c04 DEC %RDI |
(2588) 0x4b8c07 JNE 4b8b90 |
(2587) 0x4b8c09 MOV %EAX,%EDI |
(2587) 0x4b8c0b AND $0x7,%EDI |
(2587) 0x4b8c0e DEC %RDI |
(2587) 0x4b8c11 CMP $0x6,%RDI |
(2587) 0x4b8c15 JA 4b8aeb |
0x4b8c1b AND $-0x8,%RAX |
0x4b8c1f JMP 0x5241a0(,%RDI,8) |
0x4b8c26 ADD %RAX,%RDX |
0x4b8c29 JMP 4b8add |
0x4b8c2e ADD %RAX,%RDX |
0x4b8c31 JMP 4b8ace |
0x4b8c36 ADD %RAX,%RDX |
0x4b8c39 JMP 4b8abf |
0x4b8c3e ADD %RAX,%RDX |
0x4b8c41 JMP 4b8ab0 |
0x4b8c46 ADD %RAX,%RDX |
0x4b8c49 JMP 4b8aa1 |
0x4b8c4e ADD %RAX,%RDX |
0x4b8c51 JMP 4b8a92 |
0x4b8c56 NOPW %CS:(%RAX,%RAX,1) |
Path / |
Source file and lines | ams.c:3363-3540 |
Module | exec |
nb instructions | 582 |
nb uops | 594 |
loop length | 2883 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 9 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 35 |
ADD-SUB / MUL ratio | 28.00 |
micro-operation queue | 99.00 cycles |
front end | 99.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 49.33 | 49.13 | 48.67 | 48.67 | 23.50 | 49.13 | 49.20 | 23.50 | 23.50 | 23.50 | 49.20 | 48.67 |
cycles | 49.33 | 49.13 | 48.67 | 48.67 | 23.50 | 49.13 | 49.20 | 23.50 | 23.50 | 23.50 | 49.20 | 48.67 |
Cycles executing div or sqrt instructions | 16.00 |
FE+BE cycles | 192.64 |
Stall cycles | 92.80 |
ROB full (events) | 107.77 |
Front-end | 99.00 |
Dispatch | 49.33 |
DIV/SQRT | 16.00 |
Overall L1 | 99.00 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 25% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 97% |
all | 18% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | 0% |
other | 68% |
all | 11% |
load | 11% |
store | 11% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 15% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 24% |
all | 14% |
load | 12% |
store | 11% |
mul | 12% |
add-sub | 12% |
fma | 12% |
div/sqrt | 9% |
other | 21% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0xf8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVQ $0,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0x1,-0x120(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x120(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0xe0(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0xf8(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x60(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x74c910,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,-0xdc(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 40fff0 <__kmpc_for_static_init_8@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x40(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xf8(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RAX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 4b6684 <hypre_ParCSRComputeL1NormsThreads.extracted+0x104> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x74c930,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xdc(%RBP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0xf8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP 40fd40 <__kmpc_for_static_fini@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0xa8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x58(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
OR %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x20,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
JE 4b66ac <hypre_ParCSRComputeL1NormsThreads.extracted+0x12c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %RCX | 5 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 10 |
MOV %RDX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 4b66ba <hypre_ParCSRComputeL1NormsThreads.extracted+0x13a> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
DIV %ECX | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV %RDX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xb8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%R8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x38(%R11),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x38(%R12),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %R8,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%R9,%RAX,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x10,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (,%R8,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDX,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x10(%RDX,%RAX,8),%R8 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R8,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%RDX,%RAX,8),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%R9,%RAX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
DEC %RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VXORPD %XMM9,%XMM9,%XMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVDDUP 0x5b8a0(%RIP),%XMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDDUP 0x5ab30(%RIP),%XMM11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDDUP 0x5ab28(%RIP),%XMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x5a4f8(%RIP),%XMM13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x5a500(%RIP),%XMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 4b680a <hypre_ParCSRComputeL1NormsThreads.extracted+0x28a> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 0x523ff8(,%RAX,8) | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 |
CMP %RSI,-0xb0(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 4b8330 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1db0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x60(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMOVL %RDI,%R8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %R8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x88(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
DEC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R14,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 4b7a13 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1493> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0,-0x98(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 4b7c16 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1696> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL -0x60(%RBP),%RAX | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
ADD %RAX,-0x80(%RBP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4b6926 <hypre_ParCSRComputeL1NormsThreads.extracted+0x3a6> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RSI,-0xb0(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 4b8330 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1db0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x90(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVL %RAX,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x88(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
DEC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R14,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 4b7a36 <hypre_ParCSRComputeL1NormsThreads.extracted+0x14b6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0,-0x98(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 4b7ddd <hypre_ParCSRComputeL1NormsThreads.extracted+0x185d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL -0x60(%RBP),%RAX | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
ADD %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4b6ca2 <hypre_ParCSRComputeL1NormsThreads.extracted+0x722> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RSI,-0xb0(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 4b8330 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1db0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x90(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x60(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDI,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVL %R8,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV -0x48(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x88(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R9,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
DEC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMPQ $0,-0x98(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 4b7a57 <hypre_ParCSRComputeL1NormsThreads.extracted+0x14d7> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %R8,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4b773b <hypre_ParCSRComputeL1NormsThreads.extracted+0x11bb> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RSI,-0xb0(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 4b8330 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1db0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x60(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVL %RDX,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV -0x48(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x88(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
DEC %RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %RDX,%R8 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %RAX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4b70ae <hypre_ParCSRComputeL1NormsThreads.extracted+0xb2e> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $-0x8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV -0x80(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 0x524018(,%RDX,8) | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b76a6 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1126> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7692 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1112> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b767e <hypre_ParCSRComputeL1NormsThreads.extracted+0x10fe> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b766a <hypre_ParCSRComputeL1NormsThreads.extracted+0x10ea> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7656 <hypre_ParCSRComputeL1NormsThreads.extracted+0x10d6> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7642 <hypre_ParCSRComputeL1NormsThreads.extracted+0x10c2> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD 0x30(%R11,%RCX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VFMADD231SD %XMM13,%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x28(%R11,%RCX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VFMADD132SD %XMM13,%XMM0,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %XMM1,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMOVSD 0x20(%R11,%RCX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VFMADD132SD %XMM13,%XMM0,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %XMM1,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMOVSD 0x18(%R11,%RCX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VFMADD132SD %XMM13,%XMM0,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %XMM1,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMOVSD 0x10(%R11,%RCX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VFMADD132SD %XMM13,%XMM0,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %XMM1,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMOVSD 0x8(%R11,%RCX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VFMADD132SD %XMM13,%XMM0,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %XMM1,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMOVSD (%R11,%RCX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VFMADD132SD %XMM13,%XMM0,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM1,(%R10) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVAPD %XMM1,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMULSD %XMM14,%XMM15,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VUCOMISD %XMM1,%XMM0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JA 4b70a0 <hypre_ParCSRComputeL1NormsThreads.extracted+0xb20> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 4b7543 <hypre_ParCSRComputeL1NormsThreads.extracted+0xfc3> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD 0x30(%R11,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM1,%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x28(%R11,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM1,%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x20(%R11,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM1,%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x18(%R11,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM1,%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x10(%R11,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM1,%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x8(%R11,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM1,%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD (%R11,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD213SD %XMM0,%XMM1,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM1,(%R10) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $-0x8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JMP 0x524050(,%R8,8) | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x38(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4b78d0 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1350> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x38(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4b78c4 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1344> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b78b4 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1334> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b78a8 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1328> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b789c <hypre_ParCSRComputeL1NormsThreads.extracted+0x131c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7890 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1310> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD 0x30(%R12,%RDX,8),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM0,%XMM0,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x28(%R12,%RDX,8),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM0,%XMM0,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x20(%R12,%RDX,8),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM0,%XMM0,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x18(%R12,%RDX,8),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM0,%XMM0,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0x38(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x10(%R12,%RDX,8),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM0,%XMM0,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x8(%R12,%RDX,8),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM0,%XMM0,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD (%R12,%RDX,8),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD213SD %XMM1,%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM0,(%R10) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $-0x8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JMP 0x524088(,%RCX,8) | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b771d <hypre_ParCSRComputeL1NormsThreads.extracted+0x119d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7711 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1191> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7705 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1185> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b76f9 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1179> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b76ed <hypre_ParCSRComputeL1NormsThreads.extracted+0x116d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b76e1 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1161> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
CMPQ $0,-0x98(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 4b88c5 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2345> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL -0x60(%RBP),%RAX | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
ADD %RAX,-0x80(%RBP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4b8018 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1a98> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
CMPQ $0,-0x98(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 4b88d9 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2359> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL -0x60(%RBP),%RAX | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
ADD %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4b85f4 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2074> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %R8,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4b7ace <hypre_ParCSRComputeL1NormsThreads.extracted+0x154e> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD 0x30(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM1,%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x28(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM1,%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x20(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM1,%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x18(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM1,%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x10(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM1,%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x8(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM1,%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD (%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD213SD %XMM0,%XMM1,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM1,(%R9) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $-0x8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JMP 0x5240c0(,%R8,8) | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7ab0 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1530> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7aa4 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1524> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7a98 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1518> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7a8c <hypre_ParCSRComputeL1NormsThreads.extracted+0x150c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7a80 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1500> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7a74 <hypre_ParCSRComputeL1NormsThreads.extracted+0x14f4> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL -0x60(%RBP),%RAX | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
ADD %RAX,-0x80(%RBP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4b7c42 <hypre_ParCSRComputeL1NormsThreads.extracted+0x16c2> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL -0x60(%RBP),%RAX | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
ADD %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4b7e02 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1882> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x38(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4b8330 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1db0> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD 0x28(%R11,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x20(%R11,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x18(%R11,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x10(%R11,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x8(%R11,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD (%R11,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
AND $-0x8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JMP 0x524130(,%RDI,8) | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b81c1 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1c41> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b81b2 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1c32> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b81a3 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1c23> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b8194 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1c14> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b8185 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1c05> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b8176 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1bf6> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD 0x30(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x28(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x20(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x18(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x10(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x8(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD (%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
AND $-0x8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JMP 0x524168(,%RCX,8) | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7ff7 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1a77> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7fe8 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1a68> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7fd9 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1a59> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7fca <hypre_ParCSRComputeL1NormsThreads.extracted+0x1a4a> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7fbb <hypre_ParCSRComputeL1NormsThreads.extracted+0x1a3b> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD 0x30(%R11,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
JMP 4b7fac <hypre_ParCSRComputeL1NormsThreads.extracted+0x1a2c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0x40(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD 0x28(%R11,%RCX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x20(%R11,%RCX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x18(%R11,%RCX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x10(%R11,%RCX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x8(%R11,%RCX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD (%R11,%RCX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $-0x8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JMP 0x5240f8(,%RDX,8) | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b85cf <hypre_ParCSRComputeL1NormsThreads.extracted+0x204f> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b85c0 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2040> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b85b1 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2031> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b85a2 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2022> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b8593 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2013> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD 0x30(%R11,%RCX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
JMP 4b8584 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2004> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL -0x60(%RBP),%RAX | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
ADD %RAX,-0x80(%RBP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4b8b02 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2582> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL -0x60(%RBP),%RAX | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
ADD %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4b8902 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2382> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD 0x30(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x28(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x20(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x18(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x10(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x8(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD (%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $-0x8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JMP 0x5241a0(,%RDI,8) | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b8add <hypre_ParCSRComputeL1NormsThreads.extracted+0x255d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b8ace <hypre_ParCSRComputeL1NormsThreads.extracted+0x254e> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b8abf <hypre_ParCSRComputeL1NormsThreads.extracted+0x253f> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b8ab0 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2530> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b8aa1 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2521> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b8a92 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2512> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | ams.c:3363-3540 |
Module | exec |
nb instructions | 582 |
nb uops | 594 |
loop length | 2883 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 9 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 35 |
ADD-SUB / MUL ratio | 28.00 |
micro-operation queue | 99.00 cycles |
front end | 99.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 49.33 | 49.13 | 48.67 | 48.67 | 23.50 | 49.13 | 49.20 | 23.50 | 23.50 | 23.50 | 49.20 | 48.67 |
cycles | 49.33 | 49.13 | 48.67 | 48.67 | 23.50 | 49.13 | 49.20 | 23.50 | 23.50 | 23.50 | 49.20 | 48.67 |
Cycles executing div or sqrt instructions | 16.00 |
FE+BE cycles | 192.64 |
Stall cycles | 92.80 |
ROB full (events) | 107.77 |
Front-end | 99.00 |
Dispatch | 49.33 |
DIV/SQRT | 16.00 |
Overall L1 | 99.00 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 25% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 97% |
all | 18% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | 0% |
other | 68% |
all | 11% |
load | 11% |
store | 11% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 15% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 24% |
all | 14% |
load | 12% |
store | 11% |
mul | 12% |
add-sub | 12% |
fma | 12% |
div/sqrt | 9% |
other | 21% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0xf8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVQ $0,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0x1,-0x120(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x120(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0xe0(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0xf8(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x60(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x74c910,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,-0xdc(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 40fff0 <__kmpc_for_static_init_8@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x40(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xf8(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RAX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 4b6684 <hypre_ParCSRComputeL1NormsThreads.extracted+0x104> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x74c930,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xdc(%RBP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0xf8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP 40fd40 <__kmpc_for_static_fini@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0xa8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x58(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
OR %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x20,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
JE 4b66ac <hypre_ParCSRComputeL1NormsThreads.extracted+0x12c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %RCX | 5 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 10 |
MOV %RDX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 4b66ba <hypre_ParCSRComputeL1NormsThreads.extracted+0x13a> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
DIV %ECX | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV %RDX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xb8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%R8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x38(%R11),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x38(%R12),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %R8,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%R9,%RAX,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x10,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (,%R8,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDX,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x10(%RDX,%RAX,8),%R8 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R8,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%RDX,%RAX,8),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%R9,%RAX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
DEC %RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VXORPD %XMM9,%XMM9,%XMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVDDUP 0x5b8a0(%RIP),%XMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDDUP 0x5ab30(%RIP),%XMM11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDDUP 0x5ab28(%RIP),%XMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x5a4f8(%RIP),%XMM13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x5a500(%RIP),%XMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 4b680a <hypre_ParCSRComputeL1NormsThreads.extracted+0x28a> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 0x523ff8(,%RAX,8) | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 |
CMP %RSI,-0xb0(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 4b8330 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1db0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x60(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMOVL %RDI,%R8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %R8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x88(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
DEC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R14,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 4b7a13 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1493> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0,-0x98(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 4b7c16 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1696> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL -0x60(%RBP),%RAX | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
ADD %RAX,-0x80(%RBP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4b6926 <hypre_ParCSRComputeL1NormsThreads.extracted+0x3a6> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RSI,-0xb0(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 4b8330 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1db0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x90(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVL %RAX,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x88(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
DEC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R14,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 4b7a36 <hypre_ParCSRComputeL1NormsThreads.extracted+0x14b6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0,-0x98(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 4b7ddd <hypre_ParCSRComputeL1NormsThreads.extracted+0x185d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL -0x60(%RBP),%RAX | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
ADD %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4b6ca2 <hypre_ParCSRComputeL1NormsThreads.extracted+0x722> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RSI,-0xb0(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 4b8330 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1db0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x90(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x60(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDI,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVL %R8,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV -0x48(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x88(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R9,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
DEC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMPQ $0,-0x98(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 4b7a57 <hypre_ParCSRComputeL1NormsThreads.extracted+0x14d7> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %R8,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4b773b <hypre_ParCSRComputeL1NormsThreads.extracted+0x11bb> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RSI,-0xb0(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 4b8330 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1db0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x60(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVL %RDX,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV -0x48(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x88(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
DEC %RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %RDX,%R8 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %RAX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4b70ae <hypre_ParCSRComputeL1NormsThreads.extracted+0xb2e> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $-0x8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV -0x80(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 0x524018(,%RDX,8) | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b76a6 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1126> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7692 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1112> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b767e <hypre_ParCSRComputeL1NormsThreads.extracted+0x10fe> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b766a <hypre_ParCSRComputeL1NormsThreads.extracted+0x10ea> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7656 <hypre_ParCSRComputeL1NormsThreads.extracted+0x10d6> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7642 <hypre_ParCSRComputeL1NormsThreads.extracted+0x10c2> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD 0x30(%R11,%RCX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VFMADD231SD %XMM13,%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x28(%R11,%RCX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VFMADD132SD %XMM13,%XMM0,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %XMM1,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMOVSD 0x20(%R11,%RCX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VFMADD132SD %XMM13,%XMM0,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %XMM1,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMOVSD 0x18(%R11,%RCX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VFMADD132SD %XMM13,%XMM0,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %XMM1,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMOVSD 0x10(%R11,%RCX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VFMADD132SD %XMM13,%XMM0,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %XMM1,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMOVSD 0x8(%R11,%RCX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VFMADD132SD %XMM13,%XMM0,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %XMM1,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMOVSD (%R11,%RCX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VFMADD132SD %XMM13,%XMM0,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM1,(%R10) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVAPD %XMM1,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMULSD %XMM14,%XMM15,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VUCOMISD %XMM1,%XMM0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JA 4b70a0 <hypre_ParCSRComputeL1NormsThreads.extracted+0xb20> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 4b7543 <hypre_ParCSRComputeL1NormsThreads.extracted+0xfc3> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD 0x30(%R11,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM1,%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x28(%R11,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM1,%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x20(%R11,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM1,%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x18(%R11,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM1,%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x10(%R11,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM1,%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x8(%R11,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM1,%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD (%R11,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD213SD %XMM0,%XMM1,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM1,(%R10) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $-0x8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JMP 0x524050(,%R8,8) | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x38(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4b78d0 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1350> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x38(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4b78c4 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1344> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b78b4 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1334> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b78a8 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1328> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b789c <hypre_ParCSRComputeL1NormsThreads.extracted+0x131c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7890 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1310> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD 0x30(%R12,%RDX,8),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM0,%XMM0,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x28(%R12,%RDX,8),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM0,%XMM0,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x20(%R12,%RDX,8),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM0,%XMM0,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x18(%R12,%RDX,8),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM0,%XMM0,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0x38(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x10(%R12,%RDX,8),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM0,%XMM0,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x8(%R12,%RDX,8),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM0,%XMM0,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD (%R12,%RDX,8),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD213SD %XMM1,%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM0,(%R10) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $-0x8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JMP 0x524088(,%RCX,8) | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b771d <hypre_ParCSRComputeL1NormsThreads.extracted+0x119d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7711 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1191> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7705 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1185> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b76f9 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1179> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b76ed <hypre_ParCSRComputeL1NormsThreads.extracted+0x116d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b76e1 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1161> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
CMPQ $0,-0x98(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 4b88c5 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2345> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL -0x60(%RBP),%RAX | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
ADD %RAX,-0x80(%RBP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4b8018 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1a98> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
CMPQ $0,-0x98(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 4b88d9 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2359> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL -0x60(%RBP),%RAX | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
ADD %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4b85f4 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2074> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %R8,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4b7ace <hypre_ParCSRComputeL1NormsThreads.extracted+0x154e> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD 0x30(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM1,%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x28(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM1,%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x20(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM1,%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x18(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM1,%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x10(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM1,%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x8(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD %XMM1,%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD (%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD213SD %XMM0,%XMM1,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM1,(%R9) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $-0x8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JMP 0x5240c0(,%R8,8) | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7ab0 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1530> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7aa4 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1524> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7a98 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1518> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7a8c <hypre_ParCSRComputeL1NormsThreads.extracted+0x150c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7a80 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1500> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7a74 <hypre_ParCSRComputeL1NormsThreads.extracted+0x14f4> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL -0x60(%RBP),%RAX | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
ADD %RAX,-0x80(%RBP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4b7c42 <hypre_ParCSRComputeL1NormsThreads.extracted+0x16c2> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL -0x60(%RBP),%RAX | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
ADD %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4b7e02 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1882> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x38(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4b8330 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1db0> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD 0x28(%R11,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x20(%R11,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x18(%R11,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x10(%R11,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x8(%R11,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD (%R11,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
AND $-0x8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JMP 0x524130(,%RDI,8) | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b81c1 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1c41> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b81b2 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1c32> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b81a3 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1c23> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b8194 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1c14> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b8185 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1c05> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b8176 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1bf6> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD 0x30(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x28(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x20(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x18(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x10(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x8(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD (%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
AND $-0x8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JMP 0x524168(,%RCX,8) | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7ff7 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1a77> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7fe8 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1a68> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7fd9 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1a59> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7fca <hypre_ParCSRComputeL1NormsThreads.extracted+0x1a4a> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b7fbb <hypre_ParCSRComputeL1NormsThreads.extracted+0x1a3b> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD 0x30(%R11,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
JMP 4b7fac <hypre_ParCSRComputeL1NormsThreads.extracted+0x1a2c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0x40(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD 0x28(%R11,%RCX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x20(%R11,%RCX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x18(%R11,%RCX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x10(%R11,%RCX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x8(%R11,%RCX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD (%R11,%RCX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $-0x8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JMP 0x5240f8(,%RDX,8) | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b85cf <hypre_ParCSRComputeL1NormsThreads.extracted+0x204f> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b85c0 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2040> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b85b1 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2031> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b85a2 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2022> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b8593 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2013> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD 0x30(%R11,%RCX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
JMP 4b8584 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2004> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL -0x60(%RBP),%RAX | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
ADD %RAX,-0x80(%RBP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4b8b02 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2582> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL -0x60(%RBP),%RAX | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
ADD %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4b8902 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2382> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD 0x30(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x28(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x20(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x18(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x10(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x8(%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD (%R12,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %XMM1,%XMM11,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $-0x8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JMP 0x5241a0(,%RDI,8) | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b8add <hypre_ParCSRComputeL1NormsThreads.extracted+0x255d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b8ace <hypre_ParCSRComputeL1NormsThreads.extracted+0x254e> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b8abf <hypre_ParCSRComputeL1NormsThreads.extracted+0x253f> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b8ab0 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2530> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b8aa1 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2521> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4b8a92 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2512> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼hypre_ParCSRComputeL1NormsThreads.extracted– | 0.21 | 0.05 |
▼Loop 2597 - ams.c:3382-3401 - exec– | 0 | 0 |
▼Loop 2596 - ams.c:3382-3401 - exec– | 0.01 | 0 |
○Loop 2600 - ams.c:3388-3389 - exec | 0.13 | 0.03 |
○Loop 2601 - ams.c:3388-3389 - exec | 0 | 0 |
○Loop 2599 - ams.c:3393-3394 - exec | 0 | 0 |
○Loop 2598 - ams.c:3393-3394 - exec | 0 | 0 |
▼Loop 2618 - ams.c:3416-3439 - exec– | 0 | 0 |
○Loop 2619 - ams.c:3422-3426 - exec | 0 | 0 |
○Loop 2620 - ams.c:3422-3426 - exec | 0 | 0 |
▼Loop 2610 - ams.c:3470-3527 - exec– | 0 | 0 |
○Loop 2612 - ams.c:3493-3494 - exec | 0 | 0 |
○Loop 2617 - ams.c:3501-3513 - exec | 0 | 0 |
○Loop 2616 - ams.c:3519-3521 - exec | 0 | 0 |
○Loop 2615 - ams.c:3519-3521 - exec | 0 | 0 |
○Loop 2613 - ams.c:3476-3487 - exec | 0 | 0 |
○Loop 2614 - ams.c:3476-3487 - exec | 0 | 0 |
○Loop 2611 - ams.c:3493-3494 - exec | 0 | 0 |
▼Loop 2605 - ams.c:3458-3465 - exec– | 0 | 0 |
○Loop 2607 - ams.c:3464-3465 - exec | 0 | 0 |
○Loop 2609 - ams.c:3461-3462 - exec | 0 | 0 |
○Loop 2608 - ams.c:3461-3462 - exec | 0 | 0 |
○Loop 2606 - ams.c:3464-3465 - exec | 0 | 0 |
▼Loop 2591 - ams.c:3416-3439 - exec– | 0 | 0 |
○Loop 2592 - ams.c:3431-3432 - exec | 0 | 0 |
▼Loop 2590 - ams.c:3416-3439 - exec– | 0 | 0 |
○Loop 2593 - ams.c:3431-3432 - exec | 0 | 0 |
○Loop 2594 - ams.c:3422-3426 - exec | 0 | 0 |
○Loop 2595 - ams.c:3422-3426 - exec | 0 | 0 |
▼Loop 2582 - ams.c:3363-3540 - exec– | 0 | 0 |
○Loop 2585 - ams.c:3532-3534 - exec | 0.05 | 0.01 |
○Loop 2583 - ams.c:3536-3538 - exec | 0.01 | 0 |
○Loop 2584 - ams.c:3532-3534 - exec | 0 | 0 |
▼Loop 2632 - ams.c:3382-3409 - exec– | 0 | 0 |
○Loop 2636 - ams.c:3401-3403 - exec | 0 | 0 |
○Loop 2634 - ams.c:3407-3409 - exec | 0 | 0 |
○Loop 2633 - ams.c:3407-3409 - exec | 0 | 0 |
○Loop 2635 - ams.c:3401-3403 - exec | 0 | 0 |
▼Loop 2602 - ams.c:3458-3462 - exec– | 0 | 0 |
○Loop 2603 - ams.c:3461-3462 - exec | 0 | 0 |
○Loop 2604 - ams.c:3461-3462 - exec | 0 | 0 |
▼Loop 2621 - ams.c:3416-3444 - exec– | 0 | 0 |
○Loop 2623 - ams.c:3439-3444 - exec | 0 | 0 |
○Loop 2622 - ams.c:3439-3444 - exec | 0 | 0 |
▼Loop 2629 - ams.c:3382-3403 - exec– | 0 | 0 |
○Loop 2630 - ams.c:3401-3403 - exec | 0 | 0 |
○Loop 2631 - ams.c:3401-3403 - exec | 0 | 0 |
▼Loop 2624 - ams.c:3416-3451 - exec– | 0 | 0 |
○Loop 2627 - ams.c:3439-3444 - exec | 0 | 0 |
○Loop 2625 - ams.c:3449-3451 - exec | 0 | 0 |
○Loop 2628 - ams.c:3439-3444 - exec | 0 | 0 |
○Loop 2626 - ams.c:3449-3451 - exec | 0 | 0 |
▼Loop 2587 - ams.c:3382-3401 - exec– | 0 | 0 |
▼Loop 2586 - ams.c:3382-3401 - exec– | 0 | 0 |
○Loop 2589 - ams.c:3388-3389 - exec | 0 | 0 |
○Loop 2588 - ams.c:3388-3389 - exec | 0 | 0 |