Loop Id: 794 | Module: exec | Source: par_multi_interp.c:917-1099 [...] | Coverage: 0.5% |
---|
Loop Id: 794 | Module: exec | Source: par_multi_interp.c:917-1099 [...] | Coverage: 0.5% |
---|
0x445b9a MOV -0x38(%RBP),%R14 |
0x445b9e XCHG %AX,%AX |
0x445ba0 INC %R8 |
0x445ba3 MOV -0xa8(%RBP),%RDX |
0x445baa MOV -0x68(%RBP),%RSI |
0x445bae CMP 0x8(%RDX,%RSI,8),%R8 |
0x445bb3 JGE 445ea0 |
0x445bb9 MOV -0x118(%RBP),%RDX |
0x445bc0 MOV (%RDX,%R8,8),%R13 |
0x445bc4 MOV -0x108(%RBP),%RDX |
0x445bcb CMP %R14,(%RDX,%R13,8) |
0x445bcf JNE 445ba0 |
0x445bd1 MOV -0x40(%RBP),%RDX |
0x445bd5 MOV 0x8(%RDX,%R13,8),%R10 |
0x445bda TEST %R10,%R10 |
0x445bdd JLE 445d3b |
0x445be3 MOV -0x98(%RBP),%RDX |
0x445bea MOV %R13,-0x78(%RBP) |
0x445bee MOV (%RDX,%R13,8),%R11 |
0x445bf2 ADD %R11,%R10 |
0x445bf5 MOV -0x58(%RBP),%RDX |
0x445bf9 MOV -0x8(%RDX,%R12,8),%RSI |
0x445bfe LEA 0x1(%R11),%RDX |
0x445c02 CMP %RDX,%R10 |
0x445c05 CMOVLE %RDX,%R10 |
0x445c09 MOV %R10,%RDX |
0x445c0c SUB %R11,%RDX |
0x445c0f CMP $0x4,%RDX |
0x445c13 MOV %RDX,-0x30(%RBP) |
0x445c17 JAE 445c6b |
0x445c19 MOV -0x30(%RBP),%R9 |
0x445c1d MOV %R9,%RDX |
0x445c20 AND $-0x4,%RDX |
0x445c24 CMP %R9,%RDX |
0x445c27 JAE 445d33 |
0x445c2d ADD %RDX,%R11 |
0x445c30 MOV -0x38(%RBP),%R14 |
0x445c34 MOV -0x78(%RBP),%R13 |
0x445c38 JMP 445c4c |
(797) 0x445c40 INC %R11 |
(797) 0x445c43 CMP %R11,%R10 |
(797) 0x445c46 JE 445d3b |
(797) 0x445c4c MOV (%RSI,%R11,8),%RDX |
(797) 0x445c50 CMP %RDI,(%RBX,%RDX,8) |
(797) 0x445c54 JE 445c40 |
(797) 0x445c56 MOV -0x58(%RBP),%R9 |
(797) 0x445c5a MOV (%R9,%R12,8),%R9 |
(797) 0x445c5e MOV %RDX,(%R9,%RAX,8) |
(797) 0x445c62 INC %RAX |
(797) 0x445c65 MOV %RDI,(%RBX,%RDX,8) |
(797) 0x445c69 JMP 445c40 |
0x445c6b SHR $0x2,%RDX |
0x445c6f LEA (%RSI,%R11,8),%R13 |
0x445c73 ADD $0x18,%R13 |
0x445c77 JMP 445c89 |
(798) 0x445c80 ADD $0x20,%R13 |
(798) 0x445c84 DEC %RDX |
(798) 0x445c87 JE 445c19 |
(798) 0x445c89 MOV -0x18(%R13),%R14 |
(798) 0x445c8d CMP %RDI,(%RBX,%R14,8) |
(798) 0x445c91 JNE 445cc0 |
(798) 0x445c93 MOV -0x10(%R13),%R14 |
(798) 0x445c97 CMP %RDI,(%RBX,%R14,8) |
(798) 0x445c9b JNE 445cdd |
(798) 0x445c9d MOV -0x8(%R13),%R14 |
(798) 0x445ca1 CMP %RDI,(%RBX,%R14,8) |
(798) 0x445ca5 JNE 445cfa |
(798) 0x445ca7 MOV (%R13),%R14 |
(798) 0x445cab CMP %RDI,(%RBX,%R14,8) |
(798) 0x445caf JE 445c80 |
(798) 0x445cb1 JMP 445d1b |
(798) 0x445cc0 MOV -0x58(%RBP),%R9 |
(798) 0x445cc4 MOV (%R9,%R12,8),%R9 |
(798) 0x445cc8 MOV %R14,(%R9,%RAX,8) |
(798) 0x445ccc INC %RAX |
(798) 0x445ccf MOV %RDI,(%RBX,%R14,8) |
(798) 0x445cd3 MOV -0x10(%R13),%R14 |
(798) 0x445cd7 CMP %RDI,(%RBX,%R14,8) |
(798) 0x445cdb JE 445c9d |
(798) 0x445cdd MOV -0x58(%RBP),%R9 |
(798) 0x445ce1 MOV (%R9,%R12,8),%R9 |
(798) 0x445ce5 MOV %R14,(%R9,%RAX,8) |
(798) 0x445ce9 INC %RAX |
(798) 0x445cec MOV %RDI,(%RBX,%R14,8) |
(798) 0x445cf0 MOV -0x8(%R13),%R14 |
(798) 0x445cf4 CMP %RDI,(%RBX,%R14,8) |
(798) 0x445cf8 JE 445ca7 |
(798) 0x445cfa MOV -0x58(%RBP),%R9 |
(798) 0x445cfe MOV (%R9,%R12,8),%R9 |
(798) 0x445d02 MOV %R14,(%R9,%RAX,8) |
(798) 0x445d06 INC %RAX |
(798) 0x445d09 MOV %RDI,(%RBX,%R14,8) |
(798) 0x445d0d MOV (%R13),%R14 |
(798) 0x445d11 CMP %RDI,(%RBX,%R14,8) |
(798) 0x445d15 JE 445c80 |
(798) 0x445d1b MOV -0x58(%RBP),%R9 |
(798) 0x445d1f MOV (%R9,%R12,8),%R9 |
(798) 0x445d23 MOV %R14,(%R9,%RAX,8) |
(798) 0x445d27 INC %RAX |
(798) 0x445d2a MOV %RDI,(%RBX,%R14,8) |
(798) 0x445d2e JMP 445c80 |
0x445d33 MOV -0x38(%RBP),%R14 |
0x445d37 MOV -0x78(%RBP),%R13 |
0x445d3b MOV -0x48(%RBP),%RDX |
0x445d3f MOV 0x8(%RDX,%R13,8),%R10 |
0x445d44 TEST %R10,%R10 |
0x445d47 JLE 445ba0 |
0x445d4d MOV -0x50(%RBP),%RDX |
0x445d51 MOV (%RDX,%R13,8),%R9 |
0x445d55 ADD %R9,%R10 |
0x445d58 MOV -0x60(%RBP),%RDX |
0x445d5c MOV -0x8(%RDX,%R12,8),%RSI |
0x445d61 LEA 0x1(%R9),%RDX |
0x445d65 CMP %RDX,%R10 |
0x445d68 CMOVLE %RDX,%R10 |
0x445d6c MOV %R10,%R11 |
0x445d6f SUB %R9,%R11 |
0x445d72 CMP $0x4,%R11 |
0x445d76 MOV %R11,-0x78(%RBP) |
0x445d7a JAE 445dcb |
0x445d7c MOV -0x78(%RBP),%RDX |
0x445d80 MOV %RDX,%R11 |
0x445d83 AND $-0x4,%R11 |
0x445d87 CMP %RDX,%R11 |
0x445d8a JAE 445b9a |
0x445d90 ADD %R11,%R9 |
0x445d93 MOV -0x38(%RBP),%R14 |
0x445d97 JMP 445dac |
(795) 0x445da0 INC %R9 |
(795) 0x445da3 CMP %R9,%R10 |
(795) 0x445da6 JE 445ba0 |
(795) 0x445dac MOV (%RSI,%R9,8),%RDX |
(795) 0x445db0 CMP %RDI,(%R15,%RDX,8) |
(795) 0x445db4 JE 445da0 |
(795) 0x445db6 MOV -0x60(%RBP),%R11 |
(795) 0x445dba MOV (%R11,%R12,8),%R11 |
(795) 0x445dbe MOV %RDX,(%R11,%RCX,8) |
(795) 0x445dc2 INC %RCX |
(795) 0x445dc5 MOV %RDI,(%R15,%RDX,8) |
(795) 0x445dc9 JMP 445da0 |
0x445dcb SHR $0x2,%R11 |
0x445dcf LEA (%RSI,%R9,8),%R14 |
0x445dd3 ADD $0x18,%R14 |
0x445dd7 JMP 445de9 |
(796) 0x445de0 ADD $0x20,%R14 |
(796) 0x445de4 DEC %R11 |
(796) 0x445de7 JE 445d7c |
(796) 0x445de9 MOV -0x18(%R14),%R13 |
(796) 0x445ded CMP %RDI,(%R15,%R13,8) |
(796) 0x445df1 JNE 445e20 |
(796) 0x445df3 MOV -0x10(%R14),%R13 |
(796) 0x445df7 CMP %RDI,(%R15,%R13,8) |
(796) 0x445dfb JNE 445e3d |
(796) 0x445dfd MOV -0x8(%R14),%R13 |
(796) 0x445e01 CMP %RDI,(%R15,%R13,8) |
(796) 0x445e05 JNE 445e5a |
(796) 0x445e07 MOV (%R14),%R13 |
(796) 0x445e0a CMP %RDI,(%R15,%R13,8) |
(796) 0x445e0e JE 445de0 |
(796) 0x445e10 JMP 445e7a |
(796) 0x445e20 MOV -0x60(%RBP),%RDX |
(796) 0x445e24 MOV (%RDX,%R12,8),%RDX |
(796) 0x445e28 MOV %R13,(%RDX,%RCX,8) |
(796) 0x445e2c INC %RCX |
(796) 0x445e2f MOV %RDI,(%R15,%R13,8) |
(796) 0x445e33 MOV -0x10(%R14),%R13 |
(796) 0x445e37 CMP %RDI,(%R15,%R13,8) |
(796) 0x445e3b JE 445dfd |
(796) 0x445e3d MOV -0x60(%RBP),%RDX |
(796) 0x445e41 MOV (%RDX,%R12,8),%RDX |
(796) 0x445e45 MOV %R13,(%RDX,%RCX,8) |
(796) 0x445e49 INC %RCX |
(796) 0x445e4c MOV %RDI,(%R15,%R13,8) |
(796) 0x445e50 MOV -0x8(%R14),%R13 |
(796) 0x445e54 CMP %RDI,(%R15,%R13,8) |
(796) 0x445e58 JE 445e07 |
(796) 0x445e5a MOV -0x60(%RBP),%RDX |
(796) 0x445e5e MOV (%RDX,%R12,8),%RDX |
(796) 0x445e62 MOV %R13,(%RDX,%RCX,8) |
(796) 0x445e66 INC %RCX |
(796) 0x445e69 MOV %RDI,(%R15,%R13,8) |
(796) 0x445e6d MOV (%R14),%R13 |
(796) 0x445e70 CMP %RDI,(%R15,%R13,8) |
(796) 0x445e74 JE 445de0 |
(796) 0x445e7a MOV -0x60(%RBP),%RDX |
(796) 0x445e7e MOV (%RDX,%R12,8),%RDX |
(796) 0x445e82 MOV %R13,(%RDX,%RCX,8) |
(796) 0x445e86 INC %RCX |
(796) 0x445e89 MOV %RDI,(%R15,%R13,8) |
(796) 0x445e8d JMP 445de0 |
/scratch_na/users/xoserete/qaas_runs/171-172-8218/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 917 - 1099 |
-------------------------------------------------------------------------------- |
917: for (i=0; i < n_coarse; i++) |
[...] |
1075: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
1076: { |
1077: j1 = S_diag_j[j]; |
1078: if (assigned[j1] == pass-1) |
1079: { |
1080: j_start = P_diag_start[j1]; |
1081: j_end = j_start+P_diag_i[j1+1]; |
1082: for (k=j_start; k < j_end; k++) |
1083: { |
1084: k1 = P_diag_pass[pass-1][k]; |
1085: if (P_marker[k1] != -i1-1) |
1086: { |
1087: P_diag_pass[pass][cnt_nz++] = k1; |
1088: P_marker[k1] = -i1-1; |
1089: } |
1090: } |
1091: j_start = P_offd_start[j1]; |
1092: j_end = j_start+P_offd_i[j1+1]; |
1093: for (k=j_start; k < j_end; k++) |
1094: { |
1095: k1 = P_offd_pass[pass-1][k]; |
1096: if (P_marker_offd[k1] != -i1-1) |
1097: { |
1098: P_offd_pass[pass][cnt_nz_offd++] = k1; |
1099: P_marker_offd[k1] = -i1-1; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.39 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source | par_multi_interp.c:917-917,par_multi_interp.c:1075-1084,par_multi_interp.c:1088-1088,par_multi_interp.c:1091-1095 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 12.50 |
CQA cycles if no scalar integer | 12.50 |
CQA cycles if FP arith vectorized | 12.50 |
CQA cycles if fully vectorized | 1.56 |
Front-end cycles | 12.50 |
DIV/SQRT cycles | 6.00 |
P0 cycles | 6.00 |
P1 cycles | 9.00 |
P2 cycles | 9.00 |
P3 cycles | 1.50 |
P4 cycles | 6.00 |
P5 cycles | 6.00 |
P6 cycles | 1.50 |
P7 cycles | 1.50 |
P8 cycles | 1.50 |
P9 cycles | 6.00 |
P10 cycles | 9.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 12.71 |
Stall cycles (UFS) | 0.00 |
Nb insns | 74.00 |
Nb uops | 73.00 |
Nb loads | 27.00 |
Nb stores | 3.00 |
Nb stack references | 13.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 19.20 |
Bytes prefetched | 0.00 |
Bytes loaded | 216.00 |
Bytes stored | 24.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.39 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source | par_multi_interp.c:917-917,par_multi_interp.c:1075-1084,par_multi_interp.c:1088-1088,par_multi_interp.c:1091-1095 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 12.50 |
CQA cycles if no scalar integer | 12.50 |
CQA cycles if FP arith vectorized | 12.50 |
CQA cycles if fully vectorized | 1.56 |
Front-end cycles | 12.50 |
DIV/SQRT cycles | 6.00 |
P0 cycles | 6.00 |
P1 cycles | 9.00 |
P2 cycles | 9.00 |
P3 cycles | 1.50 |
P4 cycles | 6.00 |
P5 cycles | 6.00 |
P6 cycles | 1.50 |
P7 cycles | 1.50 |
P8 cycles | 1.50 |
P9 cycles | 6.00 |
P10 cycles | 9.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 12.71 |
Stall cycles (UFS) | 0.00 |
Nb insns | 74.00 |
Nb uops | 73.00 |
Nb loads | 27.00 |
Nb stores | 3.00 |
Nb stack references | 13.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 19.20 |
Bytes prefetched | 0.00 |
Bytes loaded | 216.00 |
Bytes stored | 24.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source file and lines | par_multi_interp.c:917-1099 |
Module | exec |
nb instructions | 74 |
nb uops | 73 |
loop length | 290 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 13 |
micro-operation queue | 12.50 cycles |
front end | 12.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 6.00 | 6.00 | 9.00 | 9.00 | 1.50 | 6.00 | 6.00 | 1.50 | 1.50 | 1.50 | 6.00 | 9.00 |
cycles | 6.00 | 6.00 | 9.00 | 9.00 | 1.50 | 6.00 | 6.00 | 1.50 | 1.50 | 1.50 | 6.00 | 9.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 12.71 |
Stall cycles | 0.00 |
Front-end | 12.50 |
Dispatch | 9.00 |
Overall L1 | 12.50 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x38(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xa8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP 0x8(%RDX,%RSI,8),%R8 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 445ea0 <hypre_BoomerAMGBuildMultipass.extracted.34+0xd70> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x118(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R8,8),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x108(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R14,(%RDX,%R13,8) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 445ba0 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa70> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x40(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDX,%R13,8),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R10,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 445d3b <hypre_BoomerAMGBuildMultipass.extracted.34+0xc0b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x98(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%R13,8),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R11,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RDX,%R12,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%R11),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVLE %RDX,%R10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R10,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R11,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 445c6b <hypre_BoomerAMGBuildMultipass.extracted.34+0xb3b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x30(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R9,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 445d33 <hypre_BoomerAMGBuildMultipass.extracted.34+0xc03> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RDX,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x38(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 445c4c <hypre_BoomerAMGBuildMultipass.extracted.34+0xb1c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
SHR $0x2,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA (%RSI,%R11,8),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x18,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 445c89 <hypre_BoomerAMGBuildMultipass.extracted.34+0xb59> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x38(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDX,%R13,8),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R10,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 445ba0 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa70> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x50(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R13,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R9,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x60(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RDX,%R12,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%R9),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVLE %RDX,%R10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R10,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R9,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x4,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R11,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 445dcb <hypre_BoomerAMGBuildMultipass.extracted.34+0xc9b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x78(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RDX,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 445b9a <hypre_BoomerAMGBuildMultipass.extracted.34+0xa6a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %R11,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x38(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 445dac <hypre_BoomerAMGBuildMultipass.extracted.34+0xc7c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
SHR $0x2,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA (%RSI,%R9,8),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x18,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 445de9 <hypre_BoomerAMGBuildMultipass.extracted.34+0xcb9> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source file and lines | par_multi_interp.c:917-1099 |
Module | exec |
nb instructions | 74 |
nb uops | 73 |
loop length | 290 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 13 |
micro-operation queue | 12.50 cycles |
front end | 12.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 6.00 | 6.00 | 9.00 | 9.00 | 1.50 | 6.00 | 6.00 | 1.50 | 1.50 | 1.50 | 6.00 | 9.00 |
cycles | 6.00 | 6.00 | 9.00 | 9.00 | 1.50 | 6.00 | 6.00 | 1.50 | 1.50 | 1.50 | 6.00 | 9.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 12.71 |
Stall cycles | 0.00 |
Front-end | 12.50 |
Dispatch | 9.00 |
Overall L1 | 12.50 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x38(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xa8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP 0x8(%RDX,%RSI,8),%R8 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 445ea0 <hypre_BoomerAMGBuildMultipass.extracted.34+0xd70> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x118(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R8,8),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x108(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R14,(%RDX,%R13,8) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 445ba0 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa70> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x40(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDX,%R13,8),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R10,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 445d3b <hypre_BoomerAMGBuildMultipass.extracted.34+0xc0b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x98(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%R13,8),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R11,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RDX,%R12,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%R11),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVLE %RDX,%R10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R10,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R11,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 445c6b <hypre_BoomerAMGBuildMultipass.extracted.34+0xb3b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x30(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R9,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 445d33 <hypre_BoomerAMGBuildMultipass.extracted.34+0xc03> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RDX,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x38(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 445c4c <hypre_BoomerAMGBuildMultipass.extracted.34+0xb1c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
SHR $0x2,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA (%RSI,%R11,8),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x18,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 445c89 <hypre_BoomerAMGBuildMultipass.extracted.34+0xb59> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x38(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDX,%R13,8),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R10,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 445ba0 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa70> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x50(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R13,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R9,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x60(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RDX,%R12,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%R9),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVLE %RDX,%R10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R10,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R9,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x4,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R11,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 445dcb <hypre_BoomerAMGBuildMultipass.extracted.34+0xc9b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x78(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RDX,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 445b9a <hypre_BoomerAMGBuildMultipass.extracted.34+0xa6a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %R11,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x38(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 445dac <hypre_BoomerAMGBuildMultipass.extracted.34+0xc7c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
SHR $0x2,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA (%RSI,%R9,8),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x18,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 445de9 <hypre_BoomerAMGBuildMultipass.extracted.34+0xcb9> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |