Function: hypre_CSRMatrixMatvecOutOfPlace.extracted.19 | Module: exec | Source: csr_matvec.c:178-204 [...] | Coverage: 0.03% |
---|
Function: hypre_CSRMatrixMatvecOutOfPlace.extracted.19 | Module: exec | Source: csr_matvec.c:178-204 [...] | Coverage: 0.03% |
---|
/scratch_na/users/xoserete/qaas_runs/171-172-8218/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c: 178 - 204 |
-------------------------------------------------------------------------------- |
178: #pragma omp parallel for private(i,j,jj,m,tempx) HYPRE_SMP_SCHEDULE |
179: #endif |
180: |
181: for (i = 0; i < num_rownnz; i++) |
182: { |
183: m = A_rownnz[i]; |
[...] |
191: if ( num_vectors==1 ) |
192: { |
193: tempx = 0; |
194: for (jj = A_i[m]; jj < A_i[m+1]; jj++) |
195: tempx += A_data[jj] * x_data[A_j[jj]]; |
196: y_data[m] += tempx; |
197: } |
198: else |
199: for ( j=0; j<num_vectors; ++j ) |
200: { |
201: tempx = 0; |
202: for (jj = A_i[m]; jj < A_i[m+1]; jj++) |
203: tempx += A_data[jj] * x_data[ j*vecstride_x + A_j[jj]*idxstride_x ]; |
204: y_data[ j*vecstride_y + m*idxstride_y] += tempx; |
0x4eef40 PUSH %RBP |
0x4eef41 MOV %RSP,%RBP |
0x4eef44 PUSH %R15 |
0x4eef46 PUSH %R14 |
0x4eef48 PUSH %R13 |
0x4eef4a PUSH %R12 |
0x4eef4c PUSH %RBX |
0x4eef4d SUB $0x78,%RSP |
0x4eef51 MOV %R9,-0x58(%RBP) |
0x4eef55 MOV %R8,%R14 |
0x4eef58 MOV %RCX,-0x50(%RBP) |
0x4eef5c MOV %RDX,%R12 |
0x4eef5f MOV 0x40(%RBP),%RAX |
0x4eef63 MOV %RAX,-0x30(%RBP) |
0x4eef67 MOV 0x38(%RBP),%R13 |
0x4eef6b MOV 0x30(%RBP),%RAX |
0x4eef6f MOV %RAX,-0x90(%RBP) |
0x4eef76 MOV 0x28(%RBP),%RAX |
0x4eef7a MOV %RAX,-0x70(%RBP) |
0x4eef7e MOV 0x20(%RBP),%R15 |
0x4eef82 MOV 0x18(%RBP),%RAX |
0x4eef86 MOV %RAX,-0x60(%RBP) |
0x4eef8a MOV 0x10(%RBP),%RBX |
0x4eef8e MOVL $0,-0x38(%RBP) |
0x4eef95 MOV (%RDI),%ESI |
0x4eef97 MOVQ $0,-0x68(%RBP) |
0x4eef9f MOVQ $0x1,-0x98(%RBP) |
0x4eefaa SUB $0x8,%RSP |
0x4eefae LEA -0x98(%RBP),%RAX |
0x4eefb5 LEA -0x38(%RBP),%RCX |
0x4eefb9 LEA -0x68(%RBP),%R8 |
0x4eefbd LEA 0x50(%RBP),%R9 |
0x4eefc1 MOV $0x74ddb0,%EDI |
0x4eefc6 MOV %ESI,-0x34(%RBP) |
0x4eefc9 MOV $0x22,%EDX |
0x4eefce PUSH $0x1 |
0x4eefd0 PUSH $0x1 |
0x4eefd2 PUSH %RAX |
0x4eefd3 CALL 40fff0 <__kmpc_for_static_init_8@plt> |
0x4eefd8 ADD $0x20,%RSP |
0x4eefdc MOV -0x68(%RBP),%RAX |
0x4eefe0 MOV 0x50(%RBP),%RCX |
0x4eefe4 MOV %RAX,-0x48(%RBP) |
0x4eefe8 SUB %RAX,%RCX |
0x4eefeb MOV %RCX,-0x40(%RBP) |
0x4eefef JAE 4ef00c |
0x4eeff1 MOV $0x74ddd0,%EDI |
0x4eeff6 MOV -0x34(%RBP),%ESI |
0x4eeff9 ADD $0x78,%RSP |
0x4eeffd POP %RBX |
0x4eeffe POP %R12 |
0x4ef000 POP %R13 |
0x4ef002 POP %R14 |
0x4ef004 POP %R15 |
0x4ef006 POP %RBP |
0x4ef007 JMP 40fd40 |
0x4ef00c CMP $0x1,%R15 |
0x4ef010 JNE 4ef1d8 |
0x4ef016 XOR %EDX,%EDX |
0x4ef018 JMP 4ef0b1 |
0x4ef01d ADD %RAX,%RDI |
0x4ef020 MOV 0x30(%R14,%RDI,8),%RAX |
0x4ef025 VMOVSD (%RBX,%RAX,8),%XMM1 |
0x4ef02a VFMADD231SD 0x30(%R12,%RDI,8),%XMM1,%XMM0 |
0x4ef031 MOV 0x28(%R14,%RDI,8),%RAX |
0x4ef036 VMOVSD (%RBX,%RAX,8),%XMM1 |
0x4ef03b VFMADD231SD 0x28(%R12,%RDI,8),%XMM1,%XMM0 |
0x4ef042 MOV 0x20(%R14,%RDI,8),%RAX |
0x4ef047 VMOVSD (%RBX,%RAX,8),%XMM1 |
0x4ef04c VFMADD231SD 0x20(%R12,%RDI,8),%XMM1,%XMM0 |
0x4ef053 MOV 0x18(%R14,%RDI,8),%RAX |
0x4ef058 VMOVSD (%RBX,%RAX,8),%XMM1 |
0x4ef05d VFMADD231SD 0x18(%R12,%RDI,8),%XMM1,%XMM0 |
0x4ef064 MOV 0x10(%R14,%RDI,8),%RAX |
0x4ef069 VMOVSD (%RBX,%RAX,8),%XMM1 |
0x4ef06e VFMADD231SD 0x10(%R12,%RDI,8),%XMM1,%XMM0 |
0x4ef075 MOV 0x8(%R14,%RDI,8),%RAX |
0x4ef07a VMOVSD (%RBX,%RAX,8),%XMM1 |
0x4ef07f VFMADD231SD 0x8(%R12,%RDI,8),%XMM1,%XMM0 |
0x4ef086 MOV (%R14,%RDI,8),%RAX |
0x4ef08a VMOVSD (%RBX,%RAX,8),%XMM1 |
0x4ef08f VFMADD231SD (%R12,%RDI,8),%XMM1,%XMM0 |
(3550) 0x4ef095 MOV -0x60(%RBP),%RAX |
(3550) 0x4ef099 VADDSD (%RAX,%RSI,8),%XMM0,%XMM0 |
(3550) 0x4ef09e VMOVSD %XMM0,(%RAX,%RSI,8) |
(3550) 0x4ef0a3 CMP -0x40(%RBP),%RDX |
(3550) 0x4ef0a7 LEA 0x1(%RDX),%RDX |
(3550) 0x4ef0ab JE 4eeff1 |
(3550) 0x4ef0b1 MOV -0x48(%RBP),%RAX |
(3550) 0x4ef0b5 ADD %RDX,%RAX |
(3550) 0x4ef0b8 MOV -0x58(%RBP),%RCX |
(3550) 0x4ef0bc MOV (%RCX,%RAX,8),%RSI |
(3550) 0x4ef0c0 MOV -0x50(%RBP),%RAX |
(3550) 0x4ef0c4 MOV (%RAX,%RSI,8),%RDI |
(3550) 0x4ef0c8 MOV 0x8(%RAX,%RSI,8),%RAX |
(3550) 0x4ef0cd VXORPD %XMM0,%XMM0,%XMM0 |
(3550) 0x4ef0d1 SUB %RDI,%RAX |
(3550) 0x4ef0d4 JLE 4ef095 |
(3550) 0x4ef0d6 CMP $0x8,%RAX |
(3550) 0x4ef0da JB 4ef18b |
(3550) 0x4ef0e0 MOV %RAX,%R8 |
(3550) 0x4ef0e3 SHR $0x3,%R8 |
(3550) 0x4ef0e7 LEA 0x38(,%RDI,8),%RCX |
(3550) 0x4ef0ef NOP |
(3551) 0x4ef0f0 MOV -0x38(%R14,%RCX,1),%R9 |
(3551) 0x4ef0f5 MOV -0x30(%R14,%RCX,1),%R10 |
(3551) 0x4ef0fa VMOVSD (%RBX,%R9,8),%XMM1 |
(3551) 0x4ef100 VFMADD132SD -0x38(%R12,%RCX,1),%XMM0,%XMM1 |
(3551) 0x4ef107 VMOVSD (%RBX,%R10,8),%XMM0 |
(3551) 0x4ef10d VFMADD132SD -0x30(%R12,%RCX,1),%XMM1,%XMM0 |
(3551) 0x4ef114 MOV -0x28(%R14,%RCX,1),%R9 |
(3551) 0x4ef119 VMOVSD (%RBX,%R9,8),%XMM1 |
(3551) 0x4ef11f VFMADD132SD -0x28(%R12,%RCX,1),%XMM0,%XMM1 |
(3551) 0x4ef126 MOV -0x20(%R14,%RCX,1),%R9 |
(3551) 0x4ef12b VMOVSD (%RBX,%R9,8),%XMM0 |
(3551) 0x4ef131 VFMADD132SD -0x20(%R12,%RCX,1),%XMM1,%XMM0 |
(3551) 0x4ef138 MOV -0x18(%R14,%RCX,1),%R9 |
(3551) 0x4ef13d VMOVSD (%RBX,%R9,8),%XMM1 |
(3551) 0x4ef143 VFMADD132SD -0x18(%R12,%RCX,1),%XMM0,%XMM1 |
(3551) 0x4ef14a MOV -0x10(%R14,%RCX,1),%R9 |
(3551) 0x4ef14f VMOVSD (%RBX,%R9,8),%XMM0 |
(3551) 0x4ef155 VFMADD132SD -0x10(%R12,%RCX,1),%XMM1,%XMM0 |
(3551) 0x4ef15c MOV -0x8(%R14,%RCX,1),%R9 |
(3551) 0x4ef161 VMOVSD (%RBX,%R9,8),%XMM1 |
(3551) 0x4ef167 VFMADD132SD -0x8(%R12,%RCX,1),%XMM0,%XMM1 |
(3551) 0x4ef16e MOV (%R14,%RCX,1),%R9 |
(3551) 0x4ef172 VMOVSD (%RBX,%R9,8),%XMM0 |
(3551) 0x4ef178 VFMADD132SD (%R12,%RCX,1),%XMM1,%XMM0 |
(3551) 0x4ef17e ADD $0x40,%RCX |
(3551) 0x4ef182 DEC %R8 |
(3551) 0x4ef185 JNE 4ef0f0 |
(3550) 0x4ef18b MOV %EAX,%ECX |
(3550) 0x4ef18d AND $0x7,%ECX |
(3550) 0x4ef190 DEC %RCX |
(3550) 0x4ef193 CMP $0x6,%RCX |
(3550) 0x4ef197 JA 4ef095 |
0x4ef19d AND $-0x8,%RAX |
0x4ef1a1 JMP 0x52a778(,%RCX,8) |
0x4ef1a8 ADD %RAX,%RDI |
0x4ef1ab JMP 4ef086 |
0x4ef1b0 ADD %RAX,%RDI |
0x4ef1b3 JMP 4ef075 |
0x4ef1b8 ADD %RAX,%RDI |
0x4ef1bb JMP 4ef064 |
0x4ef1c0 ADD %RAX,%RDI |
0x4ef1c3 JMP 4ef053 |
0x4ef1c8 ADD %RAX,%RDI |
0x4ef1cb JMP 4ef042 |
0x4ef1d0 ADD %RAX,%RDI |
0x4ef1d3 JMP 4ef031 |
0x4ef1d8 JL 4eeff1 |
0x4ef1de DEC %R15 |
0x4ef1e1 XOR %ECX,%ECX |
0x4ef1e3 JMP 4ef202 |
0x4ef1e5 NOPW %CS:(%RAX,%RAX,1) |
(3552) 0x4ef1f0 MOV -0x78(%RBP),%RCX |
(3552) 0x4ef1f4 CMP -0x40(%RBP),%RCX |
(3552) 0x4ef1f8 LEA 0x1(%RCX),%RCX |
(3552) 0x4ef1fc JE 4eeff1 |
(3552) 0x4ef202 MOV -0x48(%RBP),%RAX |
(3552) 0x4ef206 MOV %RCX,-0x78(%RBP) |
(3552) 0x4ef20a ADD %RCX,%RAX |
(3552) 0x4ef20d MOV -0x58(%RBP),%RCX |
(3552) 0x4ef211 MOV (%RCX,%RAX,8),%RSI |
(3552) 0x4ef215 MOV -0x50(%RBP),%RCX |
(3552) 0x4ef219 MOV (%RCX,%RSI,8),%RAX |
(3552) 0x4ef21d MOV 0x8(%RCX,%RSI,8),%RDI |
(3552) 0x4ef222 SUB %RAX,%RDI |
(3552) 0x4ef225 JLE 4ef1f0 |
(3552) 0x4ef227 MOV %RDI,%RCX |
(3552) 0x4ef22a SHR $0x2,%RCX |
(3552) 0x4ef22e MOV %RCX,-0x88(%RBP) |
(3552) 0x4ef235 MOV %RDI,%R9 |
(3552) 0x4ef238 AND $-0x4,%R9 |
(3552) 0x4ef23c MOV %EDI,%R10D |
(3552) 0x4ef23f AND $0x3,%R10D |
(3552) 0x4ef243 ADD %RAX,%R9 |
(3552) 0x4ef246 IMUL -0x70(%RBP),%RSI |
(3552) 0x4ef24b LEA 0x18(,%RAX,8),%RAX |
(3552) 0x4ef253 MOV %RAX,-0x80(%RBP) |
(3552) 0x4ef257 XOR %ECX,%ECX |
(3552) 0x4ef259 JMP 4ef2d7 |
0x4ef25b NOPL (%RAX,%RAX,1) |
(3553) 0x4ef260 MOV 0x10(%R14,%R9,8),%RDX |
(3553) 0x4ef265 IMUL %R13,%RDX |
(3553) 0x4ef269 MOV %RCX,%RAX |
(3553) 0x4ef26c IMUL -0x30(%RBP),%RAX |
(3553) 0x4ef271 ADD %RAX,%RDX |
(3553) 0x4ef274 VMOVSD (%RBX,%RDX,8),%XMM1 |
(3553) 0x4ef279 VFMADD231SD 0x10(%R12,%R9,8),%XMM1,%XMM0 |
(3553) 0x4ef280 MOV 0x8(%R14,%R9,8),%RDX |
(3553) 0x4ef285 IMUL %R13,%RDX |
(3553) 0x4ef289 ADD %RAX,%RDX |
(3553) 0x4ef28c VMOVSD (%RBX,%RDX,8),%XMM1 |
(3553) 0x4ef291 VFMADD231SD 0x8(%R12,%R9,8),%XMM1,%XMM0 |
(3553) 0x4ef298 MOV (%R14,%R9,8),%RDX |
(3553) 0x4ef29c IMUL %R13,%RDX |
(3553) 0x4ef2a0 ADD %RAX,%RDX |
(3553) 0x4ef2a3 VMOVSD (%RBX,%RDX,8),%XMM1 |
(3553) 0x4ef2a8 VFMADD231SD (%R12,%R9,8),%XMM1,%XMM0 |
(3553) 0x4ef2ae MOV %RCX,%RAX |
(3553) 0x4ef2b1 IMUL -0x90(%RBP),%RAX |
(3553) 0x4ef2b9 ADD %RSI,%RAX |
(3553) 0x4ef2bc MOV -0x60(%RBP),%RDX |
(3553) 0x4ef2c0 VADDSD (%RDX,%RAX,8),%XMM0,%XMM0 |
(3553) 0x4ef2c5 VMOVSD %XMM0,(%RDX,%RAX,8) |
(3553) 0x4ef2ca CMP %R15,%RCX |
(3553) 0x4ef2cd LEA 0x1(%RCX),%RCX |
(3553) 0x4ef2d1 JE 4ef1f0 |
(3553) 0x4ef2d7 VXORPD %XMM0,%XMM0,%XMM0 |
(3553) 0x4ef2db CMP $0x4,%RDI |
(3553) 0x4ef2df JB 4ef367 |
(3553) 0x4ef2e5 MOV %RCX,%RAX |
(3553) 0x4ef2e8 IMUL -0x30(%RBP),%RAX |
(3553) 0x4ef2ed MOV -0x88(%RBP),%R8 |
(3553) 0x4ef2f4 MOV -0x80(%RBP),%R11 |
(3553) 0x4ef2f8 NOPL (%RAX,%RAX,1) |
(3554) 0x4ef300 MOV -0x18(%R14,%R11,1),%RDX |
(3554) 0x4ef305 IMUL %R13,%RDX |
(3554) 0x4ef309 ADD %RAX,%RDX |
(3554) 0x4ef30c VMOVSD (%RBX,%RDX,8),%XMM1 |
(3554) 0x4ef311 VFMADD132SD -0x18(%R12,%R11,1),%XMM0,%XMM1 |
(3554) 0x4ef318 MOV -0x10(%R14,%R11,1),%RDX |
(3554) 0x4ef31d IMUL %R13,%RDX |
(3554) 0x4ef321 ADD %RAX,%RDX |
(3554) 0x4ef324 VMOVSD (%RBX,%RDX,8),%XMM0 |
(3554) 0x4ef329 VFMADD132SD -0x10(%R12,%R11,1),%XMM1,%XMM0 |
(3554) 0x4ef330 MOV -0x8(%R14,%R11,1),%RDX |
(3554) 0x4ef335 IMUL %R13,%RDX |
(3554) 0x4ef339 ADD %RAX,%RDX |
(3554) 0x4ef33c VMOVSD (%RBX,%RDX,8),%XMM1 |
(3554) 0x4ef341 VFMADD132SD -0x8(%R12,%R11,1),%XMM0,%XMM1 |
(3554) 0x4ef348 MOV (%R14,%R11,1),%RDX |
(3554) 0x4ef34c IMUL %R13,%RDX |
(3554) 0x4ef350 ADD %RAX,%RDX |
(3554) 0x4ef353 VMOVSD (%RBX,%RDX,8),%XMM0 |
(3554) 0x4ef358 VFMADD132SD (%R12,%R11,1),%XMM1,%XMM0 |
(3554) 0x4ef35e ADD $0x20,%R11 |
(3554) 0x4ef362 DEC %R8 |
(3554) 0x4ef365 JNE 4ef300 |
(3553) 0x4ef367 CMP $0x1,%R10D |
(3553) 0x4ef36b JE 4ef390 |
(3553) 0x4ef36d CMP $0x3,%R10D |
(3553) 0x4ef371 JE 4ef260 |
(3553) 0x4ef377 CMP $0x2,%R10D |
(3553) 0x4ef37b JNE 4ef2ae |
(3553) 0x4ef381 MOV %RCX,%RAX |
(3553) 0x4ef384 IMUL -0x30(%RBP),%RAX |
(3553) 0x4ef389 JMP 4ef280 |
0x4ef38e XCHG %AX,%AX |
(3553) 0x4ef390 MOV %RCX,%RAX |
(3553) 0x4ef393 IMUL -0x30(%RBP),%RAX |
(3553) 0x4ef398 JMP 4ef298 |
0x4ef39d NOPL (%RAX) |
Path / |
Source file and lines | csr_matvec.c:178-204 |
Module | exec |
nb instructions | 104 |
nb uops | 105 |
loop length | 434 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 20 |
micro-operation queue | 18.67 cycles |
front end | 18.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 4.80 | 4.80 | 13.00 | 13.00 | 11.00 | 4.80 | 4.80 | 11.00 | 11.00 | 11.00 | 4.80 | 13.00 |
cycles | 4.80 | 4.80 | 13.00 | 13.00 | 11.00 | 4.80 | 4.80 | 11.00 | 11.00 | 11.00 | 4.80 | 13.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 28.29-28.32 |
Stall cycles | 8.96-8.99 |
ROB full (events) | 10.37-10.41 |
Front-end | 18.67 |
Dispatch | 13.00 |
Overall L1 | 18.67 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 10% |
load | 8% |
store | 10% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 8% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 11% |
load | 11% |
store | 10% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 8% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x78,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R9,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVQ $0,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0x1,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x98(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x38(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x68(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x50(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x74ddb0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,-0x34(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 40fff0 <__kmpc_for_static_init_8@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 4ef00c <hypre_CSRMatrixMatvecOutOfPlace.extracted.19+0xcc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x74ddd0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x34(%RBP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x78,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP 40fd40 <__kmpc_for_static_fini@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
CMP $0x1,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 4ef1d8 <hypre_CSRMatrixMatvecOutOfPlace.extracted.19+0x298> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4ef0b1 <hypre_CSRMatrixMatvecOutOfPlace.extracted.19+0x171> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x30(%R14,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RBX,%RAX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD 0x30(%R12,%RDI,8),%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
MOV 0x28(%R14,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RBX,%RAX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD 0x28(%R12,%RDI,8),%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
MOV 0x20(%R14,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RBX,%RAX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD 0x20(%R12,%RDI,8),%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
MOV 0x18(%R14,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RBX,%RAX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD 0x18(%R12,%RDI,8),%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
MOV 0x10(%R14,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RBX,%RAX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD 0x10(%R12,%RDI,8),%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
MOV 0x8(%R14,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RBX,%RAX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD 0x8(%R12,%RDI,8),%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
MOV (%R14,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RBX,%RAX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD (%R12,%RDI,8),%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
AND $-0x8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JMP 0x52a778(,%RCX,8) | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 |
ADD %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4ef086 <hypre_CSRMatrixMatvecOutOfPlace.extracted.19+0x146> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4ef075 <hypre_CSRMatrixMatvecOutOfPlace.extracted.19+0x135> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4ef064 <hypre_CSRMatrixMatvecOutOfPlace.extracted.19+0x124> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4ef053 <hypre_CSRMatrixMatvecOutOfPlace.extracted.19+0x113> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4ef042 <hypre_CSRMatrixMatvecOutOfPlace.extracted.19+0x102> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4ef031 <hypre_CSRMatrixMatvecOutOfPlace.extracted.19+0xf1> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
JL 4eeff1 <hypre_CSRMatrixMatvecOutOfPlace.extracted.19+0xb1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
DEC %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4ef202 <hypre_CSRMatrixMatvecOutOfPlace.extracted.19+0x2c2> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | csr_matvec.c:178-204 |
Module | exec |
nb instructions | 104 |
nb uops | 105 |
loop length | 434 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 20 |
micro-operation queue | 18.67 cycles |
front end | 18.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 4.80 | 4.80 | 13.00 | 13.00 | 11.00 | 4.80 | 4.80 | 11.00 | 11.00 | 11.00 | 4.80 | 13.00 |
cycles | 4.80 | 4.80 | 13.00 | 13.00 | 11.00 | 4.80 | 4.80 | 11.00 | 11.00 | 11.00 | 4.80 | 13.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 28.29-28.32 |
Stall cycles | 8.96-8.99 |
ROB full (events) | 10.37-10.41 |
Front-end | 18.67 |
Dispatch | 13.00 |
Overall L1 | 18.67 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 10% |
load | 8% |
store | 10% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 8% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 11% |
load | 11% |
store | 10% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 8% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x78,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R9,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVQ $0,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0x1,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x98(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x38(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x68(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x50(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x74ddb0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,-0x34(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 40fff0 <__kmpc_for_static_init_8@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 4ef00c <hypre_CSRMatrixMatvecOutOfPlace.extracted.19+0xcc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x74ddd0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x34(%RBP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x78,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP 40fd40 <__kmpc_for_static_fini@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
CMP $0x1,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 4ef1d8 <hypre_CSRMatrixMatvecOutOfPlace.extracted.19+0x298> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4ef0b1 <hypre_CSRMatrixMatvecOutOfPlace.extracted.19+0x171> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x30(%R14,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RBX,%RAX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD 0x30(%R12,%RDI,8),%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
MOV 0x28(%R14,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RBX,%RAX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD 0x28(%R12,%RDI,8),%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
MOV 0x20(%R14,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RBX,%RAX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD 0x20(%R12,%RDI,8),%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
MOV 0x18(%R14,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RBX,%RAX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD 0x18(%R12,%RDI,8),%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
MOV 0x10(%R14,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RBX,%RAX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD 0x10(%R12,%RDI,8),%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
MOV 0x8(%R14,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RBX,%RAX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD 0x8(%R12,%RDI,8),%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
MOV (%R14,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RBX,%RAX,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD231SD (%R12,%RDI,8),%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
AND $-0x8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JMP 0x52a778(,%RCX,8) | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 |
ADD %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4ef086 <hypre_CSRMatrixMatvecOutOfPlace.extracted.19+0x146> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4ef075 <hypre_CSRMatrixMatvecOutOfPlace.extracted.19+0x135> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4ef064 <hypre_CSRMatrixMatvecOutOfPlace.extracted.19+0x124> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4ef053 <hypre_CSRMatrixMatvecOutOfPlace.extracted.19+0x113> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4ef042 <hypre_CSRMatrixMatvecOutOfPlace.extracted.19+0x102> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4ef031 <hypre_CSRMatrixMatvecOutOfPlace.extracted.19+0xf1> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
JL 4eeff1 <hypre_CSRMatrixMatvecOutOfPlace.extracted.19+0xb1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
DEC %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4ef202 <hypre_CSRMatrixMatvecOutOfPlace.extracted.19+0x2c2> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼hypre_CSRMatrixMatvecOutOfPlace.extracted.19– | 0.03 | 0.01 |
▼Loop 3550 - csr_matvec.c:178-196 - exec– | 0.01 | 0 |
○Loop 3551 - csr_matvec.c:194-195 - exec | 0.02 | 0 |
▼Loop 3552 - csr_matvec.c:178-204 - exec– | 0 | 0 |
▼Loop 3553 - csr_matvec.c:199-204 - exec– | 0 | 0 |
○Loop 3554 - csr_matvec.c:202-203 - exec | 0 | 0 |