Loop Id: 988 | Module: exec | Source: par_multi_interp.c:917-1125 [...] | Coverage: 0.03% |
---|
Loop Id: 988 | Module: exec | Source: par_multi_interp.c:917-1125 [...] | Coverage: 0.03% |
---|
0x444dc0 MOV -0x80(%RBP),%RSI |
0x444dc4 INC %RSI |
0x444dc7 CMP -0xc8(%RBP),%RSI |
0x444dce JGE 4452d1 |
0x444dd4 MOV -0x88(%RBP),%RDX |
0x444ddb MOV %RSI,-0x80(%RBP) |
0x444ddf MOV (%RDX,%RSI,8),%RSI |
0x444de3 MOV -0xa8(%RBP),%RDX |
0x444dea MOV (%RDX,%RSI,8),%R8 |
0x444dee MOV %RSI,%RDI |
0x444df1 NOT %RDI |
0x444df4 MOV %RSI,-0x50(%RBP) |
0x444df8 JMP 444e12 |
(991) 0x444e00 MOV -0x38(%RBP),%R10 |
(991) 0x444e04 INC %R8 |
(991) 0x444e07 MOV -0xa8(%RBP),%RDX |
(991) 0x444e0e MOV -0x50(%RBP),%RSI |
(991) 0x444e12 CMP 0x8(%RDX,%RSI,8),%R8 |
(991) 0x444e17 JGE 445100 |
(991) 0x444e1d MOV -0x128(%RBP),%RDX |
(991) 0x444e24 MOV (%RDX,%R8,8),%R14 |
(991) 0x444e28 MOV -0x118(%RBP),%RDX |
(991) 0x444e2f CMP %R10,(%RDX,%R14,8) |
(991) 0x444e33 JNE 444e04 |
(991) 0x444e35 MOV -0x58(%RBP),%RDX |
(991) 0x444e39 MOV 0x8(%RDX,%R14,8),%R10 |
(991) 0x444e3e TEST %R10,%R10 |
(991) 0x444e41 JLE 444f97 |
(991) 0x444e47 MOV -0x90(%RBP),%RDX |
(991) 0x444e4e MOV %R14,-0x30(%RBP) |
(991) 0x444e52 MOV (%RDX,%R14,8),%R11 |
(991) 0x444e56 ADD %R11,%R10 |
(991) 0x444e59 MOV -0x40(%RBP),%RDX |
(991) 0x444e5d MOV -0x8(%RDX,%R12,8),%RSI |
(991) 0x444e62 LEA 0x1(%R11),%RDX |
(991) 0x444e66 CMP %RDX,%R10 |
(991) 0x444e69 CMOVLE %RDX,%R10 |
(991) 0x444e6d MOV %R10,%RDX |
(991) 0x444e70 SUB %R11,%RDX |
(991) 0x444e73 CMP $0x4,%RDX |
(991) 0x444e77 MOV %RDX,-0xd0(%RBP) |
(991) 0x444e7e JAE 444ecb |
(991) 0x444e80 MOV -0xd0(%RBP),%R9 |
(991) 0x444e87 MOV %R9,%RDX |
(991) 0x444e8a AND $-0x4,%RDX |
(991) 0x444e8e CMP %R9,%RDX |
(991) 0x444e91 JAE 444f93 |
(991) 0x444e97 ADD %RDX,%R11 |
(991) 0x444e9a MOV -0x30(%RBP),%R14 |
(991) 0x444e9e JMP 444eac |
(994) 0x444ea0 INC %R11 |
(994) 0x444ea3 CMP %R11,%R10 |
(994) 0x444ea6 JE 444f97 |
(994) 0x444eac MOV (%RSI,%R11,8),%RDX |
(994) 0x444eb0 CMP %RDI,(%RBX,%RDX,8) |
(994) 0x444eb4 JE 444ea0 |
(994) 0x444eb6 MOV -0x40(%RBP),%R9 |
(994) 0x444eba MOV (%R9,%R12,8),%R9 |
(994) 0x444ebe MOV %RDX,(%R9,%RAX,8) |
(994) 0x444ec2 INC %RAX |
(994) 0x444ec5 MOV %RDI,(%RBX,%RDX,8) |
(994) 0x444ec9 JMP 444ea0 |
(991) 0x444ecb SHR $0x2,%RDX |
(991) 0x444ecf LEA 0x18(%RSI,%R11,8),%R13 |
(991) 0x444ed4 JMP 444ee9 |
(995) 0x444ee0 ADD $0x20,%R13 |
(995) 0x444ee4 DEC %RDX |
(995) 0x444ee7 JE 444e80 |
(995) 0x444ee9 MOV -0x18(%R13),%R14 |
(995) 0x444eed CMP %RDI,(%RBX,%R14,8) |
(995) 0x444ef1 JNE 444f20 |
(995) 0x444ef3 MOV -0x10(%R13),%R14 |
(995) 0x444ef7 CMP %RDI,(%RBX,%R14,8) |
(995) 0x444efb JNE 444f3d |
(995) 0x444efd MOV -0x8(%R13),%R14 |
(995) 0x444f01 CMP %RDI,(%RBX,%R14,8) |
(995) 0x444f05 JNE 444f5a |
(995) 0x444f07 MOV (%R13),%R14 |
(995) 0x444f0b CMP %RDI,(%RBX,%R14,8) |
(995) 0x444f0f JE 444ee0 |
(995) 0x444f11 JMP 444f7b |
(995) 0x444f20 MOV -0x40(%RBP),%R9 |
(995) 0x444f24 MOV (%R9,%R12,8),%R9 |
(995) 0x444f28 MOV %R14,(%R9,%RAX,8) |
(995) 0x444f2c INC %RAX |
(995) 0x444f2f MOV %RDI,(%RBX,%R14,8) |
(995) 0x444f33 MOV -0x10(%R13),%R14 |
(995) 0x444f37 CMP %RDI,(%RBX,%R14,8) |
(995) 0x444f3b JE 444efd |
(995) 0x444f3d MOV -0x40(%RBP),%R9 |
(995) 0x444f41 MOV (%R9,%R12,8),%R9 |
(995) 0x444f45 MOV %R14,(%R9,%RAX,8) |
(995) 0x444f49 INC %RAX |
(995) 0x444f4c MOV %RDI,(%RBX,%R14,8) |
(995) 0x444f50 MOV -0x8(%R13),%R14 |
(995) 0x444f54 CMP %RDI,(%RBX,%R14,8) |
(995) 0x444f58 JE 444f07 |
(995) 0x444f5a MOV -0x40(%RBP),%R9 |
(995) 0x444f5e MOV (%R9,%R12,8),%R9 |
(995) 0x444f62 MOV %R14,(%R9,%RAX,8) |
(995) 0x444f66 INC %RAX |
(995) 0x444f69 MOV %RDI,(%RBX,%R14,8) |
(995) 0x444f6d MOV (%R13),%R14 |
(995) 0x444f71 CMP %RDI,(%RBX,%R14,8) |
(995) 0x444f75 JE 444ee0 |
(995) 0x444f7b MOV -0x40(%RBP),%R9 |
(995) 0x444f7f MOV (%R9,%R12,8),%R9 |
(995) 0x444f83 MOV %R14,(%R9,%RAX,8) |
(995) 0x444f87 INC %RAX |
(995) 0x444f8a MOV %RDI,(%RBX,%R14,8) |
(995) 0x444f8e JMP 444ee0 |
(991) 0x444f93 MOV -0x30(%RBP),%R14 |
(991) 0x444f97 MOV -0x60(%RBP),%RDX |
(991) 0x444f9b MOV 0x8(%RDX,%R14,8),%R10 |
(991) 0x444fa0 TEST %R10,%R10 |
(991) 0x444fa3 JLE 444e00 |
(991) 0x444fa9 MOV -0x98(%RBP),%RDX |
(991) 0x444fb0 MOV (%RDX,%R14,8),%R9 |
(991) 0x444fb4 ADD %R9,%R10 |
(991) 0x444fb7 MOV -0x48(%RBP),%RDX |
(991) 0x444fbb MOV -0x8(%RDX,%R12,8),%RSI |
(991) 0x444fc0 LEA 0x1(%R9),%RDX |
(991) 0x444fc4 CMP %RDX,%R10 |
(991) 0x444fc7 CMOVLE %RDX,%R10 |
(991) 0x444fcb MOV %R10,%R11 |
(991) 0x444fce SUB %R9,%R11 |
(991) 0x444fd1 CMP $0x4,%R11 |
(991) 0x444fd5 MOV %R11,-0x30(%RBP) |
(991) 0x444fd9 JAE 44502b |
(991) 0x444fdb MOV -0x30(%RBP),%RDX |
(991) 0x444fdf MOV %RDX,%R11 |
(991) 0x444fe2 AND $-0x4,%R11 |
(991) 0x444fe6 CMP %RDX,%R11 |
(991) 0x444fe9 JAE 444e00 |
(991) 0x444fef ADD %R11,%R9 |
(991) 0x444ff2 JMP 44500c |
(992) 0x445000 INC %R9 |
(992) 0x445003 CMP %R9,%R10 |
(992) 0x445006 JE 444e00 |
(992) 0x44500c MOV (%RSI,%R9,8),%RDX |
(992) 0x445010 CMP %RDI,(%R15,%RDX,8) |
(992) 0x445014 JE 445000 |
(992) 0x445016 MOV -0x48(%RBP),%R11 |
(992) 0x44501a MOV (%R11,%R12,8),%R11 |
(992) 0x44501e MOV %RDX,(%R11,%RCX,8) |
(992) 0x445022 INC %RCX |
(992) 0x445025 MOV %RDI,(%R15,%RDX,8) |
(992) 0x445029 JMP 445000 |
(991) 0x44502b SHR $0x2,%R11 |
(991) 0x44502f LEA 0x18(%RSI,%R9,8),%R14 |
(991) 0x445034 JMP 445049 |
(993) 0x445040 ADD $0x20,%R14 |
(993) 0x445044 DEC %R11 |
(993) 0x445047 JE 444fdb |
(993) 0x445049 MOV -0x18(%R14),%R13 |
(993) 0x44504d CMP %RDI,(%R15,%R13,8) |
(993) 0x445051 JNE 445080 |
(993) 0x445053 MOV -0x10(%R14),%R13 |
(993) 0x445057 CMP %RDI,(%R15,%R13,8) |
(993) 0x44505b JNE 44509d |
(993) 0x44505d MOV -0x8(%R14),%R13 |
(993) 0x445061 CMP %RDI,(%R15,%R13,8) |
(993) 0x445065 JNE 4450ba |
(993) 0x445067 MOV (%R14),%R13 |
(993) 0x44506a CMP %RDI,(%R15,%R13,8) |
(993) 0x44506e JE 445040 |
(993) 0x445070 JMP 4450da |
(993) 0x445080 MOV -0x48(%RBP),%RDX |
(993) 0x445084 MOV (%RDX,%R12,8),%RDX |
(993) 0x445088 MOV %R13,(%RDX,%RCX,8) |
(993) 0x44508c INC %RCX |
(993) 0x44508f MOV %RDI,(%R15,%R13,8) |
(993) 0x445093 MOV -0x10(%R14),%R13 |
(993) 0x445097 CMP %RDI,(%R15,%R13,8) |
(993) 0x44509b JE 44505d |
(993) 0x44509d MOV -0x48(%RBP),%RDX |
(993) 0x4450a1 MOV (%RDX,%R12,8),%RDX |
(993) 0x4450a5 MOV %R13,(%RDX,%RCX,8) |
(993) 0x4450a9 INC %RCX |
(993) 0x4450ac MOV %RDI,(%R15,%R13,8) |
(993) 0x4450b0 MOV -0x8(%R14),%R13 |
(993) 0x4450b4 CMP %RDI,(%R15,%R13,8) |
(993) 0x4450b8 JE 445067 |
(993) 0x4450ba MOV -0x48(%RBP),%RDX |
(993) 0x4450be MOV (%RDX,%R12,8),%RDX |
(993) 0x4450c2 MOV %R13,(%RDX,%RCX,8) |
(993) 0x4450c6 INC %RCX |
(993) 0x4450c9 MOV %RDI,(%R15,%R13,8) |
(993) 0x4450cd MOV (%R14),%R13 |
(993) 0x4450d0 CMP %RDI,(%R15,%R13,8) |
(993) 0x4450d4 JE 445040 |
(993) 0x4450da MOV -0x48(%RBP),%RDX |
(993) 0x4450de MOV (%RDX,%R12,8),%RDX |
(993) 0x4450e2 MOV %R13,(%RDX,%RCX,8) |
(993) 0x4450e6 INC %RCX |
(993) 0x4450e9 MOV %RDI,(%R15,%R13,8) |
(993) 0x4450ed JMP 445040 |
0x445100 MOV -0xa0(%RBP),%RDX |
0x445107 MOV -0x50(%RBP),%RSI |
0x44510b MOV (%RDX,%RSI,8),%R8 |
0x44510f MOV 0x8(%RDX,%RSI,8),%RDX |
0x445114 CMP %RDX,%R8 |
0x445117 JL 44512c |
0x445119 JMP 444dc0 |
(989) 0x445120 INC %R8 |
(989) 0x445123 CMP %RDX,%R8 |
(989) 0x445126 JGE 444dc0 |
(989) 0x44512c MOV -0x130(%RBP),%RSI |
(989) 0x445133 MOV (%RSI,%R8,8),%R9 |
(989) 0x445137 MOV -0x120(%RBP),%RSI |
(989) 0x44513e CMP %R10,(%RSI,%R9,8) |
(989) 0x445142 JNE 445120 |
(989) 0x445144 MOV -0x110(%RBP),%RSI |
(989) 0x44514b MOV 0x8(%RSI,%R9,8),%RSI |
(989) 0x445150 TEST %RSI,%RSI |
(989) 0x445153 JLE 445120 |
(989) 0x445155 MOV -0x100(%RBP),%RDX |
(989) 0x44515c MOV (%RDX,%R9,8),%R9 |
(989) 0x445160 ADD %R9,%RSI |
(989) 0x445163 MOV -0x108(%RBP),%RDX |
(989) 0x44516a MOV (%RDX,%R12,8),%R11 |
(989) 0x44516e LEA 0x1(%R9),%R10 |
(989) 0x445172 CMP %R10,%RSI |
(989) 0x445175 CMOVLE %R10,%RSI |
(989) 0x445179 MOV %RSI,%RDX |
(989) 0x44517c SUB %R9,%RDX |
(989) 0x44517f CMP %R10,%RSI |
(989) 0x445182 MOV %R11,-0x30(%RBP) |
(989) 0x445186 JNE 4451ce |
(989) 0x445188 XOR %R11D,%R11D |
(989) 0x44518b TEST $0x1,%DL |
(989) 0x44518e MOV -0x38(%RBP),%R10 |
(989) 0x445192 JE 4452b0 |
(989) 0x445198 ADD %R11,%R9 |
(989) 0x44519b MOV -0x30(%RBP),%RDX |
(989) 0x44519f MOV (%RDX,%R9,8),%RDX |
(989) 0x4451a3 TEST %RDX,%RDX |
(989) 0x4451a6 JS 445287 |
(989) 0x4451ac CMP %RDI,(%R15,%RDX,8) |
(989) 0x4451b0 JE 4452b0 |
(989) 0x4451b6 MOV -0x48(%RBP),%RSI |
(989) 0x4451ba MOV (%RSI,%R12,8),%RSI |
(989) 0x4451be MOV %RDX,(%RSI,%RCX,8) |
(989) 0x4451c2 INC %RCX |
(989) 0x4451c5 MOV %RDI,(%R15,%RDX,8) |
(989) 0x4451c9 JMP 4452b0 |
(989) 0x4451ce MOV %RDX,%RSI |
(989) 0x4451d1 AND $-0x2,%RSI |
(989) 0x4451d5 LEA 0x8(%R11,%R9,8),%R10 |
(989) 0x4451da XOR %R11D,%R11D |
(989) 0x4451dd JMP 4451e9 |
(990) 0x4451e0 ADD $0x2,%R11 |
(990) 0x4451e4 CMP %R11,%RSI |
(990) 0x4451e7 JE 44518b |
(990) 0x4451e9 MOV -0x8(%R10,%R11,8),%R14 |
(990) 0x4451ee TEST %R14,%R14 |
(990) 0x4451f1 JS 445210 |
(990) 0x4451f3 CMP %RDI,(%R15,%R14,8) |
(990) 0x4451f7 JE 445230 |
(990) 0x4451f9 MOV -0x48(%RBP),%R13 |
(990) 0x4451fd MOV (%R13,%R12,8),%R13 |
(990) 0x445202 MOV %R14,(%R13,%RCX,8) |
(990) 0x445207 INC %RCX |
(990) 0x44520a MOV %RDI,(%R15,%R14,8) |
(990) 0x44520e JMP 445230 |
(990) 0x445210 NOT %R14 |
(990) 0x445213 CMP %RDI,(%RBX,%R14,8) |
(990) 0x445217 JE 445230 |
(990) 0x445219 MOV -0x40(%RBP),%R13 |
(990) 0x44521d MOV (%R13,%R12,8),%R13 |
(990) 0x445222 MOV %R14,(%R13,%RAX,8) |
(990) 0x445227 INC %RAX |
(990) 0x44522a MOV %RDI,(%RBX,%R14,8) |
(990) 0x44522e XCHG %AX,%AX |
(990) 0x445230 MOV (%R10,%R11,8),%R14 |
(990) 0x445234 TEST %R14,%R14 |
(990) 0x445237 JS 445260 |
(990) 0x445239 CMP %RDI,(%R15,%R14,8) |
(990) 0x44523d JE 4451e0 |
(990) 0x44523f MOV -0x48(%RBP),%R13 |
(990) 0x445243 MOV (%R13,%R12,8),%R13 |
(990) 0x445248 MOV %R14,(%R13,%RCX,8) |
(990) 0x44524d INC %RCX |
(990) 0x445250 MOV %RDI,(%R15,%R14,8) |
(990) 0x445254 JMP 4451e0 |
(990) 0x445260 NOT %R14 |
(990) 0x445263 CMP %RDI,(%RBX,%R14,8) |
(990) 0x445267 JE 4451e0 |
(990) 0x44526d MOV -0x40(%RBP),%R13 |
(990) 0x445271 MOV (%R13,%R12,8),%R13 |
(990) 0x445276 MOV %R14,(%R13,%RAX,8) |
(990) 0x44527b INC %RAX |
(990) 0x44527e MOV %RDI,(%RBX,%R14,8) |
(990) 0x445282 JMP 4451e0 |
(989) 0x445287 NOT %RDX |
(989) 0x44528a CMP %RDI,(%RBX,%RDX,8) |
(989) 0x44528e JE 4452b0 |
(989) 0x445290 MOV -0x40(%RBP),%RSI |
(989) 0x445294 MOV (%RSI,%R12,8),%RSI |
(989) 0x445298 MOV %RDX,(%RSI,%RAX,8) |
(989) 0x44529c INC %RAX |
(989) 0x44529f MOV %RDI,(%RBX,%RDX,8) |
(989) 0x4452a3 NOPW %CS:(%RAX,%RAX,1) |
(989) 0x4452b0 MOV -0xa0(%RBP),%RDX |
(989) 0x4452b7 MOV -0x50(%RBP),%RSI |
(989) 0x4452bb MOV 0x8(%RDX,%RSI,8),%RDX |
(989) 0x4452c0 INC %R8 |
(989) 0x4452c3 CMP %RDX,%R8 |
(989) 0x4452c6 JL 44512c |
0x4452cc JMP 444dc0 |
/scratch_na/users/xoserete/qaas_runs/171-172-8218/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 917 - 1125 |
-------------------------------------------------------------------------------- |
917: for (i=0; i < n_coarse; i++) |
[...] |
1072: for (i=thread_start; i < thread_stop; i++) |
1073: { |
1074: i1 = pass_array[i]; |
1075: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
1076: { |
1077: j1 = S_diag_j[j]; |
1078: if (assigned[j1] == pass-1) |
1079: { |
1080: j_start = P_diag_start[j1]; |
1081: j_end = j_start+P_diag_i[j1+1]; |
1082: for (k=j_start; k < j_end; k++) |
1083: { |
1084: k1 = P_diag_pass[pass-1][k]; |
1085: if (P_marker[k1] != -i1-1) |
1086: { |
1087: P_diag_pass[pass][cnt_nz++] = k1; |
1088: P_marker[k1] = -i1-1; |
1089: } |
1090: } |
1091: j_start = P_offd_start[j1]; |
1092: j_end = j_start+P_offd_i[j1+1]; |
1093: for (k=j_start; k < j_end; k++) |
1094: { |
1095: k1 = P_offd_pass[pass-1][k]; |
1096: if (P_marker_offd[k1] != -i1-1) |
1097: { |
1098: P_offd_pass[pass][cnt_nz_offd++] = k1; |
1099: P_marker_offd[k1] = -i1-1; |
1100: } |
1101: } |
1102: } |
1103: } |
1104: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
1105: { |
1106: j1 = S_offd_j[j]; |
1107: if (assigned_offd[j1] == pass-1) |
1108: { |
1109: j_start = Pext_start[j1]; |
1110: j_end = j_start+Pext_i[j1+1]; |
1111: for (k=j_start; k < j_end; k++) |
1112: { |
1113: k1 = Pext_pass[pass][k]; |
1114: if (k1 < 0) |
1115: { |
1116: if (P_marker[-k1-1] != -i1-1) |
1117: { |
1118: P_diag_pass[pass][cnt_nz++] = -k1-1; |
1119: P_marker[-k1-1] = -i1-1; |
1120: } |
1121: } |
1122: else if (P_marker_offd[k1] != -i1-1) |
1123: { |
1124: P_offd_pass[pass][cnt_nz_offd++] = k1; |
1125: P_marker_offd[k1] = -i1-1; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.05 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source | par_multi_interp.c:1072-1075,par_multi_interp.c:1078-1078,par_multi_interp.c:1099-1099,par_multi_interp.c:1104-1104 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 3.50 |
CQA cycles if no scalar integer | 3.50 |
CQA cycles if FP arith vectorized | 3.50 |
CQA cycles if fully vectorized | 0.44 |
Front-end cycles | 3.50 |
DIV/SQRT cycles | 1.00 |
P0 cycles | 1.00 |
P1 cycles | 3.33 |
P2 cycles | 3.33 |
P3 cycles | 1.00 |
P4 cycles | 1.00 |
P5 cycles | 1.00 |
P6 cycles | 1.00 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 1.00 |
P10 cycles | 3.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 3.96 |
Stall cycles (UFS) | 0.30 |
Nb insns | 21.00 |
Nb uops | 21.00 |
Nb loads | 10.00 |
Nb stores | 2.00 |
Nb stack references | 6.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 27.43 |
Bytes prefetched | 0.00 |
Bytes loaded | 80.00 |
Bytes stored | 16.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.05 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source | par_multi_interp.c:1072-1075,par_multi_interp.c:1078-1078,par_multi_interp.c:1099-1099,par_multi_interp.c:1104-1104 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 3.50 |
CQA cycles if no scalar integer | 3.50 |
CQA cycles if FP arith vectorized | 3.50 |
CQA cycles if fully vectorized | 0.44 |
Front-end cycles | 3.50 |
DIV/SQRT cycles | 1.00 |
P0 cycles | 1.00 |
P1 cycles | 3.33 |
P2 cycles | 3.33 |
P3 cycles | 1.00 |
P4 cycles | 1.00 |
P5 cycles | 1.00 |
P6 cycles | 1.00 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 1.00 |
P10 cycles | 3.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 3.96 |
Stall cycles (UFS) | 0.30 |
Nb insns | 21.00 |
Nb uops | 21.00 |
Nb loads | 10.00 |
Nb stores | 2.00 |
Nb stack references | 6.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 27.43 |
Bytes prefetched | 0.00 |
Bytes loaded | 80.00 |
Bytes stored | 16.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source file and lines | par_multi_interp.c:917-1125 |
Module | exec |
nb instructions | 21 |
nb uops | 21 |
loop length | 93 |
used x86 registers | 5 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 6 |
micro-operation queue | 3.50 cycles |
front end | 3.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.00 | 1.00 | 3.33 | 3.33 | 1.00 | 1.00 | 1.00 | 1.00 | 1.00 | 1.00 | 1.00 | 3.33 |
cycles | 1.00 | 1.00 | 3.33 | 3.33 | 1.00 | 1.00 | 1.00 | 1.00 | 1.00 | 1.00 | 1.00 | 3.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 3.96 |
Stall cycles | 0.30 |
LM full (events) | 0.80 |
Front-end | 3.50 |
Dispatch | 3.33 |
Overall L1 | 3.50 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x80(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP -0xc8(%RBP),%RSI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 4452d1 <hypre_BoomerAMGBuildMultipass.extracted.34+0xf91> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x88(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%RSI,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xa8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%RSI,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOT %RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RSI,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 444e12 <hypre_BoomerAMGBuildMultipass.extracted.34+0xad2> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0xa0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%RSI,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDX,%RSI,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 44512c <hypre_BoomerAMGBuildMultipass.extracted.34+0xdec> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 444dc0 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa80> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
JMP 444dc0 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa80> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source file and lines | par_multi_interp.c:917-1125 |
Module | exec |
nb instructions | 21 |
nb uops | 21 |
loop length | 93 |
used x86 registers | 5 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 6 |
micro-operation queue | 3.50 cycles |
front end | 3.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.00 | 1.00 | 3.33 | 3.33 | 1.00 | 1.00 | 1.00 | 1.00 | 1.00 | 1.00 | 1.00 | 3.33 |
cycles | 1.00 | 1.00 | 3.33 | 3.33 | 1.00 | 1.00 | 1.00 | 1.00 | 1.00 | 1.00 | 1.00 | 3.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 3.96 |
Stall cycles | 0.30 |
LM full (events) | 0.80 |
Front-end | 3.50 |
Dispatch | 3.33 |
Overall L1 | 3.50 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x80(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP -0xc8(%RBP),%RSI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 4452d1 <hypre_BoomerAMGBuildMultipass.extracted.34+0xf91> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x88(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%RSI,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xa8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%RSI,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOT %RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RSI,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 444e12 <hypre_BoomerAMGBuildMultipass.extracted.34+0xad2> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0xa0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%RSI,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDX,%RSI,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 44512c <hypre_BoomerAMGBuildMultipass.extracted.34+0xdec> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 444dc0 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa80> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
JMP 444dc0 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa80> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |