Function: hypre_BoomerAMGBuildMultipass.extracted.34 | Module: exec | Source: par_multi_interp.c:891-1134 [...] | Coverage: 1.59% |
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Function: hypre_BoomerAMGBuildMultipass.extracted.34 | Module: exec | Source: par_multi_interp.c:891-1134 [...] | Coverage: 1.59% |
---|
/scratch_na/users/xoserete/qaas_runs/171-172-8218/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 891 - 1134 |
-------------------------------------------------------------------------------- |
891: #pragma omp parallel private(i,my_thread_num,num_threads,thread_start,thread_stop,cnt_nz,cnt_nz_offd,i1,j,j1,j_start,j_end,k1,k,P_marker,P_marker_offd) |
[...] |
900: my_thread_num = hypre_GetThreadNum(); |
901: num_threads = hypre_NumActiveThreads(); |
902: thread_start = (pass_length/num_threads)*my_thread_num; |
903: if (my_thread_num == num_threads-1) |
904: { thread_stop = pass_length; } |
905: else |
906: { thread_stop = (pass_length/num_threads)*(my_thread_num+1); } |
907: thread_start += pass_pointer[pass]; |
908: thread_stop += pass_pointer[pass]; |
[...] |
916: P_marker = hypre_CTAlloc(HYPRE_Int, n_coarse); /* marks points to see if they're counted */ |
917: for (i=0; i < n_coarse; i++) |
918: { P_marker[i] = -1; } |
919: if (new_num_cols_offd == local_index+1) |
[...] |
925: else if (n_coarse_offd) |
[...] |
939: for (i=thread_start; i < thread_stop; i++) |
940: { |
941: i1 = pass_array[i]; |
942: P_diag_start[i1] = cnt_nz; |
943: P_offd_start[i1] = cnt_nz_offd; |
944: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
945: { |
946: j1 = S_diag_j[j]; |
947: if (assigned[j1] == pass-1) |
948: { |
949: j_start = P_diag_start[j1]; |
950: j_end = j_start+P_diag_i[j1+1]; |
951: for (k=j_start; k < j_end; k++) |
952: { |
953: k1 = P_diag_pass[pass-1][k]; |
954: if (P_marker[k1] != i1) |
955: { |
956: cnt_nz++; |
957: P_diag_i[i1+1]++; |
958: P_marker[k1] = i1; |
959: } |
960: } |
961: j_start = P_offd_start[j1]; |
962: j_end = j_start+P_offd_i[j1+1]; |
963: for (k=j_start; k < j_end; k++) |
964: { |
965: k1 = P_offd_pass[pass-1][k]; |
966: if (P_marker_offd[k1] != i1) |
967: { |
968: cnt_nz_offd++; |
969: P_offd_i[i1+1]++; |
970: P_marker_offd[k1] = i1; |
[...] |
976: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
977: { |
978: j1 = S_offd_j[j]; |
979: if (assigned_offd[j1] == pass-1) |
980: { |
981: j_start = Pext_start[j1]; |
982: j_end = j_start+Pext_i[j1+1]; |
983: for (k=j_start; k < j_end; k++) |
984: { |
985: k1 = Pext_pass[pass][k]; |
986: if (k1 < 0) |
987: { |
988: if (P_marker[-k1-1] != i1) |
989: { |
990: cnt_nz++; |
991: P_diag_i[i1+1]++; |
992: P_marker[-k1-1] = i1; |
993: } |
994: } |
995: else if (P_marker_offd[k1] != i1) |
996: { |
997: cnt_nz_offd++; |
[...] |
1008: if(my_thread_num == 0) |
1009: { max_num_threads[0] = num_threads; } |
1010: cnt_nz_offd_per_thread[my_thread_num] = cnt_nz_offd; |
1011: cnt_nz_per_thread[my_thread_num] = cnt_nz; |
1012: #ifdef HYPRE_USING_OPENMP |
1013: #pragma omp barrier |
1014: #endif |
1015: if(my_thread_num == 0) |
1016: { |
1017: for(i = 1; i < max_num_threads[0]; i++) |
1018: { |
1019: cnt_nz_offd_per_thread[i] += cnt_nz_offd_per_thread[i-1]; |
1020: cnt_nz_per_thread[i] += cnt_nz_per_thread[i-1]; |
[...] |
1026: if(my_thread_num > 0) |
1027: { |
1028: /* update this thread's section of P_diag_start and P_offd_start |
1029: * with the num of nz's counted by previous threads */ |
1030: for (i=thread_start; i < thread_stop; i++) |
1031: { |
1032: i1 = pass_array[i]; |
1033: P_diag_start[i1] += cnt_nz_per_thread[my_thread_num-1]; |
1034: P_offd_start[i1] += cnt_nz_offd_per_thread[my_thread_num-1]; |
[...] |
1040: cnt_nz = cnt_nz_per_thread[max_num_threads[0]-1]; |
1041: cnt_nz_offd = cnt_nz_offd_per_thread[max_num_threads[0]-1]; |
1042: |
1043: /* Updated total nz count */ |
1044: total_nz += cnt_nz; |
1045: total_nz_offd += cnt_nz_offd; |
1046: |
1047: /* Allocate P_diag_pass and P_offd_pass for all threads */ |
1048: P_diag_pass[pass] = hypre_CTAlloc(HYPRE_Int, cnt_nz); |
1049: if (cnt_nz_offd) |
1050: P_offd_pass[pass] = hypre_CTAlloc(HYPRE_Int, cnt_nz_offd); |
1051: else if (num_procs > 1) |
[...] |
1060: if(my_thread_num > 0) |
1061: { |
1062: cnt_nz = cnt_nz_per_thread[my_thread_num-1]; |
1063: cnt_nz_offd = cnt_nz_offd_per_thread[my_thread_num-1]; |
[...] |
1072: for (i=thread_start; i < thread_stop; i++) |
1073: { |
1074: i1 = pass_array[i]; |
1075: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
1076: { |
1077: j1 = S_diag_j[j]; |
1078: if (assigned[j1] == pass-1) |
1079: { |
1080: j_start = P_diag_start[j1]; |
1081: j_end = j_start+P_diag_i[j1+1]; |
1082: for (k=j_start; k < j_end; k++) |
1083: { |
1084: k1 = P_diag_pass[pass-1][k]; |
1085: if (P_marker[k1] != -i1-1) |
1086: { |
1087: P_diag_pass[pass][cnt_nz++] = k1; |
1088: P_marker[k1] = -i1-1; |
1089: } |
1090: } |
1091: j_start = P_offd_start[j1]; |
1092: j_end = j_start+P_offd_i[j1+1]; |
1093: for (k=j_start; k < j_end; k++) |
1094: { |
1095: k1 = P_offd_pass[pass-1][k]; |
1096: if (P_marker_offd[k1] != -i1-1) |
1097: { |
1098: P_offd_pass[pass][cnt_nz_offd++] = k1; |
1099: P_marker_offd[k1] = -i1-1; |
1100: } |
1101: } |
1102: } |
1103: } |
1104: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
1105: { |
1106: j1 = S_offd_j[j]; |
1107: if (assigned_offd[j1] == pass-1) |
1108: { |
1109: j_start = Pext_start[j1]; |
1110: j_end = j_start+Pext_i[j1+1]; |
1111: for (k=j_start; k < j_end; k++) |
1112: { |
1113: k1 = Pext_pass[pass][k]; |
1114: if (k1 < 0) |
1115: { |
1116: if (P_marker[-k1-1] != -i1-1) |
1117: { |
1118: P_diag_pass[pass][cnt_nz++] = -k1-1; |
1119: P_marker[-k1-1] = -i1-1; |
1120: } |
1121: } |
1122: else if (P_marker_offd[k1] != -i1-1) |
1123: { |
1124: P_offd_pass[pass][cnt_nz_offd++] = k1; |
1125: P_marker_offd[k1] = -i1-1; |
[...] |
1132: hypre_TFree(P_marker); |
1133: if ( (n_coarse_offd) || (new_num_cols_offd == local_index+1) ) |
1134: { hypre_TFree(P_marker_offd); } |
0x444340 PUSH %RBP |
0x444341 MOV %RSP,%RBP |
0x444344 PUSH %R15 |
0x444346 PUSH %R14 |
0x444348 PUSH %R13 |
0x44434a PUSH %R12 |
0x44434c PUSH %RBX |
0x44434d SUB $0x128,%RSP |
0x444354 MOV %R9,-0x130(%RBP) |
0x44435b MOV %R8,-0xa0(%RBP) |
0x444362 MOV %RCX,-0x128(%RBP) |
0x444369 MOV %RDX,-0xa8(%RBP) |
0x444370 MOV %RDI,-0xc0(%RBP) |
0x444377 MOV 0xd0(%RBP),%RAX |
0x44437e MOV %RAX,-0x78(%RBP) |
0x444382 MOV 0xc8(%RBP),%RAX |
0x444389 MOV %RAX,-0xf0(%RBP) |
0x444390 MOV 0xc0(%RBP),%RAX |
0x444397 MOV %RAX,-0xe0(%RBP) |
0x44439e MOV 0xb8(%RBP),%RBX |
0x4443a5 MOV 0xb0(%RBP),%RAX |
0x4443ac MOV %RAX,-0xf8(%RBP) |
0x4443b3 MOV 0xa8(%RBP),%RAX |
0x4443ba MOV %RAX,-0xb8(%RBP) |
0x4443c1 MOV 0xa0(%RBP),%RAX |
0x4443c8 MOV %RAX,-0x150(%RBP) |
0x4443cf MOV 0x98(%RBP),%RAX |
0x4443d6 MOV %RAX,-0x138(%RBP) |
0x4443dd MOV 0x90(%RBP),%RAX |
0x4443e4 MOV %RAX,-0x120(%RBP) |
0x4443eb MOV 0x88(%RBP),%RAX |
0x4443f2 MOV %RAX,-0x118(%RBP) |
0x4443f9 MOV 0x80(%RBP),%RAX |
0x444400 MOV %RAX,-0xe8(%RBP) |
0x444407 MOV 0x78(%RBP),%R15 |
0x44440b MOV 0x70(%RBP),%RAX |
0x44440f MOV %RAX,-0x50(%RBP) |
0x444413 MOV 0x68(%RBP),%RAX |
0x444417 MOV %RAX,-0x148(%RBP) |
0x44441e MOV 0x60(%RBP),%RAX |
0x444422 MOV %RAX,-0x110(%RBP) |
0x444429 MOV 0x58(%RBP),%RAX |
0x44442d MOV %RAX,-0x108(%RBP) |
0x444434 MOV 0x50(%RBP),%RAX |
0x444438 MOV %RAX,-0x48(%RBP) |
0x44443c MOV 0x48(%RBP),%RAX |
0x444440 MOV %RAX,-0x40(%RBP) |
0x444444 MOV 0x40(%RBP),%RAX |
0x444448 MOV %RAX,-0x98(%RBP) |
0x44444f MOV 0x38(%RBP),%RAX |
0x444453 MOV %RAX,-0x90(%RBP) |
0x44445a MOV 0x30(%RBP),%R13 |
0x44445e MOV 0x28(%RBP),%RAX |
0x444462 MOV %RAX,-0x88(%RBP) |
0x444469 MOV 0x20(%RBP),%RAX |
0x44446d MOV %RAX,-0x100(%RBP) |
0x444474 MOV 0x18(%RBP),%RAX |
0x444478 MOV %RAX,-0x60(%RBP) |
0x44447c MOV 0x10(%RBP),%RAX |
0x444480 MOV %RAX,-0x58(%RBP) |
0x444484 CALL 4e8ab0 <hypre_GetThreadNum> |
0x444489 MOV %RAX,%R12 |
0x44448c CALL 4e8aa0 <hypre_NumActiveThreads> |
0x444491 MOV %RAX,%RCX |
0x444494 MOV %RBX,%RAX |
0x444497 OR %RCX,%RAX |
0x44449a SHR $0x20,%RAX |
0x44449e JE 4444aa |
0x4444a0 MOV %RBX,%RAX |
0x4444a3 CQTO |
0x4444a5 IDIV %RCX |
0x4444a8 JMP 4444b0 |
0x4444aa MOV %EBX,%EAX |
0x4444ac XOR %EDX,%EDX |
0x4444ae DIV %ECX |
0x4444b0 MOV %RCX,-0x140(%RBP) |
0x4444b7 DEC %RCX |
0x4444ba LEA 0x1(%R12),%RDX |
0x4444bf MOV %RAX,%R14 |
0x4444c2 IMUL %RAX,%RDX |
0x4444c6 MOV %R12,-0x68(%RBP) |
0x4444ca CMP %RCX,%R12 |
0x4444cd CMOVE %RBX,%RDX |
0x4444d1 MOV %RDX,-0xb0(%RBP) |
0x4444d8 MOV -0x50(%RBP),%RAX |
0x4444dc MOV (%RAX),%R12 |
0x4444df MOV (%R13,%R12,8),%RAX |
0x4444e4 MOV %RAX,-0xd8(%RBP) |
0x4444eb MOV $0x8,%ESI |
0x4444f0 MOV %R15,%RDI |
0x4444f3 CALL 4e6d80 <hypre_CAlloc> |
0x4444f8 MOV %RAX,%RBX |
0x4444fb TEST %R15,%R15 |
0x4444fe JLE 444514 |
0x444500 SAL $0x3,%R15 |
0x444504 MOV %RBX,%RDI |
0x444507 MOV $0xff,%ESI |
0x44450c MOV %R15,%RDX |
0x44450f CALL 4efe80 <_intel_fast_memset> |
0x444514 IMUL -0x68(%RBP),%R14 |
0x444519 MOV %R14,-0x70(%RBP) |
0x44451d MOV -0xb8(%RBP),%RAX |
0x444524 INC %RAX |
0x444527 MOV -0xf8(%RBP),%RDI |
0x44452e CMP %RDI,%RAX |
0x444531 MOV %RAX,-0xb8(%RBP) |
0x444538 JE 444546 |
0x44453a MOV -0xe8(%RBP),%RDI |
0x444541 TEST %RDI,%RDI |
0x444544 JE 444571 |
0x444546 MOV $0x8,%ESI |
0x44454b MOV %RDI,%R14 |
0x44454e CALL 4e6d80 <hypre_CAlloc> |
0x444553 MOV %RAX,%R15 |
0x444556 MOV %R14,%RDX |
0x444559 TEST %R14,%R14 |
0x44455c JLE 444571 |
0x44455e SAL $0x3,%RDX |
0x444562 MOV %R15,%RDI |
0x444565 MOV $0xff,%ESI |
0x44456a CALL 4efe80 <_intel_fast_memset> |
0x44456f JMP 444571 |
0x444571 MOV -0x70(%RBP),%RDX |
0x444575 MOV -0xd8(%RBP),%RCX |
0x44457c LEA (%RCX,%RDX,1),%RAX |
0x444580 MOV -0xb0(%RBP),%RSI |
0x444587 ADD %RSI,%RCX |
0x44458a MOV %RCX,-0xc8(%RBP) |
0x444591 CMP %RSI,%RDX |
0x444594 MOV %RAX,-0x80(%RBP) |
0x444598 JGE 444aa2 |
0x44459e LEA -0x1(%R12),%R10 |
0x4445a3 XOR %ECX,%ECX |
0x4445a5 MOV %RAX,%RSI |
0x4445a8 XOR %EAX,%EAX |
0x4445aa MOV %R12,-0x50(%RBP) |
0x4445ae MOV %R10,-0x38(%RBP) |
0x4445b2 JMP 4445d7 |
0x4445b4 NOPW %CS:(%RAX,%RAX,1) |
(999) 0x4445c0 MOV -0xd0(%RBP),%RSI |
(999) 0x4445c7 INC %RSI |
(999) 0x4445ca CMP -0xc8(%RBP),%RSI |
(999) 0x4445d1 JGE 444aa6 |
(999) 0x4445d7 MOV -0x88(%RBP),%RDX |
(999) 0x4445de MOV %RSI,-0xd0(%RBP) |
(999) 0x4445e5 MOV (%RDX,%RSI,8),%RDI |
(999) 0x4445e9 MOV -0x90(%RBP),%RDX |
(999) 0x4445f0 MOV %RAX,(%RDX,%RDI,8) |
(999) 0x4445f4 MOV -0x98(%RBP),%RDX |
(999) 0x4445fb MOV %RCX,(%RDX,%RDI,8) |
(999) 0x4445ff MOV -0xa8(%RBP),%RDX |
(999) 0x444606 MOV (%RDX,%RDI,8),%R8 |
(999) 0x44460a JMP 44461e |
0x44460c NOPL (%RAX) |
(1002) 0x444610 MOV -0x38(%RBP),%R10 |
(1002) 0x444614 INC %R8 |
(1002) 0x444617 MOV -0xa8(%RBP),%RDX |
(1002) 0x44461e CMP 0x8(%RDX,%RDI,8),%R8 |
(1002) 0x444623 JGE 4448f0 |
(1002) 0x444629 MOV -0x128(%RBP),%RDX |
(1002) 0x444630 MOV (%RDX,%R8,8),%R9 |
(1002) 0x444634 MOV -0x118(%RBP),%RDX |
(1002) 0x44463b CMP %R10,(%RDX,%R9,8) |
(1002) 0x44463f JNE 444614 |
(1002) 0x444641 MOV -0x58(%RBP),%RDX |
(1002) 0x444645 MOV 0x8(%RDX,%R9,8),%RSI |
(1002) 0x44464a TEST %RSI,%RSI |
(1002) 0x44464d JLE 4446d0 |
(1002) 0x444653 MOV -0x90(%RBP),%RDX |
(1002) 0x44465a MOV (%RDX,%R9,8),%R10 |
(1002) 0x44465e ADD %R10,%RSI |
(1002) 0x444661 MOV -0x40(%RBP),%RDX |
(1002) 0x444665 MOV -0x8(%RDX,%R12,8),%R11 |
(1002) 0x44466a LEA 0x1(%R10),%RDX |
(1002) 0x44466e CMP %RDX,%RSI |
(1002) 0x444671 CMOVLE %RDX,%RSI |
(1002) 0x444675 MOV %RSI,%RDX |
(1002) 0x444678 SUB %R10,%RDX |
(1002) 0x44467b CMP $0x4,%RDX |
(1002) 0x44467f MOV %RDX,-0x30(%RBP) |
(1002) 0x444683 JAE 444768 |
(1002) 0x444689 MOV -0x30(%RBP),%R14 |
(1002) 0x44468d MOV %R14,%RDX |
(1002) 0x444690 AND $-0x4,%RDX |
(1002) 0x444694 CMP %R14,%RDX |
(1002) 0x444697 JAE 4446d0 |
(1002) 0x444699 ADD %RDX,%R10 |
(1002) 0x44469c JMP 4446a8 |
0x44469e XCHG %AX,%AX |
(1005) 0x4446a0 INC %R10 |
(1005) 0x4446a3 CMP %R10,%RSI |
(1005) 0x4446a6 JE 4446d0 |
(1005) 0x4446a8 MOV (%R11,%R10,8),%RDX |
(1005) 0x4446ac CMP %RDI,(%RBX,%RDX,8) |
(1005) 0x4446b0 JE 4446a0 |
(1005) 0x4446b2 INC %RAX |
(1005) 0x4446b5 MOV -0x58(%RBP),%R14 |
(1005) 0x4446b9 INCQ 0x8(%R14,%RDI,8) |
(1005) 0x4446be MOV %RDI,(%RBX,%RDX,8) |
(1005) 0x4446c2 JMP 4446a0 |
0x4446c4 NOPW %CS:(%RAX,%RAX,1) |
(1002) 0x4446d0 MOV -0x60(%RBP),%RDX |
(1002) 0x4446d4 MOV 0x8(%RDX,%R9,8),%RSI |
(1002) 0x4446d9 TEST %RSI,%RSI |
(1002) 0x4446dc JLE 444610 |
(1002) 0x4446e2 MOV -0x98(%RBP),%RDX |
(1002) 0x4446e9 MOV (%RDX,%R9,8),%R9 |
(1002) 0x4446ed ADD %R9,%RSI |
(1002) 0x4446f0 MOV -0x48(%RBP),%RDX |
(1002) 0x4446f4 MOV -0x8(%RDX,%R12,8),%R10 |
(1002) 0x4446f9 LEA 0x1(%R9),%RDX |
(1002) 0x4446fd CMP %RDX,%RSI |
(1002) 0x444700 CMOVLE %RDX,%RSI |
(1002) 0x444704 MOV %RSI,%R11 |
(1002) 0x444707 SUB %R9,%R11 |
(1002) 0x44470a CMP $0x4,%R11 |
(1002) 0x44470e MOV %R11,-0x30(%RBP) |
(1002) 0x444712 JAE 444827 |
(1002) 0x444718 MOV -0x30(%RBP),%RDX |
(1002) 0x44471c MOV %RDX,%R11 |
(1002) 0x44471f AND $-0x4,%R11 |
(1002) 0x444723 CMP %RDX,%R11 |
(1002) 0x444726 JAE 444610 |
(1002) 0x44472c ADD %R11,%R9 |
(1002) 0x44472f JMP 44474c |
0x444731 NOPW %CS:(%RAX,%RAX,1) |
(1003) 0x444740 INC %R9 |
(1003) 0x444743 CMP %R9,%RSI |
(1003) 0x444746 JE 444610 |
(1003) 0x44474c MOV (%R10,%R9,8),%RDX |
(1003) 0x444750 CMP %RDI,(%R15,%RDX,8) |
(1003) 0x444754 JE 444740 |
(1003) 0x444756 INC %RCX |
(1003) 0x444759 MOV -0x60(%RBP),%R11 |
(1003) 0x44475d INCQ 0x8(%R11,%RDI,8) |
(1003) 0x444762 MOV %RDI,(%R15,%RDX,8) |
(1003) 0x444766 JMP 444740 |
(1002) 0x444768 MOV %RDX,%R14 |
(1002) 0x44476b SHR $0x2,%R14 |
(1002) 0x44476f LEA 0x18(%R11,%R10,8),%R13 |
(1002) 0x444774 JMP 444791 |
0x444776 NOPW %CS:(%RAX,%RAX,1) |
(1006) 0x444780 MOV -0x50(%RBP),%R12 |
(1006) 0x444784 ADD $0x20,%R13 |
(1006) 0x444788 DEC %R14 |
(1006) 0x44478b JE 444689 |
(1006) 0x444791 MOV -0x18(%R13),%RDX |
(1006) 0x444795 CMP %RDI,(%RBX,%RDX,8) |
(1006) 0x444799 JNE 4447c0 |
(1006) 0x44479b MOV -0x10(%R13),%RDX |
(1006) 0x44479f CMP %RDI,(%RBX,%RDX,8) |
(1006) 0x4447a3 JNE 4447da |
(1006) 0x4447a5 MOV -0x8(%R13),%RDX |
(1006) 0x4447a9 CMP %RDI,(%RBX,%RDX,8) |
(1006) 0x4447ad JNE 4447f4 |
(1006) 0x4447af MOV (%R13),%RDX |
(1006) 0x4447b3 CMP %RDI,(%RBX,%RDX,8) |
(1006) 0x4447b7 JE 444780 |
(1006) 0x4447b9 JMP 444812 |
0x4447bb NOPL (%RAX,%RAX,1) |
(1006) 0x4447c0 INC %RAX |
(1006) 0x4447c3 MOV -0x58(%RBP),%R12 |
(1006) 0x4447c7 INCQ 0x8(%R12,%RDI,8) |
(1006) 0x4447cc MOV %RDI,(%RBX,%RDX,8) |
(1006) 0x4447d0 MOV -0x10(%R13),%RDX |
(1006) 0x4447d4 CMP %RDI,(%RBX,%RDX,8) |
(1006) 0x4447d8 JE 4447a5 |
(1006) 0x4447da INC %RAX |
(1006) 0x4447dd MOV -0x58(%RBP),%R12 |
(1006) 0x4447e1 INCQ 0x8(%R12,%RDI,8) |
(1006) 0x4447e6 MOV %RDI,(%RBX,%RDX,8) |
(1006) 0x4447ea MOV -0x8(%R13),%RDX |
(1006) 0x4447ee CMP %RDI,(%RBX,%RDX,8) |
(1006) 0x4447f2 JE 4447af |
(1006) 0x4447f4 INC %RAX |
(1006) 0x4447f7 MOV -0x58(%RBP),%R12 |
(1006) 0x4447fb INCQ 0x8(%R12,%RDI,8) |
(1006) 0x444800 MOV %RDI,(%RBX,%RDX,8) |
(1006) 0x444804 MOV (%R13),%RDX |
(1006) 0x444808 CMP %RDI,(%RBX,%RDX,8) |
(1006) 0x44480c JE 444780 |
(1006) 0x444812 INC %RAX |
(1006) 0x444815 MOV -0x58(%RBP),%R12 |
(1006) 0x444819 INCQ 0x8(%R12,%RDI,8) |
(1006) 0x44481e MOV %RDI,(%RBX,%RDX,8) |
(1006) 0x444822 JMP 444780 |
(1002) 0x444827 SHR $0x2,%R11 |
(1002) 0x44482b LEA 0x18(%R10,%R9,8),%R14 |
(1002) 0x444830 JMP 44484d |
0x444832 NOPW %CS:(%RAX,%RAX,1) |
(1004) 0x444840 ADD $0x20,%R14 |
(1004) 0x444844 DEC %R11 |
(1004) 0x444847 JE 444718 |
(1004) 0x44484d MOV -0x18(%R14),%R13 |
(1004) 0x444851 CMP %RDI,(%R15,%R13,8) |
(1004) 0x444855 JNE 444880 |
(1004) 0x444857 MOV -0x10(%R14),%R13 |
(1004) 0x44485b CMP %RDI,(%R15,%R13,8) |
(1004) 0x44485f JNE 44489a |
(1004) 0x444861 MOV -0x8(%R14),%R13 |
(1004) 0x444865 CMP %RDI,(%R15,%R13,8) |
(1004) 0x444869 JNE 4448b4 |
(1004) 0x44486b MOV (%R14),%R13 |
(1004) 0x44486e CMP %RDI,(%R15,%R13,8) |
(1004) 0x444872 JE 444840 |
(1004) 0x444874 JMP 4448d1 |
0x444876 NOPW %CS:(%RAX,%RAX,1) |
(1004) 0x444880 INC %RCX |
(1004) 0x444883 MOV -0x60(%RBP),%RDX |
(1004) 0x444887 INCQ 0x8(%RDX,%RDI,8) |
(1004) 0x44488c MOV %RDI,(%R15,%R13,8) |
(1004) 0x444890 MOV -0x10(%R14),%R13 |
(1004) 0x444894 CMP %RDI,(%R15,%R13,8) |
(1004) 0x444898 JE 444861 |
(1004) 0x44489a INC %RCX |
(1004) 0x44489d MOV -0x60(%RBP),%RDX |
(1004) 0x4448a1 INCQ 0x8(%RDX,%RDI,8) |
(1004) 0x4448a6 MOV %RDI,(%R15,%R13,8) |
(1004) 0x4448aa MOV -0x8(%R14),%R13 |
(1004) 0x4448ae CMP %RDI,(%R15,%R13,8) |
(1004) 0x4448b2 JE 44486b |
(1004) 0x4448b4 INC %RCX |
(1004) 0x4448b7 MOV -0x60(%RBP),%RDX |
(1004) 0x4448bb INCQ 0x8(%RDX,%RDI,8) |
(1004) 0x4448c0 MOV %RDI,(%R15,%R13,8) |
(1004) 0x4448c4 MOV (%R14),%R13 |
(1004) 0x4448c7 CMP %RDI,(%R15,%R13,8) |
(1004) 0x4448cb JE 444840 |
(1004) 0x4448d1 INC %RCX |
(1004) 0x4448d4 MOV -0x60(%RBP),%RDX |
(1004) 0x4448d8 INCQ 0x8(%RDX,%RDI,8) |
(1004) 0x4448dd MOV %RDI,(%R15,%R13,8) |
(1004) 0x4448e1 JMP 444840 |
0x4448e6 NOPW %CS:(%RAX,%RAX,1) |
(999) 0x4448f0 MOV -0xa0(%RBP),%RDX |
(999) 0x4448f7 MOV (%RDX,%RDI,8),%R8 |
(999) 0x4448fb MOV 0x8(%RDX,%RDI,8),%RDX |
(999) 0x444900 CMP %RDX,%R8 |
(999) 0x444903 JL 44491c |
(999) 0x444905 JMP 4445c0 |
0x44490a NOPW (%RAX,%RAX,1) |
(1000) 0x444910 INC %R8 |
(1000) 0x444913 CMP %RDX,%R8 |
(1000) 0x444916 JGE 4445c0 |
(1000) 0x44491c MOV -0x130(%RBP),%RSI |
(1000) 0x444923 MOV (%RSI,%R8,8),%R9 |
(1000) 0x444927 MOV -0x120(%RBP),%RSI |
(1000) 0x44492e CMP %R10,(%RSI,%R9,8) |
(1000) 0x444932 JNE 444910 |
(1000) 0x444934 MOV -0x110(%RBP),%RSI |
(1000) 0x44493b MOV 0x8(%RSI,%R9,8),%RSI |
(1000) 0x444940 TEST %RSI,%RSI |
(1000) 0x444943 JLE 444910 |
(1000) 0x444945 MOV -0x100(%RBP),%RDX |
(1000) 0x44494c MOV (%RDX,%R9,8),%R9 |
(1000) 0x444950 ADD %R9,%RSI |
(1000) 0x444953 MOV -0x108(%RBP),%RDX |
(1000) 0x44495a MOV (%RDX,%R12,8),%R13 |
(1000) 0x44495e LEA 0x1(%R9),%R10 |
(1000) 0x444962 CMP %R10,%RSI |
(1000) 0x444965 CMOVLE %R10,%RSI |
(1000) 0x444969 MOV %RSI,%R11 |
(1000) 0x44496c SUB %R9,%R11 |
(1000) 0x44496f CMP %R10,%RSI |
(1000) 0x444972 MOV %R11,-0x30(%RBP) |
(1000) 0x444976 JNE 4449b3 |
(1000) 0x444978 XOR %ESI,%ESI |
(1000) 0x44497a TESTB $0x1,-0x30(%RBP) |
(1000) 0x44497e MOV -0x38(%RBP),%R10 |
(1000) 0x444982 JE 444a85 |
(1000) 0x444988 ADD %RSI,%R9 |
(1000) 0x44498b MOV (%R13,%R9,8),%RDX |
(1000) 0x444990 TEST %RDX,%RDX |
(1000) 0x444993 JS 444a69 |
(1000) 0x444999 CMP %RDI,(%R15,%RDX,8) |
(1000) 0x44499d JE 444a85 |
(1000) 0x4449a3 LEA (%R15,%RDX,8),%RDX |
(1000) 0x4449a7 INC %RCX |
(1000) 0x4449aa MOV -0x60(%RBP),%RSI |
(1000) 0x4449ae JMP 444a7d |
(1000) 0x4449b3 AND $-0x2,%R11 |
(1000) 0x4449b7 LEA 0x8(%R13,%R9,8),%R10 |
(1000) 0x4449bc XOR %ESI,%ESI |
(1000) 0x4449be MOV %R13,%RDX |
(1000) 0x4449c1 JMP 4449e4 |
0x4449c3 NOPW %CS:(%RAX,%RAX,1) |
(1001) 0x4449d0 INCQ 0x8(%R13,%RDI,8) |
(1001) 0x4449d5 MOV %RDI,(%R14) |
(1001) 0x4449d8 MOV %RDX,%R13 |
(1001) 0x4449db ADD $0x2,%RSI |
(1001) 0x4449df CMP %RSI,%R11 |
(1001) 0x4449e2 JE 44497a |
(1001) 0x4449e4 MOV -0x8(%R10,%RSI,8),%R14 |
(1001) 0x4449e9 TEST %R14,%R14 |
(1001) 0x4449ec JS 444a10 |
(1001) 0x4449ee CMP %RDI,(%R15,%R14,8) |
(1001) 0x4449f2 JE 444a2f |
(1001) 0x4449f4 LEA (%R15,%R14,8),%R14 |
(1001) 0x4449f8 INC %RCX |
(1001) 0x4449fb MOV -0x60(%RBP),%R13 |
(1001) 0x4449ff JMP 444a24 |
0x444a01 NOPW %CS:(%RAX,%RAX,1) |
(1001) 0x444a10 NOT %R14 |
(1001) 0x444a13 CMP %RDI,(%RBX,%R14,8) |
(1001) 0x444a17 JE 444a2f |
(1001) 0x444a19 LEA (%RBX,%R14,8),%R14 |
(1001) 0x444a1d INC %RAX |
(1001) 0x444a20 MOV -0x58(%RBP),%R13 |
(1001) 0x444a24 INCQ 0x8(%R13,%RDI,8) |
(1001) 0x444a29 MOV %RDI,(%R14) |
(1001) 0x444a2c MOV %RDX,%R13 |
(1001) 0x444a2f MOV (%R10,%RSI,8),%R14 |
(1001) 0x444a33 TEST %R14,%R14 |
(1001) 0x444a36 JS 444a50 |
(1001) 0x444a38 CMP %RDI,(%R15,%R14,8) |
(1001) 0x444a3c JE 4449db |
(1001) 0x444a3e LEA (%R15,%R14,8),%R14 |
(1001) 0x444a42 INC %RCX |
(1001) 0x444a45 MOV -0x60(%RBP),%R13 |
(1001) 0x444a49 JMP 4449d0 |
0x444a4b NOPL (%RAX,%RAX,1) |
(1001) 0x444a50 NOT %R14 |
(1001) 0x444a53 CMP %RDI,(%RBX,%R14,8) |
(1001) 0x444a57 JE 4449db |
(1001) 0x444a59 LEA (%RBX,%R14,8),%R14 |
(1001) 0x444a5d INC %RAX |
(1001) 0x444a60 MOV -0x58(%RBP),%R13 |
(1001) 0x444a64 JMP 4449d0 |
(1000) 0x444a69 NOT %RDX |
(1000) 0x444a6c CMP %RDI,(%RBX,%RDX,8) |
(1000) 0x444a70 JE 444a85 |
(1000) 0x444a72 LEA (%RBX,%RDX,8),%RDX |
(1000) 0x444a76 INC %RAX |
(1000) 0x444a79 MOV -0x58(%RBP),%RSI |
(1000) 0x444a7d INCQ 0x8(%RSI,%RDI,8) |
(1000) 0x444a82 MOV %RDI,(%RDX) |
(1000) 0x444a85 MOV -0xa0(%RBP),%RDX |
(1000) 0x444a8c MOV 0x8(%RDX,%RDI,8),%RDX |
(1000) 0x444a91 INC %R8 |
(1000) 0x444a94 CMP %RDX,%R8 |
(1000) 0x444a97 JL 44491c |
(999) 0x444a9d JMP 4445c0 |
0x444aa2 XOR %EAX,%EAX |
0x444aa4 XOR %ECX,%ECX |
0x444aa6 MOV -0x68(%RBP),%R13 |
0x444aaa TEST %R13,%R13 |
0x444aad JNE 444ac0 |
0x444aaf MOV -0xe0(%RBP),%RDX |
0x444ab6 MOV -0x140(%RBP),%RSI |
0x444abd MOV %RSI,(%RDX) |
0x444ac0 MOV -0x78(%RBP),%RDX |
0x444ac4 MOV %RCX,(%RDX,%R13,8) |
0x444ac8 MOV -0xf0(%RBP),%R14 |
0x444acf MOV %RAX,(%R14,%R13,8) |
0x444ad3 MOV -0xc0(%RBP),%RAX |
0x444ada MOV (%RAX),%ESI |
0x444adc MOV $0x732870,%EDI |
0x444ae1 CALL 410020 <__kmpc_barrier@plt> |
0x444ae6 MOV -0x78(%RBP),%RDI |
0x444aea TEST %R13,%R13 |
0x444aed MOV -0xe0(%RBP),%R13 |
0x444af4 JNE 444b3d |
0x444af6 CMPQ $0x2,(%R13) |
0x444afb JL 444b3d |
0x444afd MOV $0x1,%EAX |
0x444b02 NOPW %CS:(%RAX,%RAX,1) |
(998) 0x444b10 MOV -0x8(%RDI,%RAX,8),%RCX |
(998) 0x444b15 LEA (%RDI,%RAX,8),%RDX |
(998) 0x444b19 MOV (%RDX),%RSI |
(998) 0x444b1c ADD %RCX,%RSI |
(998) 0x444b1f MOV %RSI,(%RDX) |
(998) 0x444b22 MOV -0x8(%R14,%RAX,8),%RCX |
(998) 0x444b27 LEA (%R14,%RAX,8),%RDX |
(998) 0x444b2b MOV (%RDX),%RSI |
(998) 0x444b2e ADD %RCX,%RSI |
(998) 0x444b31 MOV %RSI,(%RDX) |
(998) 0x444b34 INC %RAX |
(998) 0x444b37 CMP (%R13),%RAX |
(998) 0x444b3b JL 444b10 |
0x444b3d MOV -0xc0(%RBP),%RAX |
0x444b44 MOV (%RAX),%ESI |
0x444b46 MOV $0x732890,%EDI |
0x444b4b CALL 410020 <__kmpc_barrier@plt> |
0x444b50 CMPQ $0,-0x68(%RBP) |
0x444b55 JLE 444ce6 |
0x444b5b MOV -0xb0(%RBP),%RAX |
0x444b62 CMP %RAX,-0x70(%RBP) |
0x444b66 MOV -0x98(%RBP),%R11 |
0x444b6d MOV %R14,%R10 |
0x444b70 MOV -0x90(%RBP),%R14 |
0x444b77 MOV -0x78(%RBP),%RSI |
0x444b7b MOV -0x68(%RBP),%R13 |
0x444b7f JGE 444d51 |
0x444b85 MOV -0x80(%RBP),%RDX |
0x444b89 LEA 0x1(%RDX),%RAX |
0x444b8d MOV -0xc8(%RBP),%RCX |
0x444b94 CMP %RCX,%RAX |
0x444b97 CMOVLE %RCX,%RAX |
0x444b9b MOV %RAX,-0x50(%RBP) |
0x444b9f SUB %RDX,%RAX |
0x444ba2 MOV %RAX,-0x38(%RBP) |
0x444ba6 CMP $0x4,%RAX |
0x444baa MOV %RSI,%RAX |
0x444bad JB 444c82 |
0x444bb3 MOV -0x38(%RBP),%RDX |
0x444bb7 SHR $0x2,%RDX |
0x444bbb MOV -0x88(%RBP),%RSI |
0x444bc2 MOV -0x80(%RBP),%RDI |
0x444bc6 LEA 0x18(%RSI,%RDI,8),%RSI |
0x444bcb NOPL (%RAX,%RAX,1) |
(997) 0x444bd0 MOV -0x18(%RSI),%RDI |
(997) 0x444bd4 MOV -0x8(%R10,%R13,8),%R8 |
(997) 0x444bd9 LEA (%R14,%RDI,8),%R9 |
(997) 0x444bdd MOV %R10,%RCX |
(997) 0x444be0 MOV (%R9),%R10 |
(997) 0x444be3 ADD %R8,%R10 |
(997) 0x444be6 MOV %R10,(%R9) |
(997) 0x444be9 MOV -0x8(%RAX,%R13,8),%R8 |
(997) 0x444bee LEA (%R11,%RDI,8),%RDI |
(997) 0x444bf2 MOV (%RDI),%R9 |
(997) 0x444bf5 ADD %R8,%R9 |
(997) 0x444bf8 MOV %R9,(%RDI) |
(997) 0x444bfb MOV -0x10(%RSI),%RDI |
(997) 0x444bff MOV -0x8(%RCX,%R13,8),%R8 |
(997) 0x444c04 LEA (%R14,%RDI,8),%R9 |
(997) 0x444c08 MOV (%R9),%R10 |
(997) 0x444c0b ADD %R8,%R10 |
(997) 0x444c0e MOV %R10,(%R9) |
(997) 0x444c11 MOV -0x8(%RAX,%R13,8),%R8 |
(997) 0x444c16 LEA (%R11,%RDI,8),%RDI |
(997) 0x444c1a MOV (%RDI),%R9 |
(997) 0x444c1d ADD %R8,%R9 |
(997) 0x444c20 MOV %R9,(%RDI) |
(997) 0x444c23 MOV -0x8(%RSI),%RDI |
(997) 0x444c27 MOV -0x8(%RCX,%R13,8),%R8 |
(997) 0x444c2c LEA (%R14,%RDI,8),%R9 |
(997) 0x444c30 MOV (%R9),%R10 |
(997) 0x444c33 ADD %R8,%R10 |
(997) 0x444c36 MOV %R10,(%R9) |
(997) 0x444c39 MOV -0x8(%RAX,%R13,8),%R8 |
(997) 0x444c3e LEA (%R11,%RDI,8),%RDI |
(997) 0x444c42 MOV (%RDI),%R9 |
(997) 0x444c45 ADD %R8,%R9 |
(997) 0x444c48 MOV %R9,(%RDI) |
(997) 0x444c4b MOV (%RSI),%RDI |
(997) 0x444c4e MOV -0x8(%RCX,%R13,8),%R8 |
(997) 0x444c53 LEA (%R14,%RDI,8),%R9 |
(997) 0x444c57 MOV (%R9),%R10 |
(997) 0x444c5a ADD %R8,%R10 |
(997) 0x444c5d MOV %R10,(%R9) |
(997) 0x444c60 MOV %RCX,%R10 |
(997) 0x444c63 MOV -0x8(%RAX,%R13,8),%R8 |
(997) 0x444c68 LEA (%R11,%RDI,8),%RDI |
(997) 0x444c6c MOV (%RDI),%R9 |
(997) 0x444c6f ADD %R8,%R9 |
(997) 0x444c72 MOV %R9,(%RDI) |
(997) 0x444c75 ADD $0x20,%RSI |
(997) 0x444c79 DEC %RDX |
(997) 0x444c7c JNE 444bd0 |
0x444c82 MOV -0x38(%RBP),%RCX |
0x444c86 MOV %RCX,%RDX |
0x444c89 AND $-0x4,%RDX |
0x444c8d CMP %RCX,%RDX |
0x444c90 MOV -0x88(%RBP),%R8 |
0x444c97 MOV -0xd8(%RBP),%R9 |
0x444c9e JAE 444d51 |
0x444ca4 ADD -0x70(%RBP),%R9 |
0x444ca8 ADD %RDX,%R9 |
0x444cab NOPL (%RAX,%RAX,1) |
(996) 0x444cb0 MOV (%R8,%R9,8),%RCX |
(996) 0x444cb4 MOV -0x8(%R10,%R13,8),%RDX |
(996) 0x444cb9 LEA (%R14,%RCX,8),%RSI |
(996) 0x444cbd MOV (%RSI),%RDI |
(996) 0x444cc0 ADD %RDX,%RDI |
(996) 0x444cc3 MOV %RDI,(%RSI) |
(996) 0x444cc6 MOV -0x8(%RAX,%R13,8),%RDX |
(996) 0x444ccb LEA (%R11,%RCX,8),%RCX |
(996) 0x444ccf MOV (%RCX),%RSI |
(996) 0x444cd2 ADD %RDX,%RSI |
(996) 0x444cd5 MOV %RSI,(%RCX) |
(996) 0x444cd8 MOV -0x50(%RBP),%RCX |
(996) 0x444cdc INC %R9 |
(996) 0x444cdf CMP %R9,%RCX |
(996) 0x444ce2 JNE 444cb0 |
0x444ce4 JMP 444d51 |
0x444ce6 MOV (%R13),%RAX |
0x444cea MOV -0x8(%R14,%RAX,8),%RDI |
0x444cef MOV -0x78(%RBP),%RCX |
0x444cf3 MOV -0x8(%RCX,%RAX,8),%R14 |
0x444cf8 MOV -0x148(%RBP),%RAX |
0x444cff ADD %RDI,(%RAX) |
0x444d02 MOV -0x150(%RBP),%RAX |
0x444d09 ADD %R14,(%RAX) |
0x444d0c MOV $0x8,%ESI |
0x444d11 CALL 4e6d80 <hypre_CAlloc> |
0x444d16 MOV -0x40(%RBP),%RCX |
0x444d1a MOV %RAX,(%RCX,%R12,8) |
0x444d1e TEST %R14,%R14 |
0x444d21 JE 444d32 |
0x444d23 MOV $0x8,%ESI |
0x444d28 MOV %R14,%RDI |
0x444d2b CALL 4e6d80 <hypre_CAlloc> |
0x444d30 JMP 444d45 |
0x444d32 MOV -0x138(%RBP),%RAX |
0x444d39 CMPQ $0x2,(%RAX) |
0x444d3d MOV -0x68(%RBP),%R13 |
0x444d41 JL 444d51 |
0x444d43 XOR %EAX,%EAX |
0x444d45 MOV -0x48(%RBP),%RCX |
0x444d49 MOV %RAX,(%RCX,%R12,8) |
0x444d4d MOV -0x68(%RBP),%R13 |
0x444d51 MOV -0xc0(%RBP),%RAX |
0x444d58 MOV (%RAX),%ESI |
0x444d5a MOV $0x7328b0,%EDI |
0x444d5f CALL 410020 <__kmpc_barrier@plt> |
0x444d64 TEST %R13,%R13 |
0x444d67 JLE 444d94 |
0x444d69 MOV -0xf0(%RBP),%RAX |
0x444d70 MOV -0x8(%RAX,%R13,8),%RAX |
0x444d75 MOV -0x78(%RBP),%RCX |
0x444d79 MOV -0x8(%RCX,%R13,8),%RCX |
0x444d7e MOV -0x70(%RBP),%RDX |
0x444d82 CMP -0xb0(%RBP),%RDX |
0x444d89 MOV -0x80(%RBP),%RSI |
0x444d8d JL 444dad |
0x444d8f JMP 4452d1 |
0x444d94 XOR %EAX,%EAX |
0x444d96 XOR %ECX,%ECX |
0x444d98 MOV -0x70(%RBP),%RDX |
0x444d9c CMP -0xb0(%RBP),%RDX |
0x444da3 MOV -0x80(%RBP),%RSI |
0x444da7 JGE 4452d1 |
0x444dad LEA -0x1(%R12),%R10 |
0x444db2 MOV %R10,-0x38(%RBP) |
0x444db6 JMP 444dd4 |
0x444db8 NOPL (%RAX,%RAX,1) |
(988) 0x444dc0 MOV -0x80(%RBP),%RSI |
(988) 0x444dc4 INC %RSI |
(988) 0x444dc7 CMP -0xc8(%RBP),%RSI |
(988) 0x444dce JGE 4452d1 |
(988) 0x444dd4 MOV -0x88(%RBP),%RDX |
(988) 0x444ddb MOV %RSI,-0x80(%RBP) |
(988) 0x444ddf MOV (%RDX,%RSI,8),%RSI |
(988) 0x444de3 MOV -0xa8(%RBP),%RDX |
(988) 0x444dea MOV (%RDX,%RSI,8),%R8 |
(988) 0x444dee MOV %RSI,%RDI |
(988) 0x444df1 NOT %RDI |
(988) 0x444df4 MOV %RSI,-0x50(%RBP) |
(988) 0x444df8 JMP 444e12 |
0x444dfa NOPW (%RAX,%RAX,1) |
(991) 0x444e00 MOV -0x38(%RBP),%R10 |
(991) 0x444e04 INC %R8 |
(991) 0x444e07 MOV -0xa8(%RBP),%RDX |
(991) 0x444e0e MOV -0x50(%RBP),%RSI |
(991) 0x444e12 CMP 0x8(%RDX,%RSI,8),%R8 |
(991) 0x444e17 JGE 445100 |
(991) 0x444e1d MOV -0x128(%RBP),%RDX |
(991) 0x444e24 MOV (%RDX,%R8,8),%R14 |
(991) 0x444e28 MOV -0x118(%RBP),%RDX |
(991) 0x444e2f CMP %R10,(%RDX,%R14,8) |
(991) 0x444e33 JNE 444e04 |
(991) 0x444e35 MOV -0x58(%RBP),%RDX |
(991) 0x444e39 MOV 0x8(%RDX,%R14,8),%R10 |
(991) 0x444e3e TEST %R10,%R10 |
(991) 0x444e41 JLE 444f97 |
(991) 0x444e47 MOV -0x90(%RBP),%RDX |
(991) 0x444e4e MOV %R14,-0x30(%RBP) |
(991) 0x444e52 MOV (%RDX,%R14,8),%R11 |
(991) 0x444e56 ADD %R11,%R10 |
(991) 0x444e59 MOV -0x40(%RBP),%RDX |
(991) 0x444e5d MOV -0x8(%RDX,%R12,8),%RSI |
(991) 0x444e62 LEA 0x1(%R11),%RDX |
(991) 0x444e66 CMP %RDX,%R10 |
(991) 0x444e69 CMOVLE %RDX,%R10 |
(991) 0x444e6d MOV %R10,%RDX |
(991) 0x444e70 SUB %R11,%RDX |
(991) 0x444e73 CMP $0x4,%RDX |
(991) 0x444e77 MOV %RDX,-0xd0(%RBP) |
(991) 0x444e7e JAE 444ecb |
(991) 0x444e80 MOV -0xd0(%RBP),%R9 |
(991) 0x444e87 MOV %R9,%RDX |
(991) 0x444e8a AND $-0x4,%RDX |
(991) 0x444e8e CMP %R9,%RDX |
(991) 0x444e91 JAE 444f93 |
(991) 0x444e97 ADD %RDX,%R11 |
(991) 0x444e9a MOV -0x30(%RBP),%R14 |
(991) 0x444e9e JMP 444eac |
(994) 0x444ea0 INC %R11 |
(994) 0x444ea3 CMP %R11,%R10 |
(994) 0x444ea6 JE 444f97 |
(994) 0x444eac MOV (%RSI,%R11,8),%RDX |
(994) 0x444eb0 CMP %RDI,(%RBX,%RDX,8) |
(994) 0x444eb4 JE 444ea0 |
(994) 0x444eb6 MOV -0x40(%RBP),%R9 |
(994) 0x444eba MOV (%R9,%R12,8),%R9 |
(994) 0x444ebe MOV %RDX,(%R9,%RAX,8) |
(994) 0x444ec2 INC %RAX |
(994) 0x444ec5 MOV %RDI,(%RBX,%RDX,8) |
(994) 0x444ec9 JMP 444ea0 |
(991) 0x444ecb SHR $0x2,%RDX |
(991) 0x444ecf LEA 0x18(%RSI,%R11,8),%R13 |
(991) 0x444ed4 JMP 444ee9 |
0x444ed6 NOPW %CS:(%RAX,%RAX,1) |
(995) 0x444ee0 ADD $0x20,%R13 |
(995) 0x444ee4 DEC %RDX |
(995) 0x444ee7 JE 444e80 |
(995) 0x444ee9 MOV -0x18(%R13),%R14 |
(995) 0x444eed CMP %RDI,(%RBX,%R14,8) |
(995) 0x444ef1 JNE 444f20 |
(995) 0x444ef3 MOV -0x10(%R13),%R14 |
(995) 0x444ef7 CMP %RDI,(%RBX,%R14,8) |
(995) 0x444efb JNE 444f3d |
(995) 0x444efd MOV -0x8(%R13),%R14 |
(995) 0x444f01 CMP %RDI,(%RBX,%R14,8) |
(995) 0x444f05 JNE 444f5a |
(995) 0x444f07 MOV (%R13),%R14 |
(995) 0x444f0b CMP %RDI,(%RBX,%R14,8) |
(995) 0x444f0f JE 444ee0 |
(995) 0x444f11 JMP 444f7b |
0x444f13 NOPW %CS:(%RAX,%RAX,1) |
(995) 0x444f20 MOV -0x40(%RBP),%R9 |
(995) 0x444f24 MOV (%R9,%R12,8),%R9 |
(995) 0x444f28 MOV %R14,(%R9,%RAX,8) |
(995) 0x444f2c INC %RAX |
(995) 0x444f2f MOV %RDI,(%RBX,%R14,8) |
(995) 0x444f33 MOV -0x10(%R13),%R14 |
(995) 0x444f37 CMP %RDI,(%RBX,%R14,8) |
(995) 0x444f3b JE 444efd |
(995) 0x444f3d MOV -0x40(%RBP),%R9 |
(995) 0x444f41 MOV (%R9,%R12,8),%R9 |
(995) 0x444f45 MOV %R14,(%R9,%RAX,8) |
(995) 0x444f49 INC %RAX |
(995) 0x444f4c MOV %RDI,(%RBX,%R14,8) |
(995) 0x444f50 MOV -0x8(%R13),%R14 |
(995) 0x444f54 CMP %RDI,(%RBX,%R14,8) |
(995) 0x444f58 JE 444f07 |
(995) 0x444f5a MOV -0x40(%RBP),%R9 |
(995) 0x444f5e MOV (%R9,%R12,8),%R9 |
(995) 0x444f62 MOV %R14,(%R9,%RAX,8) |
(995) 0x444f66 INC %RAX |
(995) 0x444f69 MOV %RDI,(%RBX,%R14,8) |
(995) 0x444f6d MOV (%R13),%R14 |
(995) 0x444f71 CMP %RDI,(%RBX,%R14,8) |
(995) 0x444f75 JE 444ee0 |
(995) 0x444f7b MOV -0x40(%RBP),%R9 |
(995) 0x444f7f MOV (%R9,%R12,8),%R9 |
(995) 0x444f83 MOV %R14,(%R9,%RAX,8) |
(995) 0x444f87 INC %RAX |
(995) 0x444f8a MOV %RDI,(%RBX,%R14,8) |
(995) 0x444f8e JMP 444ee0 |
(991) 0x444f93 MOV -0x30(%RBP),%R14 |
(991) 0x444f97 MOV -0x60(%RBP),%RDX |
(991) 0x444f9b MOV 0x8(%RDX,%R14,8),%R10 |
(991) 0x444fa0 TEST %R10,%R10 |
(991) 0x444fa3 JLE 444e00 |
(991) 0x444fa9 MOV -0x98(%RBP),%RDX |
(991) 0x444fb0 MOV (%RDX,%R14,8),%R9 |
(991) 0x444fb4 ADD %R9,%R10 |
(991) 0x444fb7 MOV -0x48(%RBP),%RDX |
(991) 0x444fbb MOV -0x8(%RDX,%R12,8),%RSI |
(991) 0x444fc0 LEA 0x1(%R9),%RDX |
(991) 0x444fc4 CMP %RDX,%R10 |
(991) 0x444fc7 CMOVLE %RDX,%R10 |
(991) 0x444fcb MOV %R10,%R11 |
(991) 0x444fce SUB %R9,%R11 |
(991) 0x444fd1 CMP $0x4,%R11 |
(991) 0x444fd5 MOV %R11,-0x30(%RBP) |
(991) 0x444fd9 JAE 44502b |
(991) 0x444fdb MOV -0x30(%RBP),%RDX |
(991) 0x444fdf MOV %RDX,%R11 |
(991) 0x444fe2 AND $-0x4,%R11 |
(991) 0x444fe6 CMP %RDX,%R11 |
(991) 0x444fe9 JAE 444e00 |
(991) 0x444fef ADD %R11,%R9 |
(991) 0x444ff2 JMP 44500c |
0x444ff4 NOPW %CS:(%RAX,%RAX,1) |
(992) 0x445000 INC %R9 |
(992) 0x445003 CMP %R9,%R10 |
(992) 0x445006 JE 444e00 |
(992) 0x44500c MOV (%RSI,%R9,8),%RDX |
(992) 0x445010 CMP %RDI,(%R15,%RDX,8) |
(992) 0x445014 JE 445000 |
(992) 0x445016 MOV -0x48(%RBP),%R11 |
(992) 0x44501a MOV (%R11,%R12,8),%R11 |
(992) 0x44501e MOV %RDX,(%R11,%RCX,8) |
(992) 0x445022 INC %RCX |
(992) 0x445025 MOV %RDI,(%R15,%RDX,8) |
(992) 0x445029 JMP 445000 |
(991) 0x44502b SHR $0x2,%R11 |
(991) 0x44502f LEA 0x18(%RSI,%R9,8),%R14 |
(991) 0x445034 JMP 445049 |
0x445036 NOPW %CS:(%RAX,%RAX,1) |
(993) 0x445040 ADD $0x20,%R14 |
(993) 0x445044 DEC %R11 |
(993) 0x445047 JE 444fdb |
(993) 0x445049 MOV -0x18(%R14),%R13 |
(993) 0x44504d CMP %RDI,(%R15,%R13,8) |
(993) 0x445051 JNE 445080 |
(993) 0x445053 MOV -0x10(%R14),%R13 |
(993) 0x445057 CMP %RDI,(%R15,%R13,8) |
(993) 0x44505b JNE 44509d |
(993) 0x44505d MOV -0x8(%R14),%R13 |
(993) 0x445061 CMP %RDI,(%R15,%R13,8) |
(993) 0x445065 JNE 4450ba |
(993) 0x445067 MOV (%R14),%R13 |
(993) 0x44506a CMP %RDI,(%R15,%R13,8) |
(993) 0x44506e JE 445040 |
(993) 0x445070 JMP 4450da |
0x445072 NOPW %CS:(%RAX,%RAX,1) |
(993) 0x445080 MOV -0x48(%RBP),%RDX |
(993) 0x445084 MOV (%RDX,%R12,8),%RDX |
(993) 0x445088 MOV %R13,(%RDX,%RCX,8) |
(993) 0x44508c INC %RCX |
(993) 0x44508f MOV %RDI,(%R15,%R13,8) |
(993) 0x445093 MOV -0x10(%R14),%R13 |
(993) 0x445097 CMP %RDI,(%R15,%R13,8) |
(993) 0x44509b JE 44505d |
(993) 0x44509d MOV -0x48(%RBP),%RDX |
(993) 0x4450a1 MOV (%RDX,%R12,8),%RDX |
(993) 0x4450a5 MOV %R13,(%RDX,%RCX,8) |
(993) 0x4450a9 INC %RCX |
(993) 0x4450ac MOV %RDI,(%R15,%R13,8) |
(993) 0x4450b0 MOV -0x8(%R14),%R13 |
(993) 0x4450b4 CMP %RDI,(%R15,%R13,8) |
(993) 0x4450b8 JE 445067 |
(993) 0x4450ba MOV -0x48(%RBP),%RDX |
(993) 0x4450be MOV (%RDX,%R12,8),%RDX |
(993) 0x4450c2 MOV %R13,(%RDX,%RCX,8) |
(993) 0x4450c6 INC %RCX |
(993) 0x4450c9 MOV %RDI,(%R15,%R13,8) |
(993) 0x4450cd MOV (%R14),%R13 |
(993) 0x4450d0 CMP %RDI,(%R15,%R13,8) |
(993) 0x4450d4 JE 445040 |
(993) 0x4450da MOV -0x48(%RBP),%RDX |
(993) 0x4450de MOV (%RDX,%R12,8),%RDX |
(993) 0x4450e2 MOV %R13,(%RDX,%RCX,8) |
(993) 0x4450e6 INC %RCX |
(993) 0x4450e9 MOV %RDI,(%R15,%R13,8) |
(993) 0x4450ed JMP 445040 |
0x4450f2 NOPW %CS:(%RAX,%RAX,1) |
(988) 0x445100 MOV -0xa0(%RBP),%RDX |
(988) 0x445107 MOV -0x50(%RBP),%RSI |
(988) 0x44510b MOV (%RDX,%RSI,8),%R8 |
(988) 0x44510f MOV 0x8(%RDX,%RSI,8),%RDX |
(988) 0x445114 CMP %RDX,%R8 |
(988) 0x445117 JL 44512c |
(988) 0x445119 JMP 444dc0 |
0x44511e XCHG %AX,%AX |
(989) 0x445120 INC %R8 |
(989) 0x445123 CMP %RDX,%R8 |
(989) 0x445126 JGE 444dc0 |
(989) 0x44512c MOV -0x130(%RBP),%RSI |
(989) 0x445133 MOV (%RSI,%R8,8),%R9 |
(989) 0x445137 MOV -0x120(%RBP),%RSI |
(989) 0x44513e CMP %R10,(%RSI,%R9,8) |
(989) 0x445142 JNE 445120 |
(989) 0x445144 MOV -0x110(%RBP),%RSI |
(989) 0x44514b MOV 0x8(%RSI,%R9,8),%RSI |
(989) 0x445150 TEST %RSI,%RSI |
(989) 0x445153 JLE 445120 |
(989) 0x445155 MOV -0x100(%RBP),%RDX |
(989) 0x44515c MOV (%RDX,%R9,8),%R9 |
(989) 0x445160 ADD %R9,%RSI |
(989) 0x445163 MOV -0x108(%RBP),%RDX |
(989) 0x44516a MOV (%RDX,%R12,8),%R11 |
(989) 0x44516e LEA 0x1(%R9),%R10 |
(989) 0x445172 CMP %R10,%RSI |
(989) 0x445175 CMOVLE %R10,%RSI |
(989) 0x445179 MOV %RSI,%RDX |
(989) 0x44517c SUB %R9,%RDX |
(989) 0x44517f CMP %R10,%RSI |
(989) 0x445182 MOV %R11,-0x30(%RBP) |
(989) 0x445186 JNE 4451ce |
(989) 0x445188 XOR %R11D,%R11D |
(989) 0x44518b TEST $0x1,%DL |
(989) 0x44518e MOV -0x38(%RBP),%R10 |
(989) 0x445192 JE 4452b0 |
(989) 0x445198 ADD %R11,%R9 |
(989) 0x44519b MOV -0x30(%RBP),%RDX |
(989) 0x44519f MOV (%RDX,%R9,8),%RDX |
(989) 0x4451a3 TEST %RDX,%RDX |
(989) 0x4451a6 JS 445287 |
(989) 0x4451ac CMP %RDI,(%R15,%RDX,8) |
(989) 0x4451b0 JE 4452b0 |
(989) 0x4451b6 MOV -0x48(%RBP),%RSI |
(989) 0x4451ba MOV (%RSI,%R12,8),%RSI |
(989) 0x4451be MOV %RDX,(%RSI,%RCX,8) |
(989) 0x4451c2 INC %RCX |
(989) 0x4451c5 MOV %RDI,(%R15,%RDX,8) |
(989) 0x4451c9 JMP 4452b0 |
(989) 0x4451ce MOV %RDX,%RSI |
(989) 0x4451d1 AND $-0x2,%RSI |
(989) 0x4451d5 LEA 0x8(%R11,%R9,8),%R10 |
(989) 0x4451da XOR %R11D,%R11D |
(989) 0x4451dd JMP 4451e9 |
0x4451df NOP |
(990) 0x4451e0 ADD $0x2,%R11 |
(990) 0x4451e4 CMP %R11,%RSI |
(990) 0x4451e7 JE 44518b |
(990) 0x4451e9 MOV -0x8(%R10,%R11,8),%R14 |
(990) 0x4451ee TEST %R14,%R14 |
(990) 0x4451f1 JS 445210 |
(990) 0x4451f3 CMP %RDI,(%R15,%R14,8) |
(990) 0x4451f7 JE 445230 |
(990) 0x4451f9 MOV -0x48(%RBP),%R13 |
(990) 0x4451fd MOV (%R13,%R12,8),%R13 |
(990) 0x445202 MOV %R14,(%R13,%RCX,8) |
(990) 0x445207 INC %RCX |
(990) 0x44520a MOV %RDI,(%R15,%R14,8) |
(990) 0x44520e JMP 445230 |
(990) 0x445210 NOT %R14 |
(990) 0x445213 CMP %RDI,(%RBX,%R14,8) |
(990) 0x445217 JE 445230 |
(990) 0x445219 MOV -0x40(%RBP),%R13 |
(990) 0x44521d MOV (%R13,%R12,8),%R13 |
(990) 0x445222 MOV %R14,(%R13,%RAX,8) |
(990) 0x445227 INC %RAX |
(990) 0x44522a MOV %RDI,(%RBX,%R14,8) |
(990) 0x44522e XCHG %AX,%AX |
(990) 0x445230 MOV (%R10,%R11,8),%R14 |
(990) 0x445234 TEST %R14,%R14 |
(990) 0x445237 JS 445260 |
(990) 0x445239 CMP %RDI,(%R15,%R14,8) |
(990) 0x44523d JE 4451e0 |
(990) 0x44523f MOV -0x48(%RBP),%R13 |
(990) 0x445243 MOV (%R13,%R12,8),%R13 |
(990) 0x445248 MOV %R14,(%R13,%RCX,8) |
(990) 0x44524d INC %RCX |
(990) 0x445250 MOV %RDI,(%R15,%R14,8) |
(990) 0x445254 JMP 4451e0 |
0x445256 NOPW %CS:(%RAX,%RAX,1) |
(990) 0x445260 NOT %R14 |
(990) 0x445263 CMP %RDI,(%RBX,%R14,8) |
(990) 0x445267 JE 4451e0 |
(990) 0x44526d MOV -0x40(%RBP),%R13 |
(990) 0x445271 MOV (%R13,%R12,8),%R13 |
(990) 0x445276 MOV %R14,(%R13,%RAX,8) |
(990) 0x44527b INC %RAX |
(990) 0x44527e MOV %RDI,(%RBX,%R14,8) |
(990) 0x445282 JMP 4451e0 |
(989) 0x445287 NOT %RDX |
(989) 0x44528a CMP %RDI,(%RBX,%RDX,8) |
(989) 0x44528e JE 4452b0 |
(989) 0x445290 MOV -0x40(%RBP),%RSI |
(989) 0x445294 MOV (%RSI,%R12,8),%RSI |
(989) 0x445298 MOV %RDX,(%RSI,%RAX,8) |
(989) 0x44529c INC %RAX |
(989) 0x44529f MOV %RDI,(%RBX,%RDX,8) |
(989) 0x4452a3 NOPW %CS:(%RAX,%RAX,1) |
(989) 0x4452b0 MOV -0xa0(%RBP),%RDX |
(989) 0x4452b7 MOV -0x50(%RBP),%RSI |
(989) 0x4452bb MOV 0x8(%RDX,%RSI,8),%RDX |
(989) 0x4452c0 INC %R8 |
(989) 0x4452c3 CMP %RDX,%R8 |
(989) 0x4452c6 JL 44512c |
(988) 0x4452cc JMP 444dc0 |
0x4452d1 MOV %RBX,%RDI |
0x4452d4 CALL 4e6e50 <hypre_Free> |
0x4452d9 CMPQ $0,-0xe8(%RBP) |
0x4452e1 JNE 445305 |
0x4452e3 MOV -0xb8(%RBP),%RAX |
0x4452ea CMP -0xf8(%RBP),%RAX |
0x4452f1 JE 445305 |
0x4452f3 ADD $0x128,%RSP |
0x4452fa POP %RBX |
0x4452fb POP %R12 |
0x4452fd POP %R13 |
0x4452ff POP %R14 |
0x445301 POP %R15 |
0x445303 POP %RBP |
0x445304 RET |
0x445305 MOV %R15,%RDI |
0x445308 ADD $0x128,%RSP |
0x44530f POP %RBX |
0x445310 POP %R12 |
0x445312 POP %R13 |
0x445314 POP %R14 |
0x445316 POP %R15 |
0x445318 POP %RBP |
0x445319 JMP 4e6e50 |
0x44531e XCHG %AX,%AX |
Path / |
Source file and lines | par_multi_interp.c:891-1134 |
Module | exec |
nb instructions | 304 |
nb uops | 325 |
loop length | 1455 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 60 |
micro-operation queue | 54.17 cycles |
front end | 54.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 15.80 | 15.80 | 35.00 | 35.00 | 32.50 | 15.80 | 15.80 | 32.50 | 32.50 | 32.50 | 15.80 | 35.00 |
cycles | 15.80 | 17.40 | 35.00 | 35.00 | 32.50 | 15.80 | 15.80 | 32.50 | 32.50 | 32.50 | 15.80 | 35.00 |
Cycles executing div or sqrt instructions | 16.00 |
FE+BE cycles | 52.18-52.23 |
Stall cycles | 0.00 |
Front-end | 54.17 |
Dispatch | 35.00 |
DIV/SQRT | 16.00 |
Overall L1 | 54.17 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 9% |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x128,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb8(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x150(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x138(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x120(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x80(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x148(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 4e8ab0 <hypre_GetThreadNum> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4e8aa0 <hypre_NumActiveThreads> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RBX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
OR %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x20,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
JE 4444aa <hypre_BoomerAMGBuildMultipass.extracted.34+0x16a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RBX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %RCX | 5 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 10 |
JMP 4444b0 <hypre_BoomerAMGBuildMultipass.extracted.34+0x170> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %EBX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
DIV %ECX | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV %RCX,-0x140(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
DEC %RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x1(%R12),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %RAX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R12,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RCX,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVE %RBX,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R13,%R12,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4e6d80 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
TEST %R15,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 444514 <hypre_BoomerAMGBuildMultipass.extracted.34+0x1d4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SAL $0x3,%R15 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4efe80 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
IMUL -0x68(%RBP),%R14 | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R14,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xf8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 444546 <hypre_BoomerAMGBuildMultipass.extracted.34+0x206> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xe8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 444571 <hypre_BoomerAMGBuildMultipass.extracted.34+0x231> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDI,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4e6d80 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R14,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
TEST %R14,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 444571 <hypre_BoomerAMGBuildMultipass.extracted.34+0x231> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SAL $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4efe80 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
JMP 444571 <hypre_BoomerAMGBuildMultipass.extracted.34+0x231> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xd8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RCX,%RDX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xb0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JGE 444aa2 <hypre_BoomerAMGBuildMultipass.extracted.34+0x762> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%R12),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R12,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 4445d7 <hypre_BoomerAMGBuildMultipass.extracted.34+0x297> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x68(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R13,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 444ac0 <hypre_BoomerAMGBuildMultipass.extracted.34+0x780> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xe0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x140(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,(%RDX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x78(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,(%RDX,%R13,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xf0(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%R14,%R13,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x732870,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410020 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x78(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R13,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV -0xe0(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 444b3d <hypre_BoomerAMGBuildMultipass.extracted.34+0x7fd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x2,(%R13) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 444b3d <hypre_BoomerAMGBuildMultipass.extracted.34+0x7fd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x732890,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410020 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,-0x68(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 444ce6 <hypre_BoomerAMGBuildMultipass.extracted.34+0x9a6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RAX,-0x70(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x98(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x90(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 444d51 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa11> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x80(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xc8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVLE %RCX,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x4,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RSI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JB 444c82 <hypre_BoomerAMGBuildMultipass.extracted.34+0x942> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x38(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SHR $0x2,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x88(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x18(%RSI,%RDI,8),%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x38(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x88(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xd8(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JAE 444d51 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa11> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD -0x70(%RBP),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
ADD %RDX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 444d51 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa11> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV (%R13),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%R14,%RAX,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RCX,%RAX,8),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x148(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDI,(%RAX) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x150(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R14,(%RAX) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4e6d80 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x40(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX,%R12,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R14,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 444d32 <hypre_BoomerAMGBuildMultipass.extracted.34+0x9f2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R14,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4e6d80 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
JMP 444d45 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa05> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x138(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0x2,(%RAX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JL 444d51 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa11> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x48(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX,%R12,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x68(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x7328b0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410020 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
TEST %R13,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 444d94 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa54> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xf0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RAX,%R13,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RCX,%R13,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0xb0(%RBP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JL 444dad <hypre_BoomerAMGBuildMultipass.extracted.34+0xa6d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 4452d1 <hypre_BoomerAMGBuildMultipass.extracted.34+0xf91> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0xb0(%RBP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 4452d1 <hypre_BoomerAMGBuildMultipass.extracted.34+0xf91> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%R12),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R10,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 444dd4 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa94> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4e6e50 <hypre_Free> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,-0xe8(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 445305 <hypre_BoomerAMGBuildMultipass.extracted.34+0xfc5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0xf8(%RBP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 445305 <hypre_BoomerAMGBuildMultipass.extracted.34+0xfc5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD $0x128,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD $0x128,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP 4e6e50 <hypre_Free> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | par_multi_interp.c:891-1134 |
Module | exec |
nb instructions | 304 |
nb uops | 325 |
loop length | 1455 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 60 |
micro-operation queue | 54.17 cycles |
front end | 54.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 15.80 | 15.80 | 35.00 | 35.00 | 32.50 | 15.80 | 15.80 | 32.50 | 32.50 | 32.50 | 15.80 | 35.00 |
cycles | 15.80 | 17.40 | 35.00 | 35.00 | 32.50 | 15.80 | 15.80 | 32.50 | 32.50 | 32.50 | 15.80 | 35.00 |
Cycles executing div or sqrt instructions | 16.00 |
FE+BE cycles | 52.18-52.23 |
Stall cycles | 0.00 |
Front-end | 54.17 |
Dispatch | 35.00 |
DIV/SQRT | 16.00 |
Overall L1 | 54.17 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 9% |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x128,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb8(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x150(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x138(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x120(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x80(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x148(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 4e8ab0 <hypre_GetThreadNum> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4e8aa0 <hypre_NumActiveThreads> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RBX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
OR %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x20,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
JE 4444aa <hypre_BoomerAMGBuildMultipass.extracted.34+0x16a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RBX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %RCX | 5 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 10 |
JMP 4444b0 <hypre_BoomerAMGBuildMultipass.extracted.34+0x170> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %EBX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
DIV %ECX | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV %RCX,-0x140(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
DEC %RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x1(%R12),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %RAX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R12,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RCX,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVE %RBX,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R13,%R12,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4e6d80 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
TEST %R15,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 444514 <hypre_BoomerAMGBuildMultipass.extracted.34+0x1d4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SAL $0x3,%R15 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4efe80 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
IMUL -0x68(%RBP),%R14 | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R14,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xf8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 444546 <hypre_BoomerAMGBuildMultipass.extracted.34+0x206> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xe8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 444571 <hypre_BoomerAMGBuildMultipass.extracted.34+0x231> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDI,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4e6d80 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R14,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
TEST %R14,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 444571 <hypre_BoomerAMGBuildMultipass.extracted.34+0x231> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SAL $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4efe80 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
JMP 444571 <hypre_BoomerAMGBuildMultipass.extracted.34+0x231> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xd8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RCX,%RDX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xb0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JGE 444aa2 <hypre_BoomerAMGBuildMultipass.extracted.34+0x762> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%R12),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R12,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 4445d7 <hypre_BoomerAMGBuildMultipass.extracted.34+0x297> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x68(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R13,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 444ac0 <hypre_BoomerAMGBuildMultipass.extracted.34+0x780> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xe0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x140(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,(%RDX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x78(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,(%RDX,%R13,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xf0(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%R14,%R13,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x732870,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410020 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x78(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R13,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV -0xe0(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 444b3d <hypre_BoomerAMGBuildMultipass.extracted.34+0x7fd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x2,(%R13) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 444b3d <hypre_BoomerAMGBuildMultipass.extracted.34+0x7fd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x732890,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410020 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,-0x68(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 444ce6 <hypre_BoomerAMGBuildMultipass.extracted.34+0x9a6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RAX,-0x70(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x98(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x90(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 444d51 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa11> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x80(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xc8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVLE %RCX,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x4,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RSI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JB 444c82 <hypre_BoomerAMGBuildMultipass.extracted.34+0x942> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x38(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SHR $0x2,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x88(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x18(%RSI,%RDI,8),%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x38(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x88(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xd8(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JAE 444d51 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa11> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD -0x70(%RBP),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
ADD %RDX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 444d51 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa11> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV (%R13),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%R14,%RAX,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RCX,%RAX,8),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x148(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDI,(%RAX) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x150(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R14,(%RAX) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4e6d80 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x40(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX,%R12,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R14,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 444d32 <hypre_BoomerAMGBuildMultipass.extracted.34+0x9f2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R14,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4e6d80 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
JMP 444d45 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa05> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x138(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0x2,(%RAX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JL 444d51 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa11> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x48(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX,%R12,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x68(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x7328b0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410020 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
TEST %R13,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 444d94 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa54> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xf0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RAX,%R13,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RCX,%R13,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0xb0(%RBP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JL 444dad <hypre_BoomerAMGBuildMultipass.extracted.34+0xa6d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 4452d1 <hypre_BoomerAMGBuildMultipass.extracted.34+0xf91> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0xb0(%RBP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 4452d1 <hypre_BoomerAMGBuildMultipass.extracted.34+0xf91> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%R12),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R10,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 444dd4 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa94> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4e6e50 <hypre_Free> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,-0xe8(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 445305 <hypre_BoomerAMGBuildMultipass.extracted.34+0xfc5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0xf8(%RBP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 445305 <hypre_BoomerAMGBuildMultipass.extracted.34+0xfc5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD $0x128,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD $0x128,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP 4e6e50 <hypre_Free> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼hypre_BoomerAMGBuildMultipass.extracted.34– | 1.59 | 0.34 |
○Loop 997 - par_multi_interp.c:1030-1034 - exec | 0.1 | 0.02 |
▼Loop 999 - par_multi_interp.c:917-997 - exec– | 0.04 | 0.01 |
▼Loop 1002 - par_multi_interp.c:917-970 - exec– | 0.54 | 0.11 |
○Loop 1005 - par_multi_interp.c:951-958 - exec | 0.2 | 0.04 |
○Loop 1006 - par_multi_interp.c:917-958 - exec | 0 | 0.01 |
○Loop 1004 - par_multi_interp.c:963-970 - exec | 0 | 0 |
○Loop 1003 - par_multi_interp.c:963-970 - exec | 0 | 0 |
▼Loop 1000 - par_multi_interp.c:976-997 - exec– | 0 | 0 |
○Loop 1001 - par_multi_interp.c:983-997 - exec | 0 | 0 |
▼Loop 988 - par_multi_interp.c:917-1125 - exec– | 0.03 | 0.01 |
▼Loop 991 - par_multi_interp.c:917-1099 - exec– | 0.48 | 0.09 |
○Loop 994 - par_multi_interp.c:1082-1088 - exec | 0.19 | 0.04 |
○Loop 992 - par_multi_interp.c:1093-1099 - exec | 0 | 0 |
○Loop 993 - par_multi_interp.c:1093-1099 - exec | 0 | 0 |
○Loop 995 - par_multi_interp.c:1082-1088 - exec | 0 | 0 |
▼Loop 989 - par_multi_interp.c:1104-1125 - exec– | 0 | 0 |
○Loop 990 - par_multi_interp.c:1111-1125 - exec | 0 | 0 |
○Loop 996 - par_multi_interp.c:1030-1034 - exec | 0 | 0 |
○Loop 998 - par_multi_interp.c:1017-1020 - exec | 0 | 0 |