Loop Id: 1002 | Module: exec | Source: par_multi_interp.c:917-970 [...] | Coverage: 0.54% |
---|
Loop Id: 1002 | Module: exec | Source: par_multi_interp.c:917-970 [...] | Coverage: 0.54% |
---|
0x444610 MOV -0x38(%RBP),%R10 |
0x444614 INC %R8 |
0x444617 MOV -0xa8(%RBP),%RDX |
0x44461e CMP 0x8(%RDX,%RDI,8),%R8 |
0x444623 JGE 4448f0 |
0x444629 MOV -0x128(%RBP),%RDX |
0x444630 MOV (%RDX,%R8,8),%R9 |
0x444634 MOV -0x118(%RBP),%RDX |
0x44463b CMP %R10,(%RDX,%R9,8) |
0x44463f JNE 444614 |
0x444641 MOV -0x58(%RBP),%RDX |
0x444645 MOV 0x8(%RDX,%R9,8),%RSI |
0x44464a TEST %RSI,%RSI |
0x44464d JLE 4446d0 |
0x444653 MOV -0x90(%RBP),%RDX |
0x44465a MOV (%RDX,%R9,8),%R10 |
0x44465e ADD %R10,%RSI |
0x444661 MOV -0x40(%RBP),%RDX |
0x444665 MOV -0x8(%RDX,%R12,8),%R11 |
0x44466a LEA 0x1(%R10),%RDX |
0x44466e CMP %RDX,%RSI |
0x444671 CMOVLE %RDX,%RSI |
0x444675 MOV %RSI,%RDX |
0x444678 SUB %R10,%RDX |
0x44467b CMP $0x4,%RDX |
0x44467f MOV %RDX,-0x30(%RBP) |
0x444683 JAE 444768 |
0x444689 MOV -0x30(%RBP),%R14 |
0x44468d MOV %R14,%RDX |
0x444690 AND $-0x4,%RDX |
0x444694 CMP %R14,%RDX |
0x444697 JAE 4446d0 |
0x444699 ADD %RDX,%R10 |
0x44469c JMP 4446a8 |
(1005) 0x4446a0 INC %R10 |
(1005) 0x4446a3 CMP %R10,%RSI |
(1005) 0x4446a6 JE 4446d0 |
(1005) 0x4446a8 MOV (%R11,%R10,8),%RDX |
(1005) 0x4446ac CMP %RDI,(%RBX,%RDX,8) |
(1005) 0x4446b0 JE 4446a0 |
(1005) 0x4446b2 INC %RAX |
(1005) 0x4446b5 MOV -0x58(%RBP),%R14 |
(1005) 0x4446b9 INCQ 0x8(%R14,%RDI,8) |
(1005) 0x4446be MOV %RDI,(%RBX,%RDX,8) |
(1005) 0x4446c2 JMP 4446a0 |
0x4446d0 MOV -0x60(%RBP),%RDX |
0x4446d4 MOV 0x8(%RDX,%R9,8),%RSI |
0x4446d9 TEST %RSI,%RSI |
0x4446dc JLE 444610 |
0x4446e2 MOV -0x98(%RBP),%RDX |
0x4446e9 MOV (%RDX,%R9,8),%R9 |
0x4446ed ADD %R9,%RSI |
0x4446f0 MOV -0x48(%RBP),%RDX |
0x4446f4 MOV -0x8(%RDX,%R12,8),%R10 |
0x4446f9 LEA 0x1(%R9),%RDX |
0x4446fd CMP %RDX,%RSI |
0x444700 CMOVLE %RDX,%RSI |
0x444704 MOV %RSI,%R11 |
0x444707 SUB %R9,%R11 |
0x44470a CMP $0x4,%R11 |
0x44470e MOV %R11,-0x30(%RBP) |
0x444712 JAE 444827 |
0x444718 MOV -0x30(%RBP),%RDX |
0x44471c MOV %RDX,%R11 |
0x44471f AND $-0x4,%R11 |
0x444723 CMP %RDX,%R11 |
0x444726 JAE 444610 |
0x44472c ADD %R11,%R9 |
0x44472f JMP 44474c |
(1003) 0x444740 INC %R9 |
(1003) 0x444743 CMP %R9,%RSI |
(1003) 0x444746 JE 444610 |
(1003) 0x44474c MOV (%R10,%R9,8),%RDX |
(1003) 0x444750 CMP %RDI,(%R15,%RDX,8) |
(1003) 0x444754 JE 444740 |
(1003) 0x444756 INC %RCX |
(1003) 0x444759 MOV -0x60(%RBP),%R11 |
(1003) 0x44475d INCQ 0x8(%R11,%RDI,8) |
(1003) 0x444762 MOV %RDI,(%R15,%RDX,8) |
(1003) 0x444766 JMP 444740 |
0x444768 MOV %RDX,%R14 |
0x44476b SHR $0x2,%R14 |
0x44476f LEA 0x18(%R11,%R10,8),%R13 |
0x444774 JMP 444791 |
(1006) 0x444780 MOV -0x50(%RBP),%R12 |
(1006) 0x444784 ADD $0x20,%R13 |
(1006) 0x444788 DEC %R14 |
(1006) 0x44478b JE 444689 |
(1006) 0x444791 MOV -0x18(%R13),%RDX |
(1006) 0x444795 CMP %RDI,(%RBX,%RDX,8) |
(1006) 0x444799 JNE 4447c0 |
(1006) 0x44479b MOV -0x10(%R13),%RDX |
(1006) 0x44479f CMP %RDI,(%RBX,%RDX,8) |
(1006) 0x4447a3 JNE 4447da |
(1006) 0x4447a5 MOV -0x8(%R13),%RDX |
(1006) 0x4447a9 CMP %RDI,(%RBX,%RDX,8) |
(1006) 0x4447ad JNE 4447f4 |
(1006) 0x4447af MOV (%R13),%RDX |
(1006) 0x4447b3 CMP %RDI,(%RBX,%RDX,8) |
(1006) 0x4447b7 JE 444780 |
(1006) 0x4447b9 JMP 444812 |
(1006) 0x4447c0 INC %RAX |
(1006) 0x4447c3 MOV -0x58(%RBP),%R12 |
(1006) 0x4447c7 INCQ 0x8(%R12,%RDI,8) |
(1006) 0x4447cc MOV %RDI,(%RBX,%RDX,8) |
(1006) 0x4447d0 MOV -0x10(%R13),%RDX |
(1006) 0x4447d4 CMP %RDI,(%RBX,%RDX,8) |
(1006) 0x4447d8 JE 4447a5 |
(1006) 0x4447da INC %RAX |
(1006) 0x4447dd MOV -0x58(%RBP),%R12 |
(1006) 0x4447e1 INCQ 0x8(%R12,%RDI,8) |
(1006) 0x4447e6 MOV %RDI,(%RBX,%RDX,8) |
(1006) 0x4447ea MOV -0x8(%R13),%RDX |
(1006) 0x4447ee CMP %RDI,(%RBX,%RDX,8) |
(1006) 0x4447f2 JE 4447af |
(1006) 0x4447f4 INC %RAX |
(1006) 0x4447f7 MOV -0x58(%RBP),%R12 |
(1006) 0x4447fb INCQ 0x8(%R12,%RDI,8) |
(1006) 0x444800 MOV %RDI,(%RBX,%RDX,8) |
(1006) 0x444804 MOV (%R13),%RDX |
(1006) 0x444808 CMP %RDI,(%RBX,%RDX,8) |
(1006) 0x44480c JE 444780 |
(1006) 0x444812 INC %RAX |
(1006) 0x444815 MOV -0x58(%RBP),%R12 |
(1006) 0x444819 INCQ 0x8(%R12,%RDI,8) |
(1006) 0x44481e MOV %RDI,(%RBX,%RDX,8) |
(1006) 0x444822 JMP 444780 |
0x444827 SHR $0x2,%R11 |
0x44482b LEA 0x18(%R10,%R9,8),%R14 |
0x444830 JMP 44484d |
(1004) 0x444840 ADD $0x20,%R14 |
(1004) 0x444844 DEC %R11 |
(1004) 0x444847 JE 444718 |
(1004) 0x44484d MOV -0x18(%R14),%R13 |
(1004) 0x444851 CMP %RDI,(%R15,%R13,8) |
(1004) 0x444855 JNE 444880 |
(1004) 0x444857 MOV -0x10(%R14),%R13 |
(1004) 0x44485b CMP %RDI,(%R15,%R13,8) |
(1004) 0x44485f JNE 44489a |
(1004) 0x444861 MOV -0x8(%R14),%R13 |
(1004) 0x444865 CMP %RDI,(%R15,%R13,8) |
(1004) 0x444869 JNE 4448b4 |
(1004) 0x44486b MOV (%R14),%R13 |
(1004) 0x44486e CMP %RDI,(%R15,%R13,8) |
(1004) 0x444872 JE 444840 |
(1004) 0x444874 JMP 4448d1 |
(1004) 0x444880 INC %RCX |
(1004) 0x444883 MOV -0x60(%RBP),%RDX |
(1004) 0x444887 INCQ 0x8(%RDX,%RDI,8) |
(1004) 0x44488c MOV %RDI,(%R15,%R13,8) |
(1004) 0x444890 MOV -0x10(%R14),%R13 |
(1004) 0x444894 CMP %RDI,(%R15,%R13,8) |
(1004) 0x444898 JE 444861 |
(1004) 0x44489a INC %RCX |
(1004) 0x44489d MOV -0x60(%RBP),%RDX |
(1004) 0x4448a1 INCQ 0x8(%RDX,%RDI,8) |
(1004) 0x4448a6 MOV %RDI,(%R15,%R13,8) |
(1004) 0x4448aa MOV -0x8(%R14),%R13 |
(1004) 0x4448ae CMP %RDI,(%R15,%R13,8) |
(1004) 0x4448b2 JE 44486b |
(1004) 0x4448b4 INC %RCX |
(1004) 0x4448b7 MOV -0x60(%RBP),%RDX |
(1004) 0x4448bb INCQ 0x8(%RDX,%RDI,8) |
(1004) 0x4448c0 MOV %RDI,(%R15,%R13,8) |
(1004) 0x4448c4 MOV (%R14),%R13 |
(1004) 0x4448c7 CMP %RDI,(%R15,%R13,8) |
(1004) 0x4448cb JE 444840 |
(1004) 0x4448d1 INC %RCX |
(1004) 0x4448d4 MOV -0x60(%RBP),%RDX |
(1004) 0x4448d8 INCQ 0x8(%RDX,%RDI,8) |
(1004) 0x4448dd MOV %RDI,(%R15,%R13,8) |
(1004) 0x4448e1 JMP 444840 |
/scratch_na/users/xoserete/qaas_runs/171-172-8218/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 917 - 970 |
-------------------------------------------------------------------------------- |
917: for (i=0; i < n_coarse; i++) |
[...] |
944: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
945: { |
946: j1 = S_diag_j[j]; |
947: if (assigned[j1] == pass-1) |
948: { |
949: j_start = P_diag_start[j1]; |
950: j_end = j_start+P_diag_i[j1+1]; |
951: for (k=j_start; k < j_end; k++) |
952: { |
953: k1 = P_diag_pass[pass-1][k]; |
954: if (P_marker[k1] != i1) |
955: { |
956: cnt_nz++; |
957: P_diag_i[i1+1]++; |
958: P_marker[k1] = i1; |
959: } |
960: } |
961: j_start = P_offd_start[j1]; |
962: j_end = j_start+P_offd_i[j1+1]; |
963: for (k=j_start; k < j_end; k++) |
964: { |
965: k1 = P_offd_pass[pass-1][k]; |
966: if (P_marker_offd[k1] != i1) |
967: { |
968: cnt_nz_offd++; |
969: P_offd_i[i1+1]++; |
970: P_marker_offd[k1] = i1; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.60 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source | par_multi_interp.c:917-917,par_multi_interp.c:944-953,par_multi_interp.c:958-958,par_multi_interp.c:961-965,par_multi_interp.c:970-970 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 11.17 |
CQA cycles if no scalar integer | 11.17 |
CQA cycles if FP arith vectorized | 11.17 |
CQA cycles if fully vectorized | 1.40 |
Front-end cycles | 11.17 |
DIV/SQRT cycles | 6.40 |
P0 cycles | 6.40 |
P1 cycles | 7.00 |
P2 cycles | 7.00 |
P3 cycles | 1.00 |
P4 cycles | 6.40 |
P5 cycles | 6.40 |
P6 cycles | 1.00 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 6.40 |
P10 cycles | 7.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 11.38 |
Stall cycles (UFS) | 0.00 |
Nb insns | 65.00 |
Nb uops | 65.00 |
Nb loads | 21.00 |
Nb stores | 2.00 |
Nb stack references | 11.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 16.48 |
Bytes prefetched | 0.00 |
Bytes loaded | 168.00 |
Bytes stored | 16.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.60 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source | par_multi_interp.c:917-917,par_multi_interp.c:944-953,par_multi_interp.c:958-958,par_multi_interp.c:961-965,par_multi_interp.c:970-970 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 11.17 |
CQA cycles if no scalar integer | 11.17 |
CQA cycles if FP arith vectorized | 11.17 |
CQA cycles if fully vectorized | 1.40 |
Front-end cycles | 11.17 |
DIV/SQRT cycles | 6.40 |
P0 cycles | 6.40 |
P1 cycles | 7.00 |
P2 cycles | 7.00 |
P3 cycles | 1.00 |
P4 cycles | 6.40 |
P5 cycles | 6.40 |
P6 cycles | 1.00 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 6.40 |
P10 cycles | 7.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 11.38 |
Stall cycles (UFS) | 0.00 |
Nb insns | 65.00 |
Nb uops | 65.00 |
Nb loads | 21.00 |
Nb stores | 2.00 |
Nb stack references | 11.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 16.48 |
Bytes prefetched | 0.00 |
Bytes loaded | 168.00 |
Bytes stored | 16.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source file and lines | par_multi_interp.c:917-970 |
Module | exec |
nb instructions | 65 |
nb uops | 65 |
loop length | 264 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 11 |
micro-operation queue | 11.17 cycles |
front end | 11.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 6.40 | 6.40 | 7.00 | 7.00 | 1.00 | 6.40 | 6.40 | 1.00 | 1.00 | 1.00 | 6.40 | 7.00 |
cycles | 6.40 | 6.40 | 7.00 | 7.00 | 1.00 | 6.40 | 6.40 | 1.00 | 1.00 | 1.00 | 6.40 | 7.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 11.38 |
Stall cycles | 0.00 |
Front-end | 11.17 |
Dispatch | 7.00 |
Overall L1 | 11.17 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xa8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP 0x8(%RDX,%RDI,8),%R8 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 4448f0 <hypre_BoomerAMGBuildMultipass.extracted.34+0x5b0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x128(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R8,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x118(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R10,(%RDX,%R9,8) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 444614 <hypre_BoomerAMGBuildMultipass.extracted.34+0x2d4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDX,%R9,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RSI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 4446d0 <hypre_BoomerAMGBuildMultipass.extracted.34+0x390> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x90(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R9,8),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R10,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x40(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RDX,%R12,8),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%R10),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVLE %RDX,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R10,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 444768 <hypre_BoomerAMGBuildMultipass.extracted.34+0x428> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x30(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R14,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4446d0 <hypre_BoomerAMGBuildMultipass.extracted.34+0x390> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RDX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4446a8 <hypre_BoomerAMGBuildMultipass.extracted.34+0x368> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x60(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDX,%R9,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RSI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 444610 <hypre_BoomerAMGBuildMultipass.extracted.34+0x2d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x98(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R9,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R9,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RDX,%R12,8),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%R9),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVLE %RDX,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSI,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R9,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x4,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R11,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 444827 <hypre_BoomerAMGBuildMultipass.extracted.34+0x4e7> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RDX,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 444610 <hypre_BoomerAMGBuildMultipass.extracted.34+0x2d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %R11,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 44474c <hypre_BoomerAMGBuildMultipass.extracted.34+0x40c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %RDX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%R14 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(%R11,%R10,8),%R13 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JMP 444791 <hypre_BoomerAMGBuildMultipass.extracted.34+0x451> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
SHR $0x2,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(%R10,%R9,8),%R14 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JMP 44484d <hypre_BoomerAMGBuildMultipass.extracted.34+0x50d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source file and lines | par_multi_interp.c:917-970 |
Module | exec |
nb instructions | 65 |
nb uops | 65 |
loop length | 264 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 11 |
micro-operation queue | 11.17 cycles |
front end | 11.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 6.40 | 6.40 | 7.00 | 7.00 | 1.00 | 6.40 | 6.40 | 1.00 | 1.00 | 1.00 | 6.40 | 7.00 |
cycles | 6.40 | 6.40 | 7.00 | 7.00 | 1.00 | 6.40 | 6.40 | 1.00 | 1.00 | 1.00 | 6.40 | 7.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 11.38 |
Stall cycles | 0.00 |
Front-end | 11.17 |
Dispatch | 7.00 |
Overall L1 | 11.17 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xa8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP 0x8(%RDX,%RDI,8),%R8 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 4448f0 <hypre_BoomerAMGBuildMultipass.extracted.34+0x5b0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x128(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R8,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x118(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R10,(%RDX,%R9,8) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 444614 <hypre_BoomerAMGBuildMultipass.extracted.34+0x2d4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDX,%R9,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RSI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 4446d0 <hypre_BoomerAMGBuildMultipass.extracted.34+0x390> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x90(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R9,8),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R10,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x40(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RDX,%R12,8),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%R10),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVLE %RDX,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R10,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 444768 <hypre_BoomerAMGBuildMultipass.extracted.34+0x428> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x30(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R14,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4446d0 <hypre_BoomerAMGBuildMultipass.extracted.34+0x390> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RDX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4446a8 <hypre_BoomerAMGBuildMultipass.extracted.34+0x368> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x60(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDX,%R9,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RSI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 444610 <hypre_BoomerAMGBuildMultipass.extracted.34+0x2d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x98(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R9,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R9,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RDX,%R12,8),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%R9),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVLE %RDX,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSI,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R9,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x4,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R11,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 444827 <hypre_BoomerAMGBuildMultipass.extracted.34+0x4e7> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RDX,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 444610 <hypre_BoomerAMGBuildMultipass.extracted.34+0x2d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %R11,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 44474c <hypre_BoomerAMGBuildMultipass.extracted.34+0x40c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %RDX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%R14 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(%R11,%R10,8),%R13 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JMP 444791 <hypre_BoomerAMGBuildMultipass.extracted.34+0x451> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
SHR $0x2,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(%R10,%R9,8),%R14 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JMP 44484d <hypre_BoomerAMGBuildMultipass.extracted.34+0x50d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |