Loop Id: 2246 | Module: exec | Source: par_strength.c:1714-1797 [...] | Coverage: 0.01% |
---|
Loop Id: 2246 | Module: exec | Source: par_strength.c:1714-1797 [...] | Coverage: 0.01% |
---|
0x481100 INC %RDX |
0x481103 MOV %R10,%RSI |
0x481106 MOV %R8,%RDI |
0x481109 CMP -0x98(%RBP),%RDX |
0x481110 JE 481a0d |
0x481116 MOV 0xa0(%RBP),%RAX |
0x48111d MOV (%RAX,%RDX,8),%RCX |
0x481121 MOV 0x28(%RBP),%RAX |
0x481125 MOV %RSI,(%RAX,%RDX,8) |
0x481129 MOV 0x48(%RBP),%RAX |
0x48112d CMPQ $0,(%RAX) |
0x481131 JE 48113b |
0x481133 MOV 0x38(%RBP),%RAX |
0x481137 MOV %RDI,(%RAX,%RDX,8) |
0x48113b MOV -0x48(%RBP),%RAX |
0x48113f MOV (%RAX,%RCX,8),%R11 |
0x481143 MOV %RDI,%R8 |
0x481146 MOV %RSI,%R10 |
0x481149 CMP 0x8(%RAX,%RCX,8),%R11 |
0x48114e MOV %RCX,-0x78(%RBP) |
0x481152 JGE 481280 |
0x481158 MOV %RDI,%R8 |
0x48115b MOV %RSI,%R10 |
0x48115e JMP 481176 |
(2250) 0x481160 INC %R11 |
(2250) 0x481163 MOV -0x48(%RBP),%RAX |
(2250) 0x481167 MOV -0x78(%RBP),%RCX |
(2250) 0x48116b CMP 0x8(%RAX,%RCX,8),%R11 |
(2250) 0x481170 JGE 481280 |
(2250) 0x481176 MOV -0xa0(%RBP),%RAX |
(2250) 0x48117d MOV (%RAX,%R11,8),%RBX |
(2250) 0x481181 MOV -0x68(%RBP),%RAX |
(2250) 0x481185 CMPQ $0,(%RAX,%RBX,8) |
(2250) 0x48118a JLE 4811a8 |
(2250) 0x48118c MOV 0x78(%RBP),%RAX |
(2250) 0x481190 MOV (%RAX),%RAX |
(2250) 0x481193 MOV (%RAX,%RBX,8),%R9 |
(2250) 0x481197 CMP %RSI,(%R12,%R9,8) |
(2250) 0x48119b JGE 4811a8 |
(2250) 0x48119d MOV %R10,(%R12,%R9,8) |
(2250) 0x4811a1 INC %R10 |
(2250) 0x4811a4 MOV %R10,-0x30(%RBP) |
(2250) 0x4811a8 MOV -0x48(%RBP),%RAX |
(2250) 0x4811ac MOV (%RAX,%RBX,8),%R14 |
(2250) 0x4811b0 MOV 0x8(%RAX,%RBX,8),%R13 |
(2250) 0x4811b5 JMP 4811c3 |
(2252) 0x4811c0 INC %R14 |
(2252) 0x4811c3 CMP %R13,%R14 |
(2252) 0x4811c6 JGE 481210 |
(2252) 0x4811c8 MOV -0xa0(%RBP),%RAX |
(2252) 0x4811cf MOV (%RAX,%R14,8),%R9 |
(2252) 0x4811d3 MOV -0x68(%RBP),%RAX |
(2252) 0x4811d7 CMPQ $0,(%RAX,%R9,8) |
(2252) 0x4811dc JLE 4811c0 |
(2252) 0x4811de MOV 0x78(%RBP),%RAX |
(2252) 0x4811e2 MOV (%RAX),%RAX |
(2252) 0x4811e5 MOV (%RAX,%R9,8),%R9 |
(2252) 0x4811e9 CMP %RDX,%R9 |
(2252) 0x4811ec JE 4811c0 |
(2252) 0x4811ee CMP %RSI,(%R12,%R9,8) |
(2252) 0x4811f2 JGE 4811c0 |
(2252) 0x4811f4 MOV %R10,(%R12,%R9,8) |
(2252) 0x4811f8 INC %R10 |
(2252) 0x4811fb MOV %R10,-0x30(%RBP) |
(2252) 0x4811ff MOV -0x48(%RBP),%RAX |
(2252) 0x481203 MOV 0x8(%RAX,%RBX,8),%R13 |
(2252) 0x481208 JMP 4811c0 |
(2250) 0x481210 MOV -0x40(%RBP),%RAX |
(2250) 0x481214 MOV (%RAX,%RBX,8),%R14 |
(2250) 0x481218 MOV 0x8(%RAX,%RBX,8),%R9 |
(2250) 0x48121d CMP %R9,%R14 |
(2250) 0x481220 JGE 481160 |
(2250) 0x481226 MOV 0x70(%RBP),%RAX |
(2250) 0x48122a MOV (%RAX),%R13 |
(2250) 0x48122d JMP 48123c |
(2251) 0x481230 INC %R14 |
(2251) 0x481233 CMP %R9,%R14 |
(2251) 0x481236 JGE 481160 |
(2251) 0x48123c MOV 0x18(%RBP),%RAX |
(2251) 0x481240 MOV (%RAX,%R14,8),%RAX |
(2251) 0x481244 CMPQ $0,(%R13,%RAX,8) |
(2251) 0x48124a JLE 481230 |
(2251) 0x48124c MOV 0x80(%RBP),%RCX |
(2251) 0x481253 MOV (%RCX,%RAX,8),%RAX |
(2251) 0x481257 CMP %RDI,(%R15,%RAX,8) |
(2251) 0x48125b JGE 481230 |
(2251) 0x48125d MOV %R8,(%R15,%RAX,8) |
(2251) 0x481261 INC %R8 |
(2251) 0x481264 MOV %R8,-0x38(%RBP) |
(2251) 0x481268 MOV -0x40(%RBP),%RAX |
(2251) 0x48126c MOV 0x8(%RAX,%RBX,8),%R9 |
(2251) 0x481271 JMP 481230 |
0x481280 MOV -0x40(%RBP),%RAX |
0x481284 MOV (%RAX,%RCX,8),%R11 |
0x481288 CMP 0x8(%RAX,%RCX,8),%R11 |
0x48128d JGE 481100 |
0x481293 MOV 0x70(%RBP),%RAX |
0x481297 MOV (%RAX),%RAX |
0x48129a MOV %RAX,-0x70(%RBP) |
0x48129e JMP 4812b6 |
(2247) 0x4812a0 MOV -0x78(%RBP),%RCX |
(2247) 0x4812a4 INC %R11 |
(2247) 0x4812a7 MOV -0x40(%RBP),%RAX |
(2247) 0x4812ab CMP 0x8(%RAX,%RCX,8),%R11 |
(2247) 0x4812b0 JGE 481100 |
(2247) 0x4812b6 MOV 0x18(%RBP),%RAX |
(2247) 0x4812ba MOV (%RAX,%R11,8),%R14 |
(2247) 0x4812be MOV -0x70(%RBP),%RAX |
(2247) 0x4812c2 CMPQ $0,(%RAX,%R14,8) |
(2247) 0x4812c7 JLE 4812e5 |
(2247) 0x4812c9 MOV 0x80(%RBP),%RAX |
(2247) 0x4812d0 MOV (%RAX,%R14,8),%RAX |
(2247) 0x4812d4 CMP %RDI,(%R15,%RAX,8) |
(2247) 0x4812d8 JGE 4812e5 |
(2247) 0x4812da MOV %R8,(%R15,%RAX,8) |
(2247) 0x4812de INC %R8 |
(2247) 0x4812e1 MOV %R8,-0x38(%RBP) |
(2247) 0x4812e5 MOV 0x50(%RBP),%RAX |
(2247) 0x4812e9 MOV (%RAX,%R14,8),%R13 |
(2247) 0x4812ed MOV 0x8(%RAX,%R14,8),%RBX |
(2247) 0x4812f2 JMP 481303 |
(2249) 0x481300 INC %R13 |
(2249) 0x481303 CMP %RBX,%R13 |
(2249) 0x481306 JGE 481340 |
(2249) 0x481308 MOV 0x58(%RBP),%RAX |
(2249) 0x48130c MOV (%RAX,%R13,8),%R9 |
(2249) 0x481310 CMP %RDX,%R9 |
(2249) 0x481313 JE 481300 |
(2249) 0x481315 CMP %RSI,(%R12,%R9,8) |
(2249) 0x481319 JGE 481300 |
(2249) 0x48131b MOV %R10,(%R12,%R9,8) |
(2249) 0x48131f INC %R10 |
(2249) 0x481322 MOV %R10,-0x30(%RBP) |
(2249) 0x481326 MOV 0x50(%RBP),%RAX |
(2249) 0x48132a MOV 0x8(%RAX,%R14,8),%RBX |
(2249) 0x48132f JMP 481300 |
(2247) 0x481340 MOV 0x60(%RBP),%RAX |
(2247) 0x481344 MOV (%RAX,%R14,8),%RBX |
(2247) 0x481348 MOV 0x8(%RAX,%R14,8),%R9 |
(2247) 0x48134d CMP %R9,%RBX |
(2247) 0x481350 JGE 4812a0 |
(2247) 0x481356 MOV -0x78(%RBP),%RCX |
(2247) 0x48135a JMP 48136c |
(2248) 0x481360 INC %RBX |
(2248) 0x481363 CMP %R9,%RBX |
(2248) 0x481366 JGE 4812a4 |
(2248) 0x48136c MOV 0x68(%RBP),%RAX |
(2248) 0x481370 MOV (%RAX,%RBX,8),%RAX |
(2248) 0x481374 CMP %RDI,(%R15,%RAX,8) |
(2248) 0x481378 JGE 481360 |
(2248) 0x48137a MOV %R8,(%R15,%RAX,8) |
(2248) 0x48137e INC %R8 |
(2248) 0x481381 MOV %R8,-0x38(%RBP) |
(2248) 0x481385 MOV 0x60(%RBP),%RAX |
(2248) 0x481389 MOV 0x8(%RAX,%R14,8),%R9 |
(2248) 0x48138e JMP 481360 |
/home/eoseret/qaas_runs_CPU_9468/171-586-9096/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c: 1714 - 1797 |
-------------------------------------------------------------------------------- |
1714: for (ic = ic_begin; ic < ic_end; ic++) |
[...] |
1720: HYPRE_Int i1 = coarse_to_fine[ic]; |
1721: |
1722: HYPRE_Int jj_row_begin_diag = num_nonzeros_diag; |
1723: HYPRE_Int jj_row_begin_offd = num_nonzeros_offd; |
1724: |
1725: C_diag_i[ic] = num_nonzeros_diag; |
1726: if (num_cols_offd_C) |
1727: { |
1728: C_offd_i[ic] = num_nonzeros_offd; |
1729: } |
1730: |
1731: for (jj1 = S_diag_i[i1]; jj1 < S_diag_i[i1+1]; jj1++) |
1732: { |
1733: i2 = S_diag_j[jj1]; |
1734: if (CF_marker[i2] > 0) |
1735: { |
1736: index = fine_to_coarse[i2]; |
1737: if (S_marker[index] < jj_row_begin_diag) |
1738: { |
1739: S_marker[index] = num_nonzeros_diag; |
1740: num_nonzeros_diag++; |
1741: } |
1742: } |
1743: for (jj2 = S_diag_i[i2]; jj2 < S_diag_i[i2+1]; jj2++) |
1744: { |
1745: i3 = S_diag_j[jj2]; |
1746: if (CF_marker[i3] > 0) |
1747: { |
1748: index = fine_to_coarse[i3]; |
1749: if (index != ic && S_marker[index] < jj_row_begin_diag) |
1750: { |
1751: S_marker[index] = num_nonzeros_diag; |
1752: num_nonzeros_diag++; |
1753: } |
1754: } |
1755: } |
1756: for (jj2 = S_offd_i[i2]; jj2 < S_offd_i[i2+1]; jj2++) |
1757: { |
1758: i3 = S_offd_j[jj2]; |
1759: if (CF_marker_offd[i3] > 0) |
1760: { |
1761: index = map_S_to_C[i3]; |
1762: if (S_marker_offd[index] < jj_row_begin_offd) |
1763: { |
1764: S_marker_offd[index] = num_nonzeros_offd; |
1765: num_nonzeros_offd++; |
1766: } |
1767: } |
1768: } |
1769: } |
1770: for (jj1 = S_offd_i[i1]; jj1 < S_offd_i[i1+1]; jj1++) |
1771: { |
1772: i2 = S_offd_j[jj1]; |
1773: if (CF_marker_offd[i2] > 0) |
1774: { |
1775: index = map_S_to_C[i2]; |
1776: if (S_marker_offd[index] < jj_row_begin_offd) |
1777: { |
1778: S_marker_offd[index] = num_nonzeros_offd; |
1779: num_nonzeros_offd++; |
1780: } |
1781: } |
1782: for (jj2 = S_ext_diag_i[i2]; jj2 < S_ext_diag_i[i2+1]; jj2++) |
1783: { |
1784: i3 = S_ext_diag_j[jj2]; |
1785: if (i3 != ic && S_marker[i3] < jj_row_begin_diag) |
1786: { |
1787: S_marker[i3] = num_nonzeros_diag; |
1788: num_nonzeros_diag++; |
1789: } |
1790: } |
1791: for (jj2 = S_ext_offd_i[i2]; jj2 < S_ext_offd_i[i2+1]; jj2++) |
1792: { |
1793: i3 = S_ext_offd_j[jj2]; |
1794: if (S_marker_offd[i3] < jj_row_begin_offd) |
1795: { |
1796: S_marker_offd[i3] = num_nonzeros_offd; |
1797: num_nonzeros_offd++; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.13 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGCreate2ndS.extracted.17 |
Source | par_strength.c:1714-1714,par_strength.c:1720-1720,par_strength.c:1725-1728,par_strength.c:1731-1731,par_strength.c:1756-1756,par_strength.c:1770-1770,par_strength.c:1773-1773 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 5.67 |
CQA cycles if no scalar integer | 5.67 |
CQA cycles if FP arith vectorized | 5.67 |
CQA cycles if fully vectorized | 0.71 |
Front-end cycles | 5.67 |
DIV/SQRT cycles | 2.00 |
P0 cycles | 1.40 |
P1 cycles | 5.00 |
P2 cycles | 5.00 |
P3 cycles | 2.00 |
P4 cycles | 1.40 |
P5 cycles | 2.00 |
P6 cycles | 2.00 |
P7 cycles | 2.00 |
P8 cycles | 2.00 |
P9 cycles | 1.20 |
P10 cycles | 5.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 6.32 |
Stall cycles (UFS) | 0.47 |
Nb insns | 32.00 |
Nb uops | 32.00 |
Nb loads | 15.00 |
Nb stores | 4.00 |
Nb stack references | 10.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 26.82 |
Bytes prefetched | 0.00 |
Bytes loaded | 120.00 |
Bytes stored | 32.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.13 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGCreate2ndS.extracted.17 |
Source | par_strength.c:1714-1714,par_strength.c:1720-1720,par_strength.c:1725-1728,par_strength.c:1731-1731,par_strength.c:1756-1756,par_strength.c:1770-1770,par_strength.c:1773-1773 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 5.67 |
CQA cycles if no scalar integer | 5.67 |
CQA cycles if FP arith vectorized | 5.67 |
CQA cycles if fully vectorized | 0.71 |
Front-end cycles | 5.67 |
DIV/SQRT cycles | 2.00 |
P0 cycles | 1.40 |
P1 cycles | 5.00 |
P2 cycles | 5.00 |
P3 cycles | 2.00 |
P4 cycles | 1.40 |
P5 cycles | 2.00 |
P6 cycles | 2.00 |
P7 cycles | 2.00 |
P8 cycles | 2.00 |
P9 cycles | 1.20 |
P10 cycles | 5.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 6.32 |
Stall cycles (UFS) | 0.47 |
Nb insns | 32.00 |
Nb uops | 32.00 |
Nb loads | 15.00 |
Nb stores | 4.00 |
Nb stack references | 10.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 26.82 |
Bytes prefetched | 0.00 |
Bytes loaded | 120.00 |
Bytes stored | 32.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | hypre_BoomerAMGCreate2ndS.extracted.17 |
Source file and lines | par_strength.c:1714-1797 |
Module | exec |
nb instructions | 32 |
nb uops | 32 |
loop length | 128 |
used x86 registers | 9 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 10 |
micro-operation queue | 5.67 cycles |
front end | 5.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.00 | 1.40 | 5.00 | 5.00 | 2.00 | 1.40 | 2.00 | 2.00 | 2.00 | 2.00 | 1.20 | 5.00 |
cycles | 2.00 | 1.40 | 5.00 | 5.00 | 2.00 | 1.40 | 2.00 | 2.00 | 2.00 | 2.00 | 1.20 | 5.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 6.32 |
Stall cycles | 0.47 |
LM full (events) | 1.47 |
Front-end | 5.67 |
Dispatch | 5.00 |
Overall L1 | 5.67 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
INC %RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R10,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP -0x98(%RBP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 481a0d <hypre_BoomerAMGCreate2ndS.extracted.17+0xadd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RDX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,(%RAX,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0,(%RAX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 48113b <hypre_BoomerAMGCreate2ndS.extracted.17+0x20b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,(%RAX,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RSI,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP 0x8(%RAX,%RCX,8),%R11 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JGE 481280 <hypre_BoomerAMGCreate2ndS.extracted.17+0x350> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDI,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RSI,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 481176 <hypre_BoomerAMGCreate2ndS.extracted.17+0x246> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP 0x8(%RAX,%RCX,8),%R11 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 481100 <hypre_BoomerAMGCreate2ndS.extracted.17+0x1d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 4812b6 <hypre_BoomerAMGCreate2ndS.extracted.17+0x386> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
Function | hypre_BoomerAMGCreate2ndS.extracted.17 |
Source file and lines | par_strength.c:1714-1797 |
Module | exec |
nb instructions | 32 |
nb uops | 32 |
loop length | 128 |
used x86 registers | 9 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 10 |
micro-operation queue | 5.67 cycles |
front end | 5.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.00 | 1.40 | 5.00 | 5.00 | 2.00 | 1.40 | 2.00 | 2.00 | 2.00 | 2.00 | 1.20 | 5.00 |
cycles | 2.00 | 1.40 | 5.00 | 5.00 | 2.00 | 1.40 | 2.00 | 2.00 | 2.00 | 2.00 | 1.20 | 5.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 6.32 |
Stall cycles | 0.47 |
LM full (events) | 1.47 |
Front-end | 5.67 |
Dispatch | 5.00 |
Overall L1 | 5.67 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
INC %RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R10,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP -0x98(%RBP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 481a0d <hypre_BoomerAMGCreate2ndS.extracted.17+0xadd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RDX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,(%RAX,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0,(%RAX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 48113b <hypre_BoomerAMGCreate2ndS.extracted.17+0x20b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,(%RAX,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RSI,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP 0x8(%RAX,%RCX,8),%R11 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JGE 481280 <hypre_BoomerAMGCreate2ndS.extracted.17+0x350> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDI,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RSI,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 481176 <hypre_BoomerAMGCreate2ndS.extracted.17+0x246> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP 0x8(%RAX,%RCX,8),%R11 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 481100 <hypre_BoomerAMGCreate2ndS.extracted.17+0x1d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 4812b6 <hypre_BoomerAMGCreate2ndS.extracted.17+0x386> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |