Loop Id: 1133 | Module: exec | Source: par_lr_interp.c:1221-1675 [...] | Coverage: 0.05% |
---|
Loop Id: 1133 | Module: exec | Source: par_lr_interp.c:1221-1675 [...] | Coverage: 0.05% |
---|
0x44fe10 MOV (%RBX),%RCX |
0x44fe13 VMOVSD (%RCX,%RAX,8),%XMM10 |
0x44fe18 MOV -0x90(%RBP),%RDX |
0x44fe1f VADDSD (%RDX,%R11,8),%XMM10,%XMM10 |
0x44fe25 VMOVSD %XMM10,(%RCX,%RAX,8) |
0x44fe2a INC %R11 |
0x44fe2d CMP %R15,%R11 |
0x44fe30 JE 4504f8 |
0x44fe36 MOV -0x160(%RBP),%RAX |
0x44fe3d MOV (%RAX,%R11,8),%RCX |
0x44fe41 MOV (%R13,%RCX,8),%RAX |
0x44fe46 CMP %R8,%RAX |
0x44fe49 JGE 44fe10 |
0x44fe4b CMP -0x60(%RBP),%RAX |
0x44fe4f JNE 450220 |
0x44fe55 MOV %RCX,%RSI |
0x44fe58 MOV -0x198(%RBP),%RCX |
0x44fe5f MOV (%RCX,%RSI,8),%RDI |
0x44fe63 VPXOR %XMM10,%XMM10,%XMM10 |
0x44fe68 XOR %EAX,%EAX |
0x44fe6a MOV -0x90(%RBP),%RDX |
0x44fe71 VUCOMISD (%RDX,%RDI,8),%XMM10 |
0x44fe76 SETBE %AL |
0x44fe79 MOV %RSI,-0xe0(%RBP) |
0x44fe80 MOV 0x8(%RCX,%RSI,8),%RCX |
0x44fe85 LEA -0x1(,%RAX,2),%RAX |
0x44fe8d MOV %RAX,-0xa0(%RBP) |
0x44fe94 LEA 0x1(%RDI),%RSI |
0x44fe98 CMP %RCX,%RSI |
0x44fe9b JGE 450010 |
0x44fea1 VCVTSI2SDL -0xa0(%RBP),%XMM0,%XMM11 |
0x44fea9 MOV %RDI,%RDX |
0x44feac NOT %RDX |
0x44feaf ADD %RCX,%RDX |
0x44feb2 MOV %RDX,%RAX |
0x44feb5 AND $-0x4,%RAX |
0x44feb9 JE 45030e |
0x44febf MOV %RDI,%R8 |
0x44fec2 MOV %RAX,-0xf8(%RBP) |
0x44fec9 LEA -0x1(%RAX),%RDI |
0x44fecd VBROADCASTSD %XMM11,%YMM10 |
0x44fed2 MOV -0x178(%RBP),%RAX |
0x44fed9 LEA (%RAX,%R8,8),%R14 |
0x44fedd MOV -0x170(%RBP),%RAX |
0x44fee4 MOV %R8,-0xd8(%RBP) |
0x44feeb LEA (%RAX,%R8,8),%RAX |
0x44feef VXORPD %XMM13,%XMM13,%XMM13 |
0x44fef4 VXORPD %XMM12,%XMM12,%XMM12 |
0x44fef9 XOR %R8D,%R8D |
0x44fefc NOPL (%RAX) |
(1140) 0x44ff00 MOV (%RAX,%R8,8),%R10 |
(1140) 0x44ff04 MOV 0x8(%RAX,%R8,8),%RBX |
(1140) 0x44ff09 MOV 0x10(%RAX,%R8,8),%R15 |
(1140) 0x44ff0e MOV 0x18(%RAX,%R8,8),%R12 |
(1140) 0x44ff13 VMOVQ (%R13,%R12,8),%XMM14 |
(1140) 0x44ff1a VMOVQ (%R13,%R15,8),%XMM15 |
(1140) 0x44ff21 VPUNPCKLQDQ %XMM14,%XMM15,%XMM14 |
(1140) 0x44ff26 VMOVQ (%R13,%RBX,8),%XMM15 |
(1140) 0x44ff2d VMOVQ (%R13,%R10,8),%XMM4 |
(1140) 0x44ff34 VPUNPCKLQDQ %XMM15,%XMM4,%XMM4 |
(1140) 0x44ff39 VINSERTI128 $0x1,%XMM14,%YMM4,%YMM4 |
(1140) 0x44ff3f VPCMPGTQ %YMM4,%YMM7,%YMM4 |
(1140) 0x44ff44 VPXOR %YMM2,%YMM4,%YMM14 |
(1140) 0x44ff48 VEXTRACTI128 $0x1,%YMM14,%XMM15 |
(1140) 0x44ff4e VPCMPEQQ (%RAX,%R8,8),%YMM8,%YMM5 |
(1140) 0x44ff54 VPACKSSDW %XMM15,%XMM14,%XMM14 |
(1140) 0x44ff59 VEXTRACTI128 $0x1,%YMM5,%XMM15 |
(1140) 0x44ff5f VPACKSSDW %XMM15,%XMM5,%XMM15 |
(1140) 0x44ff64 VPAND %YMM4,%YMM5,%YMM4 |
(1140) 0x44ff68 VEXTRACTI128 $0x1,%YMM4,%XMM5 |
(1140) 0x44ff6e VPACKSSDW %XMM5,%XMM4,%XMM4 |
(1140) 0x44ff72 VBLENDVPS %XMM4,%XMM15,%XMM14,%XMM4 |
(1140) 0x44ff78 VPMOVSXDQ %XMM4,%YMM5 |
(1140) 0x44ff7d VMASKMOVPD (%R14,%R8,8),%YMM5,%YMM5 |
(1140) 0x44ff83 VMULPD %YMM5,%YMM10,%YMM14 |
(1140) 0x44ff87 VCMPPD $0x1,%YMM13,%YMM14,%YMM14 |
(1140) 0x44ff8d VEXTRACTF128 $0x1,%YMM14,%XMM15 |
(1140) 0x44ff93 VPACKSSDW %XMM15,%XMM14,%XMM14 |
(1140) 0x44ff98 VPAND %XMM4,%XMM14,%XMM4 |
(1140) 0x44ff9c VPMOVSXDQ %XMM4,%YMM4 |
(1140) 0x44ffa1 VBLENDVPD %YMM4,%YMM5,%YMM3,%YMM4 |
(1140) 0x44ffa7 VADDPD %YMM4,%YMM12,%YMM12 |
(1140) 0x44ffab ADD $0x4,%R8 |
(1140) 0x44ffaf CMP %RDI,%R8 |
(1140) 0x44ffb2 JBE 44ff00 |
0x44ffb8 VEXTRACTF128 $0x1,%YMM12,%XMM4 |
0x44ffbe VADDPD %XMM4,%XMM12,%XMM4 |
0x44ffc2 VSHUFPD $0x1,%XMM4,%XMM4,%XMM5 |
0x44ffc7 VADDSD %XMM5,%XMM4,%XMM10 |
0x44ffcb MOV -0xf8(%RBP),%RAX |
0x44ffd2 CMP %RAX,%RDX |
0x44ffd5 MOV -0x130(%RBP),%R14 |
0x44ffdc MOV -0xd0(%RBP),%R12 |
0x44ffe3 MOV -0x138(%RBP),%RBX |
0x44ffea MOV -0x140(%RBP),%R10 |
0x44fff1 MOV -0x38(%RBP),%R8 |
0x44fff5 MOV -0x98(%RBP),%R15 |
0x44fffc MOV -0xd8(%RBP),%RDI |
0x450003 JNE 450310 |
0x450009 NOPL (%RAX) |
0x450010 MOV -0xb0(%RBP),%RAX |
0x450017 MOV (%RAX),%RAX |
0x45001a MOV %RAX,-0xd8(%RBP) |
0x450021 CMP $0x2,%RAX |
0x450025 JL 450170 |
0x45002b MOV -0x180(%RBP),%RAX |
0x450032 MOV -0xe0(%RBP),%RDX |
0x450039 MOV (%RAX,%RDX,8),%RDI |
0x45003d MOV 0x8(%RAX,%RDX,8),%RAX |
0x450042 MOV %RAX,%RDX |
0x450045 SUB %RDI,%RDX |
0x450048 JLE 450170 |
0x45004e VCVTSI2SDL -0xa0(%RBP),%XMM0,%XMM11 |
0x450056 MOV %RDX,-0xf8(%RBP) |
0x45005d AND $-0x4,%RDX |
0x450061 JE 45037f |
0x450067 MOV %RDI,%R9 |
0x45006a LEA -0x1(%RDX),%RDI |
0x45006e VBROADCASTSD %XMM11,%YMM12 |
0x450073 MOV -0x78(%RBP),%R8 |
0x450077 LEA (%R8,%R9,8),%R8 |
0x45007b MOV %R9,-0xf0(%RBP) |
0x450082 LEA (%R10,%R9,8),%R14 |
0x450086 VPXOR %XMM14,%XMM14,%XMM14 |
0x45008b VXORPD %XMM13,%XMM13,%XMM13 |
0x450090 XOR %R12D,%R12D |
0x450093 MOV -0x40(%RBP),%R13 |
0x450097 NOPW (%RAX,%RAX,1) |
(1138) 0x4500a0 MOV (%R14,%R12,8),%R10 |
(1138) 0x4500a4 MOV 0x8(%R14,%R12,8),%RBX |
(1138) 0x4500a9 MOV 0x10(%R14,%R12,8),%R15 |
(1138) 0x4500ae MOV 0x18(%R14,%R12,8),%R9 |
(1138) 0x4500b3 VMOVQ (%R13,%R9,8),%XMM4 |
(1138) 0x4500ba VMOVQ (%R13,%R15,8),%XMM5 |
(1138) 0x4500c1 VPUNPCKLQDQ %XMM4,%XMM5,%XMM4 |
(1138) 0x4500c5 VMOVQ (%R13,%RBX,8),%XMM5 |
(1138) 0x4500cc VMOVQ (%R13,%R10,8),%XMM15 |
(1138) 0x4500d3 VPUNPCKLQDQ %XMM5,%XMM15,%XMM5 |
(1138) 0x4500d7 VINSERTI128 $0x1,%XMM4,%YMM5,%YMM4 |
(1138) 0x4500dd VPCMPGTQ %YMM4,%YMM9,%YMM4 |
(1138) 0x4500e2 VPXOR %YMM2,%YMM4,%YMM5 |
(1138) 0x4500e6 VMASKMOVPD (%R8,%R12,8),%YMM5,%YMM5 |
(1138) 0x4500ec VMULPD %YMM5,%YMM12,%YMM15 |
(1138) 0x4500f0 VCMPPD $0x1,%YMM14,%YMM15,%YMM15 |
(1138) 0x4500f6 VPANDN %YMM15,%YMM4,%YMM4 |
(1138) 0x4500fb VBLENDVPD %YMM4,%YMM5,%YMM3,%YMM4 |
(1138) 0x450101 VADDPD %YMM4,%YMM13,%YMM13 |
(1138) 0x450105 ADD $0x4,%R12 |
(1138) 0x450109 CMP %RDI,%R12 |
(1138) 0x45010c JBE 4500a0 |
0x45010e VEXTRACTF128 $0x1,%YMM13,%XMM4 |
0x450114 VADDPD %XMM4,%XMM13,%XMM4 |
0x450118 VSHUFPD $0x1,%XMM4,%XMM4,%XMM5 |
0x45011d VADDSD %XMM5,%XMM4,%XMM4 |
0x450121 VADDSD %XMM4,%XMM10,%XMM10 |
0x450125 CMP %RDX,-0xf8(%RBP) |
0x45012c MOV -0x130(%RBP),%R14 |
0x450133 MOV -0xd0(%RBP),%R12 |
0x45013a MOV -0x138(%RBP),%RBX |
0x450141 MOV -0x140(%RBP),%R10 |
0x450148 MOV -0x128(%RBP),%R13 |
0x45014f MOV -0x80(%RBP),%R9 |
0x450153 MOV -0x38(%RBP),%R8 |
0x450157 MOV -0x98(%RBP),%R15 |
0x45015e MOV -0xf0(%RBP),%RDI |
0x450165 JNE 450381 |
0x45016b NOPL (%RAX,%RAX,1) |
0x450170 VUCOMISD %XMM0,%XMM10 |
0x450174 MOV -0x90(%RBP),%RAX |
0x45017b VMOVSD (%RAX,%R11,8),%XMM11 |
0x450181 JE 450301 |
0x450187 VDIVSD %XMM10,%XMM11,%XMM10 |
0x45018c CMP %RCX,%RSI |
0x45018f JGE 45025f |
0x450195 VCVTSI2SDL -0xa0(%RBP),%XMM0,%XMM11 |
0x45019d JMP 4501ac |
(1136) 0x4501a0 INC %RSI |
(1136) 0x4501a3 CMP %RSI,%RCX |
(1136) 0x4501a6 JE 45025f |
(1136) 0x4501ac MOV -0x160(%RBP),%RAX |
(1136) 0x4501b3 MOV (%RAX,%RSI,8),%RAX |
(1136) 0x4501b7 MOV (%R13,%RAX,8),%RDX |
(1136) 0x4501bc CMP %R8,%RDX |
(1136) 0x4501bf JL 4501e6 |
(1136) 0x4501c1 MOV -0x90(%RBP),%RDI |
(1136) 0x4501c8 VMOVSD (%RDI,%RSI,8),%XMM12 |
(1136) 0x4501cd VMULSD %XMM11,%XMM12,%XMM13 |
(1136) 0x4501d2 VUCOMISD %XMM0,%XMM13 |
(1136) 0x4501d6 JAE 4501e6 |
(1136) 0x4501d8 MOV (%RBX),%RDI |
(1136) 0x4501db VFMADD213SD (%RDI,%RDX,8),%XMM10,%XMM12 |
(1136) 0x4501e1 VMOVSD %XMM12,(%RDI,%RDX,8) |
(1136) 0x4501e6 CMP -0x30(%RBP),%RAX |
(1136) 0x4501ea JNE 4501a0 |
(1136) 0x4501ec MOV -0x90(%RBP),%RAX |
(1136) 0x4501f3 VMOVSD (%RAX,%RSI,8),%XMM12 |
(1136) 0x4501f8 VMULSD %XMM11,%XMM12,%XMM13 |
(1136) 0x4501fd VMULSD %XMM10,%XMM12,%XMM12 |
(1136) 0x450202 VCMPSD $0x1,%XMM0,%XMM13,%XMM13 |
(1136) 0x450207 VBLENDVPD %XMM13,%XMM12,%XMM1,%XMM12 |
(1136) 0x45020d VADDSD %XMM6,%XMM12,%XMM6 |
(1136) 0x450211 JMP 4501a0 |
0x450220 CMPQ $-0x3,(%R14,%RCX,8) |
0x450225 JE 44fe2a |
0x45022b CMPQ $0x1,-0x190(%RBP) |
0x450233 JE 45024d |
0x450235 MOV %RCX,%RDX |
0x450238 MOV -0x188(%RBP),%RCX |
0x45023f MOV (%RCX,%RSI,8),%RAX |
0x450243 CMP (%RCX,%RDX,8),%RAX |
0x450247 JNE 44fe2a |
0x45024d MOV -0x90(%RBP),%RAX |
0x450254 VADDSD (%RAX,%R11,8),%XMM6,%XMM6 |
0x45025a JMP 44fe2a |
0x45025f CMPQ $0x2,-0xd8(%RBP) |
0x450267 JL 450305 |
0x45026d MOV -0x180(%RBP),%RAX |
0x450274 MOV -0xe0(%RBP),%RDX |
0x45027b MOV (%RAX,%RDX,8),%RCX |
0x45027f MOV 0x8(%RAX,%RDX,8),%RSI |
0x450284 MOV %RSI,%RAX |
0x450287 SUB %RCX,%RAX |
0x45028a JLE 450305 |
0x45028c VCVTSI2SDL -0xa0(%RBP),%XMM0,%XMM11 |
0x450294 CMP $0x4,%RAX |
0x450298 JAE 4503cc |
0x45029e MOV %RAX,%RDX |
0x4502a1 AND $-0x4,%RDX |
0x4502a5 CMP %RAX,%RDX |
0x4502a8 JAE 4504e4 |
0x4502ae ADD %RDX,%RCX |
0x4502b1 MOV -0x38(%RBP),%R8 |
0x4502b5 MOV -0x98(%RBP),%R15 |
0x4502bc JMP 4502c8 |
(1134) 0x4502c0 INC %RCX |
(1134) 0x4502c3 CMP %RCX,%RSI |
(1134) 0x4502c6 JE 450305 |
(1134) 0x4502c8 MOV (%R10,%RCX,8),%RAX |
(1134) 0x4502cc MOV -0x40(%RBP),%RDX |
(1134) 0x4502d0 MOV (%RDX,%RAX,8),%RAX |
(1134) 0x4502d4 CMP %R9,%RAX |
(1134) 0x4502d7 JL 4502c0 |
(1134) 0x4502d9 MOV -0x78(%RBP),%RDX |
(1134) 0x4502dd VMOVSD (%RDX,%RCX,8),%XMM12 |
(1134) 0x4502e2 VMULSD %XMM11,%XMM12,%XMM4 |
(1134) 0x4502e7 VUCOMISD %XMM0,%XMM4 |
(1134) 0x4502eb JAE 4502c0 |
(1134) 0x4502ed MOV -0x68(%RBP),%RDX |
(1134) 0x4502f1 MOV (%RDX),%RDX |
(1134) 0x4502f4 VFMADD213SD (%RDX,%RAX,8),%XMM10,%XMM12 |
(1134) 0x4502fa VMOVSD %XMM12,(%RDX,%RAX,8) |
(1134) 0x4502ff JMP 4502c0 |
0x450301 VADDSD %XMM6,%XMM11,%XMM6 |
0x450305 MOV -0x30(%RBP),%RSI |
0x450309 JMP 44fe2a |
0x45030e XOR %EAX,%EAX |
0x450310 ADD %RDI,%RAX |
0x450313 INC %RAX |
0x450316 JMP 450330 |
(1139) 0x450320 MOV -0x38(%RBP),%R8 |
(1139) 0x450324 INC %RAX |
(1139) 0x450327 CMP %RAX,%RCX |
(1139) 0x45032a JE 450010 |
(1139) 0x450330 MOV -0x160(%RBP),%RDX |
(1139) 0x450337 MOV (%RDX,%RAX,8),%RDX |
(1139) 0x45033b XOR %EDI,%EDI |
(1139) 0x45033d CMP %R8,(%R13,%RDX,8) |
(1139) 0x450342 SETGE %DIL |
(1139) 0x450346 XOR %R8D,%R8D |
(1139) 0x450349 CMP -0x30(%RBP),%RDX |
(1139) 0x45034d SETE %R8B |
(1139) 0x450351 CMP %DIL,%R8B |
(1139) 0x450354 CMOVA %R8D,%EDI |
(1139) 0x450358 CMP $0x1,%DIL |
(1139) 0x45035c JNE 450320 |
(1139) 0x45035e MOV -0x90(%RBP),%RDX |
(1139) 0x450365 VMOVSD (%RDX,%RAX,8),%XMM4 |
(1139) 0x45036a VMULSD %XMM4,%XMM11,%XMM5 |
(1139) 0x45036e VCMPSD $0x1,%XMM0,%XMM5,%XMM5 |
(1139) 0x450373 VBLENDVPD %XMM5,%XMM4,%XMM1,%XMM4 |
(1139) 0x450379 VADDSD %XMM4,%XMM10,%XMM10 |
(1139) 0x45037d JMP 450320 |
0x45037f XOR %EDX,%EDX |
0x450381 ADD %RDI,%RDX |
0x450384 JMP 4503a0 |
(1137) 0x450390 MOV -0x38(%RBP),%R8 |
(1137) 0x450394 INC %RDX |
(1137) 0x450397 CMP %RDX,%RAX |
(1137) 0x45039a JE 450170 |
(1137) 0x4503a0 MOV (%R10,%RDX,8),%RDI |
(1137) 0x4503a4 MOV -0x40(%RBP),%R8 |
(1137) 0x4503a8 CMP %R9,(%R8,%RDI,8) |
(1137) 0x4503ac JL 450390 |
(1137) 0x4503ae MOV -0x78(%RBP),%RDI |
(1137) 0x4503b2 VMOVSD (%RDI,%RDX,8),%XMM4 |
(1137) 0x4503b7 VMULSD %XMM4,%XMM11,%XMM5 |
(1137) 0x4503bb VCMPSD $0x1,%XMM0,%XMM5,%XMM5 |
(1137) 0x4503c0 VBLENDVPD %XMM5,%XMM4,%XMM1,%XMM4 |
(1137) 0x4503c6 VADDSD %XMM4,%XMM10,%XMM10 |
(1137) 0x4503ca JMP 450390 |
0x4503cc MOV %RAX,%RDX |
0x4503cf SHR $0x2,%RDX |
0x4503d3 LEA 0x18(,%RCX,8),%R15 |
0x4503db JMP 4503ed |
(1135) 0x4503e0 ADD $0x20,%R15 |
(1135) 0x4503e4 DEC %RDX |
(1135) 0x4503e7 JE 45029e |
(1135) 0x4503ed MOV -0x18(%R10,%R15,1),%RDI |
(1135) 0x4503f2 MOV -0x40(%RBP),%R8 |
(1135) 0x4503f6 MOV (%R8,%RDI,8),%RDI |
(1135) 0x4503fa CMP %R9,%RDI |
(1135) 0x4503fd JL 450428 |
(1135) 0x4503ff MOV -0x78(%RBP),%R8 |
(1135) 0x450403 VMOVSD -0x18(%R8,%R15,1),%XMM12 |
(1135) 0x45040a VMULSD %XMM11,%XMM12,%XMM4 |
(1135) 0x45040f VUCOMISD %XMM0,%XMM4 |
(1135) 0x450413 JAE 450428 |
(1135) 0x450415 MOV -0x68(%RBP),%R8 |
(1135) 0x450419 MOV (%R8),%R8 |
(1135) 0x45041c VFMADD213SD (%R8,%RDI,8),%XMM10,%XMM12 |
(1135) 0x450422 VMOVSD %XMM12,(%R8,%RDI,8) |
(1135) 0x450428 MOV -0x10(%R10,%R15,1),%RDI |
(1135) 0x45042d MOV -0x40(%RBP),%R8 |
(1135) 0x450431 MOV (%R8,%RDI,8),%RDI |
(1135) 0x450435 CMP %R9,%RDI |
(1135) 0x450438 JL 450463 |
(1135) 0x45043a MOV -0x78(%RBP),%R8 |
(1135) 0x45043e VMOVSD -0x10(%R8,%R15,1),%XMM12 |
(1135) 0x450445 VMULSD %XMM11,%XMM12,%XMM4 |
(1135) 0x45044a VUCOMISD %XMM0,%XMM4 |
(1135) 0x45044e JAE 450463 |
(1135) 0x450450 MOV -0x68(%RBP),%R8 |
(1135) 0x450454 MOV (%R8),%R8 |
(1135) 0x450457 VFMADD213SD (%R8,%RDI,8),%XMM10,%XMM12 |
(1135) 0x45045d VMOVSD %XMM12,(%R8,%RDI,8) |
(1135) 0x450463 MOV -0x8(%R10,%R15,1),%RDI |
(1135) 0x450468 MOV -0x40(%RBP),%R8 |
(1135) 0x45046c MOV (%R8,%RDI,8),%RDI |
(1135) 0x450470 CMP %R9,%RDI |
(1135) 0x450473 JL 45049e |
(1135) 0x450475 MOV -0x78(%RBP),%R8 |
(1135) 0x450479 VMOVSD -0x8(%R8,%R15,1),%XMM12 |
(1135) 0x450480 VMULSD %XMM11,%XMM12,%XMM4 |
(1135) 0x450485 VUCOMISD %XMM0,%XMM4 |
(1135) 0x450489 JAE 45049e |
(1135) 0x45048b MOV -0x68(%RBP),%R8 |
(1135) 0x45048f MOV (%R8),%R8 |
(1135) 0x450492 VFMADD213SD (%R8,%RDI,8),%XMM10,%XMM12 |
(1135) 0x450498 VMOVSD %XMM12,(%R8,%RDI,8) |
(1135) 0x45049e MOV (%R10,%R15,1),%RDI |
(1135) 0x4504a2 MOV -0x40(%RBP),%R8 |
(1135) 0x4504a6 MOV (%R8,%RDI,8),%RDI |
(1135) 0x4504aa CMP %R9,%RDI |
(1135) 0x4504ad JL 4503e0 |
(1135) 0x4504b3 MOV -0x78(%RBP),%R8 |
(1135) 0x4504b7 VMOVSD (%R8,%R15,1),%XMM12 |
(1135) 0x4504bd VMULSD %XMM11,%XMM12,%XMM4 |
(1135) 0x4504c2 VUCOMISD %XMM0,%XMM4 |
(1135) 0x4504c6 JAE 4503e0 |
(1135) 0x4504cc MOV -0x68(%RBP),%R8 |
(1135) 0x4504d0 MOV (%R8),%R8 |
(1135) 0x4504d3 VFMADD213SD (%R8,%RDI,8),%XMM10,%XMM12 |
(1135) 0x4504d9 VMOVSD %XMM12,(%R8,%RDI,8) |
(1135) 0x4504df JMP 4503e0 |
0x4504e4 MOV -0x30(%RBP),%RSI |
0x4504e8 MOV -0x38(%RBP),%R8 |
0x4504ec MOV -0x98(%RBP),%R15 |
0x4504f3 JMP 44fe2a |
/home/eoseret/qaas_runs_CPU_9468/171-586-9096/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c: 1221 - 1675 |
-------------------------------------------------------------------------------- |
1221: if (n_fine) |
[...] |
1609: for (jj = A_diag_i[i]+1; jj < A_diag_i[i+1]; jj++) |
1610: { /* i1 is a c-point and strongly influences i, accumulate |
1611: * a_(i,i1) into interpolation weight */ |
1612: i1 = A_diag_j[jj]; |
1613: if (P_marker[i1] >= jj_begin_row) |
1614: { |
1615: P_diag_data[P_marker[i1]] += A_diag_data[jj]; |
1616: } |
1617: else if(P_marker[i1] == strong_f_marker) |
1618: { |
1619: sum = zero; |
1620: sgn = 1; |
1621: if(A_diag_data[A_diag_i[i1]] < 0) sgn = -1; |
1622: /* Loop over row of A for point i1 and calculate the sum |
1623: * of the connections to c-points that strongly influence i. */ |
1624: for(jj1 = A_diag_i[i1]+1; jj1 < A_diag_i[i1+1]; jj1++) |
1625: { |
1626: i2 = A_diag_j[jj1]; |
1627: if((P_marker[i2] >= jj_begin_row || i2 == i) && (sgn*A_diag_data[jj1]) < 0) |
1628: sum += A_diag_data[jj1]; |
1629: } |
1630: if(num_procs > 1) |
1631: { |
1632: for(jj1 = A_offd_i[i1]; jj1< A_offd_i[i1+1]; jj1++) |
1633: { |
1634: i2 = A_offd_j[jj1]; |
1635: if(P_marker_offd[i2] >= jj_begin_row_offd && |
1636: (sgn*A_offd_data[jj1]) < 0) |
1637: sum += A_offd_data[jj1]; |
1638: } |
1639: } |
1640: if(sum != 0) |
1641: { |
1642: distribute = A_diag_data[jj]/sum; |
1643: /* Loop over row of A for point i1 and do the distribution */ |
1644: for(jj1 = A_diag_i[i1]+1; jj1 < A_diag_i[i1+1]; jj1++) |
1645: { |
1646: i2 = A_diag_j[jj1]; |
1647: if(P_marker[i2] >= jj_begin_row && (sgn*A_diag_data[jj1]) < 0) |
1648: P_diag_data[P_marker[i2]] += |
1649: distribute*A_diag_data[jj1]; |
1650: if(i2 == i && (sgn*A_diag_data[jj1]) < 0) |
1651: diagonal += distribute*A_diag_data[jj1]; |
1652: } |
1653: if(num_procs > 1) |
1654: { |
1655: for(jj1 = A_offd_i[i1]; jj1 < A_offd_i[i1+1]; jj1++) |
1656: { |
1657: i2 = A_offd_j[jj1]; |
1658: if(P_marker_offd[i2] >= jj_begin_row_offd && |
1659: (sgn*A_offd_data[jj1]) < 0) |
1660: P_offd_data[P_marker_offd[i2]] += |
[...] |
1667: diagonal += A_diag_data[jj]; |
1668: } |
1669: } |
1670: /* neighbor i1 weakly influences i, accumulate a_(i,i1) into |
1671: * diagonal */ |
1672: else if (CF_marker[i1] != -3) |
1673: { |
1674: if(num_functions == 1 || dof_func[i] == dof_func[i1]) |
1675: diagonal += A_diag_data[jj]; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 2.38 |
CQA speedup if FP arith vectorized | 2.86 |
CQA speedup if fully vectorized | 11.86 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.34 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildExtPIInterp.extracted |
Source | par_lr_interp.c:1221-1221,par_lr_interp.c:1609-1609,par_lr_interp.c:1612-1617,par_lr_interp.c:1621-1621,par_lr_interp.c:1624-1624,par_lr_interp.c:1627-1627,par_lr_interp.c:1630-1632,par_lr_interp.c:1635-1636,par_lr_interp.c:1640-1644,par_lr_interp.c:1647-1647,par_lr_interp.c:1653-1655,par_lr_interp.c:1659-1660,par_lr_interp.c:1667-1667,par_lr_interp.c:1672-1675 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 29.00 |
CQA cycles if no scalar integer | 12.17 |
CQA cycles if FP arith vectorized | 10.12 |
CQA cycles if fully vectorized | 2.45 |
Front-end cycles | 29.00 |
DIV/SQRT cycles | 13.50 |
P0 cycles | 13.40 |
P1 cycles | 21.67 |
P2 cycles | 21.67 |
P3 cycles | 4.00 |
P4 cycles | 13.40 |
P5 cycles | 13.30 |
P6 cycles | 4.00 |
P7 cycles | 4.00 |
P8 cycles | 4.00 |
P9 cycles | 13.40 |
P10 cycles | 21.67 |
P11 cycles | 4.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 29.27 - 29.29 |
Stall cycles (UFS) | 0.00 |
Nb insns | 169.00 |
Nb uops | 171.00 |
Nb loads | 65.00 |
Nb stores | 8.00 |
Nb stack references | 26.00 |
FLOP/cycle | 0.38 |
Nb FLOP add-sub | 10.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 1.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 19.59 |
Bytes prefetched | 0.00 |
Bytes loaded | 504.00 |
Bytes stored | 64.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 19.30 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 25.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 28.13 |
Vector-efficiency ratio all | 14.36 |
Vector-efficiency ratio load | 11.31 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 15.63 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 15.04 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 2.38 |
CQA speedup if FP arith vectorized | 2.86 |
CQA speedup if fully vectorized | 11.86 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.34 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildExtPIInterp.extracted |
Source | par_lr_interp.c:1221-1221,par_lr_interp.c:1609-1609,par_lr_interp.c:1612-1617,par_lr_interp.c:1621-1621,par_lr_interp.c:1624-1624,par_lr_interp.c:1627-1627,par_lr_interp.c:1630-1632,par_lr_interp.c:1635-1636,par_lr_interp.c:1640-1644,par_lr_interp.c:1647-1647,par_lr_interp.c:1653-1655,par_lr_interp.c:1659-1660,par_lr_interp.c:1667-1667,par_lr_interp.c:1672-1675 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 29.00 |
CQA cycles if no scalar integer | 12.17 |
CQA cycles if FP arith vectorized | 10.12 |
CQA cycles if fully vectorized | 2.45 |
Front-end cycles | 29.00 |
DIV/SQRT cycles | 13.50 |
P0 cycles | 13.40 |
P1 cycles | 21.67 |
P2 cycles | 21.67 |
P3 cycles | 4.00 |
P4 cycles | 13.40 |
P5 cycles | 13.30 |
P6 cycles | 4.00 |
P7 cycles | 4.00 |
P8 cycles | 4.00 |
P9 cycles | 13.40 |
P10 cycles | 21.67 |
P11 cycles | 4.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 29.27 - 29.29 |
Stall cycles (UFS) | 0.00 |
Nb insns | 169.00 |
Nb uops | 171.00 |
Nb loads | 65.00 |
Nb stores | 8.00 |
Nb stack references | 26.00 |
FLOP/cycle | 0.38 |
Nb FLOP add-sub | 10.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 1.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 19.59 |
Bytes prefetched | 0.00 |
Bytes loaded | 504.00 |
Bytes stored | 64.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 19.30 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 25.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 28.13 |
Vector-efficiency ratio all | 14.36 |
Vector-efficiency ratio load | 11.31 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 15.63 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 15.04 |
Path / |
Function | hypre_BoomerAMGBuildExtPIInterp.extracted |
Source file and lines | par_lr_interp.c:1221-1675 |
Module | exec |
nb instructions | 169 |
nb uops | 171 |
loop length | 842 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 9 |
used ymm registers | 3 |
used zmm registers | 0 |
nb stack references | 26 |
micro-operation queue | 29.00 cycles |
front end | 29.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 13.50 | 13.40 | 21.67 | 21.67 | 4.00 | 13.40 | 13.30 | 4.00 | 4.00 | 4.00 | 13.40 | 21.67 |
cycles | 13.50 | 13.40 | 21.67 | 21.67 | 4.00 | 13.40 | 13.30 | 4.00 | 4.00 | 4.00 | 13.40 | 21.67 |
Cycles executing div or sqrt instructions | 4.00 |
FE+BE cycles | 29.27-29.29 |
Stall cycles | 0.00 |
Front-end | 29.00 |
Dispatch | 21.67 |
DIV/SQRT | 4.00 |
Overall L1 | 29.00 |
all | 5% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 9% |
all | 39% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 25% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 63% |
all | 19% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 25% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 28% |
all | 12% |
load | 10% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 17% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 15% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 20% |
all | 14% |
load | 11% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 15% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 15% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV (%RBX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RCX,%RAX,8),%XMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x90(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDSD (%RDX,%R11,8),%XMM10,%XMM10 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMOVSD %XMM10,(%RCX,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R15,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 4504f8 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1ab8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x160(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%R11,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R13,%RCX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 44fe10 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x13d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP -0x60(%RBP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 450220 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x17e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RCX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x198(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RSI,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPXOR %XMM10,%XMM10,%XMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x90(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VUCOMISD (%RDX,%RDI,8),%XMM10 | 2 | 1 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
SETBE %AL | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
MOV %RSI,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%RCX,%RSI,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x1(,%RAX,2),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%RDI),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 450010 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x15d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDL -0xa0(%RBP),%XMM0,%XMM11 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
MOV %RDI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOT %RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 45030e <hypre_BoomerAMGBuildExtPIInterp.extracted+0x18ce> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDI,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA -0x1(%RAX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VBROADCASTSD %XMM11,%YMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x178(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%R8,8),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x170(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RAX,%R8,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VXORPD %XMM13,%XMM13,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VXORPD %XMM12,%XMM12,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VEXTRACTF128 $0x1,%YMM12,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VADDPD %XMM4,%XMM12,%XMM4 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VSHUFPD $0x1,%XMM4,%XMM4,%XMM5 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VADDSD %XMM5,%XMM4,%XMM10 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOV -0xf8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x130(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xd0(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x138(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x140(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x98(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xd8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 450310 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x18d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x2,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 450170 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1730> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x180(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xe0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RDX,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX,%RDX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 450170 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1730> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDL -0xa0(%RBP),%XMM0,%XMM11 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
MOV %RDX,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 45037f <hypre_BoomerAMGBuildExtPIInterp.extracted+0x193f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDI,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x1(%RDX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VBROADCASTSD %XMM11,%YMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x78(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R8,%R9,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R9,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R10,%R9,8),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPXOR %XMM14,%XMM14,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VXORPD %XMM13,%XMM13,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x40(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VEXTRACTF128 $0x1,%YMM13,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VADDPD %XMM4,%XMM13,%XMM4 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VSHUFPD $0x1,%XMM4,%XMM4,%XMM5 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VADDSD %XMM5,%XMM4,%XMM4 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VADDSD %XMM4,%XMM10,%XMM10 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
CMP %RDX,-0xf8(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x130(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xd0(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x138(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x140(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x128(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x98(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xf0(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 450381 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1941> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VUCOMISD %XMM0,%XMM10 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RAX,%R11,8),%XMM11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 450301 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x18c1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VDIVSD %XMM10,%XMM11,%XMM10 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 4 |
CMP %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 45025f <hypre_BoomerAMGBuildExtPIInterp.extracted+0x181f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDL -0xa0(%RBP),%XMM0,%XMM11 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
JMP 4501ac <hypre_BoomerAMGBuildExtPIInterp.extracted+0x176c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
CMPQ $-0x3,(%R14,%RCX,8) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 44fe2a <hypre_BoomerAMGBuildExtPIInterp.extracted+0x13ea> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x1,-0x190(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 45024d <hypre_BoomerAMGBuildExtPIInterp.extracted+0x180d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RCX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x188(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RSI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP (%RCX,%RDX,8),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 44fe2a <hypre_BoomerAMGBuildExtPIInterp.extracted+0x13ea> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDSD (%RAX,%R11,8),%XMM6,%XMM6 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
JMP 44fe2a <hypre_BoomerAMGBuildExtPIInterp.extracted+0x13ea> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
CMPQ $0x2,-0xd8(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 450305 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x18c5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x180(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xe0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RDX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX,%RDX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 450305 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x18c5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDL -0xa0(%RBP),%XMM0,%XMM11 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
CMP $0x4,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4503cc <hypre_BoomerAMGBuildExtPIInterp.extracted+0x198c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RAX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4504e4 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1aa4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RDX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x38(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x98(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4502c8 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1888> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
VADDSD %XMM6,%XMM11,%XMM6 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOV -0x30(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 44fe2a <hypre_BoomerAMGBuildExtPIInterp.extracted+0x13ea> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 450330 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x18f0> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4503a0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1960> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %RAX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(,%RCX,8),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4503ed <hypre_BoomerAMGBuildExtPIInterp.extracted+0x19ad> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x30(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x98(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 44fe2a <hypre_BoomerAMGBuildExtPIInterp.extracted+0x13ea> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
Function | hypre_BoomerAMGBuildExtPIInterp.extracted |
Source file and lines | par_lr_interp.c:1221-1675 |
Module | exec |
nb instructions | 169 |
nb uops | 171 |
loop length | 842 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 9 |
used ymm registers | 3 |
used zmm registers | 0 |
nb stack references | 26 |
micro-operation queue | 29.00 cycles |
front end | 29.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 13.50 | 13.40 | 21.67 | 21.67 | 4.00 | 13.40 | 13.30 | 4.00 | 4.00 | 4.00 | 13.40 | 21.67 |
cycles | 13.50 | 13.40 | 21.67 | 21.67 | 4.00 | 13.40 | 13.30 | 4.00 | 4.00 | 4.00 | 13.40 | 21.67 |
Cycles executing div or sqrt instructions | 4.00 |
FE+BE cycles | 29.27-29.29 |
Stall cycles | 0.00 |
Front-end | 29.00 |
Dispatch | 21.67 |
DIV/SQRT | 4.00 |
Overall L1 | 29.00 |
all | 5% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 9% |
all | 39% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 25% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 63% |
all | 19% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 25% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 28% |
all | 12% |
load | 10% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 17% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 15% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 20% |
all | 14% |
load | 11% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 15% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 15% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV (%RBX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RCX,%RAX,8),%XMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x90(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDSD (%RDX,%R11,8),%XMM10,%XMM10 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMOVSD %XMM10,(%RCX,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R15,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 4504f8 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1ab8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x160(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%R11,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R13,%RCX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 44fe10 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x13d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP -0x60(%RBP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 450220 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x17e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RCX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x198(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RSI,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPXOR %XMM10,%XMM10,%XMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x90(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VUCOMISD (%RDX,%RDI,8),%XMM10 | 2 | 1 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
SETBE %AL | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
MOV %RSI,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%RCX,%RSI,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x1(,%RAX,2),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%RDI),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 450010 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x15d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDL -0xa0(%RBP),%XMM0,%XMM11 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
MOV %RDI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOT %RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 45030e <hypre_BoomerAMGBuildExtPIInterp.extracted+0x18ce> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDI,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA -0x1(%RAX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VBROADCASTSD %XMM11,%YMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x178(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%R8,8),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x170(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RAX,%R8,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VXORPD %XMM13,%XMM13,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VXORPD %XMM12,%XMM12,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VEXTRACTF128 $0x1,%YMM12,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VADDPD %XMM4,%XMM12,%XMM4 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VSHUFPD $0x1,%XMM4,%XMM4,%XMM5 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VADDSD %XMM5,%XMM4,%XMM10 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOV -0xf8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x130(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xd0(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x138(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x140(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x98(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xd8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 450310 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x18d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x2,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 450170 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1730> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x180(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xe0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RDX,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX,%RDX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 450170 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1730> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDL -0xa0(%RBP),%XMM0,%XMM11 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
MOV %RDX,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 45037f <hypre_BoomerAMGBuildExtPIInterp.extracted+0x193f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDI,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x1(%RDX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VBROADCASTSD %XMM11,%YMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x78(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R8,%R9,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R9,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R10,%R9,8),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPXOR %XMM14,%XMM14,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VXORPD %XMM13,%XMM13,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x40(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VEXTRACTF128 $0x1,%YMM13,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VADDPD %XMM4,%XMM13,%XMM4 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VSHUFPD $0x1,%XMM4,%XMM4,%XMM5 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VADDSD %XMM5,%XMM4,%XMM4 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VADDSD %XMM4,%XMM10,%XMM10 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
CMP %RDX,-0xf8(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x130(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xd0(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x138(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x140(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x128(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x98(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xf0(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 450381 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1941> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VUCOMISD %XMM0,%XMM10 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RAX,%R11,8),%XMM11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 450301 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x18c1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VDIVSD %XMM10,%XMM11,%XMM10 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 4 |
CMP %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 45025f <hypre_BoomerAMGBuildExtPIInterp.extracted+0x181f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDL -0xa0(%RBP),%XMM0,%XMM11 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
JMP 4501ac <hypre_BoomerAMGBuildExtPIInterp.extracted+0x176c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
CMPQ $-0x3,(%R14,%RCX,8) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 44fe2a <hypre_BoomerAMGBuildExtPIInterp.extracted+0x13ea> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x1,-0x190(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 45024d <hypre_BoomerAMGBuildExtPIInterp.extracted+0x180d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RCX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x188(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RSI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP (%RCX,%RDX,8),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 44fe2a <hypre_BoomerAMGBuildExtPIInterp.extracted+0x13ea> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDSD (%RAX,%R11,8),%XMM6,%XMM6 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
JMP 44fe2a <hypre_BoomerAMGBuildExtPIInterp.extracted+0x13ea> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
CMPQ $0x2,-0xd8(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 450305 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x18c5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x180(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xe0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RDX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX,%RDX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 450305 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x18c5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDL -0xa0(%RBP),%XMM0,%XMM11 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
CMP $0x4,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4503cc <hypre_BoomerAMGBuildExtPIInterp.extracted+0x198c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RAX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4504e4 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1aa4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RDX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x38(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x98(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4502c8 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1888> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
VADDSD %XMM6,%XMM11,%XMM6 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOV -0x30(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 44fe2a <hypre_BoomerAMGBuildExtPIInterp.extracted+0x13ea> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 450330 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x18f0> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4503a0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1960> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %RAX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(,%RCX,8),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4503ed <hypre_BoomerAMGBuildExtPIInterp.extracted+0x19ad> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x30(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x98(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 44fe2a <hypre_BoomerAMGBuildExtPIInterp.extracted+0x13ea> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |