Loop Id: 1002 | Module: exec | Source: par_multi_interp.c:917-970 [...] | Coverage: 0.63% |
---|
Loop Id: 1002 | Module: exec | Source: par_multi_interp.c:917-970 [...] | Coverage: 0.63% |
---|
0x444b50 MOV -0x38(%RBP),%R10 |
0x444b54 INC %R8 |
0x444b57 MOV -0xa8(%RBP),%RDX |
0x444b5e CMP 0x8(%RDX,%RDI,8),%R8 |
0x444b63 JGE 444e30 |
0x444b69 MOV -0x128(%RBP),%RDX |
0x444b70 MOV (%RDX,%R8,8),%R9 |
0x444b74 MOV -0x118(%RBP),%RDX |
0x444b7b CMP %R10,(%RDX,%R9,8) |
0x444b7f JNE 444b54 |
0x444b81 MOV -0x58(%RBP),%RDX |
0x444b85 MOV 0x8(%RDX,%R9,8),%RSI |
0x444b8a TEST %RSI,%RSI |
0x444b8d JLE 444c10 |
0x444b93 MOV -0x90(%RBP),%RDX |
0x444b9a MOV (%RDX,%R9,8),%R10 |
0x444b9e ADD %R10,%RSI |
0x444ba1 MOV -0x40(%RBP),%RDX |
0x444ba5 MOV -0x8(%RDX,%R12,8),%R11 |
0x444baa LEA 0x1(%R10),%RDX |
0x444bae CMP %RDX,%RSI |
0x444bb1 CMOVLE %RDX,%RSI |
0x444bb5 MOV %RSI,%RDX |
0x444bb8 SUB %R10,%RDX |
0x444bbb CMP $0x4,%RDX |
0x444bbf MOV %RDX,-0x30(%RBP) |
0x444bc3 JAE 444ca8 |
0x444bc9 MOV -0x30(%RBP),%R14 |
0x444bcd MOV %R14,%RDX |
0x444bd0 AND $-0x4,%RDX |
0x444bd4 CMP %R14,%RDX |
0x444bd7 JAE 444c10 |
0x444bd9 ADD %RDX,%R10 |
0x444bdc JMP 444be8 |
(1005) 0x444be0 INC %R10 |
(1005) 0x444be3 CMP %R10,%RSI |
(1005) 0x444be6 JE 444c10 |
(1005) 0x444be8 MOV (%R11,%R10,8),%RDX |
(1005) 0x444bec CMP %RDI,(%RBX,%RDX,8) |
(1005) 0x444bf0 JE 444be0 |
(1005) 0x444bf2 INC %RAX |
(1005) 0x444bf5 MOV -0x58(%RBP),%R14 |
(1005) 0x444bf9 INCQ 0x8(%R14,%RDI,8) |
(1005) 0x444bfe MOV %RDI,(%RBX,%RDX,8) |
(1005) 0x444c02 JMP 444be0 |
0x444c10 MOV -0x60(%RBP),%RDX |
0x444c14 MOV 0x8(%RDX,%R9,8),%RSI |
0x444c19 TEST %RSI,%RSI |
0x444c1c JLE 444b50 |
0x444c22 MOV -0x98(%RBP),%RDX |
0x444c29 MOV (%RDX,%R9,8),%R9 |
0x444c2d ADD %R9,%RSI |
0x444c30 MOV -0x48(%RBP),%RDX |
0x444c34 MOV -0x8(%RDX,%R12,8),%R10 |
0x444c39 LEA 0x1(%R9),%RDX |
0x444c3d CMP %RDX,%RSI |
0x444c40 CMOVLE %RDX,%RSI |
0x444c44 MOV %RSI,%R11 |
0x444c47 SUB %R9,%R11 |
0x444c4a CMP $0x4,%R11 |
0x444c4e MOV %R11,-0x30(%RBP) |
0x444c52 JAE 444d67 |
0x444c58 MOV -0x30(%RBP),%RDX |
0x444c5c MOV %RDX,%R11 |
0x444c5f AND $-0x4,%R11 |
0x444c63 CMP %RDX,%R11 |
0x444c66 JAE 444b50 |
0x444c6c ADD %R11,%R9 |
0x444c6f JMP 444c8c |
(1003) 0x444c80 INC %R9 |
(1003) 0x444c83 CMP %R9,%RSI |
(1003) 0x444c86 JE 444b50 |
(1003) 0x444c8c MOV (%R10,%R9,8),%RDX |
(1003) 0x444c90 CMP %RDI,(%R15,%RDX,8) |
(1003) 0x444c94 JE 444c80 |
(1003) 0x444c96 INC %RCX |
(1003) 0x444c99 MOV -0x60(%RBP),%R11 |
(1003) 0x444c9d INCQ 0x8(%R11,%RDI,8) |
(1003) 0x444ca2 MOV %RDI,(%R15,%RDX,8) |
(1003) 0x444ca6 JMP 444c80 |
0x444ca8 MOV %RDX,%R14 |
0x444cab SHR $0x2,%R14 |
0x444caf LEA 0x18(%R11,%R10,8),%R13 |
0x444cb4 JMP 444cd1 |
(1006) 0x444cc0 MOV -0x50(%RBP),%R12 |
(1006) 0x444cc4 ADD $0x20,%R13 |
(1006) 0x444cc8 DEC %R14 |
(1006) 0x444ccb JE 444bc9 |
(1006) 0x444cd1 MOV -0x18(%R13),%RDX |
(1006) 0x444cd5 CMP %RDI,(%RBX,%RDX,8) |
(1006) 0x444cd9 JNE 444d00 |
(1006) 0x444cdb MOV -0x10(%R13),%RDX |
(1006) 0x444cdf CMP %RDI,(%RBX,%RDX,8) |
(1006) 0x444ce3 JNE 444d1a |
(1006) 0x444ce5 MOV -0x8(%R13),%RDX |
(1006) 0x444ce9 CMP %RDI,(%RBX,%RDX,8) |
(1006) 0x444ced JNE 444d34 |
(1006) 0x444cef MOV (%R13),%RDX |
(1006) 0x444cf3 CMP %RDI,(%RBX,%RDX,8) |
(1006) 0x444cf7 JE 444cc0 |
(1006) 0x444cf9 JMP 444d52 |
(1006) 0x444d00 INC %RAX |
(1006) 0x444d03 MOV -0x58(%RBP),%R12 |
(1006) 0x444d07 INCQ 0x8(%R12,%RDI,8) |
(1006) 0x444d0c MOV %RDI,(%RBX,%RDX,8) |
(1006) 0x444d10 MOV -0x10(%R13),%RDX |
(1006) 0x444d14 CMP %RDI,(%RBX,%RDX,8) |
(1006) 0x444d18 JE 444ce5 |
(1006) 0x444d1a INC %RAX |
(1006) 0x444d1d MOV -0x58(%RBP),%R12 |
(1006) 0x444d21 INCQ 0x8(%R12,%RDI,8) |
(1006) 0x444d26 MOV %RDI,(%RBX,%RDX,8) |
(1006) 0x444d2a MOV -0x8(%R13),%RDX |
(1006) 0x444d2e CMP %RDI,(%RBX,%RDX,8) |
(1006) 0x444d32 JE 444cef |
(1006) 0x444d34 INC %RAX |
(1006) 0x444d37 MOV -0x58(%RBP),%R12 |
(1006) 0x444d3b INCQ 0x8(%R12,%RDI,8) |
(1006) 0x444d40 MOV %RDI,(%RBX,%RDX,8) |
(1006) 0x444d44 MOV (%R13),%RDX |
(1006) 0x444d48 CMP %RDI,(%RBX,%RDX,8) |
(1006) 0x444d4c JE 444cc0 |
(1006) 0x444d52 INC %RAX |
(1006) 0x444d55 MOV -0x58(%RBP),%R12 |
(1006) 0x444d59 INCQ 0x8(%R12,%RDI,8) |
(1006) 0x444d5e MOV %RDI,(%RBX,%RDX,8) |
(1006) 0x444d62 JMP 444cc0 |
0x444d67 SHR $0x2,%R11 |
0x444d6b LEA 0x18(%R10,%R9,8),%R14 |
0x444d70 JMP 444d8d |
(1004) 0x444d80 ADD $0x20,%R14 |
(1004) 0x444d84 DEC %R11 |
(1004) 0x444d87 JE 444c58 |
(1004) 0x444d8d MOV -0x18(%R14),%R13 |
(1004) 0x444d91 CMP %RDI,(%R15,%R13,8) |
(1004) 0x444d95 JNE 444dc0 |
(1004) 0x444d97 MOV -0x10(%R14),%R13 |
(1004) 0x444d9b CMP %RDI,(%R15,%R13,8) |
(1004) 0x444d9f JNE 444dda |
(1004) 0x444da1 MOV -0x8(%R14),%R13 |
(1004) 0x444da5 CMP %RDI,(%R15,%R13,8) |
(1004) 0x444da9 JNE 444df4 |
(1004) 0x444dab MOV (%R14),%R13 |
(1004) 0x444dae CMP %RDI,(%R15,%R13,8) |
(1004) 0x444db2 JE 444d80 |
(1004) 0x444db4 JMP 444e11 |
(1004) 0x444dc0 INC %RCX |
(1004) 0x444dc3 MOV -0x60(%RBP),%RDX |
(1004) 0x444dc7 INCQ 0x8(%RDX,%RDI,8) |
(1004) 0x444dcc MOV %RDI,(%R15,%R13,8) |
(1004) 0x444dd0 MOV -0x10(%R14),%R13 |
(1004) 0x444dd4 CMP %RDI,(%R15,%R13,8) |
(1004) 0x444dd8 JE 444da1 |
(1004) 0x444dda INC %RCX |
(1004) 0x444ddd MOV -0x60(%RBP),%RDX |
(1004) 0x444de1 INCQ 0x8(%RDX,%RDI,8) |
(1004) 0x444de6 MOV %RDI,(%R15,%R13,8) |
(1004) 0x444dea MOV -0x8(%R14),%R13 |
(1004) 0x444dee CMP %RDI,(%R15,%R13,8) |
(1004) 0x444df2 JE 444dab |
(1004) 0x444df4 INC %RCX |
(1004) 0x444df7 MOV -0x60(%RBP),%RDX |
(1004) 0x444dfb INCQ 0x8(%RDX,%RDI,8) |
(1004) 0x444e00 MOV %RDI,(%R15,%R13,8) |
(1004) 0x444e04 MOV (%R14),%R13 |
(1004) 0x444e07 CMP %RDI,(%R15,%R13,8) |
(1004) 0x444e0b JE 444d80 |
(1004) 0x444e11 INC %RCX |
(1004) 0x444e14 MOV -0x60(%RBP),%RDX |
(1004) 0x444e18 INCQ 0x8(%RDX,%RDI,8) |
(1004) 0x444e1d MOV %RDI,(%R15,%R13,8) |
(1004) 0x444e21 JMP 444d80 |
/home/eoseret/qaas_runs_CPU_9468/171-147-2675/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 917 - 970 |
-------------------------------------------------------------------------------- |
917: for (i=0; i < n_coarse; i++) |
[...] |
944: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
945: { |
946: j1 = S_diag_j[j]; |
947: if (assigned[j1] == pass-1) |
948: { |
949: j_start = P_diag_start[j1]; |
950: j_end = j_start+P_diag_i[j1+1]; |
951: for (k=j_start; k < j_end; k++) |
952: { |
953: k1 = P_diag_pass[pass-1][k]; |
954: if (P_marker[k1] != i1) |
955: { |
956: cnt_nz++; |
957: P_diag_i[i1+1]++; |
958: P_marker[k1] = i1; |
959: } |
960: } |
961: j_start = P_offd_start[j1]; |
962: j_end = j_start+P_offd_i[j1+1]; |
963: for (k=j_start; k < j_end; k++) |
964: { |
965: k1 = P_offd_pass[pass-1][k]; |
966: if (P_marker_offd[k1] != i1) |
967: { |
968: cnt_nz_offd++; |
969: P_offd_i[i1+1]++; |
970: P_marker_offd[k1] = i1; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.60 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source | par_multi_interp.c:917-917,par_multi_interp.c:944-953,par_multi_interp.c:958-958,par_multi_interp.c:961-965,par_multi_interp.c:970-970 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 11.17 |
CQA cycles if no scalar integer | 11.17 |
CQA cycles if FP arith vectorized | 11.17 |
CQA cycles if fully vectorized | 1.40 |
Front-end cycles | 11.17 |
DIV/SQRT cycles | 6.40 |
P0 cycles | 6.40 |
P1 cycles | 7.00 |
P2 cycles | 7.00 |
P3 cycles | 1.00 |
P4 cycles | 6.40 |
P5 cycles | 6.40 |
P6 cycles | 1.00 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 6.40 |
P10 cycles | 7.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 11.38 |
Stall cycles (UFS) | 0.00 |
Nb insns | 65.00 |
Nb uops | 65.00 |
Nb loads | 21.00 |
Nb stores | 2.00 |
Nb stack references | 11.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 16.48 |
Bytes prefetched | 0.00 |
Bytes loaded | 168.00 |
Bytes stored | 16.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.60 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source | par_multi_interp.c:917-917,par_multi_interp.c:944-953,par_multi_interp.c:958-958,par_multi_interp.c:961-965,par_multi_interp.c:970-970 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 11.17 |
CQA cycles if no scalar integer | 11.17 |
CQA cycles if FP arith vectorized | 11.17 |
CQA cycles if fully vectorized | 1.40 |
Front-end cycles | 11.17 |
DIV/SQRT cycles | 6.40 |
P0 cycles | 6.40 |
P1 cycles | 7.00 |
P2 cycles | 7.00 |
P3 cycles | 1.00 |
P4 cycles | 6.40 |
P5 cycles | 6.40 |
P6 cycles | 1.00 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 6.40 |
P10 cycles | 7.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 11.38 |
Stall cycles (UFS) | 0.00 |
Nb insns | 65.00 |
Nb uops | 65.00 |
Nb loads | 21.00 |
Nb stores | 2.00 |
Nb stack references | 11.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 16.48 |
Bytes prefetched | 0.00 |
Bytes loaded | 168.00 |
Bytes stored | 16.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source file and lines | par_multi_interp.c:917-970 |
Module | exec |
nb instructions | 65 |
nb uops | 65 |
loop length | 264 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 11 |
micro-operation queue | 11.17 cycles |
front end | 11.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 6.40 | 6.40 | 7.00 | 7.00 | 1.00 | 6.40 | 6.40 | 1.00 | 1.00 | 1.00 | 6.40 | 7.00 |
cycles | 6.40 | 6.40 | 7.00 | 7.00 | 1.00 | 6.40 | 6.40 | 1.00 | 1.00 | 1.00 | 6.40 | 7.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 11.38 |
Stall cycles | 0.00 |
Front-end | 11.17 |
Dispatch | 7.00 |
Overall L1 | 11.17 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xa8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP 0x8(%RDX,%RDI,8),%R8 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 444e30 <hypre_BoomerAMGBuildMultipass.extracted.34+0x5b0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x128(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R8,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x118(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R10,(%RDX,%R9,8) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 444b54 <hypre_BoomerAMGBuildMultipass.extracted.34+0x2d4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDX,%R9,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RSI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 444c10 <hypre_BoomerAMGBuildMultipass.extracted.34+0x390> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x90(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R9,8),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R10,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x40(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RDX,%R12,8),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%R10),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVLE %RDX,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R10,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 444ca8 <hypre_BoomerAMGBuildMultipass.extracted.34+0x428> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x30(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R14,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 444c10 <hypre_BoomerAMGBuildMultipass.extracted.34+0x390> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RDX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 444be8 <hypre_BoomerAMGBuildMultipass.extracted.34+0x368> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x60(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDX,%R9,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RSI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 444b50 <hypre_BoomerAMGBuildMultipass.extracted.34+0x2d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x98(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R9,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R9,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RDX,%R12,8),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%R9),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVLE %RDX,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSI,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R9,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x4,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R11,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 444d67 <hypre_BoomerAMGBuildMultipass.extracted.34+0x4e7> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RDX,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 444b50 <hypre_BoomerAMGBuildMultipass.extracted.34+0x2d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %R11,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 444c8c <hypre_BoomerAMGBuildMultipass.extracted.34+0x40c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %RDX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%R14 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(%R11,%R10,8),%R13 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JMP 444cd1 <hypre_BoomerAMGBuildMultipass.extracted.34+0x451> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
SHR $0x2,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(%R10,%R9,8),%R14 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JMP 444d8d <hypre_BoomerAMGBuildMultipass.extracted.34+0x50d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source file and lines | par_multi_interp.c:917-970 |
Module | exec |
nb instructions | 65 |
nb uops | 65 |
loop length | 264 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 11 |
micro-operation queue | 11.17 cycles |
front end | 11.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 6.40 | 6.40 | 7.00 | 7.00 | 1.00 | 6.40 | 6.40 | 1.00 | 1.00 | 1.00 | 6.40 | 7.00 |
cycles | 6.40 | 6.40 | 7.00 | 7.00 | 1.00 | 6.40 | 6.40 | 1.00 | 1.00 | 1.00 | 6.40 | 7.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 11.38 |
Stall cycles | 0.00 |
Front-end | 11.17 |
Dispatch | 7.00 |
Overall L1 | 11.17 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xa8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP 0x8(%RDX,%RDI,8),%R8 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 444e30 <hypre_BoomerAMGBuildMultipass.extracted.34+0x5b0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x128(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R8,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x118(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R10,(%RDX,%R9,8) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 444b54 <hypre_BoomerAMGBuildMultipass.extracted.34+0x2d4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDX,%R9,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RSI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 444c10 <hypre_BoomerAMGBuildMultipass.extracted.34+0x390> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x90(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R9,8),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R10,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x40(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RDX,%R12,8),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%R10),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVLE %RDX,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R10,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 444ca8 <hypre_BoomerAMGBuildMultipass.extracted.34+0x428> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x30(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R14,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 444c10 <hypre_BoomerAMGBuildMultipass.extracted.34+0x390> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RDX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 444be8 <hypre_BoomerAMGBuildMultipass.extracted.34+0x368> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x60(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDX,%R9,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RSI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 444b50 <hypre_BoomerAMGBuildMultipass.extracted.34+0x2d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x98(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R9,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R9,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RDX,%R12,8),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%R9),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVLE %RDX,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSI,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R9,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x4,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R11,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 444d67 <hypre_BoomerAMGBuildMultipass.extracted.34+0x4e7> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RDX,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 444b50 <hypre_BoomerAMGBuildMultipass.extracted.34+0x2d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %R11,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 444c8c <hypre_BoomerAMGBuildMultipass.extracted.34+0x40c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %RDX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%R14 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(%R11,%R10,8),%R13 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JMP 444cd1 <hypre_BoomerAMGBuildMultipass.extracted.34+0x451> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
SHR $0x2,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(%R10,%R9,8),%R14 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JMP 444d8d <hypre_BoomerAMGBuildMultipass.extracted.34+0x50d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |