Loop Id: 1635 | Module: libparcsr_ls.so | Source: par_lr_interp.c:1221-1675 [...] | Coverage: 0.05% |
---|
Loop Id: 1635 | Module: libparcsr_ls.so | Source: par_lr_interp.c:1221-1675 [...] | Coverage: 0.05% |
---|
0x5b620 MOV -0xa0(%RBP),%RCX |
0x5b627 MOV (%RCX),%RCX |
0x5b62a VMOVSD (%RCX,%RAX,8),%XMM5 |
0x5b62f MOV -0x50(%RBP),%RDX |
0x5b633 VADDSD (%RDX,%R9,8),%XMM5,%XMM5 |
0x5b639 VMOVSD %XMM5,(%RCX,%RAX,8) |
0x5b63e INC %R9 |
0x5b641 CMP -0xb8(%RBP),%R9 |
0x5b648 JE 5be3c |
0x5b64e MOV (%RBX,%R9,8),%R10 |
0x5b652 MOV (%R13,%R10,8),%RAX |
0x5b657 CMP %RDI,%RAX |
0x5b65a JGE 5b620 |
0x5b65c CMP -0x78(%RBP),%RAX |
0x5b660 JNE 5b750 |
0x5b666 MOV -0x190(%RBP),%RCX |
0x5b66d MOV (%RCX,%R10,8),%R11 |
0x5b671 VPXOR %XMM5,%XMM5,%XMM5 |
0x5b675 XOR %EAX,%EAX |
0x5b677 MOV -0x50(%RBP),%RDX |
0x5b67b VUCOMISD (%RDX,%R11,8),%XMM5 |
0x5b681 MOV %R10,-0xc0(%RBP) |
0x5b688 MOV 0x8(%RCX,%R10,8),%RCX |
0x5b68d SETBE %AL |
0x5b690 LEA -0x1(%RAX,%RAX,1),%RAX |
0x5b695 MOV %RAX,-0xb0(%RBP) |
0x5b69c LEA 0x1(%R11),%R10 |
0x5b6a0 CMP %RCX,%R10 |
0x5b6a3 MOV %R11,-0x58(%RBP) |
0x5b6a7 JGE 5b790 |
0x5b6ad VCVTSI2SDQ -0xb0(%RBP),%XMM10,%XMM6 |
0x5b6b6 NOT %R11 |
0x5b6b9 ADD %RCX,%R11 |
0x5b6bc MOV %R11,-0x68(%RBP) |
0x5b6c0 CMP $0x4,%R11 |
0x5b6c4 JAE 5b851 |
0x5b6ca MOV -0x68(%RBP),%RDX |
0x5b6ce MOV %RDX,%RAX |
0x5b6d1 AND $-0x4,%RAX |
0x5b6d5 CMP %RDX,%RAX |
0x5b6d8 JAE 5b790 |
0x5b6de MOV -0x58(%RBP),%RDX |
0x5b6e2 LEA 0x1(%RDX,%RAX,1),%RAX |
0x5b6e7 JMP 5b6fc |
(1641) 0x5b6f0 INC %RAX |
(1641) 0x5b6f3 CMP %RAX,%RCX |
(1641) 0x5b6f6 JE 5b790 |
(1641) 0x5b6fc MOV (%RBX,%RAX,8),%RDX |
(1641) 0x5b700 XOR %R11D,%R11D |
(1641) 0x5b703 CMP %RDI,(%R13,%RDX,8) |
(1641) 0x5b708 SETGE %R11B |
(1641) 0x5b70c XOR %R15D,%R15D |
(1641) 0x5b70f CMP %R14,%RDX |
(1641) 0x5b712 SETE %R15B |
(1641) 0x5b716 CMP %R11B,%R15B |
(1641) 0x5b719 CMOVA %R15D,%R11D |
(1641) 0x5b71d CMP $0x1,%R11B |
(1641) 0x5b721 JNE 5b6f0 |
(1641) 0x5b723 MOV -0x50(%RBP),%RDX |
(1641) 0x5b727 VMOVSD (%RDX,%RAX,8),%XMM7 |
(1641) 0x5b72c VMULSD %XMM6,%XMM7,%XMM8 |
(1641) 0x5b730 VADDSD %XMM5,%XMM7,%XMM7 |
(1641) 0x5b734 VCMPSD $0x1,%XMM0,%XMM8,%K1 |
(1641) 0x5b73b VMOVSD %XMM7,%XMM5,%XMM5{%K1} |
(1641) 0x5b741 JMP 5b6f0 |
0x5b750 MOV -0xf8(%RBP),%RAX |
0x5b757 CMPQ $-0x3,(%RAX,%R10,8) |
0x5b75c JE 5b63e |
0x5b762 CMPQ $0x1,-0x188(%RBP) |
0x5b76a JE 5b781 |
0x5b76c MOV -0x180(%RBP),%RCX |
0x5b773 MOV (%RCX,%R14,8),%RAX |
0x5b777 CMP (%RCX,%R10,8),%RAX |
0x5b77b JNE 5b63e |
0x5b781 MOV -0x50(%RBP),%RAX |
0x5b785 VADDSD (%RAX,%R9,8),%XMM4,%XMM4 |
0x5b78b JMP 5b63e |
0x5b790 MOV -0xd8(%RBP),%RAX |
0x5b797 MOV (%RAX),%RAX |
0x5b79a MOV %RAX,-0x68(%RBP) |
0x5b79e CMP $0x2,%RAX |
0x5b7a2 JL 5bab0 |
0x5b7a8 MOV -0x170(%RBP),%RDX |
0x5b7af MOV -0xc0(%RBP),%R11 |
0x5b7b6 MOV (%RDX,%R11,8),%RAX |
0x5b7ba MOV 0x8(%RDX,%R11,8),%R12 |
0x5b7bf MOV %R12,%R15 |
0x5b7c2 SUB %RAX,%R15 |
0x5b7c5 JLE 5bab0 |
0x5b7cb VCVTSI2SDQ -0xb0(%RBP),%XMM10,%XMM6 |
0x5b7d4 CMP $0x4,%R15 |
0x5b7d8 MOV %R15,-0xd0(%RBP) |
0x5b7df JAE 5b9a0 |
0x5b7e5 MOV -0xd0(%RBP),%R11 |
0x5b7ec MOV %R11,%RDX |
0x5b7ef AND $-0x4,%RDX |
0x5b7f3 CMP %R11,%RDX |
0x5b7f6 JAE 5ba9c |
0x5b7fc ADD %RDX,%RAX |
0x5b7ff MOV -0x98(%RBP),%R14 |
0x5b806 JMP 5b81c |
(1639) 0x5b810 INC %RAX |
(1639) 0x5b813 CMP %RAX,%R12 |
(1639) 0x5b816 JE 5bab0 |
(1639) 0x5b81c MOV -0xa8(%RBP),%RDX |
(1639) 0x5b823 MOV (%RDX,%RAX,8),%RDX |
(1639) 0x5b827 MOV -0x48(%RBP),%R11 |
(1639) 0x5b82b CMP %RSI,(%R11,%RDX,8) |
(1639) 0x5b82f JL 5b810 |
(1639) 0x5b831 MOV -0x70(%RBP),%RDX |
(1639) 0x5b835 VMOVSD (%RDX,%RAX,8),%XMM7 |
(1639) 0x5b83a VMULSD %XMM6,%XMM7,%XMM8 |
(1639) 0x5b83e VADDSD %XMM5,%XMM7,%XMM7 |
(1639) 0x5b842 VCMPSD $0x1,%XMM0,%XMM8,%K1 |
(1639) 0x5b849 VMOVSD %XMM7,%XMM5,%XMM5{%K1} |
(1639) 0x5b84f JMP 5b810 |
0x5b851 MOV -0x68(%RBP),%R12 |
0x5b855 SHR $0x2,%R12 |
0x5b859 MOV -0x58(%RBP),%RAX |
0x5b85d LEA 0x20(,%RAX,8),%RAX |
0x5b865 VXORPD %XMM7,%XMM7,%XMM7 |
0x5b869 JMP 5b87d |
(1642) 0x5b870 ADD $0x20,%RAX |
(1642) 0x5b874 DEC %R12 |
(1642) 0x5b877 JE 5b6ca |
(1642) 0x5b87d MOV -0x18(%RBX,%RAX,1),%RDX |
(1642) 0x5b882 XOR %R11D,%R11D |
(1642) 0x5b885 CMP %RDI,(%R13,%RDX,8) |
(1642) 0x5b88a SETGE %R11B |
(1642) 0x5b88e XOR %R15D,%R15D |
(1642) 0x5b891 CMP %R14,%RDX |
(1642) 0x5b894 SETE %R15B |
(1642) 0x5b898 CMP %R11B,%R15B |
(1642) 0x5b89b CMOVA %R15D,%R11D |
(1642) 0x5b89f CMP $0x1,%R11B |
(1642) 0x5b8a3 JNE 5b8c4 |
(1642) 0x5b8a5 MOV -0x50(%RBP),%RDX |
(1642) 0x5b8a9 VMOVSD -0x18(%RDX,%RAX,1),%XMM8 |
(1642) 0x5b8af VMULSD %XMM6,%XMM8,%XMM9 |
(1642) 0x5b8b3 VADDSD %XMM5,%XMM8,%XMM8 |
(1642) 0x5b8b7 VCMPSD $0x1,%XMM7,%XMM9,%K1 |
(1642) 0x5b8be VMOVSD %XMM8,%XMM5,%XMM5{%K1} |
(1642) 0x5b8c4 MOV -0x10(%RBX,%RAX,1),%RDX |
(1642) 0x5b8c9 XOR %R11D,%R11D |
(1642) 0x5b8cc CMP %RDI,(%R13,%RDX,8) |
(1642) 0x5b8d1 SETGE %R11B |
(1642) 0x5b8d5 XOR %R15D,%R15D |
(1642) 0x5b8d8 CMP %R14,%RDX |
(1642) 0x5b8db SETE %R15B |
(1642) 0x5b8df CMP %R11B,%R15B |
(1642) 0x5b8e2 CMOVA %R15D,%R11D |
(1642) 0x5b8e6 CMP $0x1,%R11B |
(1642) 0x5b8ea JNE 5b90b |
(1642) 0x5b8ec MOV -0x50(%RBP),%RDX |
(1642) 0x5b8f0 VMOVSD -0x10(%RDX,%RAX,1),%XMM8 |
(1642) 0x5b8f6 VMULSD %XMM6,%XMM8,%XMM9 |
(1642) 0x5b8fa VADDSD %XMM5,%XMM8,%XMM8 |
(1642) 0x5b8fe VCMPSD $0x1,%XMM7,%XMM9,%K1 |
(1642) 0x5b905 VMOVSD %XMM8,%XMM5,%XMM5{%K1} |
(1642) 0x5b90b MOV -0x8(%RBX,%RAX,1),%RDX |
(1642) 0x5b910 XOR %R11D,%R11D |
(1642) 0x5b913 CMP %RDI,(%R13,%RDX,8) |
(1642) 0x5b918 SETGE %R11B |
(1642) 0x5b91c XOR %R15D,%R15D |
(1642) 0x5b91f CMP %R14,%RDX |
(1642) 0x5b922 SETE %R15B |
(1642) 0x5b926 CMP %R11B,%R15B |
(1642) 0x5b929 CMOVA %R15D,%R11D |
(1642) 0x5b92d CMP $0x1,%R11B |
(1642) 0x5b931 JNE 5b952 |
(1642) 0x5b933 MOV -0x50(%RBP),%RDX |
(1642) 0x5b937 VMOVSD -0x8(%RDX,%RAX,1),%XMM8 |
(1642) 0x5b93d VMULSD %XMM6,%XMM8,%XMM9 |
(1642) 0x5b941 VADDSD %XMM5,%XMM8,%XMM8 |
(1642) 0x5b945 VCMPSD $0x1,%XMM7,%XMM9,%K1 |
(1642) 0x5b94c VMOVSD %XMM8,%XMM5,%XMM5{%K1} |
(1642) 0x5b952 MOV (%RBX,%RAX,1),%RDX |
(1642) 0x5b956 XOR %R11D,%R11D |
(1642) 0x5b959 CMP %RDI,(%R13,%RDX,8) |
(1642) 0x5b95e SETGE %R11B |
(1642) 0x5b962 XOR %R15D,%R15D |
(1642) 0x5b965 CMP %R14,%RDX |
(1642) 0x5b968 SETE %R15B |
(1642) 0x5b96c CMP %R11B,%R15B |
(1642) 0x5b96f CMOVA %R15D,%R11D |
(1642) 0x5b973 CMP $0x1,%R11B |
(1642) 0x5b977 JNE 5b870 |
(1642) 0x5b97d MOV -0x50(%RBP),%RDX |
(1642) 0x5b981 VMOVSD (%RDX,%RAX,1),%XMM8 |
(1642) 0x5b986 VMULSD %XMM6,%XMM8,%XMM9 |
(1642) 0x5b98a VADDSD %XMM5,%XMM8,%XMM8 |
(1642) 0x5b98e VCMPSD $0x1,%XMM7,%XMM9,%K1 |
(1642) 0x5b995 VMOVSD %XMM8,%XMM5,%XMM5{%K1} |
(1642) 0x5b99b JMP 5b870 |
0x5b9a0 SHR $0x2,%R15 |
0x5b9a4 LEA 0x18(,%RAX,8),%RDX |
0x5b9ac JMP 5b9bd |
(1640) 0x5b9b0 ADD $0x20,%RDX |
(1640) 0x5b9b4 DEC %R15 |
(1640) 0x5b9b7 JE 5b7e5 |
(1640) 0x5b9bd MOV -0xa8(%RBP),%R11 |
(1640) 0x5b9c4 MOV -0x18(%R11,%RDX,1),%R11 |
(1640) 0x5b9c9 MOV -0x48(%RBP),%R14 |
(1640) 0x5b9cd CMP %RSI,(%R14,%R11,8) |
(1640) 0x5b9d1 JL 5b9f3 |
(1640) 0x5b9d3 MOV -0x70(%RBP),%R11 |
(1640) 0x5b9d7 VMOVSD -0x18(%R11,%RDX,1),%XMM7 |
(1640) 0x5b9de VMULSD %XMM6,%XMM7,%XMM8 |
(1640) 0x5b9e2 VADDSD %XMM5,%XMM7,%XMM7 |
(1640) 0x5b9e6 VCMPSD $0x1,%XMM0,%XMM8,%K1 |
(1640) 0x5b9ed VMOVSD %XMM7,%XMM5,%XMM5{%K1} |
(1640) 0x5b9f3 MOV -0xa8(%RBP),%R11 |
(1640) 0x5b9fa MOV -0x10(%R11,%RDX,1),%R11 |
(1640) 0x5b9ff MOV -0x48(%RBP),%R14 |
(1640) 0x5ba03 CMP %RSI,(%R14,%R11,8) |
(1640) 0x5ba07 JL 5ba29 |
(1640) 0x5ba09 MOV -0x70(%RBP),%R11 |
(1640) 0x5ba0d VMOVSD -0x10(%R11,%RDX,1),%XMM7 |
(1640) 0x5ba14 VMULSD %XMM6,%XMM7,%XMM8 |
(1640) 0x5ba18 VADDSD %XMM5,%XMM7,%XMM7 |
(1640) 0x5ba1c VCMPSD $0x1,%XMM0,%XMM8,%K1 |
(1640) 0x5ba23 VMOVSD %XMM7,%XMM5,%XMM5{%K1} |
(1640) 0x5ba29 MOV -0xa8(%RBP),%R11 |
(1640) 0x5ba30 MOV -0x8(%R11,%RDX,1),%R11 |
(1640) 0x5ba35 MOV -0x48(%RBP),%R14 |
(1640) 0x5ba39 CMP %RSI,(%R14,%R11,8) |
(1640) 0x5ba3d JL 5ba5f |
(1640) 0x5ba3f MOV -0x70(%RBP),%R11 |
(1640) 0x5ba43 VMOVSD -0x8(%R11,%RDX,1),%XMM7 |
(1640) 0x5ba4a VMULSD %XMM6,%XMM7,%XMM8 |
(1640) 0x5ba4e VADDSD %XMM5,%XMM7,%XMM7 |
(1640) 0x5ba52 VCMPSD $0x1,%XMM0,%XMM8,%K1 |
(1640) 0x5ba59 VMOVSD %XMM7,%XMM5,%XMM5{%K1} |
(1640) 0x5ba5f MOV -0xa8(%RBP),%R11 |
(1640) 0x5ba66 MOV (%R11,%RDX,1),%R11 |
(1640) 0x5ba6a MOV -0x48(%RBP),%R14 |
(1640) 0x5ba6e CMP %RSI,(%R14,%R11,8) |
(1640) 0x5ba72 JL 5b9b0 |
(1640) 0x5ba78 MOV -0x70(%RBP),%R11 |
(1640) 0x5ba7c VMOVSD (%R11,%RDX,1),%XMM7 |
(1640) 0x5ba82 VMULSD %XMM6,%XMM7,%XMM8 |
(1640) 0x5ba86 VADDSD %XMM5,%XMM7,%XMM7 |
(1640) 0x5ba8a VCMPSD $0x1,%XMM0,%XMM8,%K1 |
(1640) 0x5ba91 VMOVSD %XMM7,%XMM5,%XMM5{%K1} |
(1640) 0x5ba97 JMP 5b9b0 |
0x5ba9c MOV -0x98(%RBP),%R14 |
0x5baa3 NOPW %CS:(%RAX,%RAX,1) |
0x5bab0 VUCOMISD %XMM0,%XMM5 |
0x5bab4 MOV -0x50(%RBP),%RAX |
0x5bab8 VMOVSD (%RAX,%R9,8),%XMM6 |
0x5babe JE 5bb55 |
0x5bac4 VDIVSD %XMM5,%XMM6,%XMM5 |
0x5bac8 CMP %RCX,%R10 |
0x5bacb MOV -0x48(%RBP),%R12 |
0x5bacf JGE 5bb73 |
0x5bad5 VCVTSI2SDQ -0xb0(%RBP),%XMM10,%XMM6 |
0x5bade MOV -0x58(%RBP),%RDX |
0x5bae2 MOV %EDX,%EAX |
0x5bae4 NOT %EAX |
0x5bae6 ADD %ECX,%EAX |
0x5bae8 TEST $0x1,%AL |
0x5baea JE 5bb6a |
0x5baec MOV 0x8(%RBX,%RDX,8),%RAX |
0x5baf1 MOV (%R13,%RAX,8),%RDX |
0x5baf6 CMP %RDI,%RDX |
0x5baf9 JL 5bb2a |
0x5bafb MOV -0x50(%RBP),%R10 |
0x5baff MOV -0x58(%RBP),%R11 |
0x5bb03 VMOVSD 0x8(%R10,%R11,8),%XMM7 |
0x5bb0a VMULSD %XMM6,%XMM7,%XMM8 |
0x5bb0e VUCOMISD %XMM0,%XMM8 |
0x5bb12 JAE 5bb2a |
0x5bb14 MOV -0xa0(%RBP),%R10 |
0x5bb1b MOV (%R10),%R10 |
0x5bb1e VFMADD213SD (%R10,%RDX,8),%XMM5,%XMM7 |
0x5bb24 VMOVSD %XMM7,(%R10,%RDX,8) |
0x5bb2a CMP %R14,%RAX |
0x5bb2d JNE 5bb62 |
0x5bb2f MOV -0x50(%RBP),%RAX |
0x5bb33 MOV -0x58(%RBP),%RDX |
0x5bb37 VMOVSD 0x8(%RAX,%RDX,8),%XMM7 |
0x5bb3d VMULSD %XMM6,%XMM7,%XMM8 |
0x5bb41 VFMADD213SD %XMM4,%XMM5,%XMM7 |
0x5bb46 VCMPSD $0x1,%XMM0,%XMM8,%K1 |
0x5bb4d VMOVSD %XMM7,%XMM4,%XMM4{%K1} |
0x5bb53 JMP 5bb66 |
0x5bb55 VADDSD %XMM4,%XMM6,%XMM4 |
0x5bb59 MOV -0x48(%RBP),%R12 |
0x5bb5d JMP 5b63e |
0x5bb62 MOV -0x58(%RBP),%RDX |
0x5bb66 LEA 0x2(%RDX),%R10 |
0x5bb6a LEA -0x2(%RCX),%RAX |
0x5bb6e CMP %RDX,%RAX |
0x5bb71 JNE 5bbd9 |
0x5bb73 CMPQ $0x2,-0x68(%RBP) |
0x5bb78 JL 5b63e |
0x5bb7e MOV -0x170(%RBP),%RCX |
0x5bb85 MOV -0xc0(%RBP),%RDX |
0x5bb8c MOV (%RCX,%RDX,8),%RAX |
0x5bb90 MOV 0x8(%RCX,%RDX,8),%RCX |
0x5bb95 MOV %RCX,%R10 |
0x5bb98 SUB %RAX,%R10 |
0x5bb9b JLE 5b63e |
0x5bba1 VCVTSI2SDQ -0xb0(%RBP),%XMM10,%XMM6 |
0x5bbaa CMP $0x4,%R10 |
0x5bbae JAE 5bce9 |
0x5bbb4 MOV %R10,%RDX |
0x5bbb7 AND $-0x4,%RDX |
0x5bbbb CMP %R10,%RDX |
0x5bbbe JAE 5b63e |
0x5bbc4 ADD %RDX,%RAX |
0x5bbc7 JMP 5bcac |
(1638) 0x5bbd0 ADD $0x2,%R10 |
(1638) 0x5bbd4 CMP %R10,%RCX |
(1638) 0x5bbd7 JE 5bb73 |
(1638) 0x5bbd9 MOV (%RBX,%R10,8),%RAX |
(1638) 0x5bbdd MOV (%R13,%RAX,8),%RDX |
(1638) 0x5bbe2 CMP %RDI,%RDX |
(1638) 0x5bbe5 JL 5bc11 |
(1638) 0x5bbe7 MOV -0x50(%RBP),%R11 |
(1638) 0x5bbeb VMOVSD (%R11,%R10,8),%XMM7 |
(1638) 0x5bbf1 VMULSD %XMM6,%XMM7,%XMM8 |
(1638) 0x5bbf5 VUCOMISD %XMM0,%XMM8 |
(1638) 0x5bbf9 JAE 5bc11 |
(1638) 0x5bbfb MOV -0xa0(%RBP),%R11 |
(1638) 0x5bc02 MOV (%R11),%R15 |
(1638) 0x5bc05 VFMADD213SD (%R15,%RDX,8),%XMM5,%XMM7 |
(1638) 0x5bc0b VMOVSD %XMM7,(%R15,%RDX,8) |
(1638) 0x5bc11 CMP %R14,%RAX |
(1638) 0x5bc14 JNE 5bc36 |
(1638) 0x5bc16 MOV -0x50(%RBP),%RAX |
(1638) 0x5bc1a VMOVSD (%RAX,%R10,8),%XMM7 |
(1638) 0x5bc20 VMULSD %XMM6,%XMM7,%XMM8 |
(1638) 0x5bc24 VFMADD213SD %XMM4,%XMM5,%XMM7 |
(1638) 0x5bc29 VCMPSD $0x1,%XMM0,%XMM8,%K1 |
(1638) 0x5bc30 VMOVSD %XMM7,%XMM4,%XMM4{%K1} |
(1638) 0x5bc36 MOV 0x8(%RBX,%R10,8),%RAX |
(1638) 0x5bc3b MOV (%R13,%RAX,8),%RDX |
(1638) 0x5bc40 CMP %RDI,%RDX |
(1638) 0x5bc43 JL 5bc70 |
(1638) 0x5bc45 MOV -0x50(%RBP),%R11 |
(1638) 0x5bc49 VMOVSD 0x8(%R11,%R10,8),%XMM7 |
(1638) 0x5bc50 VMULSD %XMM6,%XMM7,%XMM8 |
(1638) 0x5bc54 VUCOMISD %XMM0,%XMM8 |
(1638) 0x5bc58 JAE 5bc70 |
(1638) 0x5bc5a MOV -0xa0(%RBP),%R11 |
(1638) 0x5bc61 MOV (%R11),%R15 |
(1638) 0x5bc64 VFMADD213SD (%R15,%RDX,8),%XMM5,%XMM7 |
(1638) 0x5bc6a VMOVSD %XMM7,(%R15,%RDX,8) |
(1638) 0x5bc70 CMP %R14,%RAX |
(1638) 0x5bc73 JNE 5bbd0 |
(1638) 0x5bc79 MOV -0x50(%RBP),%RAX |
(1638) 0x5bc7d VMOVSD 0x8(%RAX,%R10,8),%XMM7 |
(1638) 0x5bc84 VMULSD %XMM6,%XMM7,%XMM8 |
(1638) 0x5bc88 VFMADD213SD %XMM4,%XMM5,%XMM7 |
(1638) 0x5bc8d VCMPSD $0x1,%XMM0,%XMM8,%K1 |
(1638) 0x5bc94 VMOVSD %XMM7,%XMM4,%XMM4{%K1} |
(1638) 0x5bc9a JMP 5bbd0 |
(1636) 0x5bca0 INC %RAX |
(1636) 0x5bca3 CMP %RAX,%RCX |
(1636) 0x5bca6 JE 5b63e |
(1636) 0x5bcac MOV -0xa8(%RBP),%RDX |
(1636) 0x5bcb3 MOV (%RDX,%RAX,8),%RDX |
(1636) 0x5bcb7 MOV (%R12,%RDX,8),%RDX |
(1636) 0x5bcbb CMP %RSI,%RDX |
(1636) 0x5bcbe JL 5bca0 |
(1636) 0x5bcc0 MOV -0x70(%RBP),%R10 |
(1636) 0x5bcc4 VMOVSD (%R10,%RAX,8),%XMM7 |
(1636) 0x5bcca VMULSD %XMM6,%XMM7,%XMM8 |
(1636) 0x5bcce VUCOMISD %XMM0,%XMM8 |
(1636) 0x5bcd2 JAE 5bca0 |
(1636) 0x5bcd4 MOV -0x80(%RBP),%R10 |
(1636) 0x5bcd8 MOV (%R10),%R10 |
(1636) 0x5bcdb VFMADD213SD (%R10,%RDX,8),%XMM5,%XMM7 |
(1636) 0x5bce1 VMOVSD %XMM7,(%R10,%RDX,8) |
(1636) 0x5bce7 JMP 5bca0 |
0x5bce9 MOV %R10,%RDX |
0x5bcec SHR $0x2,%RDX |
0x5bcf0 LEA 0x18(,%RAX,8),%R11 |
0x5bcf8 JMP 5bd0d |
(1637) 0x5bd00 ADD $0x20,%R11 |
(1637) 0x5bd04 DEC %RDX |
(1637) 0x5bd07 JE 5bbb4 |
(1637) 0x5bd0d MOV -0xa8(%RBP),%R15 |
(1637) 0x5bd14 MOV -0x18(%R15,%R11,1),%R15 |
(1637) 0x5bd19 MOV (%R12,%R15,8),%R15 |
(1637) 0x5bd1d CMP %RSI,%R15 |
(1637) 0x5bd20 JL 5bd56 |
(1637) 0x5bd22 MOV -0x70(%RBP),%RBX |
(1637) 0x5bd26 VMOVSD -0x18(%RBX,%R11,1),%XMM7 |
(1637) 0x5bd2d MOV -0xe0(%RBP),%RBX |
(1637) 0x5bd34 VMULSD %XMM6,%XMM7,%XMM8 |
(1637) 0x5bd38 VUCOMISD %XMM0,%XMM8 |
(1637) 0x5bd3c JAE 5bd56 |
(1637) 0x5bd3e MOV -0x80(%RBP),%R12 |
(1637) 0x5bd42 MOV (%R12),%R12 |
(1637) 0x5bd46 VFMADD213SD (%R12,%R15,8),%XMM5,%XMM7 |
(1637) 0x5bd4c VMOVSD %XMM7,(%R12,%R15,8) |
(1637) 0x5bd52 MOV -0x48(%RBP),%R12 |
(1637) 0x5bd56 MOV -0xa8(%RBP),%R15 |
(1637) 0x5bd5d MOV -0x10(%R15,%R11,1),%R15 |
(1637) 0x5bd62 MOV (%R12,%R15,8),%R15 |
(1637) 0x5bd66 CMP %RSI,%R15 |
(1637) 0x5bd69 JL 5bd9f |
(1637) 0x5bd6b MOV -0x70(%RBP),%RBX |
(1637) 0x5bd6f VMOVSD -0x10(%RBX,%R11,1),%XMM7 |
(1637) 0x5bd76 MOV -0xe0(%RBP),%RBX |
(1637) 0x5bd7d VMULSD %XMM6,%XMM7,%XMM8 |
(1637) 0x5bd81 VUCOMISD %XMM0,%XMM8 |
(1637) 0x5bd85 JAE 5bd9f |
(1637) 0x5bd87 MOV -0x80(%RBP),%R12 |
(1637) 0x5bd8b MOV (%R12),%R12 |
(1637) 0x5bd8f VFMADD213SD (%R12,%R15,8),%XMM5,%XMM7 |
(1637) 0x5bd95 VMOVSD %XMM7,(%R12,%R15,8) |
(1637) 0x5bd9b MOV -0x48(%RBP),%R12 |
(1637) 0x5bd9f MOV -0xa8(%RBP),%R15 |
(1637) 0x5bda6 MOV -0x8(%R15,%R11,1),%R15 |
(1637) 0x5bdab MOV (%R12,%R15,8),%R15 |
(1637) 0x5bdaf CMP %RSI,%R15 |
(1637) 0x5bdb2 JL 5bde8 |
(1637) 0x5bdb4 MOV -0x70(%RBP),%RBX |
(1637) 0x5bdb8 VMOVSD -0x8(%RBX,%R11,1),%XMM7 |
(1637) 0x5bdbf MOV -0xe0(%RBP),%RBX |
(1637) 0x5bdc6 VMULSD %XMM6,%XMM7,%XMM8 |
(1637) 0x5bdca VUCOMISD %XMM0,%XMM8 |
(1637) 0x5bdce JAE 5bde8 |
(1637) 0x5bdd0 MOV -0x80(%RBP),%R12 |
(1637) 0x5bdd4 MOV (%R12),%R12 |
(1637) 0x5bdd8 VFMADD213SD (%R12,%R15,8),%XMM5,%XMM7 |
(1637) 0x5bdde VMOVSD %XMM7,(%R12,%R15,8) |
(1637) 0x5bde4 MOV -0x48(%RBP),%R12 |
(1637) 0x5bde8 MOV -0xa8(%RBP),%R15 |
(1637) 0x5bdef MOV (%R15,%R11,1),%R15 |
(1637) 0x5bdf3 MOV (%R12,%R15,8),%R15 |
(1637) 0x5bdf7 CMP %RSI,%R15 |
(1637) 0x5bdfa JL 5bd00 |
(1637) 0x5be00 MOV -0x70(%RBP),%RBX |
(1637) 0x5be04 VMOVSD (%RBX,%R11,1),%XMM7 |
(1637) 0x5be0a MOV -0xe0(%RBP),%RBX |
(1637) 0x5be11 VMULSD %XMM6,%XMM7,%XMM8 |
(1637) 0x5be15 VUCOMISD %XMM0,%XMM8 |
(1637) 0x5be19 JAE 5bd00 |
(1637) 0x5be1f MOV -0x80(%RBP),%R12 |
(1637) 0x5be23 MOV (%R12),%R12 |
(1637) 0x5be27 VFMADD213SD (%R12,%R15,8),%XMM5,%XMM7 |
(1637) 0x5be2d VMOVSD %XMM7,(%R12,%R15,8) |
(1637) 0x5be33 MOV -0x48(%RBP),%R12 |
(1637) 0x5be37 JMP 5bd00 |
/home/eoseret/qaas_runs_CPU_9468/171-147-2675/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c: 1221 - 1675 |
-------------------------------------------------------------------------------- |
1221: if (n_fine) |
[...] |
1609: for (jj = A_diag_i[i]+1; jj < A_diag_i[i+1]; jj++) |
1610: { /* i1 is a c-point and strongly influences i, accumulate |
1611: * a_(i,i1) into interpolation weight */ |
1612: i1 = A_diag_j[jj]; |
1613: if (P_marker[i1] >= jj_begin_row) |
1614: { |
1615: P_diag_data[P_marker[i1]] += A_diag_data[jj]; |
1616: } |
1617: else if(P_marker[i1] == strong_f_marker) |
1618: { |
1619: sum = zero; |
1620: sgn = 1; |
1621: if(A_diag_data[A_diag_i[i1]] < 0) sgn = -1; |
1622: /* Loop over row of A for point i1 and calculate the sum |
1623: * of the connections to c-points that strongly influence i. */ |
1624: for(jj1 = A_diag_i[i1]+1; jj1 < A_diag_i[i1+1]; jj1++) |
1625: { |
1626: i2 = A_diag_j[jj1]; |
1627: if((P_marker[i2] >= jj_begin_row || i2 == i) && (sgn*A_diag_data[jj1]) < 0) |
1628: sum += A_diag_data[jj1]; |
1629: } |
1630: if(num_procs > 1) |
1631: { |
1632: for(jj1 = A_offd_i[i1]; jj1< A_offd_i[i1+1]; jj1++) |
1633: { |
1634: i2 = A_offd_j[jj1]; |
1635: if(P_marker_offd[i2] >= jj_begin_row_offd && |
1636: (sgn*A_offd_data[jj1]) < 0) |
1637: sum += A_offd_data[jj1]; |
1638: } |
1639: } |
1640: if(sum != 0) |
1641: { |
1642: distribute = A_diag_data[jj]/sum; |
1643: /* Loop over row of A for point i1 and do the distribution */ |
1644: for(jj1 = A_diag_i[i1]+1; jj1 < A_diag_i[i1+1]; jj1++) |
1645: { |
1646: i2 = A_diag_j[jj1]; |
1647: if(P_marker[i2] >= jj_begin_row && (sgn*A_diag_data[jj1]) < 0) |
1648: P_diag_data[P_marker[i2]] += |
1649: distribute*A_diag_data[jj1]; |
1650: if(i2 == i && (sgn*A_diag_data[jj1]) < 0) |
1651: diagonal += distribute*A_diag_data[jj1]; |
1652: } |
1653: if(num_procs > 1) |
1654: { |
1655: for(jj1 = A_offd_i[i1]; jj1 < A_offd_i[i1+1]; jj1++) |
1656: { |
1657: i2 = A_offd_j[jj1]; |
1658: if(P_marker_offd[i2] >= jj_begin_row_offd && |
1659: (sgn*A_offd_data[jj1]) < 0) |
1660: P_offd_data[P_marker_offd[i2]] += |
[...] |
1667: diagonal += A_diag_data[jj]; |
1668: } |
1669: } |
1670: /* neighbor i1 weakly influences i, accumulate a_(i,i1) into |
1671: * diagonal */ |
1672: else if (CF_marker[i1] != -3) |
1673: { |
1674: if(num_functions == 1 || dof_func[i] == dof_func[i1]) |
1675: diagonal += A_diag_data[jj]; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.84 |
CQA speedup if FP arith vectorized | 2.60 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.36 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildExtPIInterp.extracted |
Source | par_lr_interp.c:1221-1221,par_lr_interp.c:1609-1609,par_lr_interp.c:1612-1617,par_lr_interp.c:1621-1621,par_lr_interp.c:1624-1624,par_lr_interp.c:1627-1627,par_lr_interp.c:1630-1632,par_lr_interp.c:1635-1636,par_lr_interp.c:1640-1650,par_lr_interp.c:1653-1655,par_lr_interp.c:1659-1659,par_lr_interp.c:1667-1667,par_lr_interp.c:1672-1675 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 27.67 |
CQA cycles if no scalar integer | 15.00 |
CQA cycles if FP arith vectorized | 10.65 |
CQA cycles if fully vectorized | 3.46 |
Front-end cycles | 27.67 |
DIV/SQRT cycles | 16.50 |
P0 cycles | 15.20 |
P1 cycles | 20.33 |
P2 cycles | 20.33 |
P3 cycles | 4.00 |
P4 cycles | 15.40 |
P5 cycles | 16.50 |
P6 cycles | 4.00 |
P7 cycles | 4.00 |
P8 cycles | 4.00 |
P9 cycles | 15.40 |
P10 cycles | 20.33 |
P11 cycles | 4.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 27.96 - 27.98 |
Stall cycles (UFS) | 0.00 |
Nb insns | 160.00 |
Nb uops | 162.00 |
Nb loads | 61.00 |
Nb stores | 8.00 |
Nb stack references | 17.00 |
FLOP/cycle | 0.36 |
Nb FLOP add-sub | 3.00 |
Nb FLOP mul | 2.00 |
Nb FLOP fma | 2.00 |
Nb FLOP div | 1.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 19.95 |
Bytes prefetched | 0.00 |
Bytes loaded | 488.00 |
Bytes stored | 64.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 3.45 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 6.06 |
Vector-efficiency ratio all | 12.93 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | 12.50 |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 13.26 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.84 |
CQA speedup if FP arith vectorized | 2.60 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.36 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildExtPIInterp.extracted |
Source | par_lr_interp.c:1221-1221,par_lr_interp.c:1609-1609,par_lr_interp.c:1612-1617,par_lr_interp.c:1621-1621,par_lr_interp.c:1624-1624,par_lr_interp.c:1627-1627,par_lr_interp.c:1630-1632,par_lr_interp.c:1635-1636,par_lr_interp.c:1640-1650,par_lr_interp.c:1653-1655,par_lr_interp.c:1659-1659,par_lr_interp.c:1667-1667,par_lr_interp.c:1672-1675 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 27.67 |
CQA cycles if no scalar integer | 15.00 |
CQA cycles if FP arith vectorized | 10.65 |
CQA cycles if fully vectorized | 3.46 |
Front-end cycles | 27.67 |
DIV/SQRT cycles | 16.50 |
P0 cycles | 15.20 |
P1 cycles | 20.33 |
P2 cycles | 20.33 |
P3 cycles | 4.00 |
P4 cycles | 15.40 |
P5 cycles | 16.50 |
P6 cycles | 4.00 |
P7 cycles | 4.00 |
P8 cycles | 4.00 |
P9 cycles | 15.40 |
P10 cycles | 20.33 |
P11 cycles | 4.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 27.96 - 27.98 |
Stall cycles (UFS) | 0.00 |
Nb insns | 160.00 |
Nb uops | 162.00 |
Nb loads | 61.00 |
Nb stores | 8.00 |
Nb stack references | 17.00 |
FLOP/cycle | 0.36 |
Nb FLOP add-sub | 3.00 |
Nb FLOP mul | 2.00 |
Nb FLOP fma | 2.00 |
Nb FLOP div | 1.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 19.95 |
Bytes prefetched | 0.00 |
Bytes loaded | 488.00 |
Bytes stored | 64.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 3.45 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 6.06 |
Vector-efficiency ratio all | 12.93 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | 12.50 |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 13.26 |
Path / |
Function | hypre_BoomerAMGBuildExtPIInterp.extracted |
Source file and lines | par_lr_interp.c:1221-1675 |
Module | libparcsr_ls.so |
nb instructions | 160 |
nb uops | 162 |
loop length | 746 |
used x86 registers | 13 |
used mmx registers | 0 |
used xmm registers | 7 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 17 |
ADD-SUB / MUL ratio | 1.50 |
micro-operation queue | 27.67 cycles |
front end | 27.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 16.50 | 15.20 | 20.33 | 20.33 | 4.00 | 15.40 | 16.50 | 4.00 | 4.00 | 4.00 | 15.40 | 20.33 |
cycles | 16.50 | 15.20 | 20.33 | 20.33 | 4.00 | 15.40 | 16.50 | 4.00 | 4.00 | 4.00 | 15.40 | 20.33 |
Cycles executing div or sqrt instructions | 4.00 |
FE+BE cycles | 27.96-27.98 |
Stall cycles | 0.00 |
Front-end | 27.67 |
Dispatch | 20.33 |
DIV/SQRT | 4.00 |
Overall L1 | 27.67 |
all | 2% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 3% |
all | 5% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | 0% |
other | 16% |
all | 3% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | 0% |
other | 6% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 13% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | 12% |
div/sqrt | 12% |
other | 14% |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | 12% |
div/sqrt | 12% |
other | 13% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0xa0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RCX,%RAX,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDSD (%RDX,%R9,8),%XMM5,%XMM5 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMOVSD %XMM5,(%RCX,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP -0xb8(%RBP),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 5be3c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1dec> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%RBX,%R9,8),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R13,%R10,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 5b620 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x15d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP -0x78(%RBP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 5b750 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1700> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x190(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%R10,8),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPXOR %XMM5,%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x50(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VUCOMISD (%RDX,%R11,8),%XMM5 | 2 | 1 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R10,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%RCX,%R10,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SETBE %AL | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
LEA -0x1(%RAX,%RAX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%R11),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RCX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R11,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JGE 5b790 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1740> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDQ -0xb0(%RBP),%XMM10,%XMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
NOT %R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RCX,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R11,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x4,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 5b851 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1801> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x68(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 5b790 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1740> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDX,%RAX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JMP 5b6fc <hypre_BoomerAMGBuildExtPIInterp.extracted+0x16ac> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0xf8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $-0x3,(%RAX,%R10,8) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 5b63e <hypre_BoomerAMGBuildExtPIInterp.extracted+0x15ee> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x1,-0x188(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 5b781 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1731> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x180(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%R14,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP (%RCX,%R10,8),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 5b63e <hypre_BoomerAMGBuildExtPIInterp.extracted+0x15ee> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDSD (%RAX,%R9,8),%XMM4,%XMM4 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
JMP 5b63e <hypre_BoomerAMGBuildExtPIInterp.extracted+0x15ee> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0xd8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x2,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 5bab0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1a60> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x170(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xc0(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R11,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDX,%R11,8),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 5bab0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1a60> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDQ -0xb0(%RBP),%XMM10,%XMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
CMP $0x4,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 5b9a0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1950> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xd0(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R11,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 5ba9c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1a4c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x98(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 5b81c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x17cc> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x68(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SHR $0x2,%R12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x20(,%RAX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VXORPD %XMM7,%XMM7,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 5b87d <hypre_BoomerAMGBuildExtPIInterp.extracted+0x182d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
SHR $0x2,%R15 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(,%RAX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 5b9bd <hypre_BoomerAMGBuildExtPIInterp.extracted+0x196d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x98(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VUCOMISD %XMM0,%XMM5 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RAX,%R9,8),%XMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 5bb55 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1b05> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VDIVSD %XMM5,%XMM6,%XMM5 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 4 |
CMP %RCX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x48(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 5bb73 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1b23> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDQ -0xb0(%RBP),%XMM10,%XMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOT %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ECX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST $0x1,%AL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 5bb6a <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1b1a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x8(%RBX,%RDX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R13,%RAX,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 5bb2a <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1ada> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x50(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x8(%R10,%R11,8),%XMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD %XMM6,%XMM7,%XMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VUCOMISD %XMM0,%XMM8 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JAE 5bb2a <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1ada> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xa0(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R10),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD213SD (%R10,%RDX,8),%XMM5,%XMM7 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM7,(%R10,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R14,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 5bb62 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1b12> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x8(%RAX,%RDX,8),%XMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD %XMM6,%XMM7,%XMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD213SD %XMM4,%XMM5,%XMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPSD $0x1,%XMM0,%XMM8,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVSD %XMM7,%XMM4,%XMM4{%K1} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JMP 5bb66 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1b16> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
VADDSD %XMM4,%XMM6,%XMM4 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOV -0x48(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 5b63e <hypre_BoomerAMGBuildExtPIInterp.extracted+0x15ee> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x2(%RDX),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x2(%RCX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 5bbd9 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1b89> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x2,-0x68(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 5b63e <hypre_BoomerAMGBuildExtPIInterp.extracted+0x15ee> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x170(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xc0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RDX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%RDX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 5b63e <hypre_BoomerAMGBuildExtPIInterp.extracted+0x15ee> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDQ -0xb0(%RBP),%XMM10,%XMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
CMP $0x4,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 5bce9 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1c99> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R10,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R10,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 5b63e <hypre_BoomerAMGBuildExtPIInterp.extracted+0x15ee> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 5bcac <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1c5c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV %R10,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(,%RAX,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 5bd0d <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1cbd> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
Function | hypre_BoomerAMGBuildExtPIInterp.extracted |
Source file and lines | par_lr_interp.c:1221-1675 |
Module | libparcsr_ls.so |
nb instructions | 160 |
nb uops | 162 |
loop length | 746 |
used x86 registers | 13 |
used mmx registers | 0 |
used xmm registers | 7 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 17 |
ADD-SUB / MUL ratio | 1.50 |
micro-operation queue | 27.67 cycles |
front end | 27.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 16.50 | 15.20 | 20.33 | 20.33 | 4.00 | 15.40 | 16.50 | 4.00 | 4.00 | 4.00 | 15.40 | 20.33 |
cycles | 16.50 | 15.20 | 20.33 | 20.33 | 4.00 | 15.40 | 16.50 | 4.00 | 4.00 | 4.00 | 15.40 | 20.33 |
Cycles executing div or sqrt instructions | 4.00 |
FE+BE cycles | 27.96-27.98 |
Stall cycles | 0.00 |
Front-end | 27.67 |
Dispatch | 20.33 |
DIV/SQRT | 4.00 |
Overall L1 | 27.67 |
all | 2% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 3% |
all | 5% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | 0% |
other | 16% |
all | 3% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | 0% |
other | 6% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 13% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | 12% |
div/sqrt | 12% |
other | 14% |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | 12% |
div/sqrt | 12% |
other | 13% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0xa0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RCX,%RAX,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDSD (%RDX,%R9,8),%XMM5,%XMM5 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMOVSD %XMM5,(%RCX,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP -0xb8(%RBP),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 5be3c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1dec> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%RBX,%R9,8),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R13,%R10,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 5b620 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x15d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP -0x78(%RBP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 5b750 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1700> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x190(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%R10,8),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPXOR %XMM5,%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x50(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VUCOMISD (%RDX,%R11,8),%XMM5 | 2 | 1 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R10,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%RCX,%R10,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SETBE %AL | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
LEA -0x1(%RAX,%RAX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%R11),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RCX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R11,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JGE 5b790 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1740> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDQ -0xb0(%RBP),%XMM10,%XMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
NOT %R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RCX,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R11,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x4,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 5b851 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1801> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x68(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 5b790 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1740> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDX,%RAX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JMP 5b6fc <hypre_BoomerAMGBuildExtPIInterp.extracted+0x16ac> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0xf8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $-0x3,(%RAX,%R10,8) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 5b63e <hypre_BoomerAMGBuildExtPIInterp.extracted+0x15ee> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x1,-0x188(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 5b781 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1731> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x180(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%R14,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP (%RCX,%R10,8),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 5b63e <hypre_BoomerAMGBuildExtPIInterp.extracted+0x15ee> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDSD (%RAX,%R9,8),%XMM4,%XMM4 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
JMP 5b63e <hypre_BoomerAMGBuildExtPIInterp.extracted+0x15ee> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0xd8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x2,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 5bab0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1a60> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x170(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xc0(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R11,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDX,%R11,8),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 5bab0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1a60> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDQ -0xb0(%RBP),%XMM10,%XMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
CMP $0x4,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 5b9a0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1950> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xd0(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R11,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 5ba9c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1a4c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x98(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 5b81c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x17cc> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x68(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SHR $0x2,%R12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x20(,%RAX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VXORPD %XMM7,%XMM7,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 5b87d <hypre_BoomerAMGBuildExtPIInterp.extracted+0x182d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
SHR $0x2,%R15 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(,%RAX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 5b9bd <hypre_BoomerAMGBuildExtPIInterp.extracted+0x196d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x98(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VUCOMISD %XMM0,%XMM5 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RAX,%R9,8),%XMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 5bb55 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1b05> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VDIVSD %XMM5,%XMM6,%XMM5 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 4 |
CMP %RCX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x48(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 5bb73 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1b23> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDQ -0xb0(%RBP),%XMM10,%XMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOT %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ECX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST $0x1,%AL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 5bb6a <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1b1a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x8(%RBX,%RDX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R13,%RAX,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 5bb2a <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1ada> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x50(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x8(%R10,%R11,8),%XMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD %XMM6,%XMM7,%XMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VUCOMISD %XMM0,%XMM8 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JAE 5bb2a <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1ada> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xa0(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R10),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD213SD (%R10,%RDX,8),%XMM5,%XMM7 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM7,(%R10,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R14,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 5bb62 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1b12> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x8(%RAX,%RDX,8),%XMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD %XMM6,%XMM7,%XMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD213SD %XMM4,%XMM5,%XMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPSD $0x1,%XMM0,%XMM8,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVSD %XMM7,%XMM4,%XMM4{%K1} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JMP 5bb66 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1b16> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
VADDSD %XMM4,%XMM6,%XMM4 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOV -0x48(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 5b63e <hypre_BoomerAMGBuildExtPIInterp.extracted+0x15ee> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x2(%RDX),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x2(%RCX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 5bbd9 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1b89> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x2,-0x68(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 5b63e <hypre_BoomerAMGBuildExtPIInterp.extracted+0x15ee> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x170(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xc0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RDX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%RDX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 5b63e <hypre_BoomerAMGBuildExtPIInterp.extracted+0x15ee> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDQ -0xb0(%RBP),%XMM10,%XMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
CMP $0x4,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 5bce9 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1c99> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R10,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R10,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 5b63e <hypre_BoomerAMGBuildExtPIInterp.extracted+0x15ee> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 5bcac <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1c5c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV %R10,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(,%RAX,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 5bd0d <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1cbd> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |