Loop Id: 762 | Module: exec | Source: par_lr_interp.c:1264-1532 [...] | Coverage: 0.01% |
---|
Loop Id: 762 | Module: exec | Source: par_lr_interp.c:1264-1532 [...] | Coverage: 0.01% |
---|
0x47cd68 MOV (%R11,%RAX,8),%RDX |
0x47cd6c ADD %R13,%RDI |
0x47cd6f CMP %RDX,(%RDI) |
0x47cd72 JGE 47cd83 |
0x47cd74 MOV %RBX,(%RDI) |
0x47cd77 MOV -0x50(%RBP),%R15 |
0x47cd7b INC %RBX |
0x47cd7e MOV 0x8(%R15,%RAX,8),%R12 |
0x47cd83 INC %RSI |
0x47cd86 CMP %R12,%RSI |
0x47cd89 JGE 47ce30 |
0x47cd8f MOV (%R10,%RSI,8),%R9 |
0x47cd93 MOV (%R14,%R9,8),%R15 |
0x47cd97 LEA (,%R9,8),%RDI |
0x47cd9f TEST %R15,%R15 |
0x47cda2 JNS 47cd68 |
0x47cda4 CMP $-0x3,%R15 |
0x47cda8 JE 47cd83 |
0x47cdaa MOV -0x50(%RBP),%R15 |
0x47cdae ADD $0x8,%RDI |
0x47cdb2 MOV (%R15,%R9,8),%RDX |
0x47cdb6 ADD %RDI,%R15 |
0x47cdb9 MOV (%R15),%R12 |
0x47cdbc CMP %R12,%RDX |
0x47cdbf JGE 47ce0e |
0x47cdc1 MOV %R8,-0x128(%RBP) |
0x47cdc8 MOV %RSI,-0x130(%RBP) |
0x47cdcf NOP |
(765) 0x47cdd0 MOV (%R10,%RDX,8),%R8 |
(765) 0x47cdd4 CMPQ $0,(%R14,%R8,8) |
(765) 0x47cdd9 LEA (,%R8,8),%RSI |
(765) 0x47cde1 JS 47cdf8 |
(765) 0x47cde3 ADD %R13,%RSI |
(765) 0x47cde6 MOV (%RSI),%R8 |
(765) 0x47cde9 CMP %R8,(%R11,%RAX,8) |
(765) 0x47cded JLE 47cdf8 |
(765) 0x47cdef MOV %RBX,(%RSI) |
(765) 0x47cdf2 INC %RBX |
(765) 0x47cdf5 MOV (%R15),%R12 |
(765) 0x47cdf8 INC %RDX |
(765) 0x47cdfb CMP %R12,%RDX |
(765) 0x47cdfe JL 47cdd0 |
0x47ce00 MOV -0x128(%RBP),%R8 |
0x47ce07 MOV -0x130(%RBP),%RSI |
0x47ce0e CMPQ $0x1,(%R8) |
0x47ce12 JG 47e750 |
0x47ce18 MOV -0x50(%RBP),%RDI |
0x47ce1c INC %RSI |
0x47ce1f MOV 0x8(%RDI,%RAX,8),%R12 |
0x47ce24 CMP %R12,%RSI |
0x47ce27 JL 47cd8f |
0x47e750 MOV -0x68(%RBP),%R15 |
0x47e754 MOV (%R15,%R9,8),%RDX |
0x47e758 ADD %R15,%RDI |
0x47e75b CMP (%RDI),%RDX |
0x47e75e JGE 47ce18 |
0x47e764 MOV -0x70(%RBP),%R9 |
0x47e768 CMPQ $0,-0x178(%RBP) |
0x47e770 MOV 0xf0(%R9),%R12 |
0x47e777 MOV (%R12),%R15 |
0x47e77b JE 4804a0 |
0x47e781 MOV %R10,-0x130(%RBP) |
0x47e788 MOV %R8,-0x2f0(%RBP) |
0x47e78f MOV %R13,-0x128(%RBP) |
0x47e796 MOV -0xf8(%RBP),%R13 |
0x47e79d MOV %RSI,-0x270(%RBP) |
0x47e7a4 MOV -0x178(%RBP),%RSI |
0x47e7ab NOPL (%RAX,%RAX,1) |
(764) 0x47e7b0 MOV (%R13,%RDX,8),%R10 |
(764) 0x47e7b5 MOV (%RSI,%R10,8),%R9 |
(764) 0x47e7b9 CMPQ $0,(%R15,%R9,8) |
(764) 0x47e7be LEA (,%R9,8),%R12 |
(764) 0x47e7c6 JS 47e7f3 |
(764) 0x47e7c8 MOV -0x60(%RBP),%R8 |
(764) 0x47e7cc ADD %R8,%R12 |
(764) 0x47e7cf MOV -0x38(%RBP),%R8 |
(764) 0x47e7d3 MOV (%R12),%R10 |
(764) 0x47e7d7 CMP %R10,(%R8,%RAX,8) |
(764) 0x47e7db JLE 47e7f3 |
(764) 0x47e7dd MOV -0xf0(%RBP),%R8 |
(764) 0x47e7e4 MOVQ $0x1,(%R8,%R9,8) |
(764) 0x47e7ec MOV %RCX,(%R12) |
(764) 0x47e7f0 INC %RCX |
(764) 0x47e7f3 INC %RDX |
(764) 0x47e7f6 CMP %RDX,(%RDI) |
(764) 0x47e7f9 JG 47e7b0 |
0x47e7fb MOV -0x128(%RBP),%R13 |
0x47e802 MOV -0x130(%RBP),%R10 |
0x47e809 MOV -0x2f0(%RBP),%R8 |
0x47e810 MOV -0x270(%RBP),%RSI |
0x47e817 JMP 47ce18 |
0x4804a0 MOV %R10,-0x128(%RBP) |
0x4804a7 MOV %R8,-0x130(%RBP) |
0x4804ae MOV %RSI,-0x2f0(%RBP) |
0x4804b5 MOV -0xf8(%RBP),%RSI |
0x4804bc NOPL (%RAX) |
(763) 0x4804c0 MOV (%RSI,%RDX,8),%R9 |
(763) 0x4804c4 CMPQ $0,(%R15,%R9,8) |
(763) 0x4804c9 LEA (,%R9,8),%R12 |
(763) 0x4804d1 JS 4804fe |
(763) 0x4804d3 MOV -0x60(%RBP),%R8 |
(763) 0x4804d7 ADD %R8,%R12 |
(763) 0x4804da MOV -0x38(%RBP),%R8 |
(763) 0x4804de MOV (%R12),%R10 |
(763) 0x4804e2 CMP %R10,(%R8,%RAX,8) |
(763) 0x4804e6 JLE 4804fe |
(763) 0x4804e8 MOV -0xf0(%RBP),%R8 |
(763) 0x4804ef MOVQ $0x1,(%R8,%R9,8) |
(763) 0x4804f7 MOV %RCX,(%R12) |
(763) 0x4804fb INC %RCX |
(763) 0x4804fe INC %RDX |
(763) 0x480501 CMP %RDX,(%RDI) |
(763) 0x480504 JG 4804c0 |
0x480506 MOV -0x128(%RBP),%R10 |
0x48050d MOV -0x130(%RBP),%R8 |
0x480514 MOV -0x2f0(%RBP),%RSI |
0x48051b JMP 47ce18 |
/home/eoseret/qaas_runs_CPU_9468/171-147-2675/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c: 1264 - 1532 |
-------------------------------------------------------------------------------- |
1264: for (jj = S_diag_i[i]; jj < S_diag_i[i+1]; jj++) |
1265: { |
1266: i1 = S_diag_j[jj]; |
1267: if (CF_marker[i1] >= 0) |
1268: { /* i1 is a C point */ |
1269: if (P_marker[i1] < P_diag_i[i]) |
1270: { |
1271: P_marker[i1] = jj_counter; |
1272: jj_counter++; |
1273: } |
1274: } |
1275: else if (CF_marker[i1] != -3) |
1276: { /* i1 is a F point, loop through it's strong neighbors */ |
1277: for (kk = S_diag_i[i1]; kk < S_diag_i[i1+1]; kk++) |
1278: { |
1279: k1 = S_diag_j[kk]; |
1280: if (CF_marker[k1] >= 0) |
1281: { |
1282: if(P_marker[k1] < P_diag_i[i]) |
1283: { |
1284: P_marker[k1] = jj_counter; |
1285: jj_counter++; |
1286: } |
1287: } |
1288: } |
1289: if(num_procs > 1) |
1290: { |
1291: for (kk = S_offd_i[i1]; kk < S_offd_i[i1+1]; kk++) |
1292: { |
1293: if(col_offd_S_to_A) |
1294: k1 = col_offd_S_to_A[S_offd_j[kk]]; |
1295: else |
1296: k1 = S_offd_j[kk]; |
1297: if (CF_marker_offd[k1] >= 0) |
1298: { |
1299: if(P_marker_offd[k1] < P_offd_i[i]) |
1300: { |
1301: tmp_CF_marker_offd[k1] = 1; |
1302: P_marker_offd[k1] = jj_counter_offd; |
1303: jj_counter_offd++; |
[...] |
1532: for (kk = S_offd_i[i1]; kk < S_offd_i[i1+1]; kk++) |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.10 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildExtPIInterp._omp_fn.0 |
Source | par_lr_interp.c:1264-1264,par_lr_interp.c:1267-1272,par_lr_interp.c:1275-1277,par_lr_interp.c:1289-1291,par_lr_interp.c:1297-1297,par_lr_interp.c:1532-1532 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 11.33 |
CQA cycles if no scalar integer | 11.33 |
CQA cycles if FP arith vectorized | 11.33 |
CQA cycles if fully vectorized | 1.42 |
Front-end cycles | 11.33 |
DIV/SQRT cycles | 4.50 |
P0 cycles | 4.00 |
P1 cycles | 10.33 |
P2 cycles | 10.33 |
P3 cycles | 5.00 |
P4 cycles | 4.00 |
P5 cycles | 4.50 |
P6 cycles | 5.00 |
P7 cycles | 5.00 |
P8 cycles | 5.00 |
P9 cycles | 4.00 |
P10 cycles | 10.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 12.08 |
Stall cycles (UFS) | 0.56 |
Nb insns | 68.00 |
Nb uops | 68.00 |
Nb loads | 31.00 |
Nb stores | 10.00 |
Nb stack references | 9.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 28.94 |
Bytes prefetched | 0.00 |
Bytes loaded | 248.00 |
Bytes stored | 80.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.10 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildExtPIInterp._omp_fn.0 |
Source | par_lr_interp.c:1264-1264,par_lr_interp.c:1267-1272,par_lr_interp.c:1275-1277,par_lr_interp.c:1289-1291,par_lr_interp.c:1297-1297,par_lr_interp.c:1532-1532 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 11.33 |
CQA cycles if no scalar integer | 11.33 |
CQA cycles if FP arith vectorized | 11.33 |
CQA cycles if fully vectorized | 1.42 |
Front-end cycles | 11.33 |
DIV/SQRT cycles | 4.50 |
P0 cycles | 4.00 |
P1 cycles | 10.33 |
P2 cycles | 10.33 |
P3 cycles | 5.00 |
P4 cycles | 4.00 |
P5 cycles | 4.50 |
P6 cycles | 5.00 |
P7 cycles | 5.00 |
P8 cycles | 5.00 |
P9 cycles | 4.00 |
P10 cycles | 10.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 12.08 |
Stall cycles (UFS) | 0.56 |
Nb insns | 68.00 |
Nb uops | 68.00 |
Nb loads | 31.00 |
Nb stores | 10.00 |
Nb stack references | 9.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 28.94 |
Bytes prefetched | 0.00 |
Bytes loaded | 248.00 |
Bytes stored | 80.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | hypre_BoomerAMGBuildExtPIInterp._omp_fn.0 |
Source file and lines | par_lr_interp.c:1264-1532 |
Module | exec |
nb instructions | 68 |
nb uops | 68 |
loop length | 336 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 9 |
micro-operation queue | 11.33 cycles |
front end | 11.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 4.50 | 4.00 | 10.33 | 10.33 | 5.00 | 4.00 | 4.50 | 5.00 | 5.00 | 5.00 | 4.00 | 10.33 |
cycles | 4.50 | 4.00 | 10.33 | 10.33 | 5.00 | 4.00 | 4.50 | 5.00 | 5.00 | 5.00 | 4.00 | 10.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 12.08 |
Stall cycles | 0.56 |
LM full (events) | 2.45 |
Front-end | 11.33 |
Dispatch | 10.33 |
Overall L1 | 11.33 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV (%R11,%RAX,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R13,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %RDX,(%RDI) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 47cd83 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x323> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RBX,(%RDI) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x50(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x8(%R15,%RAX,8),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R12,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 47ce30 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R10,%RSI,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14,%R9,8),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (,%R9,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
TEST %R15,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNS 47cd68 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x308> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $-0x3,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47cd83 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x323> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x50(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x8,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV (%R15,%R9,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDI,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV (%R15),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R12,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 47ce0e <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3ae> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R8,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x128(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x130(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0x1,(%R8) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JG 47e750 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1cf0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x50(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x8(%RDI,%RAX,8),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R12,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 47cd8f <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x32f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x68(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R15,%R9,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R15,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP (%RDI),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 47ce18 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3b8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x70(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0,-0x178(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV 0xf0(%R9),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 4804a0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3a40> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R10,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0x2f0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xf8(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,-0x270(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x178(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x128(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x130(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x2f0(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x270(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 47ce18 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3b8> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV %R10,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,-0x2f0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xf8(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x128(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x130(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x2f0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 47ce18 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3b8> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
Function | hypre_BoomerAMGBuildExtPIInterp._omp_fn.0 |
Source file and lines | par_lr_interp.c:1264-1532 |
Module | exec |
nb instructions | 68 |
nb uops | 68 |
loop length | 336 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 9 |
micro-operation queue | 11.33 cycles |
front end | 11.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 4.50 | 4.00 | 10.33 | 10.33 | 5.00 | 4.00 | 4.50 | 5.00 | 5.00 | 5.00 | 4.00 | 10.33 |
cycles | 4.50 | 4.00 | 10.33 | 10.33 | 5.00 | 4.00 | 4.50 | 5.00 | 5.00 | 5.00 | 4.00 | 10.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 12.08 |
Stall cycles | 0.56 |
LM full (events) | 2.45 |
Front-end | 11.33 |
Dispatch | 10.33 |
Overall L1 | 11.33 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV (%R11,%RAX,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R13,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %RDX,(%RDI) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 47cd83 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x323> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RBX,(%RDI) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x50(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x8(%R15,%RAX,8),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R12,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 47ce30 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R10,%RSI,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14,%R9,8),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (,%R9,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
TEST %R15,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNS 47cd68 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x308> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $-0x3,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47cd83 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x323> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x50(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x8,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV (%R15,%R9,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDI,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV (%R15),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R12,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 47ce0e <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3ae> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R8,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x128(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x130(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0x1,(%R8) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JG 47e750 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1cf0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x50(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x8(%RDI,%RAX,8),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R12,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 47cd8f <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x32f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x68(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R15,%R9,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R15,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP (%RDI),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 47ce18 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3b8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x70(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0,-0x178(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV 0xf0(%R9),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 4804a0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3a40> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R10,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0x2f0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xf8(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,-0x270(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x178(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x128(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x130(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x2f0(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x270(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 47ce18 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3b8> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV %R10,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,-0x2f0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xf8(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x128(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x130(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x2f0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 47ce18 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3b8> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |