Loop Id: 2535 | Module: exec | Source: par_strength.c:1714-1797 [...] | Coverage: 0.01% |
---|
Loop Id: 2535 | Module: exec | Source: par_strength.c:1714-1797 [...] | Coverage: 0.01% |
---|
0x48f1e0 INC %RAX |
0x48f1e3 MOV %R8,%RCX |
0x48f1e6 MOV %RSI,%RDX |
0x48f1e9 CMP -0x80(%RBP),%RAX |
0x48f1ed JE 48fae7 |
0x48f1f3 MOV 0xa0(%RBP),%RSI |
0x48f1fa MOV (%RSI,%RAX,8),%RDI |
0x48f1fe MOV 0x28(%RBP),%RSI |
0x48f202 MOV %RCX,(%RSI,%RAX,8) |
0x48f206 MOV 0x48(%RBP),%RSI |
0x48f20a CMPQ $0,(%RSI) |
0x48f20e JE 48f218 |
0x48f210 MOV 0x38(%RBP),%RSI |
0x48f214 MOV %RDX,(%RSI,%RAX,8) |
0x48f218 MOV -0x58(%RBP),%R10 |
0x48f21c MOV (%R10,%RDI,8),%R9 |
0x48f220 MOV %RDX,%RSI |
0x48f223 MOV %RCX,%R8 |
0x48f226 MOV %RDI,-0x90(%RBP) |
0x48f22d CMP 0x8(%R10,%RDI,8),%R9 |
0x48f232 MOV -0x70(%RBP),%R12 |
0x48f236 MOV -0x48(%RBP),%R13 |
0x48f23a JGE 48f360 |
0x48f240 MOV %RDX,%RSI |
0x48f243 MOV %RCX,%R8 |
0x48f246 JMP 48f270 |
(2539) 0x48f250 INC %R9 |
(2539) 0x48f253 MOV -0x58(%RBP),%R10 |
(2539) 0x48f257 MOV -0x90(%RBP),%RDI |
(2539) 0x48f25e CMP 0x8(%R10,%RDI,8),%R9 |
(2539) 0x48f263 MOV -0x88(%RBP),%RBX |
(2539) 0x48f26a JGE 48f360 |
(2539) 0x48f270 MOV (%R12,%R9,8),%R10 |
(2539) 0x48f274 MOV -0x50(%RBP),%R11 |
(2539) 0x48f278 CMPQ $0,(%R11,%R10,8) |
(2539) 0x48f27d JLE 48f29a |
(2539) 0x48f27f MOV 0x78(%RBP),%RDI |
(2539) 0x48f283 MOV (%RDI,%R10,8),%R11 |
(2539) 0x48f287 CMP %RCX,(%R13,%R11,8) |
(2539) 0x48f28c JGE 48f29a |
(2539) 0x48f28e MOV %R8,(%R13,%R11,8) |
(2539) 0x48f293 INC %R8 |
(2539) 0x48f296 MOV %R8,-0x30(%RBP) |
(2539) 0x48f29a MOV -0x58(%RBP),%RBX |
(2539) 0x48f29e MOV (%RBX,%R10,8),%R11 |
(2539) 0x48f2a2 MOV 0x8(%RBX,%R10,8),%RBX |
(2539) 0x48f2a7 JMP 48f2b3 |
(2541) 0x48f2b0 INC %R11 |
(2541) 0x48f2b3 CMP %RBX,%R11 |
(2541) 0x48f2b6 JGE 48f300 |
(2541) 0x48f2b8 MOV (%R12,%R11,8),%R15 |
(2541) 0x48f2bc MOV -0x50(%RBP),%RDI |
(2541) 0x48f2c0 CMPQ $0,(%RDI,%R15,8) |
(2541) 0x48f2c5 JLE 48f2b0 |
(2541) 0x48f2c7 MOV 0x78(%RBP),%RDI |
(2541) 0x48f2cb MOV (%RDI,%R15,8),%R15 |
(2541) 0x48f2cf CMP %RAX,%R15 |
(2541) 0x48f2d2 JE 48f2b0 |
(2541) 0x48f2d4 CMP %RCX,(%R13,%R15,8) |
(2541) 0x48f2d9 JGE 48f2b0 |
(2541) 0x48f2db MOV %R8,(%R13,%R15,8) |
(2541) 0x48f2e0 INC %R8 |
(2541) 0x48f2e3 MOV %R8,-0x30(%RBP) |
(2541) 0x48f2e7 MOV -0x58(%RBP),%RBX |
(2541) 0x48f2eb MOV 0x8(%RBX,%R10,8),%RBX |
(2541) 0x48f2f0 JMP 48f2b0 |
(2539) 0x48f300 MOV 0x10(%RBP),%RDI |
(2539) 0x48f304 MOV (%RDI,%R10,8),%R11 |
(2539) 0x48f308 MOV 0x8(%RDI,%R10,8),%RBX |
(2539) 0x48f30d JMP 48f313 |
(2540) 0x48f310 INC %R11 |
(2540) 0x48f313 CMP %RBX,%R11 |
(2540) 0x48f316 JGE 48f250 |
(2540) 0x48f31c MOV 0x18(%RBP),%RDI |
(2540) 0x48f320 MOV (%RDI,%R11,8),%R15 |
(2540) 0x48f324 MOV 0x70(%RBP),%RDI |
(2540) 0x48f328 CMPQ $0,(%RDI,%R15,8) |
(2540) 0x48f32d JLE 48f310 |
(2540) 0x48f32f MOV 0x80(%RBP),%RDI |
(2540) 0x48f336 MOV (%RDI,%R15,8),%R15 |
(2540) 0x48f33a CMP %RDX,(%R14,%R15,8) |
(2540) 0x48f33e JGE 48f310 |
(2540) 0x48f340 MOV %RSI,(%R14,%R15,8) |
(2540) 0x48f344 INC %RSI |
(2540) 0x48f347 MOV %RSI,-0x38(%RBP) |
(2540) 0x48f34b MOV 0x10(%RBP),%RDI |
(2540) 0x48f34f MOV 0x8(%RDI,%R10,8),%RBX |
(2540) 0x48f354 JMP 48f310 |
0x48f360 MOV 0x10(%RBP),%RDI |
0x48f364 MOV -0x90(%RBP),%R13 |
0x48f36b MOV (%RDI,%R13,8),%R9 |
0x48f36f CMP 0x8(%RDI,%R13,8),%R9 |
0x48f374 JL 48f399 |
0x48f376 JMP 48f1e0 |
(2536) 0x48f380 INC %R9 |
(2536) 0x48f383 MOV 0x10(%RBP),%RDI |
(2536) 0x48f387 CMP 0x8(%RDI,%R13,8),%R9 |
(2536) 0x48f38c MOV -0x88(%RBP),%RBX |
(2536) 0x48f393 JGE 48f1e0 |
(2536) 0x48f399 MOV 0x18(%RBP),%RDI |
(2536) 0x48f39d MOV (%RDI,%R9,8),%R10 |
(2536) 0x48f3a1 MOV 0x70(%RBP),%RDI |
(2536) 0x48f3a5 CMPQ $0,(%RDI,%R10,8) |
(2536) 0x48f3aa JLE 48f3c8 |
(2536) 0x48f3ac MOV 0x80(%RBP),%RDI |
(2536) 0x48f3b3 MOV (%RDI,%R10,8),%R11 |
(2536) 0x48f3b7 CMP %RDX,(%R14,%R11,8) |
(2536) 0x48f3bb JGE 48f3c8 |
(2536) 0x48f3bd MOV %RSI,(%R14,%R11,8) |
(2536) 0x48f3c1 INC %RSI |
(2536) 0x48f3c4 MOV %RSI,-0x38(%RBP) |
(2536) 0x48f3c8 MOV -0x48(%RBP),%R12 |
(2536) 0x48f3cc MOV 0x50(%RBP),%RDI |
(2536) 0x48f3d0 MOV (%RDI,%R10,8),%R11 |
(2536) 0x48f3d4 MOV 0x8(%RDI,%R10,8),%RBX |
(2536) 0x48f3d9 JMP 48f3e3 |
(2538) 0x48f3e0 INC %R11 |
(2538) 0x48f3e3 CMP %RBX,%R11 |
(2538) 0x48f3e6 JGE 48f420 |
(2538) 0x48f3e8 MOV 0x58(%RBP),%RDI |
(2538) 0x48f3ec MOV (%RDI,%R11,8),%R15 |
(2538) 0x48f3f0 CMP %RAX,%R15 |
(2538) 0x48f3f3 JE 48f3e0 |
(2538) 0x48f3f5 CMP %RCX,(%R12,%R15,8) |
(2538) 0x48f3f9 JGE 48f3e0 |
(2538) 0x48f3fb MOV %R8,(%R12,%R15,8) |
(2538) 0x48f3ff INC %R8 |
(2538) 0x48f402 MOV %R8,-0x30(%RBP) |
(2538) 0x48f406 MOV 0x50(%RBP),%RDI |
(2538) 0x48f40a MOV 0x8(%RDI,%R10,8),%RBX |
(2538) 0x48f40f JMP 48f3e0 |
(2536) 0x48f420 MOV 0x60(%RBP),%RDI |
(2536) 0x48f424 MOV (%RDI,%R10,8),%R11 |
(2536) 0x48f428 MOV 0x8(%RDI,%R10,8),%RBX |
(2536) 0x48f42d JMP 48f433 |
(2537) 0x48f430 INC %R11 |
(2537) 0x48f433 CMP %RBX,%R11 |
(2537) 0x48f436 JGE 48f380 |
(2537) 0x48f43c MOV 0x68(%RBP),%RDI |
(2537) 0x48f440 MOV (%RDI,%R11,8),%R15 |
(2537) 0x48f444 CMP %RDX,(%R14,%R15,8) |
(2537) 0x48f448 JGE 48f430 |
(2537) 0x48f44a MOV %RSI,(%R14,%R15,8) |
(2537) 0x48f44e INC %RSI |
(2537) 0x48f451 MOV %RSI,-0x38(%RBP) |
(2537) 0x48f455 MOV 0x60(%RBP),%RDI |
(2537) 0x48f459 MOV 0x8(%RDI,%R10,8),%RBX |
(2537) 0x48f45e JMP 48f430 |
/home/eoseret/qaas_runs_CPU_9468/171-147-2675/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c: 1714 - 1797 |
-------------------------------------------------------------------------------- |
1714: for (ic = ic_begin; ic < ic_end; ic++) |
[...] |
1720: HYPRE_Int i1 = coarse_to_fine[ic]; |
1721: |
1722: HYPRE_Int jj_row_begin_diag = num_nonzeros_diag; |
1723: HYPRE_Int jj_row_begin_offd = num_nonzeros_offd; |
1724: |
1725: C_diag_i[ic] = num_nonzeros_diag; |
1726: if (num_cols_offd_C) |
1727: { |
1728: C_offd_i[ic] = num_nonzeros_offd; |
1729: } |
1730: |
1731: for (jj1 = S_diag_i[i1]; jj1 < S_diag_i[i1+1]; jj1++) |
1732: { |
1733: i2 = S_diag_j[jj1]; |
1734: if (CF_marker[i2] > 0) |
1735: { |
1736: index = fine_to_coarse[i2]; |
1737: if (S_marker[index] < jj_row_begin_diag) |
1738: { |
1739: S_marker[index] = num_nonzeros_diag; |
1740: num_nonzeros_diag++; |
1741: } |
1742: } |
1743: for (jj2 = S_diag_i[i2]; jj2 < S_diag_i[i2+1]; jj2++) |
1744: { |
1745: i3 = S_diag_j[jj2]; |
1746: if (CF_marker[i3] > 0) |
1747: { |
1748: index = fine_to_coarse[i3]; |
1749: if (index != ic && S_marker[index] < jj_row_begin_diag) |
1750: { |
1751: S_marker[index] = num_nonzeros_diag; |
1752: num_nonzeros_diag++; |
1753: } |
1754: } |
1755: } |
1756: for (jj2 = S_offd_i[i2]; jj2 < S_offd_i[i2+1]; jj2++) |
1757: { |
1758: i3 = S_offd_j[jj2]; |
1759: if (CF_marker_offd[i3] > 0) |
1760: { |
1761: index = map_S_to_C[i3]; |
1762: if (S_marker_offd[index] < jj_row_begin_offd) |
1763: { |
1764: S_marker_offd[index] = num_nonzeros_offd; |
1765: num_nonzeros_offd++; |
1766: } |
1767: } |
1768: } |
1769: } |
1770: for (jj1 = S_offd_i[i1]; jj1 < S_offd_i[i1+1]; jj1++) |
1771: { |
1772: i2 = S_offd_j[jj1]; |
1773: if (CF_marker_offd[i2] > 0) |
1774: { |
1775: index = map_S_to_C[i2]; |
1776: if (S_marker_offd[index] < jj_row_begin_offd) |
1777: { |
1778: S_marker_offd[index] = num_nonzeros_offd; |
1779: num_nonzeros_offd++; |
1780: } |
1781: } |
1782: for (jj2 = S_ext_diag_i[i2]; jj2 < S_ext_diag_i[i2+1]; jj2++) |
1783: { |
1784: i3 = S_ext_diag_j[jj2]; |
1785: if (i3 != ic && S_marker[i3] < jj_row_begin_diag) |
1786: { |
1787: S_marker[i3] = num_nonzeros_diag; |
1788: num_nonzeros_diag++; |
1789: } |
1790: } |
1791: for (jj2 = S_ext_offd_i[i2]; jj2 < S_ext_offd_i[i2+1]; jj2++) |
1792: { |
1793: i3 = S_ext_offd_j[jj2]; |
1794: if (S_marker_offd[i3] < jj_row_begin_offd) |
1795: { |
1796: S_marker_offd[i3] = num_nonzeros_offd; |
1797: num_nonzeros_offd++; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.06 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGCreate2ndS.extracted.17 |
Source | par_strength.c:1714-1714,par_strength.c:1720-1720,par_strength.c:1725-1728,par_strength.c:1731-1731,par_strength.c:1756-1756,par_strength.c:1770-1770 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 5.67 |
CQA cycles if no scalar integer | 5.67 |
CQA cycles if FP arith vectorized | 5.67 |
CQA cycles if fully vectorized | 0.71 |
Front-end cycles | 5.67 |
DIV/SQRT cycles | 2.00 |
P0 cycles | 1.40 |
P1 cycles | 5.33 |
P2 cycles | 5.33 |
P3 cycles | 1.50 |
P4 cycles | 1.40 |
P5 cycles | 2.00 |
P6 cycles | 1.50 |
P7 cycles | 1.50 |
P8 cycles | 1.50 |
P9 cycles | 1.20 |
P10 cycles | 5.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 6.17 |
Stall cycles (UFS) | 0.33 |
Nb insns | 32.00 |
Nb uops | 32.00 |
Nb loads | 16.00 |
Nb stores | 3.00 |
Nb stack references | 10.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 26.82 |
Bytes prefetched | 0.00 |
Bytes loaded | 128.00 |
Bytes stored | 24.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.06 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGCreate2ndS.extracted.17 |
Source | par_strength.c:1714-1714,par_strength.c:1720-1720,par_strength.c:1725-1728,par_strength.c:1731-1731,par_strength.c:1756-1756,par_strength.c:1770-1770 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 5.67 |
CQA cycles if no scalar integer | 5.67 |
CQA cycles if FP arith vectorized | 5.67 |
CQA cycles if fully vectorized | 0.71 |
Front-end cycles | 5.67 |
DIV/SQRT cycles | 2.00 |
P0 cycles | 1.40 |
P1 cycles | 5.33 |
P2 cycles | 5.33 |
P3 cycles | 1.50 |
P4 cycles | 1.40 |
P5 cycles | 2.00 |
P6 cycles | 1.50 |
P7 cycles | 1.50 |
P8 cycles | 1.50 |
P9 cycles | 1.20 |
P10 cycles | 5.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 6.17 |
Stall cycles (UFS) | 0.33 |
Nb insns | 32.00 |
Nb uops | 32.00 |
Nb loads | 16.00 |
Nb stores | 3.00 |
Nb stack references | 10.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 26.82 |
Bytes prefetched | 0.00 |
Bytes loaded | 128.00 |
Bytes stored | 24.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | hypre_BoomerAMGCreate2ndS.extracted.17 |
Source file and lines | par_strength.c:1714-1797 |
Module | exec |
nb instructions | 32 |
nb uops | 32 |
loop length | 131 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 10 |
micro-operation queue | 5.67 cycles |
front end | 5.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.00 | 1.40 | 5.33 | 5.33 | 1.50 | 1.40 | 2.00 | 1.50 | 1.50 | 1.50 | 1.20 | 5.33 |
cycles | 2.00 | 1.40 | 5.33 | 5.33 | 1.50 | 1.40 | 2.00 | 1.50 | 1.50 | 1.50 | 1.20 | 5.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 6.17 |
Stall cycles | 0.33 |
LM full (events) | 1.01 |
Front-end | 5.67 |
Dispatch | 5.33 |
Overall L1 | 5.67 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RSI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP -0x80(%RBP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 48fae7 <hypre_BoomerAMGCreate2ndS.extracted.17+0xa97> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xa0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI,%RAX,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,(%RSI,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0,(%RSI) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 48f218 <hypre_BoomerAMGCreate2ndS.extracted.17+0x1c8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x38(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,(%RSI,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x58(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R10,%RDI,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDI,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP 0x8(%R10,%RDI,8),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 48f360 <hypre_BoomerAMGCreate2ndS.extracted.17+0x310> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 48f270 <hypre_BoomerAMGCreate2ndS.extracted.17+0x220> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV 0x10(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x90(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDI,%R13,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP 0x8(%RDI,%R13,8),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 48f399 <hypre_BoomerAMGCreate2ndS.extracted.17+0x349> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 48f1e0 <hypre_BoomerAMGCreate2ndS.extracted.17+0x190> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
Function | hypre_BoomerAMGCreate2ndS.extracted.17 |
Source file and lines | par_strength.c:1714-1797 |
Module | exec |
nb instructions | 32 |
nb uops | 32 |
loop length | 131 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 10 |
micro-operation queue | 5.67 cycles |
front end | 5.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.00 | 1.40 | 5.33 | 5.33 | 1.50 | 1.40 | 2.00 | 1.50 | 1.50 | 1.50 | 1.20 | 5.33 |
cycles | 2.00 | 1.40 | 5.33 | 5.33 | 1.50 | 1.40 | 2.00 | 1.50 | 1.50 | 1.50 | 1.20 | 5.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 6.17 |
Stall cycles | 0.33 |
LM full (events) | 1.01 |
Front-end | 5.67 |
Dispatch | 5.33 |
Overall L1 | 5.67 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RSI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP -0x80(%RBP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 48fae7 <hypre_BoomerAMGCreate2ndS.extracted.17+0xa97> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xa0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI,%RAX,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,(%RSI,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0,(%RSI) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 48f218 <hypre_BoomerAMGCreate2ndS.extracted.17+0x1c8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x38(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,(%RSI,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x58(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R10,%RDI,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDI,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP 0x8(%R10,%RDI,8),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 48f360 <hypre_BoomerAMGCreate2ndS.extracted.17+0x310> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 48f270 <hypre_BoomerAMGCreate2ndS.extracted.17+0x220> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV 0x10(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x90(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDI,%R13,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP 0x8(%RDI,%R13,8),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 48f399 <hypre_BoomerAMGCreate2ndS.extracted.17+0x349> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 48f1e0 <hypre_BoomerAMGCreate2ndS.extracted.17+0x190> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |