Loop Id: 3068 | Module: exec | Source: csr_matvec.c:237-237 | Coverage: 0.26% |
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Loop Id: 3068 | Module: exec | Source: csr_matvec.c:237-237 | Coverage: 0.26% |
---|
0x59eed7 VMULPD (%RBX),%ZMM0,%ZMM9 [1] |
0x59eedd ADD $0x200,%RBX |
0x59eee4 VMULPD -0x1c0(%RBX),%ZMM0,%ZMM10 [2] |
0x59eeeb VMULPD -0x180(%RBX),%ZMM0,%ZMM11 [2] |
0x59eef2 VMULPD -0x140(%RBX),%ZMM0,%ZMM12 [2] |
0x59eef9 VMULPD -0x100(%RBX),%ZMM0,%ZMM13 [2] |
0x59ef00 VMULPD -0xc0(%RBX),%ZMM0,%ZMM14 [2] |
0x59ef07 VMOVUPD %ZMM9,-0x200(%RBX) [2] |
0x59ef0e VMULPD -0x80(%RBX),%ZMM0,%ZMM15 [2] |
0x59ef15 VMOVUPD %ZMM10,-0x1c0(%RBX) [2] |
0x59ef1c VMULPD -0x40(%RBX),%ZMM0,%ZMM2 [2] |
0x59ef23 VMOVUPD %ZMM11,-0x180(%RBX) [2] |
0x59ef2a VMOVUPD %ZMM12,-0x140(%RBX) [2] |
0x59ef31 VMOVUPD %ZMM13,-0x100(%RBX) [2] |
0x59ef38 VMOVUPD %ZMM14,-0xc0(%RBX) [2] |
0x59ef3f VMOVUPD %ZMM15,-0x80(%RBX) [2] |
0x59ef46 VMOVUPD %ZMM2,-0x40(%RBX) [2] |
0x59ef4d CMP %RCX,%RBX |
0x59ef50 JNE 59eed7 |
/home/eoseret/qaas_runs_CPU_9468/171-147-2675/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c: 237 - 237 |
-------------------------------------------------------------------------------- |
237: y_data[i] *= alpha; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.33 |
Bottlenecks | P0, P1, P4, P5, P7, P8, P9, |
Function | hypre_CSRMatrixMatvecOutOfPlace._omp_fn.5 |
Source | csr_matvec.c:237-237 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 4.00 |
CQA cycles if no scalar integer | 4.00 |
CQA cycles if FP arith vectorized | 4.00 |
CQA cycles if fully vectorized | 4.00 |
Front-end cycles | 3.00 |
DIV/SQRT cycles | 4.00 |
P0 cycles | 4.00 |
P1 cycles | 2.67 |
P2 cycles | 2.67 |
P3 cycles | 4.00 |
P4 cycles | 4.00 |
P5 cycles | 1.00 |
P6 cycles | 4.00 |
P7 cycles | 4.00 |
P8 cycles | 4.00 |
P9 cycles | 0.40 |
P10 cycles | 2.67 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 4.17 |
Stall cycles (UFS) | 0.86 |
Nb insns | 19.00 |
Nb uops | 18.00 |
Nb loads | 8.00 |
Nb stores | 8.00 |
Nb stack references | 0.00 |
FLOP/cycle | 16.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 64.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 256.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 512.00 |
Bytes stored | 512.00 |
Stride 0 | 0.00 |
Stride 1 | 1.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 100.00 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 100.00 |
Vector-efficiency ratio load | 100.00 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | NA |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.33 |
Bottlenecks | P0, P1, P4, P5, P7, P8, P9, |
Function | hypre_CSRMatrixMatvecOutOfPlace._omp_fn.5 |
Source | csr_matvec.c:237-237 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 4.00 |
CQA cycles if no scalar integer | 4.00 |
CQA cycles if FP arith vectorized | 4.00 |
CQA cycles if fully vectorized | 4.00 |
Front-end cycles | 3.00 |
DIV/SQRT cycles | 4.00 |
P0 cycles | 4.00 |
P1 cycles | 2.67 |
P2 cycles | 2.67 |
P3 cycles | 4.00 |
P4 cycles | 4.00 |
P5 cycles | 1.00 |
P6 cycles | 4.00 |
P7 cycles | 4.00 |
P8 cycles | 4.00 |
P9 cycles | 0.40 |
P10 cycles | 2.67 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 4.17 |
Stall cycles (UFS) | 0.86 |
Nb insns | 19.00 |
Nb uops | 18.00 |
Nb loads | 8.00 |
Nb stores | 8.00 |
Nb stack references | 0.00 |
FLOP/cycle | 16.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 64.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 256.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 512.00 |
Bytes stored | 512.00 |
Stride 0 | 0.00 |
Stride 1 | 1.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 100.00 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 100.00 |
Vector-efficiency ratio load | 100.00 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | NA |
Path / |
Function | hypre_CSRMatrixMatvecOutOfPlace._omp_fn.5 |
Source file and lines | csr_matvec.c:237-237 |
Module | exec |
nb instructions | 19 |
nb uops | 18 |
loop length | 123 |
used x86 registers | 2 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 9 |
nb stack references | 0 |
micro-operation queue | 3.00 cycles |
front end | 3.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 4.00 | 0.60 | 2.67 | 2.67 | 4.00 | 4.00 | 1.00 | 4.00 | 4.00 | 4.00 | 0.40 | 2.67 |
cycles | 4.00 | 4.00 | 2.67 | 2.67 | 4.00 | 4.00 | 1.00 | 4.00 | 4.00 | 4.00 | 0.40 | 2.67 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 4.17 |
Stall cycles | 0.86 |
RS full (events) | 3.46 |
Front-end | 3.00 |
Dispatch | 4.00 |
Data deps. | 1.00 |
Overall L1 | 4.00 |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMULPD (%RBX),%ZMM0,%ZMM9 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD $0x200,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMULPD -0x1c0(%RBX),%ZMM0,%ZMM10 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMULPD -0x180(%RBX),%ZMM0,%ZMM11 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMULPD -0x140(%RBX),%ZMM0,%ZMM12 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMULPD -0x100(%RBX),%ZMM0,%ZMM13 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMULPD -0xc0(%RBX),%ZMM0,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD %ZMM9,-0x200(%RBX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULPD -0x80(%RBX),%ZMM0,%ZMM15 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD %ZMM10,-0x1c0(%RBX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULPD -0x40(%RBX),%ZMM0,%ZMM2 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD %ZMM11,-0x180(%RBX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVUPD %ZMM12,-0x140(%RBX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVUPD %ZMM13,-0x100(%RBX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVUPD %ZMM14,-0xc0(%RBX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVUPD %ZMM15,-0x80(%RBX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVUPD %ZMM2,-0x40(%RBX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
CMP %RCX,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 59eed7 <hypre_CSRMatrixMatvecOutOfPlace._omp_fn.5+0x137> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
Function | hypre_CSRMatrixMatvecOutOfPlace._omp_fn.5 |
Source file and lines | csr_matvec.c:237-237 |
Module | exec |
nb instructions | 19 |
nb uops | 18 |
loop length | 123 |
used x86 registers | 2 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 9 |
nb stack references | 0 |
micro-operation queue | 3.00 cycles |
front end | 3.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 4.00 | 0.60 | 2.67 | 2.67 | 4.00 | 4.00 | 1.00 | 4.00 | 4.00 | 4.00 | 0.40 | 2.67 |
cycles | 4.00 | 4.00 | 2.67 | 2.67 | 4.00 | 4.00 | 1.00 | 4.00 | 4.00 | 4.00 | 0.40 | 2.67 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 4.17 |
Stall cycles | 0.86 |
RS full (events) | 3.46 |
Front-end | 3.00 |
Dispatch | 4.00 |
Data deps. | 1.00 |
Overall L1 | 4.00 |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMULPD (%RBX),%ZMM0,%ZMM9 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD $0x200,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMULPD -0x1c0(%RBX),%ZMM0,%ZMM10 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMULPD -0x180(%RBX),%ZMM0,%ZMM11 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMULPD -0x140(%RBX),%ZMM0,%ZMM12 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMULPD -0x100(%RBX),%ZMM0,%ZMM13 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMULPD -0xc0(%RBX),%ZMM0,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD %ZMM9,-0x200(%RBX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULPD -0x80(%RBX),%ZMM0,%ZMM15 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD %ZMM10,-0x1c0(%RBX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULPD -0x40(%RBX),%ZMM0,%ZMM2 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD %ZMM11,-0x180(%RBX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVUPD %ZMM12,-0x140(%RBX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVUPD %ZMM13,-0x100(%RBX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVUPD %ZMM14,-0xc0(%RBX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVUPD %ZMM15,-0x80(%RBX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVUPD %ZMM2,-0x40(%RBX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
CMP %RCX,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 59eed7 <hypre_CSRMatrixMatvecOutOfPlace._omp_fn.5+0x137> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |