Loop Id: 1458 | Module: libparcsr_ls.so | Source: par_multi_interp.c:917-1125 [...] | Coverage: 0.04% |
---|
Loop Id: 1458 | Module: libparcsr_ls.so | Source: par_multi_interp.c:917-1125 [...] | Coverage: 0.04% |
---|
0x52e40 MOV -0x78(%RBP),%RDX |
0x52e44 INC %RDX |
0x52e47 CMP -0xd8(%RBP),%RDX |
0x52e4e JGE 53275 |
0x52e54 MOV %RDX,-0x78(%RBP) |
0x52e58 MOV -0xd0(%RBP),%RSI |
0x52e5f MOV (%RSI,%RDX,8),%RSI |
0x52e63 MOV -0xa0(%RBP),%RDX |
0x52e6a MOV (%RDX,%RSI,8),%R8 |
0x52e6e MOV %RSI,%RDI |
0x52e71 NOT %RDI |
0x52e74 MOV %RSI,-0x40(%RBP) |
0x52e78 CMP 0x8(%RDX,%RSI,8),%R8 |
0x52e7d JGE 53180 |
0x52e83 MOV -0x108(%RBP),%RDX |
0x52e8a MOV (%RDX),%R9 |
0x52e8d MOV %R9,-0x60(%RBP) |
0x52e91 JMP 52ec1 |
(1461) 0x52ea0 MOV -0x38(%RBP),%R8 |
(1461) 0x52ea4 MOV -0x60(%RBP),%R9 |
(1461) 0x52ea8 INC %R8 |
(1461) 0x52eab MOV -0xa0(%RBP),%RDX |
(1461) 0x52eb2 MOV -0x40(%RBP),%RSI |
(1461) 0x52eb6 CMP 0x8(%RDX,%RSI,8),%R8 |
(1461) 0x52ebb JGE 53180 |
(1461) 0x52ec1 MOV -0x130(%RBP),%RDX |
(1461) 0x52ec8 MOV (%RDX,%R8,8),%R10 |
(1461) 0x52ecc MOV (%R14),%RDX |
(1461) 0x52ecf DEC %RDX |
(1461) 0x52ed2 CMP %RDX,(%R9,%R10,8) |
(1461) 0x52ed6 JNE 52ea8 |
(1461) 0x52ed8 MOV %R8,-0x38(%RBP) |
(1461) 0x52edc MOV -0xe8(%RBP),%RDX |
(1461) 0x52ee3 MOV (%RDX),%RDX |
(1461) 0x52ee6 MOV 0x8(%RDX,%R10,8),%R11 |
(1461) 0x52eeb TEST %R11,%R11 |
(1461) 0x52eee JLE 5302d |
(1461) 0x52ef4 MOV -0x30(%RBP),%RDX |
(1461) 0x52ef8 MOV %R10,-0x68(%RBP) |
(1461) 0x52efc MOV (%RDX,%R10,8),%RDX |
(1461) 0x52f00 ADD %RDX,%R11 |
(1461) 0x52f03 MOV -0xa8(%RBP),%RSI |
(1461) 0x52f0a MOV (%RSI),%R9 |
(1461) 0x52f0d LEA 0x1(%RDX),%RSI |
(1461) 0x52f11 CMP %RSI,%R11 |
(1461) 0x52f14 CMOVLE %RSI,%R11 |
(1461) 0x52f18 MOV %R11,%R12 |
(1461) 0x52f1b SUB %RDX,%R12 |
(1461) 0x52f1e CMP $0x4,%R12 |
(1461) 0x52f22 MOV %R12,-0x80(%RBP) |
(1461) 0x52f26 JAE 52f7f |
(1461) 0x52f28 MOV -0x80(%RBP),%R8 |
(1461) 0x52f2c MOV %R8,%RSI |
(1461) 0x52f2f AND $-0x4,%RSI |
(1461) 0x52f33 CMP %R8,%RSI |
(1461) 0x52f36 JAE 53029 |
(1461) 0x52f3c ADD %RSI,%RDX |
(1461) 0x52f3f MOV -0x68(%RBP),%R10 |
(1461) 0x52f43 JMP 52f5c |
(1464) 0x52f50 INC %RDX |
(1464) 0x52f53 CMP %RDX,%R11 |
(1464) 0x52f56 JE 5302d |
(1464) 0x52f5c MOV (%R14),%R8 |
(1464) 0x52f5f MOV -0x8(%R9,%R8,8),%RSI |
(1464) 0x52f64 MOV (%RSI,%RDX,8),%RSI |
(1464) 0x52f68 CMP %RDI,(%RBX,%RSI,8) |
(1464) 0x52f6c JE 52f50 |
(1464) 0x52f6e MOV (%R9,%R8,8),%R8 |
(1464) 0x52f72 MOV %RSI,(%R8,%RAX,8) |
(1464) 0x52f76 INC %RAX |
(1464) 0x52f79 MOV %RDI,(%RBX,%RSI,8) |
(1464) 0x52f7d JMP 52f50 |
(1461) 0x52f7f SHR $0x2,%R12 |
(1461) 0x52f83 LEA (,%RDX,8),%RSI |
(1461) 0x52f8b JMP 52f99 |
(1465) 0x52f90 ADD $0x20,%RSI |
(1465) 0x52f94 DEC %R12 |
(1465) 0x52f97 JE 52f28 |
(1465) 0x52f99 MOV (%R14),%R13 |
(1465) 0x52f9c MOV -0x8(%R9,%R13,8),%R10 |
(1465) 0x52fa1 MOV (%R10,%RSI,1),%R8 |
(1465) 0x52fa5 CMP %RDI,(%RBX,%R8,8) |
(1465) 0x52fa9 JE 52fc2 |
(1465) 0x52fab MOV (%R9,%R13,8),%R10 |
(1465) 0x52faf MOV %R8,(%R10,%RAX,8) |
(1465) 0x52fb3 INC %RAX |
(1465) 0x52fb6 MOV %RDI,(%RBX,%R8,8) |
(1465) 0x52fba MOV (%R14),%R13 |
(1465) 0x52fbd MOV -0x8(%R9,%R13,8),%R10 |
(1465) 0x52fc2 MOV 0x8(%R10,%RSI,1),%R8 |
(1465) 0x52fc7 CMP %RDI,(%RBX,%R8,8) |
(1465) 0x52fcb JE 52fe4 |
(1465) 0x52fcd MOV (%R9,%R13,8),%R10 |
(1465) 0x52fd1 MOV %R8,(%R10,%RAX,8) |
(1465) 0x52fd5 INC %RAX |
(1465) 0x52fd8 MOV %RDI,(%RBX,%R8,8) |
(1465) 0x52fdc MOV (%R14),%R13 |
(1465) 0x52fdf MOV -0x8(%R9,%R13,8),%R10 |
(1465) 0x52fe4 MOV 0x10(%R10,%RSI,1),%R8 |
(1465) 0x52fe9 CMP %RDI,(%RBX,%R8,8) |
(1465) 0x52fed JE 53006 |
(1465) 0x52fef MOV (%R9,%R13,8),%R10 |
(1465) 0x52ff3 MOV %R8,(%R10,%RAX,8) |
(1465) 0x52ff7 INC %RAX |
(1465) 0x52ffa MOV %RDI,(%RBX,%R8,8) |
(1465) 0x52ffe MOV (%R14),%R13 |
(1465) 0x53001 MOV -0x8(%R9,%R13,8),%R10 |
(1465) 0x53006 MOV 0x18(%R10,%RSI,1),%R8 |
(1465) 0x5300b CMP %RDI,(%RBX,%R8,8) |
(1465) 0x5300f JE 52f90 |
(1465) 0x53015 MOV (%R9,%R13,8),%R10 |
(1465) 0x53019 MOV %R8,(%R10,%RAX,8) |
(1465) 0x5301d INC %RAX |
(1465) 0x53020 MOV %RDI,(%RBX,%R8,8) |
(1465) 0x53024 JMP 52f90 |
(1461) 0x53029 MOV -0x68(%RBP),%R10 |
(1461) 0x5302d MOV -0xf0(%RBP),%RDX |
(1461) 0x53034 MOV (%RDX),%RDX |
(1461) 0x53037 MOV 0x8(%RDX,%R10,8),%R11 |
(1461) 0x5303c TEST %R11,%R11 |
(1461) 0x5303f JLE 52ea0 |
(1461) 0x53045 MOV -0xe0(%RBP),%RDX |
(1461) 0x5304c MOV (%RDX),%RDX |
(1461) 0x5304f MOV (%RDX,%R10,8),%RDX |
(1461) 0x53053 ADD %RDX,%R11 |
(1461) 0x53056 MOV -0x88(%RBP),%RSI |
(1461) 0x5305d MOV (%RSI),%R9 |
(1461) 0x53060 LEA 0x1(%RDX),%RSI |
(1461) 0x53064 CMP %RSI,%R11 |
(1461) 0x53067 CMOVLE %RSI,%R11 |
(1461) 0x5306b MOV %R11,%RSI |
(1461) 0x5306e SUB %RDX,%RSI |
(1461) 0x53071 CMP $0x4,%RSI |
(1461) 0x53075 MOV %RSI,-0x68(%RBP) |
(1461) 0x53079 JAE 530cf |
(1461) 0x5307b MOV -0x68(%RBP),%R8 |
(1461) 0x5307f MOV %R8,%RSI |
(1461) 0x53082 AND $-0x4,%RSI |
(1461) 0x53086 CMP %R8,%RSI |
(1461) 0x53089 JAE 52ea0 |
(1461) 0x5308f ADD %RSI,%RDX |
(1461) 0x53092 JMP 530ac |
(1462) 0x530a0 INC %RDX |
(1462) 0x530a3 CMP %RDX,%R11 |
(1462) 0x530a6 JE 52ea0 |
(1462) 0x530ac MOV (%R14),%R8 |
(1462) 0x530af MOV -0x8(%R9,%R8,8),%RSI |
(1462) 0x530b4 MOV (%RSI,%RDX,8),%RSI |
(1462) 0x530b8 CMP %RDI,(%R15,%RSI,8) |
(1462) 0x530bc JE 530a0 |
(1462) 0x530be MOV (%R9,%R8,8),%R8 |
(1462) 0x530c2 MOV %RSI,(%R8,%RCX,8) |
(1462) 0x530c6 INC %RCX |
(1462) 0x530c9 MOV %RDI,(%R15,%RSI,8) |
(1462) 0x530cd JMP 530a0 |
(1461) 0x530cf MOV %RSI,%R12 |
(1461) 0x530d2 SHR $0x2,%R12 |
(1461) 0x530d6 LEA (,%RDX,8),%RSI |
(1461) 0x530de JMP 530e9 |
(1463) 0x530e0 ADD $0x20,%RSI |
(1463) 0x530e4 DEC %R12 |
(1463) 0x530e7 JE 5307b |
(1463) 0x530e9 MOV (%R14),%R13 |
(1463) 0x530ec MOV -0x8(%R9,%R13,8),%R10 |
(1463) 0x530f1 MOV (%R10,%RSI,1),%R8 |
(1463) 0x530f5 CMP %RDI,(%R15,%R8,8) |
(1463) 0x530f9 JE 53112 |
(1463) 0x530fb MOV (%R9,%R13,8),%R10 |
(1463) 0x530ff MOV %R8,(%R10,%RCX,8) |
(1463) 0x53103 INC %RCX |
(1463) 0x53106 MOV %RDI,(%R15,%R8,8) |
(1463) 0x5310a MOV (%R14),%R13 |
(1463) 0x5310d MOV -0x8(%R9,%R13,8),%R10 |
(1463) 0x53112 MOV 0x8(%R10,%RSI,1),%R8 |
(1463) 0x53117 CMP %RDI,(%R15,%R8,8) |
(1463) 0x5311b JE 53134 |
(1463) 0x5311d MOV (%R9,%R13,8),%R10 |
(1463) 0x53121 MOV %R8,(%R10,%RCX,8) |
(1463) 0x53125 INC %RCX |
(1463) 0x53128 MOV %RDI,(%R15,%R8,8) |
(1463) 0x5312c MOV (%R14),%R13 |
(1463) 0x5312f MOV -0x8(%R9,%R13,8),%R10 |
(1463) 0x53134 MOV 0x10(%R10,%RSI,1),%R8 |
(1463) 0x53139 CMP %RDI,(%R15,%R8,8) |
(1463) 0x5313d JE 53156 |
(1463) 0x5313f MOV (%R9,%R13,8),%R10 |
(1463) 0x53143 MOV %R8,(%R10,%RCX,8) |
(1463) 0x53147 INC %RCX |
(1463) 0x5314a MOV %RDI,(%R15,%R8,8) |
(1463) 0x5314e MOV (%R14),%R13 |
(1463) 0x53151 MOV -0x8(%R9,%R13,8),%R10 |
(1463) 0x53156 MOV 0x18(%R10,%RSI,1),%R8 |
(1463) 0x5315b CMP %RDI,(%R15,%R8,8) |
(1463) 0x5315f JE 530e0 |
(1463) 0x53165 MOV (%R9,%R13,8),%R10 |
(1463) 0x53169 MOV %R8,(%R10,%RCX,8) |
(1463) 0x5316d INC %RCX |
(1463) 0x53170 MOV %RDI,(%R15,%R8,8) |
(1463) 0x53174 JMP 530e0 |
0x53180 MOV -0x98(%RBP),%RSI |
0x53187 MOV -0x40(%RBP),%R8 |
0x5318b MOV (%RSI,%R8,8),%RDX |
0x5318f MOV 0x8(%RSI,%R8,8),%R8 |
0x53194 JMP 531b3 |
(1459) 0x531a0 MOV -0x98(%RBP),%RSI |
(1459) 0x531a7 MOV -0x40(%RBP),%R8 |
(1459) 0x531ab MOV 0x8(%RSI,%R8,8),%R8 |
(1459) 0x531b0 INC %RDX |
(1459) 0x531b3 CMP %R8,%RDX |
(1459) 0x531b6 JGE 52e40 |
(1459) 0x531bc MOV -0x138(%RBP),%RSI |
(1459) 0x531c3 MOV (%RSI,%RDX,8),%R9 |
(1459) 0x531c7 MOV (%R14),%RSI |
(1459) 0x531ca DEC %RSI |
(1459) 0x531cd MOV -0x128(%RBP),%R10 |
(1459) 0x531d4 CMP %RSI,(%R10,%R9,8) |
(1459) 0x531d8 JNE 531b0 |
(1459) 0x531da MOV -0x120(%RBP),%RSI |
(1459) 0x531e1 MOV 0x8(%RSI,%R9,8),%RSI |
(1459) 0x531e6 TEST %RSI,%RSI |
(1459) 0x531e9 JLE 531b0 |
(1459) 0x531eb MOV -0x110(%RBP),%R8 |
(1459) 0x531f2 MOV (%R8,%R9,8),%R8 |
(1459) 0x531f6 ADD %R8,%RSI |
(1459) 0x531f9 MOV -0x118(%RBP),%R9 |
(1459) 0x53200 MOV (%R9),%R9 |
(1459) 0x53203 JMP 53218 |
(1460) 0x53210 INC %R8 |
(1460) 0x53213 CMP %RSI,%R8 |
(1460) 0x53216 JGE 531a0 |
(1460) 0x53218 MOV (%R14),%R11 |
(1460) 0x5321b MOV (%R9,%R11,8),%R10 |
(1460) 0x5321f MOV (%R10,%R8,8),%R10 |
(1460) 0x53223 TEST %R10,%R10 |
(1460) 0x53226 JS 53250 |
(1460) 0x53228 CMP %RDI,(%R15,%R10,8) |
(1460) 0x5322c JE 53210 |
(1460) 0x5322e MOV -0x88(%RBP),%R12 |
(1460) 0x53235 MOV (%R12),%R12 |
(1460) 0x53239 MOV (%R12,%R11,8),%R11 |
(1460) 0x5323d MOV %R10,(%R11,%RCX,8) |
(1460) 0x53241 INC %RCX |
(1460) 0x53244 MOV %RDI,(%R15,%R10,8) |
(1460) 0x53248 JMP 53210 |
(1460) 0x53250 NOT %R10 |
(1460) 0x53253 CMP %RDI,(%RBX,%R10,8) |
(1460) 0x53257 JE 53210 |
(1460) 0x53259 MOV -0xa8(%RBP),%R12 |
(1460) 0x53260 MOV (%R12),%R12 |
(1460) 0x53264 MOV (%R12,%R11,8),%R11 |
(1460) 0x53268 MOV %R10,(%R11,%RAX,8) |
(1460) 0x5326c INC %RAX |
(1460) 0x5326f MOV %RDI,(%RBX,%R10,8) |
(1460) 0x53273 JMP 53210 |
/home/eoseret/qaas_runs_CPU_9468/171-147-2675/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 917 - 1125 |
-------------------------------------------------------------------------------- |
917: for (i=0; i < n_coarse; i++) |
[...] |
1072: for (i=thread_start; i < thread_stop; i++) |
1073: { |
1074: i1 = pass_array[i]; |
1075: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
1076: { |
1077: j1 = S_diag_j[j]; |
1078: if (assigned[j1] == pass-1) |
1079: { |
1080: j_start = P_diag_start[j1]; |
1081: j_end = j_start+P_diag_i[j1+1]; |
1082: for (k=j_start; k < j_end; k++) |
1083: { |
1084: k1 = P_diag_pass[pass-1][k]; |
1085: if (P_marker[k1] != -i1-1) |
1086: { |
1087: P_diag_pass[pass][cnt_nz++] = k1; |
1088: P_marker[k1] = -i1-1; |
1089: } |
1090: } |
1091: j_start = P_offd_start[j1]; |
1092: j_end = j_start+P_offd_i[j1+1]; |
1093: for (k=j_start; k < j_end; k++) |
1094: { |
1095: k1 = P_offd_pass[pass-1][k]; |
1096: if (P_marker_offd[k1] != -i1-1) |
1097: { |
1098: P_offd_pass[pass][cnt_nz_offd++] = k1; |
1099: P_marker_offd[k1] = -i1-1; |
1100: } |
1101: } |
1102: } |
1103: } |
1104: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
1105: { |
1106: j1 = S_offd_j[j]; |
1107: if (assigned_offd[j1] == pass-1) |
1108: { |
1109: j_start = Pext_start[j1]; |
1110: j_end = j_start+Pext_i[j1+1]; |
1111: for (k=j_start; k < j_end; k++) |
1112: { |
1113: k1 = Pext_pass[pass][k]; |
1114: if (k1 < 0) |
1115: { |
1116: if (P_marker[-k1-1] != -i1-1) |
1117: { |
1118: P_diag_pass[pass][cnt_nz++] = -k1-1; |
1119: P_marker[-k1-1] = -i1-1; |
1120: } |
1121: } |
1122: else if (P_marker_offd[k1] != -i1-1) |
1123: { |
1124: P_offd_pass[pass][cnt_nz_offd++] = k1; |
1125: P_marker_offd[k1] = -i1-1; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.08 |
Bottlenecks | P2, P3, P11, |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source | par_multi_interp.c:1072-1075,par_multi_interp.c:1078-1078,par_multi_interp.c:1099-1099,par_multi_interp.c:1104-1104 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 4.33 |
CQA cycles if no scalar integer | 4.33 |
CQA cycles if FP arith vectorized | 4.33 |
CQA cycles if fully vectorized | 0.54 |
Front-end cycles | 4.00 |
DIV/SQRT cycles | 1.00 |
P0 cycles | 1.00 |
P1 cycles | 4.33 |
P2 cycles | 4.33 |
P3 cycles | 1.50 |
P4 cycles | 1.00 |
P5 cycles | 1.00 |
P6 cycles | 1.50 |
P7 cycles | 1.50 |
P8 cycles | 1.50 |
P9 cycles | 1.00 |
P10 cycles | 4.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 5.32 |
Stall cycles (UFS) | 1.15 |
Nb insns | 23.00 |
Nb uops | 23.00 |
Nb loads | 13.00 |
Nb stores | 3.00 |
Nb stack references | 8.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 29.54 |
Bytes prefetched | 0.00 |
Bytes loaded | 104.00 |
Bytes stored | 24.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.08 |
Bottlenecks | P2, P3, P11, |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source | par_multi_interp.c:1072-1075,par_multi_interp.c:1078-1078,par_multi_interp.c:1099-1099,par_multi_interp.c:1104-1104 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 4.33 |
CQA cycles if no scalar integer | 4.33 |
CQA cycles if FP arith vectorized | 4.33 |
CQA cycles if fully vectorized | 0.54 |
Front-end cycles | 4.00 |
DIV/SQRT cycles | 1.00 |
P0 cycles | 1.00 |
P1 cycles | 4.33 |
P2 cycles | 4.33 |
P3 cycles | 1.50 |
P4 cycles | 1.00 |
P5 cycles | 1.00 |
P6 cycles | 1.50 |
P7 cycles | 1.50 |
P8 cycles | 1.50 |
P9 cycles | 1.00 |
P10 cycles | 4.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 5.32 |
Stall cycles (UFS) | 1.15 |
Nb insns | 23.00 |
Nb uops | 23.00 |
Nb loads | 13.00 |
Nb stores | 3.00 |
Nb stack references | 8.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 29.54 |
Bytes prefetched | 0.00 |
Bytes loaded | 104.00 |
Bytes stored | 24.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source file and lines | par_multi_interp.c:917-1125 |
Module | libparcsr_ls.so |
nb instructions | 23 |
nb uops | 23 |
loop length | 105 |
used x86 registers | 6 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 8 |
micro-operation queue | 4.00 cycles |
front end | 4.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.00 | 1.00 | 4.33 | 4.33 | 1.50 | 1.00 | 1.00 | 1.50 | 1.50 | 1.50 | 1.00 | 4.33 |
cycles | 1.00 | 1.00 | 4.33 | 4.33 | 1.50 | 1.00 | 1.00 | 1.50 | 1.50 | 1.50 | 1.00 | 4.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 5.32 |
Stall cycles | 1.15 |
LM full (events) | 3.31 |
Front-end | 4.00 |
Dispatch | 4.33 |
Overall L1 | 4.33 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x78(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP -0xd8(%RBP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 53275 <hypre_BoomerAMGBuildMultipass.extracted.34+0xe45> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xd0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI,%RDX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xa0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%RSI,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOT %RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RSI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP 0x8(%RDX,%RSI,8),%R8 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 53180 <hypre_BoomerAMGBuildMultipass.extracted.34+0xd50> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x108(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 52ec1 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa91> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x98(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x40(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI,%R8,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RSI,%R8,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 531b3 <hypre_BoomerAMGBuildMultipass.extracted.34+0xd83> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source file and lines | par_multi_interp.c:917-1125 |
Module | libparcsr_ls.so |
nb instructions | 23 |
nb uops | 23 |
loop length | 105 |
used x86 registers | 6 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 8 |
micro-operation queue | 4.00 cycles |
front end | 4.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.00 | 1.00 | 4.33 | 4.33 | 1.50 | 1.00 | 1.00 | 1.50 | 1.50 | 1.50 | 1.00 | 4.33 |
cycles | 1.00 | 1.00 | 4.33 | 4.33 | 1.50 | 1.00 | 1.00 | 1.50 | 1.50 | 1.50 | 1.00 | 4.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 5.32 |
Stall cycles | 1.15 |
LM full (events) | 3.31 |
Front-end | 4.00 |
Dispatch | 4.33 |
Overall L1 | 4.33 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x78(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP -0xd8(%RBP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 53275 <hypre_BoomerAMGBuildMultipass.extracted.34+0xe45> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xd0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI,%RDX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xa0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%RSI,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOT %RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RSI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP 0x8(%RDX,%RSI,8),%R8 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 53180 <hypre_BoomerAMGBuildMultipass.extracted.34+0xd50> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x108(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 52ec1 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa91> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x98(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x40(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI,%R8,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RSI,%R8,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 531b3 <hypre_BoomerAMGBuildMultipass.extracted.34+0xd83> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |