Loop Id: 1530 | Module: libparcsr_ls.so | Source: par_multi_interp.c:1747-1876 [...] | Coverage: 0.15% |
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Loop Id: 1530 | Module: libparcsr_ls.so | Source: par_multi_interp.c:1747-1876 [...] | Coverage: 0.15% |
---|
0x559d0 MOV -0x88(%RBP),%RDX |
0x559d7 INC %RDX |
0x559da CMP -0xc8(%RBP),%RDX |
0x559e1 JGE 56489 |
0x559e7 MOV %RDX,-0x88(%RBP) |
0x559ee MOV -0xc0(%RBP),%RAX |
0x559f5 MOV (%RAX,%RDX,8),%RCX |
0x559f9 MOV -0x130(%RBP),%RAX |
0x55a00 MOV (%RAX,%RCX,8),%R14 |
0x55a04 MOV -0x78(%RBP),%RAX |
0x55a08 MOV (%RAX,%RCX,8),%R13 |
0x55a0c MOV %RCX,-0x30(%RBP) |
0x55a10 MOV 0x8(%RAX,%RCX,8),%RSI |
0x55a15 LEA (%RSI,%R14,1),%RAX |
0x55a19 SUB %R13,%RAX |
0x55a1c CMP %RAX,%R14 |
0x55a1f JGE 55b96 |
0x55a25 MOV -0x108(%RBP),%RAX |
0x55a2c MOV (%RAX),%RBX |
0x55a2f MOV -0x90(%RBP),%RAX |
0x55a36 MOV (%RAX),%RAX |
0x55a39 MOV %RSI,%RCX |
0x55a3c SUB %R13,%RCX |
0x55a3f CMP $0xc,%RCX |
0x55a43 JBE 55b60 |
0x55a49 MOV %RSI,-0x40(%RBP) |
0x55a4d LEA (%RAX,%R13,8),%RDI |
0x55a51 LEA (,%RCX,8),%RDX |
0x55a59 XOR %ESI,%ESI |
0x55a5b MOV %RCX,-0xa8(%RBP) |
0x55a62 VZEROUPPER |
0x55a65 CALL e4a0 <__intel_avx_rep_memset@plt> |
0x55a6a MOV -0xa8(%RBP),%R10 |
0x55a71 MOV -0x50(%RBP),%R9 |
0x55a75 MOV %R10,%RAX |
0x55a78 SHR $0x2,%RAX |
0x55a7c LEA (,%R14,8),%RCX |
0x55a84 MOV -0x100(%RBP),%RDX |
0x55a8b LEA (%RDX,%R13,8),%RDX |
0x55a8f XOR %ESI,%ESI |
0x55a91 NOPW %CS:(%RAX,%RAX,1) |
(1548) 0x55aa0 MOV (%R9),%RDI |
(1548) 0x55aa3 MOV (%RBX,%RDI,8),%RDI |
(1548) 0x55aa7 ADD %RCX,%RDI |
(1548) 0x55aaa MOV (%RDI,%RSI,8),%RDI |
(1548) 0x55aae LEA (%R13,%RSI,1),%R8 |
(1548) 0x55ab3 MOV %R8,(%R12,%RDI,8) |
(1548) 0x55ab7 MOV %RDI,-0x18(%RDX,%RSI,8) |
(1548) 0x55abc MOV (%R9),%RDI |
(1548) 0x55abf MOV (%RBX,%RDI,8),%RDI |
(1548) 0x55ac3 ADD %RCX,%RDI |
(1548) 0x55ac6 MOV 0x8(%RDI,%RSI,8),%RDI |
(1548) 0x55acb LEA 0x1(%R13,%RSI,1),%R8 |
(1548) 0x55ad0 MOV %R8,(%R12,%RDI,8) |
(1548) 0x55ad4 MOV %RDI,-0x10(%RDX,%RSI,8) |
(1548) 0x55ad9 MOV (%R9),%RDI |
(1548) 0x55adc MOV (%RBX,%RDI,8),%RDI |
(1548) 0x55ae0 ADD %RCX,%RDI |
(1548) 0x55ae3 MOV 0x10(%RDI,%RSI,8),%RDI |
(1548) 0x55ae8 LEA 0x2(%R13,%RSI,1),%R8 |
(1548) 0x55aed MOV %R8,(%R12,%RDI,8) |
(1548) 0x55af1 MOV %RDI,-0x8(%RDX,%RSI,8) |
(1548) 0x55af6 MOV (%R9),%RDI |
(1548) 0x55af9 MOV (%RBX,%RDI,8),%RDI |
(1548) 0x55afd ADD %RCX,%RDI |
(1548) 0x55b00 MOV 0x18(%RDI,%RSI,8),%RDI |
(1548) 0x55b05 LEA 0x3(%R13,%RSI,1),%R8 |
(1548) 0x55b0a MOV %R8,(%R12,%RDI,8) |
(1548) 0x55b0e MOV %RDI,(%RDX,%RSI,8) |
(1548) 0x55b12 ADD $0x4,%RSI |
(1548) 0x55b16 DEC %RAX |
(1548) 0x55b19 JNE 55aa0 |
0x55b1b MOV %R10,%RAX |
0x55b1e AND $-0x4,%RAX |
0x55b22 CMP %R10,%RAX |
0x55b25 MOV -0x48(%RBP),%R11 |
0x55b29 MOV -0x58(%RBP),%RCX |
0x55b2d MOV -0x40(%RBP),%RDX |
0x55b31 JAE 55b96 |
0x55b33 ADD %RAX,%R13 |
0x55b36 ADD %RAX,%R14 |
0x55b39 NOPL (%RAX) |
(1549) 0x55b40 MOV (%R9),%RAX |
(1549) 0x55b43 MOV (%RBX,%RAX,8),%RAX |
(1549) 0x55b47 MOV (%RAX,%R14,8),%RAX |
(1549) 0x55b4b MOV %R13,(%R12,%RAX,8) |
(1549) 0x55b4f MOV %RAX,(%RCX,%R13,8) |
(1549) 0x55b53 INC %R13 |
(1549) 0x55b56 INC %R14 |
(1549) 0x55b59 CMP %R13,%RDX |
(1549) 0x55b5c JNE 55b40 |
0x55b5e JMP 55b96 |
0x55b60 MOV -0x58(%RBP),%RDX |
0x55b64 NOPW %CS:(%RAX,%RAX,1) |
(1547) 0x55b70 MOV (%R9),%RCX |
(1547) 0x55b73 MOV (%RBX,%RCX,8),%RCX |
(1547) 0x55b77 MOV (%RCX,%R14,8),%RCX |
(1547) 0x55b7b MOV %R13,(%R12,%RCX,8) |
(1547) 0x55b7f MOVQ $0,(%RAX,%R13,8) |
(1547) 0x55b87 MOV %RCX,(%RDX,%R13,8) |
(1547) 0x55b8b INC %R13 |
(1547) 0x55b8e INC %R14 |
(1547) 0x55b91 CMP %R13,%RSI |
(1547) 0x55b94 JNE 55b70 |
0x55b96 MOV -0xb8(%RBP),%RAX |
0x55b9d MOV -0x30(%RBP),%RCX |
0x55ba1 MOV (%RAX,%RCX,8),%R14 |
0x55ba5 MOV -0x70(%RBP),%RAX |
0x55ba9 MOV (%RAX,%RCX,8),%R13 |
0x55bad MOV 0x8(%RAX,%RCX,8),%RSI |
0x55bb2 LEA (%RSI,%R14,1),%RAX |
0x55bb6 SUB %R13,%RAX |
0x55bb9 CMP %RAX,%R14 |
0x55bbc MOV -0x38(%RBP),%RDX |
0x55bc0 JGE 55d36 |
0x55bc6 MOV -0x110(%RBP),%RAX |
0x55bcd MOV (%RAX),%RBX |
0x55bd0 MOV -0x98(%RBP),%RAX |
0x55bd7 MOV (%RAX),%RAX |
0x55bda MOV %RSI,%RCX |
0x55bdd SUB %R13,%RCX |
0x55be0 CMP $0xc,%RCX |
0x55be4 JBE 55d00 |
0x55bea MOV %RSI,-0x40(%RBP) |
0x55bee LEA (%RAX,%R13,8),%RDI |
0x55bf2 LEA (,%RCX,8),%RDX |
0x55bfa XOR %ESI,%ESI |
0x55bfc MOV %RCX,-0xa8(%RBP) |
0x55c03 VZEROUPPER |
0x55c06 CALL e4a0 <__intel_avx_rep_memset@plt> |
0x55c0b MOV -0xa8(%RBP),%R10 |
0x55c12 MOV -0x50(%RBP),%R9 |
0x55c16 MOV %R10,%RAX |
0x55c19 SHR $0x2,%RAX |
0x55c1d LEA (,%R14,8),%RCX |
0x55c25 MOV -0xf8(%RBP),%RDX |
0x55c2c LEA (%RDX,%R13,8),%RDX |
0x55c30 XOR %ESI,%ESI |
0x55c32 NOPW %CS:(%RAX,%RAX,1) |
(1545) 0x55c40 MOV (%R9),%RDI |
(1545) 0x55c43 MOV (%RBX,%RDI,8),%RDI |
(1545) 0x55c47 ADD %RCX,%RDI |
(1545) 0x55c4a MOV (%RDI,%RSI,8),%RDI |
(1545) 0x55c4e LEA (%R13,%RSI,1),%R8 |
(1545) 0x55c53 MOV %R8,(%R15,%RDI,8) |
(1545) 0x55c57 MOV %RDI,-0x18(%RDX,%RSI,8) |
(1545) 0x55c5c MOV (%R9),%RDI |
(1545) 0x55c5f MOV (%RBX,%RDI,8),%RDI |
(1545) 0x55c63 ADD %RCX,%RDI |
(1545) 0x55c66 MOV 0x8(%RDI,%RSI,8),%RDI |
(1545) 0x55c6b LEA 0x1(%R13,%RSI,1),%R8 |
(1545) 0x55c70 MOV %R8,(%R15,%RDI,8) |
(1545) 0x55c74 MOV %RDI,-0x10(%RDX,%RSI,8) |
(1545) 0x55c79 MOV (%R9),%RDI |
(1545) 0x55c7c MOV (%RBX,%RDI,8),%RDI |
(1545) 0x55c80 ADD %RCX,%RDI |
(1545) 0x55c83 MOV 0x10(%RDI,%RSI,8),%RDI |
(1545) 0x55c88 LEA 0x2(%R13,%RSI,1),%R8 |
(1545) 0x55c8d MOV %R8,(%R15,%RDI,8) |
(1545) 0x55c91 MOV %RDI,-0x8(%RDX,%RSI,8) |
(1545) 0x55c96 MOV (%R9),%RDI |
(1545) 0x55c99 MOV (%RBX,%RDI,8),%RDI |
(1545) 0x55c9d ADD %RCX,%RDI |
(1545) 0x55ca0 MOV 0x18(%RDI,%RSI,8),%RDI |
(1545) 0x55ca5 LEA 0x3(%R13,%RSI,1),%R8 |
(1545) 0x55caa MOV %R8,(%R15,%RDI,8) |
(1545) 0x55cae MOV %RDI,(%RDX,%RSI,8) |
(1545) 0x55cb2 ADD $0x4,%RSI |
(1545) 0x55cb6 DEC %RAX |
(1545) 0x55cb9 JNE 55c40 |
0x55cbb MOV %R10,%RAX |
0x55cbe AND $-0x4,%RAX |
0x55cc2 CMP %R10,%RAX |
0x55cc5 MOV -0x48(%RBP),%R11 |
0x55cc9 MOV -0x38(%RBP),%RDX |
0x55ccd MOV -0x40(%RBP),%RCX |
0x55cd1 JAE 55d36 |
0x55cd3 ADD %RAX,%R13 |
0x55cd6 ADD %RAX,%R14 |
0x55cd9 NOPL (%RAX) |
(1546) 0x55ce0 MOV (%R9),%RAX |
(1546) 0x55ce3 MOV (%RBX,%RAX,8),%RAX |
(1546) 0x55ce7 MOV (%RAX,%R14,8),%RAX |
(1546) 0x55ceb MOV %R13,(%R15,%RAX,8) |
(1546) 0x55cef MOV %RAX,(%RDX,%R13,8) |
(1546) 0x55cf3 INC %R13 |
(1546) 0x55cf6 INC %R14 |
(1546) 0x55cf9 CMP %R13,%RCX |
(1546) 0x55cfc JNE 55ce0 |
0x55cfe JMP 55d36 |
0x55d00 MOV -0x38(%RBP),%RDX |
0x55d04 NOPW %CS:(%RAX,%RAX,1) |
(1544) 0x55d10 MOV (%R9),%RCX |
(1544) 0x55d13 MOV (%RBX,%RCX,8),%RCX |
(1544) 0x55d17 MOV (%RCX,%R14,8),%RCX |
(1544) 0x55d1b MOV %R13,(%R15,%RCX,8) |
(1544) 0x55d1f MOVQ $0,(%RAX,%R13,8) |
(1544) 0x55d27 MOV %RCX,(%RDX,%R13,8) |
(1544) 0x55d2b INC %R13 |
(1544) 0x55d2e INC %R14 |
(1544) 0x55d31 CMP %R13,%RSI |
(1544) 0x55d34 JNE 55d10 |
0x55d36 MOV -0xe0(%RBP),%RCX |
0x55d3d MOV -0x30(%RBP),%RSI |
0x55d41 MOV (%RCX,%RSI,8),%RAX |
0x55d45 MOV 0x8(%RCX,%RSI,8),%RCX |
0x55d4a CMP %RCX,%RAX |
0x55d4d MOV -0xd0(%RBP),%R13 |
0x55d54 MOV %RDX,%RBX |
0x55d57 MOV -0x68(%RBP),%R14 |
0x55d5b JGE 55db0 |
0x55d5d MOV -0x118(%RBP),%RDX |
0x55d64 MOV (%RDX),%RDX |
0x55d67 JMP 55d78 |
(1543) 0x55d70 INC %RAX |
(1543) 0x55d73 CMP %RCX,%RAX |
(1543) 0x55d76 JGE 55db0 |
(1543) 0x55d78 MOV -0x180(%RBP),%RSI |
(1543) 0x55d7f MOV (%RSI,%RAX,8),%RSI |
(1543) 0x55d83 MOV (%R9),%RDI |
(1543) 0x55d86 DEC %RDI |
(1543) 0x55d89 CMP %RDI,(%RDX,%RSI,8) |
(1543) 0x55d8d JNE 55d70 |
(1543) 0x55d8f MOV -0x80(%RBP),%RCX |
(1543) 0x55d93 MOV -0x30(%RBP),%RDI |
(1543) 0x55d97 MOV %RDI,(%RCX,%RSI,8) |
(1543) 0x55d9b MOV -0xe0(%RBP),%RCX |
(1543) 0x55da2 MOV 0x8(%RCX,%RDI,8),%RCX |
(1543) 0x55da7 JMP 55d70 |
0x55db0 MOV -0xe8(%RBP),%RCX |
0x55db7 MOV -0x30(%RBP),%RDX |
0x55dbb MOV (%RCX,%RDX,8),%RAX |
0x55dbf MOV 0x8(%RCX,%RDX,8),%RCX |
0x55dc4 JMP 55dd3 |
(1542) 0x55dd0 INC %RAX |
(1542) 0x55dd3 CMP %RCX,%RAX |
(1542) 0x55dd6 JGE 55e10 |
(1542) 0x55dd8 MOV -0x188(%RBP),%RDX |
(1542) 0x55ddf MOV (%RDX,%RAX,8),%RDX |
(1542) 0x55de3 MOV (%R9),%RSI |
(1542) 0x55de6 DEC %RSI |
(1542) 0x55de9 MOV -0x190(%RBP),%RDI |
(1542) 0x55df0 CMP %RSI,(%RDI,%RDX,8) |
(1542) 0x55df4 JNE 55dd0 |
(1542) 0x55df6 MOV -0x60(%RBP),%RCX |
(1542) 0x55dfa MOV -0x30(%RBP),%RSI |
(1542) 0x55dfe MOV %RSI,(%RCX,%RDX,8) |
(1542) 0x55e02 MOV -0xe8(%RBP),%RCX |
(1542) 0x55e09 MOV 0x8(%RCX,%RSI,8),%RCX |
(1542) 0x55e0e JMP 55dd0 |
0x55e10 MOV -0x120(%RBP),%RAX |
0x55e17 MOV -0x30(%RBP),%RCX |
0x55e1b MOV (%RAX,%RCX,8),%RSI |
0x55e1f MOV 0x8(%RAX,%RCX,8),%RCX |
0x55e24 LEA 0x1(%RSI),%RDX |
0x55e28 VXORPD %XMM1,%XMM1,%XMM1 |
0x55e2c CMP %RCX,%RDX |
0x55e2f MOV %RSI,-0x40(%RBP) |
0x55e33 VXORPD %XMM0,%XMM0,%XMM0 |
0x55e37 JGE 561f0 |
0x55e3d MOV -0x58(%RBP),%RAX |
0x55e41 JMP 55e64 |
(1537) 0x55e50 MOV -0x48(%RBP),%R11 |
(1537) 0x55e54 INC %RDX |
(1537) 0x55e57 CMP %RCX,%RDX |
(1537) 0x55e5a MOV -0x50(%RBP),%R9 |
(1537) 0x55e5e JE 561f0 |
(1537) 0x55e64 MOV -0x170(%RBP),%RSI |
(1537) 0x55e6b MOV (%RSI,%RDX,8),%RSI |
(1537) 0x55e6f MOV -0x80(%RBP),%RDI |
(1537) 0x55e73 MOV -0x30(%RBP),%R8 |
(1537) 0x55e77 CMP %R8,(%RDI,%RSI,8) |
(1537) 0x55e7b JNE 55ec0 |
(1537) 0x55e7d MOV -0x78(%RBP),%R8 |
(1537) 0x55e81 MOV (%R8,%RSI,8),%RDI |
(1537) 0x55e85 MOV 0x8(%R8,%RSI,8),%R8 |
(1537) 0x55e8a MOV %R8,%R11 |
(1537) 0x55e8d SUB %RDI,%R11 |
(1537) 0x55e90 JLE 56057 |
(1537) 0x55e96 MOV -0xa0(%RBP),%R9 |
(1537) 0x55e9d MOV (%R9),%R9 |
(1537) 0x55ea0 MOV -0x90(%RBP),%R10 |
(1537) 0x55ea7 MOV (%R10),%R10 |
(1537) 0x55eaa CMP $0x4,%R11 |
(1537) 0x55eae JAE 55f05 |
(1537) 0x55eb0 JMP 55fe4 |
(1537) 0x55ec0 MOV -0x158(%RBP),%RDI |
(1537) 0x55ec7 CMPQ $-0x3,(%RDI,%RSI,8) |
(1537) 0x55ecc JE 55e54 |
(1537) 0x55ece CMPQ $0x1,-0xf0(%RBP) |
(1537) 0x55ed6 JE 55ef1 |
(1537) 0x55ed8 MOV -0xd8(%RBP),%R8 |
(1537) 0x55edf MOV -0x30(%RBP),%RDI |
(1537) 0x55ee3 MOV (%R8,%RDI,8),%RDI |
(1537) 0x55ee7 CMP (%R8,%RSI,8),%RDI |
(1537) 0x55eeb JNE 55e54 |
(1537) 0x55ef1 MOV -0xa0(%RBP),%RSI |
(1537) 0x55ef8 MOV (%RSI),%RSI |
(1537) 0x55efb VADDSD (%RSI,%RDX,8),%XMM0,%XMM0 |
(1537) 0x55f00 JMP 55e54 |
(1537) 0x55f05 MOV %R11,%RBX |
(1537) 0x55f08 SHR $0x2,%RBX |
(1537) 0x55f0c LEA 0x18(,%RDI,8),%R14 |
(1537) 0x55f14 NOPW %CS:(%RAX,%RAX,1) |
(1540) 0x55f20 MOV -0x18(%RAX,%R14,1),%R13 |
(1540) 0x55f25 VMOVSD -0x18(%R10,%R14,1),%XMM2 |
(1540) 0x55f2c VMOVSD (%R9,%RDX,8),%XMM3 |
(1540) 0x55f32 MOV (%R12,%R13,8),%R13 |
(1540) 0x55f36 VMOVSD (%R10,%R13,8),%XMM4 |
(1540) 0x55f3c VFMADD231SD %XMM2,%XMM3,%XMM4 |
(1540) 0x55f41 VMOVSD %XMM4,(%R10,%R13,8) |
(1540) 0x55f47 MOV -0x10(%RAX,%R14,1),%R13 |
(1540) 0x55f4c VMOVSD -0x10(%R10,%R14,1),%XMM4 |
(1540) 0x55f53 VMOVSD (%R9,%RDX,8),%XMM5 |
(1540) 0x55f59 MOV (%R12,%R13,8),%R13 |
(1540) 0x55f5d VMOVSD (%R10,%R13,8),%XMM6 |
(1540) 0x55f63 VFMADD231SD %XMM4,%XMM5,%XMM6 |
(1540) 0x55f68 VMOVSD %XMM6,(%R10,%R13,8) |
(1540) 0x55f6e VMOVSD -0x8(%R10,%R14,1),%XMM6 |
(1540) 0x55f75 VMULSD (%R9,%RDX,8),%XMM6,%XMM6 |
(1540) 0x55f7b MOV -0x8(%RAX,%R14,1),%R13 |
(1540) 0x55f80 MOV (%R12,%R13,8),%R13 |
(1540) 0x55f84 VADDSD (%R10,%R13,8),%XMM6,%XMM7 |
(1540) 0x55f8a VMOVSD %XMM7,(%R10,%R13,8) |
(1540) 0x55f90 VFMADD213SD %XMM6,%XMM5,%XMM4 |
(1540) 0x55f95 MOV (%RAX,%R14,1),%R13 |
(1540) 0x55f99 VMOVSD (%R10,%R14,1),%XMM5 |
(1540) 0x55f9f VMULSD (%R9,%RDX,8),%XMM5,%XMM18 |
(1540) 0x55fa6 MOV (%R12,%R13,8),%R13 |
(1540) 0x55faa VADDSD (%R10,%R13,8),%XMM18,%XMM5 |
(1540) 0x55fb1 VMOVSD %XMM5,(%R10,%R13,8) |
(1540) 0x55fb7 VADDSD %XMM1,%XMM4,%XMM1 |
(1540) 0x55fbb VMOVAPD %XMM2,%XMM5 |
(1540) 0x55fbf VFMADD213SD %XMM18,%XMM3,%XMM5 |
(1540) 0x55fc5 VADDSD %XMM1,%XMM5,%XMM1 |
(1540) 0x55fc9 VADDSD %XMM0,%XMM4,%XMM0 |
(1540) 0x55fcd VFMADD213SD %XMM18,%XMM3,%XMM2 |
(1540) 0x55fd3 VADDSD %XMM0,%XMM2,%XMM0 |
(1540) 0x55fd7 ADD $0x20,%R14 |
(1540) 0x55fdb DEC %RBX |
(1540) 0x55fde JNE 55f20 |
(1537) 0x55fe4 MOV %R11,%RBX |
(1537) 0x55fe7 AND $-0x4,%RBX |
(1537) 0x55feb CMP %R11,%RBX |
(1537) 0x55fee JAE 56048 |
(1537) 0x55ff0 ADD %RBX,%RDI |
(1537) 0x55ff3 MOV -0xd0(%RBP),%R13 |
(1537) 0x55ffa MOV -0x38(%RBP),%RBX |
(1537) 0x55ffe MOV -0x68(%RBP),%R14 |
(1537) 0x56002 NOPW %CS:(%RAX,%RAX,1) |
(1541) 0x56010 MOV (%RAX,%RDI,8),%R11 |
(1541) 0x56014 VMOVSD (%R10,%RDI,8),%XMM2 |
(1541) 0x5601a VMULSD (%R9,%RDX,8),%XMM2,%XMM18 |
(1541) 0x56021 MOV (%R12,%R11,8),%R11 |
(1541) 0x56025 VADDSD (%R10,%R11,8),%XMM18,%XMM2 |
(1541) 0x5602c VMOVSD %XMM2,(%R10,%R11,8) |
(1541) 0x56032 VADDSD %XMM1,%XMM18,%XMM1 |
(1541) 0x56038 VADDSD %XMM0,%XMM18,%XMM0 |
(1541) 0x5603e INC %RDI |
(1541) 0x56041 CMP %RDI,%R8 |
(1541) 0x56044 JNE 56010 |
(1537) 0x56046 JMP 56057 |
(1537) 0x56048 MOV -0xd0(%RBP),%R13 |
(1537) 0x5604f MOV -0x38(%RBP),%RBX |
(1537) 0x56053 MOV -0x68(%RBP),%R14 |
(1537) 0x56057 MOV -0x70(%RBP),%R8 |
(1537) 0x5605b MOV (%R8,%RSI,8),%RDI |
(1537) 0x5605f MOV 0x8(%R8,%RSI,8),%RSI |
(1537) 0x56064 MOV %RSI,%R10 |
(1537) 0x56067 SUB %RDI,%R10 |
(1537) 0x5606a JLE 55e50 |
(1537) 0x56070 MOV -0xa0(%RBP),%RAX |
(1537) 0x56077 MOV (%RAX),%R8 |
(1537) 0x5607a MOV -0x98(%RBP),%RAX |
(1537) 0x56081 MOV (%RAX),%R9 |
(1537) 0x56084 CMP $0x4,%R10 |
(1537) 0x56088 JAE 5608f |
(1537) 0x5608a JMP 56174 |
(1537) 0x5608f MOV %R10,%R11 |
(1537) 0x56092 SHR $0x2,%R11 |
(1537) 0x56096 MOV %RBX,%RAX |
(1537) 0x56099 LEA 0x18(,%RDI,8),%RBX |
(1537) 0x560a1 NOPW %CS:(%RAX,%RAX,1) |
(1538) 0x560b0 MOV -0x18(%RAX,%RBX,1),%R14 |
(1538) 0x560b5 VMOVSD -0x18(%R9,%RBX,1),%XMM2 |
(1538) 0x560bc VMOVSD (%R8,%RDX,8),%XMM3 |
(1538) 0x560c2 MOV (%R15,%R14,8),%R14 |
(1538) 0x560c6 VMOVSD (%R9,%R14,8),%XMM4 |
(1538) 0x560cc VFMADD231SD %XMM2,%XMM3,%XMM4 |
(1538) 0x560d1 VMOVSD %XMM4,(%R9,%R14,8) |
(1538) 0x560d7 MOV -0x10(%RAX,%RBX,1),%R14 |
(1538) 0x560dc VMOVSD -0x10(%R9,%RBX,1),%XMM4 |
(1538) 0x560e3 VMOVSD (%R8,%RDX,8),%XMM5 |
(1538) 0x560e9 MOV (%R15,%R14,8),%R14 |
(1538) 0x560ed VMOVSD (%R9,%R14,8),%XMM6 |
(1538) 0x560f3 VFMADD231SD %XMM4,%XMM5,%XMM6 |
(1538) 0x560f8 VMOVSD %XMM6,(%R9,%R14,8) |
(1538) 0x560fe VMOVSD -0x8(%R9,%RBX,1),%XMM6 |
(1538) 0x56105 VMULSD (%R8,%RDX,8),%XMM6,%XMM6 |
(1538) 0x5610b MOV -0x8(%RAX,%RBX,1),%R14 |
(1538) 0x56110 MOV (%R15,%R14,8),%R14 |
(1538) 0x56114 VADDSD (%R9,%R14,8),%XMM6,%XMM7 |
(1538) 0x5611a VMOVSD %XMM7,(%R9,%R14,8) |
(1538) 0x56120 VFMADD213SD %XMM6,%XMM5,%XMM4 |
(1538) 0x56125 MOV (%RAX,%RBX,1),%R14 |
(1538) 0x56129 VMOVSD (%R9,%RBX,1),%XMM5 |
(1538) 0x5612f VMULSD (%R8,%RDX,8),%XMM5,%XMM18 |
(1538) 0x56136 MOV (%R15,%R14,8),%R14 |
(1538) 0x5613a VADDSD (%R9,%R14,8),%XMM18,%XMM5 |
(1538) 0x56141 VMOVSD %XMM5,(%R9,%R14,8) |
(1538) 0x56147 VADDSD %XMM1,%XMM4,%XMM1 |
(1538) 0x5614b VMOVAPD %XMM2,%XMM5 |
(1538) 0x5614f VFMADD213SD %XMM18,%XMM3,%XMM5 |
(1538) 0x56155 VADDSD %XMM1,%XMM5,%XMM1 |
(1538) 0x56159 VADDSD %XMM0,%XMM4,%XMM0 |
(1538) 0x5615d VFMADD213SD %XMM18,%XMM3,%XMM2 |
(1538) 0x56163 VADDSD %XMM0,%XMM2,%XMM0 |
(1538) 0x56167 ADD $0x20,%RBX |
(1538) 0x5616b DEC %R11 |
(1538) 0x5616e JNE 560b0 |
(1537) 0x56174 MOV %R10,%R11 |
(1537) 0x56177 AND $-0x4,%R11 |
(1537) 0x5617b CMP %R10,%R11 |
(1537) 0x5617e JAE 561db |
(1537) 0x56180 ADD %R11,%RDI |
(1537) 0x56183 MOV -0x48(%RBP),%R11 |
(1537) 0x56187 MOV -0x38(%RBP),%RBX |
(1537) 0x5618b MOV -0x58(%RBP),%RAX |
(1537) 0x5618f MOV -0x68(%RBP),%R14 |
(1537) 0x56193 NOPW %CS:(%RAX,%RAX,1) |
(1539) 0x561a0 MOV (%RBX,%RDI,8),%R10 |
(1539) 0x561a4 VMOVSD (%R9,%RDI,8),%XMM2 |
(1539) 0x561aa VMULSD (%R8,%RDX,8),%XMM2,%XMM18 |
(1539) 0x561b1 MOV (%R15,%R10,8),%R10 |
(1539) 0x561b5 VADDSD (%R9,%R10,8),%XMM18,%XMM2 |
(1539) 0x561bc VMOVSD %XMM2,(%R9,%R10,8) |
(1539) 0x561c2 VADDSD %XMM1,%XMM18,%XMM1 |
(1539) 0x561c8 VADDSD %XMM0,%XMM18,%XMM0 |
(1539) 0x561ce INC %RDI |
(1539) 0x561d1 CMP %RDI,%RSI |
(1539) 0x561d4 JNE 561a0 |
(1537) 0x561d6 JMP 55e54 |
(1537) 0x561db MOV -0x48(%RBP),%R11 |
(1537) 0x561df MOV -0x38(%RBP),%RBX |
(1537) 0x561e3 MOV -0x58(%RBP),%RAX |
(1537) 0x561e7 MOV -0x68(%RBP),%R14 |
(1537) 0x561eb JMP 55e54 |
0x561f0 MOV -0x128(%RBP),%RAX |
0x561f7 MOV -0x30(%RBP),%RDX |
0x561fb MOV (%RAX,%RDX,8),%RCX |
0x561ff MOV 0x8(%RAX,%RDX,8),%RDX |
0x56204 CMP %RDX,%RCX |
0x56207 JGE 56350 |
0x5620d MOV -0x98(%RBP),%RBX |
0x56214 MOV -0x90(%RBP),%RAX |
0x5621b JMP 56236 |
(1535) 0x56220 VADDSD (%R14,%RCX,8),%XMM0,%XMM0 |
(1535) 0x56226 INC %RCX |
(1535) 0x56229 CMP %RDX,%RCX |
(1535) 0x5622c MOV -0x50(%RBP),%R9 |
(1535) 0x56230 JE 56357 |
(1535) 0x56236 MOV -0x178(%RBP),%RSI |
(1535) 0x5623d LEA (%RSI,%RCX,8),%RSI |
(1535) 0x56241 TEST %R13,%R13 |
(1535) 0x56244 JE 56254 |
(1535) 0x56246 MOV (%RSI),%RSI |
(1535) 0x56249 MOV -0x160(%RBP),%RDI |
(1535) 0x56250 LEA (%RDI,%RSI,8),%RSI |
(1535) 0x56254 MOV (%RSI),%RDI |
(1535) 0x56257 TEST %RDI,%RDI |
(1535) 0x5625a JS 56300 |
(1535) 0x56260 MOV -0x60(%RBP),%RSI |
(1535) 0x56264 MOV -0x30(%RBP),%R8 |
(1535) 0x56268 CMP %R8,(%RSI,%RDI,8) |
(1535) 0x5626c JNE 56300 |
(1535) 0x56272 MOV -0x150(%RBP),%RSI |
(1535) 0x56279 MOV 0x8(%RSI,%RDI,8),%RSI |
(1535) 0x5627e TEST %RSI,%RSI |
(1535) 0x56281 JLE 56226 |
(1535) 0x56283 MOV -0x140(%RBP),%R8 |
(1535) 0x5628a MOV (%R8,%RDI,8),%RDI |
(1535) 0x5628e ADD %RDI,%RSI |
(1535) 0x56291 MOV -0x148(%RBP),%R8 |
(1535) 0x56298 MOV (%R8),%R8 |
(1535) 0x5629b MOV (%R9),%R9 |
(1535) 0x5629e MOV (%R8,%R9,8),%R8 |
(1535) 0x562a2 JMP 562dc |
(1536) 0x562b0 MOV (%RBX),%R10 |
(1536) 0x562b3 MOV (%R15,%R9,8),%R9 |
(1536) 0x562b7 VADDSD (%R10,%R9,8),%XMM18,%XMM2 |
(1536) 0x562be VMOVSD %XMM2,(%R10,%R9,8) |
(1536) 0x562c4 VADDSD %XMM1,%XMM18,%XMM1 |
(1536) 0x562ca VADDSD %XMM0,%XMM18,%XMM0 |
(1536) 0x562d0 INC %RDI |
(1536) 0x562d3 CMP %RSI,%RDI |
(1536) 0x562d6 JGE 56226 |
(1536) 0x562dc MOV (%R8,%RDI,8),%R9 |
(1536) 0x562e0 VMOVSD (%R11,%RDI,8),%XMM2 |
(1536) 0x562e6 VMULSD (%R14,%RCX,8),%XMM2,%XMM18 |
(1536) 0x562ed TEST %R9,%R9 |
(1536) 0x562f0 JNS 562b0 |
(1536) 0x562f2 MOV (%RAX),%R10 |
(1536) 0x562f5 NOT %R9 |
(1536) 0x562f8 MOV (%R12,%R9,8),%R9 |
(1536) 0x562fc JMP 562b7 |
(1535) 0x56300 MOV -0x168(%RBP),%RSI |
(1535) 0x56307 CMPQ $-0x3,(%RSI,%RDI,8) |
(1535) 0x5630c JE 56226 |
(1535) 0x56312 CMPQ $0x1,-0xf0(%RBP) |
(1535) 0x5631a JE 56220 |
(1535) 0x56320 MOV -0x138(%RBP),%RSI |
(1535) 0x56327 MOV (%RSI,%RDI,8),%RSI |
(1535) 0x5632b MOV -0xd8(%RBP),%RDI |
(1535) 0x56332 MOV -0x30(%RBP),%R8 |
(1535) 0x56336 CMP (%RDI,%R8,8),%RSI |
(1535) 0x5633a JE 56220 |
(1535) 0x56340 JMP 56226 |
0x56350 MOV -0x98(%RBP),%RBX |
0x56357 MOV -0xb0(%RBP),%RAX |
0x5635e MOV -0x40(%RBP),%RCX |
0x56362 VMULSD (%RAX,%RCX,8),%XMM1,%XMM1 |
0x56367 VUCOMISD %XMM16,%XMM1 |
0x5636d JE 5637b |
0x5636f VXORPD %XMM17,%XMM0,%XMM0 |
0x56375 VDIVSD %XMM1,%XMM0,%XMM18 |
0x5637b MOV -0x78(%RBP),%RAX |
0x5637f MOV -0x30(%RBP),%RCX |
0x56383 MOV (%RAX,%RCX,8),%RSI |
0x56387 MOV 0x8(%RAX,%RCX,8),%RAX |
0x5638c MOV %RAX,%RDI |
0x5638f SUB %RSI,%RDI |
0x56392 JLE 56404 |
0x56394 MOV -0x90(%RBP),%RCX |
0x5639b MOV (%RCX),%RCX |
0x5639e MOV %RDI,%RDX |
0x563a1 AND $-0x4,%RDX |
0x563a5 JE 563e6 |
0x563a7 LEA -0x1(%RDX),%R8 |
0x563ab LEA (%RCX,%RSI,8),%R9 |
0x563af XOR %R10D,%R10D |
0x563b2 NOPW %CS:(%RAX,%RAX,1) |
(1534) 0x563c0 VBROADCASTSD %XMM18,%YMM0 |
(1534) 0x563c6 VMULPD (%R9,%R10,8),%YMM0,%YMM0 |
(1534) 0x563cc VMOVUPD %YMM0,(%R9,%R10,8) |
(1534) 0x563d2 ADD $0x4,%R10 |
(1534) 0x563d6 CMP %R8,%R10 |
(1534) 0x563d9 JBE 563c0 |
0x563db CMP %RDX,%RDI |
0x563de MOV -0x50(%RBP),%R9 |
0x563e2 JNE 563e8 |
0x563e4 JMP 56404 |
0x563e6 XOR %EDX,%EDX |
0x563e8 ADD %RSI,%RDX |
0x563eb NOPL (%RAX,%RAX,1) |
(1533) 0x563f0 VMULSD (%RCX,%RDX,8),%XMM18,%XMM0 |
(1533) 0x563f7 VMOVSD %XMM0,(%RCX,%RDX,8) |
(1533) 0x563fc INC %RDX |
(1533) 0x563ff CMP %RDX,%RAX |
(1533) 0x56402 JNE 563f0 |
0x56404 MOV -0x70(%RBP),%RAX |
0x56408 MOV -0x30(%RBP),%RCX |
0x5640c MOV (%RAX,%RCX,8),%RSI |
0x56410 MOV 0x8(%RAX,%RCX,8),%RAX |
0x56415 MOV %RAX,%RDI |
0x56418 SUB %RSI,%RDI |
0x5641b JLE 559d0 |
0x56421 MOV (%RBX),%RCX |
0x56424 MOV %RDI,%RDX |
0x56427 AND $-0x4,%RDX |
0x5642b JE 5646a |
0x5642d LEA -0x1(%RDX),%R8 |
0x56431 LEA (%RCX,%RSI,8),%R9 |
0x56435 XOR %R10D,%R10D |
0x56438 NOPL (%RAX,%RAX,1) |
(1532) 0x56440 VBROADCASTSD %XMM18,%YMM0 |
(1532) 0x56446 VMULPD (%R9,%R10,8),%YMM0,%YMM0 |
(1532) 0x5644c VMOVUPD %YMM0,(%R9,%R10,8) |
(1532) 0x56452 ADD $0x4,%R10 |
(1532) 0x56456 CMP %R8,%R10 |
(1532) 0x56459 JBE 56440 |
0x5645b CMP %RDX,%RDI |
0x5645e MOV -0x50(%RBP),%R9 |
0x56462 JE 559d0 |
0x56468 JMP 5646c |
0x5646a XOR %EDX,%EDX |
0x5646c ADD %RSI,%RDX |
0x5646f NOP |
(1531) 0x56470 VMULSD (%RCX,%RDX,8),%XMM18,%XMM0 |
(1531) 0x56477 VMOVSD %XMM0,(%RCX,%RDX,8) |
(1531) 0x5647c INC %RDX |
(1531) 0x5647f CMP %RDX,%RAX |
(1531) 0x56482 JNE 56470 |
0x56484 JMP 559d0 |
/home/eoseret/qaas_runs_CPU_9468/171-147-2675/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 1747 - 1876 |
-------------------------------------------------------------------------------- |
1747: if (n_fine) |
[...] |
1774: for (i=thread_start; i < thread_stop; i++) |
1775: { |
1776: i1 = pass_array[i]; |
1777: sum_C = 0; |
1778: sum_N = 0; |
1779: j_start = P_diag_start[i1]; |
1780: j_end = j_start+P_diag_i[i1+1]-P_diag_i[i1]; |
1781: cnt = P_diag_i[i1]; |
1782: for (j=j_start; j < j_end; j++) |
1783: { |
1784: k1 = P_diag_pass[pass][j]; |
1785: tmp_array[k1] = cnt; |
1786: P_diag_data[cnt] = 0; |
1787: P_diag_j[cnt++] = k1; |
1788: } |
1789: j_start = P_offd_start[i1]; |
1790: j_end = j_start+P_offd_i[i1+1]-P_offd_i[i1]; |
1791: cnt_offd = P_offd_i[i1]; |
1792: for (j=j_start; j < j_end; j++) |
1793: { |
1794: k1 = P_offd_pass[pass][j]; |
1795: tmp_array_offd[k1] = cnt_offd; |
1796: P_offd_data[cnt_offd] = 0; |
1797: P_offd_j[cnt_offd++] = k1; |
1798: } |
1799: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
1800: { |
1801: j1 = S_diag_j[j]; |
1802: if (assigned[j1] == pass-1) |
1803: tmp_marker[j1] = i1; |
1804: } |
1805: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
1806: { |
1807: j1 = S_offd_j[j]; |
1808: if (assigned_offd[j1] == pass-1) |
1809: tmp_marker_offd[j1] = i1; |
1810: } |
1811: for (j=A_diag_i[i1]+1; j < A_diag_i[i1+1]; j++) |
1812: { |
1813: j1 = A_diag_j[j]; |
1814: if (tmp_marker[j1] == i1) |
1815: { |
1816: for (k=P_diag_i[j1]; k < P_diag_i[j1+1]; k++) |
1817: { |
1818: k1 = P_diag_j[k]; |
1819: alfa = A_diag_data[j]*P_diag_data[k]; |
1820: P_diag_data[tmp_array[k1]] += alfa; |
1821: sum_C += alfa; |
1822: sum_N += alfa; |
1823: } |
1824: for (k=P_offd_i[j1]; k < P_offd_i[j1+1]; k++) |
1825: { |
1826: k1 = P_offd_j[k]; |
1827: alfa = A_diag_data[j]*P_offd_data[k]; |
1828: P_offd_data[tmp_array_offd[k1]] += alfa; |
1829: sum_C += alfa; |
1830: sum_N += alfa; |
1831: } |
1832: } |
1833: else |
1834: { |
1835: if (CF_marker[j1] != -3 && |
1836: (num_functions == 1 || dof_func[i1] == dof_func[j1])) |
1837: sum_N += A_diag_data[j]; |
1838: } |
1839: } |
1840: for (j=A_offd_i[i1]; j < A_offd_i[i1+1]; j++) |
1841: { |
1842: if (col_offd_S_to_A) |
1843: j1 = map_A_to_S[A_offd_j[j]]; |
1844: else |
1845: j1 = A_offd_j[j]; |
1846: |
1847: if (j1 > -1 && tmp_marker_offd[j1] == i1) |
1848: { |
1849: j_start = Pext_start[j1]; |
1850: j_end = j_start+Pext_i[j1+1]; |
1851: for (k=j_start; k < j_end; k++) |
1852: { |
1853: k1 = Pext_pass[pass][k]; |
1854: alfa = A_offd_data[j]*Pext_data[k]; |
1855: if (k1 < 0) |
1856: P_diag_data[tmp_array[-k1-1]] += alfa; |
1857: else |
1858: P_offd_data[tmp_array_offd[k1]] += alfa; |
1859: sum_C += alfa; |
1860: sum_N += alfa; |
1861: } |
1862: } |
1863: else |
1864: { |
1865: if (CF_marker_offd[j1] != -3 && |
1866: (num_functions == 1 || dof_func_offd[j1] == dof_func[i1])) |
1867: sum_N += A_offd_data[j]; |
1868: } |
1869: } |
1870: diagonal = A_diag_data[A_diag_i[i1]]; |
1871: if (sum_C*diagonal) alfa = -sum_N/(sum_C*diagonal); |
1872: |
1873: for (j=P_diag_i[i1]; j < P_diag_i[i1+1]; j++) |
1874: P_diag_data[j] *= alfa; |
1875: for (j=P_offd_i[i1]; j < P_offd_i[i1+1]; j++) |
1876: P_offd_data[j] *= alfa; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 3.37 |
CQA speedup if FP arith vectorized | 3.68 |
CQA speedup if fully vectorized | 13.38 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.28 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass.extracted.28 |
Source | par_multi_interp.c:1747-1747,par_multi_interp.c:1774-1776,par_multi_interp.c:1779-1786,par_multi_interp.c:1789-1796,par_multi_interp.c:1799-1799,par_multi_interp.c:1802-1802,par_multi_interp.c:1805-1805,par_multi_interp.c:1811-1811,par_multi_interp.c:1824-1824,par_multi_interp.c:1840-1840,par_multi_interp.c:1865-1865,par_multi_interp.c:1871-1876 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 33.17 |
CQA cycles if no scalar integer | 9.83 |
CQA cycles if FP arith vectorized | 9.01 |
CQA cycles if fully vectorized | 2.48 |
Front-end cycles | 33.17 |
DIV/SQRT cycles | 10.50 |
P0 cycles | 10.00 |
P1 cycles | 26.00 |
P2 cycles | 26.00 |
P3 cycles | 4.50 |
P4 cycles | 10.00 |
P5 cycles | 10.50 |
P6 cycles | 4.50 |
P7 cycles | 4.50 |
P8 cycles | 4.50 |
P9 cycles | 10.00 |
P10 cycles | 26.00 |
P11 cycles | 4.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 33.29 - 33.31 |
Stall cycles (UFS) | 0.50 |
Nb insns | 194.00 |
Nb uops | 198.00 |
Nb loads | 78.00 |
Nb stores | 7.00 |
Nb stack references | 28.00 |
FLOP/cycle | 0.06 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 1.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 1.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 20.50 |
Bytes prefetched | 0.00 |
Bytes loaded | 624.00 |
Bytes stored | 56.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 12.20 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 22.73 |
Vector-efficiency ratio all | 13.72 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 14.77 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 3.37 |
CQA speedup if FP arith vectorized | 3.68 |
CQA speedup if fully vectorized | 13.38 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.28 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass.extracted.28 |
Source | par_multi_interp.c:1747-1747,par_multi_interp.c:1774-1776,par_multi_interp.c:1779-1786,par_multi_interp.c:1789-1796,par_multi_interp.c:1799-1799,par_multi_interp.c:1802-1802,par_multi_interp.c:1805-1805,par_multi_interp.c:1811-1811,par_multi_interp.c:1824-1824,par_multi_interp.c:1840-1840,par_multi_interp.c:1865-1865,par_multi_interp.c:1871-1876 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 33.17 |
CQA cycles if no scalar integer | 9.83 |
CQA cycles if FP arith vectorized | 9.01 |
CQA cycles if fully vectorized | 2.48 |
Front-end cycles | 33.17 |
DIV/SQRT cycles | 10.50 |
P0 cycles | 10.00 |
P1 cycles | 26.00 |
P2 cycles | 26.00 |
P3 cycles | 4.50 |
P4 cycles | 10.00 |
P5 cycles | 10.50 |
P6 cycles | 4.50 |
P7 cycles | 4.50 |
P8 cycles | 4.50 |
P9 cycles | 10.00 |
P10 cycles | 26.00 |
P11 cycles | 4.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 33.29 - 33.31 |
Stall cycles (UFS) | 0.50 |
Nb insns | 194.00 |
Nb uops | 198.00 |
Nb loads | 78.00 |
Nb stores | 7.00 |
Nb stack references | 28.00 |
FLOP/cycle | 0.06 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 1.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 1.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 20.50 |
Bytes prefetched | 0.00 |
Bytes loaded | 624.00 |
Bytes stored | 56.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 12.20 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 22.73 |
Vector-efficiency ratio all | 13.72 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 14.77 |
Path / |
Function | hypre_BoomerAMGBuildMultipass.extracted.28 |
Source file and lines | par_multi_interp.c:1747-1876 |
Module | libparcsr_ls.so |
nb instructions | 194 |
nb uops | 198 |
loop length | 876 |
used x86 registers | 13 |
used mmx registers | 0 |
used xmm registers | 5 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 28 |
micro-operation queue | 33.17 cycles |
front end | 33.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 10.50 | 10.00 | 26.00 | 26.00 | 4.50 | 10.00 | 10.50 | 4.50 | 4.50 | 4.50 | 10.00 | 26.00 |
cycles | 10.50 | 10.00 | 26.00 | 26.00 | 4.50 | 10.00 | 10.50 | 4.50 | 4.50 | 4.50 | 10.00 | 26.00 |
Cycles executing div or sqrt instructions | 4.00 |
FE+BE cycles | 33.29-33.31 |
Stall cycles | 0.50 |
LM full (events) | 1.01 |
Front-end | 33.17 |
Dispatch | 26.00 |
DIV/SQRT | 4.00 |
Overall L1 | 33.17 |
all | 5% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 50% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 75% |
all | 12% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 22% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 13% |
all | 18% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 21% |
all | 13% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 14% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x88(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP -0xc8(%RBP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 56489 <hypre_BoomerAMGBuildMultipass.extracted.28+0xe69> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDX,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RDX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x130(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%RAX,%RCX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RSI,%R14,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %R13,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %RAX,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 55b96 <hypre_BoomerAMGBuildMultipass.extracted.28+0x576> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x108(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R13,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0xc,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 55b60 <hypre_BoomerAMGBuildMultipass.extracted.28+0x540> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RSI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RAX,%R13,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (,%RCX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RCX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL e4a0 <__intel_avx_rep_memset@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xa8(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA (,%R14,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x100(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RDX,%R13,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R10,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x48(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x40(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JAE 55b96 <hypre_BoomerAMGBuildMultipass.extracted.28+0x576> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RAX,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RAX,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 55b96 <hypre_BoomerAMGBuildMultipass.extracted.28+0x576> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX,%RCX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RSI,%R14,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %R13,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %RAX,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x38(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 55d36 <hypre_BoomerAMGBuildMultipass.extracted.28+0x716> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x110(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x98(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R13,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0xc,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 55d00 <hypre_BoomerAMGBuildMultipass.extracted.28+0x6e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RSI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RAX,%R13,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (,%RCX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RCX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL e4a0 <__intel_avx_rep_memset@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xa8(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA (,%R14,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xf8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RDX,%R13,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R10,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x48(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x40(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JAE 55d36 <hypre_BoomerAMGBuildMultipass.extracted.28+0x716> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RAX,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RAX,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 55d36 <hypre_BoomerAMGBuildMultipass.extracted.28+0x716> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x38(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xe0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RSI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%RSI,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xd0(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x68(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 55db0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x790> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x118(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 55d78 <hypre_BoomerAMGBuildMultipass.extracted.28+0x758> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0xe8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RDX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%RDX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 55dd3 <hypre_BoomerAMGBuildMultipass.extracted.28+0x7b3> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x120(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX,%RCX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RSI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VXORPD %XMM1,%XMM1,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RSI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JGE 561f0 <hypre_BoomerAMGBuildMultipass.extracted.28+0xbd0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 55e64 <hypre_BoomerAMGBuildMultipass.extracted.28+0x844> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x128(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RDX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX,%RDX,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 56350 <hypre_BoomerAMGBuildMultipass.extracted.28+0xd30> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x98(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 56236 <hypre_BoomerAMGBuildMultipass.extracted.28+0xc16> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x98(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x40(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD (%RAX,%RCX,8),%XMM1,%XMM1 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VUCOMISD %XMM16,%XMM1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JE 5637b <hypre_BoomerAMGBuildMultipass.extracted.28+0xd5b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VXORPD %XMM17,%XMM0,%XMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VDIVSD %XMM1,%XMM0,%XMM18 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 4 |
MOV -0x78(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX,%RCX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RSI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 56404 <hypre_BoomerAMGBuildMultipass.extracted.28+0xde4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x90(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 563e6 <hypre_BoomerAMGBuildMultipass.extracted.28+0xdc6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%RDX),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%RCX,%RSI,8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R10D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x50(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 563e8 <hypre_BoomerAMGBuildMultipass.extracted.28+0xdc8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 56404 <hypre_BoomerAMGBuildMultipass.extracted.28+0xde4> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX,%RCX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RSI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 559d0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x3b0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%RBX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 5646a <hypre_BoomerAMGBuildMultipass.extracted.28+0xe4a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%RDX),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%RCX,%RSI,8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R10D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x50(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 559d0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x3b0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 5646c <hypre_BoomerAMGBuildMultipass.extracted.28+0xe4c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 559d0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x3b0> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
Function | hypre_BoomerAMGBuildMultipass.extracted.28 |
Source file and lines | par_multi_interp.c:1747-1876 |
Module | libparcsr_ls.so |
nb instructions | 194 |
nb uops | 198 |
loop length | 876 |
used x86 registers | 13 |
used mmx registers | 0 |
used xmm registers | 5 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 28 |
micro-operation queue | 33.17 cycles |
front end | 33.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 10.50 | 10.00 | 26.00 | 26.00 | 4.50 | 10.00 | 10.50 | 4.50 | 4.50 | 4.50 | 10.00 | 26.00 |
cycles | 10.50 | 10.00 | 26.00 | 26.00 | 4.50 | 10.00 | 10.50 | 4.50 | 4.50 | 4.50 | 10.00 | 26.00 |
Cycles executing div or sqrt instructions | 4.00 |
FE+BE cycles | 33.29-33.31 |
Stall cycles | 0.50 |
LM full (events) | 1.01 |
Front-end | 33.17 |
Dispatch | 26.00 |
DIV/SQRT | 4.00 |
Overall L1 | 33.17 |
all | 5% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 50% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 75% |
all | 12% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 22% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 13% |
all | 18% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 21% |
all | 13% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 14% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x88(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP -0xc8(%RBP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 56489 <hypre_BoomerAMGBuildMultipass.extracted.28+0xe69> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDX,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RDX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x130(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%RAX,%RCX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RSI,%R14,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %R13,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %RAX,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 55b96 <hypre_BoomerAMGBuildMultipass.extracted.28+0x576> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x108(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R13,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0xc,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 55b60 <hypre_BoomerAMGBuildMultipass.extracted.28+0x540> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RSI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RAX,%R13,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (,%RCX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RCX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL e4a0 <__intel_avx_rep_memset@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xa8(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA (,%R14,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x100(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RDX,%R13,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R10,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x48(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x40(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JAE 55b96 <hypre_BoomerAMGBuildMultipass.extracted.28+0x576> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RAX,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RAX,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 55b96 <hypre_BoomerAMGBuildMultipass.extracted.28+0x576> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX,%RCX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RSI,%R14,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %R13,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %RAX,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x38(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 55d36 <hypre_BoomerAMGBuildMultipass.extracted.28+0x716> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x110(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x98(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R13,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0xc,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 55d00 <hypre_BoomerAMGBuildMultipass.extracted.28+0x6e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RSI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RAX,%R13,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (,%RCX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RCX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL e4a0 <__intel_avx_rep_memset@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xa8(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA (,%R14,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xf8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RDX,%R13,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R10,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x48(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x40(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JAE 55d36 <hypre_BoomerAMGBuildMultipass.extracted.28+0x716> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RAX,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RAX,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 55d36 <hypre_BoomerAMGBuildMultipass.extracted.28+0x716> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x38(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xe0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RSI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%RSI,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xd0(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x68(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 55db0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x790> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x118(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 55d78 <hypre_BoomerAMGBuildMultipass.extracted.28+0x758> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0xe8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RDX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%RDX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 55dd3 <hypre_BoomerAMGBuildMultipass.extracted.28+0x7b3> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x120(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX,%RCX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RSI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VXORPD %XMM1,%XMM1,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RSI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JGE 561f0 <hypre_BoomerAMGBuildMultipass.extracted.28+0xbd0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 55e64 <hypre_BoomerAMGBuildMultipass.extracted.28+0x844> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x128(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RDX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX,%RDX,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 56350 <hypre_BoomerAMGBuildMultipass.extracted.28+0xd30> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x98(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 56236 <hypre_BoomerAMGBuildMultipass.extracted.28+0xc16> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x98(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x40(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD (%RAX,%RCX,8),%XMM1,%XMM1 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VUCOMISD %XMM16,%XMM1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JE 5637b <hypre_BoomerAMGBuildMultipass.extracted.28+0xd5b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VXORPD %XMM17,%XMM0,%XMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VDIVSD %XMM1,%XMM0,%XMM18 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 4 |
MOV -0x78(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX,%RCX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RSI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 56404 <hypre_BoomerAMGBuildMultipass.extracted.28+0xde4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x90(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 563e6 <hypre_BoomerAMGBuildMultipass.extracted.28+0xdc6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%RDX),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%RCX,%RSI,8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R10D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x50(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 563e8 <hypre_BoomerAMGBuildMultipass.extracted.28+0xdc8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 56404 <hypre_BoomerAMGBuildMultipass.extracted.28+0xde4> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX,%RCX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RSI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 559d0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x3b0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%RBX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 5646a <hypre_BoomerAMGBuildMultipass.extracted.28+0xe4a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%RDX),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%RCX,%RSI,8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R10D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x50(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 559d0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x3b0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 5646c <hypre_BoomerAMGBuildMultipass.extracted.28+0xe4c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 559d0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x3b0> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |