| Loop Id: 2872 | Module: exec | Source: par_csr_matop.c:865-937 [...] | Coverage: 0.08% |
|---|
| Loop Id: 2872 | Module: exec | Source: par_csr_matop.c:865-937 [...] | Coverage: 0.08% |
|---|
0x483b88 LDUR X8, [X29, #432] |
0x483b8c ORR X19, XZR, X2 |
0x483b90 ORR X22, XZR, X1 |
0x483b94 CMP X26, X8 |
0x483b98 B.GE 483e80 |
0x483b9c LDUR X8, [X29, #424] |
0x483ba0 LDR X8, [X8] |
0x483ba4 CBZ X8, 483bc4 |
0x483ba8 LDUR X8, [X29, #408] |
0x483bac ADD X1, X22, #1 |
0x483bb0 STR X22, [X0, X26,LSL #3] |
0x483bb4 LDR D0, [X8] |
0x483bb8 LDP X8, X9, [SP, #104] |
0x483bbc STR X26, [X8, X22,LSL #3] |
0x483bc0 STR D0, [X9, X22,LSL #3] |
0x483bc4 LDUR X8, [X29, #416] |
0x483bc8 LDR X8, [X8] |
0x483bcc CBZ X8, 483d20 |
0x483bd0 LDR X8, [SP, #96] |
0x483bd4 ADD X3, X8, X26,LSL #3 |
0x483bd8 LDP X4, X8, [X3] |
0x483bdc CMP X4, X8 |
0x483be0 B.GE 483d20 |
0x483be4 LDP X9, X8, [SP, #48] |
0x483be8 ORR X2, XZR, X19 |
0x483bec LDR X5, [X9] |
0x483bf0 LDR X6, [X8] |
0x483bf4 B 483c10 |
(2877) 0x483c00 LDR X8, [X3, #8] |
(2877) 0x483c04 ADD X4, X4, #1 |
(2877) 0x483c08 CMP X4, X8 |
(2877) 0x483c0c B.GE 483d24 |
(2877) 0x483c10 LDP X8, X9, [X29, #984] |
(2877) 0x483c14 LDR X30, [X9, X4,LSL #3] |
(2877) 0x483c18 LDR D0, [X8, X4,LSL #3] |
(2877) 0x483c1c ADD X7, X30, #1 |
(2877) 0x483c20 LDR X8, [X13, X30,LSL #3] |
(2877) 0x483c24 LDR X23, [X13, X7,LSL #3] |
(2877) 0x483c28 CMP X8, X23 |
(2877) 0x483c2c B.GE 483ca4 |
(2877) 0x483c30 LDUR X9, [X29, #440] |
(2877) 0x483c34 LDP X10, X11, [X29, #1000] |
(2877) 0x483c38 LDR X9, [X9] |
(2877) 0x483c3c LDR X10, [X10] |
(2877) 0x483c40 LDR X27, [X11] |
(2877) 0x483c44 B 483c64 |
(2879) 0x483c48 LDR D1, [X9, X8,LSL #3] |
(2879) 0x483c4c LDR D2, [X10, X11,LSL #3] |
(2879) 0x483c50 FMADD D1, D1, D0, D2 |
(2879) 0x483c54 STR D1, [X10, X11,LSL #3] |
(2879) 0x483c58 ADD X8, X8, #1 |
(2879) 0x483c5c CMP X8, X23 |
(2879) 0x483c60 B.GE 483ca4 |
(2879) 0x483c64 LDR X11, [X20] |
(2879) 0x483c68 LDR X12, [X5, X8,LSL #3] |
(2879) 0x483c6c ADD X24, X12, X11 |
(2879) 0x483c70 LDR X11, [X0, X24,LSL #3] |
(2879) 0x483c74 CMP X11, X19 |
(2879) 0x483c78 B.GE 483c48 |
(2879) 0x483c7c STR X2, [X0, X24,LSL #3] |
(2879) 0x483c80 LDR D1, [X9, X8,LSL #3] |
(2879) 0x483c84 LDR X11, [X20] |
(2879) 0x483c88 SUB X11, X24, X11 |
(2879) 0x483c8c STR X11, [X27, X2,LSL #3] |
(2879) 0x483c90 FMUL D1, D1, D0 |
(2879) 0x483c94 LDR X23, [X13, X7,LSL #3] |
(2879) 0x483c98 STR D1, [X10, X2,LSL #3] |
(2879) 0x483c9c ADD X2, X2, #1 |
(2879) 0x483ca0 B 483c58 |
(2877) 0x483ca4 LDR X8, [X14, X30,LSL #3] |
(2877) 0x483ca8 LDR X23, [X14, X7,LSL #3] |
(2877) 0x483cac CMP X8, X23 |
(2877) 0x483cb0 B.GE 483c00 |
(2877) 0x483cb4 LDUR X9, [X29, #448] |
(2877) 0x483cb8 LDR X10, [X25] |
(2877) 0x483cbc LDR X27, [X21] |
(2877) 0x483cc0 LDR X9, [X9] |
(2877) 0x483cc4 B 483ce4 |
(2878) 0x483cc8 LDR D1, [X9, X8,LSL #3] |
(2878) 0x483ccc LDR D2, [X10, X11,LSL #3] |
(2878) 0x483cd0 FMADD D1, D1, D0, D2 |
(2878) 0x483cd4 STR D1, [X10, X11,LSL #3] |
(2878) 0x483cd8 ADD X8, X8, #1 |
(2878) 0x483cdc CMP X8, X23 |
(2878) 0x483ce0 B.GE 483c00 |
(2878) 0x483ce4 LDR X24, [X6, X8,LSL #3] |
(2878) 0x483ce8 LDR X11, [X0, X24,LSL #3] |
(2878) 0x483cec CMP X11, X22 |
(2878) 0x483cf0 B.GE 483cc8 |
(2878) 0x483cf4 LDR D1, [X9, X8,LSL #3] |
(2878) 0x483cf8 STR X1, [X0, X24,LSL #3] |
(2878) 0x483cfc STR X24, [X27, X1,LSL #3] |
(2878) 0x483d00 LDR X23, [X14, X7,LSL #3] |
(2878) 0x483d04 FMUL D1, D1, D0 |
(2878) 0x483d08 STR D1, [X10, X1,LSL #3] |
(2878) 0x483d0c ADD X1, X1, #1 |
(2878) 0x483d10 B 483cd8 |
0x483d20 ORR X2, XZR, X19 |
0x483d24 LDR X3, [X15, X26,LSL #3] |
0x483d28 ADD X26, X26, #1 |
0x483d2c LDR X8, [X15, X26,LSL #3] |
0x483d30 CMP X3, X8 |
0x483d34 B.GE 483b88 |
/home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/build/AMG/AMG/parcsr_mv/par_csr_matop.c: 865 - 937 |
-------------------------------------------------------------------------------- |
865: for (i1 = ns; i1 < ne; i1++) |
[...] |
874: if ( allsquare ) |
875: { |
876: B_marker[i1] = jj_count_diag; |
877: C_diag_data[jj_count_diag] = zero; |
878: C_diag_j[jj_count_diag] = i1; |
879: jj_count_diag++; |
[...] |
886: if (num_cols_offd_A) |
887: { |
888: for (jj2 = A_offd_i[i1]; jj2 < A_offd_i[i1+1]; jj2++) |
889: { |
890: i2 = A_offd_j[jj2]; |
891: a_entry = A_offd_data[jj2]; |
[...] |
897: for (jj3 = B_ext_offd_i[i2]; jj3 < B_ext_offd_i[i2+1]; jj3++) |
898: { |
899: i3 = num_cols_diag_B+B_ext_offd_j[jj3]; |
[...] |
907: if (B_marker[i3] < jj_row_begin_offd) |
908: { |
909: B_marker[i3] = jj_count_offd; |
910: C_offd_data[jj_count_offd] = a_entry*B_ext_offd_data[jj3]; |
911: C_offd_j[jj_count_offd] = i3-num_cols_diag_B; |
912: jj_count_offd++; |
913: } |
914: else |
915: C_offd_data[B_marker[i3]] += a_entry*B_ext_offd_data[jj3]; |
916: } |
917: for (jj3 = B_ext_diag_i[i2]; jj3 < B_ext_diag_i[i2+1]; jj3++) |
918: { |
919: i3 = B_ext_diag_j[jj3]; |
920: if (B_marker[i3] < jj_row_begin_diag) |
921: { |
922: B_marker[i3] = jj_count_diag; |
923: C_diag_data[jj_count_diag] = a_entry*B_ext_diag_data[jj3]; |
924: C_diag_j[jj_count_diag] = i3; |
925: jj_count_diag++; |
926: } |
927: else |
928: C_diag_data[B_marker[i3]] += a_entry*B_ext_diag_data[jj3]; |
[...] |
937: for (jj2 = A_diag_i[i1]; jj2 < A_diag_i[i1+1]; jj2++) |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ○100.00 | __kmp_invoke_microtask | libomp.so |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ○100.00 | __kmp_invoke_microtask | libomp.so |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ○100.00 | __kmp_invoke_microtask | libomp.so |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ○100.00 | __kmp_invoke_microtask | libomp.so |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ○100.00 | __kmp_invoke_microtask | libomp.so |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ○100.00 | __kmp_invoke_microtask | libomp.so |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ○100.00 | __kmp_invoke_microtask | libomp.so |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ○100.00 | __kmp_invoke_microtask | libomp.so |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ○100.00 | __kmp_invoke_microtask | libomp.so |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ○100.00 | __kmp_invoke_microtask | libomp.so |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ○100.00 | __kmp_invoke_microtask | libomp.so |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ○100.00 | __kmp_invoke_microtask | libomp.so |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ○100.00 | __kmp_invoke_microtask | libomp.so |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ○100.00 | __kmp_invoke_microtask | libomp.so |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ○100.00 | __kmp_invoke_microtask | libomp.so |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.28 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 2.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.03 |
| Bottlenecks | P12, |
| Function | hypre_ParMatmul.omp_outlined.7 |
| Source | par_csr_matop.c:865-865,par_csr_matop.c:874-879,par_csr_matop.c:886-888,par_csr_matop.c:926-926,par_csr_matop.c:937-937 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 6.17 |
| CQA cycles if no scalar integer | 4.83 |
| CQA cycles if FP arith vectorized | 6.17 |
| CQA cycles if fully vectorized | 3.08 |
| Front-end cycles | 4.25 |
| P0 cycles | 3.00 |
| P1 cycles | 3.00 |
| P2 cycles | 1.75 |
| P3 cycles | 1.75 |
| P4 cycles | 1.67 |
| P5 cycles | 1.67 |
| P6 cycles | 1.58 |
| P7 cycles | 1.58 |
| P8 cycles | 0.50 |
| P9 cycles | 0.50 |
| P10 cycles | 0.00 |
| P11 cycles | 0.00 |
| P12 cycles | 6.17 |
| P13 cycles | 5.83 |
| P14 cycles | 6.00 |
| P15 cycles | 1.00 |
| P16 cycles | 1.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | NA |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 34.00 |
| Nb uops | 34.00 |
| Nb loads | NA |
| Nb stores | 3.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 27.24 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 144.00 |
| Bytes stored | 24.00 |
| Stride 0 | NA |
| Stride 1 | NA |
| Stride n | NA |
| Stride unknown | NA |
| Stride indirect | NA |
| Vectorization ratio all | 0.00 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | 0.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 0.00 |
| Vector-efficiency ratio all | 50.00 |
| Vector-efficiency ratio load | 50.00 |
| Vector-efficiency ratio store | 50.00 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | 50.00 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 50.00 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.28 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 2.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.03 |
| Bottlenecks | P12, |
| Function | hypre_ParMatmul.omp_outlined.7 |
| Source | par_csr_matop.c:865-865,par_csr_matop.c:874-879,par_csr_matop.c:886-888,par_csr_matop.c:926-926,par_csr_matop.c:937-937 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 6.17 |
| CQA cycles if no scalar integer | 4.83 |
| CQA cycles if FP arith vectorized | 6.17 |
| CQA cycles if fully vectorized | 3.08 |
| Front-end cycles | 4.25 |
| P0 cycles | 3.00 |
| P1 cycles | 3.00 |
| P2 cycles | 1.75 |
| P3 cycles | 1.75 |
| P4 cycles | 1.67 |
| P5 cycles | 1.67 |
| P6 cycles | 1.58 |
| P7 cycles | 1.58 |
| P8 cycles | 0.50 |
| P9 cycles | 0.50 |
| P10 cycles | 0.00 |
| P11 cycles | 0.00 |
| P12 cycles | 6.17 |
| P13 cycles | 5.83 |
| P14 cycles | 6.00 |
| P15 cycles | 1.00 |
| P16 cycles | 1.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | NA |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 34.00 |
| Nb uops | 34.00 |
| Nb loads | NA |
| Nb stores | 3.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 27.24 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 144.00 |
| Bytes stored | 24.00 |
| Stride 0 | NA |
| Stride 1 | NA |
| Stride n | NA |
| Stride unknown | NA |
| Stride indirect | NA |
| Vectorization ratio all | 0.00 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | 0.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 0.00 |
| Vector-efficiency ratio all | 50.00 |
| Vector-efficiency ratio load | 50.00 |
| Vector-efficiency ratio store | 50.00 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | 50.00 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 50.00 |
| Path / |
| Function | hypre_ParMatmul.omp_outlined.7 |
| Source file and lines | par_csr_matop.c:865-937 |
| Module | exec |
| nb instructions | 34 |
| loop length | 136 |
| nb stack references | 0 |
| front end | 4.25 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | P16 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 3.00 | 3.00 | 1.75 | 1.75 | 1.67 | 1.67 | 1.58 | 1.58 | 0.50 | 0.50 | 0.00 | 0.00 | 6.17 | 5.83 | 6.00 | 1.00 | 1.00 |
| cycles | 3.00 | 3.00 | 1.75 | 1.75 | 1.67 | 1.67 | 1.58 | 1.58 | 0.50 | 0.50 | 0.00 | 0.00 | 6.17 | 5.83 | 6.00 | 1.00 | 1.00 |
| Cycles executing div or sqrt instructions | NA |
| Front-end | 4.25 |
| Overall L1 | 6.17 |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | P16 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| LDUR X8, [X29, #432] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ORR X19, XZR, X2 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ORR X22, XZR, X1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CMP X26, X8 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.GE 483e80 <hypre_ParMatmul.omp_outlined.7+0x4f0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X8, [X29, #424] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBZ X8, 483bc4 <hypre_ParMatmul.omp_outlined.7+0x234> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X8, [X29, #408] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ADD X1, X22, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| STR X22, [X0, X26,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR D0, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 | scal (50.0%) |
| LDP X8, X9, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| STR X26, [X8, X22,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR D0, [X9, X22,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 | scal (50.0%) |
| LDUR X8, [X29, #416] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBZ X8, 483d20 <hypre_ParMatmul.omp_outlined.7+0x390> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ADD X3, X8, X26,LSL #3 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| LDP X4, X8, [X3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| CMP X4, X8 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.GE 483d20 <hypre_ParMatmul.omp_outlined.7+0x390> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDP X9, X8, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| ORR X2, XZR, X19 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| LDR X5, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| LDR X6, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| B 483c10 <hypre_ParMatmul.omp_outlined.7+0x280> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X2, XZR, X19 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| LDR X3, [X15, X26,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ADD X26, X26, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| LDR X8, [X15, X26,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X3, X8 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| B.GE 483b88 <hypre_ParMatmul.omp_outlined.7+0x1f8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| Function | hypre_ParMatmul.omp_outlined.7 |
| Source file and lines | par_csr_matop.c:865-937 |
| Module | exec |
| nb instructions | 34 |
| loop length | 136 |
| nb stack references | 0 |
| front end | 4.25 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | P16 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 3.00 | 3.00 | 1.75 | 1.75 | 1.67 | 1.67 | 1.58 | 1.58 | 0.50 | 0.50 | 0.00 | 0.00 | 6.17 | 5.83 | 6.00 | 1.00 | 1.00 |
| cycles | 3.00 | 3.00 | 1.75 | 1.75 | 1.67 | 1.67 | 1.58 | 1.58 | 0.50 | 0.50 | 0.00 | 0.00 | 6.17 | 5.83 | 6.00 | 1.00 | 1.00 |
| Cycles executing div or sqrt instructions | NA |
| Front-end | 4.25 |
| Overall L1 | 6.17 |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | P16 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| LDUR X8, [X29, #432] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ORR X19, XZR, X2 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ORR X22, XZR, X1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CMP X26, X8 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.GE 483e80 <hypre_ParMatmul.omp_outlined.7+0x4f0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X8, [X29, #424] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBZ X8, 483bc4 <hypre_ParMatmul.omp_outlined.7+0x234> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X8, [X29, #408] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ADD X1, X22, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| STR X22, [X0, X26,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR D0, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 | scal (50.0%) |
| LDP X8, X9, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| STR X26, [X8, X22,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR D0, [X9, X22,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 | scal (50.0%) |
| LDUR X8, [X29, #416] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBZ X8, 483d20 <hypre_ParMatmul.omp_outlined.7+0x390> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ADD X3, X8, X26,LSL #3 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| LDP X4, X8, [X3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| CMP X4, X8 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.GE 483d20 <hypre_ParMatmul.omp_outlined.7+0x390> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDP X9, X8, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| ORR X2, XZR, X19 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| LDR X5, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| LDR X6, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| B 483c10 <hypre_ParMatmul.omp_outlined.7+0x280> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X2, XZR, X19 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| LDR X3, [X15, X26,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ADD X26, X26, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| LDR X8, [X15, X26,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X3, X8 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| B.GE 483b88 <hypre_ParMatmul.omp_outlined.7+0x1f8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| Run 1x1 | Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_NUM_THREADS: 1OMP_PLACES: threads |
|---|---|
| Run 1x2 | Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 2OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads |
| Run 1x4 | Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 4OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads |
| Run 1x8 | Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 8OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads |
| Run 1x16 | Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 16OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads |
| Run 1x24 | Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 24OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads |
| Run 1x32 | Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 32OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads |
| Run 1x40 | Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 40OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads |
| Run 1x48 | Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 48OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads |
| Run 1x56 | Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 56OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads |
| Run 1x64 | Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 64OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads |
| Run 1x72 | Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 72OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads |
| Run 1x80 | Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 80OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads |
| Run 1x88 | Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 88OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads |
| Run 1x96 | Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 96OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads |
| (1x1) Efficiency | (1x1) Potential Speed-Up (%) | (1x2) Efficiency | (1x2) Potential Speed-Up (%) | (1x4) Efficiency | (1x4) Potential Speed-Up (%) | (1x8) Efficiency | (1x8) Potential Speed-Up (%) | (1x16) Efficiency | (1x16) Potential Speed-Up (%) | (1x24) Efficiency | (1x24) Potential Speed-Up (%) | (1x32) Efficiency | (1x32) Potential Speed-Up (%) | (1x40) Efficiency | (1x40) Potential Speed-Up (%) | (1x48) Efficiency | (1x48) Potential Speed-Up (%) | (1x56) Efficiency | (1x56) Potential Speed-Up (%) | (1x64) Efficiency | (1x64) Potential Speed-Up (%) | (1x72) Efficiency | (1x72) Potential Speed-Up (%) | (1x80) Efficiency | (1x80) Potential Speed-Up (%) | (1x88) Efficiency | (1x88) Potential Speed-Up (%) | (1x96) Efficiency | (1x96) Potential Speed-Up (%) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1 | 0 | 3.01 | 0 | 5.53 | 0 | 10.08 | 0 | 15.36 | 0 | 22.35 | 0 | 37.59 | 0 | 28.96 | 0 | 49.94 | 0 | 52.41 | 0 | 53.35 | 0 | 71.62 | 0 | 88.75 | 0 | 103.2 | 0 | 111.79 | 0 |
| Run | Number of threads | Efficiency (ideal is 1) | Speedup | Ideal Speedup | Time (s) | Coverage (%) |
|---|---|---|---|---|---|---|
| 1x1 | 1 | 1 | 1 | 1 | 0.21999995410442 | 0.082697756588459 |
| 1x2 | 2 | 3.01 | 3.01 | 2 | 0.089999996125698 | 0.051692575216293 |
| 1x4 | 4 | 5.53 | 5.53 | 4 | 0.049999993294477 | 0.052649598568678 |
| 1x8 | 8 | 10.08 | 10.08 | 8 | 0.034999996423721 | 0.049459405243397 |
| 1x16 | 15 | 15.36 | 15.36 | 16 | 0.024999996647239 | 0.049737259745598 |
| 1x24 | 22 | 22.35 | 22.35 | 24 | 0.024999994784594 | 0.039744280278683 |
| 1x32 | 19 | 37.59 | 37.59 | 32 | 0.01999999769032 | 0.025781482458115 |
| 1x40 | 26 | 28.96 | 28.96 | 40 | 0.019999999552965 | 0.031488016247749 |
| 1x48 | 26 | 49.94 | 49.94 | 48 | 0.014999996870756 | 0.019876943901181 |
| 1x56 | 28 | 52.41 | 52.41 | 56 | 0.019999999552965 | 0.020835988223553 |
| 1x64 | 31 | 53.35 | 53.35 | 64 | 0.02000000141561 | 0.021173259243369 |
| 1x72 | 30 | 71.62 | 71.62 | 72 | 0.0099999997764826 | 0.015792585909367 |
| 1x80 | 27 | 88.75 | 88.75 | 80 | 0.014999998733401 | 0.013849087059498 |
| 1x88 | 24 | 103.2 | 103.2 | 88 | 0.014999999664724 | 0.010867995209992 |
| 1x96 | 26 | 111.79 | 111.79 | 96 | 0.014999997802079 | 0.010073781013489 |
