OV - exec - Loop 17

	Loop Id: 17	Module: exec	Source: amg.c:794-1367 [...]	Coverage: 0.56%

    (15) 0x411044 ADD	X13, X12, #1

    (15) 0x411048 LDR	X14, [SP, #16]

    (15) 0x41104c ORR	X12, XZR, X13

    (15) 0x411050 CMP	X13, X14

    (15) 0x411054 B.EQ	411cc4

    (15) 0x411058 LDR	X13, [SP, #8]

    (15) 0x41105c CMP	X13, #0

    (15) 0x411060 B.LE	411044

  (16) 0x411064 LDR	X14, [SP]

  (16) 0x411068 ADD	X13, X12, #1

  (16) 0x41106c B	411094

  (16) 0x411080 ADD	X15, X14, #1

  (16) 0x411084 LDR	X16, [SP, #40]

  (16) 0x411088 ORR	X14, XZR, X15

  (16) 0x41108c CMP	X15, X16

  (16) 0x411090 B.GE	411048

  (16) 0x411094 CMP	X30, #0

  (16) 0x411098 B.LE	411080

0x41109c LDR	X1, [X26]

0x4110a0 LDR	X0, [SP, #32]

0x4110a4 UBFM	X17, X10, #61, #60

0x4110a8 UBFM	X18, X11, #61, #60

0x4110ac ADD	X15, X14, #1

0x4110b0 ORR	X16, XZR, XZR

0x4110b4 ADD	X17, X17, #8

0x4110b8 ADD	X18, X18, #8

0x4110bc B	411148

0x4110c0 LDR	X5, [X1]

0x4110c4 ADD	X0, X5, #1

0x4110c8 STR	X0, [X1]

0x4110cc LDR	X1, [X26]

0x4110d0 LDR	X4, [X24]

0x4110d4 ADD	X0, X1, X17

0x4110d8 ADD	X4, X4, X18

0x4110dc LDR	X3, [X0, X16]

0x4110e0 LDR	X5, [X4, X16]

0x4110e4 ADD	X3, X5, X3

0x4110e8 LDUR	X5, [X29, #464]

0x4110ec LDR	X5, [X5]

0x4110f0 LDR	X6, [X5, X25,LSL #3]

0x4110f4 ADD	X3, X3, X6

0x4110f8 STR	X3, [X5, X25,LSL #3]

0x4110fc LDUR	X3, [X29, #480]

0x411100 LDR	X5, [X9]

0x411104 LDR	X3, [X3]

0x411108 ADD	X5, X5, X17

0x41110c ADD	X3, X10, X3

0x411110 ADD	X10, X10, #1

0x411114 ADD	X3, X3, #1

0x411118 STR	X3, [X5, X16]

0x41111c LDR	X0, [X0, X16]

0x411120 LDR	X3, [X4, X16]

0x411124 ADD	X0, X3, X0

0x411128 LDR	X3, [X8]

0x41112c ADD	X3, X3, X17

0x411130 STR	X0, [X3, X16]

0x411134 LDUR	X3, [X29, #448]

0x411138 ADD	X16, X16, #8

0x41113c ORR	X0, XZR, X2

0x411140 CMP	X2, X3

0x411144 B.GE	411084

0x411148 ADD	X1, X1, X17

0x41114c ADD	X11, X11, #1

0x411150 ADD	X1, X1, X16

0x411154 LDR	X2, [X1]

0x411158 ADD	X3, X2, #1

0x41115c STR	X3, [X1]

0x411160 LDR	X3, [X21]

0x411164 LDR	X4, [X19]

0x411168 MADD	X3, X4, X3, XZR

0x41116c CMP	X12, X3

0x411170 B.LE	4111c0

0x411174 ADD	X3, X2, #2

0x411178 STR	X3, [X1]

0x41117c LDR	X3, [X28]

0x411180 LDR	X4, [X20]

0x411184 MADD	X3, X4, X3, XZR

0x411188 CMP	X14, X3

0x41118c B.LE	411240

0x411190 ADD	X3, X2, #3

0x411194 STR	X3, [X1]

0x411198 LDR	X3, [X23]

0x41119c LDR	X4, [X22]

0x4111a0 MADD	X3, X4, X3, XZR

0x4111a4 CMP	X0, X3

0x4111a8 B.LE	4113f0

0x4111ac ADD	X2, X2, #4

0x4111b0 STR	X2, [X1]

0x4111b4 B	411408

0x4111c0 CBZ	X12, 4115cc

0x4111c4 LDR	X4, [X24]

0x4111c8 ADD	X2, X4, X18

0x4111cc LDR	X5, [X2, X16]

0x4111d0 ADD	X3, X5, #1

0x4111d4 STR	X3, [X2, X16]

0x4111d8 LDR	X6, [X28]

0x4111dc LDR	X7, [X20]

0x4111e0 MADD	X6, X7, X6, XZR

0x4111e4 CMP	X14, X6

0x4111e8 B.LE	4112a8

0x4111ec ADD	X3, X5, #2

0x4111f0 STR	X3, [X2, X16]

0x4111f4 CBNZ	X0, 411208

0x4111f8 LDR	X6, [X23]

0x4111fc LDR	X7, [X22]

0x411200 MADD	X6, X7, X6, XZR

0x411204 TBZ	X6, #63, 411210

0x411208 ADD	X3, X5, #3

0x41120c STR	X3, [X2, X16]

0x411210 LDR	X5, [X23]

0x411214 LDR	X6, [X22]

0x411218 MADD	X5, X5, X6, X5

0x41121c SUB	X5, X5, #1

0x411220 CMP	X0, X5

0x411224 B.LT	4112fc

0x411228 LDUR	X6, [X29, #496]

0x41122c ADD	X5, X0, #1

0x411230 LDR	X6, [X6]

0x411234 CMP	X5, X6

0x411238 B.LT	4112fc

0x41123c B	411304

0x411240 CBZ	X14, 41144c

0x411244 LDR	X2, [X24]

0x411248 ADD	X3, X18, X16

0x41124c ADD	X2, X2, X3

0x411250 LDR	X4, [X2]

0x411254 ADD	X3, X4, #1

0x411258 STR	X3, [X2]

0x41125c CBNZ	X0, 411270

0x411260 LDR	X5, [X23]

0x411264 LDR	X6, [X22]

0x411268 MADD	X5, X6, X5, XZR

0x41126c TBZ	X5, #63, 411278

0x411270 ADD	X3, X4, #2

0x411274 STR	X3, [X2]

0x411278 LDR	X4, [X23]

0x41127c LDR	X5, [X22]

0x411280 MADD	X4, X4, X5, X4

0x411284 SUB	X4, X4, #1

0x411288 CMP	X0, X4

0x41128c B.LT	411444

0x411290 LDUR	X4, [X29, #496]

0x411294 LDR	X4, [X4]

0x411298 SUB	X4, X4, #1

0x41129c CMP	X0, X4

0x4112a0 B.LT	411444

0x4112a4 B	41144c

0x4112a8 CBZ	X14, 411304

0x4112ac ADD	X3, X5, #2

0x4112b0 STR	X3, [X2, X16]

0x4112b4 CBNZ	X0, 4112c8

0x4112b8 LDR	X6, [X23]

0x4112bc LDR	X7, [X22]

0x4112c0 MADD	X6, X7, X6, XZR

0x4112c4 TBZ	X6, #63, 4112d0

0x4112c8 ADD	X3, X5, #3

0x4112cc STR	X3, [X2, X16]

0x4112d0 LDR	X5, [X23]

0x4112d4 LDR	X6, [X22]

0x4112d8 MADD	X5, X5, X6, X5

0x4112dc SUB	X5, X5, #1

0x4112e0 CMP	X0, X5

0x4112e4 B.LT	4112fc

0x4112e8 LDUR	X5, [X29, #496]

0x4112ec LDR	X5, [X5]

0x4112f0 SUB	X5, X5, #1

0x4112f4 CMP	X0, X5

0x4112f8 B.GE	411304

0x4112fc ADD	X3, X3, #1

0x411300 STR	X3, [X2, X16]

0x411304 CBNZ	X0, 411318

0x411308 LDR	X5, [X23]

0x41130c LDR	X6, [X22]

0x411310 MADD	X5, X6, X5, XZR

0x411314 TBZ	X5, #63, 411320

0x411318 ADD	X3, X3, #1

0x41131c STR	X3, [X2, X16]

0x411320 LDR	X5, [X23]

0x411324 LDR	X7, [X22]

0x411328 ADD	X6, X0, #1

0x41132c MADD	X5, X5, X7, X5

0x411330 LDUR	X7, [X29, #496]

0x411334 CMP	X6, X5

0x411338 LDR	X7, [X7]

0x41133c CCMP	X6, X7, #8, #10

0x411340 B.GE	41134c

0x411344 ADD	X3, X3, #1

0x411348 STR	X3, [X2, X16]

0x41134c LDR	X5, [X28]

0x411350 LDR	X7, [X20]

0x411354 ADD	X4, X4, X11,LSL #3

0x411358 MADD	X5, X5, X7, X5

0x41135c CMP	X15, X5

0x411360 B.GE	4113b8

0x411364 ADD	X5, X3, #1

0x411368 STR	X5, [X2, X16]

0x41136c CBNZ	X0, 411384

0x411370 LDR	X7, [X23]

0x411374 LDR	X28, [X22]

0x411378 MADD	X7, X28, X7, XZR

0x41137c LDUR	X28, [X29, #384]

0x411380 TBZ	X7, #63, 41138c

0x411384 ADD	X5, X3, #2

0x411388 STR	X5, [X2, X16]

0x41138c LDR	X2, [X23]

0x411390 LDR	X3, [X22]

0x411394 MADD	X2, X2, X3, X2

0x411398 SUB	X2, X2, #1

0x41139c CMP	X0, X2

0x4113a0 B.LT	4115c4

0x4113a4 LDUR	X2, [X29, #496]

0x4113a8 LDR	X2, [X2]

0x4113ac CMP	X6, X2

0x4113b0 B.GE	4115cc

0x4113b4 B	4115c4

0x4113b8 LDUR	X5, [X29, #472]

0x4113bc LDR	X5, [X5]

0x4113c0 CMP	X15, X5

0x4113c4 B.GE	4115cc

0x4113c8 ADD	X5, X3, #1

0x4113cc STR	X5, [X2, X16]

0x4113d0 CBNZ	X0, 4113e4

0x4113d4 LDR	X6, [X23]

0x4113d8 LDR	X7, [X22]

0x4113dc MADD	X6, X7, X6, XZR

0x4113e0 TBZ	X6, #63, 411544

0x4113e4 ADD	X5, X3, #2

0x4113e8 STR	X5, [X2, X16]

0x4113ec B	411544

0x4113f0 CBZ	X0, 411408

0x4113f4 LDR	X2, [X24]

0x4113f8 ADD	X2, X2, X18

0x4113fc LDR	X3, [X2, X16]

0x411400 ADD	X3, X3, #1

0x411404 STR	X3, [X2, X16]

0x411408 LDR	X2, [X23]

0x41140c LDR	X3, [X22]

0x411410 MADD	X2, X2, X3, X2

0x411414 SUB	X3, X2, #1

0x411418 ORR	X2, XZR, X1

0x41141c CMP	X0, X3

0x411420 B.LT	411440

0x411424 LDUR	X3, [X29, #496]

0x411428 ADD	X2, X0, #1

0x41142c LDR	X3, [X3]

0x411430 CMP	X2, X3

0x411434 B.GE	41144c

0x411438 LDR	X2, [X24]

0x41143c ADD	X2, X2, X11,LSL #3

0x411440 LDR	X3, [X2]

0x411444 ADD	X3, X3, #1

0x411448 STR	X3, [X2]

0x41144c LDR	X2, [X23]

0x411450 LDR	X3, [X22]

0x411454 MADD	X3, X3, X2, XZR

0x411458 ORR	X2, XZR, X1

0x41145c CMP	X0, X3

0x411460 B.GT	411470

0x411464 CBZ	X0, 41147c

0x411468 LDR	X2, [X24]

0x41146c ADD	X2, X2, X11,LSL #3

0x411470 LDR	X3, [X2]

0x411474 ADD	X3, X3, #1

0x411478 STR	X3, [X2]

0x41147c LDR	X3, [X23]

0x411480 LDR	X4, [X22]

0x411484 ADD	X2, X0, #1

0x411488 MADD	X4, X3, X4, X3

0x41148c ORR	X3, XZR, X1

0x411490 CMP	X2, X4

0x411494 B.LT	4114b0

0x411498 LDUR	X3, [X29, #496]

0x41149c LDR	X3, [X3]

0x4114a0 CMP	X2, X3

0x4114a4 B.GE	4114bc

0x4114a8 LDR	X3, [X24]

0x4114ac ADD	X3, X3, X11,LSL #3

0x4114b0 LDR	X4, [X3]

0x4114b4 ADD	X4, X4, #1

0x4114b8 STR	X4, [X3]

0x4114bc LDR	X3, [X28]

0x4114c0 LDR	X4, [X20]

0x4114c4 MADD	X3, X3, X4, X3

0x4114c8 CMP	X15, X3

0x4114cc B.GE	411500

0x4114d0 LDR	X3, [X1]

0x4114d4 ADD	X4, X3, #1

0x4114d8 STR	X4, [X1]

0x4114dc LDR	X4, [X23]

0x4114e0 LDR	X5, [X22]

0x4114e4 MADD	X4, X5, X4, XZR

0x4114e8 CMP	X0, X4

0x4114ec B.LE	411574

0x4114f0 ADD	X3, X3, #2

0x4114f4 STR	X3, [X1]

0x4114f8 B	41158c

0x411500 LDUR	X2, [X29, #472]

0x411504 LDR	X2, [X2]

0x411508 CMP	X15, X2

0x41150c B.GE	4115cc

0x411510 LDR	X2, [X24]

0x411514 ADD	X3, X18, X16

0x411518 ADD	X4, X2, X3

0x41151c LDR	X2, [X4]

0x411520 ADD	X5, X2, #1

0x411524 STR	X5, [X4]

0x411528 CBNZ	X0, 41153c

0x41152c LDR	X3, [X23]

0x411530 LDR	X6, [X22]

0x411534 MADD	X3, X6, X3, XZR

0x411538 TBZ	X3, #63, 411544

0x41153c ADD	X5, X2, #2

0x411540 STR	X5, [X4]

0x411544 LDR	X2, [X23]

0x411548 LDR	X3, [X22]

0x41154c MADD	X2, X2, X3, X2

0x411550 SUB	X2, X2, #1

0x411554 CMP	X0, X2

0x411558 B.LT	4115c4

0x41155c LDUR	X2, [X29, #496]

0x411560 LDR	X2, [X2]

0x411564 SUB	X2, X2, #1

0x411568 CMP	X0, X2

0x41156c B.LT	4115c4

0x411570 B	4115cc

0x411574 CBZ	X0, 41158c

0x411578 LDR	X3, [X24]

0x41157c ADD	X3, X3, X18

0x411580 LDR	X4, [X3, X16]

0x411584 ADD	X4, X4, #1

0x411588 STR	X4, [X3, X16]

0x41158c LDR	X3, [X23]

0x411590 LDR	X4, [X22]

0x411594 MADD	X3, X3, X4, X3

0x411598 ORR	X4, XZR, X1

0x41159c SUB	X3, X3, #1

0x4115a0 CMP	X0, X3

0x4115a4 B.LT	4115c0

0x4115a8 LDUR	X3, [X29, #496]

0x4115ac LDR	X3, [X3]

0x4115b0 CMP	X2, X3

0x4115b4 B.GE	4115cc

0x4115b8 LDR	X2, [X24]

0x4115bc ADD	X4, X2, X11,LSL #3

0x4115c0 LDR	X5, [X4]

0x4115c4 ADD	X2, X5, #1

0x4115c8 STR	X2, [X4]

0x4115cc LDR	X2, [X28]

0x4115d0 LDR	X3, [X20]

0x4115d4 MADD	X2, X3, X2, XZR

0x4115d8 CMP	X14, X2

0x4115dc B.LE	41160c

0x4115e0 LDR	X2, [X1]

0x4115e4 ADD	X3, X2, #1

0x4115e8 STR	X3, [X1]

0x4115ec LDR	X3, [X23]

0x4115f0 LDR	X4, [X22]

0x4115f4 MADD	X3, X4, X3, XZR

0x4115f8 CMP	X0, X3

0x4115fc B.LE	411680

0x411600 ADD	X2, X2, #2

0x411604 STR	X2, [X1]

0x411608 B	411698

0x41160c CBZ	X14, 4116dc

0x411610 LDR	X2, [X24]

0x411614 ADD	X3, X18, X16

0x411618 ADD	X2, X2, X3

0x41161c LDR	X4, [X2]

0x411620 ADD	X3, X4, #1

0x411624 STR	X3, [X2]

0x411628 CBNZ	X0, 41163c

0x41162c LDR	X5, [X23]

0x411630 LDR	X6, [X22]

0x411634 MADD	X5, X6, X5, XZR

0x411638 TBZ	X5, #63, 411644

0x41163c ADD	X3, X4, #2

0x411640 STR	X3, [X2]

0x411644 LDR	X4, [X23]

0x411648 LDR	X5, [X22]

0x41164c MADD	X4, X4, X5, X4

0x411650 SUB	X4, X4, #1

0x411654 CMP	X0, X4

0x411658 B.LT	4116d4

0x41165c LDUR	X4, [X29, #496]

0x411660 LDR	X4, [X4]

0x411664 SUB	X4, X4, #1

0x411668 CMP	X0, X4

0x41166c B.LT	4116d4

0x411670 B	4116dc

0x411680 CBZ	X0, 411698

0x411684 LDR	X2, [X24]

0x411688 ADD	X2, X2, X18

0x41168c LDR	X3, [X2, X16]

0x411690 ADD	X3, X3, #1

0x411694 STR	X3, [X2, X16]

0x411698 LDR	X2, [X23]

0x41169c LDR	X3, [X22]

0x4116a0 MADD	X2, X2, X3, X2

0x4116a4 SUB	X3, X2, #1

0x4116a8 ORR	X2, XZR, X1

0x4116ac CMP	X0, X3

0x4116b0 B.LT	4116d0

0x4116b4 LDUR	X3, [X29, #496]

0x4116b8 ADD	X2, X0, #1

0x4116bc LDR	X3, [X3]

0x4116c0 CMP	X2, X3

0x4116c4 B.GE	4116dc

0x4116c8 LDR	X2, [X24]

0x4116cc ADD	X2, X2, X11,LSL #3

0x4116d0 LDR	X3, [X2]

0x4116d4 ADD	X3, X3, #1

0x4116d8 STR	X3, [X2]

0x4116dc LDR	X2, [X23]

0x4116e0 LDR	X3, [X22]

0x4116e4 MADD	X3, X3, X2, XZR

0x4116e8 ORR	X2, XZR, X1

0x4116ec CMP	X0, X3

0x4116f0 B.GT	411700

0x4116f4 CBZ	X0, 41170c

0x4116f8 LDR	X2, [X24]

0x4116fc ADD	X2, X2, X11,LSL #3

0x411700 LDR	X3, [X2]

0x411704 ADD	X3, X3, #1

0x411708 STR	X3, [X2]

0x41170c LDR	X3, [X23]

0x411710 LDR	X4, [X22]

0x411714 ADD	X2, X0, #1

0x411718 MADD	X4, X3, X4, X3

0x41171c ORR	X3, XZR, X1

0x411720 CMP	X2, X4

0x411724 B.LT	411740

0x411728 LDUR	X3, [X29, #496]

0x41172c LDR	X3, [X3]

0x411730 CMP	X2, X3

0x411734 B.GE	41174c

0x411738 LDR	X3, [X24]

0x41173c ADD	X3, X3, X11,LSL #3

0x411740 LDR	X4, [X3]

0x411744 ADD	X4, X4, #1

0x411748 STR	X4, [X3]

0x41174c LDR	X3, [X28]

0x411750 LDR	X4, [X20]

0x411754 MADD	X3, X3, X4, X3

0x411758 CMP	X15, X3

0x41175c B.GE	41178c

0x411760 LDR	X3, [X1]

0x411764 ADD	X4, X3, #1

0x411768 STR	X4, [X1]

0x41176c LDR	X4, [X23]

0x411770 LDR	X5, [X22]

0x411774 MADD	X4, X5, X4, XZR

0x411778 CMP	X0, X4

0x41177c B.LE	411800

0x411780 ADD	X3, X3, #2

0x411784 STR	X3, [X1]

0x411788 B	411818

0x41178c LDUR	X3, [X29, #472]

0x411790 LDR	X3, [X3]

0x411794 CMP	X15, X3

0x411798 B.GE	411858

0x41179c LDR	X3, [X24]

0x4117a0 ADD	X4, X18, X16

0x4117a4 ADD	X3, X3, X4

0x4117a8 LDR	X5, [X3]

0x4117ac ADD	X4, X5, #1

0x4117b0 STR	X4, [X3]

0x4117b4 CBNZ	X0, 4117c8

0x4117b8 LDR	X6, [X23]

0x4117bc LDR	X7, [X22]

0x4117c0 MADD	X6, X7, X6, XZR

0x4117c4 TBZ	X6, #63, 4117d0

0x4117c8 ADD	X4, X5, #2

0x4117cc STR	X4, [X3]

0x4117d0 LDR	X5, [X23]

0x4117d4 LDR	X6, [X22]

0x4117d8 MADD	X5, X5, X6, X5

0x4117dc SUB	X5, X5, #1

0x4117e0 CMP	X0, X5

0x4117e4 B.LT	411850

0x4117e8 LDUR	X5, [X29, #496]

0x4117ec LDR	X5, [X5]

0x4117f0 SUB	X5, X5, #1

0x4117f4 CMP	X0, X5

0x4117f8 B.LT	411850

0x4117fc B	411858

0x411800 CBZ	X0, 411818

0x411804 LDR	X3, [X24]

0x411808 ADD	X3, X3, X18

0x41180c LDR	X4, [X3, X16]

0x411810 ADD	X4, X4, #1

0x411814 STR	X4, [X3, X16]

0x411818 LDR	X3, [X23]

0x41181c LDR	X4, [X22]

0x411820 MADD	X3, X3, X4, X3

0x411824 SUB	X4, X3, #1

0x411828 ORR	X3, XZR, X1

0x41182c CMP	X0, X4

0x411830 B.LT	41184c

0x411834 LDUR	X3, [X29, #496]

0x411838 LDR	X3, [X3]

0x41183c CMP	X2, X3

0x411840 B.GE	411858

0x411844 LDR	X3, [X24]

0x411848 ADD	X3, X3, X11,LSL #3

0x41184c LDR	X4, [X3]

0x411850 ADD	X4, X4, #1

0x411854 STR	X4, [X3]

0x411858 LDR	X3, [X21]

0x41185c LDR	X4, [X19]

0x411860 MADD	X3, X3, X4, X3

0x411864 CMP	X13, X3

0x411868 B.GE	4118c0

0x41186c LDR	X3, [X1]

0x411870 ADD	X4, X3, #1

0x411874 STR	X4, [X1]

0x411878 LDR	X4, [X28]

0x41187c LDR	X5, [X20]

0x411880 MADD	X4, X5, X4, XZR

0x411884 CMP	X14, X4

0x411888 B.LE	411948

0x41188c ADD	X4, X3, #2

0x411890 STR	X4, [X1]

0x411894 LDR	X4, [X23]

0x411898 LDR	X5, [X22]

0x41189c MADD	X4, X5, X4, XZR

0x4118a0 CMP	X0, X4

0x4118a4 B.LE	4119b0

0x4118a8 ADD	X3, X3, #3

0x4118ac STR	X3, [X1]

0x4118b0 B	4119c8

0x4118c0 LDR	X1, [SP, #80]

0x4118c4 LDR	X1, [X1]

0x4118c8 CMP	X13, X1

0x4118cc B.GE	4110cc

0x4118d0 LDR	X1, [X24]

0x4118d4 ADD	X3, X1, X18

0x4118d8 LDR	X5, [X3, X16]

0x4118dc ADD	X4, X5, #1

0x4118e0 STR	X4, [X3, X16]

0x4118e4 LDR	X6, [X28]

0x4118e8 LDR	X7, [X20]

0x4118ec MADD	X6, X7, X6, XZR

0x4118f0 CMP	X14, X6

0x4118f4 B.LE	411b08

0x4118f8 ADD	X4, X5, #2

0x4118fc STR	X4, [X3, X16]

0x411900 CBNZ	X0, 411914

0x411904 LDR	X6, [X23]

0x411908 LDR	X7, [X22]

0x41190c MADD	X6, X7, X6, XZR

0x411910 TBZ	X6, #63, 41191c

0x411914 ADD	X4, X5, #3

0x411918 STR	X4, [X3, X16]

0x41191c LDR	X5, [X23]

0x411920 LDR	X6, [X22]

0x411924 MADD	X5, X5, X6, X5

0x411928 SUB	X5, X5, #1

0x41192c CMP	X0, X5

0x411930 B.LT	411b5c

0x411934 LDUR	X5, [X29, #496]

0x411938 LDR	X5, [X5]

0x41193c CMP	X2, X5

0x411940 B.GE	411b64

0x411944 B	411b5c

0x411948 CBZ	X14, 411a08

0x41194c LDR	X3, [X24]

0x411950 ADD	X4, X18, X16

0x411954 ADD	X3, X3, X4

0x411958 LDR	X5, [X3]

0x41195c ADD	X4, X5, #1

0x411960 STR	X4, [X3]

0x411964 CBNZ	X0, 411978

0x411968 LDR	X6, [X23]

0x41196c LDR	X7, [X22]

0x411970 MADD	X6, X7, X6, XZR

0x411974 TBZ	X6, #63, 411980

0x411978 ADD	X4, X5, #2

0x41197c STR	X4, [X3]

0x411980 LDR	X5, [X23]

0x411984 LDR	X6, [X22]

0x411988 MADD	X5, X5, X6, X5

0x41198c SUB	X5, X5, #1

0x411990 CMP	X0, X5

0x411994 B.LT	411a00

0x411998 LDUR	X5, [X29, #496]

0x41199c LDR	X5, [X5]

0x4119a0 SUB	X5, X5, #1

0x4119a4 CMP	X0, X5

0x4119a8 B.LT	411a00

0x4119ac B	411a08

0x4119b0 CBZ	X0, 4119c8

0x4119b4 LDR	X3, [X24]

0x4119b8 ADD	X3, X3, X18

0x4119bc LDR	X4, [X3, X16]

0x4119c0 ADD	X4, X4, #1

0x4119c4 STR	X4, [X3, X16]

0x4119c8 LDR	X3, [X23]

0x4119cc LDR	X4, [X22]

0x4119d0 MADD	X3, X3, X4, X3

0x4119d4 SUB	X4, X3, #1

0x4119d8 ORR	X3, XZR, X1

0x4119dc CMP	X0, X4

0x4119e0 B.LT	4119fc

0x4119e4 LDUR	X3, [X29, #496]

0x4119e8 LDR	X3, [X3]

0x4119ec CMP	X2, X3

0x4119f0 B.GE	411a08

0x4119f4 LDR	X3, [X24]

0x4119f8 ADD	X3, X3, X11,LSL #3

0x4119fc LDR	X4, [X3]

0x411a00 ADD	X4, X4, #1

0x411a04 STR	X4, [X3]

0x411a08 LDR	X3, [X23]

0x411a0c LDR	X4, [X22]

0x411a10 MADD	X4, X4, X3, XZR

0x411a14 ORR	X3, XZR, X1

0x411a18 CMP	X0, X4

0x411a1c B.GT	411a2c

0x411a20 CBZ	X0, 411a38

0x411a24 LDR	X3, [X24]

0x411a28 ADD	X3, X3, X11,LSL #3

0x411a2c LDR	X4, [X3]

0x411a30 ADD	X4, X4, #1

0x411a34 STR	X4, [X3]

0x411a38 LDR	X3, [X23]

0x411a3c LDR	X4, [X22]

0x411a40 MADD	X4, X3, X4, X3

0x411a44 ORR	X3, XZR, X1

0x411a48 CMP	X2, X4

0x411a4c B.LT	411a68

0x411a50 LDUR	X3, [X29, #496]

0x411a54 LDR	X3, [X3]

0x411a58 CMP	X2, X3

0x411a5c B.GE	411a74

0x411a60 LDR	X3, [X24]

0x411a64 ADD	X3, X3, X11,LSL #3

0x411a68 LDR	X4, [X3]

0x411a6c ADD	X4, X4, #1

0x411a70 STR	X4, [X3]

0x411a74 LDR	X3, [X28]

0x411a78 LDR	X4, [X20]

0x411a7c MADD	X3, X3, X4, X3

0x411a80 CMP	X15, X3

0x411a84 B.GE	411ac0

0x411a88 LDR	X3, [X1]

0x411a8c ADD	X4, X3, #1

0x411a90 STR	X4, [X1]

0x411a94 LDR	X4, [X23]

0x411a98 LDR	X5, [X22]

0x411a9c MADD	X4, X5, X4, XZR

0x411aa0 CMP	X0, X4

0x411aa4 B.LE	411c14

0x411aa8 ADD	X3, X3, #2

0x411aac STR	X3, [X1]

0x411ab0 B	411c2c

0x411b08 CBZ	X14, 411b64

0x411b0c ADD	X4, X5, #2

0x411b10 STR	X4, [X3, X16]

0x411b14 CBNZ	X0, 411b28

0x411b18 LDR	X6, [X23]

0x411b1c LDR	X7, [X22]

0x411b20 MADD	X6, X7, X6, XZR

0x411b24 TBZ	X6, #63, 411b30

0x411b28 ADD	X4, X5, #3

0x411b2c STR	X4, [X3, X16]

0x411b30 LDR	X5, [X23]

0x411b34 LDR	X6, [X22]

0x411b38 MADD	X5, X5, X6, X5

0x411b3c SUB	X5, X5, #1

0x411b40 CMP	X0, X5

0x411b44 B.LT	411b5c

0x411b48 LDUR	X5, [X29, #496]

0x411b4c LDR	X5, [X5]

0x411b50 SUB	X5, X5, #1

0x411b54 CMP	X0, X5

0x411b58 B.GE	411b64

0x411b5c ADD	X4, X4, #1

0x411b60 STR	X4, [X3, X16]

0x411b64 CBNZ	X0, 411b78

0x411b68 LDR	X5, [X23]

0x411b6c LDR	X6, [X22]

0x411b70 MADD	X5, X6, X5, XZR

0x411b74 TBZ	X5, #63, 411b80

0x411b78 ADD	X4, X4, #1

0x411b7c STR	X4, [X3, X16]

0x411b80 LDR	X5, [X23]

0x411b84 LDR	X6, [X22]

0x411b88 MADD	X5, X5, X6, X5

0x411b8c CMP	X2, X5

0x411b90 B.LT	411ba4

0x411b94 LDUR	X5, [X29, #496]

0x411b98 LDR	X5, [X5]

0x411b9c CMP	X2, X5

0x411ba0 B.GE	411bac

0x411ba4 ADD	X4, X4, #1

0x411ba8 STR	X4, [X3, X16]

0x411bac LDR	X5, [X28]

0x411bb0 LDR	X6, [X20]

0x411bb4 ADD	X1, X1, X11,LSL #3

0x411bb8 MADD	X5, X5, X6, X5

0x411bbc CMP	X15, X5

0x411bc0 B.GE	411c60

0x411bc4 ADD	X5, X4, #1

0x411bc8 STR	X5, [X3, X16]

0x411bcc CBNZ	X0, 411be0

0x411bd0 LDR	X6, [X23]

0x411bd4 LDR	X7, [X22]

0x411bd8 MADD	X6, X7, X6, XZR

0x411bdc TBZ	X6, #63, 411be8

0x411be0 ADD	X5, X4, #2

0x411be4 STR	X5, [X3, X16]

0x411be8 LDR	X3, [X23]

0x411bec LDR	X4, [X22]

0x411bf0 MADD	X3, X3, X4, X3

0x411bf4 SUB	X3, X3, #1

0x411bf8 CMP	X0, X3

0x411bfc B.LT	4110c4

0x411c00 LDUR	X0, [X29, #496]

0x411c04 LDR	X0, [X0]

0x411c08 CMP	X2, X0

0x411c0c B.GE	4110cc

0x411c10 B	4110c4

0x411c14 CBZ	X0, 411c2c

0x411c18 LDR	X3, [X24]

0x411c1c ADD	X3, X3, X18

0x411c20 LDR	X4, [X3, X16]

0x411c24 ADD	X4, X4, #1

0x411c28 STR	X4, [X3, X16]

0x411c2c LDR	X3, [X23]

0x411c30 LDR	X4, [X22]

0x411c34 MADD	X3, X3, X4, X3

0x411c38 SUB	X3, X3, #1

0x411c3c CMP	X0, X3

0x411c40 B.LT	4110c0

0x411c44 LDUR	X0, [X29, #496]

0x411c48 LDR	X0, [X0]

0x411c4c CMP	X2, X0

0x411c50 B.GE	4110cc

0x411c54 LDR	X0, [X24]

0x411c58 ADD	X1, X0, X11,LSL #3

0x411c5c B	4110c0

0x411c60 LDUR	X5, [X29, #472]

0x411c64 LDR	X5, [X5]

0x411c68 CMP	X15, X5

0x411c6c B.GE	4110cc

0x411c70 ADD	X5, X4, #1

0x411c74 STR	X5, [X3, X16]

0x411c78 CBNZ	X0, 411c8c

0x411c7c LDR	X6, [X23]

0x411c80 LDR	X7, [X22]

0x411c84 MADD	X6, X7, X6, XZR

0x411c88 TBZ	X6, #63, 411c94

0x411c8c ADD	X5, X4, #2

0x411c90 STR	X5, [X3, X16]

0x411c94 LDR	X3, [X23]

0x411c98 LDR	X4, [X22]

0x411c9c MADD	X3, X3, X4, X3

0x411ca0 SUB	X3, X3, #1

0x411ca4 CMP	X0, X3

0x411ca8 B.LT	4110c4

0x411cac LDUR	X3, [X29, #496]

0x411cb0 LDR	X3, [X3]

0x411cb4 SUB	X3, X3, #1

0x411cb8 CMP	X0, X3

0x411cbc B.LT	4110c4

0x411cc0 B	4110cc

/home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/build/AMG/AMG/test/amg.c: 794 - 1367

--------------------------------------------------------------------------------

794:     for (iz = iz_start;  iz < iz_end; iz++)

795:     {

796:       for (iy = iy_start;  iy < iy_end; iy++)

797:       {

798:          for (ix = ix_start; ix < ix_end; ix++)

799:          {

800:             cnt++;

801:             o_cnt++;

802:             diag_i[cnt]++;

803:             if (iz > nz*pz)

804:             {

805:                diag_i[cnt]++;

806:                if (iy > ny*py)

807:                {

808:                   diag_i[cnt]++;

809:       	          if (ix > nx*px)

810:       	          {

811:       	             diag_i[cnt]++;

812:       	          }

813:       	          else

814:       	          {

815:       	             if (ix)

816:       		        offd_i[o_cnt]++;

817:       	          }

818:       	          if (ix < nx*(px+1)-1)

[...]

824:       	             if (ix+1 < nx_global)

825:       		        offd_i[o_cnt]++;

826:       	          }

827:                }

828:                else

829:                {

830:                   if (iy)

831:                   {

832:                      offd_i[o_cnt]++;

833:       	             if (ix > nx*px)

[...]

841:       	             if (ix < nx*(px+1)-1)

842:       	             {

843:       	                offd_i[o_cnt]++;

844:       	             }

845:       	             else if (ix < nx_global-1)

[...]

851:                if (ix > nx*px)

852:                   diag_i[cnt]++;

853:                else

854:                {

855:                   if (ix)

856:                   {

857:                      offd_i[o_cnt]++;

858:                   }

859:                }

860:                if (ix+1 < nx*(px+1))

861:                   diag_i[cnt]++;

862:                else

863:                {

864:                   if (ix+1 < nx_global)

865:                   {

866:                      offd_i[o_cnt]++;

867:                   }

868:                }

869:                if (iy+1 < ny*(py+1))

870:                {

871:                   diag_i[cnt]++;

872:       	          if (ix > nx*px)

873:       	          {

874:       	             diag_i[cnt]++;

875:       	          }

876:       	          else

877:       	          {

878:       	             if (ix)

879:       		        offd_i[o_cnt]++;

880:       	          }

881:       	          if (ix < nx*(px+1)-1)

[...]

887:       	             if (ix+1 < nx_global)

888:       		        offd_i[o_cnt]++;

889:       	          }

890:                }

891:                else

892:                {

893:                   if (iy+1 < ny_global)

894:                   {

895:                      offd_i[o_cnt]++;

896:       	             if (ix > nx*px)

[...]

917:                if (iz)

918: 	       {

919: 		  offd_i[o_cnt]++;

920:                   if (iy > ny*py)

921:                   {

922:                      offd_i[o_cnt]++;

923:       	             if (ix > nx*px)

[...]

932:       	             if (ix < nx*(px+1)-1)

[...]

938:       	                if (ix+1 < nx_global)

[...]

944:                      if (iy)

945:                      {

946:                         offd_i[o_cnt]++;

947:       	                if (ix > nx*px)

[...]

955:       	                if (ix < nx*(px+1)-1)

956:       	                {

957:       	                   offd_i[o_cnt]++;

958:       	                }

959:       	                else if (ix < nx_global-1)

[...]

965:                   if (ix > nx*px)

[...]

974:                   if (ix+1 < nx*(px+1))

[...]

983:                   if (iy+1 < ny*(py+1))

984:                   {

985:                      offd_i[o_cnt]++;

986:       	             if (ix > nx*px)

[...]

995:       	             if (ix < nx*(px+1)-1)

[...]

1007:                      if (iy+1 < ny_global)

1008:                      {

1009:                         offd_i[o_cnt]++;

1010:       	                if (ix > nx*px)

[...]

1030:             if (iy > ny*py)

1031:             {

1032:                diag_i[cnt]++;

1033:    	       if (ix > nx*px)

1034:    	       {

1035:    	          diag_i[cnt]++;

1036:    	       }

1037:    	       else

1038:    	       {

1039:    	          if (ix)

1040:    		     offd_i[o_cnt]++;

1041:    	       }

1042:    	       if (ix < nx*(px+1)-1)

[...]

1048:    	          if (ix+1 < nx_global)

1049:    		     offd_i[o_cnt]++;

1050:    	       }

1051:             }

1052:             else

1053:             {

1054:                if (iy)

1055:                {

1056:                   offd_i[o_cnt]++;

1057:    	          if (ix > nx*px)

[...]

1065:    	          if (ix < nx*(px+1)-1)

1066:    	          {

1067:    	             offd_i[o_cnt]++;

1068:    	          }

1069:    	          else if (ix < nx_global-1)

[...]

1075:             if (ix > nx*px)

1076:                diag_i[cnt]++;

1077:             else

1078:             {

1079:                if (ix)

1080:                {

1081:                   offd_i[o_cnt]++;

1082:                }

1083:             }

1084:             if (ix+1 < nx*(px+1))

1085:                diag_i[cnt]++;

1086:             else

1087:             {

1088:                if (ix+1 < nx_global)

1089:                {

1090:                   offd_i[o_cnt]++;

1091:                }

1092:             }

1093:             if (iy+1 < ny*(py+1))

1094:             {

1095:                diag_i[cnt]++;

1096:    	       if (ix > nx*px)

1097:    	       {

1098:    	          diag_i[cnt]++;

1099:    	       }

1100:    	       else

1101:    	       {

1102:    	          if (ix)

1103:    		     offd_i[o_cnt]++;

1104:    	       }

1105:    	       if (ix < nx*(px+1)-1)

[...]

1111:    	          if (ix+1 < nx_global)

1112:    		     offd_i[o_cnt]++;

1113:    	       }

1114:             }

1115:             else

1116:             {

1117:                if (iy+1 < ny_global)

1118:                {

1119:                   offd_i[o_cnt]++;

1120:    	          if (ix > nx*px)

[...]

1128:    	          if (ix < nx*(px+1)-1)

1129:    	          {

1130:    	             offd_i[o_cnt]++;

1131:    	          }

1132:    	          else if (ix < nx_global-1)

[...]

1138:             if (iz+1 < nz*(pz+1))

1139:             {

1140:                diag_i[cnt]++;

1141:                if (iy > ny*py)

1142:                {

1143:                   diag_i[cnt]++;

1144:       	          if (ix > nx*px)

1145:       	          {

1146:       	             diag_i[cnt]++;

1147:       	          }

1148:       	          else

1149:       	          {

1150:       	             if (ix)

1151:       		        offd_i[o_cnt]++;

1152:       	          }

1153:       	          if (ix < nx*(px+1)-1)

[...]

1159:       	             if (ix+1 < nx_global)

1160:       		        offd_i[o_cnt]++;

1161:       	          }

1162:                }

1163:                else

1164:                {

1165:                   if (iy)

1166:                   {

1167:                      offd_i[o_cnt]++;

1168:       	             if (ix > nx*px)

[...]

1176:       	             if (ix < nx*(px+1)-1)

1177:       	             {

1178:       	                offd_i[o_cnt]++;

1179:       	             }

1180:       	             else if (ix < nx_global-1)

[...]

1186:                if (ix > nx*px)

1187:                   diag_i[cnt]++;

1188:                else

1189:                {

1190:                   if (ix)

1191:                   {

1192:                      offd_i[o_cnt]++;

1193:                   }

1194:                }

1195:                if (ix+1 < nx*(px+1))

1196:                   diag_i[cnt]++;

1197:                else

1198:                {

1199:                   if (ix+1 < nx_global)

1200:                   {

1201:                      offd_i[o_cnt]++;

1202:                   }

1203:                }

1204:                if (iy+1 < ny*(py+1))

1205:                {

1206:                   diag_i[cnt]++;

1207:       	          if (ix > nx*px)

1208:       	          {

1209:       	             diag_i[cnt]++;

1210:       	          }

1211:       	          else

1212:       	          {

1213:       	             if (ix)

1214:       		        offd_i[o_cnt]++;

1215:       	          }

1216:       	          if (ix < nx*(px+1)-1)

[...]

1222:       	             if (ix+1 < nx_global)

1223:       		        offd_i[o_cnt]++;

[...]

1252:                if (iz+1 < nz_global)

1253: 	       {

1254: 		  offd_i[o_cnt]++;

1255:                   if (iy > ny*py)

1256:                   {

1257:                      offd_i[o_cnt]++;

1258:       	             if (ix > nx*px)

[...]

1267:       	             if (ix < nx*(px+1)-1)

[...]

1279:                      if (iy)

1280:                      {

1281:                         offd_i[o_cnt]++;

1282:       	                if (ix > nx*px)

[...]

1290:       	                if (ix < nx*(px+1)-1)

1291:       	                {

1292:       	                   offd_i[o_cnt]++;

1293:       	                }

1294:       	                else if (ix < nx_global-1)

[...]

1300:                   if (ix > nx*px)

[...]

1309:                   if (ix+1 < nx*(px+1))

[...]

1318:                   if (iy+1 < ny*(py+1))

1319:                   {

1320:                      offd_i[o_cnt]++;

1321:       	             if (ix > nx*px)

[...]

1330:       	             if (ix < nx*(px+1)-1)

[...]

1342:                      if (iy+1 < ny_global)

1343:                      {

1344:                         offd_i[o_cnt]++;

1345:       	                if (ix > nx*px)

[...]

1365:             nnz[my_thread] += diag_i[cnt]+offd_i[o_cnt];

1366:             row_nums[cnt] = row_index+cnt;

1367:             num_cols[cnt] = diag_i[cnt]+offd_i[o_cnt];

Coverage (%)	Name	Source Location	Module
○100.00	__kmp_invoke_microtask		libomp.so

Coverage (%)	Name	Source Location	Module
○100.00	__kmp_invoke_microtask		libomp.so

Coverage (%)	Name	Source Location	Module
○100.00	__kmp_invoke_microtask		libomp.so

Coverage (%)	Name	Source Location	Module
○100.00	__kmp_invoke_microtask		libomp.so

Coverage (%)	Name	Source Location	Module
○100.00	__kmp_invoke_microtask		libomp.so

Coverage (%)	Name	Source Location	Module
○100.00	__kmp_invoke_microtask		libomp.so

Coverage (%)	Name	Source Location	Module
○100.00	__kmp_invoke_microtask		libomp.so

Coverage (%)	Name	Source Location	Module
○100.00	__kmp_invoke_microtask		libomp.so

Coverage (%)	Name	Source Location	Module
○100.00	__kmp_invoke_microtask		libomp.so

Coverage (%)	Name	Source Location	Module
○100.00	__kmp_invoke_microtask		libomp.so

Coverage (%)	Name	Source Location	Module
○100.00	__kmp_invoke_microtask		libomp.so

Coverage (%)	Name	Source Location	Module
○100.00	__kmp_invoke_microtask		libomp.so

Coverage (%)	Name	Source Location	Module
○100.00	__kmp_invoke_microtask		libomp.so

Coverage (%)	Name	Source Location	Module
○100.00	__kmp_invoke_microtask		libomp.so

Coverage (%)	Name	Source Location	Module
○100.00	__kmp_invoke_microtask		libomp.so

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	2.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.13
Bottlenecks	P12, P13, P14,
Function	BuildIJLaplacian27pt.omp_outlined
Source	amg.c:798-812,amg.c:815-818,amg.c:824-825,amg.c:830-833,amg.c:841-841,amg.c:845-845,amg.c:851-851,amg.c:855-857,amg.c:860-860,amg.c:864-866,amg.c:869-875,amg.c:878-881,amg.c:887-888,amg.c:893-896,amg.c:917-923,amg.c:932-932,amg.c:938-938,amg.c:944-947,amg.c:955-955,amg.c:959-959,amg.c:965-965,amg.c:974-974,amg.c:983-986,amg.c:995-995,amg.c:1007-1010,amg.c:1030-1036,amg.c:1039-1042,amg.c:1048-1049,amg.c:1054-1057,amg.c:1065-1065,amg.c:1069-1069,amg.c:1075-1075,amg.c:1079-1081,amg.c:1084-1084,amg.c:1088-1090,amg.c:1093-1099,amg.c:1102-1105,amg.c:1111-1112,amg.c:1117-1120,amg.c:1128-1128,amg.c:1132-1132,amg.c:1138-1147,amg.c:1150-1153,amg.c:1159-1160,amg.c:1165-1168,amg.c:1176-1176,amg.c:1180-1180,amg.c:1186-1186,amg.c:1190-1192,amg.c:1195-1195,amg.c:1199-1201,amg.c:1204-1210,amg.c:1213-1216,amg.c:1222-1223,amg.c:1252-1258,amg.c:1267-1267,amg.c:1279-1282,amg.c:1290-1290,amg.c:1294-1294,amg.c:1300-1300,amg.c:1309-1309,amg.c:1318-1321,amg.c:1330-1330,amg.c:1342-1345,amg.c:1365-1367
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	105.67
CQA cycles if no scalar integer	105.67
CQA cycles if FP arith vectorized	105.67
CQA cycles if fully vectorized	52.83
Front-end cycles	93.50
P0 cycles	68.00
P1 cycles	68.00
P2 cycles	47.17
P3 cycles	47.25
P4 cycles	47.17
P5 cycles	47.17
P6 cycles	59.00
P7 cycles	47.25
P8 cycles	0.00
P9 cycles	0.00
P10 cycles	0.00
P11 cycles	0.00
P12 cycles	105.67
P13 cycles	105.67
P14 cycles	105.67
P15 cycles	35.00
P16 cycles	35.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	748.00
Nb uops	748.00
Nb loads	NA
Nb stores	70.00
Nb stack references	0.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	24.00
Bytes prefetched	0.00
Bytes loaded	1976.00
Bytes stored	560.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	NA
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	50.00
Vector-efficiency ratio load	NA
Vector-efficiency ratio store	50.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	50.00
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	50.00

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	2.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.13
Bottlenecks	P12, P13, P14,
Function	BuildIJLaplacian27pt.omp_outlined
Source	amg.c:798-812,amg.c:815-818,amg.c:824-825,amg.c:830-833,amg.c:841-841,amg.c:845-845,amg.c:851-851,amg.c:855-857,amg.c:860-860,amg.c:864-866,amg.c:869-875,amg.c:878-881,amg.c:887-888,amg.c:893-896,amg.c:917-923,amg.c:932-932,amg.c:938-938,amg.c:944-947,amg.c:955-955,amg.c:959-959,amg.c:965-965,amg.c:974-974,amg.c:983-986,amg.c:995-995,amg.c:1007-1010,amg.c:1030-1036,amg.c:1039-1042,amg.c:1048-1049,amg.c:1054-1057,amg.c:1065-1065,amg.c:1069-1069,amg.c:1075-1075,amg.c:1079-1081,amg.c:1084-1084,amg.c:1088-1090,amg.c:1093-1099,amg.c:1102-1105,amg.c:1111-1112,amg.c:1117-1120,amg.c:1128-1128,amg.c:1132-1132,amg.c:1138-1147,amg.c:1150-1153,amg.c:1159-1160,amg.c:1165-1168,amg.c:1176-1176,amg.c:1180-1180,amg.c:1186-1186,amg.c:1190-1192,amg.c:1195-1195,amg.c:1199-1201,amg.c:1204-1210,amg.c:1213-1216,amg.c:1222-1223,amg.c:1252-1258,amg.c:1267-1267,amg.c:1279-1282,amg.c:1290-1290,amg.c:1294-1294,amg.c:1300-1300,amg.c:1309-1309,amg.c:1318-1321,amg.c:1330-1330,amg.c:1342-1345,amg.c:1365-1367
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	105.67
CQA cycles if no scalar integer	105.67
CQA cycles if FP arith vectorized	105.67
CQA cycles if fully vectorized	52.83
Front-end cycles	93.50
P0 cycles	68.00
P1 cycles	68.00
P2 cycles	47.17
P3 cycles	47.25
P4 cycles	47.17
P5 cycles	47.17
P6 cycles	59.00
P7 cycles	47.25
P8 cycles	0.00
P9 cycles	0.00
P10 cycles	0.00
P11 cycles	0.00
P12 cycles	105.67
P13 cycles	105.67
P14 cycles	105.67
P15 cycles	35.00
P16 cycles	35.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	748.00
Nb uops	748.00
Nb loads	NA
Nb stores	70.00
Nb stack references	0.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	24.00
Bytes prefetched	0.00
Bytes loaded	1976.00
Bytes stored	560.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	NA
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	50.00
Vector-efficiency ratio load	NA
Vector-efficiency ratio store	50.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	50.00
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	50.00

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	BuildIJLaplacian27pt.omp_outlined
Source file and lines	amg.c:794-1367
Module	exec

The loop is defined in /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/build/AMG/AMG/test/amg.c:794-818,824-833,841-845,851-881,887-896,917-923,932,938,944-947,955-959,965,974,983-986,995,1007-1010,1030-1042,1048-1057,1065-1069,1075-1105,1111-1120,1128-1132,1138-1153,1159-1168,1176-1180,1186-1216,1222-1223,1252-1258,1267,1279-1282,1290-1294,1300,1309,1318-1321,1330,1342-1345,1365-1367.

Analyzed code is defined in /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/build/AMG/AMG/test/amg.c:798-812,815-818,824-825,830-833,841,845,851,855-857,860,864-866,869-875,878-881,887-888,893-896,917-923,932,938,944-947,955,959,965,974,983-986,995,1007-1010,1030-1036,1039-1042,1048-1049,1054-1057,1065,1069,1075,1079-1081,1084,1088-1090,1093-1099,1102-1105,1111-1112,1117-1120,1128,1132,1138-1147,1150-1153,1159-1160,1165-1168,1176,1180,1186,1190-1192,1195,1199-1201,1204-1210,1213-1216,1222-1223,1252-1258,1267,1279-1282,1290,1294,1300,1309,1318-1321,1330,1342-1345,1365-1367.

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Failed to get the number of paths
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

gain
potential
hint
expert

Vectorization

Your loop is not vectorized. 2 data elements could be processed at once in vector registers. By vectorizing your loop, you can lower the cost of an iteration from 105.67 to 52.83 cycles (2.00x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 1976 bytes. The binary loop is storing 560 bytes.

General properties

nb instructions	748
loop length	2992
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

93.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	68.00	68.00	47.17	47.25	47.17	47.17	59.00	47.25	0.00	0.00	0.00	0.00	105.67	105.67	105.67	35.00	35.00
cycles	68.00	68.00	47.17	47.25	47.17	47.17	59.00	47.25	0.00	0.00	0.00	0.00	105.67	105.67	105.67	35.00	35.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	93.50
Overall L1	105.67

Vectorization ratios

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 105.67 cycles. At this rate:

19% of peak load performance is reached (18.70 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
11% of peak store performance is reached (5.30 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 4110cc

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
LDR X1, [X26]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [SP, #32]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X17, X10, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
UBFM X18, X11, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X15, X14, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
ORR X16, XZR, XZR	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ADD X17, X17, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X18, X18, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
B 411148 <BuildIJLaplacian27pt.omp_outlined+0x238>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [X1]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X0, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X1, [X26]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X1, X17	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ADD X4, X4, X18	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X3, [X0, X16]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X4, X16]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X5, X3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDUR X5, [X29, #464]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X5]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X5, X25,LSL #3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, X6	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X5, X25,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDUR X3, [X29, #480]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X9]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X5, X5, X17	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ADD X3, X10, X3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ADD X10, X10, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X5, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X0, [X0, X16]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X4, X16]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X3, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X3, [X8]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, X17	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X0, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDUR X3, [X29, #448]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X16, X16, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X2, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 411084 <BuildIJLaplacian27pt.omp_outlined+0x174>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X1, X1, X17	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ADD X11, X11, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X1, X1, X16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X2, [X1]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X2, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X21]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X19]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X4, X3, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X12, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 4111c0 <BuildIJLaplacian27pt.omp_outlined+0x2b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X3, X2, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X28]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X20]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X4, X3, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X14, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 411240 <BuildIJLaplacian27pt.omp_outlined+0x330>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X3, X2, #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X4, X3, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X0, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 4113f0 <BuildIJLaplacian27pt.omp_outlined+0x4e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X2, X2, #4	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X2, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 411408 <BuildIJLaplacian27pt.omp_outlined+0x4f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X12, 4115cc <BuildIJLaplacian27pt.omp_outlined+0x6bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X2, X4, X18	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X5, [X2, X16]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [X28]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X20]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X6, X7, X6, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X14, X6	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 4112a8 <BuildIJLaplacian27pt.omp_outlined+0x398>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X3, X5, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 411208 <BuildIJLaplacian27pt.omp_outlined+0x2f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X6, X7, X6, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
TBZ X6, #63, 411210 <BuildIJLaplacian27pt.omp_outlined+0x300>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X3, X5, #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X5, X5, X6, X5	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X5, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 4112fc <BuildIJLaplacian27pt.omp_outlined+0x3ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X6, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X5, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X6, [X6]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X5, X6	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 4112fc <BuildIJLaplacian27pt.omp_outlined+0x3ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 411304 <BuildIJLaplacian27pt.omp_outlined+0x3f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X14, 41144c <BuildIJLaplacian27pt.omp_outlined+0x53c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X18, X16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ADD X2, X2, X3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X4, [X2]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 411270 <BuildIJLaplacian27pt.omp_outlined+0x360>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X5, X6, X5, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
TBZ X5, #63, 411278 <BuildIJLaplacian27pt.omp_outlined+0x368>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X3, X4, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X4, X4, X5, X4	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 411444 <BuildIJLaplacian27pt.omp_outlined+0x534>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X4, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X4]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 411444 <BuildIJLaplacian27pt.omp_outlined+0x534>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 41144c <BuildIJLaplacian27pt.omp_outlined+0x53c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X14, 411304 <BuildIJLaplacian27pt.omp_outlined+0x3f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X3, X5, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 4112c8 <BuildIJLaplacian27pt.omp_outlined+0x3b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X6, X7, X6, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
TBZ X6, #63, 4112d0 <BuildIJLaplacian27pt.omp_outlined+0x3c0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X3, X5, #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X5, X5, X6, X5	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X5, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 4112fc <BuildIJLaplacian27pt.omp_outlined+0x3ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X5, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X5]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X5, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 411304 <BuildIJLaplacian27pt.omp_outlined+0x3f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 411318 <BuildIJLaplacian27pt.omp_outlined+0x408>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X5, X6, X5, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
TBZ X5, #63, 411320 <BuildIJLaplacian27pt.omp_outlined+0x410>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X6, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
MADD X5, X5, X7, X5	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
LDUR X7, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X6, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
LDR X7, [X7]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CCMP X6, X7, #8, #10	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	1	scal (50.0%)
B.GE 41134c <BuildIJLaplacian27pt.omp_outlined+0x43c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [X28]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X20]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X4, X11,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
MADD X5, X5, X7, X5	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X15, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4113b8 <BuildIJLaplacian27pt.omp_outlined+0x4a8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X5, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X5, [X2, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 411384 <BuildIJLaplacian27pt.omp_outlined+0x474>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X7, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X28, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X7, X28, X7, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
LDUR X28, [X29, #384]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
TBZ X7, #63, 41138c <BuildIJLaplacian27pt.omp_outlined+0x47c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X5, X3, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X5, [X2, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X2, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X2, X2, X3, X2	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X2, X2, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 4115c4 <BuildIJLaplacian27pt.omp_outlined+0x6b4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X2, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X2, [X2]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X6, X2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4115cc <BuildIJLaplacian27pt.omp_outlined+0x6bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4115c4 <BuildIJLaplacian27pt.omp_outlined+0x6b4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X5, [X29, #472]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X5]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X15, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4115cc <BuildIJLaplacian27pt.omp_outlined+0x6bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X5, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X5, [X2, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 4113e4 <BuildIJLaplacian27pt.omp_outlined+0x4d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X6, X7, X6, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
TBZ X6, #63, 411544 <BuildIJLaplacian27pt.omp_outlined+0x634>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X5, X3, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X5, [X2, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 411544 <BuildIJLaplacian27pt.omp_outlined+0x634>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X0, 411408 <BuildIJLaplacian27pt.omp_outlined+0x4f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X2, X2, X18	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X3, [X2, X16]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X2, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X2, X2, X3, X2	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X3, X2, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ORR X2, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 411440 <BuildIJLaplacian27pt.omp_outlined+0x530>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X3, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X2, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X3, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X2, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 41144c <BuildIJLaplacian27pt.omp_outlined+0x53c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X2, X2, X11,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X3, [X2]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X2, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X3, X2, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
ORR X2, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 411470 <BuildIJLaplacian27pt.omp_outlined+0x560>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X0, 41147c <BuildIJLaplacian27pt.omp_outlined+0x56c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X2, X2, X11,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X3, [X2]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X2, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
MADD X4, X3, X4, X3	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
ORR X3, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X2, X4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 4114b0 <BuildIJLaplacian27pt.omp_outlined+0x5a0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X3, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X2, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4114bc <BuildIJLaplacian27pt.omp_outlined+0x5ac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, X11,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X4, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X28]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X20]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X3, X4, X3	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X15, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 411500 <BuildIJLaplacian27pt.omp_outlined+0x5f0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X1]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X4, X5, X4, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X0, X4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 411574 <BuildIJLaplacian27pt.omp_outlined+0x664>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X3, X3, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 41158c <BuildIJLaplacian27pt.omp_outlined+0x67c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X2, [X29, #472]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X2, [X2]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X15, X2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4115cc <BuildIJLaplacian27pt.omp_outlined+0x6bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X18, X16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ADD X4, X2, X3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X2, [X4]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X5, X2, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X5, [X4]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 41153c <BuildIJLaplacian27pt.omp_outlined+0x62c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X6, X3, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
TBZ X3, #63, 411544 <BuildIJLaplacian27pt.omp_outlined+0x634>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X5, X2, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X5, [X4]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X2, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X2, X2, X3, X2	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X2, X2, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 4115c4 <BuildIJLaplacian27pt.omp_outlined+0x6b4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X2, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X2, [X2]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X2, X2, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 4115c4 <BuildIJLaplacian27pt.omp_outlined+0x6b4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4115cc <BuildIJLaplacian27pt.omp_outlined+0x6bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X0, 41158c <BuildIJLaplacian27pt.omp_outlined+0x67c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, X18	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X3, X4, X3	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
ORR X4, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
SUB X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 4115c0 <BuildIJLaplacian27pt.omp_outlined+0x6b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X3, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X2, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4115cc <BuildIJLaplacian27pt.omp_outlined+0x6bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X2, X11,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X5, [X4]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X2, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X2, [X4]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X2, [X28]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X20]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X2, X3, X2, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X14, X2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 41160c <BuildIJLaplacian27pt.omp_outlined+0x6fc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X1]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X2, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X4, X3, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X0, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 411680 <BuildIJLaplacian27pt.omp_outlined+0x770>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X2, X2, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X2, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 411698 <BuildIJLaplacian27pt.omp_outlined+0x788>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X14, 4116dc <BuildIJLaplacian27pt.omp_outlined+0x7cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X18, X16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ADD X2, X2, X3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X4, [X2]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 41163c <BuildIJLaplacian27pt.omp_outlined+0x72c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X5, X6, X5, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
TBZ X5, #63, 411644 <BuildIJLaplacian27pt.omp_outlined+0x734>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X3, X4, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X4, X4, X5, X4	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 4116d4 <BuildIJLaplacian27pt.omp_outlined+0x7c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X4, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X4]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 4116d4 <BuildIJLaplacian27pt.omp_outlined+0x7c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4116dc <BuildIJLaplacian27pt.omp_outlined+0x7cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X0, 411698 <BuildIJLaplacian27pt.omp_outlined+0x788>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X2, X2, X18	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X3, [X2, X16]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X2, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X2, X2, X3, X2	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X3, X2, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ORR X2, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 4116d0 <BuildIJLaplacian27pt.omp_outlined+0x7c0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X3, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X2, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X3, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X2, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4116dc <BuildIJLaplacian27pt.omp_outlined+0x7cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X2, X2, X11,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X3, [X2]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X2, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X3, X2, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
ORR X2, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 411700 <BuildIJLaplacian27pt.omp_outlined+0x7f0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X0, 41170c <BuildIJLaplacian27pt.omp_outlined+0x7fc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X2, X2, X11,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X3, [X2]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X2, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
MADD X4, X3, X4, X3	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
ORR X3, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X2, X4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 411740 <BuildIJLaplacian27pt.omp_outlined+0x830>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X3, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X2, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 41174c <BuildIJLaplacian27pt.omp_outlined+0x83c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, X11,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X4, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X28]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X20]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X3, X4, X3	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X15, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 41178c <BuildIJLaplacian27pt.omp_outlined+0x87c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X1]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X4, X5, X4, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X0, X4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 411800 <BuildIJLaplacian27pt.omp_outlined+0x8f0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X3, X3, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 411818 <BuildIJLaplacian27pt.omp_outlined+0x908>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X3, [X29, #472]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X15, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 411858 <BuildIJLaplacian27pt.omp_outlined+0x948>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X18, X16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ADD X3, X3, X4	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X5, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 4117c8 <BuildIJLaplacian27pt.omp_outlined+0x8b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X6, X7, X6, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
TBZ X6, #63, 4117d0 <BuildIJLaplacian27pt.omp_outlined+0x8c0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X4, X5, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X5, X5, X6, X5	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X5, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 411850 <BuildIJLaplacian27pt.omp_outlined+0x940>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X5, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X5]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X5, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 411850 <BuildIJLaplacian27pt.omp_outlined+0x940>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 411858 <BuildIJLaplacian27pt.omp_outlined+0x948>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X0, 411818 <BuildIJLaplacian27pt.omp_outlined+0x908>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, X18	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X3, X4, X3	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X4, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ORR X3, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 41184c <BuildIJLaplacian27pt.omp_outlined+0x93c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X3, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X2, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 411858 <BuildIJLaplacian27pt.omp_outlined+0x948>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, X11,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X4, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X21]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X19]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X3, X4, X3	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X13, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4118c0 <BuildIJLaplacian27pt.omp_outlined+0x9b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X1]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [X28]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X20]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X4, X5, X4, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X14, X4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 411948 <BuildIJLaplacian27pt.omp_outlined+0xa38>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X4, X3, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X4, X5, X4, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X0, X4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 4119b0 <BuildIJLaplacian27pt.omp_outlined+0xaa0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X3, X3, #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 4119c8 <BuildIJLaplacian27pt.omp_outlined+0xab8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #80]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X1, [X1]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X13, X1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4110cc <BuildIJLaplacian27pt.omp_outlined+0x1bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X1, X18	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X5, [X3, X16]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [X28]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X20]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X6, X7, X6, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X14, X6	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 411b08 <BuildIJLaplacian27pt.omp_outlined+0xbf8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X4, X5, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 411914 <BuildIJLaplacian27pt.omp_outlined+0xa04>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X6, X7, X6, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
TBZ X6, #63, 41191c <BuildIJLaplacian27pt.omp_outlined+0xa0c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X4, X5, #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X5, X5, X6, X5	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X5, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 411b5c <BuildIJLaplacian27pt.omp_outlined+0xc4c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X5, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X5]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X2, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 411b64 <BuildIJLaplacian27pt.omp_outlined+0xc54>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 411b5c <BuildIJLaplacian27pt.omp_outlined+0xc4c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X14, 411a08 <BuildIJLaplacian27pt.omp_outlined+0xaf8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X18, X16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ADD X3, X3, X4	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X5, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 411978 <BuildIJLaplacian27pt.omp_outlined+0xa68>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X6, X7, X6, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
TBZ X6, #63, 411980 <BuildIJLaplacian27pt.omp_outlined+0xa70>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X4, X5, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X5, X5, X6, X5	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X5, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 411a00 <BuildIJLaplacian27pt.omp_outlined+0xaf0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X5, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X5]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X5, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 411a00 <BuildIJLaplacian27pt.omp_outlined+0xaf0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 411a08 <BuildIJLaplacian27pt.omp_outlined+0xaf8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X0, 4119c8 <BuildIJLaplacian27pt.omp_outlined+0xab8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, X18	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X3, X4, X3	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X4, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ORR X3, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 4119fc <BuildIJLaplacian27pt.omp_outlined+0xaec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X3, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X2, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 411a08 <BuildIJLaplacian27pt.omp_outlined+0xaf8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, X11,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X4, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X4, X4, X3, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
ORR X3, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 411a2c <BuildIJLaplacian27pt.omp_outlined+0xb1c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X0, 411a38 <BuildIJLaplacian27pt.omp_outlined+0xb28>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, X11,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X4, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X4, X3, X4, X3	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
ORR X3, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X2, X4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 411a68 <BuildIJLaplacian27pt.omp_outlined+0xb58>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X3, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X2, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 411a74 <BuildIJLaplacian27pt.omp_outlined+0xb64>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, X11,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X4, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X28]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X20]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X3, X4, X3	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X15, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 411ac0 <BuildIJLaplacian27pt.omp_outlined+0xbb0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X1]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X4, X5, X4, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X0, X4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 411c14 <BuildIJLaplacian27pt.omp_outlined+0xd04>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X3, X3, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 411c2c <BuildIJLaplacian27pt.omp_outlined+0xd1c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X14, 411b64 <BuildIJLaplacian27pt.omp_outlined+0xc54>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X4, X5, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 411b28 <BuildIJLaplacian27pt.omp_outlined+0xc18>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X6, X7, X6, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
TBZ X6, #63, 411b30 <BuildIJLaplacian27pt.omp_outlined+0xc20>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X4, X5, #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X5, X5, X6, X5	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X5, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 411b5c <BuildIJLaplacian27pt.omp_outlined+0xc4c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X5, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X5]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X5, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 411b64 <BuildIJLaplacian27pt.omp_outlined+0xc54>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 411b78 <BuildIJLaplacian27pt.omp_outlined+0xc68>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X5, X6, X5, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
TBZ X5, #63, 411b80 <BuildIJLaplacian27pt.omp_outlined+0xc70>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X5, X5, X6, X5	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X2, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 411ba4 <BuildIJLaplacian27pt.omp_outlined+0xc94>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X5, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X5]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X2, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 411bac <BuildIJLaplacian27pt.omp_outlined+0xc9c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [X28]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X20]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X1, X1, X11,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
MADD X5, X5, X6, X5	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X15, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 411c60 <BuildIJLaplacian27pt.omp_outlined+0xd50>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X5, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X5, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 411be0 <BuildIJLaplacian27pt.omp_outlined+0xcd0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X6, X7, X6, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
TBZ X6, #63, 411be8 <BuildIJLaplacian27pt.omp_outlined+0xcd8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X5, X4, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X5, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X3, X4, X3	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 4110c4 <BuildIJLaplacian27pt.omp_outlined+0x1b4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X0, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X0]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X2, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4110cc <BuildIJLaplacian27pt.omp_outlined+0x1bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4110c4 <BuildIJLaplacian27pt.omp_outlined+0x1b4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X0, 411c2c <BuildIJLaplacian27pt.omp_outlined+0xd1c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, X18	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X3, X4, X3	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 4110c0 <BuildIJLaplacian27pt.omp_outlined+0x1b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X0, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X0]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X2, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4110cc <BuildIJLaplacian27pt.omp_outlined+0x1bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X1, X0, X11,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
B 4110c0 <BuildIJLaplacian27pt.omp_outlined+0x1b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X5, [X29, #472]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X5]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X15, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4110cc <BuildIJLaplacian27pt.omp_outlined+0x1bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X5, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X5, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 411c8c <BuildIJLaplacian27pt.omp_outlined+0xd7c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X6, X7, X6, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
TBZ X6, #63, 411c94 <BuildIJLaplacian27pt.omp_outlined+0xd84>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X5, X4, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X5, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X3, X4, X3	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 4110c4 <BuildIJLaplacian27pt.omp_outlined+0x1b4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X3, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	N/A
B.LT 4110c4 <BuildIJLaplacian27pt.omp_outlined+0x1b4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4110cc <BuildIJLaplacian27pt.omp_outlined+0x1bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A

Function	BuildIJLaplacian27pt.omp_outlined
Source file and lines	amg.c:794-1367
Module	exec

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Failed to get the number of paths
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

gain
potential
hint
expert

Vectorization

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 1976 bytes. The binary loop is storing 560 bytes.

General properties

nb instructions	748
loop length	2992
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

93.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	68.00	68.00	47.17	47.25	47.17	47.17	59.00	47.25	0.00	0.00	0.00	0.00	105.67	105.67	105.67	35.00	35.00
cycles	68.00	68.00	47.17	47.25	47.17	47.17	59.00	47.25	0.00	0.00	0.00	0.00	105.67	105.67	105.67	35.00	35.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	93.50
Overall L1	105.67

Vectorization ratios

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 105.67 cycles. At this rate:

19% of peak load performance is reached (18.70 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
11% of peak store performance is reached (5.30 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 4110cc

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
LDR X1, [X26]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [SP, #32]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X17, X10, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
UBFM X18, X11, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X15, X14, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
ORR X16, XZR, XZR	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ADD X17, X17, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X18, X18, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
B 411148 <BuildIJLaplacian27pt.omp_outlined+0x238>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [X1]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X0, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X1, [X26]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X1, X17	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ADD X4, X4, X18	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X3, [X0, X16]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X4, X16]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X5, X3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDUR X5, [X29, #464]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X5]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X5, X25,LSL #3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, X6	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X5, X25,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDUR X3, [X29, #480]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X9]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X5, X5, X17	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ADD X3, X10, X3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ADD X10, X10, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X5, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X0, [X0, X16]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X4, X16]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X3, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X3, [X8]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, X17	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X0, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDUR X3, [X29, #448]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X16, X16, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X2, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 411084 <BuildIJLaplacian27pt.omp_outlined+0x174>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X1, X1, X17	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ADD X11, X11, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X1, X1, X16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X2, [X1]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X2, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X21]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X19]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X4, X3, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X12, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 4111c0 <BuildIJLaplacian27pt.omp_outlined+0x2b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X3, X2, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X28]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X20]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X4, X3, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X14, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 411240 <BuildIJLaplacian27pt.omp_outlined+0x330>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X3, X2, #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X4, X3, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X0, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 4113f0 <BuildIJLaplacian27pt.omp_outlined+0x4e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X2, X2, #4	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X2, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 411408 <BuildIJLaplacian27pt.omp_outlined+0x4f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X12, 4115cc <BuildIJLaplacian27pt.omp_outlined+0x6bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X2, X4, X18	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X5, [X2, X16]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [X28]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X20]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X6, X7, X6, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X14, X6	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 4112a8 <BuildIJLaplacian27pt.omp_outlined+0x398>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X3, X5, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 411208 <BuildIJLaplacian27pt.omp_outlined+0x2f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X6, X7, X6, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
TBZ X6, #63, 411210 <BuildIJLaplacian27pt.omp_outlined+0x300>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X3, X5, #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X5, X5, X6, X5	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X5, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 4112fc <BuildIJLaplacian27pt.omp_outlined+0x3ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X6, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X5, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X6, [X6]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X5, X6	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 4112fc <BuildIJLaplacian27pt.omp_outlined+0x3ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 411304 <BuildIJLaplacian27pt.omp_outlined+0x3f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X14, 41144c <BuildIJLaplacian27pt.omp_outlined+0x53c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X18, X16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ADD X2, X2, X3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X4, [X2]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 411270 <BuildIJLaplacian27pt.omp_outlined+0x360>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X5, X6, X5, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
TBZ X5, #63, 411278 <BuildIJLaplacian27pt.omp_outlined+0x368>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X3, X4, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X4, X4, X5, X4	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 411444 <BuildIJLaplacian27pt.omp_outlined+0x534>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X4, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X4]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 411444 <BuildIJLaplacian27pt.omp_outlined+0x534>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 41144c <BuildIJLaplacian27pt.omp_outlined+0x53c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X14, 411304 <BuildIJLaplacian27pt.omp_outlined+0x3f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X3, X5, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 4112c8 <BuildIJLaplacian27pt.omp_outlined+0x3b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X6, X7, X6, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
TBZ X6, #63, 4112d0 <BuildIJLaplacian27pt.omp_outlined+0x3c0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X3, X5, #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X5, X5, X6, X5	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X5, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 4112fc <BuildIJLaplacian27pt.omp_outlined+0x3ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X5, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X5]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X5, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 411304 <BuildIJLaplacian27pt.omp_outlined+0x3f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 411318 <BuildIJLaplacian27pt.omp_outlined+0x408>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X5, X6, X5, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
TBZ X5, #63, 411320 <BuildIJLaplacian27pt.omp_outlined+0x410>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X6, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
MADD X5, X5, X7, X5	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
LDUR X7, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X6, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
LDR X7, [X7]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CCMP X6, X7, #8, #10	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	1	scal (50.0%)
B.GE 41134c <BuildIJLaplacian27pt.omp_outlined+0x43c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [X28]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X20]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X4, X11,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
MADD X5, X5, X7, X5	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X15, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4113b8 <BuildIJLaplacian27pt.omp_outlined+0x4a8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X5, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X5, [X2, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 411384 <BuildIJLaplacian27pt.omp_outlined+0x474>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X7, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X28, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X7, X28, X7, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
LDUR X28, [X29, #384]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
TBZ X7, #63, 41138c <BuildIJLaplacian27pt.omp_outlined+0x47c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X5, X3, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X5, [X2, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X2, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X2, X2, X3, X2	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X2, X2, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 4115c4 <BuildIJLaplacian27pt.omp_outlined+0x6b4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X2, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X2, [X2]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X6, X2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4115cc <BuildIJLaplacian27pt.omp_outlined+0x6bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4115c4 <BuildIJLaplacian27pt.omp_outlined+0x6b4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X5, [X29, #472]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X5]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X15, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4115cc <BuildIJLaplacian27pt.omp_outlined+0x6bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X5, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X5, [X2, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 4113e4 <BuildIJLaplacian27pt.omp_outlined+0x4d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X6, X7, X6, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
TBZ X6, #63, 411544 <BuildIJLaplacian27pt.omp_outlined+0x634>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X5, X3, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X5, [X2, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 411544 <BuildIJLaplacian27pt.omp_outlined+0x634>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X0, 411408 <BuildIJLaplacian27pt.omp_outlined+0x4f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X2, X2, X18	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X3, [X2, X16]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X2, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X2, X2, X3, X2	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X3, X2, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ORR X2, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 411440 <BuildIJLaplacian27pt.omp_outlined+0x530>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X3, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X2, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X3, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X2, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 41144c <BuildIJLaplacian27pt.omp_outlined+0x53c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X2, X2, X11,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X3, [X2]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X2, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X3, X2, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
ORR X2, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 411470 <BuildIJLaplacian27pt.omp_outlined+0x560>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X0, 41147c <BuildIJLaplacian27pt.omp_outlined+0x56c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X2, X2, X11,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X3, [X2]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X2, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
MADD X4, X3, X4, X3	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
ORR X3, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X2, X4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 4114b0 <BuildIJLaplacian27pt.omp_outlined+0x5a0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X3, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X2, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4114bc <BuildIJLaplacian27pt.omp_outlined+0x5ac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, X11,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X4, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X28]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X20]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X3, X4, X3	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X15, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 411500 <BuildIJLaplacian27pt.omp_outlined+0x5f0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X1]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X4, X5, X4, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X0, X4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 411574 <BuildIJLaplacian27pt.omp_outlined+0x664>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X3, X3, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 41158c <BuildIJLaplacian27pt.omp_outlined+0x67c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X2, [X29, #472]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X2, [X2]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X15, X2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4115cc <BuildIJLaplacian27pt.omp_outlined+0x6bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X18, X16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ADD X4, X2, X3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X2, [X4]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X5, X2, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X5, [X4]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 41153c <BuildIJLaplacian27pt.omp_outlined+0x62c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X6, X3, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
TBZ X3, #63, 411544 <BuildIJLaplacian27pt.omp_outlined+0x634>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X5, X2, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X5, [X4]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X2, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X2, X2, X3, X2	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X2, X2, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 4115c4 <BuildIJLaplacian27pt.omp_outlined+0x6b4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X2, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X2, [X2]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X2, X2, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 4115c4 <BuildIJLaplacian27pt.omp_outlined+0x6b4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4115cc <BuildIJLaplacian27pt.omp_outlined+0x6bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X0, 41158c <BuildIJLaplacian27pt.omp_outlined+0x67c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, X18	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X3, X4, X3	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
ORR X4, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
SUB X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 4115c0 <BuildIJLaplacian27pt.omp_outlined+0x6b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X3, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X2, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4115cc <BuildIJLaplacian27pt.omp_outlined+0x6bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X2, X11,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X5, [X4]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X2, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X2, [X4]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X2, [X28]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X20]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X2, X3, X2, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X14, X2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 41160c <BuildIJLaplacian27pt.omp_outlined+0x6fc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X1]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X2, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X4, X3, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X0, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 411680 <BuildIJLaplacian27pt.omp_outlined+0x770>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X2, X2, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X2, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 411698 <BuildIJLaplacian27pt.omp_outlined+0x788>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X14, 4116dc <BuildIJLaplacian27pt.omp_outlined+0x7cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X18, X16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ADD X2, X2, X3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X4, [X2]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 41163c <BuildIJLaplacian27pt.omp_outlined+0x72c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X5, X6, X5, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
TBZ X5, #63, 411644 <BuildIJLaplacian27pt.omp_outlined+0x734>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X3, X4, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X4, X4, X5, X4	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 4116d4 <BuildIJLaplacian27pt.omp_outlined+0x7c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X4, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X4]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 4116d4 <BuildIJLaplacian27pt.omp_outlined+0x7c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4116dc <BuildIJLaplacian27pt.omp_outlined+0x7cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X0, 411698 <BuildIJLaplacian27pt.omp_outlined+0x788>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X2, X2, X18	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X3, [X2, X16]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X2, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X2, X2, X3, X2	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X3, X2, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ORR X2, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 4116d0 <BuildIJLaplacian27pt.omp_outlined+0x7c0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X3, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X2, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X3, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X2, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4116dc <BuildIJLaplacian27pt.omp_outlined+0x7cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X2, X2, X11,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X3, [X2]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X2, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X3, X2, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
ORR X2, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 411700 <BuildIJLaplacian27pt.omp_outlined+0x7f0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X0, 41170c <BuildIJLaplacian27pt.omp_outlined+0x7fc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X2, X2, X11,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X3, [X2]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X2]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X2, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
MADD X4, X3, X4, X3	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
ORR X3, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X2, X4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 411740 <BuildIJLaplacian27pt.omp_outlined+0x830>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X3, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X2, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 41174c <BuildIJLaplacian27pt.omp_outlined+0x83c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, X11,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X4, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X28]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X20]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X3, X4, X3	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X15, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 41178c <BuildIJLaplacian27pt.omp_outlined+0x87c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X1]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X4, X5, X4, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X0, X4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 411800 <BuildIJLaplacian27pt.omp_outlined+0x8f0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X3, X3, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 411818 <BuildIJLaplacian27pt.omp_outlined+0x908>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X3, [X29, #472]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X15, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 411858 <BuildIJLaplacian27pt.omp_outlined+0x948>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X18, X16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ADD X3, X3, X4	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X5, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 4117c8 <BuildIJLaplacian27pt.omp_outlined+0x8b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X6, X7, X6, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
TBZ X6, #63, 4117d0 <BuildIJLaplacian27pt.omp_outlined+0x8c0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X4, X5, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X5, X5, X6, X5	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X5, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 411850 <BuildIJLaplacian27pt.omp_outlined+0x940>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X5, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X5]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X5, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 411850 <BuildIJLaplacian27pt.omp_outlined+0x940>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 411858 <BuildIJLaplacian27pt.omp_outlined+0x948>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X0, 411818 <BuildIJLaplacian27pt.omp_outlined+0x908>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, X18	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X3, X4, X3	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X4, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ORR X3, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 41184c <BuildIJLaplacian27pt.omp_outlined+0x93c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X3, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X2, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 411858 <BuildIJLaplacian27pt.omp_outlined+0x948>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, X11,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X4, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X21]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X19]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X3, X4, X3	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X13, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4118c0 <BuildIJLaplacian27pt.omp_outlined+0x9b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X1]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [X28]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X20]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X4, X5, X4, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X14, X4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 411948 <BuildIJLaplacian27pt.omp_outlined+0xa38>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X4, X3, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X4, X5, X4, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X0, X4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 4119b0 <BuildIJLaplacian27pt.omp_outlined+0xaa0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X3, X3, #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 4119c8 <BuildIJLaplacian27pt.omp_outlined+0xab8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #80]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X1, [X1]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X13, X1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4110cc <BuildIJLaplacian27pt.omp_outlined+0x1bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X1, X18	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X5, [X3, X16]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [X28]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X20]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X6, X7, X6, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X14, X6	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 411b08 <BuildIJLaplacian27pt.omp_outlined+0xbf8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X4, X5, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 411914 <BuildIJLaplacian27pt.omp_outlined+0xa04>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X6, X7, X6, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
TBZ X6, #63, 41191c <BuildIJLaplacian27pt.omp_outlined+0xa0c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X4, X5, #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X5, X5, X6, X5	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X5, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 411b5c <BuildIJLaplacian27pt.omp_outlined+0xc4c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X5, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X5]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X2, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 411b64 <BuildIJLaplacian27pt.omp_outlined+0xc54>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 411b5c <BuildIJLaplacian27pt.omp_outlined+0xc4c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X14, 411a08 <BuildIJLaplacian27pt.omp_outlined+0xaf8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X18, X16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ADD X3, X3, X4	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X5, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 411978 <BuildIJLaplacian27pt.omp_outlined+0xa68>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X6, X7, X6, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
TBZ X6, #63, 411980 <BuildIJLaplacian27pt.omp_outlined+0xa70>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X4, X5, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X5, X5, X6, X5	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X5, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 411a00 <BuildIJLaplacian27pt.omp_outlined+0xaf0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X5, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X5]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X5, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 411a00 <BuildIJLaplacian27pt.omp_outlined+0xaf0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 411a08 <BuildIJLaplacian27pt.omp_outlined+0xaf8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X0, 4119c8 <BuildIJLaplacian27pt.omp_outlined+0xab8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, X18	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X3, X4, X3	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X4, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
ORR X3, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 4119fc <BuildIJLaplacian27pt.omp_outlined+0xaec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X3, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X2, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 411a08 <BuildIJLaplacian27pt.omp_outlined+0xaf8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, X11,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X4, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X4, X4, X3, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
ORR X3, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 411a2c <BuildIJLaplacian27pt.omp_outlined+0xb1c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X0, 411a38 <BuildIJLaplacian27pt.omp_outlined+0xb28>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, X11,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X4, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X4, X3, X4, X3	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
ORR X3, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X2, X4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 411a68 <BuildIJLaplacian27pt.omp_outlined+0xb58>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X3, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X2, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 411a74 <BuildIJLaplacian27pt.omp_outlined+0xb64>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, X11,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X4, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X28]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X20]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X3, X4, X3	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X15, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 411ac0 <BuildIJLaplacian27pt.omp_outlined+0xbb0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X1]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X4, X5, X4, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X0, X4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 411c14 <BuildIJLaplacian27pt.omp_outlined+0xd04>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X3, X3, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X3, [X1]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 411c2c <BuildIJLaplacian27pt.omp_outlined+0xd1c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X14, 411b64 <BuildIJLaplacian27pt.omp_outlined+0xc54>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X4, X5, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 411b28 <BuildIJLaplacian27pt.omp_outlined+0xc18>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X6, X7, X6, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
TBZ X6, #63, 411b30 <BuildIJLaplacian27pt.omp_outlined+0xc20>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X4, X5, #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X5, X5, X6, X5	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X5, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 411b5c <BuildIJLaplacian27pt.omp_outlined+0xc4c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X5, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X5]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X5, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 411b64 <BuildIJLaplacian27pt.omp_outlined+0xc54>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 411b78 <BuildIJLaplacian27pt.omp_outlined+0xc68>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X5, X6, X5, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
TBZ X5, #63, 411b80 <BuildIJLaplacian27pt.omp_outlined+0xc70>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X5, X5, X6, X5	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X2, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 411ba4 <BuildIJLaplacian27pt.omp_outlined+0xc94>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X5, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X5]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X2, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 411bac <BuildIJLaplacian27pt.omp_outlined+0xc9c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [X28]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X20]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X1, X1, X11,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
MADD X5, X5, X6, X5	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP X15, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 411c60 <BuildIJLaplacian27pt.omp_outlined+0xd50>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X5, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X5, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 411be0 <BuildIJLaplacian27pt.omp_outlined+0xcd0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X6, X7, X6, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
TBZ X6, #63, 411be8 <BuildIJLaplacian27pt.omp_outlined+0xcd8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X5, X4, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X5, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X3, X4, X3	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 4110c4 <BuildIJLaplacian27pt.omp_outlined+0x1b4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X0, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X0]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X2, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4110cc <BuildIJLaplacian27pt.omp_outlined+0x1bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4110c4 <BuildIJLaplacian27pt.omp_outlined+0x1b4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X0, 411c2c <BuildIJLaplacian27pt.omp_outlined+0xd1c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X3, X18	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X4, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X3, X4, X3	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 4110c0 <BuildIJLaplacian27pt.omp_outlined+0x1b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X0, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X0]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X2, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4110cc <BuildIJLaplacian27pt.omp_outlined+0x1bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [X24]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X1, X0, X11,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
B 4110c0 <BuildIJLaplacian27pt.omp_outlined+0x1b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X5, [X29, #472]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [X5]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X15, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4110cc <BuildIJLaplacian27pt.omp_outlined+0x1bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X5, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X5, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 411c8c <BuildIJLaplacian27pt.omp_outlined+0xd7c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X6, X7, X6, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
TBZ X6, #63, 411c94 <BuildIJLaplacian27pt.omp_outlined+0xd84>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X5, X4, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
STR X5, [X3, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X23]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X22]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MADD X3, X3, X4, X3	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
SUB X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 4110c4 <BuildIJLaplacian27pt.omp_outlined+0x1b4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR X3, [X29, #496]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
CMP X0, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	N/A
B.LT 4110c4 <BuildIJLaplacian27pt.omp_outlined+0x1b4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4110cc <BuildIJLaplacian27pt.omp_outlined+0x1bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A

▶Scalability Runs Description

Run 1x1	Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_NUM_THREADS: 1OMP_PLACES: threads
Run 1x2	Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 2OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x4	Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 4OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x8	Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 8OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x16	Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 16OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x24	Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 24OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x32	Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 32OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x40	Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 40OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x48	Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 48OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x56	Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 56OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x64	Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 64OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x72	Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 72OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x80	Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 80OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x88	Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 88OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x96	Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 96OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads

(1x1) Efficiency	(1x1) Potential Speed-Up (%)	(1x2) Efficiency	(1x2) Potential Speed-Up (%)	(1x4) Efficiency	(1x4) Potential Speed-Up (%)	(1x8) Efficiency	(1x8) Potential Speed-Up (%)	(1x16) Efficiency	(1x16) Potential Speed-Up (%)	(1x24) Efficiency	(1x24) Potential Speed-Up (%)	(1x32) Efficiency	(1x32) Potential Speed-Up (%)	(1x40) Efficiency	(1x40) Potential Speed-Up (%)	(1x48) Efficiency	(1x48) Potential Speed-Up (%)	(1x56) Efficiency	(1x56) Potential Speed-Up (%)	(1x64) Efficiency	(1x64) Potential Speed-Up (%)	(1x72) Efficiency	(1x72) Potential Speed-Up (%)	(1x80) Efficiency	(1x80) Potential Speed-Up (%)	(1x88) Efficiency	(1x88) Potential Speed-Up (%)	(1x96) Efficiency	(1x96) Potential Speed-Up (%)
1	0	1.89	0	3.63	0	6.41	0	10.37	0	14.32	0	17.5	0	21.75	0	34.92	0	40.7	0	50.06	0	53.46	0	60.34	0	58.31	0	63.7	0

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency

Run	Number of threads	Efficiency (ideal is 1)	Speedup	Ideal Speedup	Time (s)	Coverage (%)
1x1	1	1	1	1	1.4999992847443	0.56384819746017
1x2	2	1.89	1.89	2	0.84000033140182	0.55970615148544
1x4	4	3.63	3.63	4	0.41999992728233	0.54687637090683
1x8	8	6.41	6.41	8	0.2600000500679	0.53056466579437
1x16	16	10.37	10.37	16	0.1499999910593	0.5021094083786
1x24	24	14.32	14.32	24	0.12999999523163	0.42299273610115
1x32	32	17.5	17.5	32	0.10999997705221	0.3776228427887
1x40	40	21.75	21.75	40	0.079999998211861	0.28591120243073
1x48	48	34.92	34.92	48	0.054999999701977	0.19380022585392
1x56	56	40.7	40.7	56	0.079999998211861	0.18295013904572
1x64	64	50.06	50.06	64	0.049999997019768	0.15385901927948
1x72	71	53.46	53.46	72	0.050000000745058	0.1442674100399
1x80	79	60.34	60.34	80	0.054999995976686	0.13888655602932
1x88	87	58.31	58.31	88	0.040000002831221	0.13114048540592
1x96	95	63.7	63.7	96	0.03999999165535	0.12054958194494

Report Configuration

Vectorization

Details

Workaround

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Vectorization

Details

Workaround

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

▶Scalability Runs Description

▼Columns Filter

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency