OV - exec - Function hypre

	Function: hypre_qsort2abs	Module: exec	Source: par_interp.c:3180-3192	Coverage (incl. loops): 0.01% \| (excl. loops): 0.00%

/home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/build/AMG/AMG/parcsr_ls/par_interp.c: 3180 - 3192

--------------------------------------------------------------------------------

3180:    if (left >= right)

3181:       return;

3182:    hypre_swap2( v, w, left, (left+right)/2);

3183:    last = left;

3184:    for (i = left+1; i <= right; i++)

3185:       if (fabs(w[i]) > fabs(w[left]))

3186:       {

3187:          hypre_swap2(v, w, ++last, i);

3188:       }

3189:    hypre_swap2(v, w, left, last);

3190:    hypre_qsort2abs(v, w, left, last-1);

3191:    hypre_qsort2abs(v, w, last+1, right);

3192: }

0x42c170 CMP	X2, X3

0x42c174 B.GE	42c254

0x42c178 STP	X29, X30, [SP, #960]!

0x42c17c STP	X24, X23, [SP, #16]

0x42c180 STP	X22, X21, [SP, #32]

0x42c184 STP	X20, X19, [SP, #48]

0x42c188 ADD	X29, SP, #0

0x42c18c ORR	X19, XZR, X3

0x42c190 ORR	X22, XZR, X2

0x42c194 ORR	X20, XZR, X1

0x42c198 ORR	X21, XZR, X0

0x42c19c B	42c1d4

(494) 0x42c1a0 ORR	X0, XZR, X21

(494) 0x42c1a4 ORR	X1, XZR, X20

(494) 0x42c1a8 ORR	X2, XZR, X22

(494) 0x42c1ac ORR	X3, XZR, X23

(494) 0x42c1b0 BL	4a7320

(494) 0x42c1b4 SUB	X3, X23, #1

(494) 0x42c1b8 ORR	X0, XZR, X21

(494) 0x42c1bc ORR	X1, XZR, X20

(494) 0x42c1c0 ORR	X2, XZR, X22

(494) 0x42c1c4 BL	42c170

(494) 0x42c1c8 ADD	X22, X23, #1

(494) 0x42c1cc CMP	X22, X19

(494) 0x42c1d0 B.GE	42c244

(494) 0x42c1d4 ADD	X8, X22, X19

(494) 0x42c1d8 ORR	X0, XZR, X21

(494) 0x42c1dc ORR	X1, XZR, X20

(494) 0x42c1e0 ORR	X2, XZR, X22

(494) 0x42c1e4 ADD	X8, X8, X8,LSR #63

(494) 0x42c1e8 SBFM	X3, X8, #1, #63

(494) 0x42c1ec BL	4a7320

(494) 0x42c1f0 ADD	X24, X22, #1

(494) 0x42c1f4 ORR	X23, XZR, X22

(494) 0x42c1f8 B	42c210

0x42c1fc HINT	#0

(494) 0x42c200 ADD	X8, X24, #1

(494) 0x42c204 CMP	X24, X19

(494) 0x42c208 ORR	X24, XZR, X8

(494) 0x42c20c B.GE	42c1a0

(494) 0x42c210 LDR	D0, [X20, X24,LSL #3]

(494) 0x42c214 LDR	D1, [X20, X22,LSL #3]

(494) 0x42c218 FABS	D0, D0

(494) 0x42c21c FABS	D1, D1

(494) 0x42c220 FCMP	D0, D1

(494) 0x42c224 B.LE	42c200

(494) 0x42c228 ADD	X23, X23, #1

(494) 0x42c22c ORR	X0, XZR, X21

(494) 0x42c230 ORR	X1, XZR, X20

(494) 0x42c234 ORR	X3, XZR, X24

(494) 0x42c238 ORR	X2, XZR, X23

(494) 0x42c23c BL	4a7320

(494) 0x42c240 B	42c200

0x42c244 LDP	X20, X19, [SP, #48]

0x42c248 LDP	X22, X21, [SP, #32]

0x42c24c LDP	X24, X23, [SP, #16]

0x42c250 LDP	X29, X30, [SP], #64

0x42c254 RET

0x42c258 HINT	#0

0x42c25c HINT	#0

Coverage (%)	Name	Source Location	Module
►50.00+	hypre_BoomerAMGInterpTruncatio[...]	par_interp.c:2912	exec
○	__kmp_invoke_microtask		libomp.so
►33.33+	hypre_qsort2abs	par_interp.c:3191	exec
○	hypre_BoomerAMGInterpTruncatio[...]	par_interp.c:2912	exec
○	__kmp_invoke_microtask		libomp.so
►16.67+	hypre_qsort2abs	par_interp.c:3191	exec
○	hypre_qsort2abs	par_interp.c:3191	exec
○	hypre_BoomerAMGInterpTruncatio[...]	par_interp.c:2912	exec
○	__kmp_invoke_microtask		libomp.so

Coverage (%)	Name	Source Location	Module
►58.33+	hypre_BoomerAMGInterpTruncatio[...]	par_interp.c:2912	exec
○	__kmp_invoke_microtask		libomp.so
►25.00+	hypre_qsort2abs	par_interp.c:3191	exec
○	hypre_BoomerAMGInterpTruncatio[...]	par_interp.c:2912	exec
○	__kmp_invoke_microtask		libomp.so
►8.33+	hypre_qsort2abs	par_interp.c:3191	exec
○	hypre_qsort2abs	par_interp.c:3191	exec
○	hypre_qsort2abs	par_interp.c:3191	exec
○	hypre_BoomerAMGInterpTruncatio[...]	par_interp.c:2912	exec
○	__kmp_invoke_microtask		libomp.so
►8.33+	hypre_qsort2abs	par_interp.c:3191	exec
○	hypre_qsort2abs	par_interp.c:3191	exec
○	hypre_BoomerAMGInterpTruncatio[...]	par_interp.c:2912	exec
○	__kmp_invoke_microtask		libomp.so

Coverage (%)	Name	Source Location	Module
►50.00+	hypre_BoomerAMGInterpTruncatio[...]	par_interp.c:2912	exec
○	__kmp_invoke_microtask		libomp.so
►30.00+	hypre_qsort2abs	par_interp.c:3191	exec
○	hypre_BoomerAMGInterpTruncatio[...]	par_interp.c:2912	exec
○	__kmp_invoke_microtask		libomp.so
►10.00+	hypre_qsort2abs	par_interp.c:3191	exec
○	hypre_qsort2abs	par_interp.c:3191	exec
○	hypre_qsort2abs	par_interp.c:3191	exec
○	hypre_BoomerAMGInterpTruncatio[...]	par_interp.c:2912	exec
○	__kmp_invoke_microtask		libomp.so
►10.00+	hypre_qsort2abs	par_interp.c:3191	exec
○	hypre_qsort2abs	par_interp.c:3191	exec
○	hypre_BoomerAMGInterpTruncatio[...]	par_interp.c:2912	exec
○	__kmp_invoke_microtask		libomp.so

Coverage (%)	Name	Source Location	Module
►66.67+	hypre_BoomerAMGInterpTruncatio[...]	par_interp.c:2912	exec
○	__kmp_invoke_microtask		libomp.so
►22.22+	hypre_qsort2abs	par_interp.c:3191	exec
○	hypre_BoomerAMGInterpTruncatio[...]	par_interp.c:2912	exec
○	__kmp_invoke_microtask		libomp.so
►11.11+	hypre_qsort2abs	par_interp.c:3191	exec
○	hypre_qsort2abs	par_interp.c:3191	exec
○	hypre_BoomerAMGInterpTruncatio[...]	par_interp.c:2912	exec
○	__kmp_invoke_microtask		libomp.so

Coverage (%)	Name	Source Location	Module
►70.00+	hypre_BoomerAMGInterpTruncatio[...]	par_interp.c:2912	exec
○	__kmp_invoke_microtask		libomp.so
►20.00+	hypre_qsort2abs	par_interp.c:3191	exec
○	hypre_BoomerAMGInterpTruncatio[...]	par_interp.c:2912	exec
○	__kmp_invoke_microtask		libomp.so
►10.00+	hypre_qsort2abs	par_interp.c:3191	exec
○	hypre_qsort2abs	par_interp.c:3191	exec
○	hypre_BoomerAMGInterpTruncatio[...]	par_interp.c:2912	exec
○	__kmp_invoke_microtask		libomp.so

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run 1x1

Source file and lines	par_interp.c:3180-3192
Module	exec

The function is defined in /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/build/AMG/AMG/parcsr_ls/par_interp.c:3180-3192.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 79% of vector register length is used (average across all VPU instructions).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers).

No data for this section

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 64 bytes. The binary function is storing 64 bytes.

General properties

nb instructions	20
loop length	80
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

2.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	1.50	1.50	1.25	1.25	1.17	1.17	1.08	1.08	0.00	0.00	0.00	0.00	2.67	2.67	2.67	2.00	2.00
cycles	1.50	1.50	1.25	1.25	1.17	1.17	1.08	1.08	0.00	0.00	0.00	0.00	2.67	2.67	2.67	2.00	2.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	2.13
Overall L1	2.67

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 2.67 cycles. At this rate:

24% of peak load performance is reached (24.00 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
49% of peak store performance is reached (24.00 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 42c170

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
CMP X2, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 42c254 <hypre_qsort2abs+0xe4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP X29, X30, [SP, #960]!	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X24, X23, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X22, X21, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X20, X19, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ADD X29, SP, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X19, XZR, X3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ORR X22, XZR, X2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ORR X20, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ORR X21, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
B 42c1d4 <hypre_qsort2abs+0x64>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
LDP X20, X19, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
LDP X22, X21, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
LDP X24, X23, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
LDP X29, X30, [SP], #64	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
HINT #0																					N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run 1x1

Source file and lines	par_interp.c:3180-3192
Module	exec

The function is defined in /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/build/AMG/AMG/parcsr_ls/par_interp.c:3180-3192.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 79% of vector register length is used (average across all VPU instructions).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers).

No data for this section

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 64 bytes. The binary function is storing 64 bytes.

General properties

nb instructions	20
loop length	80
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

2.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	1.50	1.50	1.25	1.25	1.17	1.17	1.08	1.08	0.00	0.00	0.00	0.00	2.67	2.67	2.67	2.00	2.00
cycles	1.50	1.50	1.25	1.25	1.17	1.17	1.08	1.08	0.00	0.00	0.00	0.00	2.67	2.67	2.67	2.00	2.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	2.13
Overall L1	2.67

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 2.67 cycles. At this rate:

24% of peak load performance is reached (24.00 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
49% of peak store performance is reached (24.00 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 42c170

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
CMP X2, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 42c254 <hypre_qsort2abs+0xe4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP X29, X30, [SP, #960]!	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X24, X23, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X22, X21, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X20, X19, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ADD X29, SP, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X19, XZR, X3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ORR X22, XZR, X2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ORR X20, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ORR X21, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
B 42c1d4 <hypre_qsort2abs+0x64>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
LDP X20, X19, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
LDP X22, X21, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
LDP X24, X23, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
LDP X29, X30, [SP], #64	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
HINT #0																					N/A

▶Scalability Runs Description

Run 1x1	Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_NUM_THREADS: 1OMP_PLACES: threads
Run 1x2	Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 2OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x4	Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 4OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x8	Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 8OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x16	Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 16OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x24	Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 24OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x32	Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 32OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x40	Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 40OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x48	Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 48OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x56	Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 56OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x64	Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 64OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x72	Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 72OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x80	Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 80OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x88	Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 88OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x96	Number processes: 1Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/run/oneview_runs/multicore/armclang_5/oneview_run_1741633338OMP_NUM_THREADS: 96OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads

(1x1) Efficiency	(1x1) Potential Speed-Up (%)	(1x2) Efficiency	(1x2) Potential Speed-Up (%)	(1x4) Efficiency	(1x4) Potential Speed-Up (%)	(1x8) Efficiency	(1x8) Potential Speed-Up (%)	(1x16) Efficiency	(1x16) Potential Speed-Up (%)	(1x24) Efficiency	(1x24) Potential Speed-Up (%)	(1x32) Efficiency	(1x32) Potential Speed-Up (%)	(1x40) Efficiency	(1x40) Potential Speed-Up (%)	(1x48) Efficiency	(1x48) Potential Speed-Up (%)	(1x56) Efficiency	(1x56) Potential Speed-Up (%)	(1x64) Efficiency	(1x64) Potential Speed-Up (%)	(1x72) Efficiency	(1x72) Potential Speed-Up (%)	(1x80) Efficiency	(1x80) Potential Speed-Up (%)	(1x88) Efficiency	(1x88) Potential Speed-Up (%)	(1x96) Efficiency	(1x96) Potential Speed-Up (%)
1	0	0.99	0	2.34	0	5.04	0	8.79	0	18.29	0	15.84	0	17.95	0	27.24	0	32.56	0	40.92	0	32.85	0	47.06	0	70.36	0	38.11	0

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency

Run	Number of threads	Efficiency (ideal is 1)	Speedup	Ideal Speedup	Time (s)	Coverage (%)
1x1	1	1	1	1	0.029999997466803	0.011276969686151
1x2	2	0.99	0.99	2	0.034999996423721	0.021390030160546
1x4	4	2.34	2.34	4	0.014999998733401	0.016983740031719
1x8	6	5.04	5.04	8	0.015000000596046	0.013488929718733
1x16	9	8.79	8.79	16	0.00999999884516	0.011842205189168
1x24	6	18.29	18.29	24	0.0099999979138374	0.0066240467131138
1x32	11	15.84	15.84	32	0.0049999998882413	0.0083410674706101
1x40	11	17.95	17.95	40	0.0050000003539026	0.0069273635745049
1x48	9	27.24	27.24	48	0.00499999942258	0.0049692359752953
1x56	9	32.56	32.56	56	0.0050000003539026	0.0045737535692751
1x64	8	40.92	40.92	64	0.0049999998882413	0.0037641352973878
1x72	11	32.85	32.85	72	0.0050000003539026	0.0046950927935541
1x80	8	47.06	47.06	80	0.0099999997764826	0.0035611935891211
1x88	6	70.36	70.36	88	0.0050000003539026	0.0021735990885645
1x96	12	38.11	38.11	96	0.0049999998882413	0.0040295124053955

Name	Coverage (%)	Time (s)
▼hypre_qsort2abs–	0.01	0.03
○Loop 494 - par_interp.c:3180-3191 - exec	0.01	0.03

Report Configuration

Vectorization

Details

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Vectorization

Details

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

▶Scalability Runs Description

▼Columns Filter

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency