| Function: hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1 | Module: exec | Source: IJMatrix_parcsr.c:3240-3500 [...] | Coverage (incl. loops): 0.27% | (excl. loops): 0.00% |
|---|
| Function: hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1 | Module: exec | Source: IJMatrix_parcsr.c:3240-3500 [...] | Coverage (incl. loops): 0.27% | (excl. loops): 0.00% |
|---|
/home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/build/AMG/AMG/IJ_mv/IJMatrix_parcsr.c: 3240 - 3500 |
-------------------------------------------------------------------------------- |
3240: #pragma omp parallel |
[...] |
3256: num_threads = hypre_NumActiveThreads(); |
3257: my_thread_num = hypre_GetThreadNum(); |
3258: |
3259: len = nrows/num_threads; |
3260: rest = nrows - len*num_threads; |
3261: |
3262: if (my_thread_num < rest) |
3263: { |
3264: ns = my_thread_num*(len+1); |
3265: ne = (my_thread_num+1)*(len+1); |
3266: } |
3267: else |
3268: { |
3269: ns = my_thread_num*len+rest; |
3270: ne = (my_thread_num+1)*len+rest; |
3271: } |
3272: |
3273: value_start[my_thread_num] = 0; |
3274: for (ii=ns; ii < ne; ii++) |
3275: value_start[my_thread_num] += ncols[ii]; |
3276: |
3277: #ifdef HYPRE_USING_OPENMP |
3278: #pragma omp barrier |
3279: #endif |
3280: if (my_thread_num == 0) |
3281: { |
3282: for (i=0; i < max_num_threads; i++) |
3283: value_start[i+1] += value_start[i]; |
3284: } |
3285: #ifdef HYPRE_USING_OPENMP |
3286: #pragma omp barrier |
3287: #endif |
3288: indx = 0; |
3289: if (my_thread_num) |
3290: indx = value_start[my_thread_num-1]; |
3291: for (ii=ns; ii < ne; ii++) |
3292: { |
3293: row = rows[ii]; |
3294: n = ncols[ii]; |
3295: /* processor owns the row */ |
3296: if (row >= row_partitioning[pstart] && row < row_partitioning[pstart+1]) |
3297: { |
3298: row_local = row - row_partitioning[pstart]; |
3299: /* compute local row number */ |
3300: if (need_aux) |
3301: { |
3302: local_j = aux_j[row_local]; |
3303: local_data = aux_data[row_local]; |
3304: space = row_space[row_local]; |
3305: old_size = row_length[row_local]; |
3306: size = space - old_size; |
3307: if (size < n) |
3308: { |
3309: size = n - size; |
3310: tmp_j = hypre_CTAlloc(HYPRE_Int,size); |
3311: tmp_data = hypre_CTAlloc(HYPRE_Complex,size); |
3312: } |
3313: tmp_indx = 0; |
3314: not_found = 1; |
3315: size = old_size; |
3316: for (i=0; i < n; i++) |
3317: { |
3318: for (j=0; j < old_size; j++) |
3319: { |
3320: if (local_j[j] == cols[indx]) |
3321: { |
3322: local_data[j] = values[indx]; |
[...] |
3329: if (size < space) |
3330: { |
3331: local_j[size] = cols[indx]; |
3332: local_data[size++] = values[indx]; |
3333: } |
3334: else |
3335: { |
3336: tmp_j[tmp_indx] = cols[indx]; |
3337: tmp_data[tmp_indx++] = values[indx]; |
3338: } |
3339: } |
3340: not_found = 1; |
3341: indx++; |
3342: } |
3343: |
3344: row_length[row_local] = size+tmp_indx; |
3345: |
3346: if (tmp_indx) |
3347: { |
3348: aux_j[row_local] = hypre_TReAlloc(aux_j[row_local],HYPRE_Int, |
3349: size+tmp_indx); |
3350: aux_data[row_local] = hypre_TReAlloc(aux_data[row_local], |
3351: HYPRE_Complex,size+tmp_indx); |
3352: row_space[row_local] = size+tmp_indx; |
3353: local_j = aux_j[row_local]; |
[...] |
3359: for (i=0; i < tmp_indx; i++) |
3360: { |
3361: local_j[cnt] = tmp_j[i]; |
3362: local_data[cnt++] = tmp_data[i]; |
3363: } |
3364: |
3365: if (tmp_j) |
3366: { |
3367: hypre_TFree(tmp_j); |
3368: hypre_TFree(tmp_data); |
[...] |
3376: offd_indx = hypre_AuxParCSRMatrixIndxOffd(aux_matrix)[row_local]; |
3377: diag_indx = hypre_AuxParCSRMatrixIndxDiag(aux_matrix)[row_local]; |
3378: cnt_diag = diag_indx; |
3379: cnt_offd = offd_indx; |
3380: diag_space = diag_i[row_local+1]; |
3381: offd_space = offd_i[row_local+1]; |
3382: not_found = 1; |
3383: for (i=0; i < n; i++) |
3384: { |
3385: if (cols[indx] < col_0 || cols[indx] > col_n) |
3386: /* insert into offd */ |
3387: { |
3388: for (j=offd_i[row_local]; j < offd_indx; j++) |
3389: { |
3390: if (offd_j[j] == cols[indx]) |
3391: { |
3392: offd_data[j] = values[indx]; |
3393: not_found = 0; |
3394: break; |
3395: } |
3396: } |
3397: if (not_found) |
3398: { |
3399: if (cnt_offd < offd_space) |
3400: { |
3401: offd_j[cnt_offd] = cols[indx]; |
3402: offd_data[cnt_offd++] = values[indx]; |
3403: } |
3404: else |
3405: { |
3406: hypre_error(HYPRE_ERROR_GENERIC); |
3407: #ifdef HYPRE_USING_OPENMP |
3408: #pragma omp atomic |
3409: #endif |
3410: error_flag++; |
3411: if (print_level) |
3412: hypre_printf("Error in row %d ! Too many elements!\n", |
[...] |
3422: for (j=diag_i[row_local]; j < diag_indx; j++) |
3423: { |
3424: if (diag_j[j] == cols[indx]) |
3425: { |
3426: diag_data[j] = values[indx]; |
3427: not_found = 0; |
3428: break; |
3429: } |
3430: } |
3431: if (not_found) |
3432: { |
3433: if (cnt_diag < diag_space) |
3434: { |
3435: diag_j[cnt_diag] = cols[indx]; |
3436: diag_data[cnt_diag++] = values[indx]; |
3437: } |
3438: else |
3439: { |
3440: hypre_error(HYPRE_ERROR_GENERIC); |
3441: #ifdef HYPRE_USING_OPENMP |
3442: #pragma omp atomic |
3443: #endif |
3444: error_flag++; |
3445: if (print_level) |
3446: hypre_printf("Error in row %d ! Too many elements !\n", |
[...] |
3454: indx++; |
3455: } |
3456: |
3457: hypre_AuxParCSRMatrixIndxDiag(aux_matrix)[row_local] = cnt_diag; |
3458: hypre_AuxParCSRMatrixIndxOffd(aux_matrix)[row_local] = cnt_offd; |
[...] |
3466: indx += n; |
3467: if (aux_matrix) |
3468: { |
3469: col_indx = 0; |
3470: for (i=0; i < off_proc_i_indx; i=i+2) |
3471: { |
3472: row_len = off_proc_i[i+1]; |
3473: if (off_proc_i[i] == row) |
3474: { |
3475: for (j=0; j < n; j++) |
3476: { |
3477: cnt1 = col_indx; |
3478: for (k=0; k < row_len; k++) |
3479: { |
3480: if (off_proc_j[cnt1] == cols[j]) |
3481: { |
3482: off_proc_j[cnt1++] = -1; |
3483: /*cancel_indx++;*/ |
3484: offproc_cnt[my_thread_num]++; |
[...] |
3500: col_indx += row_len; |
0x51f280 STP X29, X30, [SP, #688]! |
0x51f284 ADD X29, SP, #0 |
0x51f288 ORR X12, XZR, X0 |
0x51f28c STP X19, X20, [SP, #16] |
0x51f290 STP X21, X22, [SP, #32] |
0x51f294 STP X23, X24, [SP, #48] |
0x51f298 STP X25, X26, [SP, #64] |
0x51f29c STP X27, X28, [SP, #80] |
0x51f2a0 LDP X22, X0, [X0] |
0x51f2a4 STR X0, [SP, #120] |
0x51f2a8 LDP X1, X28, [X12, #16] |
0x51f2ac STR X1, [SP, #128] |
0x51f2b0 LDP X5, X2, [X12, #32] |
0x51f2b4 STR X2, [SP, #144] |
0x51f2b8 STR X5, [SP, #264] |
0x51f2bc LDP X3, X8, [X12, #48] |
0x51f2c0 STR X3, [SP, #136] |
0x51f2c4 STR X8, [SP, #256] |
0x51f2c8 LDP X7, X4, [X12, #64] |
0x51f2cc STR X4, [SP, #208] |
0x51f2d0 STR X7, [SP, #248] |
0x51f2d4 LDP X6, X9, [X12, #80] |
0x51f2d8 STR X9, [SP, #184] |
0x51f2dc STR X6, [SP, #200] |
0x51f2e0 LDP X10, X11, [X12, #96] |
0x51f2e4 STR X11, [SP, #176] |
0x51f2e8 STR X10, [SP, #216] |
0x51f2ec LDP X13, X24, [X12, #112] |
0x51f2f0 STR X13, [SP, #192] |
0x51f2f4 LDP X14, X15, [X12, #128] |
0x51f2f8 STP X14, X15, [SP, #232] |
0x51f2fc LDP X23, X16, [X12, #144] |
0x51f300 STR X16, [SP, #224] |
0x51f304 LDP X17, X18, [X12, #160] |
0x51f308 STR X17, [SP, #112] |
0x51f30c STR X18, [SP, #152] |
0x51f310 LDP X19, X20, [X12, #176] |
0x51f314 STP X19, X20, [SP, #160] |
0x51f318 LDP X25, X26, [X12, #208] |
0x51f31c LDP X21, X20, [X12, #192] |
0x51f320 STR X12, [SP, #104] |
0x51f324 STR X25, [SP, #280] |
0x51f328 BL 5499a0 |
0x51f32c ORR X27, XZR, X0 |
0x51f330 BL 5499c0 |
0x51f334 SDIV X1, X22, X27 |
0x51f338 LDR X12, [SP, #104] |
0x51f33c ORR X25, XZR, X0 |
0x51f340 LDP X6, X7, [SP, #240] |
0x51f344 LDP X8, X5, [SP, #256] |
0x51f348 MSUB X22, X1, X27, X22 |
0x51f34c CMP X0, X22 |
0x51f350 B.GE 520200 |
0x51f354 MADD X27, X1, X0, X0 |
0x51f358 ADD X2, X1, #1 |
0x51f35c UBFM X19, X25, #61, #60 |
0x51f360 ADD X22, X21, X25,LSL #3 |
0x51f364 STR XZR, [X21, X19] |
0x51f368 ADD X3, X2, X27 |
0x51f36c STR X3, [SP, #104] |
0x51f370 CMP X27, X3 |
0x51f374 B.GE 520228 |
0x51f378 LDR X4, [SP, #120] |
0x51f37c MOVZ X0, #0 |
0x51f380 ADD X1, X4, X27,LSL #3 |
0x51f384 ADD X9, X4, X3,LSL #3 |
0x51f388 SUB X10, X9, X1 |
0x51f38c SUB X11, X10, #8 |
0x51f390 UBFM X13, X11, #3, #63 |
0x51f394 ADD X14, X13, #1 |
0x51f398 ANDS X15, X14, #4224 |
0x51f39c B.EQ 51f420 |
0x51f3a0 CMP X15, #1 |
0x51f3a4 B.EQ 51f40c |
0x51f3a8 CMP X15, #2 |
0x51f3ac B.EQ 51f400 |
0x51f3b0 CMP X15, #3 |
0x51f3b4 B.EQ 51f3f4 |
0x51f3b8 CMP X15, #4 |
0x51f3bc B.EQ 51f3e8 |
0x51f3c0 CMP X15, #5 |
0x51f3c4 B.EQ 51f3dc |
0x51f3c8 CMP X15, #6 |
0x51f3cc B.NE 520380 |
0x51f3d0 LDR X16, [X1], #8 |
0x51f3d4 ADD X0, X0, X16 |
0x51f3d8 STR X0, [X22] |
0x51f3dc LDR X17, [X1], #8 |
0x51f3e0 ADD X0, X0, X17 |
0x51f3e4 STR X0, [X22] |
0x51f3e8 LDR X18, [X1], #8 |
0x51f3ec ADD X0, X0, X18 |
0x51f3f0 STR X0, [X22] |
0x51f3f4 LDR X30, [X1], #8 |
0x51f3f8 ADD X0, X0, X30 |
0x51f3fc STR X0, [X22] |
0x51f400 LDR X2, [X1], #8 |
0x51f404 ADD X0, X0, X2 |
0x51f408 STR X0, [X22] |
0x51f40c LDR X3, [X1], #8 |
0x51f410 ADD X0, X0, X3 |
0x51f414 STR X0, [X22] |
0x51f418 CMP X1, X9 |
0x51f41c B.EQ 51f490 |
(3582) 0x51f420 ORR X10, XZR, X1 |
(3582) 0x51f424 ADD X1, X1, #64 |
(3582) 0x51f428 LDR X4, [X10], #8 |
(3582) 0x51f42c ADD X11, X0, X4 |
(3582) 0x51f430 STR X11, [X22] |
(3582) 0x51f434 LDUR X13, [X1, #456] |
(3582) 0x51f438 ADD X14, X11, X13 |
(3582) 0x51f43c STR X14, [X22] |
(3582) 0x51f440 LDR X15, [X10, #8] |
(3582) 0x51f444 ADD X16, X14, X15 |
(3582) 0x51f448 STR X16, [X22] |
(3582) 0x51f44c LDUR X17, [X1, #472] |
(3582) 0x51f450 ADD X18, X16, X17 |
(3582) 0x51f454 STR X18, [X22] |
(3582) 0x51f458 LDUR X30, [X1, #480] |
(3582) 0x51f45c ADD X3, X18, X30 |
(3582) 0x51f460 STR X3, [X22] |
(3582) 0x51f464 LDUR X2, [X1, #488] |
(3582) 0x51f468 ADD X0, X3, X2 |
(3582) 0x51f46c STR X0, [X22] |
(3582) 0x51f470 LDUR X10, [X1, #496] |
(3582) 0x51f474 ADD X4, X0, X10 |
(3582) 0x51f478 STR X4, [X22] |
(3582) 0x51f47c LDUR X11, [X1, #504] |
(3582) 0x51f480 ADD X0, X4, X11 |
(3582) 0x51f484 STR X0, [X22] |
(3582) 0x51f488 CMP X1, X9 |
(3582) 0x51f48c B.NE 51f420 |
0x51f490 STP X6, X7, [SP, #240] |
0x51f494 STP X8, X5, [SP, #256] |
0x51f498 STR X12, [SP, #272] |
0x51f49c BL 410880 |
0x51f4a0 LDR X12, [SP, #272] |
0x51f4a4 LDP X9, X7, [SP, #240] |
0x51f4a8 LDP X8, X5, [SP, #256] |
0x51f4ac CBNZ X25, 5202e0 |
0x51f4b0 CMP X26, #0 |
0x51f4b4 B.LE 51f5c8 |
0x51f4b8 ORR X1, XZR, X21 |
0x51f4bc UBFM X21, X26, #61, #60 |
0x51f4c0 SUB X25, X21, #8 |
0x51f4c4 LDR X0, [X1], #8 |
0x51f4c8 UBFM X6, X25, #3, #63 |
0x51f4cc ADD X22, X6, #1 |
0x51f4d0 ANDS X13, X22, #4224 |
0x51f4d4 ADD X26, X1, X26,LSL #3 |
0x51f4d8 B.EQ 51f568 |
0x51f4dc CMP X13, #1 |
0x51f4e0 B.EQ 51f554 |
0x51f4e4 CMP X13, #2 |
0x51f4e8 B.EQ 51f548 |
0x51f4ec CMP X13, #3 |
0x51f4f0 B.EQ 51f53c |
0x51f4f4 CMP X13, #4 |
0x51f4f8 B.EQ 51f530 |
0x51f4fc CMP X13, #5 |
0x51f500 B.EQ 51f524 |
0x51f504 CMP X13, #6 |
0x51f508 B.EQ 51f518 |
0x51f50c LDR X14, [X1] |
0x51f510 ADD X0, X0, X14 |
0x51f514 STR X0, [X1], #8 |
0x51f518 LDR X15, [X1] |
0x51f51c ADD X0, X0, X15 |
0x51f520 STR X0, [X1], #8 |
0x51f524 LDR X16, [X1] |
0x51f528 ADD X0, X0, X16 |
0x51f52c STR X0, [X1], #8 |
0x51f530 LDR X17, [X1] |
0x51f534 ADD X0, X0, X17 |
0x51f538 STR X0, [X1], #8 |
0x51f53c LDR X18, [X1] |
0x51f540 ADD X0, X0, X18 |
0x51f544 STR X0, [X1], #8 |
0x51f548 LDR X30, [X1] |
0x51f54c ADD X0, X0, X30 |
0x51f550 STR X0, [X1], #8 |
0x51f554 LDR X3, [X1] |
0x51f558 ADD X0, X0, X3 |
0x51f55c STR X0, [X1], #8 |
0x51f560 CMP X26, X1 |
0x51f564 B.EQ 51f5c8 |
(3600) 0x51f568 LDR X10, [X1] |
(3600) 0x51f56c ORR X2, XZR, X1 |
(3600) 0x51f570 ADD X11, X0, X10 |
(3600) 0x51f574 STR X11, [X2], #8 |
(3600) 0x51f578 LDR X4, [X1, #8] |
(3600) 0x51f57c ADD X21, X11, X4 |
(3600) 0x51f580 STR X21, [X1, #8] |
(3600) 0x51f584 LDR X25, [X2, #8] |
(3600) 0x51f588 ADD X6, X21, X25 |
(3600) 0x51f58c STR X6, [X2, #8] |
(3600) 0x51f590 LDP X22, X13, [X1, #24] |
(3600) 0x51f594 LDP X15, X16, [X1, #40] |
(3600) 0x51f598 ADD X1, X1, #64 |
(3600) 0x51f59c ADD X14, X6, X22 |
(3600) 0x51f5a0 ADD X17, X14, X13 |
(3600) 0x51f5a4 LDUR X3, [X1, #504] |
(3600) 0x51f5a8 ADD X18, X17, X15 |
(3600) 0x51f5ac STP X14, X17, [X1, #984] |
(3600) 0x51f5b0 ADD X30, X18, X16 |
(3600) 0x51f5b4 STP X18, X30, [X1, #1000] |
(3600) 0x51f5b8 ADD X0, X30, X3 |
(3600) 0x51f5bc STUR X0, [X1, #504] |
(3600) 0x51f5c0 CMP X26, X1 |
(3600) 0x51f5c4 B.NE 51f568 |
0x51f5c8 STP X9, X7, [SP, #240] |
0x51f5cc MOVZ X21, #0 |
0x51f5d0 STP X8, X5, [SP, #256] |
0x51f5d4 STR X12, [SP, #272] |
0x51f5d8 BL 410880 |
0x51f5dc LDR X12, [SP, #272] |
0x51f5e0 LDP X11, X7, [SP, #240] |
0x51f5e4 LDP X8, X5, [SP, #256] |
0x51f5e8 LDR X9, [SP, #104] |
0x51f5ec CMP X27, X9 |
0x51f5f0 B.GE 51f880 |
0x51f5f4 LDR X0, [SP, #152] |
0x51f5f8 MOVZ X9, #0 |
0x51f5fc MOVN X22, #0 |
0x51f600 ORR X26, XZR, X5 |
0x51f604 LDR X2, [SP, #112] |
0x51f608 LDR X10, [SP, #136] |
0x51f60c SUB X4, X0, #1 |
0x51f610 LDR X14, [SP, #160] |
0x51f614 UBFM X6, X4, #1, #63 |
0x51f618 LDR X5, [SP, #224] |
0x51f61c ADD X25, X10, X2,LSL #3 |
0x51f620 STR X12, [SP, #224] |
0x51f624 ADD X15, X14, #16 |
0x51f628 ADD X18, X25, #8 |
0x51f62c ADD X4, X15, X6,LSL #4 |
0x51f630 STR X25, [SP, #136] |
0x51f634 HINT #0 |
0x51f638 HINT #0 |
0x51f63c HINT #0 |
(3583) 0x51f640 LDR X30, [SP, #136] |
(3583) 0x51f644 LDP X16, X17, [SP, #120] |
(3583) 0x51f648 LDR X3, [X30] |
(3583) 0x51f64c LDR X25, [X17, X27,LSL #3] |
(3583) 0x51f650 LDR X12, [X16, X27,LSL #3] |
(3583) 0x51f654 CMP X25, X3 |
(3583) 0x51f658 B.LT 51fa18 |
(3583) 0x51f65c LDR X1, [X18] |
(3583) 0x51f660 CMP X25, X1 |
(3583) 0x51f664 B.GE 51fa18 |
(3583) 0x51f668 LDR X16, [SP, #176] |
(3583) 0x51f66c SUB X30, X25, X3 |
(3583) 0x51f670 UBFM X13, X30, #61, #60 |
(3583) 0x51f674 CBNZ X16, 51fd58 |
(3593) 0x51f678 LDR X1, [SP, #144] |
(3593) 0x51f67c ADD X17, X13, #8 |
(3593) 0x51f680 ADD X16, X21, X12 |
(3593) 0x51f684 LDR X15, [SP, #192] |
(3593) 0x51f688 LDR X30, [X11, X17] |
(3593) 0x51f68c ADD X0, X1, #56 |
(3593) 0x51f690 LDP X10, X2, [X0] |
(3593) 0x51f694 LDR X17, [X15, X17] |
(3593) 0x51f698 ADD X1, X2, X13 |
(3593) 0x51f69c ADD X0, X10, X13 |
(3593) 0x51f6a0 LDR X2, [X2, X13] |
(3593) 0x51f6a4 LDR X3, [X10, X13] |
(3593) 0x51f6a8 ORR X14, XZR, X2 |
(3593) 0x51f6ac ORR X15, XZR, X3 |
(3593) 0x51f6b0 CMP X12, #0 |
(3593) 0x51f6b4 B.LE 520610 |
(3593) 0x51f6b8 LDR X10, [SP, #192] |
(3593) 0x51f6bc ORR X6, XZR, X0 |
(3593) 0x51f6c0 STP X25, X1, [SP, #240] |
(3593) 0x51f6c4 LDR X12, [SP, #232] |
(3596) 0x51f6c8 LDR X1, [X28, X21,LSL #3] |
(3596) 0x51f6cc CMP X8, X1 |
(3596) 0x51f6d0 CCMP X7, X1, #1, #13 |
(3596) 0x51f6d4 B.GE 51f89c |
(3596) 0x51f6d8 LDR X0, [X11, X13] |
(3596) 0x51f6dc CMP X2, X0 |
(3596) 0x51f6e0 B.LE 51f834 |
(3596) 0x51f6e4 SUB X25, X2, X0 |
(3596) 0x51f6e8 ANDS X25, X25, #4224 |
(3596) 0x51f6ec B.EQ 51f798 |
(3596) 0x51f6f0 CMP X25, #1 |
(3596) 0x51f6f4 B.EQ 51f780 |
(3596) 0x51f6f8 CMP X25, #2 |
(3596) 0x51f6fc B.EQ 51f770 |
(3596) 0x51f700 CMP X25, #3 |
(3596) 0x51f704 B.EQ 51f760 |
(3596) 0x51f708 CMP X25, #4 |
(3596) 0x51f70c B.EQ 51f750 |
(3596) 0x51f710 CMP X25, #5 |
(3596) 0x51f714 B.EQ 51f740 |
(3596) 0x51f718 CMP X25, #6 |
(3596) 0x51f71c B.EQ 51f730 |
(3596) 0x51f720 LDR X25, [X23, X0,LSL #3] |
(3596) 0x51f724 CMP X1, X25 |
(3596) 0x51f728 B.EQ 51fd38 |
(3596) 0x51f72c ADD X0, X0, #1 |
(3596) 0x51f730 LDR X25, [X23, X0,LSL #3] |
(3596) 0x51f734 CMP X1, X25 |
(3596) 0x51f738 B.EQ 51fd38 |
(3596) 0x51f73c ADD X0, X0, #1 |
(3596) 0x51f740 LDR X25, [X23, X0,LSL #3] |
(3596) 0x51f744 CMP X1, X25 |
(3596) 0x51f748 B.EQ 51fd38 |
(3596) 0x51f74c ADD X0, X0, #1 |
(3596) 0x51f750 LDR X25, [X23, X0,LSL #3] |
(3596) 0x51f754 CMP X1, X25 |
(3596) 0x51f758 B.EQ 51fd38 |
(3596) 0x51f75c ADD X0, X0, #1 |
(3596) 0x51f760 LDR X25, [X23, X0,LSL #3] |
(3596) 0x51f764 CMP X1, X25 |
(3596) 0x51f768 B.EQ 51fd38 |
(3596) 0x51f76c ADD X0, X0, #1 |
(3596) 0x51f770 LDR X25, [X23, X0,LSL #3] |
(3596) 0x51f774 CMP X1, X25 |
(3596) 0x51f778 B.EQ 51fd38 |
(3596) 0x51f77c ADD X0, X0, #1 |
(3596) 0x51f780 LDR X25, [X23, X0,LSL #3] |
(3596) 0x51f784 CMP X1, X25 |
(3596) 0x51f788 B.EQ 51fd38 |
(3596) 0x51f78c ADD X0, X0, #1 |
(3596) 0x51f790 CMP X2, X0 |
(3596) 0x51f794 B.EQ 51f834 |
(3596) 0x51f798 ORR X25, XZR, X9 |
(3596) 0x51f79c STR X3, [SP, #112] |
(3597) 0x51f7a0 LDR X9, [X23, X0,LSL #3] |
(3597) 0x51f7a4 CMP X1, X9 |
(3597) 0x51f7a8 B.EQ 51fd30 |
(3597) 0x51f7ac ADD X0, X0, #1 |
(3597) 0x51f7b0 LDR X3, [X23, X0,LSL #3] |
(3597) 0x51f7b4 ORR X9, XZR, X0 |
(3597) 0x51f7b8 CMP X1, X3 |
(3597) 0x51f7bc B.EQ 51fd30 |
(3597) 0x51f7c0 ADD X0, X0, #1 |
(3597) 0x51f7c4 LDR X3, [X23, X0,LSL #3] |
(3597) 0x51f7c8 CMP X1, X3 |
(3597) 0x51f7cc B.EQ 51fd30 |
(3597) 0x51f7d0 ADD X0, X9, #2 |
(3597) 0x51f7d4 LDR X3, [X23, X0,LSL #3] |
(3597) 0x51f7d8 CMP X1, X3 |
(3597) 0x51f7dc B.EQ 51fd30 |
(3597) 0x51f7e0 ADD X0, X9, #3 |
(3597) 0x51f7e4 LDR X3, [X23, X0,LSL #3] |
(3597) 0x51f7e8 CMP X1, X3 |
(3597) 0x51f7ec B.EQ 51fd30 |
(3597) 0x51f7f0 ADD X0, X9, #4 |
(3597) 0x51f7f4 LDR X3, [X23, X0,LSL #3] |
(3597) 0x51f7f8 CMP X1, X3 |
(3597) 0x51f7fc B.EQ 51fd30 |
(3597) 0x51f800 ADD X0, X9, #5 |
(3597) 0x51f804 LDR X3, [X23, X0,LSL #3] |
(3597) 0x51f808 CMP X1, X3 |
(3597) 0x51f80c B.EQ 51fd30 |
(3597) 0x51f810 ADD X0, X9, #6 |
(3597) 0x51f814 LDR X3, [X23, X0,LSL #3] |
(3597) 0x51f818 CMP X1, X3 |
(3597) 0x51f81c B.EQ 51fd30 |
(3597) 0x51f820 ADD X0, X9, #7 |
(3597) 0x51f824 CMP X2, X0 |
(3597) 0x51f828 B.NE 51f7a0 |
(3596) 0x51f82c LDR X3, [SP, #112] |
(3596) 0x51f830 ORR X9, XZR, X25 |
(3596) 0x51f834 CMP X30, X14 |
(3596) 0x51f838 B.LE 520304 |
(3596) 0x51f83c LDR D1, [X26, X21,LSL #3] |
(3596) 0x51f840 UBFM X25, X14, #61, #60 |
(3596) 0x51f844 ADD X14, X14, #1 |
(3596) 0x51f848 STR X1, [X23, X25] |
(3596) 0x51f84c STR D1, [X5, X25] |
(3596) 0x51f850 ADD X21, X21, #1 |
(3596) 0x51f854 CMP X21, X16 |
(3596) 0x51f858 B.NE 51f6c8 |
(3593) 0x51f85c LDR X1, [SP, #248] |
(3593) 0x51f860 ORR X0, XZR, X6 |
(3593) 0x51f864 STR X15, [X0] |
(3593) 0x51f868 ADD X27, X27, #1 |
(3593) 0x51f86c ORR X21, XZR, X16 |
(3593) 0x51f870 LDR X12, [SP, #104] |
(3593) 0x51f874 STR X14, [X1] |
(3593) 0x51f878 CMP X12, X27 |
(3593) 0x51f87c B.NE 51f640 |
(3598) 0x51f880 LDP X19, X20, [SP, #16] |
(3598) 0x51f884 LDP X21, X22, [SP, #32] |
(3598) 0x51f888 LDP X23, X24, [SP, #48] |
(3598) 0x51f88c LDP X25, X26, [SP, #64] |
(3598) 0x51f890 LDP X27, X28, [SP, #80] |
(3598) 0x51f894 LDP X29, X30, [SP], #336 |
(3598) 0x51f898 RET |
(3594) 0x51f89c LDR X0, [X10, X13] |
(3594) 0x51f8a0 CMP X3, X0 |
(3594) 0x51f8a4 B.LE 51f9f8 |
(3594) 0x51f8a8 SUB X25, X3, X0 |
(3594) 0x51f8ac ANDS X25, X25, #4224 |
(3594) 0x51f8b0 B.EQ 51f95c |
(3594) 0x51f8b4 CMP X25, #1 |
(3594) 0x51f8b8 B.EQ 51f944 |
(3594) 0x51f8bc CMP X25, #2 |
(3594) 0x51f8c0 B.EQ 51f934 |
(3594) 0x51f8c4 CMP X25, #3 |
(3594) 0x51f8c8 B.EQ 51f924 |
(3594) 0x51f8cc CMP X25, #4 |
(3594) 0x51f8d0 B.EQ 51f914 |
(3594) 0x51f8d4 CMP X25, #5 |
(3594) 0x51f8d8 B.EQ 51f904 |
(3594) 0x51f8dc CMP X25, #6 |
(3594) 0x51f8e0 B.EQ 51f8f4 |
(3594) 0x51f8e4 LDR X25, [X24, X0,LSL #3] |
(3594) 0x51f8e8 CMP X1, X25 |
(3594) 0x51f8ec B.EQ 51fd4c |
(3594) 0x51f8f0 ADD X0, X0, #1 |
(3594) 0x51f8f4 LDR X25, [X24, X0,LSL #3] |
(3594) 0x51f8f8 CMP X1, X25 |
(3594) 0x51f8fc B.EQ 51fd4c |
(3594) 0x51f900 ADD X0, X0, #1 |
(3594) 0x51f904 LDR X25, [X24, X0,LSL #3] |
(3594) 0x51f908 CMP X1, X25 |
(3594) 0x51f90c B.EQ 51fd4c |
(3594) 0x51f910 ADD X0, X0, #1 |
(3594) 0x51f914 LDR X25, [X24, X0,LSL #3] |
(3594) 0x51f918 CMP X1, X25 |
(3594) 0x51f91c B.EQ 51fd4c |
(3594) 0x51f920 ADD X0, X0, #1 |
(3594) 0x51f924 LDR X25, [X24, X0,LSL #3] |
(3594) 0x51f928 CMP X1, X25 |
(3594) 0x51f92c B.EQ 51fd4c |
(3594) 0x51f930 ADD X0, X0, #1 |
(3594) 0x51f934 LDR X25, [X24, X0,LSL #3] |
(3594) 0x51f938 CMP X1, X25 |
(3594) 0x51f93c B.EQ 51fd4c |
(3594) 0x51f940 ADD X0, X0, #1 |
(3594) 0x51f944 LDR X25, [X24, X0,LSL #3] |
(3594) 0x51f948 CMP X1, X25 |
(3594) 0x51f94c B.EQ 51fd4c |
(3594) 0x51f950 ADD X0, X0, #1 |
(3594) 0x51f954 CMP X3, X0 |
(3594) 0x51f958 B.EQ 51f9f8 |
(3594) 0x51f95c ORR X25, XZR, X9 |
(3594) 0x51f960 STR X2, [SP, #112] |
(3599) 0x51f964 LDR X9, [X24, X0,LSL #3] |
(3599) 0x51f968 CMP X1, X9 |
(3599) 0x51f96c B.EQ 51fd44 |
(3599) 0x51f970 ADD X0, X0, #1 |
(3599) 0x51f974 LDR X2, [X24, X0,LSL #3] |
(3599) 0x51f978 ORR X9, XZR, X0 |
(3599) 0x51f97c CMP X1, X2 |
(3599) 0x51f980 B.EQ 51fd44 |
(3599) 0x51f984 ADD X0, X0, #1 |
(3599) 0x51f988 LDR X2, [X24, X0,LSL #3] |
(3599) 0x51f98c CMP X1, X2 |
(3599) 0x51f990 B.EQ 51fd44 |
(3599) 0x51f994 ADD X0, X9, #2 |
(3599) 0x51f998 LDR X2, [X24, X0,LSL #3] |
(3599) 0x51f99c CMP X1, X2 |
(3599) 0x51f9a0 B.EQ 51fd44 |
(3599) 0x51f9a4 ADD X0, X9, #3 |
(3599) 0x51f9a8 LDR X2, [X24, X0,LSL #3] |
(3599) 0x51f9ac CMP X1, X2 |
(3599) 0x51f9b0 B.EQ 51fd44 |
(3599) 0x51f9b4 ADD X0, X9, #4 |
(3599) 0x51f9b8 LDR X2, [X24, X0,LSL #3] |
(3599) 0x51f9bc CMP X1, X2 |
(3599) 0x51f9c0 B.EQ 51fd44 |
(3599) 0x51f9c4 ADD X0, X9, #5 |
(3599) 0x51f9c8 LDR X2, [X24, X0,LSL #3] |
(3599) 0x51f9cc CMP X1, X2 |
(3599) 0x51f9d0 B.EQ 51fd44 |
(3599) 0x51f9d4 ADD X0, X9, #6 |
(3599) 0x51f9d8 LDR X2, [X24, X0,LSL #3] |
(3599) 0x51f9dc CMP X1, X2 |
(3599) 0x51f9e0 B.EQ 51fd44 |
(3599) 0x51f9e4 ADD X0, X9, #7 |
(3599) 0x51f9e8 CMP X3, X0 |
(3599) 0x51f9ec B.NE 51f964 |
(3594) 0x51f9f0 LDR X2, [SP, #112] |
(3594) 0x51f9f4 ORR X9, XZR, X25 |
(3594) 0x51f9f8 CMP X17, X15 |
(3594) 0x51f9fc B.LE 520570 |
(3594) 0x51fa00 LDR D31, [X26, X21,LSL #3] |
(3594) 0x51fa04 UBFM X0, X15, #61, #60 |
(3594) 0x51fa08 ADD X15, X15, #1 |
(3594) 0x51fa0c STR X1, [X24, X0] |
(3594) 0x51fa10 STR D31, [X12, X0] |
(3594) 0x51fa14 B 51f850 |
(3583) 0x51fa18 LDR X2, [SP, #144] |
(3583) 0x51fa1c CBNZ X2, 51fa50 |
(3584) 0x51fa20 ADD X21, X21, X12 |
(3584) 0x51fa24 LDR X12, [SP, #104] |
(3584) 0x51fa28 ADD X27, X27, #1 |
(3584) 0x51fa2c CMP X12, X27 |
(3584) 0x51fa30 B.NE 51f640 |
(3584) 0x51fa34 LDP X19, X20, [SP, #16] |
(3584) 0x51fa38 LDP X21, X22, [SP, #32] |
(3584) 0x51fa3c LDP X23, X24, [SP, #48] |
(3584) 0x51fa40 LDP X25, X26, [SP, #64] |
(3584) 0x51fa44 LDP X27, X28, [SP, #80] |
(3584) 0x51fa48 LDP X29, X30, [SP], #336 |
(3584) 0x51fa4c RET |
(3584) 0x51fa50 LDR X10, [SP, #152] |
(3584) 0x51fa54 CMP X10, #0 |
(3584) 0x51fa58 B.LE 51fa20 |
(3584) 0x51fa5c LDP X2, X0, [SP, #160] |
(3584) 0x51fa60 ADD X15, X28, X12,LSL #3 |
(3584) 0x51fa64 MOVZ X14, #0 |
(3584) 0x51fa68 B 51fa78 |
(3585) 0x51fa6c ADD X2, X2, #16 |
(3585) 0x51fa70 CMP X4, X2 |
(3585) 0x51fa74 B.EQ 51fa20 |
(3585) 0x51fa78 LDP X13, X16, [X2] |
(3585) 0x51fa7c ORR X6, XZR, X14 |
(3585) 0x51fa80 ADD X14, X14, X16 |
(3585) 0x51fa84 CMP X25, X13 |
(3585) 0x51fa88 B.NE 51fa6c |
(3585) 0x51fa8c CMP X12, #0 |
(3585) 0x51fa90 B.LE 51fa6c |
(3585) 0x51fa94 CMP X16, #0 |
(3585) 0x51fa98 B.LE 51fa6c |
(3585) 0x51fa9c ADD X10, X0, X6,LSL #3 |
(3585) 0x51faa0 ORR X3, XZR, X28 |
(3585) 0x51faa4 ADD X6, X0, X14,LSL #3 |
(3587) 0x51faa8 SUB X30, X6, X10 |
(3587) 0x51faac ORR X1, XZR, X10 |
(3587) 0x51fab0 SUB X13, X30, #8 |
(3587) 0x51fab4 UBFM X16, X13, #3, #63 |
(3587) 0x51fab8 ADD X17, X16, #1 |
(3587) 0x51fabc ANDS X30, X17, #4224 |
(3587) 0x51fac0 B.EQ 51fb98 |
(3587) 0x51fac4 CMP X30, #1 |
(3587) 0x51fac8 B.EQ 51fb6c |
(3587) 0x51facc CMP X30, #2 |
(3587) 0x51fad0 B.EQ 51fb58 |
(3587) 0x51fad4 CMP X30, #3 |
(3587) 0x51fad8 B.EQ 51fb44 |
(3587) 0x51fadc CMP X30, #4 |
(3587) 0x51fae0 B.EQ 51fb30 |
(3587) 0x51fae4 CMP X30, #5 |
(3587) 0x51fae8 B.EQ 51fb1c |
(3587) 0x51faec CMP X30, #6 |
(3587) 0x51faf0 B.EQ 51fb08 |
(3587) 0x51faf4 LDR X13, [X3] |
(3587) 0x51faf8 LDR X1, [X10] |
(3587) 0x51fafc CMP X13, X1 |
(3587) 0x51fb00 B.EQ 51fd1c |
(3587) 0x51fb04 ADD X1, X10, #8 |
(3587) 0x51fb08 LDR X30, [X1] |
(3587) 0x51fb0c LDR X13, [X3] |
(3587) 0x51fb10 CMP X13, X30 |
(3587) 0x51fb14 B.EQ 51fd08 |
(3587) 0x51fb18 ADD X1, X1, #8 |
(3587) 0x51fb1c LDR X30, [X1] |
(3587) 0x51fb20 LDR X13, [X3] |
(3587) 0x51fb24 CMP X13, X30 |
(3587) 0x51fb28 B.EQ 51fcf4 |
(3587) 0x51fb2c ADD X1, X1, #8 |
(3587) 0x51fb30 LDR X30, [X1] |
(3587) 0x51fb34 LDR X13, [X3] |
(3587) 0x51fb38 CMP X13, X30 |
(3587) 0x51fb3c B.EQ 51fce0 |
(3587) 0x51fb40 ADD X1, X1, #8 |
(3587) 0x51fb44 LDR X30, [X1] |
(3587) 0x51fb48 LDR X13, [X3] |
(3587) 0x51fb4c CMP X13, X30 |
(3587) 0x51fb50 B.EQ 51fccc |
(3587) 0x51fb54 ADD X1, X1, #8 |
(3587) 0x51fb58 LDR X30, [X1] |
(3587) 0x51fb5c LDR X13, [X3] |
(3587) 0x51fb60 CMP X13, X30 |
(3587) 0x51fb64 B.EQ 51fcb8 |
(3587) 0x51fb68 ADD X1, X1, #8 |
(3587) 0x51fb6c LDR X30, [X1] |
(3587) 0x51fb70 LDR X13, [X3] |
(3587) 0x51fb74 CMP X13, X30 |
(3587) 0x51fb78 B.NE 51fb8c |
(3587) 0x51fb7c STR X22, [X1] |
(3587) 0x51fb80 LDR X16, [X20, X19] |
(3587) 0x51fb84 ADD X17, X16, #1 |
(3587) 0x51fb88 STR X17, [X20, X19] |
(3587) 0x51fb8c ADD X1, X1, #8 |
(3587) 0x51fb90 CMP X1, X6 |
(3587) 0x51fb94 B.EQ 51fca8 |
(3586) 0x51fb98 LDR X30, [X1] |
(3586) 0x51fb9c LDR X13, [X3] |
(3586) 0x51fba0 CMP X13, X30 |
(3586) 0x51fba4 B.NE 51fbb8 |
(3586) 0x51fba8 STR X22, [X1] |
(3586) 0x51fbac LDR X16, [X20, X19] |
(3586) 0x51fbb0 ADD X17, X16, #1 |
(3586) 0x51fbb4 STR X17, [X20, X19] |
(3586) 0x51fbb8 LDR X16, [X3] |
(3586) 0x51fbbc ADD X30, X1, #8 |
(3586) 0x51fbc0 LDR X13, [X1, #8] |
(3586) 0x51fbc4 CMP X16, X13 |
(3586) 0x51fbc8 B.NE 51fbdc |
(3586) 0x51fbcc STR X22, [X1, #8] |
(3586) 0x51fbd0 LDR X1, [X20, X19] |
(3586) 0x51fbd4 ADD X17, X1, #1 |
(3586) 0x51fbd8 STR X17, [X20, X19] |
(3586) 0x51fbdc LDR X13, [X3] |
(3586) 0x51fbe0 LDR X16, [X30, #8] |
(3586) 0x51fbe4 CMP X13, X16 |
(3586) 0x51fbe8 B.NE 51fbfc |
(3586) 0x51fbec STR X22, [X30, #8] |
(3586) 0x51fbf0 LDR X1, [X20, X19] |
(3586) 0x51fbf4 ADD X17, X1, #1 |
(3586) 0x51fbf8 STR X17, [X20, X19] |
(3586) 0x51fbfc LDR X13, [X3] |
(3586) 0x51fc00 LDR X16, [X30, #16] |
(3586) 0x51fc04 CMP X13, X16 |
(3586) 0x51fc08 B.NE 51fc1c |
(3586) 0x51fc0c STR X22, [X30, #16] |
(3586) 0x51fc10 LDR X1, [X20, X19] |
(3586) 0x51fc14 ADD X17, X1, #1 |
(3586) 0x51fc18 STR X17, [X20, X19] |
(3586) 0x51fc1c LDR X13, [X3] |
(3586) 0x51fc20 LDR X16, [X30, #24] |
(3586) 0x51fc24 CMP X13, X16 |
(3586) 0x51fc28 B.NE 51fc3c |
(3586) 0x51fc2c STR X22, [X30, #24] |
(3586) 0x51fc30 LDR X1, [X20, X19] |
(3586) 0x51fc34 ADD X17, X1, #1 |
(3586) 0x51fc38 STR X17, [X20, X19] |
(3586) 0x51fc3c LDR X13, [X3] |
(3586) 0x51fc40 LDR X16, [X30, #32] |
(3586) 0x51fc44 CMP X13, X16 |
(3586) 0x51fc48 B.NE 51fc5c |
(3586) 0x51fc4c STR X22, [X30, #32] |
(3586) 0x51fc50 LDR X1, [X20, X19] |
(3586) 0x51fc54 ADD X17, X1, #1 |
(3586) 0x51fc58 STR X17, [X20, X19] |
(3586) 0x51fc5c LDR X13, [X3] |
(3586) 0x51fc60 LDR X16, [X30, #40] |
(3586) 0x51fc64 CMP X13, X16 |
(3586) 0x51fc68 B.NE 51fc7c |
(3586) 0x51fc6c STR X22, [X30, #40] |
(3586) 0x51fc70 LDR X1, [X20, X19] |
(3586) 0x51fc74 ADD X17, X1, #1 |
(3586) 0x51fc78 STR X17, [X20, X19] |
(3586) 0x51fc7c LDR X13, [X3] |
(3586) 0x51fc80 LDR X16, [X30, #48] |
(3586) 0x51fc84 CMP X13, X16 |
(3586) 0x51fc88 B.NE 51fc9c |
(3586) 0x51fc8c STR X22, [X30, #48] |
(3586) 0x51fc90 LDR X1, [X20, X19] |
(3586) 0x51fc94 ADD X17, X1, #1 |
(3586) 0x51fc98 STR X17, [X20, X19] |
(3586) 0x51fc9c ADD X1, X30, #56 |
(3586) 0x51fca0 CMP X1, X6 |
(3586) 0x51fca4 B.NE 51fb98 |
(3587) 0x51fca8 ADD X3, X3, #8 |
(3587) 0x51fcac CMP X3, X15 |
(3587) 0x51fcb0 B.NE 51faa8 |
(3585) 0x51fcb4 B 51fa6c |
(3587) 0x51fcb8 STR X22, [X1] |
(3587) 0x51fcbc LDR X16, [X20, X19] |
(3587) 0x51fcc0 ADD X17, X16, #1 |
(3587) 0x51fcc4 STR X17, [X20, X19] |
(3587) 0x51fcc8 B 51fb68 |
(3587) 0x51fccc STR X22, [X1] |
(3587) 0x51fcd0 LDR X16, [X20, X19] |
(3587) 0x51fcd4 ADD X17, X16, #1 |
(3587) 0x51fcd8 STR X17, [X20, X19] |
(3587) 0x51fcdc B 51fb54 |
(3587) 0x51fce0 STR X22, [X1] |
(3587) 0x51fce4 LDR X16, [X20, X19] |
(3587) 0x51fce8 ADD X17, X16, #1 |
(3587) 0x51fcec STR X17, [X20, X19] |
(3587) 0x51fcf0 B 51fb40 |
(3587) 0x51fcf4 STR X22, [X1] |
(3587) 0x51fcf8 LDR X16, [X20, X19] |
(3587) 0x51fcfc ADD X17, X16, #1 |
(3587) 0x51fd00 STR X17, [X20, X19] |
(3587) 0x51fd04 B 51fb2c |
(3587) 0x51fd08 STR X22, [X1] |
(3587) 0x51fd0c LDR X16, [X20, X19] |
(3587) 0x51fd10 ADD X17, X16, #1 |
(3587) 0x51fd14 STR X17, [X20, X19] |
(3587) 0x51fd18 B 51fb18 |
(3587) 0x51fd1c STR X22, [X10] |
(3587) 0x51fd20 LDR X16, [X20, X19] |
(3587) 0x51fd24 ADD X17, X16, #1 |
(3587) 0x51fd28 STR X17, [X20, X19] |
(3587) 0x51fd2c B 51fb04 |
(3596) 0x51fd30 LDR X3, [SP, #112] |
(3596) 0x51fd34 ORR X9, XZR, X25 |
(3596) 0x51fd38 LDR D2, [X26, X21,LSL #3] |
(3596) 0x51fd3c STR D2, [X5, X0,LSL #3] |
(3596) 0x51fd40 B 51f850 |
(3594) 0x51fd44 LDR X2, [SP, #112] |
(3594) 0x51fd48 ORR X9, XZR, X25 |
(3594) 0x51fd4c LDR D0, [X26, X21,LSL #3] |
(3594) 0x51fd50 STR D0, [X12, X0,LSL #3] |
(3594) 0x51fd54 B 51f850 |
(3583) 0x51fd58 LDR X2, [SP, #184] |
(3583) 0x51fd5c LDR X15, [SP, #216] |
(3583) 0x51fd60 LDR X14, [SP, #200] |
(3583) 0x51fd64 LDR X2, [X2, X13] |
(3583) 0x51fd68 LDR X10, [X15, X13] |
(3583) 0x51fd6c LDR X16, [SP, #208] |
(3583) 0x51fd70 LDR X6, [X14, X13] |
(3583) 0x51fd74 SUB X3, X10, X2 |
(3583) 0x51fd78 LDR X25, [X16, X13] |
(3583) 0x51fd7c CMP X12, X3 |
(3583) 0x51fd80 B.GT 52026c |
(3583) 0x51fd84 CMP X12, #0 |
(3583) 0x51fd88 B.LE 51fa24 |
(3583) 0x51fd8c MOVZ X3, #0 |
(3583) 0x51fd90 MOVZ X14, #0 |
(3583) 0x51fd94 ADD X12, X12, X21 |
(3583) 0x51fd98 ORR X15, XZR, X2 |
(3583) 0x51fd9c HINT #0 |
(3588) 0x51fda0 LDR X1, [X28, X21,LSL #3] |
(3588) 0x51fda4 CMP X2, #0 |
(3588) 0x51fda8 B.LE 51feec |
(3591) 0x51fdac ANDS X17, X2, #4224 |
(3591) 0x51fdb0 MOVZ X0, #0 |
(3591) 0x51fdb4 B.EQ 51fe60 |
(3591) 0x51fdb8 CMP X17, #1 |
(3591) 0x51fdbc B.EQ 51fe48 |
(3591) 0x51fdc0 CMP X17, #2 |
(3591) 0x51fdc4 B.EQ 51fe38 |
(3591) 0x51fdc8 CMP X17, #3 |
(3591) 0x51fdcc B.EQ 51fe28 |
(3591) 0x51fdd0 CMP X17, #4 |
(3591) 0x51fdd4 B.EQ 51fe18 |
(3591) 0x51fdd8 CMP X17, #5 |
(3591) 0x51fddc B.EQ 51fe08 |
(3591) 0x51fde0 CMP X17, #6 |
(3591) 0x51fde4 B.EQ 51fdf8 |
(3591) 0x51fde8 LDR X30, [X25] |
(3591) 0x51fdec CMP X30, X1 |
(3591) 0x51fdf0 B.EQ 51ff68 |
(3591) 0x51fdf4 MOVZ X0, #1 |
(3591) 0x51fdf8 LDR X16, [X25, X0,LSL #3] |
(3591) 0x51fdfc CMP X16, X1 |
(3591) 0x51fe00 B.EQ 51ff68 |
(3591) 0x51fe04 ADD X0, X0, #1 |
(3591) 0x51fe08 LDR X17, [X25, X0,LSL #3] |
(3591) 0x51fe0c CMP X17, X1 |
(3591) 0x51fe10 B.EQ 51ff68 |
(3591) 0x51fe14 ADD X0, X0, #1 |
(3591) 0x51fe18 LDR X30, [X25, X0,LSL #3] |
(3591) 0x51fe1c CMP X30, X1 |
(3591) 0x51fe20 B.EQ 51ff68 |
(3591) 0x51fe24 ADD X0, X0, #1 |
(3591) 0x51fe28 LDR X16, [X25, X0,LSL #3] |
(3591) 0x51fe2c CMP X16, X1 |
(3591) 0x51fe30 B.EQ 51ff68 |
(3591) 0x51fe34 ADD X0, X0, #1 |
(3591) 0x51fe38 LDR X17, [X25, X0,LSL #3] |
(3591) 0x51fe3c CMP X17, X1 |
(3591) 0x51fe40 B.EQ 51ff68 |
(3591) 0x51fe44 ADD X0, X0, #1 |
(3591) 0x51fe48 LDR X30, [X25, X0,LSL #3] |
(3591) 0x51fe4c CMP X30, X1 |
(3591) 0x51fe50 B.EQ 51ff68 |
(3591) 0x51fe54 ADD X0, X0, #1 |
(3591) 0x51fe58 CMP X2, X0 |
(3591) 0x51fe5c B.EQ 51feec |
(3592) 0x51fe60 LDR X16, [X25, X0,LSL #3] |
(3592) 0x51fe64 CMP X16, X1 |
(3592) 0x51fe68 B.EQ 51ff68 |
(3592) 0x51fe6c ADD X0, X0, #1 |
(3592) 0x51fe70 LDR X17, [X25, X0,LSL #3] |
(3592) 0x51fe74 ORR X30, XZR, X0 |
(3592) 0x51fe78 CMP X17, X1 |
(3592) 0x51fe7c B.EQ 51ff68 |
(3592) 0x51fe80 ADD X0, X0, #1 |
(3592) 0x51fe84 LDR X16, [X25, X0,LSL #3] |
(3592) 0x51fe88 CMP X16, X1 |
(3592) 0x51fe8c B.EQ 51ff68 |
(3592) 0x51fe90 ADD X0, X30, #2 |
(3592) 0x51fe94 LDR X17, [X25, X0,LSL #3] |
(3592) 0x51fe98 CMP X17, X1 |
(3592) 0x51fe9c B.EQ 51ff68 |
(3592) 0x51fea0 ADD X0, X30, #3 |
(3592) 0x51fea4 LDR X16, [X25, X0,LSL #3] |
(3592) 0x51fea8 CMP X16, X1 |
(3592) 0x51feac B.EQ 51ff68 |
(3592) 0x51feb0 ADD X0, X30, #4 |
(3592) 0x51feb4 LDR X17, [X25, X0,LSL #3] |
(3592) 0x51feb8 CMP X17, X1 |
(3592) 0x51febc B.EQ 51ff68 |
(3592) 0x51fec0 ADD X0, X30, #5 |
(3592) 0x51fec4 LDR X16, [X25, X0,LSL #3] |
(3592) 0x51fec8 CMP X16, X1 |
(3592) 0x51fecc B.EQ 51ff68 |
(3592) 0x51fed0 ADD X0, X30, #6 |
(3592) 0x51fed4 LDR X17, [X25, X0,LSL #3] |
(3592) 0x51fed8 CMP X17, X1 |
(3592) 0x51fedc B.EQ 51ff68 |
(3592) 0x51fee0 ADD X0, X30, #7 |
(3592) 0x51fee4 CMP X2, X0 |
(3592) 0x51fee8 B.NE 51fe60 |
(3588) 0x51feec LDR D3, [X26, X21,LSL #3] |
(3588) 0x51fef0 CMP X10, X15 |
(3588) 0x51fef4 B.LE 51ff84 |
(3588) 0x51fef8 UBFM X16, X15, #61, #60 |
(3588) 0x51fefc ADD X15, X15, #1 |
(3588) 0x51ff00 STR X1, [X25, X16] |
(3588) 0x51ff04 STR D3, [X6, X16] |
(3588) 0x51ff08 ADD X21, X21, #1 |
(3588) 0x51ff0c CMP X21, X12 |
(3588) 0x51ff10 B.NE 51fda0 |
(3583) 0x51ff14 LDR X6, [SP, #184] |
(3583) 0x51ff18 ADD X21, X15, X14 |
(3583) 0x51ff1c STR X21, [X6, X13] |
(3583) 0x51ff20 CBNZ X14, 51ff98 |
(3583) 0x51ff24 ORR X21, XZR, X12 |
(3583) 0x51ff28 CBZ X3, 51fa24 |
(3583) 0x51ff2c ORR X0, XZR, X3 |
(3583) 0x51ff30 STR X9, [SP, #112] |
(3583) 0x51ff34 STP X5, X11, [SP, #240] |
(3583) 0x51ff38 STP X7, X8, [SP, #256] |
(3583) 0x51ff3c STR X18, [SP, #272] |
(3583) 0x51ff40 STR X4, [SP, #288] |
(3583) 0x51ff44 BL 546e20 |
(3583) 0x51ff48 LDR X0, [SP, #112] |
(3583) 0x51ff4c BL 546e20 |
(3583) 0x51ff50 LDR X18, [SP, #272] |
(3583) 0x51ff54 MOVZ X9, #0 |
(3583) 0x51ff58 LDP X5, X11, [SP, #240] |
(3583) 0x51ff5c LDP X7, X8, [SP, #256] |
(3583) 0x51ff60 LDR X4, [SP, #288] |
(3583) 0x51ff64 B 51fa24 |
(3591) 0x51ff68 LDR D4, [X26, X21,LSL #3] |
(3591) 0x51ff6c ADD X21, X21, #1 |
(3591) 0x51ff70 STR D4, [X6, X0,LSL #3] |
(3591) 0x51ff74 CMP X21, X12 |
(3591) 0x51ff78 B.EQ 51ff14 |
(3591) 0x51ff7c LDR X1, [X28, X21,LSL #3] |
(3591) 0x51ff80 B 51fdac |
(3588) 0x51ff84 UBFM X30, X14, #61, #60 |
(3588) 0x51ff88 ADD X14, X14, #1 |
(3588) 0x51ff8c STR X1, [X3, X30] |
(3588) 0x51ff90 STR D3, [X9, X30] |
(3588) 0x51ff94 B 51ff08 |
(3583) 0x51ff98 LDR X10, [SP, #208] |
(3583) 0x51ff9c UBFM X25, X21, #61, #60 |
(3583) 0x51ffa0 ORR X1, XZR, X25 |
(3583) 0x51ffa4 STR X13, [SP, #112] |
(3583) 0x51ffa8 STR X9, [SP, #272] |
(3583) 0x51ffac LDR X0, [X10, X13] |
(3583) 0x51ffb0 STP X3, X15, [SP, #240] |
(3583) 0x51ffb4 STP X14, X12, [SP, #256] |
(3583) 0x51ffb8 STP X5, X11, [SP, #288] |
(3583) 0x51ffbc STP X7, X8, [SP, #304] |
(3583) 0x51ffc0 STP X18, X4, [SP, #320] |
(3583) 0x51ffc4 BL 546dc8 |
(3583) 0x51ffc8 LDR X3, [SP, #112] |
(3583) 0x51ffcc ORR X1, XZR, X25 |
(3583) 0x51ffd0 ORR X9, XZR, X0 |
(3583) 0x51ffd4 LDP X2, X25, [SP, #200] |
(3583) 0x51ffd8 LDR X0, [X2, X3] |
(3583) 0x51ffdc STR X9, [X25, X3] |
(3583) 0x51ffe0 BL 546dc8 |
(3583) 0x51ffe4 LDR X13, [SP, #112] |
(3583) 0x51ffe8 ORR X16, XZR, X0 |
(3583) 0x51ffec LDP X3, X15, [SP, #240] |
(3583) 0x51fff0 LDP X14, X12, [SP, #256] |
(3583) 0x51fff4 UBFM X17, X15, #61, #60 |
(3583) 0x51fff8 LDP X5, X11, [SP, #288] |
(3583) 0x51fffc CMP X14, #1 |
(3583) 0x520000 LDP X7, X8, [SP, #304] |
(3583) 0x520004 LDP X18, X4, [SP, #320] |
(3583) 0x520008 LDR X1, [SP, #200] |
(3583) 0x52000c LDR X30, [X25, X13] |
(3583) 0x520010 LDR X9, [SP, #272] |
(3583) 0x520014 STR X0, [X1, X13] |
(3583) 0x520018 LDR X0, [SP, #216] |
(3583) 0x52001c STR X21, [X0, X13] |
(3583) 0x520020 B.EQ 5203e8 |
(3583) 0x520024 ADD X2, X30, X15,LSL #3 |
(3583) 0x520028 UBFM X17, X15, #61, #60 |
(3583) 0x52002c ADD X1, X16, X15,LSL #3 |
(3583) 0x520030 WHILEWR P15.D, X2, X1 |
(3583) 0x520034 CSINC W21, WZR, WZR, #2 |
(3583) 0x520038 WHILEWR P15.D, X9, X1 |
(3583) 0x52003c CSINC W6, WZR, WZR, #2 |
(3583) 0x520040 CMP W21, #0 |
(3583) 0x520044 CCMP W6, #0, #4, #1 |
(3583) 0x520048 CSINC W10, WZR, WZR, #0 |
(3583) 0x52004c WHILEWR P15.D, X3, X2 |
(3583) 0x520050 CCMP W10, #0, #4, #3 |
(3583) 0x520054 B.EQ 5203e8 |
(3583) 0x520058 UBFM X25, X14, #1, #63 |
(3583) 0x52005c MOVZ X0, #0 |
(3583) 0x520060 UBFM X21, X25, #60, #59 |
(3583) 0x520064 SUB X13, X21, #16 |
(3583) 0x520068 UBFM X6, X13, #4, #63 |
(3583) 0x52006c ADD X10, X6, #1 |
(3583) 0x520070 ANDS X25, X10, #4224 |
(3583) 0x520074 B.EQ 520128 |
(3583) 0x520078 CMP X25, #1 |
(3583) 0x52007c B.EQ 52010c |
(3583) 0x520080 CMP X25, #2 |
(3583) 0x520084 B.EQ 5200f8 |
(3583) 0x520088 CMP X25, #3 |
(3583) 0x52008c B.EQ 5200e4 |
(3583) 0x520090 CMP X25, #4 |
(3583) 0x520094 B.EQ 5200d0 |
(3583) 0x520098 CMP X25, #5 |
(3583) 0x52009c B.EQ 5200bc |
(3583) 0x5200a0 CMP X25, #6 |
(3583) 0x5200a4 B.NE 5205f8 |
(3583) 0x5200a8 LDR Q7, [X3, X0] |
(3583) 0x5200ac LDR Q6, [X9, X0] |
(3583) 0x5200b0 STR Q7, [X2, X0] |
(3583) 0x5200b4 STR Q6, [X1, X0] |
(3583) 0x5200b8 ADD X0, X0, #16 |
(3583) 0x5200bc LDR Q17, [X3, X0] |
(3583) 0x5200c0 LDR Q16, [X9, X0] |
(3583) 0x5200c4 STR Q17, [X2, X0] |
(3583) 0x5200c8 STR Q16, [X1, X0] |
(3583) 0x5200cc ADD X0, X0, #16 |
(3583) 0x5200d0 LDR Q19, [X3, X0] |
(3583) 0x5200d4 LDR Q18, [X9, X0] |
(3583) 0x5200d8 STR Q19, [X2, X0] |
(3583) 0x5200dc STR Q18, [X1, X0] |
(3583) 0x5200e0 ADD X0, X0, #16 |
(3583) 0x5200e4 LDR Q21, [X3, X0] |
(3583) 0x5200e8 LDR Q20, [X9, X0] |
(3583) 0x5200ec STR Q21, [X2, X0] |
(3583) 0x5200f0 STR Q20, [X1, X0] |
(3583) 0x5200f4 ADD X0, X0, #16 |
(3583) 0x5200f8 LDR Q23, [X3, X0] |
(3583) 0x5200fc LDR Q22, [X9, X0] |
(3583) 0x520100 STR Q23, [X2, X0] |
(3583) 0x520104 STR Q22, [X1, X0] |
(3583) 0x520108 ADD X0, X0, #16 |
(3583) 0x52010c LDR Q25, [X3, X0] |
(3583) 0x520110 LDR Q24, [X9, X0] |
(3583) 0x520114 STR Q25, [X2, X0] |
(3583) 0x520118 STR Q24, [X1, X0] |
(3583) 0x52011c ADD X0, X0, #16 |
(3583) 0x520120 CMP X0, X21 |
(3583) 0x520124 B.EQ 5201d4 |
(3583) 0x520128 ORR X25, XZR, X21 |
(3590) 0x52012c LDR Q27, [X3, X0] |
(3590) 0x520130 ADD X6, X0, #16 |
(3590) 0x520134 ADD X21, X0, #32 |
(3590) 0x520138 ADD X17, X0, #48 |
(3590) 0x52013c ADD X13, X0, #64 |
(3590) 0x520140 LDR Q26, [X9, X0] |
(3590) 0x520144 ADD X10, X0, #80 |
(3590) 0x520148 STR Q27, [X2, X0] |
(3590) 0x52014c LDR Q28, [X3, X6] |
(3590) 0x520150 STR Q26, [X1, X0] |
(3590) 0x520154 LDR Q29, [X9, X6] |
(3590) 0x520158 STR Q28, [X2, X6] |
(3590) 0x52015c LDR Q0, [X3, X21] |
(3590) 0x520160 STR Q29, [X1, X6] |
(3590) 0x520164 ADD X6, X0, #96 |
(3590) 0x520168 LDR Q31, [X9, X21] |
(3590) 0x52016c STR Q0, [X2, X21] |
(3590) 0x520170 LDR Q1, [X3, X17] |
(3590) 0x520174 STR Q31, [X1, X21] |
(3590) 0x520178 ADD X21, X0, #112 |
(3590) 0x52017c ADD X0, X0, #128 |
(3590) 0x520180 LDR Q2, [X9, X17] |
(3590) 0x520184 STR Q1, [X2, X17] |
(3590) 0x520188 LDR Q3, [X3, X13] |
(3590) 0x52018c STR Q2, [X1, X17] |
(3590) 0x520190 LDR Q4, [X9, X13] |
(3590) 0x520194 STR Q3, [X2, X13] |
(3590) 0x520198 LDR Q30, [X3, X10] |
(3590) 0x52019c STR Q4, [X1, X13] |
(3590) 0x5201a0 LDR Q5, [X9, X10] |
(3590) 0x5201a4 STR Q30, [X2, X10] |
(3590) 0x5201a8 LDR Q6, [X3, X6] |
(3590) 0x5201ac STR Q5, [X1, X10] |
(3590) 0x5201b0 LDR Q7, [X9, X6] |
(3590) 0x5201b4 STR Q6, [X2, X6] |
(3590) 0x5201b8 LDR Q16, [X3, X21] |
(3590) 0x5201bc STR Q7, [X1, X6] |
(3590) 0x5201c0 LDR Q17, [X9, X21] |
(3590) 0x5201c4 STR Q16, [X2, X21] |
(3590) 0x5201c8 STR Q17, [X1, X21] |
(3590) 0x5201cc CMP X0, X25 |
(3590) 0x5201d0 B.NE 52012c |
(3583) 0x5201d4 AND X2, X14, #8127 |
(3583) 0x5201d8 ADD X15, X2, X15 |
(3583) 0x5201dc TBZ W14, #0, 520568 |
(3583) 0x5201e0 UBFM X14, X2, #61, #60 |
(3583) 0x5201e4 UBFM X1, X15, #61, #60 |
(3583) 0x5201e8 LDR X0, [X3, X14] |
(3583) 0x5201ec ORR X21, XZR, X12 |
(3583) 0x5201f0 LDR D18, [X9, X14] |
(3583) 0x5201f4 STR X0, [X30, X1] |
(3583) 0x5201f8 STR D18, [X16, X1] |
(3583) 0x5201fc B 51ff28 |
0x520200 MADD X30, X0, X1, XZR |
0x520204 UBFM X19, X25, #61, #60 |
0x520208 STR XZR, [X21, X19] |
0x52020c ADD X0, X1, X30 |
0x520210 ADD X27, X30, X22 |
0x520214 ADD X3, X0, X22 |
0x520218 ADD X22, X21, X25,LSL #3 |
0x52021c STR X3, [SP, #104] |
0x520220 CMP X27, X3 |
0x520224 B.LT 51f378 |
0x520228 STP X6, X7, [SP, #240] |
0x52022c STP X8, X5, [SP, #256] |
0x520230 STR X12, [SP, #272] |
0x520234 BL 410880 |
0x520238 LDR X12, [SP, #272] |
0x52023c LDP X9, X7, [SP, #240] |
0x520240 LDP X8, X5, [SP, #256] |
0x520244 CBNZ X25, 520250 |
0x520248 CMP X26, #0 |
0x52024c B.GT 51f4b8 |
0x520250 LDP X19, X20, [SP, #16] |
0x520254 LDP X21, X22, [SP, #32] |
0x520258 LDP X23, X24, [SP, #48] |
0x52025c LDP X25, X26, [SP, #64] |
0x520260 LDP X27, X28, [SP, #80] |
0x520264 LDP X29, X30, [SP], #336 |
0x520268 B 410880 |
(3583) 0x52026c SUB X9, X12, X3 |
(3583) 0x520270 MOVZ X1, #8 |
(3583) 0x520274 STP X12, X6, [SP, #240] |
(3583) 0x520278 ORR X0, XZR, X9 |
(3583) 0x52027c STR X9, [SP, #112] |
(3583) 0x520280 STP X10, X2, [SP, #256] |
(3583) 0x520284 STR X13, [SP, #272] |
(3583) 0x520288 STP X5, X11, [SP, #288] |
(3583) 0x52028c STP X7, X8, [SP, #304] |
(3583) 0x520290 STP X18, X4, [SP, #320] |
(3583) 0x520294 BL 546d88 |
(3583) 0x520298 ORR X7, XZR, X0 |
(3583) 0x52029c LDR X0, [SP, #112] |
(3583) 0x5202a0 MOVZ X1, #8 |
(3583) 0x5202a4 STR X7, [SP, #112] |
(3583) 0x5202a8 BL 546d88 |
(3583) 0x5202ac LDP X12, X6, [SP, #240] |
(3583) 0x5202b0 ORR X9, XZR, X0 |
(3583) 0x5202b4 LDP X10, X2, [SP, #256] |
(3583) 0x5202b8 LDP X5, X11, [SP, #288] |
(3583) 0x5202bc LDP X7, X8, [SP, #304] |
(3583) 0x5202c0 LDP X18, X4, [SP, #320] |
(3583) 0x5202c4 LDR X3, [SP, #112] |
(3583) 0x5202c8 LDR X13, [SP, #272] |
(3583) 0x5202cc CMP X12, #0 |
(3583) 0x5202d0 B.GT 51fd90 |
(3583) 0x5202d4 LDR X1, [SP, #184] |
(3583) 0x5202d8 STR X2, [X1, X13] |
(3583) 0x5202dc B 51ff28 |
0x5202e0 STP X9, X7, [SP, #240] |
0x5202e4 STP X8, X5, [SP, #256] |
0x5202e8 STR X12, [SP, #272] |
0x5202ec BL 410880 |
0x5202f0 LDUR X21, [X22, #504] |
0x5202f4 LDP X11, X7, [SP, #240] |
0x5202f8 LDP X8, X5, [SP, #256] |
0x5202fc LDR X12, [SP, #272] |
0x520300 B 51f5e8 |
(3593) 0x520304 ADRP X30, |
(3593) 0x520308 MOVZ X3, #0 |
(3593) 0x52030c LDR X25, [SP, #240] |
(3593) 0x520310 ADD X0, X30, #3344 |
(3593) 0x520314 MOVZ X2, #1 |
(3593) 0x520318 STR X13, [SP, #112] |
(3593) 0x52031c MOVZ X1, #3406 |
(3593) 0x520320 STP X4, X18, [SP, #240] |
(3593) 0x520324 STP X8, X7, [SP, #256] |
(3593) 0x520328 STR X11, [SP, #272] |
(3593) 0x52032c STP X5, X14, [SP, #288] |
(3593) 0x520330 STP X15, X9, [SP, #304] |
(3593) 0x520334 BL 54a840 |
(3593) 0x520338 LDR X5, [SP, #224] |
(3593) 0x52033c MOVZ X18, #1 |
(3593) 0x520340 LDR X4, [X5, #224] |
(3593) 0x520344 LDADD X18, X1, [X4] |
(3593) 0x520348 LDP X11, X10, [SP, #272] |
(3593) 0x52034c LDP X4, X18, [SP, #240] |
(3593) 0x520350 LDP X8, X7, [SP, #256] |
(3593) 0x520354 LDP X5, X14, [SP, #288] |
(3593) 0x520358 LDP X15, X9, [SP, #304] |
(3593) 0x52035c LDR X13, [SP, #112] |
(3593) 0x520360 CBNZ X10, 52038c |
(3595) 0x520364 ORR X16, XZR, X21 |
(3595) 0x520368 LDR X21, [SP, #144] |
(3595) 0x52036c ADD X17, X21, #56 |
(3595) 0x520370 LDP X2, X1, [X17] |
(3595) 0x520374 ADD X0, X2, X13 |
(3595) 0x520378 ADD X1, X1, X13 |
(3595) 0x52037c B 51f864 |
0x520380 LDR X0, [X1], #8 |
0x520384 STR X0, [X22] |
0x520388 B 51f3d0 |
(3593) 0x52038c ADRP X16, |
(3593) 0x520390 ORR X1, XZR, X25 |
(3593) 0x520394 STR X15, [SP, #112] |
(3593) 0x520398 ADD X0, X16, #3504 |
(3593) 0x52039c STP X14, X13, [SP, #240] |
(3593) 0x5203a0 STP X9, X5, [SP, #256] |
(3593) 0x5203a4 STR X11, [SP, #272] |
(3593) 0x5203a8 STP X7, X8, [SP, #288] |
(3593) 0x5203ac STP X18, X4, [SP, #304] |
(3593) 0x5203b0 BL 546fc0 |
(3593) 0x5203b4 LDR X12, [SP, #144] |
(3593) 0x5203b8 ORR X16, XZR, X21 |
(3593) 0x5203bc LDP X14, X13, [SP, #240] |
(3593) 0x5203c0 LDP X9, X5, [SP, #256] |
(3593) 0x5203c4 ADD X6, X12, #56 |
(3593) 0x5203c8 LDP X0, X3, [X6] |
(3593) 0x5203cc LDP X7, X8, [SP, #288] |
(3593) 0x5203d0 ADD X0, X0, X13 |
(3593) 0x5203d4 ADD X1, X3, X13 |
(3593) 0x5203d8 LDP X18, X4, [SP, #304] |
(3593) 0x5203dc LDR X15, [SP, #112] |
(3593) 0x5203e0 LDR X11, [SP, #272] |
(3593) 0x5203e4 B 51f864 |
(3583) 0x5203e8 ANDS X13, X14, #4224 |
(3583) 0x5203ec ADD X21, X30, X17 |
(3583) 0x5203f0 MOVZ X0, #0 |
(3583) 0x5203f4 ADD X25, X16, X17 |
(3583) 0x5203f8 B.EQ 5204c0 |
(3583) 0x5203fc CMP X13, #1 |
(3583) 0x520400 B.EQ 5204a4 |
(3583) 0x520404 CMP X13, #2 |
(3583) 0x520408 B.EQ 520490 |
(3583) 0x52040c CMP X13, #3 |
(3583) 0x520410 B.EQ 52047c |
(3583) 0x520414 CMP X13, #4 |
(3583) 0x520418 B.EQ 520468 |
(3583) 0x52041c CMP X13, #5 |
(3583) 0x520420 B.EQ 520454 |
(3583) 0x520424 CMP X13, #6 |
(3583) 0x520428 B.EQ 520440 |
(3583) 0x52042c LDR D19, [X9] |
(3583) 0x520430 MOVZ X0, #1 |
(3583) 0x520434 LDR X10, [X3] |
(3583) 0x520438 STR X10, [X30, X17] |
(3583) 0x52043c STR D19, [X16, X17] |
(3583) 0x520440 LDR D20, [X9, X0,LSL #3] |
(3583) 0x520444 LDR X16, [X3, X0,LSL #3] |
(3583) 0x520448 STR X16, [X21, X0,LSL #3] |
(3583) 0x52044c STR D20, [X25, X0,LSL #3] |
(3583) 0x520450 ADD X0, X0, #1 |
(3583) 0x520454 LDR D21, [X9, X0,LSL #3] |
(3583) 0x520458 LDR X30, [X3, X0,LSL #3] |
(3583) 0x52045c STR X30, [X21, X0,LSL #3] |
(3583) 0x520460 STR D21, [X25, X0,LSL #3] |
(3583) 0x520464 ADD X0, X0, #1 |
(3583) 0x520468 LDR D22, [X9, X0,LSL #3] |
(3583) 0x52046c LDR X17, [X3, X0,LSL #3] |
(3583) 0x520470 STR X17, [X21, X0,LSL #3] |
(3583) 0x520474 STR D22, [X25, X0,LSL #3] |
(3583) 0x520478 ADD X0, X0, #1 |
(3583) 0x52047c LDR D23, [X9, X0,LSL #3] |
(3583) 0x520480 LDR X6, [X3, X0,LSL #3] |
(3583) 0x520484 STR X6, [X21, X0,LSL #3] |
(3583) 0x520488 STR D23, [X25, X0,LSL #3] |
(3583) 0x52048c ADD X0, X0, #1 |
(3583) 0x520490 LDR D24, [X9, X0,LSL #3] |
(3583) 0x520494 LDR X2, [X3, X0,LSL #3] |
(3583) 0x520498 STR X2, [X21, X0,LSL #3] |
(3583) 0x52049c STR D24, [X25, X0,LSL #3] |
(3583) 0x5204a0 ADD X0, X0, #1 |
(3583) 0x5204a4 LDR D25, [X9, X0,LSL #3] |
(3583) 0x5204a8 LDR X15, [X3, X0,LSL #3] |
(3583) 0x5204ac STR X15, [X21, X0,LSL #3] |
(3583) 0x5204b0 STR D25, [X25, X0,LSL #3] |
(3583) 0x5204b4 ADD X0, X0, #1 |
(3583) 0x5204b8 CMP X0, X14 |
(3583) 0x5204bc B.EQ 520568 |
(3589) 0x5204c0 LDR X16, [X3, X0,LSL #3] |
(3589) 0x5204c4 ADD X1, X0, #1 |
(3589) 0x5204c8 ADD X30, X0, #2 |
(3589) 0x5204cc ADD X13, X0, #3 |
(3589) 0x5204d0 ADD X10, X0, #4 |
(3589) 0x5204d4 LDR D26, [X9, X0,LSL #3] |
(3589) 0x5204d8 ADD X2, X0, #6 |
(3589) 0x5204dc STR X16, [X21, X0,LSL #3] |
(3589) 0x5204e0 ADD X16, X0, #5 |
(3589) 0x5204e4 LDR X17, [X3, X1,LSL #3] |
(3589) 0x5204e8 STR D26, [X25, X0,LSL #3] |
(3589) 0x5204ec LDR D27, [X9, X1,LSL #3] |
(3589) 0x5204f0 STR X17, [X21, X1,LSL #3] |
(3589) 0x5204f4 LDR X6, [X3, X30,LSL #3] |
(3589) 0x5204f8 STR D27, [X25, X1,LSL #3] |
(3589) 0x5204fc ADD X1, X0, #7 |
(3589) 0x520500 ADD X0, X0, #8 |
(3589) 0x520504 LDR D28, [X9, X30,LSL #3] |
(3589) 0x520508 STR X6, [X21, X30,LSL #3] |
(3589) 0x52050c LDR X15, [X3, X13,LSL #3] |
(3589) 0x520510 STR D28, [X25, X30,LSL #3] |
(3589) 0x520514 LDR D29, [X9, X13,LSL #3] |
(3589) 0x520518 STR X15, [X21, X13,LSL #3] |
(3589) 0x52051c LDR X30, [X3, X10,LSL #3] |
(3589) 0x520520 STR D29, [X25, X13,LSL #3] |
(3589) 0x520524 LDR D0, [X9, X10,LSL #3] |
(3589) 0x520528 STR X30, [X21, X10,LSL #3] |
(3589) 0x52052c LDR X13, [X3, X16,LSL #3] |
(3589) 0x520530 STR D0, [X25, X10,LSL #3] |
(3589) 0x520534 LDR D31, [X9, X16,LSL #3] |
(3589) 0x520538 STR X13, [X21, X16,LSL #3] |
(3589) 0x52053c LDR X10, [X3, X2,LSL #3] |
(3589) 0x520540 STR D31, [X25, X16,LSL #3] |
(3589) 0x520544 LDR D1, [X9, X2,LSL #3] |
(3589) 0x520548 STR X10, [X21, X2,LSL #3] |
(3589) 0x52054c LDR X17, [X3, X1,LSL #3] |
(3589) 0x520550 STR D1, [X25, X2,LSL #3] |
(3589) 0x520554 LDR D2, [X9, X1,LSL #3] |
(3589) 0x520558 STR X17, [X21, X1,LSL #3] |
(3589) 0x52055c STR D2, [X25, X1,LSL #3] |
(3589) 0x520560 CMP X0, X14 |
(3589) 0x520564 B.NE 5204c0 |
(3583) 0x520568 ORR X21, XZR, X12 |
(3583) 0x52056c B 51ff2c |
(3594) 0x520570 ADRP X12, |
(3594) 0x520574 MOVZ X3, #0 |
(3594) 0x520578 LDR X25, [SP, #240] |
(3594) 0x52057c ADD X0, X12, #3344 |
(3594) 0x520580 MOVZ X2, #1 |
(3594) 0x520584 STR X13, [SP, #112] |
(3594) 0x520588 MOVZ X1, #3440 |
(3594) 0x52058c STP X4, X18, [SP, #240] |
(3594) 0x520590 STP X8, X7, [SP, #256] |
(3594) 0x520594 STR X11, [SP, #272] |
(3594) 0x520598 STP X5, X14, [SP, #288] |
(3594) 0x52059c STP X15, X9, [SP, #304] |
(3594) 0x5205a0 BL 54a840 |
(3594) 0x5205a4 LDR X8, [SP, #224] |
(3594) 0x5205a8 MOVZ X7, #1 |
(3594) 0x5205ac LDR X11, [X8, #224] |
(3594) 0x5205b0 LDADD X7, X1, [X11] |
(3594) 0x5205b4 LDP X11, X6, [SP, #272] |
(3594) 0x5205b8 LDP X4, X18, [SP, #240] |
(3594) 0x5205bc LDP X8, X7, [SP, #256] |
(3594) 0x5205c0 LDP X5, X14, [SP, #288] |
(3594) 0x5205c4 LDP X15, X9, [SP, #304] |
(3594) 0x5205c8 LDR X13, [SP, #112] |
(3594) 0x5205cc CBZ X6, 520364 |
(3594) 0x5205d0 ADRP X3, |
(3594) 0x5205d4 ORR X1, XZR, X25 |
(3594) 0x5205d8 STR X15, [SP, #112] |
(3594) 0x5205dc ADD X0, X3, #3544 |
(3594) 0x5205e0 STP X14, X13, [SP, #240] |
(3594) 0x5205e4 STP X9, X5, [SP, #256] |
(3594) 0x5205e8 STR X11, [SP, #272] |
(3594) 0x5205ec STP X7, X8, [SP, #288] |
(3594) 0x5205f0 STP X18, X4, [SP, #304] |
(3594) 0x5205f4 B 5203b0 |
(3583) 0x5205f8 LDR Q30, [X3] |
(3583) 0x5205fc MOVZ X0, #16 |
(3583) 0x520600 LDR Q5, [X9] |
(3583) 0x520604 STR Q30, [X30, X17] |
(3583) 0x520608 STR Q5, [X16, X17] |
(3583) 0x52060c B 5200a8 |
(3593) 0x520610 ORR X16, XZR, X21 |
(3593) 0x520614 B 51f864 |
0x520618 HINT #0 |
0x52061c HINT #0 |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ►99.07+ | gomp_thread_start | team.c:130 | libgomp.so.1.0.0 |
| ○ | start_thread | libc.so.6 | |
| ○ | thread_start | libc.so.6 |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_2
| Source file and lines | IJMatrix_parcsr.c:3240-3500 |
| Module | exec |
| nb instructions | 229 |
| loop length | 916 |
| nb stack references | 0 |
| front end | 28.00 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | P16 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 16.50 | 16.50 | 16.17 | 16.17 | 16.17 | 16.17 | 16.17 | 16.17 | 0.00 | 0.00 | 0.00 | 0.00 | 38.67 | 38.67 | 38.67 | 29.00 | 29.00 |
| cycles | 16.50 | 16.50 | 16.17 | 16.17 | 16.17 | 16.17 | 16.17 | 16.17 | 0.00 | 0.00 | 0.00 | 0.00 | 38.67 | 38.67 | 38.67 | 29.00 | 29.00 |
| Cycles executing div or sqrt instructions | 5.00-20.00 |
| Front-end | 28.00 |
| Overall L1 | 38.67 |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 0% |
| fma | 0% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | P16 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| STP X29, X30, [SP, #688]! | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| ADD X29, SP, #0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ORR X12, XZR, X0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STP X19, X20, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STP X21, X22, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STP X23, X24, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STP X25, X26, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STP X27, X28, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| LDP X22, X0, [X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| STR X0, [SP, #120] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDP X1, X28, [X12, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| STR X1, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDP X5, X2, [X12, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| STR X2, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X5, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDP X3, X8, [X12, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| STR X3, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X8, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDP X7, X4, [X12, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| STR X4, [SP, #208] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X7, [SP, #248] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDP X6, X9, [X12, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| STR X9, [SP, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X6, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDP X10, X11, [X12, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| STR X11, [SP, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X10, [SP, #216] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDP X13, X24, [X12, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| STR X13, [SP, #192] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDP X14, X15, [X12, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| STP X14, X15, [SP, #232] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| LDP X23, X16, [X12, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| STR X16, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDP X17, X18, [X12, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| STR X17, [SP, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X18, [SP, #152] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDP X19, X20, [X12, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| STP X19, X20, [SP, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| LDP X25, X26, [X12, #208] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| LDP X21, X20, [X12, #192] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| STR X12, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X25, [SP, #280] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| BL 5499a0 <hypre_NumActiveThreads> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X27, XZR, X0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| BL 5499c0 <hypre_GetThreadNum> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| SDIV X1, X22, X27 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5-20 | 5-20 | N/A |
| LDR X12, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ORR X25, XZR, X0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| LDP X6, X7, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| LDP X8, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| MSUB X22, X1, X27, X22 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 | N/A |
| CMP X0, X22 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.GE 520200 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0xf80> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MADD X27, X1, X0, X0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 | scal (50.0%) |
| ADD X2, X1, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| UBFM X19, X25, #61, #60 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ADD X22, X21, X25,LSL #3 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR XZR, [X21, X19] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| ADD X3, X2, X27 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| STR X3, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X27, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.GE 520228 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0xfa8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X4, [SP, #120] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| MOVZ X0, #0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ADD X1, X4, X27,LSL #3 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ADD X9, X4, X3,LSL #3 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| SUB X10, X9, X1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| SUB X11, X10, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| UBFM X13, X11, #3, #63 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ADD X14, X13, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ANDS X15, X14, #4224 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.EQ 51f420 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x1a0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.EQ 51f40c <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x18c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.EQ 51f400 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x180> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.EQ 51f3f4 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x174> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #4 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.EQ 51f3e8 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x168> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #5 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.EQ 51f3dc <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x15c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #6 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.NE 520380 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x1100> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X16, [X1], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| ADD X0, X0, X16 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X17, [X1], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| ADD X0, X0, X17 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X18, [X1], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| ADD X0, X0, X18 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X30, [X1], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| ADD X0, X0, X30 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X2, [X1], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| ADD X0, X0, X2 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X3, [X1], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| ADD X0, X0, X3 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X1, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.EQ 51f490 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x210> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STP X6, X7, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STP X8, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| BL 410880 <@plt_start@+0x100> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDP X9, X7, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| LDP X8, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| CBNZ X25, 5202e0 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x1060> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X26, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LE 51f5c8 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x348> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X1, XZR, X21 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| UBFM X21, X26, #61, #60 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SUB X25, X21, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| LDR X0, [X1], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| UBFM X6, X25, #3, #63 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ADD X22, X6, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ANDS X13, X22, #4224 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| ADD X26, X1, X26,LSL #3 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| B.EQ 51f568 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2e8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.EQ 51f554 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2d4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X13, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.EQ 51f548 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2c8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X13, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.EQ 51f53c <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2bc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X13, #4 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.EQ 51f530 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2b0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X13, #5 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.EQ 51f524 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2a4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X13, #6 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.EQ 51f518 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x298> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X14, [X1] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| ADD X0, X0, X14 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [X1], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X15, [X1] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| ADD X0, X0, X15 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [X1], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X16, [X1] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| ADD X0, X0, X16 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [X1], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X17, [X1] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| ADD X0, X0, X17 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [X1], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X18, [X1] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| ADD X0, X0, X18 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [X1], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X30, [X1] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| ADD X0, X0, X30 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [X1], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X3, [X1] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| ADD X0, X0, X3 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [X1], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X26, X1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.EQ 51f5c8 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x348> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STP X9, X7, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| MOVZ X21, #0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STP X8, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| BL 410880 <@plt_start@+0x100> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDP X11, X7, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| LDP X8, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| LDR X9, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| CMP X27, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.GE 51f880 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x600> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X0, [SP, #152] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ X9, #0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| MOVN X22, #0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X26, XZR, X5 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| LDR X2, [SP, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| LDR X10, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| SUB X4, X0, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| LDR X14, [SP, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| UBFM X6, X4, #1, #63 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| LDR X5, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| ADD X25, X10, X2,LSL #3 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| STR X12, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| ADD X15, X14, #16 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ADD X18, X25, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ADD X4, X15, X6,LSL #4 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| STR X25, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| MADD X30, X0, X1, XZR | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 | scal (50.0%) |
| UBFM X19, X25, #61, #60 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR XZR, [X21, X19] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| ADD X0, X1, X30 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ADD X27, X30, X22 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ADD X3, X0, X22 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ADD X22, X21, X25,LSL #3 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X3, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X27, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LT 51f378 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0xf8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STP X6, X7, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STP X8, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| BL 410880 <@plt_start@+0x100> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDP X9, X7, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| LDP X8, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| CBNZ X25, 520250 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0xfd0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X26, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| B.GT 51f4b8 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x238> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDP X19, X20, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| LDP X21, X22, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| LDP X23, X24, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| LDP X25, X26, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| LDP X27, X28, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| LDP X29, X30, [SP], #336 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| B 410880 <@plt_start@+0x100> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STP X9, X7, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STP X8, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| BL 410880 <@plt_start@+0x100> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X21, [X22, #504] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDP X11, X7, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| LDP X8, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| LDR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| B 51f5e8 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x368> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X0, [X1], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X0, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| B 51f3d0 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x150> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A |
The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_2
| Source file and lines | IJMatrix_parcsr.c:3240-3500 |
| Module | exec |
| nb instructions | 229 |
| loop length | 916 |
| nb stack references | 0 |
| front end | 28.00 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | P16 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 16.50 | 16.50 | 16.17 | 16.17 | 16.17 | 16.17 | 16.17 | 16.17 | 0.00 | 0.00 | 0.00 | 0.00 | 38.67 | 38.67 | 38.67 | 29.00 | 29.00 |
| cycles | 16.50 | 16.50 | 16.17 | 16.17 | 16.17 | 16.17 | 16.17 | 16.17 | 0.00 | 0.00 | 0.00 | 0.00 | 38.67 | 38.67 | 38.67 | 29.00 | 29.00 |
| Cycles executing div or sqrt instructions | 5.00-20.00 |
| Front-end | 28.00 |
| Overall L1 | 38.67 |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 0% |
| fma | 0% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | P16 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| STP X29, X30, [SP, #688]! | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| ADD X29, SP, #0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ORR X12, XZR, X0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STP X19, X20, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STP X21, X22, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STP X23, X24, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STP X25, X26, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STP X27, X28, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| LDP X22, X0, [X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| STR X0, [SP, #120] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDP X1, X28, [X12, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| STR X1, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDP X5, X2, [X12, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| STR X2, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X5, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDP X3, X8, [X12, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| STR X3, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X8, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDP X7, X4, [X12, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| STR X4, [SP, #208] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X7, [SP, #248] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDP X6, X9, [X12, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| STR X9, [SP, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X6, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDP X10, X11, [X12, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| STR X11, [SP, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X10, [SP, #216] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDP X13, X24, [X12, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| STR X13, [SP, #192] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDP X14, X15, [X12, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| STP X14, X15, [SP, #232] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| LDP X23, X16, [X12, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| STR X16, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDP X17, X18, [X12, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| STR X17, [SP, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X18, [SP, #152] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDP X19, X20, [X12, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| STP X19, X20, [SP, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| LDP X25, X26, [X12, #208] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| LDP X21, X20, [X12, #192] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| STR X12, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X25, [SP, #280] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| BL 5499a0 <hypre_NumActiveThreads> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X27, XZR, X0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| BL 5499c0 <hypre_GetThreadNum> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| SDIV X1, X22, X27 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5-20 | 5-20 | N/A |
| LDR X12, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ORR X25, XZR, X0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| LDP X6, X7, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| LDP X8, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| MSUB X22, X1, X27, X22 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 | N/A |
| CMP X0, X22 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.GE 520200 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0xf80> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MADD X27, X1, X0, X0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 | scal (50.0%) |
| ADD X2, X1, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| UBFM X19, X25, #61, #60 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ADD X22, X21, X25,LSL #3 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR XZR, [X21, X19] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| ADD X3, X2, X27 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| STR X3, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X27, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.GE 520228 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0xfa8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X4, [SP, #120] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| MOVZ X0, #0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ADD X1, X4, X27,LSL #3 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ADD X9, X4, X3,LSL #3 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| SUB X10, X9, X1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| SUB X11, X10, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| UBFM X13, X11, #3, #63 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ADD X14, X13, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ANDS X15, X14, #4224 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.EQ 51f420 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x1a0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.EQ 51f40c <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x18c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.EQ 51f400 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x180> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.EQ 51f3f4 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x174> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #4 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.EQ 51f3e8 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x168> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #5 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.EQ 51f3dc <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x15c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #6 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.NE 520380 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x1100> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X16, [X1], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| ADD X0, X0, X16 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X17, [X1], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| ADD X0, X0, X17 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X18, [X1], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| ADD X0, X0, X18 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X30, [X1], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| ADD X0, X0, X30 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X2, [X1], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| ADD X0, X0, X2 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X3, [X1], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| ADD X0, X0, X3 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X1, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.EQ 51f490 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x210> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STP X6, X7, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STP X8, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| BL 410880 <@plt_start@+0x100> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDP X9, X7, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| LDP X8, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| CBNZ X25, 5202e0 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x1060> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X26, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LE 51f5c8 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x348> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X1, XZR, X21 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| UBFM X21, X26, #61, #60 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SUB X25, X21, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| LDR X0, [X1], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| UBFM X6, X25, #3, #63 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ADD X22, X6, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ANDS X13, X22, #4224 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| ADD X26, X1, X26,LSL #3 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| B.EQ 51f568 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2e8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.EQ 51f554 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2d4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X13, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.EQ 51f548 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2c8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X13, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.EQ 51f53c <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2bc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X13, #4 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.EQ 51f530 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2b0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X13, #5 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.EQ 51f524 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2a4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X13, #6 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.EQ 51f518 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x298> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X14, [X1] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| ADD X0, X0, X14 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [X1], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X15, [X1] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| ADD X0, X0, X15 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [X1], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X16, [X1] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| ADD X0, X0, X16 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [X1], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X17, [X1] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| ADD X0, X0, X17 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [X1], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X18, [X1] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| ADD X0, X0, X18 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [X1], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X30, [X1] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| ADD X0, X0, X30 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [X1], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X3, [X1] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| ADD X0, X0, X3 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [X1], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X26, X1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.EQ 51f5c8 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x348> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STP X9, X7, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| MOVZ X21, #0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STP X8, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| BL 410880 <@plt_start@+0x100> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDP X11, X7, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| LDP X8, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| LDR X9, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| CMP X27, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.GE 51f880 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x600> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X0, [SP, #152] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ X9, #0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| MOVN X22, #0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X26, XZR, X5 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| LDR X2, [SP, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| LDR X10, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| SUB X4, X0, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| LDR X14, [SP, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| UBFM X6, X4, #1, #63 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| LDR X5, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| ADD X25, X10, X2,LSL #3 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| STR X12, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| ADD X15, X14, #16 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ADD X18, X25, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ADD X4, X15, X6,LSL #4 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| STR X25, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| MADD X30, X0, X1, XZR | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 | scal (50.0%) |
| UBFM X19, X25, #61, #60 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR XZR, [X21, X19] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| ADD X0, X1, X30 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ADD X27, X30, X22 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ADD X3, X0, X22 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ADD X22, X21, X25,LSL #3 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X3, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X27, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LT 51f378 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0xf8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STP X6, X7, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STP X8, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| BL 410880 <@plt_start@+0x100> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDP X9, X7, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| LDP X8, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| CBNZ X25, 520250 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0xfd0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X26, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| B.GT 51f4b8 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x238> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDP X19, X20, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| LDP X21, X22, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| LDP X23, X24, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| LDP X25, X26, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| LDP X27, X28, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| LDP X29, X30, [SP], #336 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| B 410880 <@plt_start@+0x100> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STP X9, X7, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STP X8, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| BL 410880 <@plt_start@+0x100> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X21, [X22, #504] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDP X11, X7, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| LDP X8, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| LDR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| B 51f5e8 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x368> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X0, [X1], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X0, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| B 51f3d0 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x150> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A |
| Name | Coverage (%) | Time (s) |
|---|---|---|
| ▼hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1– | 0.27 | 0.04 |
| ○Loop 3582 - IJMatrix_parcsr.c:3274-3275 - exec | 0.01 | 0.00 |
| ○Loop 3600 - IJMatrix_parcsr.c:3282-3283 - exec | 0.00 | 0.00 |
| ▼Loop 3598 - IJMatrix_parcsr.c:3240-3500 - exec– | 0.00 | 0.00 |
| ▼Loop 3594 - IJMatrix_parcsr.c:3240-3500 - exec– | 0.16 | 0.02 |
| ▼Loop 3593 - IJMatrix_parcsr.c:3240-3500 - exec– | 0.02 | 0.01 |
| ▼Loop 3596 - IJMatrix_parcsr.c:3383-3484 - exec– | 0.06 | 0.01 |
| ○Loop 3597 - IJMatrix_parcsr.c:3388-3390 - exec | 0.00 | 0.00 |
| ▼Loop 3583 - IJMatrix_parcsr.c:3240-3500 - exec– | 0.02 | 0.01 |
| ▼Loop 3584 - IJMatrix_parcsr.c:3240-3500 - exec– | 0.00 | 0.00 |
| ▼Loop 3585 - IJMatrix_parcsr.c:3470-3500 - exec– | 0.00 | 0.00 |
| ▼Loop 3587 - IJMatrix_parcsr.c:3475-3484 - exec– | 0.00 | 0.00 |
| ○Loop 3586 - IJMatrix_parcsr.c:3478-3484 - exec | 0.00 | 0.00 |
| ○Loop 3589 - IJMatrix_parcsr.c:3359-3362 - exec | 0.00 | 0.00 |
| ○Loop 3590 - IJMatrix_parcsr.c:3359-3362 - exec | 0.00 | 0.00 |
| ▼Loop 3588 - IJMatrix_parcsr.c:3316-3341 - exec– | 0.00 | 0.00 |
| ▼Loop 3591 - IJMatrix_parcsr.c:3316-3341 - exec– | 0.00 | 0.00 |
| ○Loop 3592 - IJMatrix_parcsr.c:3318-3320 - exec | 0.00 | 0.00 |
| ○Loop 3599 - IJMatrix_parcsr.c:3422-3424 - exec | 0.00 | 0.00 |
| ○Loop 3595 - IJMatrix_parcsr.c:3457-3458 - exec | 0.00 | 0.00 |