OV - exec - Function hypre_BoomerAMGCreateS._omp

	Function: hypre_BoomerAMGCreateS._omp_fn.1	Module: exec	Source: par_strength.c:246-513 [...]	Coverage (incl. loops): 0.35% \| (excl. loops): 0.00%

/home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c: 246 - 513

--------------------------------------------------------------------------------

246: #pragma omp parallel private(i,diag,row_scale,row_sum,jA,jS)

247: #endif

248:    {

249:    HYPRE_Int start, stop;

250:    hypre_GetSimpleThreadPartition(&start, &stop, num_variables);

251:    HYPRE_Int jS_diag = 0, jS_offd = 0;

252:

253:    for (i = start; i < stop; i++)

254:    {

255:       S_diag_i[i] = jS_diag;

256:       if (num_cols_offd)

257:       {

258:          S_offd_i[i] = jS_offd;

259:       }

260:

261:       diag = A_diag_data[A_diag_i[i]];

262:

263:       /* compute scaling factor and row sum */

264:       row_scale = 0.0;

265:       row_sum = diag;

266:       if (num_functions > 1)

267:       {

268:          if (diag < 0)

269:          {

270:             for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

271:             {

272:                if (dof_func[i] == dof_func[A_diag_j[jA]])

273:                {

274:                   row_scale = hypre_max(row_scale, A_diag_data[jA]);

275:                   row_sum += A_diag_data[jA];

276:                }

277:             }

278:             for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

279:             {

280:                if (dof_func[i] == dof_func_offd[A_offd_j[jA]])

281:                {

282:                   row_scale = hypre_max(row_scale, A_offd_data[jA]);

283:                   row_sum += A_offd_data[jA];

[...]

289:             for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

290:             {

291:                if (dof_func[i] == dof_func[A_diag_j[jA]])

292:                {

293:                   row_scale = hypre_min(row_scale, A_diag_data[jA]);

294:                   row_sum += A_diag_data[jA];

295:                }

296:             }

297:             for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

298:             {

299:                if (dof_func[i] == dof_func_offd[A_offd_j[jA]])

300:                {

301:                   row_scale = hypre_min(row_scale, A_offd_data[jA]);

302:                   row_sum += A_offd_data[jA];

[...]

309:          if (diag < 0)

310:          {

311:             for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

312:             {

313:                row_scale = hypre_max(row_scale, A_diag_data[jA]);

314:                row_sum += A_diag_data[jA];

315:             }

316:             for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

317:             {

318:                row_scale = hypre_max(row_scale, A_offd_data[jA]);

319:                row_sum += A_offd_data[jA];

320:             }

321:          }

322:          else

323:          {

324:             for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

325:             {

326:                row_scale = hypre_min(row_scale, A_diag_data[jA]);

327:                row_sum += A_diag_data[jA];

328:             }

329:             for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

330:             {

331:                row_scale = hypre_min(row_scale, A_offd_data[jA]);

332:                row_sum += A_offd_data[jA];

333:             }

334:          } /* diag >= 0*/

335:       } /* num_functions <= 1 */

336:

337:       jS_diag += A_diag_i[i + 1] - A_diag_i[i] - 1;

338:       jS_offd += A_offd_i[i + 1] - A_offd_i[i];

339:

340:       /* compute row entries of S */

341:       S_temp_diag_j[A_diag_i[i]] = -1;

342:       if ((fabs(row_sum) > fabs(diag)*max_row_sum) && (max_row_sum < 1.0))

343:       {

344:          /* make all dependencies weak */

345:          for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

346:          {

347:             S_temp_diag_j[jA] = -1;

348:          }

349:          jS_diag -= A_diag_i[i + 1] - (A_diag_i[i] + 1);

350:

351:          for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

352:          {

353:             S_temp_offd_j[jA] = -1;

354:          }

355:          jS_offd -= A_offd_i[i + 1] - A_offd_i[i];

[...]

363:                for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

364:                {

365:                   if (A_diag_data[jA] <= strength_threshold * row_scale

366:                       || dof_func[i] != dof_func[A_diag_j[jA]])

367:                   {

368:                      S_temp_diag_j[jA] = -1;

369:                      --jS_diag;

[...]

376:                for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

377:                {

378:                   if (A_offd_data[jA] <= strength_threshold * row_scale

379:                       || dof_func[i] != dof_func_offd[A_offd_j[jA]])

380:                   {

381:                      S_temp_offd_j[jA] = -1;

382:                      --jS_offd;

[...]

392:                for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

393:                {

394:                   if (A_diag_data[jA] >= strength_threshold * row_scale

395:                       || dof_func[i] != dof_func[A_diag_j[jA]])

396:                   {

397:                      S_temp_diag_j[jA] = -1;

398:                      --jS_diag;

[...]

405:                for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

406:                {

407:                   if (A_offd_data[jA] >= strength_threshold * row_scale

408:                       || dof_func[i] != dof_func_offd[A_offd_j[jA]])

409:                   {

410:                      S_temp_offd_j[jA] = -1;

411:                      --jS_offd;

[...]

424:                for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

425:                {

426:                   if (A_diag_data[jA] <= strength_threshold * row_scale)

427:                   {

428:                      S_temp_diag_j[jA] = -1;

429:                      --jS_diag;

430:                   }

431:                   else

432:                   {

433:                      S_temp_diag_j[jA] = A_diag_j[jA];

434:                   }

435:                }

436:                for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

437:                {

438:                   if (A_offd_data[jA] <= strength_threshold * row_scale)

439:                   {

440:                      S_temp_offd_j[jA] = -1;

441:                      --jS_offd;

442:                   }

443:                   else

444:                   {

445:                      S_temp_offd_j[jA] = A_offd_j[jA];

[...]

451:                for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

452:                {

453:                   if (A_diag_data[jA] >= strength_threshold * row_scale)

454:                   {

455:                      S_temp_diag_j[jA] = -1;

456:                      --jS_diag;

457:                   }

458:                   else

459:                   {

460:                      S_temp_diag_j[jA] = A_diag_j[jA];

461:                   }

462:                }

463:                for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

464:                {

465:                   if (A_offd_data[jA] >= strength_threshold * row_scale)

466:                   {

467:                      S_temp_offd_j[jA] = -1;

468:                      --jS_offd;

469:                   }

470:                   else

471:                   {

472:                      S_temp_offd_j[jA] = A_offd_j[jA];

[...]

480:    hypre_prefix_sum_pair(&jS_diag, S_diag_i + num_variables, &jS_offd, S_offd_i + num_variables, prefix_sum_workspace);

[...]

492:    for (i = start; i < stop; i++)

493:    {

494:       S_diag_i[i] += jS_diag;

495:       S_offd_i[i] += jS_offd;

496:

497:       jS = S_diag_i[i];

498:       for (jA = A_diag_i[i]; jA < A_diag_i[i+1]; jA++)

499:       {

500:          if (S_temp_diag_j[jA] > -1)

501:          {

502:             S_diag_j[jS]    = S_temp_diag_j[jA];

503:             jS++;

504:          }

505:       }

506:

507:       jS = S_offd_i[i];

508:       for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

509:       {

510:          if (S_temp_offd_j[jA] > -1)

511:          {

512:             S_offd_j[jS]    = S_temp_offd_j[jA];

513:             jS++;

0x4c4ecc STP	X29, X30, [SP, #816]!

0x4c4ed0 ORR	X3, XZR, X0

0x4c4ed4 ADD	X29, SP, #0

0x4c4ed8 ADD	X1, SP, #184

0x4c4edc ADD	X0, SP, #176

0x4c4ee0 STP	X19, X20, [SP, #16]

0x4c4ee4 STP	X21, X22, [SP, #32]

0x4c4ee8 STP	X23, X24, [SP, #48]

0x4c4eec STP	X25, X26, [SP, #64]

0x4c4ef0 STP	X27, X28, [SP, #80]

0x4c4ef4 STP	D14, D15, [SP, #96]

0x4c4ef8 LDP	X11, X2, [X3, #80]

0x4c4efc LDP	D15, D14, [X3]

0x4c4f00 STP	X11, X2, [SP, #152]

0x4c4f04 ORR	X2, XZR, X11

0x4c4f08 LDP	X4, X21, [X3, #16]

0x4c4f0c STR	X4, [SP, #168]

0x4c4f10 LDP	X10, X22, [X3, #32]

0x4c4f14 STR	X10, [SP, #144]

0x4c4f18 LDP	X7, X23, [X3, #48]

0x4c4f1c STR	X7, [SP, #136]

0x4c4f20 LDP	X8, X28, [X3, #96]

0x4c4f24 LDP	X25, X24, [X3, #64]

0x4c4f28 STR	X8, [SP, #128]

0x4c4f2c LDP	X9, X27, [X3, #112]

0x4c4f30 STR	X9, [SP, #120]

0x4c4f34 LDP	X26, X5, [X3, #128]

0x4c4f38 STR	X5, [SP, #112]

0x4c4f3c LDP	X19, X20, [X3, #144]

0x4c4f40 BL	5499e0

0x4c4f44 LDP	X5, X30, [SP, #176]

0x4c4f48 STP	XZR, XZR, [SP, #192]

0x4c4f4c CMP	X5, X30

0x4c4f50 LDR	X14, [SP, #152]

0x4c4f54 LDP	X9, X8, [SP, #120]

0x4c4f58 LDP	X11, X10, [SP, #136]

0x4c4f5c B.GE	4c54c4

0x4c4f60 UBFM	X1, X5, #61, #60

0x4c4f64 FMOV	D31, #1.0000000

0x4c4f68 ADD	X12, X11, X5,LSL #3

0x4c4f6c MOVZ	X3, #0

0x4c4f70 ADD	X0, X1, #8

0x4c4f74 MOVN	X13, #0

0x4c4f78 LDP	X15, X16, [SP, #160]

0x4c4f7c MOVZ	X2, #0

0x4c4f80 ADD	X4, X11, X0

0x4c4f84 ADD	X1, X10, X0

0x4c4f88 FCMPE	D14, D31

0x4c4f8c CSINC	W18, WZR, WZR, #5

0x4c4f90 STP	X27, X28, [SP, #120]

0x4c4f94 STP	X14, X11, [SP, #136]

0x4c4f98 STR	X10, [SP, #152]

0x4c4f9c HINT	#0

    (2322) 0x4c4fa0 STR	X2, [X8, X5,LSL #3]

    (2322) 0x4c4fa4 CBZ	X15, 4c4fac

    (2322) 0x4c4fa8 STR	X3, [X9, X5,LSL #3]

    (2322) 0x4c4fac LDP	X6, X7, [X1, #1016]

    (2322) 0x4c4fb0 UBFM	X10, X6, #61, #60

    (2322) 0x4c4fb4 ADD	X0, X6, #1

    (2322) 0x4c4fb8 LDR	D29, [X22, X10]

    (2322) 0x4c4fbc CMP	X16, #1

    (2322) 0x4c4fc0 B.LE	4c55fc

    (2322) 0x4c4fc4 FCMPE	D29, #0

    (2322) 0x4c4fc8 B.MI	4c5be4

  (2338) 0x4c4fcc CMP	X0, X7

  (2338) 0x4c4fd0 B.GE	4c68dc

  (2338) 0x4c4fd4 SUB	X17, X7, X0

  (2338) 0x4c4fd8 LDR	X11, [X21, X5,LSL #3]

  (2338) 0x4c4fdc MOVI	D16, #0

  (2338) 0x4c4fe0 FMOV	D30, D29

  (2338) 0x4c4fe4 ANDS	X14, X17, #4224

  (2338) 0x4c4fe8 B.EQ	4c50bc

      (2340) 0x4c4fec CMP	X14, #1

      (2340) 0x4c4ff0 B.EQ	4c5094

    (2342) 0x4c4ff4 CMP	X14, #2

    (2342) 0x4c4ff8 B.EQ	4c5080

    (2342) 0x4c4ffc CMP	X14, #3

    (2342) 0x4c5000 B.EQ	4c506c

    (2342) 0x4c5004 CMP	X14, #4

    (2342) 0x4c5008 B.EQ	4c5058

    (2342) 0x4c500c CMP	X14, #5

    (2342) 0x4c5010 B.EQ	4c5044

    (2342) 0x4c5014 CMP	X14, #6

    (2342) 0x4c5018 B.EQ	4c5030

    (2342) 0x4c501c LDR	X27, [X25, X0,LSL #3]

    (2342) 0x4c5020 LDR	X28, [X21, X27,LSL #3]

    (2342) 0x4c5024 CMP	X11, X28

    (2342) 0x4c5028 B.EQ	4c692c

    (2342) 0x4c502c ADD	X0, X0, #1

    (2342) 0x4c5030 LDR	X17, [X25, X0,LSL #3]

    (2342) 0x4c5034 LDR	X14, [X21, X17,LSL #3]

    (2342) 0x4c5038 CMP	X11, X14

    (2342) 0x4c503c B.EQ	4c68bc

    (2342) 0x4c5040 ADD	X0, X0, #1

    (2342) 0x4c5044 LDR	X27, [X25, X0,LSL #3]

    (2342) 0x4c5048 LDR	X28, [X21, X27,LSL #3]

    (2342) 0x4c504c CMP	X11, X28

    (2342) 0x4c5050 B.EQ	4c680c

    (2342) 0x4c5054 ADD	X0, X0, #1

    (2342) 0x4c5058 LDR	X17, [X25, X0,LSL #3]

    (2342) 0x4c505c LDR	X14, [X21, X17,LSL #3]

    (2342) 0x4c5060 CMP	X11, X14

    (2342) 0x4c5064 B.EQ	4c676c

    (2342) 0x4c5068 ADD	X0, X0, #1

    (2342) 0x4c506c LDR	X27, [X25, X0,LSL #3]

    (2342) 0x4c5070 LDR	X28, [X21, X27,LSL #3]

    (2342) 0x4c5074 CMP	X11, X28

    (2342) 0x4c5078 B.EQ	4c55c0

    (2342) 0x4c507c ADD	X0, X0, #1

    (2342) 0x4c5080 LDR	X17, [X25, X0,LSL #3]

    (2342) 0x4c5084 LDR	X14, [X21, X17,LSL #3]

    (2342) 0x4c5088 CMP	X11, X14

    (2342) 0x4c508c B.EQ	4c55b0

    (2342) 0x4c5090 ADD	X0, X0, #1

      (2340) 0x4c5094 LDR	X27, [X25, X0,LSL #3]

      (2340) 0x4c5098 LDR	X28, [X21, X27,LSL #3]

      (2340) 0x4c509c CMP	X11, X28

      (2340) 0x4c50a0 B.NE	4c50b0

(2323) 0x4c50a4 LDR	D5, [X22, X0,LSL #3]

(2323) 0x4c50a8 FMINNM	D16, D16, D5

(2323) 0x4c50ac FADD	D30, D30, D5

(2323) 0x4c50b0 ADD	X0, X0, #1

(2323) 0x4c50b4 CMP	X0, X7

(2323) 0x4c50b8 B.EQ	4c51c4

    (2339) 0x4c50bc LDR	X17, [X25, X0,LSL #3]

    (2339) 0x4c50c0 LDR	X14, [X21, X17,LSL #3]

    (2339) 0x4c50c4 CMP	X11, X14

    (2339) 0x4c50c8 B.NE	4c50d8

    (2339) 0x4c50cc LDR	D22, [X22, X0,LSL #3]

    (2339) 0x4c50d0 FMINNM	D16, D16, D22

    (2339) 0x4c50d4 FADD	D30, D30, D22

    (2339) 0x4c50d8 ADD	X0, X0, #1

    (2339) 0x4c50dc LDR	X27, [X25, X0,LSL #3]

    (2339) 0x4c50e0 LDR	X28, [X21, X27,LSL #3]

    (2339) 0x4c50e4 CMP	X11, X28

    (2339) 0x4c50e8 B.NE	4c50f8

    (2339) 0x4c50ec LDR	D23, [X22, X0,LSL #3]

    (2339) 0x4c50f0 FMINNM	D16, D16, D23

    (2339) 0x4c50f4 FADD	D30, D30, D23

    (2339) 0x4c50f8 ADD	X14, X0, #1

    (2339) 0x4c50fc LDR	X17, [X25, X14,LSL #3]

    (2339) 0x4c5100 LDR	X27, [X21, X17,LSL #3]

    (2339) 0x4c5104 CMP	X11, X27

    (2339) 0x4c5108 B.NE	4c5118

    (2339) 0x4c510c LDR	D17, [X22, X14,LSL #3]

    (2339) 0x4c5110 FMINNM	D16, D16, D17

    (2339) 0x4c5114 FADD	D30, D30, D17

    (2339) 0x4c5118 ADD	X28, X0, #2

    (2339) 0x4c511c LDR	X14, [X25, X28,LSL #3]

    (2339) 0x4c5120 LDR	X17, [X21, X14,LSL #3]

    (2339) 0x4c5124 CMP	X11, X17

    (2339) 0x4c5128 B.NE	4c5138

    (2339) 0x4c512c LDR	D25, [X22, X28,LSL #3]

    (2339) 0x4c5130 FMINNM	D16, D16, D25

    (2339) 0x4c5134 FADD	D30, D30, D25

    (2339) 0x4c5138 ADD	X27, X0, #3

    (2339) 0x4c513c LDR	X28, [X25, X27,LSL #3]

    (2339) 0x4c5140 LDR	X14, [X21, X28,LSL #3]

    (2339) 0x4c5144 CMP	X11, X14

    (2339) 0x4c5148 B.NE	4c5158

    (2339) 0x4c514c LDR	D26, [X22, X27,LSL #3]

    (2339) 0x4c5150 FMINNM	D16, D16, D26

    (2339) 0x4c5154 FADD	D30, D30, D26

    (2339) 0x4c5158 ADD	X27, X0, #4

    (2339) 0x4c515c LDR	X17, [X25, X27,LSL #3]

    (2339) 0x4c5160 LDR	X28, [X21, X17,LSL #3]

    (2339) 0x4c5164 CMP	X11, X28

    (2339) 0x4c5168 B.NE	4c5178

    (2339) 0x4c516c LDR	D4, [X22, X27,LSL #3]

    (2339) 0x4c5170 FMINNM	D16, D16, D4

    (2339) 0x4c5174 FADD	D30, D30, D4

    (2339) 0x4c5178 ADD	X14, X0, #5

    (2339) 0x4c517c LDR	X27, [X25, X14,LSL #3]

    (2339) 0x4c5180 LDR	X17, [X21, X27,LSL #3]

    (2339) 0x4c5184 CMP	X11, X17

    (2339) 0x4c5188 B.NE	4c5198

    (2339) 0x4c518c LDR	D19, [X22, X14,LSL #3]

    (2339) 0x4c5190 FMINNM	D16, D16, D19

    (2339) 0x4c5194 FADD	D30, D30, D19

    (2339) 0x4c5198 ADD	X28, X0, #6

    (2339) 0x4c519c LDR	X14, [X25, X28,LSL #3]

    (2339) 0x4c51a0 LDR	X27, [X21, X14,LSL #3]

    (2339) 0x4c51a4 CMP	X11, X27

    (2339) 0x4c51a8 B.NE	4c51b8

    (2339) 0x4c51ac LDR	D6, [X22, X28,LSL #3]

    (2339) 0x4c51b0 FMINNM	D16, D16, D6

    (2339) 0x4c51b4 FADD	D30, D30, D6

    (2339) 0x4c51b8 ADD	X0, X0, #7

    (2339) 0x4c51bc CMP	X0, X7

    (2339) 0x4c51c0 B.NE	4c50bc

  (2338) 0x4c51c4 LDR	X17, [X4]

  (2338) 0x4c51c8 LDR	X14, [X12]

  (2338) 0x4c51cc CMP	X14, X17

  (2338) 0x4c51d0 B.GE	4c53c0

(2323) 0x4c51d4 SUB	X28, X17, X14

(2323) 0x4c51d8 LDR	X11, [X21, X5,LSL #3]

(2323) 0x4c51dc ORR	X0, XZR, X14

(2323) 0x4c51e0 ANDS	X27, X28, #4224

(2323) 0x4c51e4 B.EQ	4c52b8

(2323) 0x4c51e8 CMP	X27, #1

(2323) 0x4c51ec B.EQ	4c5290

(2323) 0x4c51f0 CMP	X27, #2

(2323) 0x4c51f4 B.EQ	4c527c

(2323) 0x4c51f8 CMP	X27, #3

(2323) 0x4c51fc B.EQ	4c5268

(2323) 0x4c5200 CMP	X27, #4

(2323) 0x4c5204 B.EQ	4c5254

(2323) 0x4c5208 CMP	X27, #5

(2323) 0x4c520c B.EQ	4c5240

(2323) 0x4c5210 CMP	X27, #6

(2323) 0x4c5214 B.EQ	4c522c

(2323) 0x4c5218 LDR	X0, [X24, X14,LSL #3]

(2323) 0x4c521c LDR	X28, [X26, X0,LSL #3]

(2323) 0x4c5220 CMP	X28, X11

(2323) 0x4c5224 B.EQ	4c6940

(2323) 0x4c5228 ADD	X0, X14, #1

(2323) 0x4c522c LDR	X27, [X24, X0,LSL #3]

(2323) 0x4c5230 LDR	X28, [X26, X27,LSL #3]

(2323) 0x4c5234 CMP	X28, X11

(2323) 0x4c5238 B.EQ	4c68cc

(2323) 0x4c523c ADD	X0, X0, #1

(2323) 0x4c5240 LDR	X27, [X24, X0,LSL #3]

(2323) 0x4c5244 LDR	X28, [X26, X27,LSL #3]

(2323) 0x4c5248 CMP	X28, X11

(2323) 0x4c524c B.EQ	4c67fc

(2323) 0x4c5250 ADD	X0, X0, #1

(2323) 0x4c5254 LDR	X27, [X24, X0,LSL #3]

(2323) 0x4c5258 LDR	X28, [X26, X27,LSL #3]

(2323) 0x4c525c CMP	X28, X11

(2323) 0x4c5260 B.EQ	4c675c

(2323) 0x4c5264 ADD	X0, X0, #1

(2323) 0x4c5268 LDR	X27, [X24, X0,LSL #3]

(2323) 0x4c526c LDR	X28, [X26, X27,LSL #3]

(2323) 0x4c5270 CMP	X28, X11

(2323) 0x4c5274 B.EQ	4c55e0

(2323) 0x4c5278 ADD	X0, X0, #1

(2323) 0x4c527c LDR	X27, [X24, X0,LSL #3]

(2323) 0x4c5280 LDR	X28, [X26, X27,LSL #3]

(2323) 0x4c5284 CMP	X28, X11

(2323) 0x4c5288 B.EQ	4c55d0

(2323) 0x4c528c ADD	X0, X0, #1

(2323) 0x4c5290 LDR	X27, [X24, X0,LSL #3]

(2323) 0x4c5294 LDR	X28, [X26, X27,LSL #3]

(2323) 0x4c5298 CMP	X28, X11

(2323) 0x4c529c B.NE	4c52ac

(2323) 0x4c52a0 LDR	D21, [X23, X0,LSL #3]

(2323) 0x4c52a4 FMINNM	D16, D16, D21

(2323) 0x4c52a8 FADD	D30, D30, D21

(2323) 0x4c52ac ADD	X0, X0, #1

(2323) 0x4c52b0 CMP	X0, X17

(2323) 0x4c52b4 B.EQ	4c53c0

  (2347) 0x4c52b8 LDR	X27, [X24, X0,LSL #3]

  (2347) 0x4c52bc LDR	X28, [X26, X27,LSL #3]

  (2347) 0x4c52c0 CMP	X28, X11

  (2347) 0x4c52c4 B.NE	4c52d4

  (2347) 0x4c52c8 LDR	D7, [X23, X0,LSL #3]

  (2347) 0x4c52cc FMINNM	D16, D16, D7

  (2347) 0x4c52d0 FADD	D30, D30, D7

  (2347) 0x4c52d4 ADD	X0, X0, #1

  (2347) 0x4c52d8 LDR	X27, [X24, X0,LSL #3]

  (2347) 0x4c52dc LDR	X28, [X26, X27,LSL #3]

  (2347) 0x4c52e0 CMP	X28, X11

  (2347) 0x4c52e4 B.NE	4c52f4

  (2347) 0x4c52e8 LDR	D20, [X23, X0,LSL #3]

  (2347) 0x4c52ec FMINNM	D16, D16, D20

  (2347) 0x4c52f0 FADD	D30, D30, D20

  (2347) 0x4c52f4 ADD	X27, X0, #1

  (2347) 0x4c52f8 LDR	X28, [X24, X27,LSL #3]

  (2347) 0x4c52fc LDR	X28, [X26, X28,LSL #3]

  (2347) 0x4c5300 CMP	X28, X11

  (2347) 0x4c5304 B.NE	4c5314

  (2347) 0x4c5308 LDR	D2, [X23, X27,LSL #3]

  (2347) 0x4c530c FMINNM	D16, D16, D2

  (2347) 0x4c5310 FADD	D30, D30, D2

  (2347) 0x4c5314 ADD	X27, X0, #2

  (2347) 0x4c5318 LDR	X28, [X24, X27,LSL #3]

  (2347) 0x4c531c LDR	X28, [X26, X28,LSL #3]

  (2347) 0x4c5320 CMP	X28, X11

  (2347) 0x4c5324 B.NE	4c5334

  (2347) 0x4c5328 LDR	D0, [X23, X27,LSL #3]

  (2347) 0x4c532c FMINNM	D16, D16, D0

  (2347) 0x4c5330 FADD	D30, D30, D0

  (2347) 0x4c5334 ADD	X27, X0, #3

  (2347) 0x4c5338 LDR	X28, [X24, X27,LSL #3]

  (2347) 0x4c533c LDR	X28, [X26, X28,LSL #3]

  (2347) 0x4c5340 CMP	X28, X11

  (2347) 0x4c5344 B.NE	4c5354

  (2347) 0x4c5348 LDR	D28, [X23, X27,LSL #3]

  (2347) 0x4c534c FMINNM	D16, D16, D28

  (2347) 0x4c5350 FADD	D30, D30, D28

  (2347) 0x4c5354 ADD	X27, X0, #4

  (2347) 0x4c5358 LDR	X28, [X24, X27,LSL #3]

  (2347) 0x4c535c LDR	X28, [X26, X28,LSL #3]

  (2347) 0x4c5360 CMP	X28, X11

  (2347) 0x4c5364 B.NE	4c5374

  (2347) 0x4c5368 LDR	D5, [X23, X27,LSL #3]

  (2347) 0x4c536c FMINNM	D16, D16, D5

  (2347) 0x4c5370 FADD	D30, D30, D5

  (2347) 0x4c5374 ADD	X27, X0, #5

  (2347) 0x4c5378 LDR	X28, [X24, X27,LSL #3]

  (2347) 0x4c537c LDR	X28, [X26, X28,LSL #3]

  (2347) 0x4c5380 CMP	X28, X11

  (2347) 0x4c5384 B.NE	4c5394

  (2347) 0x4c5388 LDR	D22, [X23, X27,LSL #3]

  (2347) 0x4c538c FMINNM	D16, D16, D22

  (2347) 0x4c5390 FADD	D30, D30, D22

  (2347) 0x4c5394 ADD	X27, X0, #6

  (2347) 0x4c5398 LDR	X28, [X24, X27,LSL #3]

  (2347) 0x4c539c LDR	X28, [X26, X28,LSL #3]

  (2347) 0x4c53a0 CMP	X28, X11

  (2347) 0x4c53a4 B.NE	4c53b4

  (2347) 0x4c53a8 LDR	D23, [X23, X27,LSL #3]

  (2347) 0x4c53ac FMINNM	D16, D16, D23

  (2347) 0x4c53b0 FADD	D30, D30, D23

  (2347) 0x4c53b4 ADD	X0, X0, #7

  (2347) 0x4c53b8 CMP	X0, X17

  (2347) 0x4c53bc B.NE	4c52b8

(2323) 0x4c53c0 FABS	D29, D29

(2323) 0x4c53c4 SUB	X7, X7, X6

(2323) 0x4c53c8 FABS	D17, D30

(2323) 0x4c53cc STR	X13, [X19, X10]

(2323) 0x4c53d0 SUB	X10, X17, X14

(2323) 0x4c53d4 SUB	X6, X7, #1

(2323) 0x4c53d8 CMP	W18, #0

(2323) 0x4c53dc ADD	X2, X2, X6

(2323) 0x4c53e0 LDP	X17, X6, [X1, #1016]

(2323) 0x4c53e4 ADD	X3, X3, X10

(2323) 0x4c53e8 FMUL	D25, D29, D14

(2323) 0x4c53ec ADD	X17, X17, #1

(2323) 0x4c53f0 FCCMPE	D25, D17, #0, #1

(2323) 0x4c53f4 B.MI	4c66a8

(2323) 0x4c53f8 FMUL	D26, D15, D16

(2323) 0x4c53fc CMP	X17, X6

(2323) 0x4c5400 B.GE	4c5440

  (2346) 0x4c5404 LDR	D4, [X22, X17,LSL #3]

  (2346) 0x4c5408 FCMPE	D26, D4

  (2346) 0x4c540c B.LS	4c5424

  (2346) 0x4c5410 LDR	X27, [X25, X17,LSL #3]

  (2346) 0x4c5414 LDR	X14, [X21, X5,LSL #3]

  (2346) 0x4c5418 LDR	X11, [X21, X27,LSL #3]

  (2346) 0x4c541c CMP	X11, X14

  (2346) 0x4c5420 B.EQ	4c542c

  (2346) 0x4c5424 SUB	X2, X2, #1

  (2346) 0x4c5428 MOVN	X27, #0

  (2346) 0x4c542c STR	X27, [X19, X17,LSL #3]

  (2346) 0x4c5430 ADD	X17, X17, #1

  (2346) 0x4c5434 LDR	X28, [X1]

  (2346) 0x4c5438 CMP	X28, X17

  (2346) 0x4c543c B.GT	4c5404

(2323) 0x4c5440 LDR	X7, [X4]

(2323) 0x4c5444 LDR	X0, [X12]

(2323) 0x4c5448 CMP	X0, X7

(2323) 0x4c544c B.GE	4c549c

(2323) 0x4c5450 FMUL	D19, D15, D16

(2323) 0x4c5454 HINT	#0

(2323) 0x4c5458 HINT	#0

(2323) 0x4c545c HINT	#0

  (2345) 0x4c5460 LDR	D6, [X23, X0,LSL #3]

  (2345) 0x4c5464 FCMPE	D19, D6

  (2345) 0x4c5468 B.LS	4c5480

  (2345) 0x4c546c LDR	X6, [X24, X0,LSL #3]

  (2345) 0x4c5470 LDR	X17, [X21, X5,LSL #3]

  (2345) 0x4c5474 LDR	X10, [X26, X6,LSL #3]

  (2345) 0x4c5478 CMP	X10, X17

  (2345) 0x4c547c B.EQ	4c5488

  (2345) 0x4c5480 SUB	X3, X3, #1

  (2345) 0x4c5484 MOVN	X6, #0

  (2345) 0x4c5488 STR	X6, [X20, X0,LSL #3]

  (2345) 0x4c548c ADD	X0, X0, #1

  (2345) 0x4c5490 LDR	X14, [X4]

  (2345) 0x4c5494 CMP	X14, X0

  (2345) 0x4c5498 B.GT	4c5460

    (2322) 0x4c549c ADD	X5, X5, #1

    (2322) 0x4c54a0 ADD	X12, X12, #8

    (2322) 0x4c54a4 ADD	X4, X4, #8

    (2322) 0x4c54a8 ADD	X1, X1, #8

    (2322) 0x4c54ac CMP	X5, X30

    (2322) 0x4c54b0 B.NE	4c4fa0

(2323) 0x4c54b4 LDR	X10, [SP, #152]

(2323) 0x4c54b8 LDP	X27, X28, [SP, #120]

(2323) 0x4c54bc LDP	X14, X11, [SP, #136]

(2323) 0x4c54c0 STP	X2, X3, [SP, #192]

(2323) 0x4c54c4 ADD	X3, X9, X14,LSL #3

(2323) 0x4c54c8 ADD	X2, SP, #200

(2323) 0x4c54cc ADD	X0, SP, #192

(2323) 0x4c54d0 ADD	X1, X8, X14,LSL #3

(2323) 0x4c54d4 LDR	X4, [SP, #112]

(2323) 0x4c54d8 STP	X8, X9, [SP, #112]

(2323) 0x4c54dc STP	X11, X10, [SP, #128]

(2323) 0x4c54e0 BL	54ab84

(2323) 0x4c54e4 LDP	X12, X15, [SP, #176]

(2323) 0x4c54e8 CMP	X12, X15

(2323) 0x4c54ec B.GE	4c5590

(2323) 0x4c54f0 LDP	X16, X18, [SP, #128]

(2323) 0x4c54f4 LDP	X8, X9, [SP, #112]

(2323) 0x4c54f8 ADD	X22, X18, #8

(2323) 0x4c54fc ADD	X23, X16, #8

(2323) 0x4c5500 LDP	X21, X13, [SP, #192]

  (2348) 0x4c5504 LDR	X2, [X8, X12,LSL #3]

  (2348) 0x4c5508 ADD	X3, X2, X21

  (2348) 0x4c550c STR	X3, [X8, X12,LSL #3]

  (2348) 0x4c5510 LDR	X0, [X9, X12,LSL #3]

  (2348) 0x4c5514 ADD	X17, X13, X0

  (2348) 0x4c5518 STR	X17, [X9, X12,LSL #3]

  (2348) 0x4c551c LDR	X25, [X18, X12,LSL #3]

  (2348) 0x4c5520 LDR	X30, [X22, X12,LSL #3]

  (2348) 0x4c5524 LDR	X26, [X8, X12,LSL #3]

  (2348) 0x4c5528 CMP	X25, X30

  (2348) 0x4c552c B.GE	4c5554

    (2351) 0x4c5530 LDR	X24, [X19, X25,LSL #3]

    (2351) 0x4c5534 ADD	X25, X25, #1

    (2351) 0x4c5538 TBNZ	X24, #63, 4c55f0

    (2351) 0x4c553c STR	X24, [X28, X26,LSL #3]

    (2351) 0x4c5540 ADD	X26, X26, #1

    (2351) 0x4c5544 LDR	X30, [X22, X12,LSL #3]

    (2351) 0x4c5548 CMP	X30, X25

    (2351) 0x4c554c B.GT	4c5530

  (2348) 0x4c5550 LDR	X17, [X9, X12,LSL #3]

  (2348) 0x4c5554 LDR	X6, [X16, X12,LSL #3]

  (2348) 0x4c5558 LDR	X5, [X23, X12,LSL #3]

    (2349) 0x4c555c CMP	X6, X5

    (2349) 0x4c5560 B.GE	4c5584

      (2350) 0x4c5564 LDR	X7, [X20, X6,LSL #3]

      (2350) 0x4c5568 ADD	X6, X6, #1

      (2350) 0x4c556c TBNZ	X7, #63, 4c555c

      (2350) 0x4c5570 STR	X7, [X27, X17,LSL #3]

      (2350) 0x4c5574 ADD	X17, X17, #1

      (2350) 0x4c5578 LDR	X5, [X23, X12,LSL #3]

      (2350) 0x4c557c CMP	X5, X6

      (2350) 0x4c5580 B.GT	4c5564

  (2348) 0x4c5584 ADD	X12, X12, #1

  (2348) 0x4c5588 CMP	X12, X15

  (2348) 0x4c558c B.NE	4c5504

(2323) 0x4c5590 LDP	D14, D15, [SP, #96]

(2323) 0x4c5594 LDP	X19, X20, [SP, #16]

(2323) 0x4c5598 LDP	X21, X22, [SP, #32]

(2323) 0x4c559c LDP	X23, X24, [SP, #48]

(2323) 0x4c55a0 LDP	X25, X26, [SP, #64]

(2323) 0x4c55a4 LDP	X27, X28, [SP, #80]

(2323) 0x4c55a8 LDP	X29, X30, [SP], #208

(2323) 0x4c55ac RET

  (2341) 0x4c55b0 LDR	D28, [X22, X0,LSL #3]

  (2341) 0x4c55b4 FMINNM	D16, D16, D28

  (2341) 0x4c55b8 FADD	D30, D30, D28

  (2341) 0x4c55bc B	4c5090

    (2342) 0x4c55c0 LDR	D0, [X22, X0,LSL #3]

    (2342) 0x4c55c4 FMINNM	D16, D16, D0

    (2342) 0x4c55c8 FADD	D30, D30, D0

    (2342) 0x4c55cc B	4c507c

(2323) 0x4c55d0 LDR	D18, [X23, X0,LSL #3]

(2323) 0x4c55d4 FMINNM	D16, D16, D18

(2323) 0x4c55d8 FADD	D30, D30, D18

(2323) 0x4c55dc B	4c528c

(2323) 0x4c55e0 LDR	D31, [X23, X0,LSL #3]

(2323) 0x4c55e4 FMINNM	D16, D16, D31

(2323) 0x4c55e8 FADD	D30, D30, D31

(2323) 0x4c55ec B	4c5278

    (2351) 0x4c55f0 CMP	X25, X30

    (2351) 0x4c55f4 B.LT	4c5530

  (2348) 0x4c55f8 B	4c5550

    (2322) 0x4c55fc FCMPE	D29, #0

    (2322) 0x4c5600 B.MI	4c60c8

    (2322) 0x4c5604 CMP	X0, X7

    (2322) 0x4c5608 B.GE	4c68f4

    (2322) 0x4c560c SUB	X27, X7, X6

    (2322) 0x4c5610 SUB	X14, X27, #2

    (2322) 0x4c5614 SUB	X11, X27, #1

    (2322) 0x4c5618 CMP	X14, #6

    (2322) 0x4c561c B.LS	4c6974

    (2322) 0x4c5620 UBFM	X14, X11, #3, #63

    (2322) 0x4c5624 MOVI	V20.2D, #0

    (2322) 0x4c5628 ADD	X28, X10, #8

    (2322) 0x4c562c UBFM	X17, X14, #58, #57

    (2322) 0x4c5630 ADD	X6, X22, X28

    (2322) 0x4c5634 SUB	X17, X17, #64

    (2322) 0x4c5638 ADD	X14, X6, X14,LSL #6

    (2322) 0x4c563c UBFM	X17, X17, #6, #63

    (2322) 0x4c5640 ADD	X17, X17, #1

    (2322) 0x4c5644 ORR	V6.16B, V20.16B, V20.16B

    (2322) 0x4c5648 ORR	V5.16B, V20.16B, V20.16B

    (2322) 0x4c564c ANDS	X17, X17, #4160

    (2322) 0x4c5650 ORR	V30.16B, V20.16B, V20.16B

    (2322) 0x4c5654 ORR	V7.16B, V20.16B, V20.16B

    (2322) 0x4c5658 ORR	V24.16B, V20.16B, V20.16B

    (2322) 0x4c565c ORR	V23.16B, V20.16B, V20.16B

    (2322) 0x4c5660 ORR	V28.16B, V20.16B, V20.16B

    (2322) 0x4c5664 B.EQ	4c56d8

    (2322) 0x4c5668 CMP	X17, #1

    (2322) 0x4c566c B.EQ	4c56a4

    (2322) 0x4c5670 CMP	X17, #2

    (2322) 0x4c5674 B.NE	4c67ac

    (2322) 0x4c5678 LDP	Q22, Q25, [X6]

    (2322) 0x4c567c LDP	Q26, Q0, [X6, #32]

    (2322) 0x4c5680 ADD	X6, X6, #64

    (2322) 0x4c5684 FMINNM	V28.2D, V28.2D, V22.2D

    (2322) 0x4c5688 FADD	V30.2D, V30.2D, V22.2D

    (2322) 0x4c568c FMINNM	V23.2D, V23.2D, V25.2D

    (2322) 0x4c5690 FADD	V5.2D, V5.2D, V25.2D

    (2322) 0x4c5694 FMINNM	V24.2D, V24.2D, V26.2D

    (2322) 0x4c5698 FADD	V6.2D, V6.2D, V26.2D

    (2322) 0x4c569c FMINNM	V7.2D, V7.2D, V0.2D

    (2322) 0x4c56a0 FADD	V20.2D, V20.2D, V0.2D

    (2322) 0x4c56a4 LDP	Q1, Q2, [X6]

    (2322) 0x4c56a8 LDP	Q3, Q4, [X6, #32]

    (2322) 0x4c56ac ADD	X6, X6, #64

    (2322) 0x4c56b0 FMINNM	V28.2D, V28.2D, V1.2D

    (2322) 0x4c56b4 FADD	V30.2D, V30.2D, V1.2D

    (2322) 0x4c56b8 FMINNM	V23.2D, V23.2D, V2.2D

    (2322) 0x4c56bc FADD	V5.2D, V5.2D, V2.2D

    (2322) 0x4c56c0 FMINNM	V24.2D, V24.2D, V3.2D

    (2322) 0x4c56c4 FADD	V6.2D, V6.2D, V3.2D

    (2322) 0x4c56c8 FMINNM	V7.2D, V7.2D, V4.2D

    (2322) 0x4c56cc FADD	V20.2D, V20.2D, V4.2D

    (2322) 0x4c56d0 CMP	X6, X14

    (2322) 0x4c56d4 B.EQ	4c57a0

    (2322) 0x4c56d8 STR	X0, [SP, #160]

      (2333) 0x4c56dc LDP	Q31, Q18, [X6, #32]

      (2333) 0x4c56e0 ADD	X0, X6, #64

      (2333) 0x4c56e4 ADD	X28, X6, #128

      (2333) 0x4c56e8 ADD	X17, X6, #192

      (2333) 0x4c56ec LDP	Q16, Q17, [X6]

      (2333) 0x4c56f0 ADD	X6, X6, #256

      (2333) 0x4c56f4 LDP	Q21, Q22, [X0, #16]

      (2333) 0x4c56f8 FMINNM	V2.2D, V24.2D, V31.2D

      (2333) 0x4c56fc FADD	V26.2D, V6.2D, V31.2D

      (2333) 0x4c5700 FMINNM	V19.2D, V23.2D, V17.2D

      (2333) 0x4c5704 FMINNM	V3.2D, V7.2D, V18.2D

      (2333) 0x4c5708 LDP	Q23, Q7, [X0, #48]

      (2333) 0x4c570c FADD	V25.2D, V5.2D, V17.2D

      (2333) 0x4c5710 FADD	V27.2D, V20.2D, V18.2D

      (2333) 0x4c5714 FADD	V5.2D, V26.2D, V22.2D

      (2333) 0x4c5718 FMINNM	V0.2D, V28.2D, V16.2D

      (2333) 0x4c571c FADD	V1.2D, V30.2D, V16.2D

      (2333) 0x4c5720 FMINNM	V30.2D, V2.2D, V22.2D

      (2333) 0x4c5724 LDUR	Q22, [X6, #320]

      (2333) 0x4c5728 FMINNM	V4.2D, V19.2D, V21.2D

      (2333) 0x4c572c LDP	Q24, Q6, [X28, #16]

      (2333) 0x4c5730 FMINNM	V16.2D, V3.2D, V23.2D

      (2333) 0x4c5734 FADD	V17.2D, V27.2D, V23.2D

      (2333) 0x4c5738 LDR	Q27, [X28, #48]

      (2333) 0x4c573c FADD	V28.2D, V25.2D, V21.2D

      (2333) 0x4c5740 FMINNM	V0.2D, V0.2D, V22.2D

      (2333) 0x4c5744 LDUR	Q3, [X6, #448]

      (2333) 0x4c5748 FADD	V1.2D, V1.2D, V22.2D

      (2333) 0x4c574c LDP	Q19, Q20, [X17, #16]

      (2333) 0x4c5750 FMINNM	V31.2D, V4.2D, V24.2D

      (2333) 0x4c5754 FADD	V25.2D, V28.2D, V24.2D

      (2333) 0x4c5758 FMINNM	V18.2D, V30.2D, V6.2D

      (2333) 0x4c575c FADD	V21.2D, V5.2D, V6.2D

      (2333) 0x4c5760 FMINNM	V2.2D, V0.2D, V7.2D

      (2333) 0x4c5764 FADD	V26.2D, V1.2D, V7.2D

      (2333) 0x4c5768 FMINNM	V4.2D, V16.2D, V27.2D

      (2333) 0x4c576c FADD	V16.2D, V17.2D, V27.2D

      (2333) 0x4c5770 LDR	Q17, [X17, #48]

      (2333) 0x4c5774 FMINNM	V24.2D, V18.2D, V20.2D

      (2333) 0x4c5778 FADD	V6.2D, V21.2D, V20.2D

      (2333) 0x4c577c FMINNM	V23.2D, V31.2D, V19.2D

      (2333) 0x4c5780 FADD	V5.2D, V25.2D, V19.2D

      (2333) 0x4c5784 FMINNM	V28.2D, V2.2D, V3.2D

      (2333) 0x4c5788 FADD	V30.2D, V26.2D, V3.2D

      (2333) 0x4c578c FMINNM	V7.2D, V4.2D, V17.2D

      (2333) 0x4c5790 FADD	V20.2D, V16.2D, V17.2D

      (2333) 0x4c5794 CMP	X6, X14

      (2333) 0x4c5798 B.NE	4c56dc

    (2322) 0x4c579c LDR	X0, [SP, #160]

    (2322) 0x4c57a0 FMINNM	V7.2D, V24.2D, V7.2D

    (2322) 0x4c57a4 AND	X14, X11, #7997

    (2322) 0x4c57a8 FADD	V30.2D, V30.2D, V5.2D

    (2322) 0x4c57ac ADD	X0, X0, X14

    (2322) 0x4c57b0 FADD	V24.2D, V6.2D, V20.2D

    (2322) 0x4c57b4 FMINNM	V28.2D, V28.2D, V23.2D

    (2322) 0x4c57b8 FADD	V6.2D, V24.2D, V30.2D

    (2322) 0x4c57bc FMINNM	V5.2D, V7.2D, V28.2D

    (2322) 0x4c57c0 FADDP	D23, V6.2D

    (2322) 0x4c57c4 FMINNMP	D31, V5.2D

    (2322) 0x4c57c8 FADD	D1, D29, D23

    (2322) 0x4c57cc ANDS	XZR, X11, #4224

    (2322) 0x4c57d0 B.EQ	4c5878

    (2322) 0x4c57d4 UBFM	X6, X0, #61, #60

    (2322) 0x4c57d8 ADD	X11, X0, #1

    (2322) 0x4c57dc LDR	D25, [X22, X6]

    (2322) 0x4c57e0 FMINNM	D31, D31, D25

    (2322) 0x4c57e4 FADD	D1, D1, D25

    (2322) 0x4c57e8 CMP	X11, X7

    (2322) 0x4c57ec B.GE	4c5878

    (2322) 0x4c57f0 ADD	X17, X22, X6

    (2322) 0x4c57f4 ADD	X28, X0, #2

    (2322) 0x4c57f8 LDR	D18, [X17, #8]

    (2322) 0x4c57fc FMINNM	D31, D31, D18

    (2322) 0x4c5800 FADD	D1, D1, D18

    (2322) 0x4c5804 CMP	X28, X7

    (2322) 0x4c5808 B.GE	4c5878

    (2322) 0x4c580c LDR	D21, [X17, #16]

    (2322) 0x4c5810 ADD	X14, X0, #3

    (2322) 0x4c5814 FMINNM	D31, D31, D21

    (2322) 0x4c5818 FADD	D1, D1, D21

    (2322) 0x4c581c CMP	X14, X7

    (2322) 0x4c5820 B.GE	4c5878

    (2322) 0x4c5824 LDR	D19, [X17, #24]

    (2322) 0x4c5828 ADD	X6, X0, #4

    (2322) 0x4c582c FMINNM	D31, D31, D19

    (2322) 0x4c5830 FADD	D1, D1, D19

    (2322) 0x4c5834 CMP	X6, X7

    (2322) 0x4c5838 B.GE	4c5878

    (2322) 0x4c583c LDR	D20, [X17, #32]

    (2322) 0x4c5840 ADD	X11, X0, #5

    (2322) 0x4c5844 FMINNM	D31, D31, D20

    (2322) 0x4c5848 FADD	D1, D1, D20

    (2322) 0x4c584c CMP	X11, X7

    (2322) 0x4c5850 B.GE	4c5878

    (2322) 0x4c5854 LDR	D22, [X17, #40]

    (2322) 0x4c5858 ADD	X0, X0, #6

    (2322) 0x4c585c FMINNM	D31, D31, D22

    (2322) 0x4c5860 FADD	D1, D1, D22

    (2322) 0x4c5864 CMP	X0, X7

    (2322) 0x4c5868 B.GE	4c5878

    (2322) 0x4c586c LDR	D0, [X17, #48]

    (2322) 0x4c5870 FMINNM	D31, D31, D0

    (2322) 0x4c5874 FADD	D1, D1, D0

    (2322) 0x4c5878 LDR	X6, [X4]

    (2322) 0x4c587c LDR	X14, [X12]

    (2322) 0x4c5880 SUB	X17, X6, X14

    (2322) 0x4c5884 CMP	X14, X6

    (2322) 0x4c5888 B.GE	4c5af0

    (2322) 0x4c588c SUB	X7, X17, #1

    (2322) 0x4c5890 CMP	X7, #6

    (2322) 0x4c5894 B.LS	4c5a4c

    (2322) 0x4c5898 UBFM	X7, X17, #3, #63

    (2322) 0x4c589c DUP	V30.2D, V31.D[0]

    (2322) 0x4c58a0 MOVI	V17.2D, #0

    (2322) 0x4c58a4 ADD	X0, X23, X14,LSL #3

    (2322) 0x4c58a8 UBFM	X28, X14, #61, #60

    (2322) 0x4c58ac UBFM	X11, X7, #58, #57

    (2322) 0x4c58b0 SUB	X11, X11, #64

    (2322) 0x4c58b4 ADD	X7, X0, X7,LSL #6

    (2322) 0x4c58b8 UBFM	X11, X11, #6, #63

    (2322) 0x4c58bc ADD	X11, X11, #1

    (2322) 0x4c58c0 ORR	V23.16B, V30.16B, V30.16B

    (2322) 0x4c58c4 ORR	V0.16B, V30.16B, V30.16B

    (2322) 0x4c58c8 ANDS	X11, X11, #4160

    (2322) 0x4c58cc ORR	V5.16B, V30.16B, V30.16B

    (2322) 0x4c58d0 ORR	V18.16B, V17.16B, V17.16B

    (2322) 0x4c58d4 ORR	V6.16B, V17.16B, V17.16B

    (2322) 0x4c58d8 ORR	V28.16B, V17.16B, V17.16B

    (2322) 0x4c58dc B.EQ	4c5950

    (2322) 0x4c58e0 CMP	X11, #1

    (2322) 0x4c58e4 B.EQ	4c591c

    (2322) 0x4c58e8 CMP	X11, #2

    (2322) 0x4c58ec B.NE	4c677c

    (2322) 0x4c58f0 LDP	Q2, Q3, [X0]

    (2322) 0x4c58f4 LDP	Q26, Q27, [X0, #32]

    (2322) 0x4c58f8 ADD	X0, X0, #64

    (2322) 0x4c58fc FMINNM	V30.2D, V30.2D, V2.2D

    (2322) 0x4c5900 FADD	V28.2D, V28.2D, V2.2D

    (2322) 0x4c5904 FMINNM	V5.2D, V5.2D, V3.2D

    (2322) 0x4c5908 FADD	V6.2D, V6.2D, V3.2D

    (2322) 0x4c590c FMINNM	V0.2D, V0.2D, V26.2D

    (2322) 0x4c5910 FADD	V18.2D, V18.2D, V26.2D

    (2322) 0x4c5914 FMINNM	V23.2D, V23.2D, V27.2D

    (2322) 0x4c5918 FADD	V17.2D, V17.2D, V27.2D

    (2322) 0x4c591c LDP	Q4, Q16, [X0]

    (2322) 0x4c5920 LDP	Q7, Q24, [X0, #32]

    (2322) 0x4c5924 ADD	X0, X0, #64

    (2322) 0x4c5928 FMINNM	V30.2D, V30.2D, V4.2D

    (2322) 0x4c592c FADD	V28.2D, V28.2D, V4.2D

    (2322) 0x4c5930 FMINNM	V5.2D, V5.2D, V16.2D

    (2322) 0x4c5934 FADD	V6.2D, V6.2D, V16.2D

    (2322) 0x4c5938 FMINNM	V0.2D, V0.2D, V7.2D

    (2322) 0x4c593c FADD	V18.2D, V18.2D, V7.2D

    (2322) 0x4c5940 FMINNM	V23.2D, V23.2D, V24.2D

    (2322) 0x4c5944 FADD	V17.2D, V17.2D, V24.2D

    (2322) 0x4c5948 CMP	X7, X0

    (2322) 0x4c594c B.EQ	4c5a18

    (2322) 0x4c5950 STR	X20, [SP, #160]

      (2332) 0x4c5954 LDP	Q21, Q2, [X0, #32]

      (2332) 0x4c5958 ADD	X11, X0, #64

      (2332) 0x4c595c ADD	X28, X0, #128

      (2332) 0x4c5960 ADD	X20, X0, #192

      (2332) 0x4c5964 LDP	Q19, Q25, [X0]

      (2332) 0x4c5968 ADD	X0, X0, #256

      (2332) 0x4c596c LDP	Q7, Q20, [X11, #16]

      (2332) 0x4c5970 FMINNM	V31.2D, V0.2D, V21.2D

      (2332) 0x4c5974 FADD	V26.2D, V18.2D, V21.2D

      (2332) 0x4c5978 FADD	V27.2D, V17.2D, V2.2D

      (2332) 0x4c597c LDP	Q17, Q21, [X11, #48]

      (2332) 0x4c5980 FMINNM	V22.2D, V5.2D, V25.2D

      (2332) 0x4c5984 FADD	V16.2D, V6.2D, V25.2D

      (2332) 0x4c5988 FMINNM	V5.2D, V31.2D, V20.2D

      (2332) 0x4c598c LDUR	Q31, [X0, #320]

      (2332) 0x4c5990 FMINNM	V3.2D, V30.2D, V19.2D

      (2332) 0x4c5994 FADD	V4.2D, V28.2D, V19.2D

      (2332) 0x4c5998 FMINNM	V24.2D, V23.2D, V2.2D

      (2332) 0x4c599c LDP	Q0, Q18, [X28, #16]

      (2332) 0x4c59a0 FADD	V28.2D, V16.2D, V7.2D

      (2332) 0x4c59a4 FADD	V6.2D, V26.2D, V20.2D

      (2332) 0x4c59a8 FMINNM	V30.2D, V22.2D, V7.2D

      (2332) 0x4c59ac FADD	V2.2D, V27.2D, V17.2D

      (2332) 0x4c59b0 LDUR	Q27, [X0, #448]

      (2332) 0x4c59b4 FMINNM	V23.2D, V24.2D, V17.2D

      (2332) 0x4c59b8 LDR	Q17, [X28, #48]

      (2332) 0x4c59bc FMINNM	V3.2D, V3.2D, V31.2D

      (2332) 0x4c59c0 FADD	V4.2D, V4.2D, V31.2D

      (2332) 0x4c59c4 LDP	Q20, Q19, [X20, #16]

      (2332) 0x4c59c8 FMINNM	V22.2D, V30.2D, V0.2D

      (2332) 0x4c59cc FADD	V25.2D, V28.2D, V0.2D

      (2332) 0x4c59d0 FMINNM	V16.2D, V5.2D, V18.2D

      (2332) 0x4c59d4 FADD	V7.2D, V6.2D, V18.2D

      (2332) 0x4c59d8 FMINNM	V26.2D, V3.2D, V21.2D

      (2332) 0x4c59dc FADD	V24.2D, V4.2D, V21.2D

      (2332) 0x4c59e0 LDR	Q21, [X20, #48]

      (2332) 0x4c59e4 FMINNM	V23.2D, V23.2D, V17.2D

      (2332) 0x4c59e8 FADD	V2.2D, V2.2D, V17.2D

      (2332) 0x4c59ec FMINNM	V5.2D, V22.2D, V20.2D

      (2332) 0x4c59f0 FADD	V6.2D, V25.2D, V20.2D

      (2332) 0x4c59f4 FMINNM	V0.2D, V16.2D, V19.2D

      (2332) 0x4c59f8 FADD	V18.2D, V7.2D, V19.2D

      (2332) 0x4c59fc FMINNM	V30.2D, V26.2D, V27.2D

      (2332) 0x4c5a00 FADD	V28.2D, V24.2D, V27.2D

      (2332) 0x4c5a04 FMINNM	V23.2D, V23.2D, V21.2D

      (2332) 0x4c5a08 FADD	V17.2D, V2.2D, V21.2D

      (2332) 0x4c5a0c CMP	X7, X0

      (2332) 0x4c5a10 B.NE	4c5954

    (2322) 0x4c5a14 LDR	X20, [SP, #160]

    (2322) 0x4c5a18 FMINNM	V30.2D, V30.2D, V5.2D

    (2322) 0x4c5a1c AND	X7, X17, #7997

    (2322) 0x4c5a20 FADD	V28.2D, V28.2D, V6.2D

    (2322) 0x4c5a24 ADD	X14, X7, X14

    (2322) 0x4c5a28 FADD	V5.2D, V18.2D, V17.2D

    (2322) 0x4c5a2c FMINNM	V0.2D, V0.2D, V23.2D

    (2322) 0x4c5a30 FADD	V18.2D, V5.2D, V28.2D

    (2322) 0x4c5a34 FMINNM	V6.2D, V0.2D, V30.2D

    (2322) 0x4c5a38 FADDP	D22, V18.2D

    (2322) 0x4c5a3c FMINNMP	D31, V6.2D

    (2322) 0x4c5a40 FADD	D1, D1, D22

    (2322) 0x4c5a44 ANDS	XZR, X17, #4224

    (2322) 0x4c5a48 B.EQ	4c5af0

    (2322) 0x4c5a4c UBFM	X0, X14, #61, #60

    (2322) 0x4c5a50 ADD	X11, X14, #1

    (2322) 0x4c5a54 LDR	D25, [X23, X0]

    (2322) 0x4c5a58 FMINNM	D31, D31, D25

    (2322) 0x4c5a5c FADD	D1, D1, D25

    (2322) 0x4c5a60 CMP	X11, X6

    (2322) 0x4c5a64 B.GE	4c5af0

    (2322) 0x4c5a68 ADD	X28, X23, X0

    (2322) 0x4c5a6c ADD	X7, X14, #2

    (2322) 0x4c5a70 LDR	D16, [X28, #8]

    (2322) 0x4c5a74 FMINNM	D31, D31, D16

    (2322) 0x4c5a78 FADD	D1, D1, D16

    (2322) 0x4c5a7c CMP	X7, X6

    (2322) 0x4c5a80 B.GE	4c5af0

    (2322) 0x4c5a84 LDR	D7, [X28, #16]

    (2322) 0x4c5a88 ADD	X0, X14, #3

    (2322) 0x4c5a8c FMINNM	D31, D31, D7

    (2322) 0x4c5a90 FADD	D1, D1, D7

    (2322) 0x4c5a94 CMP	X6, X0

    (2322) 0x4c5a98 B.LE	4c5af0

    (2322) 0x4c5a9c LDR	D20, [X28, #24]

    (2322) 0x4c5aa0 ADD	X11, X14, #4

    (2322) 0x4c5aa4 FMINNM	D31, D31, D20

    (2322) 0x4c5aa8 FADD	D1, D1, D20

    (2322) 0x4c5aac CMP	X11, X6

    (2322) 0x4c5ab0 B.GE	4c5af0

    (2322) 0x4c5ab4 LDR	D19, [X28, #32]

    (2322) 0x4c5ab8 ADD	X7, X14, #5

    (2322) 0x4c5abc FMINNM	D31, D31, D19

    (2322) 0x4c5ac0 FADD	D1, D1, D19

    (2322) 0x4c5ac4 CMP	X7, X6

    (2322) 0x4c5ac8 B.GE	4c5af0

    (2322) 0x4c5acc LDR	D3, [X28, #40]

    (2322) 0x4c5ad0 ADD	X14, X14, #6

    (2322) 0x4c5ad4 FMINNM	D31, D31, D3

    (2322) 0x4c5ad8 FADD	D1, D1, D3

    (2322) 0x4c5adc CMP	X6, X14

    (2322) 0x4c5ae0 B.LE	4c5af0

    (2322) 0x4c5ae4 LDR	D4, [X28, #48]

    (2322) 0x4c5ae8 FMINNM	D31, D31, D4

    (2322) 0x4c5aec FADD	D1, D1, D4

    (2322) 0x4c5af0 FABS	D29, D29

    (2322) 0x4c5af4 FABS	D1, D1

    (2322) 0x4c5af8 STR	X13, [X19, X10]

    (2322) 0x4c5afc SUB	X10, X27, #1

    (2322) 0x4c5b00 CMP	W18, #0

    (2322) 0x4c5b04 LDP	X27, X6, [X1, #1016]

    (2322) 0x4c5b08 ADD	X3, X3, X17

    (2322) 0x4c5b0c ADD	X2, X2, X10

    (2322) 0x4c5b10 FMUL	D26, D29, D14

    (2322) 0x4c5b14 ADD	X17, X27, #1

    (2322) 0x4c5b18 FCCMPE	D1, D26, #4, #1

    (2322) 0x4c5b1c B.GT	4c66a8

    (2322) 0x4c5b20 FMUL	D24, D15, D31

    (2322) 0x4c5b24 CMP	X17, X6

    (2322) 0x4c5b28 B.GE	4c5b50

      (2331) 0x4c5b2c LDR	D27, [X22, X17,LSL #3]

      (2331) 0x4c5b30 FCMPE	D24, D27

      (2331) 0x4c5b34 B.LS	4c5bc8

      (2331) 0x4c5b38 LDR	X28, [X25, X17,LSL #3]

      (2331) 0x4c5b3c STR	X28, [X19, X17,LSL #3]

      (2331) 0x4c5b40 ADD	X17, X17, #1

      (2331) 0x4c5b44 LDR	X0, [X1]

      (2331) 0x4c5b48 CMP	X0, X17

      (2331) 0x4c5b4c B.GT	4c5b2c

    (2322) 0x4c5b50 LDR	X7, [X4]

    (2322) 0x4c5b54 LDR	X27, [X12]

    (2322) 0x4c5b58 CMP	X27, X7

    (2322) 0x4c5b5c B.GE	4c549c

    (2322) 0x4c5b60 FMUL	D31, D15, D31

      (2329) 0x4c5b64 LDR	D17, [X23, X27,LSL #3]

      (2329) 0x4c5b68 FCMPE	D31, D17

      (2329) 0x4c5b6c B.LS	4c5b94

      (2330) 0x4c5b70 LDR	X14, [X24, X27,LSL #3]

      (2330) 0x4c5b74 STR	X14, [X20, X27,LSL #3]

      (2330) 0x4c5b78 ADD	X27, X27, #1

      (2330) 0x4c5b7c LDR	X10, [X4]

      (2330) 0x4c5b80 CMP	X10, X27

      (2330) 0x4c5b84 B.LE	4c549c

      (2330) 0x4c5b88 LDR	D17, [X23, X27,LSL #3]

      (2330) 0x4c5b8c FCMPE	D31, D17

      (2330) 0x4c5b90 B.GT	4c5b70

      (2329) 0x4c5b94 STR	X13, [X20, X27,LSL #3]

      (2329) 0x4c5b98 ADD	X27, X27, #1

      (2329) 0x4c5b9c SUB	X3, X3, #1

      (2329) 0x4c5ba0 LDR	X6, [X4]

      (2329) 0x4c5ba4 CMP	X6, X27

      (2329) 0x4c5ba8 B.GT	4c5b64

    (2322) 0x4c5bac ADD	X5, X5, #1

    (2322) 0x4c5bb0 ADD	X12, X12, #8

    (2322) 0x4c5bb4 ADD	X4, X4, #8

    (2322) 0x4c5bb8 ADD	X1, X1, #8

    (2322) 0x4c5bbc CMP	X5, X30

    (2322) 0x4c5bc0 B.NE	4c4fa0

(2323) 0x4c5bc4 B	4c54b4

      (2331) 0x4c5bc8 STR	X13, [X19, X17,LSL #3]

      (2331) 0x4c5bcc ADD	X17, X17, #1

      (2331) 0x4c5bd0 SUB	X2, X2, #1

      (2331) 0x4c5bd4 LDR	X11, [X1]

      (2331) 0x4c5bd8 CMP	X11, X17

      (2331) 0x4c5bdc B.GT	4c5b2c

    (2322) 0x4c5be0 B	4c5b50

    (2322) 0x4c5be4 CMP	X0, X7

    (2322) 0x4c5be8 B.GE	4c68e8

    (2322) 0x4c5bec SUB	X27, X7, X0

    (2322) 0x4c5bf0 LDR	X11, [X21, X5,LSL #3]

    (2322) 0x4c5bf4 MOVI	D28, #0

    (2322) 0x4c5bf8 FMOV	D31, D29

    (2322) 0x4c5bfc ANDS	X28, X27, #4224

    (2322) 0x4c5c00 B.EQ	4c5cd4

    (2322) 0x4c5c04 CMP	X28, #1

    (2322) 0x4c5c08 B.EQ	4c5cac

    (2322) 0x4c5c0c CMP	X28, #2

    (2322) 0x4c5c10 B.EQ	4c5c98

    (2322) 0x4c5c14 CMP	X28, #3

    (2322) 0x4c5c18 B.EQ	4c5c84

    (2322) 0x4c5c1c CMP	X28, #4

    (2322) 0x4c5c20 B.EQ	4c5c70

    (2322) 0x4c5c24 CMP	X28, #5

    (2322) 0x4c5c28 B.EQ	4c5c5c

    (2322) 0x4c5c2c CMP	X28, #6

    (2322) 0x4c5c30 B.EQ	4c5c48

    (2322) 0x4c5c34 LDR	X17, [X25, X0,LSL #3]

    (2322) 0x4c5c38 LDR	X14, [X21, X17,LSL #3]

    (2322) 0x4c5c3c CMP	X14, X11

    (2322) 0x4c5c40 B.EQ	4c6954

    (2322) 0x4c5c44 ADD	X0, X0, #1

    (2322) 0x4c5c48 LDR	X27, [X25, X0,LSL #3]

    (2322) 0x4c5c4c LDR	X28, [X21, X27,LSL #3]

    (2322) 0x4c5c50 CMP	X28, X11

    (2322) 0x4c5c54 B.EQ	4c6904

    (2322) 0x4c5c58 ADD	X0, X0, #1

    (2322) 0x4c5c5c LDR	X17, [X25, X0,LSL #3]

    (2322) 0x4c5c60 LDR	X14, [X21, X17,LSL #3]

    (2322) 0x4c5c64 CMP	X14, X11

    (2322) 0x4c5c68 B.EQ	4c689c

    (2322) 0x4c5c6c ADD	X0, X0, #1

    (2322) 0x4c5c70 LDR	X27, [X25, X0,LSL #3]

    (2322) 0x4c5c74 LDR	X28, [X21, X27,LSL #3]

    (2322) 0x4c5c78 CMP	X28, X11

    (2322) 0x4c5c7c B.EQ	4c682c

    (2322) 0x4c5c80 ADD	X0, X0, #1

    (2322) 0x4c5c84 LDR	X17, [X25, X0,LSL #3]

    (2322) 0x4c5c88 LDR	X14, [X21, X17,LSL #3]

    (2322) 0x4c5c8c CMP	X14, X11

    (2322) 0x4c5c90 B.EQ	4c67ec

    (2322) 0x4c5c94 ADD	X0, X0, #1

    (2322) 0x4c5c98 LDR	X27, [X25, X0,LSL #3]

    (2322) 0x4c5c9c LDR	X28, [X21, X27,LSL #3]

    (2322) 0x4c5ca0 CMP	X28, X11

    (2322) 0x4c5ca4 B.EQ	4c674c

    (2322) 0x4c5ca8 ADD	X0, X0, #1

    (2322) 0x4c5cac LDR	X17, [X25, X0,LSL #3]

    (2322) 0x4c5cb0 LDR	X14, [X21, X17,LSL #3]

    (2322) 0x4c5cb4 CMP	X14, X11

    (2322) 0x4c5cb8 B.NE	4c5cc8

    (2322) 0x4c5cbc LDR	D18, [X22, X0,LSL #3]

    (2322) 0x4c5cc0 FMAXNM	D28, D28, D18

    (2322) 0x4c5cc4 FADD	D31, D31, D18

    (2322) 0x4c5cc8 ADD	X0, X0, #1

    (2322) 0x4c5ccc CMP	X0, X7

    (2322) 0x4c5cd0 B.EQ	4c5ddc

      (2337) 0x4c5cd4 LDR	X27, [X25, X0,LSL #3]

      (2337) 0x4c5cd8 LDR	X28, [X21, X27,LSL #3]

      (2337) 0x4c5cdc CMP	X28, X11

      (2337) 0x4c5ce0 B.NE	4c5cf0

      (2337) 0x4c5ce4 LDR	D21, [X22, X0,LSL #3]

      (2337) 0x4c5ce8 FMAXNM	D28, D28, D21

      (2337) 0x4c5cec FADD	D31, D31, D21

      (2337) 0x4c5cf0 ADD	X0, X0, #1

      (2337) 0x4c5cf4 LDR	X17, [X25, X0,LSL #3]

      (2337) 0x4c5cf8 LDR	X14, [X21, X17,LSL #3]

      (2337) 0x4c5cfc CMP	X14, X11

      (2337) 0x4c5d00 B.NE	4c5d10

      (2337) 0x4c5d04 LDR	D7, [X22, X0,LSL #3]

      (2337) 0x4c5d08 FMAXNM	D28, D28, D7

      (2337) 0x4c5d0c FADD	D31, D31, D7

      (2337) 0x4c5d10 ADD	X27, X0, #1

      (2337) 0x4c5d14 LDR	X28, [X25, X27,LSL #3]

      (2337) 0x4c5d18 LDR	X17, [X21, X28,LSL #3]

      (2337) 0x4c5d1c CMP	X17, X11

      (2337) 0x4c5d20 B.NE	4c5d30

      (2337) 0x4c5d24 LDR	D20, [X22, X27,LSL #3]

      (2337) 0x4c5d28 FMAXNM	D28, D28, D20

      (2337) 0x4c5d2c FADD	D31, D31, D20

      (2337) 0x4c5d30 ADD	X14, X0, #2

      (2337) 0x4c5d34 LDR	X27, [X25, X14,LSL #3]

      (2337) 0x4c5d38 LDR	X28, [X21, X27,LSL #3]

      (2337) 0x4c5d3c CMP	X28, X11

      (2337) 0x4c5d40 B.NE	4c5d50

      (2337) 0x4c5d44 LDR	D2, [X22, X14,LSL #3]

      (2337) 0x4c5d48 FMAXNM	D28, D28, D2

      (2337) 0x4c5d4c FADD	D31, D31, D2

      (2337) 0x4c5d50 ADD	X14, X0, #3

      (2337) 0x4c5d54 LDR	X17, [X25, X14,LSL #3]

      (2337) 0x4c5d58 LDR	X27, [X21, X17,LSL #3]

      (2337) 0x4c5d5c CMP	X27, X11

      (2337) 0x4c5d60 B.NE	4c5d70

      (2337) 0x4c5d64 LDR	D0, [X22, X14,LSL #3]

      (2337) 0x4c5d68 FMAXNM	D28, D28, D0

      (2337) 0x4c5d6c FADD	D31, D31, D0

      (2337) 0x4c5d70 ADD	X28, X0, #4

      (2337) 0x4c5d74 LDR	X14, [X25, X28,LSL #3]

      (2337) 0x4c5d78 LDR	X17, [X21, X14,LSL #3]

      (2337) 0x4c5d7c CMP	X17, X11

      (2337) 0x4c5d80 B.NE	4c5d90

      (2337) 0x4c5d84 LDR	D5, [X22, X28,LSL #3]

      (2337) 0x4c5d88 FMAXNM	D28, D28, D5

      (2337) 0x4c5d8c FADD	D31, D31, D5

      (2337) 0x4c5d90 ADD	X27, X0, #5

      (2337) 0x4c5d94 LDR	X28, [X25, X27,LSL #3]

      (2337) 0x4c5d98 LDR	X14, [X21, X28,LSL #3]

      (2337) 0x4c5d9c CMP	X14, X11

      (2337) 0x4c5da0 B.NE	4c5db0

      (2337) 0x4c5da4 LDR	D22, [X22, X27,LSL #3]

      (2337) 0x4c5da8 FMAXNM	D28, D28, D22

      (2337) 0x4c5dac FADD	D31, D31, D22

      (2337) 0x4c5db0 ADD	X27, X0, #6

      (2337) 0x4c5db4 LDR	X17, [X25, X27,LSL #3]

      (2337) 0x4c5db8 LDR	X28, [X21, X17,LSL #3]

      (2337) 0x4c5dbc CMP	X28, X11

      (2337) 0x4c5dc0 B.NE	4c5dd0

      (2337) 0x4c5dc4 LDR	D23, [X22, X27,LSL #3]

      (2337) 0x4c5dc8 FMAXNM	D28, D28, D23

      (2337) 0x4c5dcc FADD	D31, D31, D23

      (2337) 0x4c5dd0 ADD	X0, X0, #7

      (2337) 0x4c5dd4 CMP	X0, X7

      (2337) 0x4c5dd8 B.NE	4c5cd4

    (2322) 0x4c5ddc LDR	X17, [X4]

    (2322) 0x4c5de0 LDR	X14, [X12]

    (2322) 0x4c5de4 CMP	X14, X17

    (2322) 0x4c5de8 B.GE	4c5fd8

    (2322) 0x4c5dec SUB	X27, X17, X14

    (2322) 0x4c5df0 LDR	X11, [X21, X5,LSL #3]

    (2322) 0x4c5df4 ORR	X0, XZR, X14

    (2322) 0x4c5df8 ANDS	X28, X27, #4224

    (2322) 0x4c5dfc B.EQ	4c5ed0

    (2322) 0x4c5e00 CMP	X28, #1

    (2322) 0x4c5e04 B.EQ	4c5ea8

    (2322) 0x4c5e08 CMP	X28, #2

    (2322) 0x4c5e0c B.EQ	4c5e94

    (2322) 0x4c5e10 CMP	X28, #3

    (2322) 0x4c5e14 B.EQ	4c5e80

    (2322) 0x4c5e18 CMP	X28, #4

    (2322) 0x4c5e1c B.EQ	4c5e6c

    (2322) 0x4c5e20 CMP	X28, #5

    (2322) 0x4c5e24 B.EQ	4c5e58

    (2322) 0x4c5e28 CMP	X28, #6

    (2322) 0x4c5e2c B.EQ	4c5e44

    (2322) 0x4c5e30 LDR	X0, [X24, X14,LSL #3]

    (2322) 0x4c5e34 LDR	X27, [X26, X0,LSL #3]

    (2322) 0x4c5e38 CMP	X11, X27

    (2322) 0x4c5e3c B.EQ	4c6964

    (2322) 0x4c5e40 ADD	X0, X14, #1

    (2322) 0x4c5e44 LDR	X28, [X24, X0,LSL #3]

    (2322) 0x4c5e48 LDR	X27, [X26, X28,LSL #3]

    (2322) 0x4c5e4c CMP	X11, X27

    (2322) 0x4c5e50 B.EQ	4c6918

    (2322) 0x4c5e54 ADD	X0, X0, #1

    (2322) 0x4c5e58 LDR	X28, [X24, X0,LSL #3]

    (2322) 0x4c5e5c LDR	X27, [X26, X28,LSL #3]

    (2322) 0x4c5e60 CMP	X11, X27

    (2322) 0x4c5e64 B.EQ	4c68ac

    (2322) 0x4c5e68 ADD	X0, X0, #1

    (2322) 0x4c5e6c LDR	X28, [X24, X0,LSL #3]

    (2322) 0x4c5e70 LDR	X27, [X26, X28,LSL #3]

    (2322) 0x4c5e74 CMP	X11, X27

    (2322) 0x4c5e78 B.EQ	4c681c

    (2322) 0x4c5e7c ADD	X0, X0, #1

    (2322) 0x4c5e80 LDR	X28, [X24, X0,LSL #3]

    (2322) 0x4c5e84 LDR	X27, [X26, X28,LSL #3]

    (2322) 0x4c5e88 CMP	X11, X27

    (2322) 0x4c5e8c B.EQ	4c67dc

    (2322) 0x4c5e90 ADD	X0, X0, #1

    (2322) 0x4c5e94 LDR	X28, [X24, X0,LSL #3]

    (2322) 0x4c5e98 LDR	X27, [X26, X28,LSL #3]

    (2322) 0x4c5e9c CMP	X11, X27

    (2322) 0x4c5ea0 B.EQ	4c673c

    (2322) 0x4c5ea4 ADD	X0, X0, #1

    (2322) 0x4c5ea8 LDR	X28, [X24, X0,LSL #3]

    (2322) 0x4c5eac LDR	X27, [X26, X28,LSL #3]

    (2322) 0x4c5eb0 CMP	X11, X27

    (2322) 0x4c5eb4 B.NE	4c5ec4

    (2322) 0x4c5eb8 LDR	D16, [X23, X0,LSL #3]

    (2322) 0x4c5ebc FMAXNM	D28, D28, D16

    (2322) 0x4c5ec0 FADD	D31, D31, D16

    (2322) 0x4c5ec4 ADD	X0, X0, #1

    (2322) 0x4c5ec8 CMP	X0, X17

    (2322) 0x4c5ecc B.EQ	4c5fd8

      (2336) 0x4c5ed0 LDR	X28, [X24, X0,LSL #3]

      (2336) 0x4c5ed4 LDR	X27, [X26, X28,LSL #3]

      (2336) 0x4c5ed8 CMP	X11, X27

      (2336) 0x4c5edc B.NE	4c5eec

      (2336) 0x4c5ee0 LDR	D30, [X23, X0,LSL #3]

      (2336) 0x4c5ee4 FMAXNM	D28, D28, D30

      (2336) 0x4c5ee8 FADD	D31, D31, D30

      (2336) 0x4c5eec ADD	X0, X0, #1

      (2336) 0x4c5ef0 LDR	X28, [X24, X0,LSL #3]

      (2336) 0x4c5ef4 LDR	X27, [X26, X28,LSL #3]

      (2336) 0x4c5ef8 CMP	X11, X27

      (2336) 0x4c5efc B.NE	4c5f0c

      (2336) 0x4c5f00 LDR	D24, [X23, X0,LSL #3]

      (2336) 0x4c5f04 FMAXNM	D28, D28, D24

      (2336) 0x4c5f08 FADD	D31, D31, D24

      (2336) 0x4c5f0c ADD	X27, X0, #1

      (2336) 0x4c5f10 LDR	X28, [X24, X27,LSL #3]

      (2336) 0x4c5f14 LDR	X28, [X26, X28,LSL #3]

      (2336) 0x4c5f18 CMP	X11, X28

      (2336) 0x4c5f1c B.NE	4c5f2c

      (2336) 0x4c5f20 LDR	D1, [X23, X27,LSL #3]

      (2336) 0x4c5f24 FMAXNM	D28, D28, D1

      (2336) 0x4c5f28 FADD	D31, D31, D1

      (2336) 0x4c5f2c ADD	X27, X0, #2

      (2336) 0x4c5f30 LDR	X28, [X24, X27,LSL #3]

      (2336) 0x4c5f34 LDR	X28, [X26, X28,LSL #3]

      (2336) 0x4c5f38 CMP	X11, X28

      (2336) 0x4c5f3c B.NE	4c5f4c

      (2336) 0x4c5f40 LDR	D3, [X23, X27,LSL #3]

      (2336) 0x4c5f44 FMAXNM	D28, D28, D3

      (2336) 0x4c5f48 FADD	D31, D31, D3

      (2336) 0x4c5f4c ADD	X27, X0, #3

      (2336) 0x4c5f50 LDR	X28, [X24, X27,LSL #3]

      (2336) 0x4c5f54 LDR	X28, [X26, X28,LSL #3]

      (2336) 0x4c5f58 CMP	X11, X28

      (2336) 0x4c5f5c B.NE	4c5f6c

      (2336) 0x4c5f60 LDR	D27, [X23, X27,LSL #3]

      (2336) 0x4c5f64 FMAXNM	D28, D28, D27

      (2336) 0x4c5f68 FADD	D31, D31, D27

      (2336) 0x4c5f6c ADD	X27, X0, #4

      (2336) 0x4c5f70 LDR	X28, [X24, X27,LSL #3]

      (2336) 0x4c5f74 LDR	X28, [X26, X28,LSL #3]

      (2336) 0x4c5f78 CMP	X11, X28

      (2336) 0x4c5f7c B.NE	4c5f8c

      (2336) 0x4c5f80 LDR	D18, [X23, X27,LSL #3]

      (2336) 0x4c5f84 FMAXNM	D28, D28, D18

      (2336) 0x4c5f88 FADD	D31, D31, D18

      (2336) 0x4c5f8c ADD	X27, X0, #5

      (2336) 0x4c5f90 LDR	X28, [X24, X27,LSL #3]

      (2336) 0x4c5f94 LDR	X28, [X26, X28,LSL #3]

      (2336) 0x4c5f98 CMP	X11, X28

      (2336) 0x4c5f9c B.NE	4c5fac

      (2336) 0x4c5fa0 LDR	D21, [X23, X27,LSL #3]

      (2336) 0x4c5fa4 FMAXNM	D28, D28, D21

      (2336) 0x4c5fa8 FADD	D31, D31, D21

      (2336) 0x4c5fac ADD	X27, X0, #6

      (2336) 0x4c5fb0 LDR	X28, [X24, X27,LSL #3]

      (2336) 0x4c5fb4 LDR	X28, [X26, X28,LSL #3]

      (2336) 0x4c5fb8 CMP	X11, X28

      (2336) 0x4c5fbc B.NE	4c5fcc

      (2336) 0x4c5fc0 LDR	D7, [X23, X27,LSL #3]

      (2336) 0x4c5fc4 FMAXNM	D28, D28, D7

      (2336) 0x4c5fc8 FADD	D31, D31, D7

      (2336) 0x4c5fcc ADD	X0, X0, #7

      (2336) 0x4c5fd0 CMP	X0, X17

      (2336) 0x4c5fd4 B.NE	4c5ed0

    (2322) 0x4c5fd8 FABS	D29, D29

    (2322) 0x4c5fdc SUB	X7, X7, X6

    (2322) 0x4c5fe0 SUB	X6, X17, X14

    (2322) 0x4c5fe4 FABS	D20, D31

    (2322) 0x4c5fe8 STR	X13, [X19, X10]

    (2322) 0x4c5fec ADD	X3, X3, X6

    (2322) 0x4c5ff0 LDP	X17, X6, [X1, #1016]

    (2322) 0x4c5ff4 CMP	W18, #0

    (2322) 0x4c5ff8 SUB	X10, X7, #1

    (2322) 0x4c5ffc ADD	X2, X2, X10

    (2322) 0x4c6000 FMUL	D2, D29, D14

    (2322) 0x4c6004 ADD	X17, X17, #1

    (2322) 0x4c6008 FCCMPE	D20, D2, #4, #1

    (2322) 0x4c600c B.GT	4c66a8

    (2322) 0x4c6010 FMUL	D0, D15, D28

    (2322) 0x4c6014 CMP	X17, X6

    (2322) 0x4c6018 B.GE	4c605c

    (2322) 0x4c601c HINT	#0

      (2335) 0x4c6020 LDR	D5, [X22, X17,LSL #3]

      (2335) 0x4c6024 FCMPE	D0, D5

      (2335) 0x4c6028 B.GE	4c6040

      (2335) 0x4c602c LDR	X27, [X25, X17,LSL #3]

      (2335) 0x4c6030 LDR	X14, [X21, X5,LSL #3]

      (2335) 0x4c6034 LDR	X11, [X21, X27,LSL #3]

      (2335) 0x4c6038 CMP	X11, X14

      (2335) 0x4c603c B.EQ	4c6048

      (2335) 0x4c6040 SUB	X2, X2, #1

      (2335) 0x4c6044 MOVN	X27, #0

      (2335) 0x4c6048 STR	X27, [X19, X17,LSL #3]

      (2335) 0x4c604c ADD	X17, X17, #1

      (2335) 0x4c6050 LDR	X28, [X1]

      (2335) 0x4c6054 CMP	X28, X17

      (2335) 0x4c6058 B.GT	4c6020

    (2322) 0x4c605c LDR	X7, [X4]

    (2322) 0x4c6060 LDR	X0, [X12]

    (2322) 0x4c6064 CMP	X0, X7

    (2322) 0x4c6068 B.GE	4c549c

    (2322) 0x4c606c FMUL	D22, D15, D28

      (2334) 0x4c6070 LDR	D23, [X23, X0,LSL #3]

      (2334) 0x4c6074 FCMPE	D22, D23

      (2334) 0x4c6078 B.GE	4c6090

      (2334) 0x4c607c LDR	X6, [X24, X0,LSL #3]

      (2334) 0x4c6080 LDR	X17, [X21, X5,LSL #3]

      (2334) 0x4c6084 LDR	X10, [X26, X6,LSL #3]

      (2334) 0x4c6088 CMP	X10, X17

      (2334) 0x4c608c B.EQ	4c6098

      (2334) 0x4c6090 SUB	X3, X3, #1

      (2334) 0x4c6094 MOVN	X6, #0

      (2334) 0x4c6098 STR	X6, [X20, X0,LSL #3]

      (2334) 0x4c609c ADD	X0, X0, #1

      (2334) 0x4c60a0 LDR	X14, [X4]

      (2334) 0x4c60a4 CMP	X14, X0

      (2334) 0x4c60a8 B.GT	4c6070

    (2322) 0x4c60ac ADD	X5, X5, #1

    (2322) 0x4c60b0 ADD	X12, X12, #8

    (2322) 0x4c60b4 ADD	X4, X4, #8

    (2322) 0x4c60b8 ADD	X1, X1, #8

    (2322) 0x4c60bc CMP	X5, X30

    (2322) 0x4c60c0 B.NE	4c4fa0

(2323) 0x4c60c4 B	4c54b4

    (2322) 0x4c60c8 CMP	X0, X7

    (2322) 0x4c60cc B.GE	4c6980

    (2322) 0x4c60d0 SUB	X6, X7, X6

    (2322) 0x4c60d4 SUB	X17, X6, #2

    (2322) 0x4c60d8 SUB	X14, X6, #1

    (2322) 0x4c60dc CMP	X17, #6

    (2322) 0x4c60e0 B.LS	4c6990

    (2322) 0x4c60e4 UBFM	X28, X14, #3, #63

    (2322) 0x4c60e8 MOVI	V20.2D, #0

    (2322) 0x4c60ec ADD	X27, X10, #8

    (2322) 0x4c60f0 UBFM	X17, X28, #58, #57

    (2322) 0x4c60f4 ADD	X11, X22, X27

    (2322) 0x4c60f8 SUB	X17, X17, #64

    (2322) 0x4c60fc ADD	X28, X11, X28,LSL #6

    (2322) 0x4c6100 UBFM	X17, X17, #6, #63

    (2322) 0x4c6104 ADD	X17, X17, #1

    (2322) 0x4c6108 ORR	V1.16B, V20.16B, V20.16B

    (2322) 0x4c610c ORR	V3.16B, V20.16B, V20.16B

    (2322) 0x4c6110 ANDS	X17, X17, #4160

    (2322) 0x4c6114 ORR	V30.16B, V20.16B, V20.16B

    (2322) 0x4c6118 ORR	V31.16B, V20.16B, V20.16B

    (2322) 0x4c611c ORR	V4.16B, V20.16B, V20.16B

    (2322) 0x4c6120 ORR	V23.16B, V20.16B, V20.16B

    (2322) 0x4c6124 ORR	V28.16B, V20.16B, V20.16B

    (2322) 0x4c6128 B.EQ	4c619c

    (2322) 0x4c612c CMP	X17, #1

    (2322) 0x4c6130 B.EQ	4c6168

    (2322) 0x4c6134 CMP	X17, #2

    (2322) 0x4c6138 B.NE	4c686c

    (2322) 0x4c613c LDP	Q21, Q0, [X11]

    (2322) 0x4c6140 LDP	Q5, Q6, [X11, #32]

    (2322) 0x4c6144 ADD	X11, X11, #64

    (2322) 0x4c6148 FMAXNM	V28.2D, V28.2D, V21.2D

    (2322) 0x4c614c FADD	V30.2D, V30.2D, V21.2D

    (2322) 0x4c6150 FMAXNM	V23.2D, V23.2D, V0.2D

    (2322) 0x4c6154 FADD	V3.2D, V3.2D, V0.2D

    (2322) 0x4c6158 FMAXNM	V4.2D, V4.2D, V5.2D

    (2322) 0x4c615c FADD	V1.2D, V1.2D, V5.2D

    (2322) 0x4c6160 FMAXNM	V31.2D, V31.2D, V6.2D

    (2322) 0x4c6164 FADD	V20.2D, V20.2D, V6.2D

    (2322) 0x4c6168 LDP	Q22, Q25, [X11]

    (2322) 0x4c616c LDP	Q16, Q7, [X11, #32]

    (2322) 0x4c6170 ADD	X11, X11, #64

    (2322) 0x4c6174 FMAXNM	V28.2D, V28.2D, V22.2D

    (2322) 0x4c6178 FADD	V30.2D, V30.2D, V22.2D

    (2322) 0x4c617c FMAXNM	V23.2D, V23.2D, V25.2D

    (2322) 0x4c6180 FADD	V3.2D, V3.2D, V25.2D

    (2322) 0x4c6184 FMAXNM	V4.2D, V4.2D, V16.2D

    (2322) 0x4c6188 FADD	V1.2D, V1.2D, V16.2D

    (2322) 0x4c618c FMAXNM	V31.2D, V31.2D, V7.2D

    (2322) 0x4c6190 FADD	V20.2D, V20.2D, V7.2D

    (2322) 0x4c6194 CMP	X28, X11

    (2322) 0x4c6198 B.EQ	4c6264

    (2322) 0x4c619c STR	X0, [SP, #160]

      (2328) 0x4c61a0 LDP	Q26, Q27, [X11, #32]

      (2328) 0x4c61a4 ADD	X0, X11, #64

      (2328) 0x4c61a8 ADD	X27, X11, #128

      (2328) 0x4c61ac ADD	X17, X11, #192

      (2328) 0x4c61b0 LDP	Q24, Q17, [X11]

      (2328) 0x4c61b4 ADD	X11, X11, #256

      (2328) 0x4c61b8 LDP	Q21, Q5, [X0, #16]

      (2328) 0x4c61bc FMAXNM	V6.2D, V4.2D, V26.2D

      (2328) 0x4c61c0 FADD	V22.2D, V1.2D, V26.2D

      (2328) 0x4c61c4 FADD	V18.2D, V3.2D, V17.2D

      (2328) 0x4c61c8 FMAXNM	V19.2D, V23.2D, V17.2D

      (2328) 0x4c61cc LDP	Q23, Q17, [X0, #48]

      (2328) 0x4c61d0 FMAXNM	V2.2D, V28.2D, V24.2D

      (2328) 0x4c61d4 FADD	V0.2D, V30.2D, V24.2D

      (2328) 0x4c61d8 FADD	V3.2D, V22.2D, V5.2D

      (2328) 0x4c61dc LDUR	Q22, [X11, #448]

      (2328) 0x4c61e0 FMAXNM	V30.2D, V6.2D, V5.2D

      (2328) 0x4c61e4 LDUR	Q5, [X11, #320]

      (2328) 0x4c61e8 FMAXNM	V16.2D, V31.2D, V27.2D

      (2328) 0x4c61ec FADD	V7.2D, V20.2D, V27.2D

      (2328) 0x4c61f0 LDP	Q4, Q1, [X27, #16]

      (2328) 0x4c61f4 FMAXNM	V28.2D, V19.2D, V21.2D

      (2328) 0x4c61f8 FADD	V25.2D, V18.2D, V21.2D

      (2328) 0x4c61fc LDP	Q19, Q20, [X17, #16]

      (2328) 0x4c6200 FMAXNM	V31.2D, V16.2D, V23.2D

      (2328) 0x4c6204 FADD	V27.2D, V7.2D, V23.2D

      (2328) 0x4c6208 LDR	Q7, [X27, #48]

      (2328) 0x4c620c FMAXNM	V2.2D, V2.2D, V5.2D

      (2328) 0x4c6210 FADD	V0.2D, V0.2D, V5.2D

      (2328) 0x4c6214 FMAXNM	V18.2D, V28.2D, V4.2D

      (2328) 0x4c6218 FADD	V21.2D, V25.2D, V4.2D

      (2328) 0x4c621c FMAXNM	V24.2D, V30.2D, V1.2D

      (2328) 0x4c6220 FADD	V26.2D, V3.2D, V1.2D

      (2328) 0x4c6224 FMAXNM	V6.2D, V2.2D, V17.2D

      (2328) 0x4c6228 FADD	V16.2D, V0.2D, V17.2D

      (2328) 0x4c622c FMAXNM	V25.2D, V31.2D, V7.2D

      (2328) 0x4c6230 FADD	V17.2D, V27.2D, V7.2D

      (2328) 0x4c6234 LDR	Q27, [X17, #48]

      (2328) 0x4c6238 FMAXNM	V4.2D, V24.2D, V20.2D

      (2328) 0x4c623c FADD	V1.2D, V26.2D, V20.2D

      (2328) 0x4c6240 FMAXNM	V23.2D, V18.2D, V19.2D

      (2328) 0x4c6244 FADD	V3.2D, V21.2D, V19.2D

      (2328) 0x4c6248 FMAXNM	V28.2D, V6.2D, V22.2D

      (2328) 0x4c624c FADD	V30.2D, V16.2D, V22.2D

      (2328) 0x4c6250 FMAXNM	V31.2D, V25.2D, V27.2D

      (2328) 0x4c6254 FADD	V20.2D, V17.2D, V27.2D

      (2328) 0x4c6258 CMP	X28, X11

      (2328) 0x4c625c B.NE	4c61a0

    (2322) 0x4c6260 LDR	X0, [SP, #160]

    (2322) 0x4c6264 FADD	V30.2D, V30.2D, V3.2D

    (2322) 0x4c6268 AND	X28, X14, #7997

    (2322) 0x4c626c FADD	V1.2D, V20.2D, V1.2D

    (2322) 0x4c6270 ADD	X0, X0, X28

    (2322) 0x4c6274 FMAXNM	V4.2D, V31.2D, V4.2D

    (2322) 0x4c6278 FMAXNM	V28.2D, V28.2D, V23.2D

    (2322) 0x4c627c FADD	V23.2D, V1.2D, V30.2D

    (2322) 0x4c6280 FMAXNM	V3.2D, V4.2D, V28.2D

    (2322) 0x4c6284 FADDP	D18, V23.2D

    (2322) 0x4c6288 FMAXNMP	D31, V3.2D

    (2322) 0x4c628c FADD	D24, D18, D29

    (2322) 0x4c6290 ANDS	XZR, X14, #4224

    (2322) 0x4c6294 B.EQ	4c633c

    (2322) 0x4c6298 UBFM	X11, X0, #61, #60

    (2322) 0x4c629c ADD	X14, X0, #1

    (2322) 0x4c62a0 LDR	D21, [X22, X11]

    (2322) 0x4c62a4 FMAXNM	D31, D31, D21

    (2322) 0x4c62a8 FADD	D24, D24, D21

    (2322) 0x4c62ac CMP	X14, X7

    (2322) 0x4c62b0 B.GE	4c633c

    (2322) 0x4c62b4 ADD	X17, X22, X11

    (2322) 0x4c62b8 ADD	X27, X0, #2

    (2322) 0x4c62bc LDR	D26, [X17, #8]

    (2322) 0x4c62c0 FMAXNM	D31, D31, D26

    (2322) 0x4c62c4 FADD	D24, D24, D26

    (2322) 0x4c62c8 CMP	X27, X7

    (2322) 0x4c62cc B.GE	4c633c

    (2322) 0x4c62d0 LDR	D19, [X17, #16]

    (2322) 0x4c62d4 ADD	X28, X0, #3

    (2322) 0x4c62d8 FMAXNM	D31, D31, D19

    (2322) 0x4c62dc FADD	D24, D24, D19

    (2322) 0x4c62e0 CMP	X28, X7

    (2322) 0x4c62e4 B.GE	4c633c

    (2322) 0x4c62e8 LDR	D20, [X17, #24]

    (2322) 0x4c62ec ADD	X11, X0, #4

    (2322) 0x4c62f0 FMAXNM	D31, D31, D20

    (2322) 0x4c62f4 FADD	D24, D24, D20

    (2322) 0x4c62f8 CMP	X11, X7

    (2322) 0x4c62fc B.GE	4c633c

    (2322) 0x4c6300 LDR	D5, [X17, #32]

    (2322) 0x4c6304 ADD	X14, X0, #5

    (2322) 0x4c6308 FMAXNM	D31, D31, D5

    (2322) 0x4c630c FADD	D24, D24, D5

    (2322) 0x4c6310 CMP	X14, X7

    (2322) 0x4c6314 B.GE	4c633c

    (2322) 0x4c6318 LDR	D2, [X17, #40]

    (2322) 0x4c631c ADD	X0, X0, #6

    (2322) 0x4c6320 FMAXNM	D31, D31, D2

    (2322) 0x4c6324 FADD	D24, D24, D2

    (2322) 0x4c6328 CMP	X0, X7

    (2322) 0x4c632c B.GE	4c633c

    (2322) 0x4c6330 LDR	D0, [X17, #48]

    (2322) 0x4c6334 FMAXNM	D31, D31, D0

    (2322) 0x4c6338 FADD	D24, D24, D0

    (2322) 0x4c633c LDR	X7, [X4]

    (2322) 0x4c6340 LDR	X14, [X12]

    (2322) 0x4c6344 SUB	X17, X7, X14

    (2322) 0x4c6348 CMP	X14, X7

    (2322) 0x4c634c B.GE	4c65b4

    (2322) 0x4c6350 SUB	X27, X17, #1

    (2322) 0x4c6354 CMP	X27, #6

    (2322) 0x4c6358 B.LS	4c699c

    (2322) 0x4c635c UBFM	X27, X17, #3, #63

    (2322) 0x4c6360 DUP	V30.2D, V31.D[0]

    (2322) 0x4c6364 MOVI	V18.2D, #0

    (2322) 0x4c6368 ADD	X0, X23, X14,LSL #3

    (2322) 0x4c636c UBFM	X28, X14, #61, #60

    (2322) 0x4c6370 UBFM	X11, X27, #58, #57

    (2322) 0x4c6374 SUB	X11, X11, #64

    (2322) 0x4c6378 ADD	X27, X0, X27,LSL #6

    (2322) 0x4c637c UBFM	X11, X11, #6, #63

    (2322) 0x4c6380 ADD	X11, X11, #1

    (2322) 0x4c6384 ORR	V23.16B, V30.16B, V30.16B

    (2322) 0x4c6388 ORR	V2.16B, V30.16B, V30.16B

    (2322) 0x4c638c ANDS	X11, X11, #4160

    (2322) 0x4c6390 ORR	V22.16B, V30.16B, V30.16B

    (2322) 0x4c6394 ORR	V0.16B, V18.16B, V18.16B

    (2322) 0x4c6398 ORR	V5.16B, V18.16B, V18.16B

    (2322) 0x4c639c ORR	V28.16B, V18.16B, V18.16B

    (2322) 0x4c63a0 B.EQ	4c6414

    (2322) 0x4c63a4 CMP	X11, #1

    (2322) 0x4c63a8 B.EQ	4c63e0

    (2322) 0x4c63ac CMP	X11, #2

    (2322) 0x4c63b0 B.NE	4c683c

    (2322) 0x4c63b4 LDP	Q6, Q16, [X0]

    (2322) 0x4c63b8 LDP	Q7, Q25, [X0, #32]

    (2322) 0x4c63bc ADD	X0, X0, #64

    (2322) 0x4c63c0 FMAXNM	V30.2D, V30.2D, V6.2D

    (2322) 0x4c63c4 FADD	V28.2D, V28.2D, V6.2D

    (2322) 0x4c63c8 FMAXNM	V22.2D, V22.2D, V16.2D

    (2322) 0x4c63cc FADD	V5.2D, V5.2D, V16.2D

    (2322) 0x4c63d0 FMAXNM	V2.2D, V2.2D, V7.2D

    (2322) 0x4c63d4 FADD	V0.2D, V0.2D, V7.2D

    (2322) 0x4c63d8 FMAXNM	V23.2D, V23.2D, V25.2D

    (2322) 0x4c63dc FADD	V18.2D, V18.2D, V25.2D

    (2322) 0x4c63e0 LDP	Q4, Q1, [X0]

    (2322) 0x4c63e4 LDP	Q3, Q27, [X0, #32]

    (2322) 0x4c63e8 ADD	X0, X0, #64

    (2322) 0x4c63ec FMAXNM	V30.2D, V30.2D, V4.2D

    (2322) 0x4c63f0 FADD	V28.2D, V28.2D, V4.2D

    (2322) 0x4c63f4 FMAXNM	V22.2D, V22.2D, V1.2D

    (2322) 0x4c63f8 FADD	V5.2D, V5.2D, V1.2D

    (2322) 0x4c63fc FMAXNM	V2.2D, V2.2D, V3.2D

    (2322) 0x4c6400 FADD	V0.2D, V0.2D, V3.2D

    (2322) 0x4c6404 FMAXNM	V23.2D, V23.2D, V27.2D

    (2322) 0x4c6408 FADD	V18.2D, V18.2D, V27.2D

    (2322) 0x4c640c CMP	X0, X27

    (2322) 0x4c6410 B.EQ	4c64dc

    (2322) 0x4c6414 STR	X20, [SP, #160]

      (2327) 0x4c6418 LDP	Q21, Q20, [X0]

      (2327) 0x4c641c ADD	X11, X0, #64

      (2327) 0x4c6420 ADD	X28, X0, #128

      (2327) 0x4c6424 ADD	X20, X0, #192

      (2327) 0x4c6428 LDP	Q26, Q17, [X0, #32]

      (2327) 0x4c642c ADD	X0, X0, #256

      (2327) 0x4c6430 LDP	Q25, Q4, [X11, #16]

      (2327) 0x4c6434 FMAXNM	V19.2D, V22.2D, V20.2D

      (2327) 0x4c6438 FMAXNM	V6.2D, V30.2D, V21.2D

      (2327) 0x4c643c FMAXNM	V31.2D, V2.2D, V26.2D

      (2327) 0x4c6440 FADD	V1.2D, V0.2D, V26.2D

      (2327) 0x4c6444 FADD	V27.2D, V18.2D, V17.2D

      (2327) 0x4c6448 FADD	V16.2D, V28.2D, V21.2D

      (2327) 0x4c644c LDP	Q0, Q18, [X28, #16]

      (2327) 0x4c6450 FADD	V7.2D, V5.2D, V20.2D

      (2327) 0x4c6454 LDP	Q22, Q21, [X11, #48]

      (2327) 0x4c6458 FMAXNM	V30.2D, V19.2D, V25.2D

      (2327) 0x4c645c FMAXNM	V5.2D, V31.2D, V4.2D

      (2327) 0x4c6460 LDUR	Q31, [X0, #320]

      (2327) 0x4c6464 FADD	V2.2D, V1.2D, V4.2D

      (2327) 0x4c6468 FMAXNM	V3.2D, V23.2D, V17.2D

      (2327) 0x4c646c LDP	Q4, Q19, [X20, #16]

      (2327) 0x4c6470 FADD	V28.2D, V7.2D, V25.2D

      (2327) 0x4c6474 FMAXNM	V20.2D, V30.2D, V0.2D

      (2327) 0x4c6478 FMAXNM	V25.2D, V5.2D, V18.2D

      (2327) 0x4c647c FADD	V7.2D, V27.2D, V22.2D

      (2327) 0x4c6480 LDUR	Q27, [X0, #448]

      (2327) 0x4c6484 FMAXNM	V23.2D, V3.2D, V22.2D

      (2327) 0x4c6488 FADD	V26.2D, V2.2D, V18.2D

      (2327) 0x4c648c LDR	Q18, [X28, #48]

      (2327) 0x4c6490 FMAXNM	V6.2D, V6.2D, V31.2D

      (2327) 0x4c6494 FADD	V16.2D, V16.2D, V31.2D

      (2327) 0x4c6498 FADD	V17.2D, V28.2D, V0.2D

      (2327) 0x4c649c FMAXNM	V22.2D, V20.2D, V4.2D

      (2327) 0x4c64a0 LDR	Q20, [X20, #48]

      (2327) 0x4c64a4 FMAXNM	V2.2D, V25.2D, V19.2D

      (2327) 0x4c64a8 FADD	V7.2D, V7.2D, V18.2D

      (2327) 0x4c64ac FMAXNM	V1.2D, V6.2D, V21.2D

      (2327) 0x4c64b0 FADD	V3.2D, V16.2D, V21.2D

      (2327) 0x4c64b4 FMAXNM	V21.2D, V23.2D, V18.2D

      (2327) 0x4c64b8 FADD	V5.2D, V17.2D, V4.2D

      (2327) 0x4c64bc FADD	V0.2D, V26.2D, V19.2D

      (2327) 0x4c64c0 FADD	V18.2D, V7.2D, V20.2D

      (2327) 0x4c64c4 FMAXNM	V30.2D, V1.2D, V27.2D

      (2327) 0x4c64c8 FADD	V28.2D, V3.2D, V27.2D

      (2327) 0x4c64cc FMAXNM	V23.2D, V21.2D, V20.2D

      (2327) 0x4c64d0 CMP	X0, X27

      (2327) 0x4c64d4 B.NE	4c6418

    (2322) 0x4c64d8 LDR	X20, [SP, #160]

    (2322) 0x4c64dc FADD	V28.2D, V28.2D, V5.2D

    (2322) 0x4c64e0 AND	X27, X17, #7997

    (2322) 0x4c64e4 FADD	V0.2D, V0.2D, V18.2D

    (2322) 0x4c64e8 ADD	X28, X27, X14

    (2322) 0x4c64ec FMAXNM	V2.2D, V2.2D, V23.2D

    (2322) 0x4c64f0 FMAXNM	V30.2D, V30.2D, V22.2D

    (2322) 0x4c64f4 FADD	V22.2D, V0.2D, V28.2D

    (2322) 0x4c64f8 FMAXNM	V5.2D, V2.2D, V30.2D

    (2322) 0x4c64fc FADDP	D23, V22.2D

    (2322) 0x4c6500 FMAXNMP	D31, V5.2D

    (2322) 0x4c6504 FADD	D24, D24, D23

    (2322) 0x4c6508 ANDS	XZR, X17, #4224

    (2322) 0x4c650c B.EQ	4c65b4

    (2322) 0x4c6510 UBFM	X0, X28, #61, #60

    (2322) 0x4c6514 ADD	X14, X28, #1

    (2322) 0x4c6518 LDR	D17, [X23, X0]

    (2322) 0x4c651c FMAXNM	D31, D31, D17

    (2322) 0x4c6520 FADD	D24, D24, D17

    (2322) 0x4c6524 CMP	X14, X7

    (2322) 0x4c6528 B.GE	4c65b4

    (2322) 0x4c652c ADD	X11, X23, X0

    (2322) 0x4c6530 ADD	X27, X28, #2

    (2322) 0x4c6534 LDR	D25, [X11, #8]

    (2322) 0x4c6538 FMAXNM	D31, D31, D25

    (2322) 0x4c653c FADD	D24, D24, D25

    (2322) 0x4c6540 CMP	X27, X7

    (2322) 0x4c6544 B.GE	4c65b4

    (2322) 0x4c6548 LDR	D26, [X11, #16]

    (2322) 0x4c654c ADD	X0, X28, #3

    (2322) 0x4c6550 FMAXNM	D31, D31, D26

    (2322) 0x4c6554 FADD	D24, D24, D26

    (2322) 0x4c6558 CMP	X0, X7

    (2322) 0x4c655c B.GE	4c65b4

    (2322) 0x4c6560 LDR	D4, [X11, #24]

    (2322) 0x4c6564 ADD	X14, X28, #4

    (2322) 0x4c6568 FMAXNM	D31, D31, D4

    (2322) 0x4c656c FADD	D24, D24, D4

    (2322) 0x4c6570 CMP	X14, X7

    (2322) 0x4c6574 B.GE	4c65b4

    (2322) 0x4c6578 LDR	D19, [X11, #32]

    (2322) 0x4c657c ADD	X27, X28, #5

    (2322) 0x4c6580 FMAXNM	D31, D31, D19

    (2322) 0x4c6584 FADD	D24, D24, D19

    (2322) 0x4c6588 CMP	X7, X27

    (2322) 0x4c658c B.LE	4c65b4

    (2322) 0x4c6590 LDR	D6, [X11, #40]

    (2322) 0x4c6594 ADD	X28, X28, #6

    (2322) 0x4c6598 FMAXNM	D31, D31, D6

    (2322) 0x4c659c FADD	D24, D24, D6

    (2322) 0x4c65a0 CMP	X7, X28

    (2322) 0x4c65a4 B.LE	4c65b4

    (2322) 0x4c65a8 LDR	D16, [X11, #48]

    (2322) 0x4c65ac FMAXNM	D31, D31, D16

    (2322) 0x4c65b0 FADD	D24, D24, D16

    (2322) 0x4c65b4 FABS	D29, D29

    (2322) 0x4c65b8 FABS	D24, D24

    (2322) 0x4c65bc STR	X13, [X19, X10]

    (2322) 0x4c65c0 SUB	X10, X6, #1

    (2322) 0x4c65c4 CMP	W18, #0

    (2322) 0x4c65c8 LDP	X7, X6, [X1, #1016]

    (2322) 0x4c65cc ADD	X3, X3, X17

    (2322) 0x4c65d0 ADD	X2, X2, X10

    (2322) 0x4c65d4 FMUL	D1, D29, D14

    (2322) 0x4c65d8 ADD	X17, X7, #1

    (2322) 0x4c65dc FCCMPE	D24, D1, #4, #1

    (2322) 0x4c65e0 B.GT	4c66a8

    (2322) 0x4c65e4 FMUL	D3, D15, D31

    (2322) 0x4c65e8 CMP	X17, X6

    (2322) 0x4c65ec B.GE	4c6614

      (2326) 0x4c65f0 LDR	D27, [X22, X17,LSL #3]

      (2326) 0x4c65f4 FCMPE	D3, D27

      (2326) 0x4c65f8 B.GE	4c668c

      (2326) 0x4c65fc LDR	X6, [X25, X17,LSL #3]

      (2326) 0x4c6600 STR	X6, [X19, X17,LSL #3]

      (2326) 0x4c6604 ADD	X17, X17, #1

      (2326) 0x4c6608 LDR	X11, [X1]

      (2326) 0x4c660c CMP	X11, X17

      (2326) 0x4c6610 B.GT	4c65f0

    (2322) 0x4c6614 LDR	X17, [X4]

    (2322) 0x4c6618 LDR	X28, [X12]

    (2322) 0x4c661c CMP	X28, X17

    (2322) 0x4c6620 B.GE	4c549c

    (2322) 0x4c6624 FMUL	D31, D15, D31

      (2324) 0x4c6628 LDR	D18, [X23, X28,LSL #3]

      (2324) 0x4c662c FCMPE	D31, D18

      (2324) 0x4c6630 B.GE	4c6658

      (2325) 0x4c6634 LDR	X14, [X24, X28,LSL #3]

      (2325) 0x4c6638 STR	X14, [X20, X28,LSL #3]

      (2325) 0x4c663c ADD	X28, X28, #1

      (2325) 0x4c6640 LDR	X27, [X4]

      (2325) 0x4c6644 CMP	X27, X28

      (2325) 0x4c6648 B.LE	4c549c

      (2325) 0x4c664c LDR	D18, [X23, X28,LSL #3]

      (2325) 0x4c6650 FCMPE	D31, D18

      (2325) 0x4c6654 B.MI	4c6634

      (2324) 0x4c6658 STR	X13, [X20, X28,LSL #3]

      (2324) 0x4c665c ADD	X28, X28, #1

      (2324) 0x4c6660 SUB	X3, X3, #1

      (2324) 0x4c6664 LDR	X10, [X4]

      (2324) 0x4c6668 CMP	X28, X10

      (2324) 0x4c666c B.LT	4c6628

    (2322) 0x4c6670 ADD	X5, X5, #1

    (2322) 0x4c6674 ADD	X12, X12, #8

    (2322) 0x4c6678 ADD	X4, X4, #8

    (2322) 0x4c667c ADD	X1, X1, #8

    (2322) 0x4c6680 CMP	X5, X30

    (2322) 0x4c6684 B.NE	4c4fa0

(2323) 0x4c6688 B	4c54b4

      (2326) 0x4c668c STR	X13, [X19, X17,LSL #3]

      (2326) 0x4c6690 ADD	X17, X17, #1

      (2326) 0x4c6694 SUB	X2, X2, #1

      (2326) 0x4c6698 LDR	X0, [X1]

      (2326) 0x4c669c CMP	X17, X0

      (2326) 0x4c66a0 B.LT	4c65f0

    (2322) 0x4c66a4 B	4c6614

  (2321) 0x4c66a8 MOVN	X11, #0

  (2321) 0x4c66ac CMP	X17, X6

  (2321) 0x4c66b0 B.GE	4c66dc

  (2321) 0x4c66b4 HINT	#0

  (2321) 0x4c66b8 HINT	#0

  (2321) 0x4c66bc HINT	#0

    (2344) 0x4c66c0 STR	X11, [X19, X17,LSL #3]

    (2344) 0x4c66c4 ADD	X17, X17, #1

    (2344) 0x4c66c8 LDR	X6, [X1]

    (2344) 0x4c66cc CMP	X6, X17

    (2344) 0x4c66d0 B.GT	4c66c0

  (2321) 0x4c66d4 LDUR	X27, [X1, #504]

  (2321) 0x4c66d8 ADD	X17, X27, #1

  (2321) 0x4c66dc LDR	X10, [X4]

  (2321) 0x4c66e0 SUB	X28, X6, X17

  (2321) 0x4c66e4 MOVN	X17, #0

  (2321) 0x4c66e8 SUB	X2, X2, X28

  (2321) 0x4c66ec LDR	X7, [X12]

  (2321) 0x4c66f0 CMP	X7, X10

  (2321) 0x4c66f4 B.GE	4c6718

  (2321) 0x4c66f8 HINT	#0

  (2321) 0x4c66fc HINT	#0

    (2343) 0x4c6700 STR	X17, [X20, X7,LSL #3]

    (2343) 0x4c6704 ADD	X7, X7, #1

    (2343) 0x4c6708 LDR	X10, [X4]

    (2343) 0x4c670c CMP	X10, X7

    (2343) 0x4c6710 B.GT	4c6700

  (2321) 0x4c6714 LDR	X7, [X12]

  (2321) 0x4c6718 SUB	X6, X10, X7

  (2321) 0x4c671c ADD	X5, X5, #1

  (2321) 0x4c6720 SUB	X3, X3, X6

  (2321) 0x4c6724 ADD	X12, X12, #8

  (2321) 0x4c6728 ADD	X4, X4, #8

  (2321) 0x4c672c ADD	X1, X1, #8

  (2321) 0x4c6730 CMP	X5, X30

  (2321) 0x4c6734 B.NE	4c4fa0

(2323) 0x4c6738 B	4c54b4

    (2322) 0x4c673c LDR	D6, [X23, X0,LSL #3]

    (2322) 0x4c6740 FMAXNM	D28, D28, D6

    (2322) 0x4c6744 FADD	D31, D31, D6

    (2322) 0x4c6748 B	4c5ea4

    (2322) 0x4c674c LDR	D27, [X22, X0,LSL #3]

    (2322) 0x4c6750 FMAXNM	D28, D28, D27

    (2322) 0x4c6754 FADD	D31, D31, D27

    (2322) 0x4c6758 B	4c5ca8

(2323) 0x4c675c LDR	D27, [X23, X0,LSL #3]

(2323) 0x4c6760 FMINNM	D16, D16, D27

(2323) 0x4c6764 FADD	D30, D30, D27

(2323) 0x4c6768 B	4c5264

    (2342) 0x4c676c LDR	D2, [X22, X0,LSL #3]

    (2342) 0x4c6770 FMINNM	D16, D16, D2

    (2342) 0x4c6774 FADD	D30, D30, D2

    (2342) 0x4c6778 B	4c5068

    (2322) 0x4c677c LDP	Q18, Q17, [X0, #16]

    (2322) 0x4c6780 ADD	X0, X0, #64

    (2322) 0x4c6784 LDUR	Q21, [X0, #496]

    (2322) 0x4c6788 LDR	Q28, [X23, X28]

    (2322) 0x4c678c FMINNM	V5.2D, V23.2D, V18.2D

    (2322) 0x4c6790 FMINNM	V0.2D, V23.2D, V17.2D

    (2322) 0x4c6794 ORR	V6.16B, V18.16B, V18.16B

    (2322) 0x4c6798 ORR	V18.16B, V17.16B, V17.16B

    (2322) 0x4c679c FMINNM	V30.2D, V30.2D, V28.2D

    (2322) 0x4c67a0 FMINNM	V23.2D, V23.2D, V21.2D

    (2322) 0x4c67a4 ORR	V17.16B, V21.16B, V21.16B

    (2322) 0x4c67a8 B	4c58f0

    (2322) 0x4c67ac LDP	Q18, Q19, [X6, #16]

    (2322) 0x4c67b0 ADD	X6, X6, #64

    (2322) 0x4c67b4 LDUR	Q27, [X6, #496]

    (2322) 0x4c67b8 LDR	Q30, [X22, X28]

    (2322) 0x4c67bc FMINNM	V7.2D, V20.2D, V27.2D

    (2322) 0x4c67c0 FMINNM	V23.2D, V20.2D, V18.2D

    (2322) 0x4c67c4 FMINNM	V28.2D, V20.2D, V30.2D

    (2322) 0x4c67c8 FMINNM	V24.2D, V20.2D, V19.2D

    (2322) 0x4c67cc ORR	V5.16B, V18.16B, V18.16B

    (2322) 0x4c67d0 ORR	V6.16B, V19.16B, V19.16B

    (2322) 0x4c67d4 ORR	V20.16B, V27.16B, V27.16B

    (2322) 0x4c67d8 B	4c5678

    (2322) 0x4c67dc LDR	D19, [X23, X0,LSL #3]

    (2322) 0x4c67e0 FMAXNM	D28, D28, D19

    (2322) 0x4c67e4 FADD	D31, D31, D19

    (2322) 0x4c67e8 B	4c5e90

    (2322) 0x4c67ec LDR	D3, [X22, X0,LSL #3]

    (2322) 0x4c67f0 FMAXNM	D28, D28, D3

    (2322) 0x4c67f4 FADD	D31, D31, D3

    (2322) 0x4c67f8 B	4c5c94

(2323) 0x4c67fc LDR	D3, [X23, X0,LSL #3]

(2323) 0x4c6800 FMINNM	D16, D16, D3

(2323) 0x4c6804 FADD	D30, D30, D3

(2323) 0x4c6808 B	4c5250

    (2342) 0x4c680c LDR	D20, [X22, X0,LSL #3]

    (2342) 0x4c6810 FMINNM	D16, D16, D20

    (2342) 0x4c6814 FADD	D30, D30, D20

    (2342) 0x4c6818 B	4c5054

    (2322) 0x4c681c LDR	D4, [X23, X0,LSL #3]

    (2322) 0x4c6820 FMAXNM	D28, D28, D4

    (2322) 0x4c6824 FADD	D31, D31, D4

    (2322) 0x4c6828 B	4c5e7c

    (2322) 0x4c682c LDR	D1, [X22, X0,LSL #3]

    (2322) 0x4c6830 FMAXNM	D28, D28, D1

    (2322) 0x4c6834 FADD	D31, D31, D1

    (2322) 0x4c6838 B	4c5c80

    (2322) 0x4c683c LDP	Q18, Q17, [X0, #16]

    (2322) 0x4c6840 ADD	X0, X0, #64

    (2322) 0x4c6844 LDUR	Q19, [X0, #496]

    (2322) 0x4c6848 LDR	Q28, [X23, X28]

    (2322) 0x4c684c FMAXNM	V22.2D, V23.2D, V18.2D

    (2322) 0x4c6850 FMAXNM	V2.2D, V23.2D, V17.2D

    (2322) 0x4c6854 ORR	V5.16B, V18.16B, V18.16B

    (2322) 0x4c6858 ORR	V0.16B, V17.16B, V17.16B

    (2322) 0x4c685c FMAXNM	V30.2D, V30.2D, V28.2D

    (2322) 0x4c6860 FMAXNM	V23.2D, V23.2D, V19.2D

    (2322) 0x4c6864 ORR	V18.16B, V19.16B, V19.16B

    (2322) 0x4c6868 B	4c63b4

    (2322) 0x4c686c LDP	Q19, Q18, [X11, #16]

    (2322) 0x4c6870 ADD	X11, X11, #64

    (2322) 0x4c6874 LDUR	Q2, [X11, #496]

    (2322) 0x4c6878 LDR	Q30, [X22, X27]

    (2322) 0x4c687c FMAXNM	V31.2D, V20.2D, V2.2D

    (2322) 0x4c6880 FMAXNM	V23.2D, V20.2D, V19.2D

    (2322) 0x4c6884 FMAXNM	V28.2D, V20.2D, V30.2D

    (2322) 0x4c6888 FMAXNM	V4.2D, V20.2D, V18.2D

    (2322) 0x4c688c ORR	V3.16B, V19.16B, V19.16B

    (2322) 0x4c6890 ORR	V1.16B, V18.16B, V18.16B

    (2322) 0x4c6894 ORR	V20.16B, V2.16B, V2.16B

    (2322) 0x4c6898 B	4c613c

    (2322) 0x4c689c LDR	D24, [X22, X0,LSL #3]

    (2322) 0x4c68a0 FMAXNM	D28, D28, D24

    (2322) 0x4c68a4 FADD	D31, D31, D24

    (2322) 0x4c68a8 B	4c5c6c

    (2322) 0x4c68ac LDR	D26, [X23, X0,LSL #3]

    (2322) 0x4c68b0 FMAXNM	D28, D28, D26

    (2322) 0x4c68b4 FADD	D31, D31, D26

    (2322) 0x4c68b8 B	4c5e68

    (2342) 0x4c68bc LDR	D7, [X22, X0,LSL #3]

    (2342) 0x4c68c0 FMINNM	D16, D16, D7

    (2342) 0x4c68c4 FADD	D30, D30, D7

    (2342) 0x4c68c8 B	4c5040

(2323) 0x4c68cc LDR	D1, [X23, X0,LSL #3]

(2323) 0x4c68d0 FMINNM	D16, D16, D1

(2323) 0x4c68d4 FADD	D30, D30, D1

(2323) 0x4c68d8 B	4c523c

  (2338) 0x4c68dc FMOV	D30, D29

  (2338) 0x4c68e0 MOVI	D16, #0

  (2338) 0x4c68e4 B	4c51c4

    (2322) 0x4c68e8 FMOV	D31, D29

    (2322) 0x4c68ec MOVI	D28, #0

    (2322) 0x4c68f0 B	4c5ddc

    (2322) 0x4c68f4 FMOV	D1, D29

    (2322) 0x4c68f8 MOVI	D31, #0

    (2322) 0x4c68fc SUB	X27, X7, X6

    (2322) 0x4c6900 B	4c5878

    (2322) 0x4c6904 LDR	D30, [X22, X0,LSL #3]

    (2322) 0x4c6908 ADD	X0, X0, #1

    (2322) 0x4c690c FMAXNM	D28, D28, D30

    (2322) 0x4c6910 FADD	D31, D31, D30

    (2322) 0x4c6914 B	4c5c5c

    (2322) 0x4c6918 LDR	D25, [X23, X0,LSL #3]

    (2322) 0x4c691c ADD	X0, X0, #1

    (2322) 0x4c6920 FMAXNM	D28, D28, D25

    (2322) 0x4c6924 FADD	D31, D31, D25

    (2322) 0x4c6928 B	4c5e58

    (2342) 0x4c692c LDR	D21, [X22, X0,LSL #3]

    (2342) 0x4c6930 ADD	X0, X0, #1

    (2342) 0x4c6934 FMINNM	D16, D16, D21

    (2342) 0x4c6938 FADD	D30, D29, D21

    (2342) 0x4c693c B	4c5030

(2323) 0x4c6940 LDR	D24, [X23, X14,LSL #3]

(2323) 0x4c6944 ADD	X0, X14, #1

(2323) 0x4c6948 FMINNM	D16, D16, D24

(2323) 0x4c694c FADD	D30, D30, D24

(2323) 0x4c6950 B	4c522c

    (2322) 0x4c6954 LDR	D16, [X22, X0,LSL #3]

    (2322) 0x4c6958 FMAXNM	D28, D28, D16

    (2322) 0x4c695c FADD	D31, D29, D16

    (2322) 0x4c6960 B	4c5c44

    (2322) 0x4c6964 LDR	D17, [X23, X14,LSL #3]

    (2322) 0x4c6968 FMAXNM	D28, D28, D17

    (2322) 0x4c696c FADD	D31, D31, D17

    (2322) 0x4c6970 B	4c5e40

    (2322) 0x4c6974 FMOV	D1, D29

    (2322) 0x4c6978 MOVI	D31, #0

    (2322) 0x4c697c B	4c57d4

    (2322) 0x4c6980 FMOV	D24, D29

    (2322) 0x4c6984 MOVI	D31, #0

    (2322) 0x4c6988 SUB	X6, X7, X6

    (2322) 0x4c698c B	4c633c

    (2322) 0x4c6990 FMOV	D24, D29

    (2322) 0x4c6994 MOVI	D31, #0

    (2322) 0x4c6998 B	4c6298

    (2322) 0x4c699c ORR	X28, XZR, X14

    (2322) 0x4c69a0 B	4c6510

Coverage (%)	Name	Source Location	Module
►99.28+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_2

Source file and lines	par_strength.c:246-513
Module	exec

The function is defined in /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:246-283,289-302,309-355,363-369,376-382,392-398,405-411,424-445,451-472,480,492-513.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 11.00 to 1.00 cycles (11.00x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is not vectorized. Only 75% of vector register length is used (average across all VPU instructions). By fully vectorizing your function, you can lower the cost of an iteration from 11.00 to 9.75 cycles (1.13x speedup).

Details

4% of VPU instructions are used in vector version (process two or more data elements in vector registers):

6% of VPU loads are used in vector version.
5% of VPU stores are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 11.00 to 0.50 cycles (22.00x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 232 bytes. The binary function is storing 232 bytes.

General properties

nb instructions	53
loop length	212
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

6.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	1.00	1.00	2.83	2.83	2.83	2.83	2.83	2.83	1.00	1.00	0.50	0.50	11.00	11.00	11.00	8.50	8.50
cycles	1.00	1.00	2.83	2.83	2.83	2.83	2.83	2.83	1.00	1.00	0.50	0.50	11.00	11.00	11.00	8.50	8.50

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	6.50
Overall L1	11.00

Vectorization ratios

INT

all	4%
load	6%
store	5%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	4%
load	6%
store	5%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 11.00 cycles. At this rate:

21% of peak load performance is reached (21.09 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
43% of peak store performance is reached (21.09 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 4c4ecc

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
STP X29, X30, [SP, #816]!	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X3, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X29, SP, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X1, SP, #184	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X0, SP, #176	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP D14, D15, [SP, #96]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
LDP X11, X2, [X3, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
LDP D15, D14, [X3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
STP X11, X2, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X2, XZR, X11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDP X4, X21, [X3, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
STR X4, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X10, X22, [X3, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
STR X10, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X7, X23, [X3, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
STR X7, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X8, X28, [X3, #96]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
LDP X25, X24, [X3, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
STR X8, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X9, X27, [X3, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
STR X9, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X26, X5, [X3, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
STR X5, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X19, X20, [X3, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
BL 5499e0 <hypre_GetSimpleThreadPartition>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X5, X30, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
STP XZR, XZR, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
CMP X5, X30	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
LDR X14, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDP X9, X8, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
LDP X11, X10, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
B.GE 4c54c4 <hypre_BoomerAMGCreateS._omp_fn.1+0x5f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X1, X5, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
FMOV D31, #1.0000000	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
ADD X12, X11, X5,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
MOVZ X3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
MOVN X13, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDP X15, X16, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
MOVZ X2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X4, X11, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X1, X10, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
FCMPE D14, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
CSINC W18, WZR, WZR, #5	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
STP X27, X28, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X14, X11, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STR X10, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
HINT #0																					N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_2

Source file and lines	par_strength.c:246-513
Module	exec

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

4% of VPU instructions are used in vector version (process two or more data elements in vector registers):

6% of VPU loads are used in vector version.
5% of VPU stores are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 11.00 to 0.50 cycles (22.00x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 232 bytes. The binary function is storing 232 bytes.

General properties

nb instructions	53
loop length	212
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

6.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	1.00	1.00	2.83	2.83	2.83	2.83	2.83	2.83	1.00	1.00	0.50	0.50	11.00	11.00	11.00	8.50	8.50
cycles	1.00	1.00	2.83	2.83	2.83	2.83	2.83	2.83	1.00	1.00	0.50	0.50	11.00	11.00	11.00	8.50	8.50

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	6.50
Overall L1	11.00

Vectorization ratios

INT

all	4%
load	6%
store	5%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	4%
load	6%
store	5%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 11.00 cycles. At this rate:

21% of peak load performance is reached (21.09 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
43% of peak store performance is reached (21.09 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 4c4ecc

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
STP X29, X30, [SP, #816]!	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X3, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X29, SP, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X1, SP, #184	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X0, SP, #176	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP D14, D15, [SP, #96]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
LDP X11, X2, [X3, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
LDP D15, D14, [X3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
STP X11, X2, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X2, XZR, X11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDP X4, X21, [X3, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
STR X4, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X10, X22, [X3, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
STR X10, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X7, X23, [X3, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
STR X7, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X8, X28, [X3, #96]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
LDP X25, X24, [X3, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
STR X8, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X9, X27, [X3, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
STR X9, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X26, X5, [X3, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
STR X5, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X19, X20, [X3, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
BL 5499e0 <hypre_GetSimpleThreadPartition>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X5, X30, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
STP XZR, XZR, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
CMP X5, X30	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
LDR X14, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDP X9, X8, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
LDP X11, X10, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
B.GE 4c54c4 <hypre_BoomerAMGCreateS._omp_fn.1+0x5f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X1, X5, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
FMOV D31, #1.0000000	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
ADD X12, X11, X5,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
MOVZ X3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
MOVN X13, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDP X15, X16, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
MOVZ X2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X4, X11, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X1, X10, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
FCMPE D14, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
CSINC W18, WZR, WZR, #5	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
STP X27, X28, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X14, X11, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STR X10, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
HINT #0																					N/A

Name	Coverage (%)	Time (s)
▼hypre_BoomerAMGCreateS._omp_fn.1–	0.35	0.06
▼Loop 2323 - par_strength.c:246-513 - exec–	0.00	0.00
▼Loop 2348 - par_strength.c:492-513 - exec–	0.01	0.01
○Loop 2351 - par_strength.c:498-503 - exec	0.12	0.02
▼Loop 2349 - par_strength.c:508-513 - exec–	0.00	0.00
○Loop 2350 - par_strength.c:508-513 - exec	0.00	0.00
▼Loop 2338 - par_strength.c:264-297 - exec–	0.00	0.00
○Loop 2339 - par_strength.c:289-294 - exec	0.00	0.00
▼Loop 2321 - par_strength.c:253-472 - exec–	0.00	0.00
▼Loop 2322 - par_strength.c:253-472 - exec–	0.12	0.01
○Loop 2331 - par_strength.c:451-460 - exec	0.10	0.01
○Loop 2333 - par_strength.c:324-327 - exec	0.00	0.00
○Loop 2334 - par_strength.c:376-382 - exec	0.00	0.00
○Loop 2329 - par_strength.c:463-468 - exec	0.00	0.00
○Loop 2327 - par_strength.c:316-319 - exec	0.00	0.00
○Loop 2336 - par_strength.c:278-283 - exec	0.00	0.00
○Loop 2330 - par_strength.c:463-472 - exec	0.00	0.00
○Loop 2328 - par_strength.c:311-314 - exec	0.00	0.00
○Loop 2326 - par_strength.c:424-433 - exec	0.00	0.00
○Loop 2325 - par_strength.c:436-445 - exec	0.00	0.00
○Loop 2337 - par_strength.c:270-275 - exec	0.00	0.00
○Loop 2335 - par_strength.c:363-369 - exec	0.00	0.00
○Loop 2332 - par_strength.c:329-332 - exec	0.00	0.00
○Loop 2324 - par_strength.c:436-441 - exec	0.00	0.00
○Loop 2344 - par_strength.c:345-347 - exec	0.00	0.00
○Loop 2343 - par_strength.c:351-353 - exec	0.00	0.00
▼Loop 2341 - par_strength.c:265-294 - exec–	0.00	0.00
▼Loop 2342 - par_strength.c:265-294 - exec–	0.00	0.00
○Loop 2340 - par_strength.c:265-291 - exec	0.00	0.00
○Loop 2345 - par_strength.c:405-411 - exec	0.00	0.00
○Loop 2346 - par_strength.c:392-398 - exec	0.00	0.00
○Loop 2347 - par_strength.c:297-302 - exec	0.00	0.00

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Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

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Vectorization ratios

Cycles and memory resources usage

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code