OV - exec - Function hypre_BoomerAMGBuildMultipass

	Function: hypre_BoomerAMGBuildMultipass	Module: exec	Source: par_multi_interp.c:41-2061 [...]	Coverage (incl. loops): 0.30% \| (excl. loops): 0.00%

/home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 41 - 2061

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41: {

42: #ifdef HYPRE_PROFILE

43:    hypre_profile_times[HYPRE_TIMER_ID_MULTIPASS_INTERP] -= hypre_MPI_Wtime();

44: #endif

45:

46:    MPI_Comm	           comm = hypre_ParCSRMatrixComm(A);

47:    hypre_ParCSRCommPkg    *comm_pkg = hypre_ParCSRMatrixCommPkg(S);

48:    hypre_ParCSRCommHandle *comm_handle;

49:    hypre_ParCSRCommPkg    *tmp_comm_pkg;

50:

51:    hypre_CSRMatrix *A_diag = hypre_ParCSRMatrixDiag(A);

52:    HYPRE_Real      *A_diag_data = hypre_CSRMatrixData(A_diag);

53:    HYPRE_Int             *A_diag_i = hypre_CSRMatrixI(A_diag);

54:    HYPRE_Int             *A_diag_j = hypre_CSRMatrixJ(A_diag);

55:

56:    hypre_CSRMatrix *A_offd = hypre_ParCSRMatrixOffd(A);

57:    HYPRE_Real      *A_offd_data = NULL;

58:    HYPRE_Int             *A_offd_i = hypre_CSRMatrixI(A_offd);

59:    HYPRE_Int             *A_offd_j = NULL;

60:    HYPRE_Int		   *col_map_offd_A = hypre_ParCSRMatrixColMapOffd(A);

61:    HYPRE_Int		    num_cols_offd_A = hypre_CSRMatrixNumCols(A_offd);

62:

63:    hypre_CSRMatrix *S_diag = hypre_ParCSRMatrixDiag(S);

64:    HYPRE_Int             *S_diag_i = hypre_CSRMatrixI(S_diag);

65:    HYPRE_Int             *S_diag_j = hypre_CSRMatrixJ(S_diag);

66:

67:    hypre_CSRMatrix *S_offd = hypre_ParCSRMatrixOffd(S);

68:    HYPRE_Int             *S_offd_i = hypre_CSRMatrixI(S_offd);

69:    HYPRE_Int             *S_offd_j = NULL;

70:    HYPRE_Int		   *col_map_offd_S = hypre_ParCSRMatrixColMapOffd(S);

71:    HYPRE_Int		    num_cols_offd_S = hypre_CSRMatrixNumCols(S_offd);

[...]

83:    HYPRE_Real      *P_offd_data = NULL;

84:    HYPRE_Int             *P_offd_i; /*at first counter of nonzero cols for each row,

85: 				finally will be pointer to start of row */

86:    HYPRE_Int             *P_offd_j = NULL;

87:

88:    HYPRE_Int              num_sends = 0;

89:    HYPRE_Int             *int_buf_data = NULL;

90:    HYPRE_Int             *send_map_start;

91:    HYPRE_Int             *send_map_elmt;

92:    HYPRE_Int             *send_procs;

93:    HYPRE_Int              num_recvs = 0;

94:    HYPRE_Int             *recv_vec_start;

95:    HYPRE_Int             *recv_procs;

96:    HYPRE_Int             *new_recv_vec_start = NULL;

97:    HYPRE_Int            **Pext_send_map_start = NULL;

98:    HYPRE_Int            **Pext_recv_vec_start = NULL;

99:    HYPRE_Int             *Pext_start = NULL;

100:    HYPRE_Int             *P_ncols = NULL;

101:

102:    HYPRE_Int             *CF_marker_offd = NULL;

103:    HYPRE_Int             *dof_func_offd = NULL;

104:    HYPRE_Int             *P_marker;

105:    HYPRE_Int             *P_marker_offd = NULL;

106:    HYPRE_Int             *C_array;

107:    HYPRE_Int             *C_array_offd = NULL;

108:    HYPRE_Int             *pass_array = NULL; /* contains points ordered according to pass */

[...]

114:    HYPRE_Int            **P_offd_pass = NULL;

115:    HYPRE_Int            **Pext_pass = NULL;

116:    HYPRE_Int            **new_elmts = NULL; /* new neighbors generated in each pass */

117:    HYPRE_Int             *new_counter = NULL; /* contains no. of new neighbors for

118: 					each pass */

119:    HYPRE_Int             *loc = NULL; /* contains locations for new neighbor

120: 			connections in int_o_buffer to avoid searching */

121:    HYPRE_Int             *Pext_i = NULL; /*contains P_diag_i and P_offd_i info for nonzero

122: 				cols of off proc neighbors */

123:    HYPRE_Int             *Pext_send_buffer = NULL; /* used to collect global nonzero

124: 				col ids in P_diag for send_map_elmts */

125:

126:    HYPRE_Int             *map_S_to_new = NULL;

127:    /*HYPRE_Int             *map_A_to_new = NULL;*/

128:    HYPRE_Int             *map_A_to_S = NULL;

129:    HYPRE_Int             *new_col_map_offd = NULL;

130:    HYPRE_Int             *col_map_offd_P = NULL;

131:    HYPRE_Int             *permute = NULL;

[...]

146:    HYPRE_Int             *fine_to_coarse = NULL;

147:    HYPRE_Int             *fine_to_coarse_offd = NULL;

148:

149:    HYPRE_Int             *assigned = NULL;

150:    HYPRE_Int             *assigned_offd = NULL;

[...]

185:    HYPRE_Int              local_index = -1;

186:    HYPRE_Int              new_num_cols_offd = 0;

[...]

194:    HYPRE_Int * max_num_threads = hypre_CTAlloc(HYPRE_Int, 1);

[...]

202:    max_num_threads[0] = hypre_NumThreads();

203:    cnt_nz_per_thread = hypre_CTAlloc(HYPRE_Int, max_num_threads[0]);

204:    cnt_nz_offd_per_thread = hypre_CTAlloc(HYPRE_Int, max_num_threads[0]);

205:    for(i=0; i < max_num_threads[0]; i++)

206:    {

207:        cnt_nz_offd_per_thread[i] = 0;

208:        cnt_nz_per_thread[i] = 0;

[...]

216:    hypre_MPI_Comm_size(comm,&num_procs);

217:    hypre_MPI_Comm_rank(comm,&my_id);

218:

219: #ifdef HYPRE_NO_GLOBAL_PARTITION

220:    my_first_cpt = num_cpts_global[0];

221:    /*   total_global_cpts = 0; */

222:     if (my_id == (num_procs -1)) total_global_cpts = num_cpts_global[1];

223:     hypre_MPI_Bcast(&total_global_cpts, 1, HYPRE_MPI_INT, num_procs-1, comm);

[...]

229:    if (!comm_pkg)

230:    {

231:       comm_pkg = hypre_ParCSRMatrixCommPkg(A);

232:       if (!comm_pkg)

233:       {

234:           hypre_MatvecCommPkgCreate(A);

235:

236:           comm_pkg = hypre_ParCSRMatrixCommPkg(A);

237:       }

238:       col_offd_S_to_A = NULL;

239:    }

240:

241:    if (col_offd_S_to_A)

[...]

252:    if (num_cols_offd_A)

253:    {

254:       A_offd_data = hypre_CSRMatrixData(A_offd);

255:       A_offd_j    = hypre_CSRMatrixJ(A_offd);

256:    }

257:

258:    if (num_cols_offd)

259:       S_offd_j    = hypre_CSRMatrixJ(S_offd);

260:

261:    n_fine = hypre_CSRMatrixNumRows(A_diag);

[...]

267:    if (n_fine) fine_to_coarse = hypre_CTAlloc(HYPRE_Int, n_fine);

268:

269:    n_coarse = 0;

270:    n_SF = 0;

271: #ifdef HYPRE_USING_OPENMP

272: #pragma omp parallel for private(i) reduction(+:n_coarse,n_SF ) HYPRE_SMP_SCHEDULE

[...]

278:    pass_array_size = n_fine-n_coarse-n_SF;

279:    if (pass_array_size) pass_array = hypre_CTAlloc(HYPRE_Int, pass_array_size);

280:    pass_pointer = hypre_CTAlloc(HYPRE_Int, max_num_passes+1);

281:    if (n_fine) assigned = hypre_CTAlloc(HYPRE_Int, n_fine);

282:    P_diag_i = hypre_CTAlloc(HYPRE_Int, n_fine+1);

283:    P_offd_i = hypre_CTAlloc(HYPRE_Int, n_fine+1);

284:    if (n_coarse) C_array = hypre_CTAlloc(HYPRE_Int, n_coarse);

285:

286:    if (num_cols_offd)

287:    {

288:       CF_marker_offd = hypre_CTAlloc(HYPRE_Int, num_cols_offd);

289:       if (num_functions > 1) dof_func_offd = hypre_CTAlloc(HYPRE_Int, num_cols_offd);

290:    }

291:

292:    if (num_procs > 1)

293:    {

294:       num_sends = hypre_ParCSRCommPkgNumSends(comm_pkg);

295:       send_procs = hypre_ParCSRCommPkgSendProcs(comm_pkg);

296:       send_map_start = hypre_ParCSRCommPkgSendMapStarts(comm_pkg);

297:       send_map_elmt = hypre_ParCSRCommPkgSendMapElmts(comm_pkg);

298:       num_recvs = hypre_ParCSRCommPkgNumRecvs(comm_pkg);

299:       recv_procs = hypre_ParCSRCommPkgRecvProcs(comm_pkg);

300:       recv_vec_start = hypre_ParCSRCommPkgRecvVecStarts(comm_pkg);

301:       if (send_map_start[num_sends])

302:          int_buf_data = hypre_CTAlloc(HYPRE_Int, send_map_start[num_sends]);

303:    }

304:

305:

306:    index = 0;

307:    for (i=0; i < num_sends; i++)

308:    {

309:       start = send_map_start[i];

310:       for (j = start; j < send_map_start[i+1]; j++)

311:          int_buf_data[index++] = CF_marker[send_map_elmt[j]];

312:    }

313:    if (num_procs > 1)

314:    {

315:       comm_handle = hypre_ParCSRCommHandleCreate(11, comm_pkg, int_buf_data,

316: 	 CF_marker_offd);

317:       hypre_ParCSRCommHandleDestroy(comm_handle);

318:    }

319:

320:    if (num_functions > 1)

321:    {

322:       index = 0;

323:       for (i=0; i < num_sends; i++)

324:       {

325:          start = send_map_start[i];

326:          for (j = start; j < send_map_start[i+1]; j++)

327: 	    int_buf_data[index++] = dof_func[send_map_elmt[j]];

328:       }

329:       if (num_procs > 1)

330:       {

331:          comm_handle = hypre_ParCSRCommHandleCreate(11, comm_pkg, int_buf_data,

332: 	    dof_func_offd);

333:          hypre_ParCSRCommHandleDestroy(comm_handle);

[...]

340: #pragma omp parallel for private(i) reduction(+:n_coarse_offd,n_SF_offd) HYPRE_SMP_SCHEDULE

[...]

346:    if (num_cols_offd)

347:    {

348:       assigned_offd = hypre_CTAlloc(HYPRE_Int, num_cols_offd);

349:       map_S_to_new = hypre_CTAlloc(HYPRE_Int, num_cols_offd);

350:       fine_to_coarse_offd = hypre_CTAlloc(HYPRE_Int, num_cols_offd);

351:       new_col_map_offd = hypre_CTAlloc(HYPRE_Int, n_coarse_offd);

[...]

381:    cnt = 0;

382:    p_cnt = pass_array_size-1;

383:    P_diag_i[0] = 0;

384:    P_offd_i[0] = 0;

385:    for (i = 0; i < n_fine; i++)

386:    {

387:       if (CF_marker[i] == 1)

388:       {

389:          fine_to_coarse[i] = cnt; /* this C point is assigned index

390:                                      coarse_counter on coarse grid,

391:                                      and in column of P */

392:          C_array[cnt++] = i;

393:          assigned[i] = 0;

394:          P_diag_i[i+1] = 1; /* one element in row i1 of P */

395:          P_offd_i[i+1] = 0;

396:       }

397:       else if (CF_marker[i] == -1)

398:       {

399:          pass_array[p_cnt--] = i;

400:          P_diag_i[i+1] = 0;

401:          P_offd_i[i+1] = 0;

402:          assigned[i] = -1;

403:          fine_to_coarse[i] = -1;

404:       }

405:       else

406:       {

407:          P_diag_i[i+1] = 0;

408:          P_offd_i[i+1] = 0;

409:          assigned[i] = -1;

410:          fine_to_coarse[i] = -1;

411:       }

412:    }

413:

414:    index = 0;

415:    for (i=0; i < num_sends; i++)

416:    {

417:       start = send_map_start[i];

418:       for (j = start; j < send_map_start[i+1]; j++)

419:       {

420:          int_buf_data[index] = fine_to_coarse[send_map_elmt[j]];

421:          if (int_buf_data[index] > -1)

422:             int_buf_data[index] += my_first_cpt;

423:          index++;

424:       }

425:    }

426:    if (num_procs > 1)

427:    {

428:       comm_handle = hypre_ParCSRCommHandleCreate(11, comm_pkg, int_buf_data,

429:          fine_to_coarse_offd);

430:       hypre_ParCSRCommHandleDestroy(comm_handle);

431:    }

432:

433:    new_recv_vec_start = hypre_CTAlloc(HYPRE_Int,num_recvs+1);

434:

435:    if (n_coarse_offd)

436:       C_array_offd = hypre_CTAlloc(HYPRE_Int,n_coarse_offd);

437:

438:    cnt = 0;

439:    new_recv_vec_start[0] = 0;

440:    for (j = 0; j < num_recvs; j++)

441:    {

442:       for (i = recv_vec_start[j]; i < recv_vec_start[j+1]; i++)

443:       {

444:          if (CF_marker_offd[i] == 1)

445:          {

446:             map_S_to_new[i] = cnt;

447:             C_array_offd[cnt] = i;

448:             new_col_map_offd[cnt++] = fine_to_coarse_offd[i];

449:             assigned_offd[i] = 0;

450:          }

451:          else

452:          {

453:             assigned_offd[i] = -1;

454:             map_S_to_new[i] = -1;

455:          }

456:       }

457:       new_recv_vec_start[j+1] = cnt;

458:    }

459:

460:    cnt = 0;

461:    hypre_TFree(fine_to_coarse_offd);

462:

463:    if (col_offd_S_to_A)

464:    {

465:       map_A_to_S = hypre_CTAlloc(HYPRE_Int,num_cols_offd_A);

466:       for (i=0; i < num_cols_offd_A; i++)

467:       {

468:         if (cnt < num_cols_offd && col_map_offd_A[i] == col_map_offd[cnt])

469:            map_A_to_S[i] = cnt++;

[...]

479:    pass_pointer[0] = 0;

480:    pass_pointer[1] = 0;

481:    total_nz = n_coarse;  /* accumulates total number of nonzeros in P_diag */

482:    total_nz_offd = 0; /* accumulates total number of nonzeros in P_offd */

483:

484:    cnt = 0;

485:    cnt_offd = 0;

486:    cnt_nz = 0;

487:    cnt_nz_offd = 0;

488:    for (i = pass_array_size-1; i > cnt-1; i--)

489:    {

490:      i1 = pass_array[i];

491:      for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++)

492:      {

493:         j1 = S_diag_j[j];

494:         if (CF_marker[j1] == 1)

495:         {

496:            P_diag_i[i1+1]++;

497:            cnt_nz++;

498:            assigned[i1] = 1;

499:         }

500:      }

501:      for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++)

502:      {

503:         j1 = S_offd_j[j];

504:         if (CF_marker_offd[j1] == 1)

505:         {

506:            P_offd_i[i1+1]++;

507:            cnt_nz_offd++;

508:            assigned[i1] = 1;

509:         }

510:      }

511:      if (assigned[i1] == 1)

512:      {

513:         pass_array[i++] = pass_array[cnt];

514:         pass_array[cnt++] = i1;

515:      }

516:    }

517:

518:    pass_pointer[2] = cnt;

[...]

525:    index = 0;

526:    for (i=0; i < num_sends; i++)

527:    {

528:       start = send_map_start[i];

529:       for (j = start; j < send_map_start[i+1]; j++)

530:       {    int_buf_data[index++] = assigned[send_map_elmt[j]]; }

531:    }

532:    if (num_procs > 1)

533:    {

534:       comm_handle = hypre_ParCSRCommHandleCreate(11, comm_pkg, int_buf_data,

535:                      assigned_offd);

536:       hypre_ParCSRCommHandleDestroy(comm_handle);

[...]

544:    pass = 2;

545:    local_pass_array_size = pass_array_size - cnt;

546:    hypre_MPI_Allreduce(&local_pass_array_size, &global_pass_array_size, 1, HYPRE_MPI_INT,

547:                        hypre_MPI_SUM, comm);

548:    while (global_pass_array_size && pass < max_num_passes)

549:    {

550:       for (i = pass_array_size-1; i > cnt-1; i--)

551:       {

552:          i1 = pass_array[i];

553:          no_break = 1;

554:          for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++)

555:          {

556:             j1 = S_diag_j[j];

557:             if (assigned[j1] == pass-1)

[...]

568:             for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++)

569:             {

570:                j1 = S_offd_j[j];

571:                if (assigned_offd[j1] == pass-1)

572:                {

573:                   pass_array[i++] = pass_array[cnt];

574:                   pass_array[cnt++] = i1;

575:                   assigned[i1] = pass;

576:                   break;

[...]

583:       pass++;

584:       pass_pointer[pass] = cnt;

585:

586:       local_pass_array_size = pass_array_size - cnt;

587:       hypre_MPI_Allreduce(&local_pass_array_size, &global_pass_array_size, 1, HYPRE_MPI_INT,

588:                           hypre_MPI_SUM, comm);

589:       index = 0;

590:       for (i=0; i < num_sends; i++)

591:       {

592:          start = send_map_start[i];

593:          for (j = start; j < send_map_start[i+1]; j++)

594:          {   int_buf_data[index++] = assigned[send_map_elmt[j]]; }

595:       }

596:       if (num_procs > 1)

597:       {

598:          comm_handle = hypre_ParCSRCommHandleCreate(11, comm_pkg, int_buf_data,

599:                        assigned_offd);

600:          hypre_ParCSRCommHandleDestroy(comm_handle);

601:       }

602:    }

603:

604:    hypre_TFree(int_buf_data);

605:

606:    num_passes = pass;

607:

608:    P_diag_pass = hypre_CTAlloc(HYPRE_Int*,num_passes); /* P_diag_pass[i] will contain

609:                                  all column numbers for points of pass i */

610:

611:    P_diag_pass[1] = hypre_CTAlloc(HYPRE_Int,cnt_nz);

612:

613:    P_diag_start = hypre_CTAlloc(HYPRE_Int, n_fine); /* P_diag_start[i] contains

614:            pointer to begin of column numbers in P_pass for point i,

615:            P_diag_i[i+1] contains number of columns for point i */

616:

617:    P_offd_start = hypre_CTAlloc(HYPRE_Int, n_fine);

618:

619:    if (num_procs > 1)

620:    {

621:       P_offd_pass = hypre_CTAlloc(HYPRE_Int*,num_passes);

622:

623:       if (cnt_nz_offd)

624:          P_offd_pass[1] = hypre_CTAlloc(HYPRE_Int,cnt_nz_offd);

625:       else

626:          P_offd_pass[1] = NULL;

627:

628:       new_elmts = hypre_CTAlloc(HYPRE_Int*,num_passes);

629:

630:       new_counter = hypre_CTAlloc(HYPRE_Int, num_passes+1);

631:

632:       new_counter[0] = 0;

633:       new_counter[1] = n_coarse_offd;

634:       new_num_cols_offd = n_coarse_offd;

635:

636:       new_elmts[0] = new_col_map_offd;

[...]

643:    cnt_nz = 0;

644:    cnt_nz_offd = 0;

645:    /* JBS: Possible candidate for threading */

646:    for (i=pass_pointer[1]; i < pass_pointer[2]; i++)

647:    {

648:       i1 = pass_array[i];

649:       P_diag_start[i1] = cnt_nz;

650:       P_offd_start[i1] = cnt_nz_offd;

651:       for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++)

652:       {

653:          j1 = S_diag_j[j];

654:          if (CF_marker[j1] == 1)

655:          {   P_diag_pass[1][cnt_nz++] = fine_to_coarse[j1]; }

656:       }

657:       for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++)

658:       {

659:          j1 = S_offd_j[j];

660:          if (CF_marker_offd[j1] == 1)

661:          {   P_offd_pass[1][cnt_nz_offd++] = map_S_to_new[j1]; }

662:       }

663:    }

664:

665:

666:    total_nz += cnt_nz;

667:    total_nz_offd += cnt_nz_offd;

668:

669:    if (num_procs > 1)

670:    {

671:       tmp_comm_pkg = hypre_CTAlloc(hypre_ParCSRCommPkg,1);

672:       Pext_send_map_start = hypre_CTAlloc(HYPRE_Int*,num_passes);

673:       Pext_recv_vec_start = hypre_CTAlloc(HYPRE_Int*,num_passes);

674:       Pext_pass = hypre_CTAlloc(HYPRE_Int*,num_passes);

675:       Pext_i = hypre_CTAlloc(HYPRE_Int, num_cols_offd+1);

676:       if (num_cols_offd) Pext_start = hypre_CTAlloc(HYPRE_Int, num_cols_offd);

677:       if (send_map_start[num_sends])

678:          P_ncols = hypre_CTAlloc(HYPRE_Int,send_map_start[num_sends]);

679: #ifdef HYPRE_USING_OPENMP

680: #pragma omp parallel for private(i) HYPRE_SMP_SCHEDULE

681: #endif

682:       for (i=0; i < num_cols_offd+1; i++)

683:       {   Pext_i[i] = 0; }

684: #ifdef HYPRE_USING_OPENMP

685: #pragma omp parallel for private(i) HYPRE_SMP_SCHEDULE

[...]

691:    old_Pext_send_size = 0;

692:    old_Pext_recv_size = 0;

693:    for (pass=2; pass < num_passes; pass++)

694:    {

695:

696:       if (num_procs > 1)

697:       {

698:          Pext_send_map_start[pass] = hypre_CTAlloc(HYPRE_Int, num_sends+1);

699:          Pext_recv_vec_start[pass] = hypre_CTAlloc(HYPRE_Int, num_recvs+1);

700:          Pext_send_size = 0;

701:          Pext_send_map_start[pass][0] = 0;

702:

703:          for (i=0; i < num_sends; i++)

704:          {

705: #ifdef HYPRE_USING_OPENMP

706: #pragma omp parallel for private(j,j1) reduction(+:Pext_send_size) HYPRE_SMP_SCHEDULE

[...]

717:             Pext_send_map_start[pass][i+1] = Pext_send_size;

718:          }

719:

720:          comm_handle = hypre_ParCSRCommHandleCreate (11, comm_pkg,

721:                                               P_ncols, &Pext_i[1]);

722:          hypre_ParCSRCommHandleDestroy(comm_handle);

723:

724:          if (Pext_send_size > old_Pext_send_size)

725:          {

726:             hypre_TFree(Pext_send_buffer);

727:             Pext_send_buffer = hypre_CTAlloc(HYPRE_Int, Pext_send_size);

728:          }

729:          old_Pext_send_size = Pext_send_size;

730:       }

731:

732:       cnt_offd = 0;

733:       for (i=0; i < num_sends; i++)

734:       {

735:          for (j=send_map_start[i]; j < send_map_start[i+1]; j++)

736:          {

737:             j1 = send_map_elmt[j];

738:             if (assigned[j1] == pass-1)

739:             {

740:                j_start = P_diag_start[j1];

741:                j_end = j_start+P_diag_i[j1+1];

742:                for (k=j_start; k < j_end; k++)

743:                {

744:                 Pext_send_buffer[cnt_offd++] = my_first_cpt

745:                     +P_diag_pass[pass-1][k];

746:                }

747:                j_start = P_offd_start[j1];

748:                j_end = j_start+P_offd_i[j1+1];

749:                for (k=j_start; k < j_end; k++)

750:                {

751:                  k1 = P_offd_pass[pass-1][k];

752:                  k3 = 0;

753:                  while (k3 < pass-1)

754:                  {

755:                     if (k1 < new_counter[k3+1])

756:                     {

757:                        k2 = k1-new_counter[k3];

758:                        Pext_send_buffer[cnt_offd++] = new_elmts[k3][k2];

759:                        break;

[...]

768:       if (num_procs > 1)

769:       {

770:          Pext_recv_size = 0;

771:          Pext_recv_vec_start[pass][0] = 0;

772:          cnt_offd = 0;

773:          for (i=0; i < num_recvs; i++)

774:          {

775:             for (j=recv_vec_start[i]; j<recv_vec_start[i+1]; j++)

776:             {

777:                if (assigned_offd[j] == pass-1)

778:                {

779:                   Pext_start[j] = cnt_offd;

780:                   cnt_offd += Pext_i[j+1];

781:                }

782:             }

783:             Pext_recv_size = cnt_offd;

784:             Pext_recv_vec_start[pass][i+1] = Pext_recv_size;

785:          }

786:

787:          hypre_ParCSRCommPkgComm(tmp_comm_pkg) = comm;

788:          hypre_ParCSRCommPkgNumSends(tmp_comm_pkg) = num_sends;

789:          hypre_ParCSRCommPkgSendProcs(tmp_comm_pkg) = send_procs;

790:          hypre_ParCSRCommPkgSendMapStarts(tmp_comm_pkg) =

791:             Pext_send_map_start[pass];

792:          hypre_ParCSRCommPkgNumRecvs(tmp_comm_pkg) = num_recvs;

793:          hypre_ParCSRCommPkgRecvProcs(tmp_comm_pkg) = recv_procs;

794:          hypre_ParCSRCommPkgRecvVecStarts(tmp_comm_pkg) =

795:             Pext_recv_vec_start[pass];

796:

797:          if (Pext_recv_size)

798:          {

799:             Pext_pass[pass] = hypre_CTAlloc(HYPRE_Int, Pext_recv_size);

800:             new_elmts[pass-1] = hypre_CTAlloc(HYPRE_Int,Pext_recv_size);

801:          }

802:          else

803:          {

804:             Pext_pass[pass] = NULL;

805:             new_elmts[pass-1] = NULL;

806:          }

807:

808:          comm_handle = hypre_ParCSRCommHandleCreate (11, tmp_comm_pkg,

809:             Pext_send_buffer, Pext_pass[pass]);

810:          hypre_ParCSRCommHandleDestroy(comm_handle);

811:

812:          if (Pext_recv_size > old_Pext_recv_size)

813:          {

814:             hypre_TFree(loc);

815:             loc = hypre_CTAlloc(HYPRE_Int,Pext_recv_size);

816:          }

817:          old_Pext_recv_size = Pext_recv_size;

818:       }

819:

820:       cnt_new = 0;

821:       cnt_offd = 0;

822:       /* JBS: Possible candidate for threading */

823:       for (i=0; i < num_recvs; i++)

824:       {

825:          for (j=recv_vec_start[i]; j < recv_vec_start[i+1]; j++)

826:          {

827:             if (assigned_offd[j] == pass-1)

828:             {

829:                for (j1 = cnt_offd; j1 < cnt_offd+Pext_i[j+1]; j1++)

830:                {

831:                   k1 = Pext_pass[pass][j1];

832:                   k2 = k1 - my_first_cpt;

833:                   if (k2 > -1 && k2 < n_coarse)

834:                   {  Pext_pass[pass][j1] = -k2-1; }

835:                   else

836:                   {

837:                      not_found = 1;

838:                      k3 = 0;

839:                      while (k3 < pass-1 && not_found)

840:                      {

841:                         k2 = hypre_BinarySearch(new_elmts[k3], k1,

842:                                 (new_counter[k3+1]-new_counter[k3]));

843:                         if (k2 > -1)

844:                         {

845:                             Pext_pass[pass][j1] = k2 + new_counter[k3];

846:                             not_found = 0;

847:                         }

848:                         else

849:                         {

850:                             k3++;

851:                         }

852:                      }

853:                      if (not_found)

854:                      {

855:                          new_elmts[pass-1][cnt_new] = Pext_pass[pass][j1];

856:                          loc[cnt_new++] = j1;

857:                      }

858:                   }

859:                }

860:                cnt_offd += Pext_i[j+1];

861:             }

862:          }

863:       }

864:

865:       if (cnt_new)

866:       {

867:          hypre_qsort2i(new_elmts[pass-1],loc,0,cnt_new-1);

868:          cnt = 0;

869:          local_index = new_counter[pass-1];

870:          Pext_pass[pass][loc[0]] = local_index;

871:

872:          for (i=1; i < cnt_new; i++)

873:          {

874:             if (new_elmts[pass-1][i] > new_elmts[pass-1][cnt])

875:             {

876:                new_elmts[pass-1][++cnt] = new_elmts[pass-1][i];

877:                local_index++;

878:             }

879:             Pext_pass[pass][loc[i]] = local_index;

880:          }

881:          new_counter[pass] = local_index+1;

882:       }

883:       else if (num_procs > 1)

884:          new_counter[pass] = new_counter[pass-1];

885:

886:       if (new_num_cols_offd < local_index+1)

887:       {    new_num_cols_offd = local_index+1; }

888:

889:       pass_length = pass_pointer[pass+1] - pass_pointer[pass];

890:       #ifdef HYPRE_USING_OPENMP

891:       #pragma omp parallel private(i,my_thread_num,num_threads,thread_start,thread_stop,cnt_nz,cnt_nz_offd,i1,j,j1,j_start,j_end,k1,k,P_marker,P_marker_offd)

[...]

1140:    hypre_TFree(loc);

1141:    hypre_TFree(P_ncols);

1142:    hypre_TFree(Pext_send_buffer);

1143:    hypre_TFree(new_recv_vec_start);

1144:    hypre_TFree(cnt_nz_per_thread);

1145:    hypre_TFree(cnt_nz_offd_per_thread);

1146:    hypre_TFree(max_num_threads);

1147:

1148:    P_diag_j = hypre_CTAlloc(HYPRE_Int,total_nz);

1149:    P_diag_data = hypre_CTAlloc(HYPRE_Real,total_nz);

1150:

1151:

1152:    if (total_nz_offd)

1153:    {

1154:       P_offd_j = hypre_CTAlloc(HYPRE_Int,total_nz_offd);

1155:       P_offd_data = hypre_CTAlloc(HYPRE_Real,total_nz_offd);

1156:    }

1157:

1158:    for (i=0; i < n_fine; i++)

1159:    {

1160:       P_diag_i[i+1] += P_diag_i[i];

1161:       P_offd_i[i+1] += P_offd_i[i];

[...]

1167: #pragma omp parallel for private(i,i1) HYPRE_SMP_SCHEDULE

[...]

1177:    if (weight_option) /*if this is set, weights are separated into

1178:                         negative and positive offdiagonals and accumulated

1179:                         accordingly */

1180:    {

1181:

1182:        pass_length = pass_pointer[2]-pass_pointer[1];

1183: #ifdef HYPRE_USING_OPENMP

1184: #pragma omp parallel private(thread_start,thread_stop,my_thread_num,num_threads,P_marker,P_marker_offd,i,i1,sum_C_pos,sum_C_neg,sum_N_pos,sum_N_neg,j_start,j_end,j,k1,cnt,j1,cnt_offd,diagonal,alfa,beta)

[...]

1304:       if (n_coarse) hypre_TFree(C_array);

1305:       hypre_TFree(C_array_offd);

1306:       hypre_TFree(P_diag_pass[1]);

1307:       if (num_procs > 1) hypre_TFree(P_offd_pass[1]);

1308:

1309:

1310:       for (pass = 2; pass < num_passes; pass++)

1311:       {

1312:

1313:          if (num_procs > 1)

1314:          {

1315:             Pext_send_size = Pext_send_map_start[pass][num_sends];

1316:             if (Pext_send_size > old_Pext_send_size)

1317:             {

1318:                hypre_TFree(Pext_send_data);

1319:                Pext_send_data = hypre_CTAlloc(HYPRE_Real, Pext_send_size);

1320:             }

1321:             old_Pext_send_size = Pext_send_size;

1322:

1323:             cnt_offd = 0;

1324:             for (i=0; i < num_sends; i++)

1325:             {

1326:                for (j=send_map_start[i]; j < send_map_start[i+1]; j++)

1327:                {

1328:                   j1 = send_map_elmt[j];

1329:                   if (assigned[j1] == pass-1)

1330:                   {

1331:                      j_start = P_diag_i[j1];

1332:                      j_end = P_diag_i[j1+1];

1333:                      for (k=j_start; k < j_end; k++)

1334:                      {   Pext_send_data[cnt_offd++] = P_diag_data[k]; }

1335:                      j_start = P_offd_i[j1];

1336:                      j_end = P_offd_i[j1+1];

1337:                      for (k=j_start; k < j_end; k++)

1338:                      {  Pext_send_data[cnt_offd++] = P_offd_data[k]; }

1339:                   }

1340:                }

1341:             }

1342:

1343:             hypre_ParCSRCommPkgNumSends(tmp_comm_pkg) = num_sends;

1344:             hypre_ParCSRCommPkgSendMapStarts(tmp_comm_pkg) =

1345:                 Pext_send_map_start[pass];

1346:             hypre_ParCSRCommPkgNumRecvs(tmp_comm_pkg) = num_recvs;

1347:             hypre_ParCSRCommPkgRecvVecStarts(tmp_comm_pkg) =

1348:                 Pext_recv_vec_start[pass];

1349:

1350:             Pext_recv_size = Pext_recv_vec_start[pass][num_recvs];

1351:

1352:             if (Pext_recv_size > old_Pext_recv_size)

1353:             {

1354:                hypre_TFree(Pext_data);

1355:                Pext_data = hypre_CTAlloc(HYPRE_Real, Pext_recv_size);

1356:             }

1357:             old_Pext_recv_size = Pext_recv_size;

1358:

1359:             comm_handle = hypre_ParCSRCommHandleCreate (1, tmp_comm_pkg,

1360:                 Pext_send_data, Pext_data);

1361:             hypre_ParCSRCommHandleDestroy(comm_handle);

1362:

1363:             hypre_TFree(Pext_send_map_start[pass]);

1364:             hypre_TFree(Pext_recv_vec_start[pass]);

1365:          }

1366:

1367:          pass_length = pass_pointer[pass+1]-pass_pointer[pass];

1368: #ifdef HYPRE_USING_OPENMP

1369: #pragma omp parallel private(thread_start,thread_stop,my_thread_num,num_threads,P_marker,P_marker_offd,i,i1,sum_C_neg,sum_C_pos,sum_N_neg,sum_N_pos,j_start,j_end,cnt,j,k1,cnt_offd,j1,k,alfa,beta,diagonal,C_array,C_array_offd)

[...]

1562:          hypre_TFree(P_diag_pass[pass]);

1563:          if (num_procs > 1)

1564:          {

1565:             hypre_TFree(P_offd_pass[pass]);

1566:             hypre_TFree(Pext_pass[pass]);

[...]

1575: #pragma omp parallel private(thread_start,thread_stop,my_thread_num,num_threads,k,k1,i,i1,j,j1,sum_C,sum_N,j_start,j_end,cnt,tmp_marker,tmp_marker_offd,cnt_offd,diagonal,alfa)

[...]

1669:       if (n_coarse) hypre_TFree(C_array);

1670:       hypre_TFree(C_array_offd);

1671:       hypre_TFree(P_diag_pass[1]);

1672:       if (num_procs > 1) hypre_TFree(P_offd_pass[1]);

1673:

1674:       for (pass = 2; pass < num_passes; pass++)

1675:       {

1676:

1677:          if (num_procs > 1)

1678:          {

1679:             Pext_send_size = Pext_send_map_start[pass][num_sends];

1680:             if (Pext_send_size > old_Pext_send_size)

1681:             {

1682:                hypre_TFree(Pext_send_data);

1683:                Pext_send_data = hypre_CTAlloc(HYPRE_Real, Pext_send_size);

1684:             }

1685:             old_Pext_send_size = Pext_send_size;

1686:

1687:             cnt_offd = 0;

1688:             for (i=0; i < num_sends; i++)

1689:             {

1690:                for (j=send_map_start[i]; j < send_map_start[i+1]; j++)

1691:                {

1692:                   j1 = send_map_elmt[j];

1693:                   if (assigned[j1] == pass-1)

1694:                   {

1695:                      j_start = P_diag_i[j1];

1696:                      j_end = P_diag_i[j1+1];

1697:                      for (k=j_start; k < j_end; k++)

1698:                      {

1699:                         Pext_send_data[cnt_offd++] = P_diag_data[k];

1700:                      }

1701:                      j_start = P_offd_i[j1];

1702:                      j_end = P_offd_i[j1+1];

1703:                      for (k=j_start; k < j_end; k++)

1704:                      {

1705:                         Pext_send_data[cnt_offd++] = P_offd_data[k];

[...]

1711:             hypre_ParCSRCommPkgNumSends(tmp_comm_pkg) = num_sends;

1712:             hypre_ParCSRCommPkgSendMapStarts(tmp_comm_pkg) =

1713:                 Pext_send_map_start[pass];

1714:             hypre_ParCSRCommPkgNumRecvs(tmp_comm_pkg) = num_recvs;

1715:             hypre_ParCSRCommPkgRecvVecStarts(tmp_comm_pkg) =

1716:                 Pext_recv_vec_start[pass];

1717:

1718:             Pext_recv_size = Pext_recv_vec_start[pass][num_recvs];

1719:

1720:             if (Pext_recv_size > old_Pext_recv_size)

1721:             {

1722:                hypre_TFree(Pext_data);

1723:                Pext_data = hypre_CTAlloc(HYPRE_Real, Pext_recv_size);

1724:             }

1725:             old_Pext_recv_size = Pext_recv_size;

1726:

1727:             comm_handle = hypre_ParCSRCommHandleCreate (1, tmp_comm_pkg,

1728:                 Pext_send_data, Pext_data);

1729:             hypre_ParCSRCommHandleDestroy(comm_handle);

1730:

1731:             hypre_TFree(Pext_send_map_start[pass]);

1732:             hypre_TFree(Pext_recv_vec_start[pass]);

1733:          }

1734:

1735:          pass_length = pass_pointer[pass+1]-pass_pointer[pass];

1736: #ifdef HYPRE_USING_OPENMP

1737: #pragma omp parallel private(thread_start,thread_stop,my_thread_num,num_threads,k,k1,i,i1,j,j1,sum_C,sum_N,j_start,j_end,cnt,tmp_marker,tmp_marker_offd,cnt_offd,diagonal,alfa,tmp_array,tmp_array_offd)

[...]

1884:          hypre_TFree(P_diag_pass[pass]);

1885:          if (num_procs > 1)

1886:          {

1887:             hypre_TFree(P_offd_pass[pass]);

1888:             hypre_TFree(Pext_pass[pass]);

1889:          }

1890:       }

1891:    }

1892:

1893:    hypre_TFree(CF_marker_offd);

1894:    hypre_TFree(Pext_send_map_start);

1895:    hypre_TFree(Pext_recv_vec_start);

1896:    hypre_TFree(dof_func_offd);

1897:    hypre_TFree(Pext_send_data);

1898:    hypre_TFree(Pext_data);

1899:    hypre_TFree(P_diag_pass);

1900:    hypre_TFree(P_offd_pass);

1901:    hypre_TFree(Pext_pass);

1902:    hypre_TFree(P_diag_start);

1903:    hypre_TFree(P_offd_start);

1904:    hypre_TFree(Pext_start);

1905:    hypre_TFree(Pext_i);

1906:    hypre_TFree(fine_to_coarse);

1907:    hypre_TFree(assigned);

1908:    hypre_TFree(assigned_offd);

1909:    hypre_TFree(pass_pointer);

1910:    hypre_TFree(pass_array);

1911:    hypre_TFree(map_S_to_new);

1912:    hypre_TFree(map_A_to_S);

1913:    if (num_procs > 1) hypre_TFree(tmp_comm_pkg);

1914:

1915:     P = hypre_ParCSRMatrixCreate(comm,

[...]

1921:                                 P_diag_i[n_fine],

1922:                                 P_offd_i[n_fine]);

1923:    P_diag = hypre_ParCSRMatrixDiag(P);

1924:    hypre_CSRMatrixData(P_diag) = P_diag_data;

1925:    hypre_CSRMatrixI(P_diag) = P_diag_i;

1926:    hypre_CSRMatrixJ(P_diag) = P_diag_j;

1927:    P_offd = hypre_ParCSRMatrixOffd(P);

1928:    hypre_CSRMatrixData(P_offd) = P_offd_data;

1929:    hypre_CSRMatrixI(P_offd) = P_offd_i;

1930:    hypre_CSRMatrixJ(P_offd) = P_offd_j;

1931:    hypre_ParCSRMatrixOwnsRowStarts(P) = 0;

1932:

1933:    /* Compress P, removing coefficients smaller than trunc_factor * Max

1934:       and/or keep yat most <P_max_elmts> per row absolutely maximal coefficients */

1935:

1936:    if (trunc_factor != 0.0 || P_max_elmts != 0)

1937:    {

1938:       hypre_BoomerAMGInterpTruncation(P, trunc_factor, P_max_elmts);

[...]

1944:       P_offd_j = hypre_CSRMatrixJ(P_offd);

1945:    }

1946:    P_offd_size = P_offd_i[n_fine];

1947:

1948:    num_cols_offd_P = 0;

1949:    if (P_offd_size)

1950:    {

1951:       if (new_num_cols_offd > num_cols_offd)

1952:       {   P_marker_offd = hypre_CTAlloc(HYPRE_Int,new_num_cols_offd); }

1953:       else

1954:       {   P_marker_offd = hypre_CTAlloc(HYPRE_Int,num_cols_offd); }

1955: #ifdef HYPRE_USING_OPENMP

1956: #pragma omp parallel for private(i) HYPRE_SMP_SCHEDULE

1957: #endif

1958:       for (i=0; i < new_num_cols_offd; i++)

1959:       {   P_marker_offd[i] = 0; }

1960:

1961:       num_cols_offd_P = 0;

1962:       for (i=0; i < P_offd_size; i++)

1963:       {

1964:          index = P_offd_j[i];

1965:          if (!P_marker_offd[index])

1966:          {

1967:             num_cols_offd_P++;

1968:             P_marker_offd[index] = 1;

1969:          }

1970:       }

1971:

1972:       col_map_offd_P = hypre_CTAlloc(HYPRE_Int,num_cols_offd_P);

1973:       permute = hypre_CTAlloc(HYPRE_Int, new_counter[num_passes-1]);

1974:

1975: #ifdef HYPRE_USING_OPENMP

1976: #pragma omp parallel for private(i) HYPRE_SMP_SCHEDULE

1977: #endif

1978:       for (i=0; i < new_counter[num_passes-1]; i++)

1979:          permute[i] = -1;

1980:

1981:       cnt = 0;

1982:       for (i=0; i < num_passes-1; i++)

1983:       {

1984:          for (j=new_counter[i]; j < new_counter[i+1]; j++)

1985:          {

1986:             if (P_marker_offd[j])

1987:             {

1988:                col_map_offd_P[cnt] = new_elmts[i][j-new_counter[i]];

1989:                permute[j] = col_map_offd_P[cnt++];

1990:             }

1991:          }

1992:       }

1993:

1994:       hypre_qsort0(col_map_offd_P,0,num_cols_offd_P-1);

1995:

1996: #ifdef HYPRE_USING_OPENMP

1997: #pragma omp parallel for private(i,k1) HYPRE_SMP_SCHEDULE

[...]

2007: #pragma omp parallel for private(i) HYPRE_SMP_SCHEDULE

2008: #endif

2009:       for (i=0; i < P_offd_size; i++)

2010:       {   P_offd_j[i] = permute[P_offd_j[i]]; }

2011:

2012:       hypre_TFree(P_marker_offd);

2013:    }

2014:    if (num_procs > 1)

2015:    {

2016:       for (i=0; i < num_passes-1; i++)

2017:          hypre_TFree(new_elmts[i]);

2018:    }

2019:    hypre_TFree(permute);

2020:    hypre_TFree(new_elmts);

2021:    hypre_TFree(new_counter);

2022:

2023:    if (num_cols_offd_P)

2024:    {

2025:         hypre_ParCSRMatrixColMapOffd(P) = col_map_offd_P;

2026:         hypre_CSRMatrixNumCols(P_offd) = num_cols_offd_P;

2027:    }

2028:

2029:    if (n_SF)

2030:    {

2031: #ifdef HYPRE_USING_OPENMP

2032: #pragma omp parallel for private(i) HYPRE_SMP_SCHEDULE

[...]

2038:    if (num_procs > 1)

2039:    {

2040:         hypre_MatvecCommPkgCreate(P);

2041:    }

2042:

2043:    *P_ptr = P;

[...]

2061: }

0x45e600 SUB	SP, SP, #1184

0x45e604 ORR	X6, XZR, X1

0x45e608 ORR	X8, XZR, X0

0x45e60c MOVZ	X1, #8

0x45e610 STP	X29, X30, [SP]

0x45e614 ADD	X29, SP, #0

0x45e618 STR	X0, [SP, #680]

0x45e61c ADD	X0, X0, #56

0x45e620 STP	X19, X20, [SP, #16]

0x45e624 STP	X21, X22, [SP, #32]

0x45e628 STP	X23, X24, [SP, #48]

0x45e62c STP	X25, X26, [SP, #64]

0x45e630 STP	X27, X28, [SP, #80]

0x45e634 STR	D15, [SP, #96]

0x45e638 FMOV	D15, D0

0x45e63c LDP	X22, X24, [X0]

0x45e640 MOVZ	X0, #1

0x45e644 STR	X6, [SP, #320]

0x45e648 STR	X4, [SP, #432]

0x45e64c STR	X3, [SP, #688]

0x45e650 LDP	X3, X20, [X2, #56]

0x45e654 STR	X5, [SP, #584]

0x45e658 LDR	X4, [X24]

0x45e65c STR	X7, [SP, #728]

0x45e660 LDR	X5, [X20]

0x45e664 LDR	X7, [X8]

0x45e668 STR	X4, [SP, #616]

0x45e66c STR	X5, [SP, #488]

0x45e670 STR	X7, [SP, #400]

0x45e674 LDP	X9, X10, [X22]

0x45e678 STR	X9, [SP, #600]

0x45e67c STR	X10, [SP, #608]

0x45e680 LDP	X11, X12, [X3]

0x45e684 STR	X12, [SP, #120]

0x45e688 STR	X11, [SP, #480]

0x45e68c LDR	X13, [X20, #24]

0x45e690 LDR	X14, [X22, #48]

0x45e694 LDR	X19, [X2, #88]

0x45e698 STR	X13, [SP, #192]

0x45e69c LDR	X2, [X2, #112]

0x45e6a0 STR	X14, [SP, #592]

0x45e6a4 LDR	X23, [X24, #24]

0x45e6a8 LDR	X21, [X8, #88]

0x45e6ac STR	X2, [SP, #344]

0x45e6b0 BL	546d88

0x45e6b4 ORR	X26, XZR, X0

0x45e6b8 STR	X0, [SP, #640]

0x45e6bc BL	549980

0x45e6c0 MOVZ	X1, #8

0x45e6c4 STR	X0, [X26]

0x45e6c8 BL	546d88

0x45e6cc ORR	X15, XZR, X0

0x45e6d0 LDR	X0, [X26]

0x45e6d4 MOVZ	X1, #8

0x45e6d8 STR	X15, [SP, #648]

0x45e6dc BL	546d88

0x45e6e0 LDR	X1, [X26]

0x45e6e4 STR	X0, [SP, #656]

0x45e6e8 LDR	X18, [SP, #120]

0x45e6ec CMP	X1, #0

0x45e6f0 B.LE	45e71c

0x45e6f4 LDR	X16, [SP, #640]

0x45e6f8 MOVZ	X28, #0

(960) 0x45e6fc LDR	X17, [SP, #656]

(960) 0x45e700 LDR	X27, [SP, #648]

(960) 0x45e704 STR	XZR, [X17, X28,LSL #3]

(960) 0x45e708 STR	XZR, [X27, X28,LSL #3]

(960) 0x45e70c ADD	X28, X28, #1

(960) 0x45e710 LDR	X30, [X16]

(960) 0x45e714 CMP	X30, X28

(960) 0x45e718 B.GT	45e6fc

0x45e71c LDR	X26, [SP, #400]

0x45e720 ADD	X1, SP, #832

0x45e724 STR	X18, [SP, #120]

0x45e728 ORR	X0, XZR, X26

0x45e72c BL	548c40

0x45e730 ADD	X1, SP, #824

0x45e734 ORR	X0, XZR, X26

0x45e738 BL	548c70

0x45e73c LDR	X6, [SP, #688]

0x45e740 LDR	X3, [SP, #832]

0x45e744 LDR	X0, [SP, #824]

0x45e748 LDR	X4, [X6]

0x45e74c SUB	X3, X3, #1

0x45e750 LDR	X8, [SP, #120]

0x45e754 CMP	X3, X0

0x45e758 STR	X4, [SP, #144]

0x45e75c B.NE	45e76c

0x45e760 LDR	X5, [SP, #688]

0x45e764 LDR	X7, [X5, #8]

0x45e768 STR	X7, [SP, #840]

0x45e76c ADRP	X9,

0x45e770 LDR	X4, [SP, #400]

0x45e774 MOVZ	X1, #1

0x45e778 ADD	X10, X9, #1280

0x45e77c ADD	X0, SP, #840

0x45e780 STR	X8, [SP, #120]

0x45e784 ORR	X2, XZR, X10

0x45e788 STR	X10, [SP, #160]

0x45e78c BL	549328

0x45e790 LDR	X11, [SP, #344]

0x45e794 LDR	X18, [SP, #120]

0x45e798 CBZ	X11, 45f0ec

0x45e79c LDR	X12, [SP, #1192]

0x45e7a0 CBZ	X12, 45f0fc

0x45e7a4 CBZ	X23, 462e68

0x45e7a8 LDR	X2, [X24, #8]

0x45e7ac LDR	X24, [X24, #48]

0x45e7b0 STR	X2, [SP, #448]

0x45e7b4 STR	X24, [SP, #440]

0x45e7b8 LDR	X13, [SP, #192]

0x45e7bc STR	XZR, [SP, #392]

0x45e7c0 CBZ	X13, 45e7cc

0x45e7c4 LDR	X20, [X20, #8]

0x45e7c8 STR	X20, [SP, #392]

0x45e7cc LDR	X0, [X22, #16]

0x45e7d0 STR	X18, [SP, #136]

0x45e7d4 STR	X0, [SP, #312]

0x45e7d8 CBNZ	X0, 45f124

0x45e7dc LDR	X30, [SP, #320]

0x45e7e0 ADD	X1, SP, #848

0x45e7e4 ADD	X26, SP, #848

0x45e7e8 ADRP	X28, 45e7e8

0x45e7ec MOVZ	W3, #0

0x45e7f0 STR	X1, [SP, #296]

0x45e7f4 ADD	X0, X28, #736

0x45e7f8 MOVZ	W2, #0

0x45e7fc STP	XZR, XZR, [X26, #16]

0x45e800 STP	X30, XZR, [X26]

0x45e804 BL	410bc0

0x45e808 LDR	X0, [SP, #872]

0x45e80c LDR	X6, [SP, #864]

0x45e810 LDR	X8, [SP, #136]

0x45e814 SUB	X3, XZR, X0

0x45e818 STR	X0, [SP, #128]

0x45e81c SUBS	X0, X3, X6

0x45e820 STR	X6, [SP, #704]

0x45e824 STR	X0, [SP, #120]

0x45e828 B.NE	462e10

0x45e82c MOVZ	X1, #8

0x45e830 MOVZ	X0, #11

0x45e834 STR	X8, [SP, #136]

0x45e838 BL	546d88

0x45e83c LDR	X5, [SP, #136]

0x45e840 MOVZ	X22, #0

0x45e844 STR	XZR, [SP, #248]

0x45e848 STR	X0, [SP, #264]

0x45e84c STR	XZR, [SP, #280]

0x45e850 LDR	X18, [SP, #312]

0x45e854 MOVZ	X1, #8

0x45e858 STR	X5, [SP, #136]

0x45e85c ADD	X0, X18, #1

0x45e860 ORR	X20, XZR, X0

0x45e864 STR	X0, [SP, #760]

0x45e868 BL	546d88

0x45e86c ORR	X28, XZR, X0

0x45e870 MOVZ	X1, #8

0x45e874 ORR	X0, XZR, X20

0x45e878 STR	X28, [SP, #256]

0x45e87c BL	546d88

0x45e880 STR	X0, [SP, #216]

0x45e884 LDP	X0, X6, [SP, #128]

0x45e888 CBNZ	X0, 45f8e0

0x45e88c LDR	X0, [SP, #192]

0x45e890 CBNZ	X0, 45f898

0x45e894 LDR	X16, [SP, #832]

0x45e898 STR	XZR, [SP, #352]

0x45e89c STR	XZR, [SP, #424]

0x45e8a0 CMP	X16, #1

0x45e8a4 B.LE	462e44

0x45e8a8 LDR	X25, [SP, #344]

0x45e8ac ADD	X3, X25, #8

0x45e8b0 ADD	X9, X25, #24

0x45e8b4 LDP	X4, X5, [X3]

0x45e8b8 ORR	X7, XZR, X25

0x45e8bc ADD	X11, X7, #40

0x45e8c0 LDR	X12, [X7, #56]

0x45e8c4 STR	X4, [SP, #152]

0x45e8c8 UBFM	X24, X4, #61, #60

0x45e8cc STR	X5, [SP, #712]

0x45e8d0 LDP	X10, X25, [X9]

0x45e8d4 STR	X10, [SP, #200]

0x45e8d8 LDP	X2, X13, [X11]

0x45e8dc STR	X12, [SP, #664]

0x45e8e0 LDR	X0, [X10, X24]

0x45e8e4 STR	X2, [SP, #176]

0x45e8e8 STR	X13, [SP, #720]

0x45e8ec CBNZ	X0, 462e90

0x45e8f0 LDR	X27, [SP, #152]

0x45e8f4 ADD	X14, X2, #1

0x45e8f8 MOVZ	X20, #0

0x45e8fc STR	X14, [SP, #552]

0x45e900 CMP	X27, #0

0x45e904 B.LE	45e984

0x45e908 LDR	X17, [SP, #200]

0x45e90c MOVZ	X27, #0

0x45e910 LDR	X26, [SP, #320]

0x45e914 ADD	X1, X17, #8

0x45e918 ORR	X3, XZR, X1

0x45e91c ADD	X30, X1, X24

(899) 0x45e920 LDP	X0, X8, [X3, #1016]

(899) 0x45e924 CMP	X0, X8

(899) 0x45e928 B.GE	45e96c

(899) 0x45e92c UBFM	X4, X27, #61, #60

(899) 0x45e930 ORR	X7, XZR, X0

(899) 0x45e934 SUB	X9, X4, X0,LSL #3

(899) 0x45e938 ADD	X10, X20, X9

(899) 0x45e93c HINT	#0

  (959) 0x45e940 LDR	X11, [X25, X0,LSL #3]

  (959) 0x45e944 ORR	X12, XZR, X0

  (959) 0x45e948 LDR	X13, [X26, X11,LSL #3]

  (959) 0x45e94c STR	X13, [X10, X0,LSL #3]

  (959) 0x45e950 ADD	X0, X0, #1

  (959) 0x45e954 LDR	X2, [X3]

  (959) 0x45e958 CMP	X2, X0

  (959) 0x45e95c B.GT	45e940

(899) 0x45e960 SUB	X14, X12, X7

(899) 0x45e964 ADD	X5, X27, #1

(899) 0x45e968 ADD	X27, X14, X5

(899) 0x45e96c ADD	X3, X3, #8

(899) 0x45e970 CMP	X3, X30

(899) 0x45e974 B.NE	45e920

0x45e978 LDR	X15, [SP, #832]

0x45e97c CMP	X15, #1

0x45e980 B.LE	46329c

0x45e984 LDP	X1, X3, [SP, #344]

0x45e988 ORR	X2, XZR, X20

0x45e98c MOVZ	X0, #11

0x45e990 STR	X6, [SP, #136]

0x45e994 BL	4fd0a4

0x45e998 BL	4fd8ac

0x45e99c LDR	X28, [SP, #432]

0x45e9a0 LDR	X6, [SP, #136]

0x45e9a4 CMP	X28, #1

0x45e9a8 B.LE	45ea4c

0x45e9ac LDR	X17, [SP, #152]

0x45e9b0 LDR	X16, [SP, #200]

0x45e9b4 ADD	X1, X16, #8

0x45e9b8 CMP	X17, #0

0x45e9bc B.LE	45ea20

0x45e9c0 LDR	X26, [SP, #584]

0x45e9c4 MOVZ	X5, #0

0x45e9c8 ADD	X24, X1, X24

(900) 0x45e9cc LDP	X13, X30, [X1, #1016]

(900) 0x45e9d0 CMP	X13, X30

(900) 0x45e9d4 B.GE	45ea14

(900) 0x45e9d8 SUB	X4, XZR, X13,LSL #3

(900) 0x45e9dc ORR	X8, XZR, X13

(900) 0x45e9e0 ADD	X7, X4, X5,LSL #3

(900) 0x45e9e4 ADD	X9, X20, X7

  (958) 0x45e9e8 LDR	X10, [X25, X13,LSL #3]

  (958) 0x45e9ec ORR	X11, XZR, X13

  (958) 0x45e9f0 LDR	X12, [X26, X10,LSL #3]

  (958) 0x45e9f4 STR	X12, [X9, X13,LSL #3]

  (958) 0x45e9f8 ADD	X13, X13, #1

  (958) 0x45e9fc LDR	X0, [X1]

  (958) 0x45ea00 CMP	X0, X13

  (958) 0x45ea04 B.GT	45e9e8

(900) 0x45ea08 SUB	X2, X11, X8

(900) 0x45ea0c ADD	X14, X5, #1

(900) 0x45ea10 ADD	X5, X2, X14

(900) 0x45ea14 ADD	X1, X1, #8

(900) 0x45ea18 CMP	X1, X24

(900) 0x45ea1c B.NE	45e9cc

0x45ea20 LDR	X1, [SP, #832]

0x45ea24 CMP	X1, #1

0x45ea28 B.LE	45ea4c

0x45ea2c LDR	X1, [SP, #344]

0x45ea30 ORR	X2, XZR, X20

0x45ea34 MOVZ	X0, #11

0x45ea38 STR	X6, [SP, #136]

0x45ea3c LDR	X3, [SP, #424]

0x45ea40 BL	4fd0a4

0x45ea44 BL	4fd8ac

0x45ea48 LDR	X6, [SP, #136]

0x45ea4c ADD	X15, SP, #848

0x45ea50 ADRP	X27,

0x45ea54 STR	X6, [SP, #136]

0x45ea58 LDR	X28, [SP, #192]

0x45ea5c MOVZ	W3, #0

0x45ea60 ADD	X0, X27, #4032

0x45ea64 MOVZ	W2, #0

0x45ea68 LDR	X18, [SP, #352]

0x45ea6c STP	XZR, XZR, [X15, #16]

0x45ea70 STP	X28, X18, [X15]

0x45ea74 LDR	X1, [SP, #296]

0x45ea78 BL	410bc0

0x45ea7c LDR	X3, [SP, #872]

0x45ea80 LDR	X6, [SP, #136]

0x45ea84 STR	X3, [SP, #496]

0x45ea88 CBNZ	X28, 45f830

0x45ea8c MOVZ	X26, #0

0x45ea90 MOVZ	X24, #0

0x45ea94 STR	XZR, [SP, #136]

0x45ea98 STR	XZR, [SP, #536]

0x45ea9c LDR	X16, [SP, #256]

0x45eaa0 LDR	X30, [SP, #216]

0x45eaa4 LDR	X17, [SP, #120]

0x45eaa8 STR	XZR, [X16]

0x45eaac LDR	X8, [SP, #312]

0x45eab0 STR	XZR, [X30]

0x45eab4 SUB	X27, X17, #1

0x45eab8 CMP	X8, #0

0x45eabc B.LE	45ed00

0x45eac0 LDR	X9, [SP, #216]

0x45eac4 ANDS	X7, X8, #4160

0x45eac8 ORR	X3, XZR, X27

0x45eacc MOVZ	X0, #0

0x45ead0 MOVZ	X1, #0

0x45ead4 LDR	X10, [SP, #256]

0x45ead8 MOVN	X13, #0

0x45eadc ADD	X14, X9, #8

0x45eae0 ADD	X2, X10, #8

0x45eae4 B.EQ	45eba0

0x45eae8 CMP	X7, #1

0x45eaec B.EQ	45eb64

0x45eaf0 CMP	X7, #2

0x45eaf4 B.EQ	45eb34

0x45eaf8 LDR	X11, [SP, #320]

0x45eafc LDR	X12, [X11]

0x45eb00 CMP	X12, #1

0x45eb04 B.EQ	463274

0x45eb08 CMN	X12, #1

0x45eb0c B.NE	45eb1c

0x45eb10 LDR	X0, [SP, #280]

0x45eb14 SUB	X3, X27, #1

0x45eb18 STR	XZR, [X0, X27,LSL #3]

0x45eb1c LDR	X5, [SP, #248]

0x45eb20 MOVZ	X0, #1

0x45eb24 STR	XZR, [X2]

0x45eb28 STR	XZR, [X14]

0x45eb2c STR	X13, [X22]

0x45eb30 STR	X13, [X5]

0x45eb34 LDR	X18, [SP, #320]

0x45eb38 LDR	X15, [X18, X0,LSL #3]

0x45eb3c CMP	X15, #1

0x45eb40 B.EQ	463010

0x45eb44 CMN	X15, #1

0x45eb48 B.EQ	462fe8

0x45eb4c LDR	X4, [SP, #248]

0x45eb50 STR	XZR, [X2, X0,LSL #3]

0x45eb54 STR	XZR, [X14, X0,LSL #3]

0x45eb58 STR	X13, [X22, X0,LSL #3]

0x45eb5c STR	X13, [X4, X0,LSL #3]

0x45eb60 ADD	X0, X0, #1

0x45eb64 LDR	X7, [SP, #320]

0x45eb68 LDR	X9, [X7, X0,LSL #3]

0x45eb6c CMP	X9, #1

0x45eb70 B.EQ	462d64

0x45eb74 CMN	X9, #1

0x45eb78 B.EQ	462fc4

0x45eb7c LDR	X10, [SP, #248]

0x45eb80 STR	XZR, [X2, X0,LSL #3]

0x45eb84 STR	XZR, [X14, X0,LSL #3]

0x45eb88 STR	X13, [X22, X0,LSL #3]

0x45eb8c STR	X13, [X10, X0,LSL #3]

0x45eb90 LDR	X18, [SP, #312]

0x45eb94 ADD	X0, X0, #1

0x45eb98 CMP	X18, X0

0x45eb9c B.EQ	45ed00

0x45eba0 LDR	X15, [SP, #248]

0x45eba4 LDR	X4, [SP, #280]

0x45eba8 LDR	X16, [SP, #320]

0x45ebac LDR	X17, [SP, #360]

0x45ebb0 B	45ec54

(957) 0x45ebb4 CMN	X30, #1

(957) 0x45ebb8 B.EQ	462d28

(957) 0x45ebbc STR	XZR, [X2, X0,LSL #3]

(957) 0x45ebc0 STR	XZR, [X14, X0,LSL #3]

(957) 0x45ebc4 STR	X13, [X22, X0,LSL #3]

(957) 0x45ebc8 STR	X13, [X15, X0,LSL #3]

(957) 0x45ebcc ADD	X0, X0, #1

(957) 0x45ebd0 LDR	X8, [X16, X0,LSL #3]

(957) 0x45ebd4 CMP	X8, #1

(957) 0x45ebd8 B.EQ	45ec88

(957) 0x45ebdc CMN	X8, #1

(957) 0x45ebe0 B.EQ	462d0c

(957) 0x45ebe4 STR	XZR, [X2, X0,LSL #3]

(957) 0x45ebe8 STR	XZR, [X14, X0,LSL #3]

(957) 0x45ebec STR	X13, [X22, X0,LSL #3]

(957) 0x45ebf0 STR	X13, [X15, X0,LSL #3]

(957) 0x45ebf4 ADD	X7, X0, #1

(957) 0x45ebf8 LDR	X9, [X16, X7,LSL #3]

(957) 0x45ebfc CMP	X9, #1

(957) 0x45ec00 B.EQ	45ecb0

(957) 0x45ec04 CMN	X9, #1

(957) 0x45ec08 B.EQ	462cf0

(957) 0x45ec0c STR	XZR, [X2, X7,LSL #3]

(957) 0x45ec10 STR	XZR, [X14, X7,LSL #3]

(957) 0x45ec14 STR	X13, [X22, X7,LSL #3]

(957) 0x45ec18 STR	X13, [X15, X7,LSL #3]

(957) 0x45ec1c ADD	X10, X0, #2

(957) 0x45ec20 LDR	X11, [X16, X10,LSL #3]

(957) 0x45ec24 CMP	X11, #1

(957) 0x45ec28 B.EQ	45ecd8

(957) 0x45ec2c CMN	X11, #1

(957) 0x45ec30 B.EQ	462cd4

(957) 0x45ec34 STR	XZR, [X2, X10,LSL #3]

(957) 0x45ec38 STR	XZR, [X14, X10,LSL #3]

(957) 0x45ec3c STR	X13, [X22, X10,LSL #3]

(957) 0x45ec40 STR	X13, [X15, X10,LSL #3]

(957) 0x45ec44 LDR	X12, [SP, #312]

(957) 0x45ec48 ADD	X0, X0, #3

(957) 0x45ec4c CMP	X12, X0

(957) 0x45ec50 B.EQ	45ed00

(957) 0x45ec54 LDR	X30, [X16, X0,LSL #3]

(957) 0x45ec58 CMP	X30, #1

(957) 0x45ec5c B.NE	45ebb4

(957) 0x45ec60 STR	X1, [X15, X0,LSL #3]

(957) 0x45ec64 STR	X0, [X17, X1,LSL #3]

(957) 0x45ec68 ADD	X1, X1, #1

(957) 0x45ec6c STR	XZR, [X22, X0,LSL #3]

(957) 0x45ec70 STR	X30, [X2, X0,LSL #3]

(957) 0x45ec74 STR	XZR, [X14, X0,LSL #3]

(957) 0x45ec78 ADD	X0, X0, #1

(957) 0x45ec7c LDR	X8, [X16, X0,LSL #3]

(957) 0x45ec80 CMP	X8, #1

(957) 0x45ec84 B.NE	45ebdc

(957) 0x45ec88 STR	X1, [X15, X0,LSL #3]

(957) 0x45ec8c ADD	X7, X0, #1

(957) 0x45ec90 STR	X0, [X17, X1,LSL #3]

(957) 0x45ec94 ADD	X1, X1, #1

(957) 0x45ec98 STR	XZR, [X22, X0,LSL #3]

(957) 0x45ec9c STR	X8, [X2, X0,LSL #3]

(957) 0x45eca0 STR	XZR, [X14, X0,LSL #3]

(957) 0x45eca4 LDR	X9, [X16, X7,LSL #3]

(957) 0x45eca8 CMP	X9, #1

(957) 0x45ecac B.NE	45ec04

(957) 0x45ecb0 STR	X1, [X15, X7,LSL #3]

(957) 0x45ecb4 ADD	X10, X0, #2

(957) 0x45ecb8 STR	X7, [X17, X1,LSL #3]

(957) 0x45ecbc ADD	X1, X1, #1

(957) 0x45ecc0 STR	XZR, [X22, X7,LSL #3]

(957) 0x45ecc4 STR	X9, [X2, X7,LSL #3]

(957) 0x45ecc8 STR	XZR, [X14, X7,LSL #3]

(957) 0x45eccc LDR	X11, [X16, X10,LSL #3]

(957) 0x45ecd0 CMP	X11, #1

(957) 0x45ecd4 B.NE	45ec2c

(957) 0x45ecd8 LDR	X12, [SP, #312]

(957) 0x45ecdc ADD	X0, X0, #3

(957) 0x45ece0 STR	X1, [X15, X10,LSL #3]

(957) 0x45ece4 STR	X10, [X17, X1,LSL #3]

(957) 0x45ece8 ADD	X1, X1, #1

(957) 0x45ecec STR	XZR, [X22, X10,LSL #3]

(957) 0x45ecf0 STR	X11, [X2, X10,LSL #3]

(957) 0x45ecf4 STR	XZR, [X14, X10,LSL #3]

(957) 0x45ecf8 CMP	X12, X0

(957) 0x45ecfc B.NE	45ec54

0x45ed00 LDR	X2, [SP, #200]

0x45ed04 MOVZ	X10, #0

0x45ed08 LDR	X13, [SP, #152]

0x45ed0c ADD	X12, X2, #8

0x45ed10 ADD	X14, X12, X13,LSL #3

0x45ed14 CMP	X13, #0

0x45ed18 B.LE	45ed78

0x45ed1c LDR	X28, [SP, #144]

0x45ed20 LDR	X18, [SP, #248]

(955) 0x45ed24 LDP	X15, X5, [X12, #1016]

(955) 0x45ed28 CMP	X15, X5

(955) 0x45ed2c B.GE	45ed6c

(955) 0x45ed30 UBFM	X4, X15, #61, #60

(955) 0x45ed34 SUB	X16, X15, X10

(955) 0x45ed38 SUB	X17, X4, X10,LSL #3

(955) 0x45ed3c ADD	X30, X25, X17

  (956) 0x45ed40 LDR	X8, [X30, X10,LSL #3]

  (956) 0x45ed44 LDR	X7, [X18, X8,LSL #3]

  (956) 0x45ed48 STR	X7, [X20, X10,LSL #3]

  (956) 0x45ed4c ADD	X9, X28, X7

  (956) 0x45ed50 TBNZ	X7, #63, 45f1bc

  (956) 0x45ed54 STR	X9, [X20, X10,LSL #3]

  (956) 0x45ed58 ADD	X10, X10, #1

  (956) 0x45ed5c LDR	X1, [X12]

  (956) 0x45ed60 ADD	X0, X16, X10

  (956) 0x45ed64 CMP	X0, X1

  (956) 0x45ed68 B.LT	45ed40

(955) 0x45ed6c ADD	X12, X12, #8

(955) 0x45ed70 CMP	X12, X14

(955) 0x45ed74 B.NE	45ed24

0x45ed78 LDR	X13, [SP, #832]

0x45ed7c CMP	X13, #1

0x45ed80 B.LE	45eda4

0x45ed84 LDR	X1, [SP, #344]

0x45ed88 ORR	X3, XZR, X24

0x45ed8c ORR	X2, XZR, X20

0x45ed90 MOVZ	X0, #11

0x45ed94 STR	X6, [SP, #168]

0x45ed98 BL	4fd0a4

0x45ed9c BL	4fd8ac

0x45eda0 LDR	X6, [SP, #168]

0x45eda4 MOVZ	X1, #8

0x45eda8 STR	X6, [SP, #168]

0x45edac LDR	X0, [SP, #552]

0x45edb0 BL	546d88

0x45edb4 STR	XZR, [SP, #512]

0x45edb8 STR	X0, [SP, #672]

0x45edbc LDR	X0, [SP, #496]

0x45edc0 LDR	X14, [SP, #168]

0x45edc4 CBNZ	X0, 45f884

0x45edc8 LDR	X2, [SP, #672]

0x45edcc LDR	X28, [SP, #176]

0x45edd0 STR	XZR, [X2]

0x45edd4 CMP	X28, #0

0x45edd8 B.LE	45ee58

0x45eddc LDR	X8, [SP, #664]

0x45ede0 ADD	X18, X28, #1

0x45ede4 MOVZ	X7, #0

0x45ede8 MOVZ	X5, #8

0x45edec UBFM	X15, X18, #61, #60

0x45edf0 LDR	X17, [SP, #136]

0x45edf4 MOVN	X16, #0

0x45edf8 LDR	X30, [SP, #352]

0x45edfc SUB	X4, X8, #8

0x45ee00 LDR	X9, [SP, #512]

0x45ee04 LDR	X10, [SP, #536]

(953) 0x45ee08 LDR	X0, [X4, X5]

(953) 0x45ee0c LDR	X11, [X8, X5]

(953) 0x45ee10 CMP	X0, X11

(953) 0x45ee14 B.GE	45ee44

(953) 0x45ee18 HINT	#0

(953) 0x45ee1c HINT	#0

  (954) 0x45ee20 LDR	X3, [X30, X0,LSL #3]

  (954) 0x45ee24 CMP	X3, #1

  (954) 0x45ee28 B.EQ	45f1e0

  (954) 0x45ee2c STR	X16, [X26, X0,LSL #3]

  (954) 0x45ee30 STR	X16, [X10, X0,LSL #3]

  (954) 0x45ee34 ADD	X0, X0, #1

  (954) 0x45ee38 LDR	X1, [X8, X5]

  (954) 0x45ee3c CMP	X0, X1

  (954) 0x45ee40 B.LT	45ee20

(953) 0x45ee44 LDR	X2, [SP, #672]

(953) 0x45ee48 STR	X7, [X2, X5]

(953) 0x45ee4c ADD	X5, X5, #8

(953) 0x45ee50 CMP	X15, X5

(953) 0x45ee54 B.NE	45ee08

0x45ee58 ORR	X0, XZR, X24

0x45ee5c STR	X14, [SP, #168]

0x45ee60 BL	546e20

0x45ee64 LDR	X24, [SP, #1192]

0x45ee68 LDR	X6, [SP, #168]

0x45ee6c CBZ	X24, 45f8f4

0x45ee70 MOVZ	X1, #8

0x45ee74 ORR	X0, XZR, X23

0x45ee78 STR	X6, [SP, #168]

0x45ee7c BL	546d88

0x45ee80 CMP	X23, #0

0x45ee84 STR	X0, [SP, #272]

0x45ee88 LDR	X6, [SP, #168]

0x45ee8c B.LE	45f01c

0x45ee90 ANDS	X14, X23, #4224

0x45ee94 MOVZ	X1, #0

0x45ee98 MOVZ	X0, #0

0x45ee9c B.EQ	463104

0x45eea0 CMP	X14, #1

0x45eea4 B.EQ	4630c0

0x45eea8 CMP	X14, #2

0x45eeac B.EQ	45efd4

0x45eeb0 CMP	X14, #3

0x45eeb4 B.EQ	45efa0

0x45eeb8 CMP	X14, #4

0x45eebc B.EQ	45ef6c

0x45eec0 CMP	X14, #5

0x45eec4 B.EQ	45ef38

0x45eec8 CMP	X14, #6

0x45eecc B.EQ	45ef04

0x45eed0 LDR	X28, [SP, #192]

0x45eed4 CMP	X28, #0

0x45eed8 B.LE	45efe0

0x45eedc LDR	X17, [X19]

0x45eee0 MOVN	X18, #0

0x45eee4 MOVZ	X15, #0

0x45eee8 MOVZ	X1, #1

0x45eeec LDR	X30, [X21]

0x45eef0 LDR	X10, [SP, #272]

0x45eef4 CMP	X30, X17

0x45eef8 CSEL	X9, X18, X15, #1

0x45eefc CSEL	X0, X0, X1, #1

0x45ef00 STR	X9, [X10]

0x45ef04 LDR	X8, [SP, #192]

0x45ef08 CMP	X8, X0

0x45ef0c B.LE	45efe0

0x45ef10 LDR	X4, [X21, X1,LSL #3]

0x45ef14 MOVN	X12, #0

0x45ef18 LDR	X11, [X19, X0,LSL #3]

0x45ef1c CMP	X4, X11

0x45ef20 B.NE	45ef2c

0x45ef24 ORR	X12, XZR, X0

0x45ef28 ADD	X0, X0, #1

0x45ef2c LDR	X3, [SP, #272]

0x45ef30 STR	X12, [X3, X1,LSL #3]

0x45ef34 ADD	X1, X1, #1

0x45ef38 LDR	X7, [SP, #192]

0x45ef3c CMP	X7, X0

0x45ef40 B.LE	45efe0

0x45ef44 LDR	X13, [X21, X1,LSL #3]

0x45ef48 MOVN	X2, #0

0x45ef4c LDR	X5, [X19, X0,LSL #3]

0x45ef50 CMP	X13, X5

0x45ef54 B.NE	45ef60

0x45ef58 ORR	X2, XZR, X0

0x45ef5c ADD	X0, X0, #1

0x45ef60 LDR	X24, [SP, #272]

0x45ef64 STR	X2, [X24, X1,LSL #3]

0x45ef68 ADD	X1, X1, #1

0x45ef6c LDR	X14, [SP, #192]

0x45ef70 CMP	X14, X0

0x45ef74 B.LE	45efe0

0x45ef78 LDR	X28, [X21, X1,LSL #3]

0x45ef7c MOVN	X15, #0

0x45ef80 LDR	X18, [X19, X0,LSL #3]

0x45ef84 CMP	X28, X18

0x45ef88 B.NE	45ef94

0x45ef8c ORR	X15, XZR, X0

0x45ef90 ADD	X0, X0, #1

0x45ef94 LDR	X16, [SP, #272]

0x45ef98 STR	X15, [X16, X1,LSL #3]

0x45ef9c ADD	X1, X1, #1

0x45efa0 LDR	X17, [SP, #192]

0x45efa4 CMP	X17, X0

0x45efa8 B.LE	45efe0

0x45efac LDR	X30, [X21, X1,LSL #3]

0x45efb0 MOVN	X10, #0

0x45efb4 LDR	X9, [X19, X0,LSL #3]

0x45efb8 CMP	X30, X9

0x45efbc B.NE	45efc8

0x45efc0 ORR	X10, XZR, X0

0x45efc4 ADD	X0, X0, #1

0x45efc8 LDR	X8, [SP, #272]

0x45efcc STR	X10, [X8, X1,LSL #3]

0x45efd0 ADD	X1, X1, #1

0x45efd4 LDR	X4, [SP, #192]

0x45efd8 CMP	X4, X0

0x45efdc B.GT	4630a0

0x45efe0 LDR	X0, [SP, #272]

0x45efe4 MOVN	X21, #0

0x45efe8 ADD	X19, X1, #1

0x45efec STR	X21, [X0, X1,LSL #3]

0x45eff0 CMP	X23, X19

0x45eff4 B.EQ	45f01c

0x45eff8 SUB	X23, X23, X19

0x45effc ADD	X0, X0, X19,LSL #3

0x45f000 MOVZ	W1, #255

0x45f004 STR	X6, [SP, #168]

0x45f008 UBFM	X14, X23, #61, #60

0x45f00c MOVZ	X28, #8

0x45f010 CSEL	X2, X14, X28, #12

0x45f014 BL	4108c0

0x45f018 LDR	X6, [SP, #168]

0x45f01c LDR	X17, [SP, #264]

0x45f020 STP	XZR, XZR, [X17]

0x45f024 TBNZ	X27, #63, 45f904

0x45f028 MOVZ	X28, #0

0x45f02c MOVZ	X4, #0

0x45f030 LDR	X13, [SP, #216]

0x45f034 ORR	X7, XZR, X27

0x45f038 UBFM	X8, X27, #61, #60

0x45f03c LDP	X15, X16, [SP, #480]

0x45f040 MOVZ	X23, #0

0x45f044 LDR	X12, [SP, #256]

0x45f048 LDR	X30, [SP, #280]

0x45f04c LDR	X14, [SP, #320]

0x45f050 LDR	X9, [SP, #352]

0x45f054 LDR	X5, [SP, #392]

(901) 0x45f058 ADD	X18, X30, X8

(901) 0x45f05c LDR	X10, [X30, X8]

(901) 0x45f060 UBFM	X19, X10, #61, #60

(901) 0x45f064 ADD	X2, X19, #8

(901) 0x45f068 LDR	X0, [X15, X19]

(901) 0x45f06c ADD	X11, X22, X19

(901) 0x45f070 ADD	X21, X15, X2

(901) 0x45f074 LDR	X3, [X15, X2]

(901) 0x45f078 CMP	X0, X3

(901) 0x45f07c B.GE	45f09c

  (951) 0x45f080 LDR	X1, [X6, X0,LSL #3]

  (951) 0x45f084 LDR	X17, [X14, X1,LSL #3]

  (951) 0x45f088 CMP	X17, #1

  (951) 0x45f08c B.EQ	45f7ec

  (951) 0x45f090 ADD	X0, X0, #1

  (951) 0x45f094 CMP	X0, X3

  (951) 0x45f098 B.LT	45f080

(901) 0x45f09c LDR	X17, [X16, X19]

(901) 0x45f0a0 ADD	X19, X16, X2

(901) 0x45f0a4 LDR	X3, [X16, X2]

(901) 0x45f0a8 CMP	X17, X3

(901) 0x45f0ac B.GE	45f0cc

  (950) 0x45f0b0 LDR	X21, [X5, X17,LSL #3]

  (950) 0x45f0b4 LDR	X1, [X9, X21,LSL #3]

  (950) 0x45f0b8 CMP	X1, #1

  (950) 0x45f0bc B.EQ	45f224

  (950) 0x45f0c0 ADD	X17, X17, #1

  (950) 0x45f0c4 CMP	X17, X3

  (950) 0x45f0c8 B.LT	45f0b0

(901) 0x45f0cc LDR	X2, [X11]

(901) 0x45f0d0 CMP	X2, #1

(901) 0x45f0d4 B.EQ	45f248

(901) 0x45f0d8 SUB	X7, X7, #1

(901) 0x45f0dc CMP	X23, X7

(901) 0x45f0e0 B.GT	45f264

(901) 0x45f0e4 UBFM	X8, X7, #61, #60

(901) 0x45f0e8 B	45f058

0x45f0ec LDR	X19, [SP, #680]

0x45f0f0 LDR	X14, [X19, #112]

0x45f0f4 STR	X14, [SP, #344]

0x45f0f8 CBZ	X14, 462ecc

0x45f0fc CBNZ	X23, 462e70

0x45f100 STP	XZR, XZR, [SP, #440]

0x45f104 ORR	X19, XZR, X21

0x45f108 LDR	X0, [X22, #16]

0x45f10c STR	X18, [SP, #136]

0x45f110 STR	XZR, [SP, #192]

0x45f114 STR	XZR, [SP, #392]

0x45f118 STR	XZR, [SP, #1192]

0x45f11c STR	X0, [SP, #312]

0x45f120 CBZ	X0, 45e7dc

0x45f124 MOVZ	X1, #8

0x45f128 ORR	X24, XZR, X0

0x45f12c BL	546d88

0x45f130 LDR	X9, [SP, #320]

0x45f134 ADD	X1, SP, #848

0x45f138 ADD	X10, SP, #848

0x45f13c ADRP	X11,

0x45f140 STR	X0, [SP, #248]

0x45f144 MOVZ	W2, #0

0x45f148 STR	X1, [SP, #296]

0x45f14c ADD	X0, X11, #736

0x45f150 MOVZ	W3, #0

0x45f154 STP	XZR, XZR, [X10, #16]

0x45f158 STP	X9, X24, [X10]

0x45f15c BL	410bc0

0x45f160 LDR	X13, [SP, #872]

0x45f164 LDR	X2, [SP, #864]

0x45f168 LDR	X12, [SP, #136]

0x45f16c SUB	X14, X24, X13

0x45f170 STR	X13, [SP, #128]

0x45f174 SUBS	X0, X14, X2

0x45f178 STR	X2, [SP, #704]

0x45f17c STR	X0, [SP, #120]

0x45f180 B.NE	463038

0x45f184 MOVZ	X1, #8

0x45f188 MOVZ	X0, #11

0x45f18c STR	X12, [SP, #136]

0x45f190 BL	546d88

0x45f194 LDR	X15, [SP, #136]

0x45f198 STR	X0, [SP, #264]

0x45f19c STR	XZR, [SP, #280]

0x45f1a0 LDR	X0, [SP, #312]

0x45f1a4 MOVZ	X1, #8

0x45f1a8 STR	X15, [SP, #136]

0x45f1ac BL	546d88

0x45f1b0 LDR	X5, [SP, #136]

0x45f1b4 ORR	X22, XZR, X0

0x45f1b8 B	45e850

  (956) 0x45f1bc LDR	X3, [X12]

  (956) 0x45f1c0 ADD	X10, X10, #1

  (956) 0x45f1c4 ADD	X11, X16, X10

  (956) 0x45f1c8 CMP	X11, X3

  (956) 0x45f1cc B.LT	45ed40

(955) 0x45f1d0 ADD	X12, X12, #8

(955) 0x45f1d4 CMP	X12, X14

(955) 0x45f1d8 B.NE	45ed24

0x45f1dc B	45ed78

  (954) 0x45f1e0 UBFM	X12, X7, #61, #60

  (954) 0x45f1e4 STR	X7, [X10, X0,LSL #3]

  (954) 0x45f1e8 ADD	X7, X7, #1

  (954) 0x45f1ec STR	X0, [X9, X12]

  (954) 0x45f1f0 LDR	X13, [X24, X0,LSL #3]

  (954) 0x45f1f4 STR	X13, [X17, X12]

  (954) 0x45f1f8 STR	XZR, [X26, X0,LSL #3]

  (954) 0x45f1fc ADD	X0, X0, #1

  (954) 0x45f200 LDR	X6, [X8, X5]

  (954) 0x45f204 CMP	X6, X0

  (954) 0x45f208 B.GT	45ee20

(953) 0x45f20c LDR	X2, [SP, #672]

(953) 0x45f210 STR	X7, [X2, X5]

(953) 0x45f214 ADD	X5, X5, #8

(953) 0x45f218 CMP	X15, X5

(953) 0x45f21c B.NE	45ee08

0x45f220 B	45ee58

  (950) 0x45f224 LDR	X0, [X13, X2]

  (950) 0x45f228 ADD	X17, X17, #1

  (950) 0x45f22c ADD	X28, X28, #1

  (950) 0x45f230 ADD	X24, X0, #1

  (950) 0x45f234 STR	X24, [X13, X2]

  (950) 0x45f238 STR	X1, [X11]

  (950) 0x45f23c LDR	X3, [X19]

  (950) 0x45f240 CMP	X17, X3

  (950) 0x45f244 B.LT	45f0b0

(901) 0x45f248 UBFM	X11, X23, #61, #60

(901) 0x45f24c ADD	X23, X23, #1

(901) 0x45f250 LDR	X19, [X30, X11]

(901) 0x45f254 STR	X19, [X18]

(901) 0x45f258 STR	X10, [X30, X11]

(901) 0x45f25c CMP	X23, X7

(901) 0x45f260 B.LE	45f058

0x45f264 LDR	X13, [SP, #120]

0x45f268 STR	X4, [SP, #208]

0x45f26c SUB	X24, X13, X23

0x45f270 LDR	X12, [SP, #200]

0x45f274 MOVZ	X3, #0

0x45f278 LDR	X30, [SP, #264]

0x45f27c LDR	X14, [SP, #152]

0x45f280 ADD	X4, X12, #8

0x45f284 STR	X23, [X30, #16]

0x45f288 ADD	X9, X4, X14,LSL #3

0x45f28c CMP	X14, #0

0x45f290 B.LE	45f2e8

(948) 0x45f294 LDP	X7, X15, [X4, #1016]

(948) 0x45f298 CMP	X7, X15

(948) 0x45f29c B.GE	45f2dc

(948) 0x45f2a0 UBFM	X16, X3, #61, #60

(948) 0x45f2a4 ORR	X10, XZR, X7

(948) 0x45f2a8 SUB	X18, X16, X7,LSL #3

(948) 0x45f2ac ADD	X21, X20, X18

  (949) 0x45f2b0 LDR	X1, [X25, X7,LSL #3]

  (949) 0x45f2b4 ORR	X17, XZR, X7

  (949) 0x45f2b8 LDR	X2, [X22, X1,LSL #3]

  (949) 0x45f2bc STR	X2, [X21, X7,LSL #3]

  (949) 0x45f2c0 ADD	X7, X7, #1

  (949) 0x45f2c4 LDR	X8, [X4]

  (949) 0x45f2c8 CMP	X8, X7

  (949) 0x45f2cc B.GT	45f2b0

(948) 0x45f2d0 ADD	X5, X3, #1

(948) 0x45f2d4 SUB	X0, X17, X10

(948) 0x45f2d8 ADD	X3, X5, X0

(948) 0x45f2dc ADD	X4, X4, #8

(948) 0x45f2e0 CMP	X9, X4

(948) 0x45f2e4 B.NE	45f294

0x45f2e8 LDR	X11, [SP, #832]

0x45f2ec CMP	X11, #1

0x45f2f0 B.LE	45f314

0x45f2f4 LDR	X1, [SP, #344]

0x45f2f8 ORR	X3, XZR, X26

0x45f2fc ORR	X2, XZR, X20

0x45f300 MOVZ	X0, #11

0x45f304 STR	X6, [SP, #168]

0x45f308 BL	4fd0a4

0x45f30c BL	4fd8ac

0x45f310 LDR	X6, [SP, #168]

0x45f314 ADRP	X19,

0x45f318 ADD	X1, SP, #808

0x45f31c STR	X6, [SP, #168]

0x45f320 ADD	X13, X19, #1800

0x45f324 LDR	X3, [SP, #160]

0x45f328 MOVZ	X2, #1

0x45f32c ORR	X4, XZR, X13

0x45f330 ADD	X0, SP, #816

0x45f334 STR	X24, [SP, #816]

0x45f338 LDR	X5, [SP, #400]

0x45f33c STR	X13, [SP, #224]

0x45f340 BL	549550

0x45f344 LDR	X24, [SP, #152]

0x45f348 MOVZ	X12, #1

0x45f34c LDR	X15, [SP, #264]

0x45f350 LDR	X14, [SP, #808]

0x45f354 UBFM	X9, X24, #61, #60

0x45f358 LDR	X21, [SP, #168]

0x45f35c ADD	X10, X15, #16

0x45f360 STR	X9, [SP, #184]

0x45f364 STR	X10, [SP, #240]

0x45f368 CBZ	X14, 46308c

0x45f36c ORR	X24, XZR, X20

0x45f370 ORR	X11, XZR, X27

0x45f374 LDR	X27, [SP, #280]

0x45f378 ORR	X20, XZR, X21

0x45f37c ORR	X30, XZR, X23

0x45f380 STR	X28, [SP, #168]

0x45f384 LDR	X21, [SP, #392]

0x45f388 ORR	X28, XZR, X12

(942) 0x45f38c ORR	X19, XZR, X28

(942) 0x45f390 ORR	X4, XZR, X11

(942) 0x45f394 ADD	X28, X28, #1

(942) 0x45f398 ORR	X23, XZR, X30

(942) 0x45f39c CMP	X11, X30

(942) 0x45f3a0 B.LT	45f6d4

(942) 0x45f3a4 LDP	X6, X8, [SP, #480]

  (945) 0x45f3a8 ADD	X9, X27, X4,LSL #3

  (945) 0x45f3ac LDR	X5, [X27, X4,LSL #3]

  (945) 0x45f3b0 UBFM	X2, X5, #61, #60

  (945) 0x45f3b4 ADD	X7, X2, #8

  (945) 0x45f3b8 LDR	X0, [X6, X2]

  (945) 0x45f3bc LDR	X3, [X6, X7]

  (945) 0x45f3c0 CMP	X0, X3

  (945) 0x45f3c4 B.GE	45f540

  (945) 0x45f3c8 SUB	X16, X3, X0

  (945) 0x45f3cc ANDS	X18, X16, #4224

  (945) 0x45f3d0 B.EQ	45f498

  (945) 0x45f3d4 CMP	X18, #1

  (945) 0x45f3d8 B.EQ	45f47c

  (945) 0x45f3dc CMP	X18, #2

  (945) 0x45f3e0 B.EQ	45f468

  (945) 0x45f3e4 CMP	X18, #3

  (945) 0x45f3e8 B.EQ	45f454

  (945) 0x45f3ec CMP	X18, #4

  (945) 0x45f3f0 B.EQ	45f440

  (945) 0x45f3f4 CMP	X18, #5

  (945) 0x45f3f8 B.EQ	45f42c

  (945) 0x45f3fc CMP	X18, #6

  (945) 0x45f400 B.EQ	45f418

  (945) 0x45f404 LDR	X1, [X20, X0,LSL #3]

  (945) 0x45f408 ADD	X0, X0, #1

  (945) 0x45f40c LDR	X17, [X22, X1,LSL #3]

  (945) 0x45f410 CMP	X17, X19

  (945) 0x45f414 B.EQ	45f814

  (945) 0x45f418 LDR	X13, [X20, X0,LSL #3]

  (945) 0x45f41c ADD	X0, X0, #1

  (945) 0x45f420 LDR	X12, [X22, X13,LSL #3]

  (945) 0x45f424 CMP	X12, X19

  (945) 0x45f428 B.EQ	45f814

  (945) 0x45f42c LDR	X14, [X20, X0,LSL #3]

  (945) 0x45f430 ADD	X0, X0, #1

  (945) 0x45f434 LDR	X15, [X22, X14,LSL #3]

  (945) 0x45f438 CMP	X15, X19

  (945) 0x45f43c B.EQ	45f814

  (945) 0x45f440 LDR	X10, [X20, X0,LSL #3]

  (945) 0x45f444 ADD	X0, X0, #1

  (945) 0x45f448 LDR	X16, [X22, X10,LSL #3]

  (945) 0x45f44c CMP	X16, X19

  (945) 0x45f450 B.EQ	45f814

  (945) 0x45f454 LDR	X18, [X20, X0,LSL #3]

  (945) 0x45f458 ADD	X0, X0, #1

  (945) 0x45f45c LDR	X1, [X22, X18,LSL #3]

  (945) 0x45f460 CMP	X1, X19

  (945) 0x45f464 B.EQ	45f814

  (945) 0x45f468 LDR	X17, [X20, X0,LSL #3]

  (945) 0x45f46c ADD	X0, X0, #1

  (945) 0x45f470 LDR	X13, [X22, X17,LSL #3]

  (945) 0x45f474 CMP	X13, X19

  (945) 0x45f478 B.EQ	45f814

  (945) 0x45f47c LDR	X12, [X20, X0,LSL #3]

  (945) 0x45f480 LDR	X14, [X22, X12,LSL #3]

  (945) 0x45f484 CMP	X14, X19

  (945) 0x45f488 B.EQ	45f814

  (945) 0x45f48c ADD	X0, X0, #1

  (945) 0x45f490 CMP	X0, X3

  (945) 0x45f494 B.EQ	45f540

    (947) 0x45f498 LDR	X18, [X20, X0,LSL #3]

    (947) 0x45f49c ADD	X10, X0, #1

    (947) 0x45f4a0 ADD	X16, X0, #3

    (947) 0x45f4a4 ADD	X15, X0, #4

    (947) 0x45f4a8 ADD	X14, X0, #5

    (947) 0x45f4ac ADD	X13, X0, #6

    (947) 0x45f4b0 ADD	X17, X0, #7

    (947) 0x45f4b4 ADD	X12, X10, #1

    (947) 0x45f4b8 ADD	X0, X0, #8

    (947) 0x45f4bc LDR	X1, [X22, X18,LSL #3]

    (947) 0x45f4c0 CMP	X1, X19

    (947) 0x45f4c4 B.EQ	45f814

    (947) 0x45f4c8 LDR	X10, [X20, X10,LSL #3]

    (947) 0x45f4cc LDR	X18, [X22, X10,LSL #3]

    (947) 0x45f4d0 CMP	X18, X19

    (947) 0x45f4d4 B.EQ	45f814

    (947) 0x45f4d8 LDR	X12, [X20, X12,LSL #3]

    (947) 0x45f4dc LDR	X1, [X22, X12,LSL #3]

    (947) 0x45f4e0 CMP	X1, X19

    (947) 0x45f4e4 B.EQ	45f814

    (947) 0x45f4e8 LDR	X16, [X20, X16,LSL #3]

    (947) 0x45f4ec LDR	X10, [X22, X16,LSL #3]

    (947) 0x45f4f0 CMP	X10, X19

    (947) 0x45f4f4 B.EQ	45f814

    (947) 0x45f4f8 LDR	X15, [X20, X15,LSL #3]

    (947) 0x45f4fc LDR	X18, [X22, X15,LSL #3]

    (947) 0x45f500 CMP	X18, X19

    (947) 0x45f504 B.EQ	45f814

    (947) 0x45f508 LDR	X14, [X20, X14,LSL #3]

    (947) 0x45f50c LDR	X12, [X22, X14,LSL #3]

    (947) 0x45f510 CMP	X12, X19

    (947) 0x45f514 B.EQ	45f814

    (947) 0x45f518 LDR	X13, [X20, X13,LSL #3]

    (947) 0x45f51c LDR	X1, [X22, X13,LSL #3]

    (947) 0x45f520 CMP	X1, X19

    (947) 0x45f524 B.EQ	45f814

    (947) 0x45f528 LDR	X17, [X20, X17,LSL #3]

    (947) 0x45f52c LDR	X16, [X22, X17,LSL #3]

    (947) 0x45f530 CMP	X16, X19

    (947) 0x45f534 B.EQ	45f814

    (947) 0x45f538 CMP	X0, X3

    (947) 0x45f53c B.NE	45f498

  (945) 0x45f540 LDR	X3, [X8, X7]

  (945) 0x45f544 LDR	X0, [X8, X2]

  (945) 0x45f548 CMP	X0, X3

  (945) 0x45f54c B.GE	45f6c8

  (945) 0x45f550 SUB	X7, X3, X0

  (945) 0x45f554 ANDS	X10, X7, #4224

  (945) 0x45f558 B.EQ	45f620

  (945) 0x45f55c CMP	X10, #1

  (945) 0x45f560 B.EQ	45f604

  (945) 0x45f564 CMP	X10, #2

  (945) 0x45f568 B.EQ	45f5f0

  (945) 0x45f56c CMP	X10, #3

  (945) 0x45f570 B.EQ	45f5dc

  (945) 0x45f574 CMP	X10, #4

  (945) 0x45f578 B.EQ	45f5c8

  (945) 0x45f57c CMP	X10, #5

  (945) 0x45f580 B.EQ	45f5b4

  (945) 0x45f584 CMP	X10, #6

  (945) 0x45f588 B.EQ	45f5a0

  (945) 0x45f58c LDR	X15, [X21, X0,LSL #3]

  (945) 0x45f590 ADD	X0, X0, #1

  (945) 0x45f594 LDR	X18, [X26, X15,LSL #3]

  (945) 0x45f598 CMP	X18, X19

  (945) 0x45f59c B.EQ	45f814

  (945) 0x45f5a0 LDR	X14, [X21, X0,LSL #3]

  (945) 0x45f5a4 ADD	X0, X0, #1

  (945) 0x45f5a8 LDR	X12, [X26, X14,LSL #3]

  (945) 0x45f5ac CMP	X12, X19

  (945) 0x45f5b0 B.EQ	45f814

  (945) 0x45f5b4 LDR	X13, [X21, X0,LSL #3]

  (945) 0x45f5b8 ADD	X0, X0, #1

  (945) 0x45f5bc LDR	X1, [X26, X13,LSL #3]

  (945) 0x45f5c0 CMP	X1, X19

  (945) 0x45f5c4 B.EQ	45f814

  (945) 0x45f5c8 LDR	X17, [X21, X0,LSL #3]

  (945) 0x45f5cc ADD	X0, X0, #1

  (945) 0x45f5d0 LDR	X16, [X26, X17,LSL #3]

  (945) 0x45f5d4 CMP	X16, X19

  (945) 0x45f5d8 B.EQ	45f814

  (945) 0x45f5dc LDR	X7, [X21, X0,LSL #3]

  (945) 0x45f5e0 ADD	X0, X0, #1

  (945) 0x45f5e4 LDR	X10, [X26, X7,LSL #3]

  (945) 0x45f5e8 CMP	X10, X19

  (945) 0x45f5ec B.EQ	45f814

  (945) 0x45f5f0 LDR	X15, [X21, X0,LSL #3]

  (945) 0x45f5f4 ADD	X0, X0, #1

  (945) 0x45f5f8 LDR	X18, [X26, X15,LSL #3]

  (945) 0x45f5fc CMP	X18, X19

  (945) 0x45f600 B.EQ	45f814

  (945) 0x45f604 LDR	X14, [X21, X0,LSL #3]

  (945) 0x45f608 LDR	X12, [X26, X14,LSL #3]

  (945) 0x45f60c CMP	X12, X19

  (945) 0x45f610 B.EQ	45f814

  (945) 0x45f614 ADD	X0, X0, #1

  (945) 0x45f618 CMP	X0, X3

  (945) 0x45f61c B.EQ	45f6c8

    (946) 0x45f620 LDR	X17, [X21, X0,LSL #3]

    (946) 0x45f624 ADD	X1, X0, #1

    (946) 0x45f628 ADD	X10, X0, #3

    (946) 0x45f62c ADD	X15, X0, #4

    (946) 0x45f630 ADD	X18, X0, #5

    (946) 0x45f634 ADD	X7, X0, #6

    (946) 0x45f638 ADD	X13, X0, #7

    (946) 0x45f63c ADD	X16, X1, #1

    (946) 0x45f640 ADD	X0, X0, #8

    (946) 0x45f644 LDR	X14, [X26, X17,LSL #3]

    (946) 0x45f648 CMP	X14, X19

    (946) 0x45f64c B.EQ	45f814

    (946) 0x45f650 LDR	X12, [X21, X1,LSL #3]

    (946) 0x45f654 LDR	X1, [X26, X12,LSL #3]

    (946) 0x45f658 CMP	X1, X19

    (946) 0x45f65c B.EQ	45f814

    (946) 0x45f660 LDR	X17, [X21, X16,LSL #3]

    (946) 0x45f664 LDR	X16, [X26, X17,LSL #3]

    (946) 0x45f668 CMP	X16, X19

    (946) 0x45f66c B.EQ	45f814

    (946) 0x45f670 LDR	X10, [X21, X10,LSL #3]

    (946) 0x45f674 LDR	X14, [X26, X10,LSL #3]

    (946) 0x45f678 CMP	X14, X19

    (946) 0x45f67c B.EQ	45f814

    (946) 0x45f680 LDR	X15, [X21, X15,LSL #3]

    (946) 0x45f684 LDR	X12, [X26, X15,LSL #3]

    (946) 0x45f688 CMP	X12, X19

    (946) 0x45f68c B.EQ	45f814

    (946) 0x45f690 LDR	X18, [X21, X18,LSL #3]

    (946) 0x45f694 LDR	X1, [X26, X18,LSL #3]

    (946) 0x45f698 CMP	X1, X19

    (946) 0x45f69c B.EQ	45f814

    (946) 0x45f6a0 LDR	X7, [X21, X7,LSL #3]

    (946) 0x45f6a4 LDR	X17, [X26, X7,LSL #3]

    (946) 0x45f6a8 CMP	X17, X19

    (946) 0x45f6ac B.EQ	45f814

    (946) 0x45f6b0 LDR	X13, [X21, X13,LSL #3]

    (946) 0x45f6b4 LDR	X16, [X26, X13,LSL #3]

    (946) 0x45f6b8 CMP	X16, X19

    (946) 0x45f6bc B.EQ	45f814

    (946) 0x45f6c0 CMP	X0, X3

    (946) 0x45f6c4 B.NE	45f620

  (945) 0x45f6c8 SUB	X4, X4, #1

  (945) 0x45f6cc CMP	X23, X4

  (945) 0x45f6d0 B.LE	45f3a8

(942) 0x45f6d4 LDR	X8, [SP, #120]

(942) 0x45f6d8 ADD	X6, X19, #2

(942) 0x45f6dc MOVZ	X2, #1

(942) 0x45f6e0 ADD	X1, SP, #808

(942) 0x45f6e4 ADD	X0, SP, #816

(942) 0x45f6e8 STR	X11, [SP, #304]

(942) 0x45f6ec LDR	X9, [SP, #240]

(942) 0x45f6f0 STR	X6, [SP, #288]

(942) 0x45f6f4 LDR	X3, [SP, #160]

(942) 0x45f6f8 SUB	X10, X8, X23

(942) 0x45f6fc LDR	X4, [SP, #224]

(942) 0x45f700 STR	X23, [X9, X19,LSL #3]

(942) 0x45f704 LDR	X5, [SP, #400]

(942) 0x45f708 STR	X10, [SP, #232]

(942) 0x45f70c STP	X6, X30, [SP, #328]

(942) 0x45f710 STR	X10, [SP, #816]

(942) 0x45f714 BL	549550

(942) 0x45f718 LDR	X4, [SP, #200]

(942) 0x45f71c MOVZ	X9, #0

(942) 0x45f720 LDR	X15, [SP, #152]

(942) 0x45f724 LDR	X2, [SP, #184]

(942) 0x45f728 ADD	X3, X4, #8

(942) 0x45f72c LDR	X11, [SP, #304]

(942) 0x45f730 LDR	X10, [SP, #336]

(942) 0x45f734 ADD	X14, X3, X2

(942) 0x45f738 CMP	X15, #0

(942) 0x45f73c B.LE	45f798

  (943) 0x45f740 LDP	X0, X30, [X3, #1016]

  (943) 0x45f744 CMP	X0, X30

  (943) 0x45f748 B.GE	45f78c

  (943) 0x45f74c SUB	X12, XZR, X0,LSL #3

  (943) 0x45f750 ORR	X18, XZR, X0

  (943) 0x45f754 ADD	X1, X12, X9,LSL #3

  (943) 0x45f758 ADD	X7, X24, X1

  (943) 0x45f75c HINT	#0

    (944) 0x45f760 LDR	X17, [X25, X0,LSL #3]

    (944) 0x45f764 ORR	X13, XZR, X0

    (944) 0x45f768 LDR	X16, [X22, X17,LSL #3]

    (944) 0x45f76c STR	X16, [X7, X0,LSL #3]

    (944) 0x45f770 ADD	X0, X0, #1

    (944) 0x45f774 LDR	X6, [X3]

    (944) 0x45f778 CMP	X6, X0

    (944) 0x45f77c B.GT	45f760

  (943) 0x45f780 ADD	X5, X9, #1

  (943) 0x45f784 SUB	X8, X13, X18

  (943) 0x45f788 ADD	X9, X5, X8

  (943) 0x45f78c ADD	X3, X3, #8

  (943) 0x45f790 CMP	X3, X14

  (943) 0x45f794 B.NE	45f740

(942) 0x45f798 LDR	X4, [SP, #832]

(942) 0x45f79c CMP	X4, #1

(942) 0x45f7a0 B.LE	45f7cc

(942) 0x45f7a4 LDR	X1, [SP, #344]

(942) 0x45f7a8 ORR	X3, XZR, X26

(942) 0x45f7ac ORR	X2, XZR, X24

(942) 0x45f7b0 MOVZ	X0, #11

(942) 0x45f7b4 STR	X11, [SP, #304]

(942) 0x45f7b8 STR	X10, [SP, #336]

(942) 0x45f7bc BL	4fd0a4

(942) 0x45f7c0 BL	4fd8ac

(942) 0x45f7c4 LDR	X11, [SP, #304]

(942) 0x45f7c8 LDR	X10, [SP, #336]

(942) 0x45f7cc LDR	X2, [SP, #808]

(942) 0x45f7d0 CBZ	X2, 462df0

(942) 0x45f7d4 CMP	X19, #8

(942) 0x45f7d8 B.EQ	45fa0c

(942) 0x45f7dc CMP	X11, X10

(942) 0x45f7e0 B.LT	45f918

(942) 0x45f7e4 ORR	X30, XZR, X23

(942) 0x45f7e8 B	45f38c

  (951) 0x45f7ec LDR	X3, [X12, X2]

  (951) 0x45f7f0 ADD	X0, X0, #1

  (951) 0x45f7f4 ADD	X4, X4, #1

  (951) 0x45f7f8 ADD	X24, X3, #1

  (951) 0x45f7fc STR	X24, [X12, X2]

  (951) 0x45f800 STR	X17, [X11]

  (951) 0x45f804 LDR	X3, [X21]

  (951) 0x45f808 CMP	X3, X0

  (951) 0x45f80c B.GT	45f080

(901) 0x45f810 B	45f09c

  (945) 0x45f814 UBFM	X3, X23, #61, #60

  (945) 0x45f818 ADD	X23, X23, #1

  (945) 0x45f81c LDR	X0, [X27, X3]

  (945) 0x45f820 STR	X0, [X9]

  (945) 0x45f824 STR	X5, [X27, X3]

  (945) 0x45f828 STR	X28, [X22, X2]

  (945) 0x45f82c B	45f6cc

0x45f830 LDR	X27, [SP, #192]

0x45f834 MOVZ	X1, #8

0x45f838 STR	X6, [SP, #168]

0x45f83c ORR	X0, XZR, X27

0x45f840 BL	546d88

0x45f844 MOVZ	X1, #8

0x45f848 ORR	X26, XZR, X0

0x45f84c ORR	X0, XZR, X27

0x45f850 BL	546d88

0x45f854 ORR	X4, XZR, X0

0x45f858 MOVZ	X1, #8

0x45f85c ORR	X0, XZR, X27

0x45f860 STR	X4, [SP, #536]

0x45f864 BL	546d88

0x45f868 ORR	X24, XZR, X0

0x45f86c LDR	X0, [SP, #496]

0x45f870 MOVZ	X1, #8

0x45f874 BL	546d88

0x45f878 LDR	X6, [SP, #168]

0x45f87c STR	X0, [SP, #136]

0x45f880 B	45ea9c

0x45f884 MOVZ	X1, #8

0x45f888 BL	546d88

0x45f88c LDR	X14, [SP, #168]

0x45f890 STR	X0, [SP, #512]

0x45f894 B	45edc8

0x45f898 MOVZ	X1, #8

0x45f89c STR	X6, [SP, #136]

0x45f8a0 BL	546d88

0x45f8a4 LDR	X26, [SP, #432]

0x45f8a8 STR	X0, [SP, #352]

0x45f8ac LDR	X6, [SP, #136]

0x45f8b0 CMP	X26, #1

0x45f8b4 B.GT	463064

0x45f8b8 LDR	X30, [SP, #832]

0x45f8bc STR	XZR, [SP, #424]

0x45f8c0 CMP	X30, #1

0x45f8c4 B.GT	45e8a8

0x45f8c8 MOVZ	X0, #1

0x45f8cc MOVZ	X20, #0

0x45f8d0 STR	XZR, [SP, #152]

0x45f8d4 STR	XZR, [SP, #176]

0x45f8d8 STR	X0, [SP, #552]

0x45f8dc B	45ea4c

0x45f8e0 MOVZ	X1, #8

0x45f8e4 BL	546d88

0x45f8e8 LDR	X6, [SP, #136]

0x45f8ec STR	X0, [SP, #360]

0x45f8f0 B	45e88c

0x45f8f4 LDR	X17, [SP, #264]

0x45f8f8 STR	XZR, [SP, #272]

0x45f8fc STP	XZR, XZR, [X17]

0x45f900 TBZ	X27, #63, 45f028

0x45f904 MOVZ	X28, #0

0x45f908 MOVZ	X23, #0

0x45f90c LDR	X24, [SP, #120]

0x45f910 STR	XZR, [SP, #208]

0x45f914 B	45f270

0x45f918 LDR	X28, [SP, #168]

0x45f91c ORR	X27, XZR, X23

0x45f920 ORR	X23, XZR, X20

0x45f924 ORR	X20, XZR, X24

0x45f928 LDR	X19, [SP, #328]

(939) 0x45f92c LDP	X4, X14, [SP, #224]

(939) 0x45f930 ADD	X19, X19, #1

(939) 0x45f934 MOVZ	X2, #1

(939) 0x45f938 ADD	X1, SP, #808

(939) 0x45f93c ADD	X0, SP, #816

(939) 0x45f940 ORR	X24, XZR, X19

(939) 0x45f944 LDR	X15, [SP, #264]

(939) 0x45f948 LDR	X3, [SP, #160]

(939) 0x45f94c LDR	X5, [SP, #400]

(939) 0x45f950 STR	X27, [X15, X19,LSL #3]

(939) 0x45f954 STR	X14, [SP, #816]

(939) 0x45f958 BL	549550

(939) 0x45f95c LDR	X12, [SP, #152]

(939) 0x45f960 CMP	X12, #0

(939) 0x45f964 B.LE	45f9d0

(939) 0x45f968 LDR	X30, [SP, #200]

(939) 0x45f96c MOVZ	X11, #0

(939) 0x45f970 LDR	X18, [SP, #184]

(939) 0x45f974 ADD	X1, X30, #8

(939) 0x45f978 ADD	X17, X1, X18

  (940) 0x45f97c LDP	X0, X7, [X1, #1016]

  (940) 0x45f980 CMP	X7, X0

  (940) 0x45f984 B.LE	45f9c4

  (940) 0x45f988 UBFM	X13, X11, #61, #60

  (940) 0x45f98c ORR	X16, XZR, X0

  (940) 0x45f990 SUB	X6, X13, X0,LSL #3

  (940) 0x45f994 ADD	X8, X20, X6

    (941) 0x45f998 LDR	X9, [X25, X0,LSL #3]

    (941) 0x45f99c ORR	X4, XZR, X0

    (941) 0x45f9a0 LDR	X3, [X22, X9,LSL #3]

    (941) 0x45f9a4 STR	X3, [X8, X0,LSL #3]

    (941) 0x45f9a8 ADD	X0, X0, #1

    (941) 0x45f9ac LDR	X10, [X1]

    (941) 0x45f9b0 CMP	X10, X0

    (941) 0x45f9b4 B.GT	45f998

  (940) 0x45f9b8 ADD	X5, X11, #1

  (940) 0x45f9bc SUB	X2, X4, X16

  (940) 0x45f9c0 ADD	X11, X5, X2

  (940) 0x45f9c4 ADD	X1, X1, #8

  (940) 0x45f9c8 CMP	X17, X1

  (940) 0x45f9cc B.NE	45f97c

(939) 0x45f9d0 LDR	X21, [SP, #832]

(939) 0x45f9d4 CMP	X21, #1

(939) 0x45f9d8 B.LE	45f9f4

(939) 0x45f9dc LDR	X1, [SP, #344]

(939) 0x45f9e0 ORR	X3, XZR, X26

(939) 0x45f9e4 ORR	X2, XZR, X20

(939) 0x45f9e8 MOVZ	X0, #11

(939) 0x45f9ec BL	4fd0a4

(939) 0x45f9f0 BL	4fd8ac

(939) 0x45f9f4 LDR	X14, [SP, #808]

(939) 0x45f9f8 CBZ	X14, 4632c4

(939) 0x45f9fc CMP	X19, #10

(939) 0x45fa00 B.NE	45f92c

0x45fa04 ORR	X21, XZR, X23

0x45fa08 B	45fa18

0x45fa0c LDR	X28, [SP, #168]

0x45fa10 ORR	X21, XZR, X20

0x45fa14 ORR	X20, XZR, X24

0x45fa18 MOVZ	X24, #10

0x45fa1c MOVZ	X23, #80

0x45fa20 STR	X24, [SP, #328]

0x45fa24 STR	X23, [SP, #632]

0x45fa28 ORR	X0, XZR, X20

0x45fa2c STR	X21, [SP, #120]

0x45fa30 BL	546e20

0x45fa34 MOVZ	X1, #8

0x45fa38 ORR	X0, XZR, X24

0x45fa3c BL	546d88

0x45fa40 ORR	X19, XZR, X0

0x45fa44 LDR	X0, [SP, #208]

0x45fa48 MOVZ	X1, #8

0x45fa4c STR	X19, [SP, #208]

0x45fa50 BL	546d88

0x45fa54 LDR	X20, [SP, #312]

0x45fa58 ORR	X15, XZR, X0

0x45fa5c MOVZ	X1, #8

0x45fa60 STR	X15, [X19, #8]

0x45fa64 ORR	X0, XZR, X20

0x45fa68 BL	546d88

0x45fa6c ORR	X12, XZR, X0

0x45fa70 MOVZ	X1, #8

0x45fa74 ORR	X0, XZR, X20

0x45fa78 STR	X12, [SP, #408]

0x45fa7c BL	546d88

0x45fa80 LDR	X18, [SP, #832]

0x45fa84 STR	X0, [SP, #416]

0x45fa88 LDR	X6, [SP, #120]

0x45fa8c CMP	X18, #1

0x45fa90 B.GT	462bd4

0x45fa94 LDR	X30, [SP, #264]

0x45fa98 MOVZ	X7, #0

0x45fa9c STR	XZR, [SP, #184]

0x45faa0 STR	XZR, [SP, #472]

0x45faa4 STR	XZR, [SP, #520]

0x45faa8 STR	XZR, [SP, #528]

0x45faac ADD	X17, X30, #8

0x45fab0 LDP	X5, X16, [X17]

0x45fab4 CMP	X5, X16

0x45fab8 B.GE	462c54

0x45fabc LDR	X11, [SP, #184]

0x45fac0 MOVZ	X4, #0

0x45fac4 LDP	X14, X15, [SP, #480]

0x45fac8 LDR	X27, [SP, #208]

0x45facc LDR	X23, [SP, #248]

0x45fad0 LDR	X18, [SP, #280]

0x45fad4 LDR	X10, [SP, #320]

0x45fad8 LDR	X13, [SP, #352]

0x45fadc LDR	X28, [SP, #392]

0x45fae0 LDR	X12, [SP, #536]

(902) 0x45fae4 LDR	X0, [X18, X5,LSL #3]

(902) 0x45fae8 LDR	X2, [SP, #408]

(902) 0x45faec LDR	X1, [SP, #416]

(902) 0x45faf0 UBFM	X8, X0, #61, #60

(902) 0x45faf4 ADD	X19, X8, #8

(902) 0x45faf8 STR	X4, [X2, X8]

(902) 0x45fafc ADD	X20, X14, X19

(902) 0x45fb00 STR	X7, [X1, X8]

(902) 0x45fb04 LDR	X16, [X14, X8]

(902) 0x45fb08 LDR	X1, [X14, X19]

(902) 0x45fb0c CMP	X16, X1

(902) 0x45fb10 B.GE	45fb40

(902) 0x45fb14 HINT	#0

(902) 0x45fb18 HINT	#0

(902) 0x45fb1c HINT	#0

  (938) 0x45fb20 LDR	X21, [X6, X16,LSL #3]

  (938) 0x45fb24 UBFM	X9, X21, #61, #60

  (938) 0x45fb28 LDR	X17, [X10, X9]

  (938) 0x45fb2c CMP	X17, #1

  (938) 0x45fb30 B.EQ	461054

  (938) 0x45fb34 ADD	X16, X16, #1

  (938) 0x45fb38 CMP	X16, X1

  (938) 0x45fb3c B.LT	45fb20

(902) 0x45fb40 LDR	X9, [X15, X8]

(902) 0x45fb44 ADD	X8, X15, X19

(902) 0x45fb48 LDR	X2, [X15, X19]

(902) 0x45fb4c CMP	X9, X2

(902) 0x45fb50 B.GE	45fb80

(902) 0x45fb54 HINT	#0

(902) 0x45fb58 HINT	#0

(902) 0x45fb5c HINT	#0

  (937) 0x45fb60 LDR	X19, [X28, X9,LSL #3]

  (937) 0x45fb64 UBFM	X20, X19, #61, #60

  (937) 0x45fb68 LDR	X21, [X13, X20]

  (937) 0x45fb6c CMP	X21, #1

  (937) 0x45fb70 B.EQ	46101c

  (937) 0x45fb74 ADD	X9, X9, #1

  (937) 0x45fb78 CMP	X9, X2

  (937) 0x45fb7c B.LT	45fb60

(902) 0x45fb80 LDR	X3, [X30, #16]

(902) 0x45fb84 ADD	X5, X5, #1

(902) 0x45fb88 CMP	X3, X5

(902) 0x45fb8c B.GT	45fae4

0x45fb90 LDR	X30, [SP, #128]

0x45fb94 ADD	X11, X30, X4

0x45fb98 STR	X11, [SP, #624]

0x45fb9c LDR	X27, [SP, #832]

0x45fba0 CMP	X27, #1

0x45fba4 B.GT	462ac8

0x45fba8 LDR	X17, [SP, #328]

0x45fbac MOVZ	X24, #0

0x45fbb0 STR	XZR, [SP, #304]

0x45fbb4 STR	XZR, [SP, #336]

0x45fbb8 STR	XZR, [SP, #376]

0x45fbbc STP	XZR, XZR, [SP, #456]

0x45fbc0 CMP	X17, #2

0x45fbc4 B.EQ	462bc8

0x45fbc8 ADRP	X5,

0x45fbcc MOVZ	X3, #0

0x45fbd0 LDR	D31, [SP, #144]

0x45fbd4 MOVZ	X19, #1

0x45fbd8 MOVZ	X23, #2

0x45fbdc STR	X24, [SP, #560]

0x45fbe0 ADD	X24, X5, #588

0x45fbe4 LDR	X0, [SP, #176]

0x45fbe8 STR	X25, [SP, #568]

0x45fbec ORR	X25, XZR, X22

0x45fbf0 MOVN	X22, #0

0x45fbf4 LDR	X27, [SP, #264]

0x45fbf8 DUP	V0.2D, V31.D[0]

0x45fbfc STR	X6, [SP, #736]

0x45fc00 LDR	X18, [SP, #464]

0x45fc04 ADD	X30, X0, #1

0x45fc08 STR	XZR, [SP, #224]

0x45fc0c LDR	X21, [SP, #520]

0x45fc10 UBFM	X11, X30, #61, #60

0x45fc14 ADD	X6, X27, #8

0x45fc18 STR	X3, [SP, #384]

0x45fc1c LDR	X20, [SP, #528]

0x45fc20 ADD	X27, X18, #8

0x45fc24 STR	XZR, [SP, #504]

0x45fc28 STR	XZR, [SP, #544]

0x45fc2c STR	X22, [SP, #576]

0x45fc30 STR	X7, [SP, #696]

0x45fc34 STR	X11, [SP, #744]

0x45fc38 STR	X6, [SP, #752]

0x45fc3c STR	Q0, [SP, #768]

0x45fc40 STR	X24, [SP, #784]

(904) 0x45fc44 LDR	X28, [SP, #832]

(904) 0x45fc48 CMP	X28, #1

(904) 0x45fc4c B.GT	4613c0

(904) 0x45fc50 LDR	X10, [SP, #152]

(904) 0x45fc54 CMP	X10, #0

(904) 0x45fc58 B.LE	460180

(904) 0x45fc5c LDR	X30, [SP, #200]

(904) 0x45fc60 ORR	X17, XZR, X23

(904) 0x45fc64 MOVZ	X3, #0

(904) 0x45fc68 LDP	X23, X24, [SP, #408]

(904) 0x45fc6c MOVZ	X14, #0

(904) 0x45fc70 STR	X26, [SP, #232]

(904) 0x45fc74 LDR	Q1, [SP, #768]

(904) 0x45fc78 ADD	X22, X30, #8

(904) 0x45fc7c LDR	X16, [SP, #144]

(904) 0x45fc80 LDR	X15, [SP, #216]

(904) 0x45fc84 LDR	X26, [SP, #256]

(904) 0x45fc88 LDR	X18, [SP, #384]

(904) 0x45fc8c LDR	X9, [SP, #568]

  (932) 0x45fc90 LDR	X28, [SP, #200]

  (932) 0x45fc94 LDR	X5, [X22, X14,LSL #3]

  (932) 0x45fc98 LDR	X1, [X28, X14,LSL #3]

  (932) 0x45fc9c CMP	X1, X5

  (932) 0x45fca0 B.GE	46015c

  (932) 0x45fca4 ORR	X30, XZR, X17

  (932) 0x45fca8 B	45fcb8

    (933) 0x45fcac ADD	X1, X1, #1

    (933) 0x45fcb0 CMP	X1, X5

    (933) 0x45fcb4 B.GE	460158

    (933) 0x45fcb8 LDR	X6, [X9, X1,LSL #3]

    (933) 0x45fcbc UBFM	X0, X6, #61, #60

    (933) 0x45fcc0 LDR	X10, [X25, X0]

    (933) 0x45fcc4 CMP	X10, X19

    (933) 0x45fcc8 B.NE	45fcac

    (933) 0x45fccc ADD	X13, X0, #8

    (933) 0x45fcd0 LDR	X5, [X23, X0]

    (933) 0x45fcd4 LDR	X10, [X26, X13]

    (933) 0x45fcd8 ADD	X12, X10, X5

    (933) 0x45fcdc CMP	X5, X12

    (933) 0x45fce0 B.GE	45ffbc

    (933) 0x45fce4 LDR	X4, [SP, #208]

    (933) 0x45fce8 SUB	X8, X10, #1

    (933) 0x45fcec LDR	X11, [X4, X19,LSL #3]

    (933) 0x45fcf0 CMP	X8, #3

    (933) 0x45fcf4 B.LS	4610a8

    (933) 0x45fcf8 ADD	X2, X5, #1

    (933) 0x45fcfc ADD	X4, X18, X3,LSL #3

    (933) 0x45fd00 UBFM	X17, X3, #61, #60

    (933) 0x45fd04 ADD	X6, X11, X2,LSL #3

    (933) 0x45fd08 UBFM	X28, X2, #61, #60

    (933) 0x45fd0c STR	X17, [SP, #120]

    (933) 0x45fd10 SUB	X8, X4, X6

    (933) 0x45fd14 CMP	X8, #16

    (933) 0x45fd18 B.LS	4610b4

    (933) 0x45fd1c UBFM	X17, X10, #2, #63

    (933) 0x45fd20 SUB	X7, X28, #8

    (933) 0x45fd24 UBFM	X28, X17, #59, #58

    (933) 0x45fd28 ADD	X6, X11, X7

    (933) 0x45fd2c SUB	X17, X28, #32

    (933) 0x45fd30 STR	X7, [SP, #136]

    (933) 0x45fd34 MOVZ	X2, #0

    (933) 0x45fd38 UBFM	X17, X17, #5, #63

    (933) 0x45fd3c ADD	X8, X6, #16

    (933) 0x45fd40 ADD	X17, X17, #1

    (933) 0x45fd44 ADD	X7, X4, #16

    (933) 0x45fd48 ANDS	X17, X17, #4224

    (933) 0x45fd4c B.EQ	45fe54

    (933) 0x45fd50 CMP	X17, #1

    (933) 0x45fd54 B.EQ	45fe30

    (933) 0x45fd58 CMP	X17, #2

    (933) 0x45fd5c B.EQ	45fe14

    (933) 0x45fd60 CMP	X17, #3

    (933) 0x45fd64 B.EQ	45fdf8

    (933) 0x45fd68 CMP	X17, #4

    (933) 0x45fd6c B.EQ	45fddc

    (933) 0x45fd70 CMP	X17, #5

    (933) 0x45fd74 B.EQ	45fdc0

    (933) 0x45fd78 CMP	X17, #6

    (933) 0x45fd7c B.EQ	45fda4

    (933) 0x45fd80 LDR	X2, [SP, #136]

    (933) 0x45fd84 LDR	Q30, [X6, #16]

    (933) 0x45fd88 LDR	X17, [SP, #120]

    (933) 0x45fd8c LDR	Q29, [X11, X2]

    (933) 0x45fd90 MOVZ	X2, #32

    (933) 0x45fd94 ADD	V2.2D, V30.2D, V1.2D

    (933) 0x45fd98 ADD	V3.2D, V29.2D, V1.2D

    (933) 0x45fd9c STR	Q3, [X18, X17]

    (933) 0x45fda0 STR	Q2, [X4, #16]

    (933) 0x45fda4 LDR	Q4, [X6, X2]

    (933) 0x45fda8 LDR	Q5, [X8, X2]

    (933) 0x45fdac ADD	V6.2D, V4.2D, V1.2D

    (933) 0x45fdb0 ADD	V7.2D, V5.2D, V1.2D

    (933) 0x45fdb4 STR	Q6, [X4, X2]

    (933) 0x45fdb8 STR	Q7, [X7, X2]

    (933) 0x45fdbc ADD	X2, X2, #32

    (933) 0x45fdc0 LDR	Q16, [X6, X2]

    (933) 0x45fdc4 LDR	Q17, [X8, X2]

    (933) 0x45fdc8 ADD	V18.2D, V16.2D, V1.2D

    (933) 0x45fdcc ADD	V19.2D, V17.2D, V1.2D

    (933) 0x45fdd0 STR	Q18, [X4, X2]

    (933) 0x45fdd4 STR	Q19, [X7, X2]

    (933) 0x45fdd8 ADD	X2, X2, #32

    (933) 0x45fddc LDR	Q20, [X6, X2]

    (933) 0x45fde0 LDR	Q21, [X8, X2]

    (933) 0x45fde4 ADD	V22.2D, V20.2D, V1.2D

    (933) 0x45fde8 ADD	V23.2D, V21.2D, V1.2D

    (933) 0x45fdec STR	Q22, [X4, X2]

    (933) 0x45fdf0 STR	Q23, [X7, X2]

    (933) 0x45fdf4 ADD	X2, X2, #32

    (933) 0x45fdf8 LDR	Q24, [X6, X2]

    (933) 0x45fdfc LDR	Q25, [X8, X2]

    (933) 0x45fe00 ADD	V26.2D, V24.2D, V1.2D

    (933) 0x45fe04 ADD	V27.2D, V25.2D, V1.2D

    (933) 0x45fe08 STR	Q26, [X4, X2]

    (933) 0x45fe0c STR	Q27, [X7, X2]

    (933) 0x45fe10 ADD	X2, X2, #32

    (933) 0x45fe14 LDR	Q28, [X6, X2]

    (933) 0x45fe18 LDR	Q31, [X8, X2]

    (933) 0x45fe1c ADD	V0.2D, V28.2D, V1.2D

    (933) 0x45fe20 ADD	V30.2D, V31.2D, V1.2D

    (933) 0x45fe24 STR	Q0, [X4, X2]

    (933) 0x45fe28 STR	Q30, [X7, X2]

    (933) 0x45fe2c ADD	X2, X2, #32

    (933) 0x45fe30 LDR	Q2, [X6, X2]

    (933) 0x45fe34 LDR	Q3, [X8, X2]

    (933) 0x45fe38 ADD	V29.2D, V2.2D, V1.2D

    (933) 0x45fe3c ADD	V4.2D, V3.2D, V1.2D

    (933) 0x45fe40 STR	Q29, [X4, X2]

    (933) 0x45fe44 STR	Q4, [X7, X2]

    (933) 0x45fe48 ADD	X2, X2, #32

    (933) 0x45fe4c CMP	X28, X2

    (933) 0x45fe50 B.EQ	45ff54

    (933) 0x45fe54 STR	X0, [SP, #120]

    (933) 0x45fe58 STR	X13, [SP, #136]

    (933) 0x45fe5c STP	X10, X11, [SP, #160]

      (936) 0x45fe60 ADD	X0, X2, #32

      (936) 0x45fe64 ADD	X17, X2, #64

      (936) 0x45fe68 ADD	X13, X2, #96

      (936) 0x45fe6c ADD	X11, X2, #128

      (936) 0x45fe70 LDR	Q5, [X6, X2]

      (936) 0x45fe74 ADD	X10, X2, #160

      (936) 0x45fe78 LDR	Q6, [X8, X2]

      (936) 0x45fe7c ADD	V7.2D, V5.2D, V1.2D

      (936) 0x45fe80 ADD	V16.2D, V6.2D, V1.2D

      (936) 0x45fe84 STR	Q7, [X4, X2]

      (936) 0x45fe88 STR	Q16, [X7, X2]

      (936) 0x45fe8c LDR	Q17, [X6, X0]

      (936) 0x45fe90 LDR	Q18, [X8, X0]

      (936) 0x45fe94 ADD	V19.2D, V17.2D, V1.2D

      (936) 0x45fe98 ADD	V20.2D, V18.2D, V1.2D

      (936) 0x45fe9c STR	Q19, [X4, X0]

      (936) 0x45fea0 STR	Q20, [X7, X0]

      (936) 0x45fea4 ADD	X0, X2, #192

      (936) 0x45fea8 LDR	Q21, [X6, X17]

      (936) 0x45feac LDR	Q22, [X8, X17]

      (936) 0x45feb0 ADD	V23.2D, V21.2D, V1.2D

      (936) 0x45feb4 ADD	V24.2D, V22.2D, V1.2D

      (936) 0x45feb8 STR	Q23, [X4, X17]

      (936) 0x45febc STR	Q24, [X7, X17]

      (936) 0x45fec0 ADD	X17, X2, #224

      (936) 0x45fec4 ADD	X2, X2, #256

      (936) 0x45fec8 LDR	Q25, [X6, X13]

      (936) 0x45fecc LDR	Q26, [X8, X13]

      (936) 0x45fed0 ADD	V27.2D, V25.2D, V1.2D

      (936) 0x45fed4 ADD	V28.2D, V26.2D, V1.2D

      (936) 0x45fed8 STR	Q27, [X4, X13]

      (936) 0x45fedc STR	Q28, [X7, X13]

      (936) 0x45fee0 LDR	Q31, [X6, X11]

      (936) 0x45fee4 LDR	Q0, [X8, X11]

      (936) 0x45fee8 ADD	V2.2D, V31.2D, V1.2D

      (936) 0x45feec ADD	V30.2D, V0.2D, V1.2D

      (936) 0x45fef0 STR	Q2, [X4, X11]

      (936) 0x45fef4 STR	Q30, [X7, X11]

      (936) 0x45fef8 LDR	Q3, [X6, X10]

      (936) 0x45fefc LDR	Q4, [X8, X10]

      (936) 0x45ff00 ADD	V29.2D, V3.2D, V1.2D

      (936) 0x45ff04 ADD	V5.2D, V4.2D, V1.2D

      (936) 0x45ff08 STR	Q29, [X4, X10]

      (936) 0x45ff0c STR	Q5, [X7, X10]

      (936) 0x45ff10 LDR	Q6, [X6, X0]

      (936) 0x45ff14 LDR	Q7, [X8, X0]

      (936) 0x45ff18 ADD	V16.2D, V6.2D, V1.2D

      (936) 0x45ff1c ADD	V17.2D, V7.2D, V1.2D

      (936) 0x45ff20 STR	Q16, [X4, X0]

      (936) 0x45ff24 STR	Q17, [X7, X0]

      (936) 0x45ff28 LDR	Q18, [X6, X17]

      (936) 0x45ff2c LDR	Q19, [X8, X17]

      (936) 0x45ff30 ADD	V20.2D, V18.2D, V1.2D

      (936) 0x45ff34 ADD	V21.2D, V19.2D, V1.2D

      (936) 0x45ff38 STR	Q20, [X4, X17]

      (936) 0x45ff3c STR	Q21, [X7, X17]

      (936) 0x45ff40 CMP	X28, X2

      (936) 0x45ff44 B.NE	45fe60

    (933) 0x45ff48 LDR	X0, [SP, #120]

    (933) 0x45ff4c LDP	X10, X11, [SP, #160]

    (933) 0x45ff50 LDR	X13, [SP, #136]

    (933) 0x45ff54 AND	X4, X10, #8062

    (933) 0x45ff58 ADD	X5, X5, X4

    (933) 0x45ff5c ADD	X28, X3, X4

    (933) 0x45ff60 ANDS	XZR, X10, #4160

    (933) 0x45ff64 B.EQ	45ffb8

    (933) 0x45ff68 LDR	X6, [X11, X5,LSL #3]

    (933) 0x45ff6c ADD	X8, X5, #1

    (933) 0x45ff70 ADD	X7, X6, X16

    (933) 0x45ff74 STR	X7, [X18, X28,LSL #3]

    (933) 0x45ff78 CMP	X8, X12

    (933) 0x45ff7c B.GE	45ffb8

    (933) 0x45ff80 UBFM	X17, X8, #61, #60

    (933) 0x45ff84 ADD	X2, X28, #1

    (933) 0x45ff88 LDR	X4, [X11, X17]

    (933) 0x45ff8c UBFM	X28, X2, #61, #60

    (933) 0x45ff90 ADD	X5, X5, #2

    (933) 0x45ff94 ADD	X6, X4, X16

    (933) 0x45ff98 STR	X6, [X18, X28]

    (933) 0x45ff9c CMP	X12, X5

    (933) 0x45ffa0 B.LE	45ffb8

    (933) 0x45ffa4 ADD	X12, X11, X17

    (933) 0x45ffa8 ADD	X11, X18, X28

    (933) 0x45ffac LDR	X8, [X12, #8]

    (933) 0x45ffb0 ADD	X7, X8, X16

    (933) 0x45ffb4 STR	X7, [X11, #8]

    (933) 0x45ffb8 ADD	X3, X3, X10

    (933) 0x45ffbc LDR	X10, [X24, X0]

    (933) 0x45ffc0 LDR	X12, [X15, X13]

    (933) 0x45ffc4 ADD	X11, X10, X12

    (933) 0x45ffc8 CMP	X10, X11

    (933) 0x45ffcc B.GE	460148

    (933) 0x45ffd0 LDR	X5, [SP, #184]

    (933) 0x45ffd4 UBFM	X28, X10, #61, #60

    (933) 0x45ffd8 LDR	X17, [X5, X19,LSL #3]

    (933) 0x45ffdc ADD	X8, X17, X11,LSL #3

    (933) 0x45ffe0 ADD	X2, X17, X10,LSL #3

    (933) 0x45ffe4 SUB	X7, X8, X2

    (933) 0x45ffe8 TBZ	W7, #3, 460000

    (933) 0x45ffec LDR	X4, [X17, X28]

    (933) 0x45fff0 LDR	X6, [X20, #8]

    (933) 0x45fff4 CMP	X4, X6

    (933) 0x45fff8 B.GE	4600b0

    (933) 0x45fffc B	460fb4

      (934) 0x460000 LDR	X13, [X2]

      (934) 0x460004 LDR	X10, [X20, #8]

      (934) 0x460008 CMP	X13, X10

      (934) 0x46000c B.LT	461084

      (934) 0x460010 CMP	X19, #1

      (934) 0x460014 B.EQ	46009c

      (934) 0x460018 LDR	X17, [X20, #16]

      (934) 0x46001c CMP	X13, X17

      (934) 0x460020 B.LT	461228

      (934) 0x460024 CMP	X19, #2

      (934) 0x460028 B.EQ	46009c

      (934) 0x46002c LDR	X12, [X20, #24]

      (934) 0x460030 CMP	X13, X12

      (934) 0x460034 B.LT	461238

      (934) 0x460038 CMP	X19, #3

      (934) 0x46003c B.EQ	46009c

      (934) 0x460040 LDR	X7, [X20, #32]

      (934) 0x460044 CMP	X13, X7

      (934) 0x460048 B.LT	461250

      (934) 0x46004c CMP	X19, #4

      (934) 0x460050 B.EQ	46009c

      (934) 0x460054 LDR	X5, [X20, #40]

      (934) 0x460058 CMP	X5, X13

      (934) 0x46005c B.GT	461258

      (934) 0x460060 CMP	X19, #5

      (934) 0x460064 B.EQ	46009c

      (934) 0x460068 LDR	X6, [X20, #48]

      (934) 0x46006c CMP	X13, X6

      (934) 0x460070 B.LT	461270

      (934) 0x460074 CMP	X19, #6

      (934) 0x460078 B.EQ	46009c

      (934) 0x46007c LDR	X0, [X20, #56]

      (934) 0x460080 CMP	X13, X0

      (934) 0x460084 B.LT	461288

      (934) 0x460088 CMP	X19, #8

      (934) 0x46008c B.NE	46009c

      (934) 0x460090 LDR	X11, [X20, #64]

      (934) 0x460094 CMP	X11, X13

      (934) 0x460098 B.GT	461290

      (934) 0x46009c LDR	X4, [X2, #8]

      (934) 0x4600a0 ADD	X2, X2, #8

      (934) 0x4600a4 LDR	X7, [X20, #8]

      (934) 0x4600a8 CMP	X4, X7

      (934) 0x4600ac B.LT	460fb4

      (934) 0x4600b0 CMP	X19, #1

      (934) 0x4600b4 B.EQ	46013c

      (934) 0x4600b8 LDR	X5, [X20, #16]

      (934) 0x4600bc CMP	X4, X5

      (934) 0x4600c0 B.LT	46107c

      (934) 0x4600c4 CMP	X19, #2

      (934) 0x4600c8 B.EQ	46013c

      (934) 0x4600cc LDR	X6, [X20, #24]

      (934) 0x4600d0 CMP	X4, X6

      (934) 0x4600d4 B.LT	461230

      (934) 0x4600d8 CMP	X19, #3

      (934) 0x4600dc B.EQ	46013c

      (934) 0x4600e0 LDR	X0, [X20, #32]

      (934) 0x4600e4 CMP	X4, X0

      (934) 0x4600e8 B.LT	461240

      (934) 0x4600ec CMP	X19, #4

      (934) 0x4600f0 B.EQ	46013c

      (934) 0x4600f4 LDR	X11, [X20, #40]

      (934) 0x4600f8 CMP	X11, X4

      (934) 0x4600fc B.GT	461248

      (934) 0x460100 CMP	X19, #5

      (934) 0x460104 B.EQ	46013c

      (934) 0x460108 LDR	X28, [X20, #48]

      (934) 0x46010c CMP	X4, X28

      (934) 0x460110 B.LT	461260

      (934) 0x460114 CMP	X19, #6

      (934) 0x460118 B.EQ	46013c

      (934) 0x46011c LDR	X10, [X20, #56]

      (934) 0x460120 CMP	X4, X10

      (934) 0x460124 B.LT	461278

      (934) 0x460128 CMP	X19, #8

      (934) 0x46012c B.NE	46013c

      (934) 0x460130 LDR	X17, [X20, #64]

      (934) 0x460134 CMP	X17, X4

      (934) 0x460138 B.GT	461280

      (934) 0x46013c ADD	X2, X2, #8

      (934) 0x460140 CMP	X2, X8

      (934) 0x460144 B.NE	460000

    (933) 0x460148 LDR	X5, [X22, X14,LSL #3]

    (933) 0x46014c ADD	X1, X1, #1

    (933) 0x460150 CMP	X1, X5

    (933) 0x460154 B.LT	45fcb8

  (932) 0x460158 ORR	X17, XZR, X30

  (932) 0x46015c LDR	X30, [SP, #152]

  (932) 0x460160 ADD	X14, X14, #1

  (932) 0x460164 CMP	X30, X14

  (932) 0x460168 B.GT	45fc90

(904) 0x46016c LDR	X26, [SP, #232]

(904) 0x460170 ORR	X23, XZR, X17

(904) 0x460174 LDR	X3, [SP, #832]

(904) 0x460178 CMP	X3, #1

(904) 0x46017c B.GT	4612a4

(904) 0x460180 LDR	X16, [SP, #176]

(904) 0x460184 CMP	X16, #0

(904) 0x460188 B.LE	460344

(904) 0x46018c LDR	X16, [SP, #664]

(904) 0x460190 MOVZ	X30, #0

(904) 0x460194 MOVZ	X17, #0

(904) 0x460198 MOVZ	X28, #0

(904) 0x46019c ORR	X18, XZR, X30

(904) 0x4601a0 STR	X25, [SP, #792]

(904) 0x4601a4 LDR	X22, [SP, #560]

(904) 0x4601a8 ORR	X15, XZR, X26

(904) 0x4601ac ORR	X25, XZR, X23

(904) 0x4601b0 STP	X20, X17, [SP, #160]

(904) 0x4601b4 ADD	X0, X16, #8

(904) 0x4601b8 ORR	X7, XZR, X0

(904) 0x4601bc HINT	#0

  (903) 0x4601c0 LDP	X8, X23, [X7, #1016]

  (903) 0x4601c4 CMP	X8, X23

  (903) 0x4601c8 B.GE	460308

  (903) 0x4601cc ORR	X24, XZR, X27

  (903) 0x4601d0 ORR	X9, XZR, X22

  (903) 0x4601d4 STR	X28, [SP, #288]

  (903) 0x4601d8 ORR	X27, XZR, X19

  (903) 0x4601dc ORR	X3, XZR, X15

  (903) 0x4601e0 ORR	X19, XZR, X25

  (903) 0x4601e4 B	4601f4

    (926) 0x4601e8 ADD	X8, X8, #1

    (926) 0x4601ec CMP	X8, X23

    (926) 0x4601f0 B.GE	4602f0

    (926) 0x4601f4 LDR	X25, [X3, X8,LSL #3]

    (926) 0x4601f8 CMP	X25, X27

    (926) 0x4601fc B.NE	4601e8

    (926) 0x460200 LDR	X26, [X24, X8,LSL #3]

    (926) 0x460204 ADD	X15, X18, X26

    (926) 0x460208 CMP	X15, X18

    (926) 0x46020c B.LE	461268

    (926) 0x460210 LDR	X4, [X9, X19,LSL #3]

    (926) 0x460214 ORR	X26, XZR, X18

    (926) 0x460218 ORR	X25, XZR, X19

    (926) 0x46021c ORR	X28, XZR, X8

    (926) 0x460220 ORR	X23, XZR, X9

    (926) 0x460224 STR	X27, [SP, #120]

    (926) 0x460228 STR	X18, [SP, #136]

    (926) 0x46022c STP	X7, X3, [SP, #232]

    (926) 0x460230 B	460260

      (927) 0x460234 ORN	X2, XZR, X3

      (927) 0x460238 STR	X2, [X4, X19]

      (927) 0x46023c LDR	X17, [X24, X28,LSL #3]

      (927) 0x460240 ADD	X26, X26, #1

      (927) 0x460244 LDR	X30, [SP, #136]

      (927) 0x460248 ADD	X16, X30, X17

      (927) 0x46024c CMP	X16, X26

      (927) 0x460250 B.LE	4602c8

      (927) 0x460254 HINT	#0

      (927) 0x460258 HINT	#0

      (927) 0x46025c HINT	#0

      (927) 0x460260 UBFM	X19, X26, #61, #60

      (927) 0x460264 LDR	X22, [SP, #144]

      (927) 0x460268 LDR	X27, [X4, X19]

      (927) 0x46026c LDR	X20, [SP, #128]

      (927) 0x460270 SUBS	X3, X27, X22

      (927) 0x460274 CCMP	X3, X20, #0, #5

      (927) 0x460278 B.LT	460234

      (927) 0x46027c LDR	X22, [SP, #160]

      (927) 0x460280 MOVZ	X20, #0

        (928) 0x460284 LDP	X9, X8, [X22]

        (928) 0x460288 ORR	X1, XZR, X27

        (928) 0x46028c LDR	X0, [X21, X20,LSL #3]

        (928) 0x460290 ADD	X20, X20, #1

        (928) 0x460294 SUB	X2, X8, X9

        (928) 0x460298 BL	5455c0

        (928) 0x46029c TBNZ	X0, #63, 460fe0

      (927) 0x4602a0 LDR	X14, [X22]

      (927) 0x4602a4 ADD	X26, X26, #1

      (927) 0x4602a8 LDR	X4, [X23, X25,LSL #3]

      (927) 0x4602ac LDR	X30, [SP, #136]

      (927) 0x4602b0 ADD	X1, X14, X0

      (927) 0x4602b4 STR	X1, [X4, X19]

      (927) 0x4602b8 LDR	X17, [X24, X28,LSL #3]

      (927) 0x4602bc ADD	X16, X30, X17

      (927) 0x4602c0 CMP	X16, X26

      (927) 0x4602c4 B.GT	460260

    (926) 0x4602c8 LDP	X7, X3, [SP, #232]

    (926) 0x4602cc ORR	X9, XZR, X23

    (926) 0x4602d0 ORR	X8, XZR, X28

    (926) 0x4602d4 ADD	X8, X8, #1

    (926) 0x4602d8 ORR	X19, XZR, X25

    (926) 0x4602dc ORR	X18, XZR, X16

    (926) 0x4602e0 LDR	X27, [SP, #120]

    (926) 0x4602e4 LDR	X23, [X7]

    (926) 0x4602e8 CMP	X8, X23

    (926) 0x4602ec B.LT	4601f4

  (903) 0x4602f0 LDR	X28, [SP, #288]

  (903) 0x4602f4 ORR	X25, XZR, X19

  (903) 0x4602f8 ORR	X15, XZR, X3

  (903) 0x4602fc ORR	X19, XZR, X27

  (903) 0x460300 ORR	X22, XZR, X9

  (903) 0x460304 ORR	X27, XZR, X24

  (903) 0x460308 LDR	X20, [SP, #176]

  (903) 0x46030c ADD	X28, X28, #1

  (903) 0x460310 ADD	X7, X7, #8

  (903) 0x460314 CMP	X20, X28

  (903) 0x460318 B.NE	4601c0

(904) 0x46031c LDP	X20, X18, [SP, #160]

(904) 0x460320 ORR	X23, XZR, X25

(904) 0x460324 ORR	X26, XZR, X15

(904) 0x460328 LDR	X25, [SP, #792]

(904) 0x46032c CBNZ	X18, 461818

(904) 0x460330 LDR	X0, [SP, #832]

(904) 0x460334 CMP	X0, #1

(904) 0x460338 B.LE	460344

(904) 0x46033c LDR	X4, [X20, X19,LSL #3]

(904) 0x460340 STR	X4, [X20, X23,LSL #3]

(904) 0x460344 LDR	X28, [SP, #264]

(904) 0x460348 MOVZ	W3, #0

(904) 0x46034c MOVZ	W2, #0

(904) 0x460350 LDP	X0, X24, [SP, #472]

(904) 0x460354 ADD	X19, X19, #1

(904) 0x460358 LDR	X18, [SP, #752]

(904) 0x46035c LDR	X15, [SP, #208]

(904) 0x460360 LDR	X11, [SP, #216]

(904) 0x460364 LDR	X10, [SP, #256]

(904) 0x460368 LDR	X16, [SP, #280]

(904) 0x46036c LDR	X9, [SP, #392]

(904) 0x460370 LDR	X6, [SP, #408]

(904) 0x460374 LDR	X8, [SP, #416]

(904) 0x460378 LDR	X17, [SP, #456]

(904) 0x46037c LDR	X30, [SP, #488]

(904) 0x460380 LDR	X7, [SP, #576]

(904) 0x460384 LDR	X14, [SP, #736]

(904) 0x460388 LDR	X4, [X18, X23,LSL #3]

(904) 0x46038c CMP	X7, X0

(904) 0x460390 CSINC	X13, X0, X7, #11

(904) 0x460394 STR	X13, [SP, #472]

(904) 0x460398 LDR	X12, [X28, X23,LSL #3]

(904) 0x46039c STR	X24, [SP, #848]

(904) 0x4603a0 LDR	X22, [SP, #184]

(904) 0x4603a4 STR	X14, [SP, #856]

(904) 0x4603a8 STR	X30, [SP, #864]

(904) 0x4603ac STR	X9, [SP, #872]

(904) 0x4603b0 SUB	X5, X4, X12

(904) 0x4603b4 ADD	X12, SP, #832

(904) 0x4603b8 STR	X10, [SP, #880]

(904) 0x4603bc STR	X11, [SP, #888]

(904) 0x4603c0 STR	X17, [SP, #896]

(904) 0x4603c4 STR	X16, [SP, #904]

(904) 0x4603c8 STR	X28, [SP, #912]

(904) 0x4603cc ADD	X28, SP, #1000

(904) 0x4603d0 STR	X6, [SP, #920]

(904) 0x4603d4 STR	X8, [SP, #928]

(904) 0x4603d8 STR	X15, [SP, #936]

(904) 0x4603dc LDR	X1, [SP, #296]

(904) 0x4603e0 STR	X22, [SP, #944]

(904) 0x4603e4 STR	X23, [SP, #976]

(904) 0x4603e8 ADD	X23, X23, #1

(904) 0x4603ec STP	X25, X26, [X28]

(904) 0x4603f0 STP	X7, X13, [X28, #32]

(904) 0x4603f4 LDR	X0, [SP, #464]

(904) 0x4603f8 STR	X5, [SP, #1048]

(904) 0x4603fc LDR	X7, [SP, #128]

(904) 0x460400 STR	X12, [SP, #1016]

(904) 0x460404 LDR	X24, [SP, #496]

(904) 0x460408 STR	X0, [SP, #960]

(904) 0x46040c LDR	X18, [SP, #560]

(904) 0x460410 STR	X7, [SP, #984]

(904) 0x460414 LDR	X5, [SP, #624]

(904) 0x460418 STR	X24, [SP, #992]

(904) 0x46041c LDR	X4, [SP, #640]

(904) 0x460420 STR	X18, [SP, #952]

(904) 0x460424 LDR	X13, [SP, #648]

(904) 0x460428 STR	X5, [SP, #968]

(904) 0x46042c LDR	X10, [SP, #656]

(904) 0x460430 STR	X4, [SP, #1056]

(904) 0x460434 LDR	X11, [SP, #696]

(904) 0x460438 STR	X13, [SP, #1064]

(904) 0x46043c LDR	X0, [SP, #784]

(904) 0x460440 STR	X10, [SP, #1072]

(904) 0x460444 STR	X11, [SP, #1024]

(904) 0x460448 BL	410bc0

(904) 0x46044c LDR	X3, [SP, #968]

(904) 0x460450 LDR	X2, [SP, #1024]

(904) 0x460454 LDR	X1, [SP, #328]

(904) 0x460458 STR	X3, [SP, #624]

(904) 0x46045c STR	X2, [SP, #696]

(904) 0x460460 CMP	X1, X23

(904) 0x460464 B.NE	45fc44

0x460468 LDR	X16, [SP, #384]

0x46046c ORR	X22, XZR, X25

0x460470 LDR	X24, [SP, #560]

0x460474 LDR	X25, [SP, #568]

0x460478 LDR	X7, [SP, #696]

0x46047c LDR	X6, [SP, #736]

0x460480 STR	X16, [SP, #120]

0x460484 MOVZ	X28, #0

0x460488 LDR	X0, [SP, #224]

0x46048c STR	X6, [SP, #136]

0x460490 STR	X7, [SP, #160]

0x460494 BL	546e20

0x460498 LDR	X0, [SP, #376]

0x46049c BL	546e20

0x4604a0 LDR	X0, [SP, #120]

0x4604a4 BL	546e20

0x4604a8 LDR	X0, [SP, #672]

0x4604ac BL	546e20

0x4604b0 LDR	X0, [SP, #648]

0x4604b4 BL	546e20

0x4604b8 LDR	X0, [SP, #656]

0x4604bc BL	546e20

0x4604c0 LDR	X0, [SP, #640]

0x4604c4 BL	546e20

0x4604c8 LDR	X21, [SP, #624]

0x4604cc MOVZ	X1, #8

0x4604d0 ORR	X0, XZR, X21

0x4604d4 BL	546d88

0x4604d8 ORR	X27, XZR, X0

0x4604dc MOVZ	X1, #8

0x4604e0 ORR	X0, XZR, X21

0x4604e4 STR	X27, [SP, #144]

0x4604e8 BL	546d88

0x4604ec LDR	X20, [SP, #160]

0x4604f0 ORR	X27, XZR, X0

0x4604f4 STR	XZR, [SP, #120]

0x4604f8 LDR	X6, [SP, #136]

0x4604fc CBNZ	X20, 4618d0

0x460500 LDR	X14, [SP, #312]

0x460504 CMP	X14, #0

0x460508 B.LE	460678

0x46050c LDR	X30, [SP, #760]

0x460510 MOVZ	X0, #8

0x460514 LDR	X23, [SP, #216]

0x460518 LDR	X17, [SP, #256]

0x46051c UBFM	X7, X30, #61, #60

0x460520 SUB	X16, X7, #16

0x460524 UBFM	X9, X16, #3, #63

0x460528 SUB	X2, X23, #8

0x46052c ADD	X8, X9, #1

0x460530 ANDS	X15, X8, #4160

0x460534 SUB	X3, X17, #8

0x460538 B.EQ	462da4

0x46053c CMP	X15, #1

0x460540 B.EQ	4605a4

0x460544 CMP	X15, #2

0x460548 B.EQ	460578

0x46054c LDR	X4, [SP, #256]

0x460550 MOVZ	X0, #16

0x460554 LDR	X18, [X3, #8]

0x460558 LDR	X5, [SP, #216]

0x46055c LDR	X13, [X4, #8]

0x460560 ADD	X12, X13, X18

0x460564 STR	X12, [X4, #8]

0x460568 LDR	X10, [X2, #8]

0x46056c LDR	X11, [X5, #8]

0x460570 ADD	X1, X11, X10

0x460574 STR	X1, [X5, #8]

0x460578 LDR	X20, [SP, #256]

0x46057c LDR	X21, [X3, X0]

0x460580 LDR	X30, [SP, #216]

0x460584 LDR	X19, [X20, X0]

0x460588 ADD	X14, X19, X21

0x46058c STR	X14, [X20, X0]

0x460590 LDR	X17, [X2, X0]

0x460594 LDR	X16, [X30, X0]

0x460598 ADD	X9, X16, X17

0x46059c STR	X9, [X30, X0]

0x4605a0 ADD	X0, X0, #8

0x4605a4 LDR	X15, [SP, #256]

0x4605a8 LDR	X8, [X3, X0]

0x4605ac LDR	X13, [SP, #216]

0x4605b0 LDR	X23, [X15, X0]

0x4605b4 ADD	X18, X23, X8

0x4605b8 STR	X18, [X15, X0]

0x4605bc LDR	X4, [X2, X0]

0x4605c0 LDR	X12, [X13, X0]

0x4605c4 ADD	X10, X12, X4

0x4605c8 STR	X10, [X13, X0]

0x4605cc ADD	X0, X0, #8

0x4605d0 CMP	X0, X7

0x4605d4 B.EQ	460678

0x4605d8 LDR	X1, [SP, #256]

0x4605dc ORR	X21, XZR, X13

(924) 0x4605e0 ADD	X5, X0, #8

(924) 0x4605e4 ADD	X14, X0, #16

(924) 0x4605e8 LDR	X20, [X1, X0]

(924) 0x4605ec ADD	X19, X0, #24

(924) 0x4605f0 LDR	X11, [X3, X0]

(924) 0x4605f4 ADD	X17, X20, X11

(924) 0x4605f8 STR	X17, [X1, X0]

(924) 0x4605fc LDR	X30, [X21, X0]

(924) 0x460600 LDR	X16, [X2, X0]

(924) 0x460604 ADD	X9, X30, X16

(924) 0x460608 STR	X9, [X21, X0]

(924) 0x46060c ADD	X0, X0, #32

(924) 0x460610 LDR	X8, [X1, X5]

(924) 0x460614 LDR	X15, [X3, X5]

(924) 0x460618 ADD	X23, X8, X15

(924) 0x46061c STR	X23, [X1, X5]

(924) 0x460620 LDR	X18, [X21, X5]

(924) 0x460624 LDR	X4, [X2, X5]

(924) 0x460628 ADD	X13, X18, X4

(924) 0x46062c STR	X13, [X21, X5]

(924) 0x460630 LDR	X12, [X1, X14]

(924) 0x460634 LDR	X10, [X3, X14]

(924) 0x460638 ADD	X20, X12, X10

(924) 0x46063c STR	X20, [X1, X14]

(924) 0x460640 LDR	X5, [X21, X14]

(924) 0x460644 LDR	X11, [X2, X14]

(924) 0x460648 ADD	X17, X5, X11

(924) 0x46064c STR	X17, [X21, X14]

(924) 0x460650 LDR	X14, [X1, X19]

(924) 0x460654 LDR	X30, [X3, X19]

(924) 0x460658 ADD	X16, X14, X30

(924) 0x46065c STR	X16, [X1, X19]

(924) 0x460660 LDR	X8, [X21, X19]

(924) 0x460664 LDR	X9, [X2, X19]

(924) 0x460668 ADD	X15, X8, X9

(924) 0x46066c STR	X15, [X21, X19]

(924) 0x460670 CMP	X0, X7

(924) 0x460674 B.NE	4605e0

0x460678 LDR	X19, [SP, #128]

0x46067c ADRP	X0,

0x460680 MOVZ	W3, #0

0x460684 STR	X6, [SP, #136]

0x460688 MOVZ	W2, #0

0x46068c ADD	X0, X0, #3216

0x460690 LDR	X7, [SP, #144]

0x460694 STR	X27, [SP, #848]

0x460698 LDR	X23, [SP, #248]

0x46069c STR	X19, [SP, #880]

0x4606a0 LDR	X21, [SP, #256]

0x4606a4 STR	X7, [SP, #864]

0x4606a8 LDR	X6, [SP, #360]

0x4606ac STR	X23, [SP, #888]

0x4606b0 LDR	X1, [SP, #296]

0x4606b4 STR	X21, [SP, #856]

0x4606b8 STR	X6, [SP, #872]

0x4606bc BL	410bc0

0x4606c0 LDR	X2, [SP, #264]

0x4606c4 LDR	X12, [SP, #1184]

0x4606c8 LDR	X18, [SP, #136]

0x4606cc ADD	X3, X2, #8

0x4606d0 LDP	X1, X4, [X3]

0x4606d4 SUB	X13, X4, X1

0x4606d8 CBZ	X12, 461964

0x4606dc LDR	X5, [SP, #144]

0x4606e0 ADRP	X20,

0x4606e4 MOVZ	W2, #0

0x4606e8 STR	X18, [SP, #136]

0x4606ec ADD	X0, X20, #3584

0x4606f0 MOVZ	W3, #0

0x4606f4 LDR	X9, [SP, #192]

0x4606f8 STR	X27, [SP, #936]

0x4606fc LDR	X6, [SP, #216]

0x460700 STR	X5, [SP, #952]

0x460704 LDR	X7, [SP, #256]

0x460708 STR	X9, [SP, #928]

0x46070c LDR	X23, [SP, #320]

0x460710 STR	X28, [SP, #960]

0x460714 LDR	X18, [SP, #432]

0x460718 STR	X7, [SP, #944]

0x46071c LDR	X16, [SP, #440]

0x460720 STR	X23, [SP, #848]

0x460724 LDR	X12, [SP, #448]

0x460728 STR	X18, [SP, #856]

0x46072c LDR	X11, [SP, #584]

0x460730 STR	X16, [SP, #904]

0x460734 LDR	X17, [SP, #592]

0x460738 STR	X12, [SP, #920]

0x46073c LDR	X15, [SP, #600]

0x460740 STR	X11, [SP, #864]

0x460744 LDR	X30, [SP, #608]

0x460748 STR	X17, [SP, #880]

0x46074c LDR	X10, [SP, #616]

0x460750 STR	X15, [SP, #888]

0x460754 LDR	X4, [SP, #1192]

0x460758 STR	X30, [SP, #896]

0x46075c LDR	X1, [SP, #296]

0x460760 STR	X10, [SP, #912]

0x460764 STR	X6, [SP, #968]

0x460768 STR	X4, [SP, #872]

0x46076c LDR	X8, [SP, #120]

0x460770 STR	X13, [SP, #1096]

0x460774 LDR	X17, [SP, #184]

0x460778 LDR	X4, [SP, #208]

0x46077c STR	X8, [SP, #976]

0x460780 LDR	X10, [SP, #248]

0x460784 STR	X17, [SP, #1056]

0x460788 LDR	X23, [SP, #264]

0x46078c STR	X4, [SP, #1048]

0x460790 LDR	X30, [SP, #272]

0x460794 STR	X10, [SP, #1088]

0x460798 LDR	X20, [SP, #280]

0x46079c STR	X23, [SP, #1024]

0x4607a0 LDR	X16, [SP, #312]

0x4607a4 STR	X30, [SP, #1072]

0x4607a8 LDR	X13, [SP, #352]

0x4607ac STR	X20, [SP, #1016]

0x4607b0 LDR	X21, [SP, #360]

0x4607b4 STR	X16, [SP, #1080]

0x4607b8 LDR	X11, [SP, #408]

0x4607bc STR	X13, [SP, #984]

0x4607c0 LDR	X18, [SP, #416]

0x4607c4 STR	X21, [SP, #1000]

0x4607c8 LDR	X19, [SP, #424]

0x4607cc STR	X11, [SP, #1032]

0x4607d0 LDR	X14, [SP, #512]

0x4607d4 STR	X18, [SP, #1040]

0x4607d8 LDR	X15, [SP, #536]

0x4607dc STR	X19, [SP, #992]

0x4607e0 STR	X14, [SP, #1008]

0x4607e4 STR	X15, [SP, #1064]

0x4607e8 BL	410bc0

0x4607ec LDP	X2, X1, [SP, #128]

0x4607f0 CBNZ	X2, 462f6c

0x4607f4 STR	X1, [SP, #136]

0x4607f8 LDR	X0, [SP, #512]

0x4607fc BL	546e20

0x460800 LDR	X19, [SP, #208]

0x460804 LDR	X0, [X19, #8]

0x460808 BL	546e20

0x46080c LDR	X3, [SP, #832]

0x460810 STR	XZR, [X19, #8]

0x460814 LDR	X9, [SP, #136]

0x460818 CMP	X3, #1

0x46081c B.LE	460834

0x460820 LDR	X21, [SP, #184]

0x460824 LDR	X0, [X21, #8]

0x460828 BL	546e20

0x46082c LDR	X9, [SP, #136]

0x460830 STR	XZR, [X21, #8]

0x460834 LDR	X7, [SP, #328]

0x460838 CMP	X7, #2

0x46083c B.EQ	462f60

0x460840 LDR	X8, [SP, #152]

0x460844 ADRP	X5,

0x460848 MOVZ	X23, #0

0x46084c ADD	X6, X5, #1856

0x460850 MOVZ	X20, #2

0x460854 STR	XZR, [SP, #136]

0x460858 LDR	X14, [SP, #176]

0x46085c MOVZ	X21, #1

0x460860 STR	XZR, [SP, #160]

0x460864 LDR	X17, [SP, #200]

0x460868 UBFM	X13, X8, #61, #60

0x46086c STR	X26, [SP, #224]

0x460870 ORR	X26, XZR, X23

0x460874 LDR	X18, [SP, #264]

0x460878 UBFM	X11, X14, #61, #60

0x46087c STR	X13, [SP, #232]

0x460880 LDR	X19, [SP, #256]

0x460884 ADD	X15, X17, #8

0x460888 STR	X11, [SP, #240]

0x46088c STR	X6, [SP, #288]

0x460890 ADD	X4, X18, #8

0x460894 STR	X15, [SP, #344]

0x460898 STR	X9, [SP, #376]

0x46089c STR	X4, [SP, #360]

0x4608a0 B	460a44

(917) 0x4608a4 LDR	X30, [SP, #264]

(917) 0x4608a8 ADD	X6, SP, #968

(917) 0x4608ac MOVZ	W3, #0

(917) 0x4608b0 LDP	X0, X1, [SP, #288]

(917) 0x4608b4 MOVZ	W2, #0

(917) 0x4608b8 LDR	X16, [SP, #360]

(917) 0x4608bc LDR	X10, [SP, #488]

(917) 0x4608c0 LDR	X5, [SP, #144]

(917) 0x4608c4 LDR	X7, [X30, X20,LSL #3]

(917) 0x4608c8 LDR	X12, [X16, X20,LSL #3]

(917) 0x4608cc STR	X10, [SP, #944]

(917) 0x4608d0 STP	X27, X19, [X6]

(917) 0x4608d4 STP	X5, X28, [X6, #16]

(917) 0x4608d8 SUB	X8, X12, X7

(917) 0x4608dc LDR	X18, [SP, #120]

(917) 0x4608e0 STR	X30, [SP, #1048]

(917) 0x4608e4 LDR	X11, [SP, #192]

(917) 0x4608e8 LDR	X9, [SP, #216]

(917) 0x4608ec STR	X18, [SP, #1008]

(917) 0x4608f0 LDR	X13, [SP, #280]

(917) 0x4608f4 STR	X11, [SP, #960]

(917) 0x4608f8 LDR	X17, [SP, #352]

(917) 0x4608fc STR	X9, [SP, #1000]

(917) 0x460900 LDR	X14, [SP, #392]

(917) 0x460904 STR	X13, [SP, #1040]

(917) 0x460908 LDR	X30, [SP, #408]

(917) 0x46090c STR	X17, [SP, #1024]

(917) 0x460910 LDR	X15, [SP, #424]

(917) 0x460914 STR	X14, [SP, #952]

(917) 0x460918 LDR	X4, [SP, #456]

(917) 0x46091c STR	X30, [SP, #1056]

(917) 0x460920 LDR	X16, [SP, #416]

(917) 0x460924 STR	X15, [SP, #1032]

(917) 0x460928 LDR	X10, [SP, #464]

(917) 0x46092c STR	X4, [SP, #1016]

(917) 0x460930 LDR	X12, [SP, #184]

(917) 0x460934 LDP	X6, X9, [SP, #312]

(917) 0x460938 STR	X8, [SP, #1176]

(917) 0x46093c LDR	X14, [SP, #128]

(917) 0x460940 STR	X9, [SP, #848]

(917) 0x460944 LDR	X17, [SP, #136]

(917) 0x460948 STR	X16, [SP, #1064]

(917) 0x46094c LDR	X8, [SP, #208]

(917) 0x460950 STR	X12, [SP, #1080]

(917) 0x460954 LDR	X4, [SP, #224]

(917) 0x460958 STR	X24, [SP, #1088]

(917) 0x46095c LDR	X7, [SP, #272]

(917) 0x460960 STR	X8, [SP, #1072]

(917) 0x460964 LDR	X5, [SP, #376]

(917) 0x460968 STR	X10, [SP, #1096]

(917) 0x46096c LDR	X18, [SP, #432]

(917) 0x460970 STR	X7, [SP, #1104]

(917) 0x460974 LDR	X15, [SP, #472]

(917) 0x460978 STR	X5, [SP, #936]

(917) 0x46097c LDR	X11, [SP, #496]

(917) 0x460980 STR	X18, [SP, #856]

(917) 0x460984 LDR	X13, [SP, #584]

(917) 0x460988 STR	X20, [SP, #1112]

(917) 0x46098c STR	X6, [SP, #1120]

(917) 0x460990 STR	X14, [SP, #1128]

(917) 0x460994 STR	X11, [SP, #1136]

(917) 0x460998 STR	X13, [SP, #864]

(917) 0x46099c STR	X22, [SP, #1144]

(917) 0x4609a0 STR	X4, [SP, #1152]

(917) 0x4609a4 STR	X17, [SP, #1160]

(917) 0x4609a8 STR	X15, [SP, #1168]

(917) 0x4609ac LDR	X30, [SP, #1192]

(917) 0x4609b0 LDR	X8, [SP, #440]

(917) 0x4609b4 LDR	X5, [SP, #448]

(917) 0x4609b8 STR	X30, [SP, #872]

(917) 0x4609bc LDR	X6, [SP, #480]

(917) 0x4609c0 STR	X8, [SP, #904]

(917) 0x4609c4 LDR	X16, [SP, #592]

(917) 0x4609c8 STR	X5, [SP, #920]

(917) 0x4609cc LDR	X10, [SP, #600]

(917) 0x4609d0 STR	X6, [SP, #928]

(917) 0x4609d4 LDR	X12, [SP, #608]

(917) 0x4609d8 STR	X16, [SP, #880]

(917) 0x4609dc LDR	X7, [SP, #616]

(917) 0x4609e0 STR	X10, [SP, #888]

(917) 0x4609e4 STR	X12, [SP, #896]

(917) 0x4609e8 STR	X7, [SP, #912]

(917) 0x4609ec BL	410bc0

(917) 0x4609f0 LDR	X2, [SP, #208]

(917) 0x4609f4 LDR	X0, [X2, X20,LSL #3]

(917) 0x4609f8 BL	546e20

(917) 0x4609fc LDR	X1, [SP, #208]

(917) 0x460a00 LDR	X3, [SP, #832]

(917) 0x460a04 STR	XZR, [X1, X20,LSL #3]

(917) 0x460a08 CMP	X3, #1

(917) 0x460a0c B.LE	460a30

(917) 0x460a10 LDR	X0, [SP, #184]

(917) 0x460a14 LDR	X0, [X0, X20,LSL #3]

(917) 0x460a18 BL	546e20

(917) 0x460a1c LDR	X9, [SP, #184]

(917) 0x460a20 STR	XZR, [X9, X20,LSL #3]

(917) 0x460a24 LDR	X0, [X24, X20,LSL #3]

(917) 0x460a28 BL	546e20

(917) 0x460a2c STR	XZR, [X24, X20,LSL #3]

(917) 0x460a30 LDR	X14, [SP, #328]

(917) 0x460a34 ADD	X20, X20, #1

(917) 0x460a38 ADD	X21, X21, #1

(917) 0x460a3c CMP	X14, X20

(917) 0x460a40 B.EQ	4624f4

(917) 0x460a44 LDR	X30, [SP, #832]

(917) 0x460a48 CMP	X30, #1

(917) 0x460a4c B.LE	4608a4

(917) 0x460a50 LDR	X16, [SP, #304]

(917) 0x460a54 LDR	X10, [SP, #232]

(917) 0x460a58 LDR	X1, [X16, X20,LSL #3]

(917) 0x460a5c LDR	X2, [X1, X10]

(917) 0x460a60 STR	X2, [SP, #168]

(917) 0x460a64 CMP	X2, X23

(917) 0x460a68 B.GT	461924

(917) 0x460a6c LDR	X3, [SP, #152]

(917) 0x460a70 MOVZ	X5, #0

(917) 0x460a74 MOVZ	X2, #0

(917) 0x460a78 CMP	X3, #0

(917) 0x460a7c B.LE	460f30

(917) 0x460a80 LDR	X9, [SP, #216]

  (918) 0x460a84 LDR	X0, [SP, #200]

  (918) 0x460a88 LDR	X12, [SP, #344]

  (918) 0x460a8c LDR	X6, [X0, X2,LSL #3]

  (918) 0x460a90 LDR	X8, [X12, X2,LSL #3]

  (918) 0x460a94 CMP	X6, X8

  (918) 0x460a98 B.LT	460aac

  (918) 0x460a9c B	460f20

    (919) 0x460aa0 ADD	X6, X6, #1

    (919) 0x460aa4 CMP	X6, X8

    (919) 0x460aa8 B.EQ	460f20

    (919) 0x460aac LDR	X7, [X25, X6,LSL #3]

    (919) 0x460ab0 UBFM	X0, X7, #61, #60

    (919) 0x460ab4 LDR	X13, [X22, X0]

    (919) 0x460ab8 CMP	X13, X21

    (919) 0x460abc B.NE	460aa0

    (919) 0x460ac0 ADD	X15, X0, #8

    (919) 0x460ac4 LDR	X4, [X19, X0]

    (919) 0x460ac8 LDR	X11, [X19, X15]

    (919) 0x460acc CMP	X4, X11

    (919) 0x460ad0 B.GE	460cec

    (919) 0x460ad4 SUB	X16, X11, X4

    (919) 0x460ad8 UBFM	X30, X5, #61, #60

    (919) 0x460adc ADD	X3, X4, #1

    (919) 0x460ae0 CMP	X16, #1

    (919) 0x460ae4 B.EQ	4616e4

    (919) 0x460ae8 ADD	X3, X4, #1

    (919) 0x460aec ADD	X10, X26, X5,LSL #3

    (919) 0x460af0 UBFM	X30, X5, #61, #60

    (919) 0x460af4 ADD	X14, X27, X3,LSL #3

    (919) 0x460af8 UBFM	X18, X3, #61, #60

    (919) 0x460afc SUB	X17, X10, X14

    (919) 0x460b00 CMP	X17, #16

    (919) 0x460b04 B.LS	4616e4

    (919) 0x460b08 SUB	X23, X16, #1

    (919) 0x460b0c CMP	X23, #2

    (919) 0x460b10 B.LS	461808

    (919) 0x460b14 UBFM	X12, X16, #2, #63

    (919) 0x460b18 SUB	X7, X18, #8

    (919) 0x460b1c UBFM	X17, X12, #59, #58

    (919) 0x460b20 ADD	X11, X27, X7

    (919) 0x460b24 SUB	X14, X17, #32

    (919) 0x460b28 MOVZ	X3, #0

    (919) 0x460b2c UBFM	X18, X14, #5, #63

    (919) 0x460b30 ADD	X13, X11, #16

    (919) 0x460b34 ADD	X23, X18, #1

    (919) 0x460b38 ADD	X12, X10, #16

    (919) 0x460b3c ANDS	X14, X23, #4224

    (919) 0x460b40 B.EQ	460c08

    (919) 0x460b44 CMP	X14, #1

    (919) 0x460b48 B.EQ	460bec

    (919) 0x460b4c CMP	X14, #2

    (919) 0x460b50 B.EQ	460bd8

    (919) 0x460b54 CMP	X14, #3

    (919) 0x460b58 B.EQ	460bc4

    (919) 0x460b5c CMP	X14, #4

    (919) 0x460b60 B.EQ	460bb0

    (919) 0x460b64 CMP	X14, #5

    (919) 0x460b68 B.EQ	460b9c

    (919) 0x460b6c CMP	X14, #6

    (919) 0x460b70 B.EQ	460b88

    (919) 0x460b74 LDR	Q20, [X27, X7]

    (919) 0x460b78 MOVZ	X3, #32

    (919) 0x460b7c LDR	Q21, [X11, #16]

    (919) 0x460b80 STR	Q20, [X26, X30]

    (919) 0x460b84 STR	Q21, [X10, #16]

    (919) 0x460b88 LDR	Q22, [X11, X3]

    (919) 0x460b8c LDR	Q1, [X13, X3]

    (919) 0x460b90 STR	Q22, [X10, X3]

    (919) 0x460b94 STR	Q1, [X12, X3]

    (919) 0x460b98 ADD	X3, X3, #32

    (919) 0x460b9c LDR	Q24, [X11, X3]

    (919) 0x460ba0 LDR	Q23, [X13, X3]

    (919) 0x460ba4 STR	Q24, [X10, X3]

    (919) 0x460ba8 STR	Q23, [X12, X3]

    (919) 0x460bac ADD	X3, X3, #32

    (919) 0x460bb0 LDR	Q26, [X11, X3]

    (919) 0x460bb4 LDR	Q25, [X13, X3]

    (919) 0x460bb8 STR	Q26, [X10, X3]

    (919) 0x460bbc STR	Q25, [X12, X3]

    (919) 0x460bc0 ADD	X3, X3, #32

    (919) 0x460bc4 LDR	Q28, [X11, X3]

    (919) 0x460bc8 LDR	Q27, [X13, X3]

    (919) 0x460bcc STR	Q28, [X10, X3]

    (919) 0x460bd0 STR	Q27, [X12, X3]

    (919) 0x460bd4 ADD	X3, X3, #32

    (919) 0x460bd8 LDR	Q0, [X11, X3]

    (919) 0x460bdc LDR	Q31, [X13, X3]

    (919) 0x460be0 STR	Q0, [X10, X3]

    (919) 0x460be4 STR	Q31, [X12, X3]

    (919) 0x460be8 ADD	X3, X3, #32

    (919) 0x460bec LDR	Q30, [X11, X3]

    (919) 0x460bf0 LDR	Q2, [X13, X3]

    (919) 0x460bf4 STR	Q30, [X10, X3]

    (919) 0x460bf8 STR	Q2, [X12, X3]

    (919) 0x460bfc ADD	X3, X3, #32

    (919) 0x460c00 CMP	X3, X17

    (919) 0x460c04 B.EQ	460cb0

      (923) 0x460c08 LDR	Q4, [X11, X3]

      (923) 0x460c0c ADD	X7, X3, #32

      (923) 0x460c10 ADD	X30, X3, #64

      (923) 0x460c14 ADD	X23, X3, #96

      (923) 0x460c18 ADD	X18, X3, #128

      (923) 0x460c1c LDR	Q3, [X13, X3]

      (923) 0x460c20 ADD	X14, X3, #160

      (923) 0x460c24 STR	Q4, [X10, X3]

      (923) 0x460c28 STR	Q3, [X12, X3]

      (923) 0x460c2c LDR	Q5, [X11, X7]

      (923) 0x460c30 LDR	Q29, [X13, X7]

      (923) 0x460c34 STR	Q5, [X10, X7]

      (923) 0x460c38 STR	Q29, [X12, X7]

      (923) 0x460c3c ADD	X7, X3, #192

      (923) 0x460c40 LDR	Q7, [X11, X30]

      (923) 0x460c44 LDR	Q6, [X13, X30]

      (923) 0x460c48 STR	Q7, [X10, X30]

      (923) 0x460c4c STR	Q6, [X12, X30]

      (923) 0x460c50 ADD	X30, X3, #224

      (923) 0x460c54 ADD	X3, X3, #256

      (923) 0x460c58 LDR	Q17, [X11, X23]

      (923) 0x460c5c LDR	Q16, [X13, X23]

      (923) 0x460c60 STR	Q17, [X10, X23]

      (923) 0x460c64 STR	Q16, [X12, X23]

      (923) 0x460c68 LDR	Q19, [X11, X18]

      (923) 0x460c6c LDR	Q18, [X13, X18]

      (923) 0x460c70 STR	Q19, [X10, X18]

      (923) 0x460c74 STR	Q18, [X12, X18]

      (923) 0x460c78 LDR	Q21, [X11, X14]

      (923) 0x460c7c LDR	Q20, [X13, X14]

      (923) 0x460c80 STR	Q21, [X10, X14]

      (923) 0x460c84 STR	Q20, [X12, X14]

      (923) 0x460c88 LDR	Q22, [X11, X7]

      (923) 0x460c8c LDR	Q1, [X13, X7]

      (923) 0x460c90 STR	Q22, [X10, X7]

      (923) 0x460c94 STR	Q1, [X12, X7]

      (923) 0x460c98 LDR	Q24, [X11, X30]

      (923) 0x460c9c LDR	Q23, [X13, X30]

      (923) 0x460ca0 STR	Q24, [X10, X30]

      (923) 0x460ca4 STR	Q23, [X12, X30]

      (923) 0x460ca8 CMP	X3, X17

      (923) 0x460cac B.NE	460c08

    (919) 0x460cb0 AND	X3, X16, #8062

    (919) 0x460cb4 ANDS	XZR, X16, #4160

    (919) 0x460cb8 B.EQ	460ce8

    (919) 0x460cbc ADD	X10, X3, X5

    (919) 0x460cc0 ADD	X4, X3, X4

    (919) 0x460cc4 SUB	X17, X16, X3

    (919) 0x460cc8 ADD	X11, X26, X10,LSL #3

    (919) 0x460ccc WHILELO	P3.D, XZR, X17

    (919) 0x460cd0 LD1D	{Z25.D}, P3/Z, [X27, X4,LSL #3]

    (919) 0x460cd4 ST1D	{Z25.D}, P3, [X11, MUL VL]

    (919) 0x460cd8 MOVZ	X12, #2

    (919) 0x460cdc ADD	X13, X27, X4,LSL #3

    (919) 0x460ce0 WHILELO	P4.D, X12, X17

    (919) 0x460ce4 B.NE	4615a0

    (919) 0x460ce8 ADD	X5, X5, X16

    (919) 0x460cec LDR	X3, [X9, X0]

    (919) 0x460cf0 LDR	X18, [X9, X15]

    (919) 0x460cf4 CMP	X3, X18

    (919) 0x460cf8 B.GE	460aa0

    (919) 0x460cfc SUB	X14, X18, X3

    (919) 0x460d00 UBFM	X4, X5, #61, #60

    (919) 0x460d04 ADD	X0, X3, #1

    (919) 0x460d08 CMP	X14, #1

    (919) 0x460d0c B.EQ	4615bc

    (919) 0x460d10 ADD	X0, X3, #1

    (919) 0x460d14 ADD	X7, X26, X5,LSL #3

    (919) 0x460d18 UBFM	X4, X5, #61, #60

    (919) 0x460d1c ADD	X15, X28, X0,LSL #3

    (919) 0x460d20 UBFM	X16, X0, #61, #60

    (919) 0x460d24 SUB	X11, X7, X15

    (919) 0x460d28 CMP	X11, #16

    (919) 0x460d2c B.LS	4615bc

    (919) 0x460d30 SUB	X0, X14, #1

    (919) 0x460d34 CMP	X0, #2

    (919) 0x460d38 B.LS	461810

    (919) 0x460d3c UBFM	X17, X14, #2, #63

    (919) 0x460d40 SUB	X23, X16, #8

    (919) 0x460d44 UBFM	X15, X17, #59, #58

    (919) 0x460d48 ADD	X10, X28, X23

    (919) 0x460d4c SUB	X13, X15, #32

    (919) 0x460d50 MOVZ	X0, #0

    (919) 0x460d54 UBFM	X18, X13, #5, #63

    (919) 0x460d58 ADD	X12, X10, #16

    (919) 0x460d5c ADD	X16, X18, #1

    (919) 0x460d60 ADD	X11, X7, #16

    (919) 0x460d64 ANDS	X30, X16, #4224

    (919) 0x460d68 B.EQ	460e30

    (919) 0x460d6c CMP	X30, #1

    (919) 0x460d70 B.EQ	460e14

    (919) 0x460d74 CMP	X30, #2

    (919) 0x460d78 B.EQ	460e00

    (919) 0x460d7c CMP	X30, #3

    (919) 0x460d80 B.EQ	460dec

    (919) 0x460d84 CMP	X30, #4

    (919) 0x460d88 B.EQ	460dd8

    (919) 0x460d8c CMP	X30, #5

    (919) 0x460d90 B.EQ	460dc4

    (919) 0x460d94 CMP	X30, #6

    (919) 0x460d98 B.EQ	460db0

    (919) 0x460d9c LDR	Q29, [X28, X23]

    (919) 0x460da0 MOVZ	X0, #32

    (919) 0x460da4 LDR	Q5, [X10, #16]

    (919) 0x460da8 STR	Q29, [X26, X4]

    (919) 0x460dac STR	Q5, [X7, #16]

    (919) 0x460db0 LDR	Q7, [X10, X0]

    (919) 0x460db4 LDR	Q6, [X12, X0]

    (919) 0x460db8 STR	Q7, [X7, X0]

    (919) 0x460dbc STR	Q6, [X11, X0]

    (919) 0x460dc0 ADD	X0, X0, #32

    (919) 0x460dc4 LDR	Q17, [X10, X0]

    (919) 0x460dc8 LDR	Q16, [X12, X0]

    (919) 0x460dcc STR	Q17, [X7, X0]

    (919) 0x460dd0 STR	Q16, [X11, X0]

    (919) 0x460dd4 ADD	X0, X0, #32

    (919) 0x460dd8 LDR	Q19, [X10, X0]

    (919) 0x460ddc LDR	Q18, [X12, X0]

    (919) 0x460de0 STR	Q19, [X7, X0]

    (919) 0x460de4 STR	Q18, [X11, X0]

    (919) 0x460de8 ADD	X0, X0, #32

    (919) 0x460dec LDR	Q21, [X10, X0]

    (919) 0x460df0 LDR	Q20, [X12, X0]

    (919) 0x460df4 STR	Q21, [X7, X0]

    (919) 0x460df8 STR	Q20, [X11, X0]

    (919) 0x460dfc ADD	X0, X0, #32

    (919) 0x460e00 LDR	Q22, [X10, X0]

    (919) 0x460e04 LDR	Q1, [X12, X0]

    (919) 0x460e08 STR	Q22, [X7, X0]

    (919) 0x460e0c STR	Q1, [X11, X0]

    (919) 0x460e10 ADD	X0, X0, #32

    (919) 0x460e14 LDR	Q24, [X10, X0]

    (919) 0x460e18 LDR	Q23, [X12, X0]

    (919) 0x460e1c STR	Q24, [X7, X0]

    (919) 0x460e20 STR	Q23, [X11, X0]

    (919) 0x460e24 ADD	X0, X0, #32

    (919) 0x460e28 CMP	X15, X0

    (919) 0x460e2c B.EQ	460ed8

      (921) 0x460e30 LDR	Q26, [X10, X0]

      (921) 0x460e34 ADD	X4, X0, #32

      (921) 0x460e38 ADD	X23, X0, #64

      (921) 0x460e3c ADD	X18, X0, #96

      (921) 0x460e40 ADD	X17, X0, #128

      (921) 0x460e44 LDR	Q25, [X12, X0]

      (921) 0x460e48 ADD	X16, X0, #160

      (921) 0x460e4c ADD	X13, X0, #192

      (921) 0x460e50 ADD	X30, X0, #224

      (921) 0x460e54 STR	Q26, [X7, X0]

      (921) 0x460e58 STR	Q25, [X11, X0]

      (921) 0x460e5c ADD	X0, X0, #256

      (921) 0x460e60 LDR	Q28, [X10, X4]

      (921) 0x460e64 LDR	Q27, [X12, X4]

      (921) 0x460e68 STR	Q28, [X7, X4]

      (921) 0x460e6c STR	Q27, [X11, X4]

      (921) 0x460e70 LDR	Q0, [X10, X23]

      (921) 0x460e74 LDR	Q31, [X12, X23]

      (921) 0x460e78 STR	Q0, [X7, X23]

      (921) 0x460e7c STR	Q31, [X11, X23]

      (921) 0x460e80 LDR	Q30, [X10, X18]

      (921) 0x460e84 LDR	Q2, [X12, X18]

      (921) 0x460e88 STR	Q30, [X7, X18]

      (921) 0x460e8c STR	Q2, [X11, X18]

      (921) 0x460e90 LDR	Q4, [X10, X17]

      (921) 0x460e94 LDR	Q3, [X12, X17]

      (921) 0x460e98 STR	Q4, [X7, X17]

      (921) 0x460e9c STR	Q3, [X11, X17]

      (921) 0x460ea0 LDR	Q5, [X10, X16]

      (921) 0x460ea4 LDR	Q29, [X12, X16]

      (921) 0x460ea8 STR	Q5, [X7, X16]

      (921) 0x460eac STR	Q29, [X11, X16]

      (921) 0x460eb0 LDR	Q7, [X10, X13]

      (921) 0x460eb4 LDR	Q6, [X12, X13]

      (921) 0x460eb8 STR	Q7, [X7, X13]

      (921) 0x460ebc STR	Q6, [X11, X13]

      (921) 0x460ec0 LDR	Q17, [X10, X30]

      (921) 0x460ec4 LDR	Q16, [X12, X30]

      (921) 0x460ec8 STR	Q17, [X7, X30]

      (921) 0x460ecc STR	Q16, [X11, X30]

      (921) 0x460ed0 CMP	X15, X0

      (921) 0x460ed4 B.NE	460e30

    (919) 0x460ed8 AND	X30, X14, #8062

    (919) 0x460edc ANDS	XZR, X14, #4160

    (919) 0x460ee0 B.EQ	460f10

    (919) 0x460ee4 ADD	X7, X30, X5

    (919) 0x460ee8 ADD	X3, X30, X3

    (919) 0x460eec SUB	X15, X14, X30

    (919) 0x460ef0 ADD	X10, X26, X7,LSL #3

    (919) 0x460ef4 WHILELO	P5.D, XZR, X15

    (919) 0x460ef8 LD1D	{Z18.D}, P5/Z, [X28, X3,LSL #3]

    (919) 0x460efc ST1D	{Z18.D}, P5, [X10, MUL VL]

    (919) 0x460f00 MOVZ	X11, #2

    (919) 0x460f04 ADD	X12, X28, X3,LSL #3

    (919) 0x460f08 WHILELO	P6.D, X11, X15

    (919) 0x460f0c B.NE	4615ac

    (919) 0x460f10 ADD	X5, X5, X14

    (919) 0x460f14 ADD	X6, X6, #1

    (919) 0x460f18 CMP	X6, X8

    (919) 0x460f1c B.NE	460aac

  (918) 0x460f20 LDR	X8, [SP, #152]

  (918) 0x460f24 ADD	X2, X2, #1

  (918) 0x460f28 CMP	X8, X2

  (918) 0x460f2c B.NE	460a84

(917) 0x460f30 LDR	X9, [SP, #336]

(917) 0x460f34 LDR	X14, [SP, #368]

(917) 0x460f38 LDR	X11, [SP, #152]

(917) 0x460f3c LDR	X4, [SP, #176]

(917) 0x460f40 STR	X1, [X14, #24]

(917) 0x460f44 LDR	X18, [X9, X20,LSL #3]

(917) 0x460f48 STR	X11, [X14, #8]

(917) 0x460f4c LDR	X23, [SP, #240]

(917) 0x460f50 STR	X4, [X14, #40]

(917) 0x460f54 LDR	X17, [SP, #160]

(917) 0x460f58 LDR	X23, [X18, X23]

(917) 0x460f5c STR	X18, [X14, #56]

(917) 0x460f60 CMP	X23, X17

(917) 0x460f64 B.GT	461948

(917) 0x460f68 LDR	X3, [SP, #136]

(917) 0x460f6c ORR	X2, XZR, X26

(917) 0x460f70 MOVZ	X0, #1

(917) 0x460f74 LDR	X1, [SP, #368]

(917) 0x460f78 BL	4fd0a4

(917) 0x460f7c BL	4fd8ac

(917) 0x460f80 LDR	X3, [SP, #304]

(917) 0x460f84 LDR	X0, [X3, X20,LSL #3]

(917) 0x460f88 BL	546e20

(917) 0x460f8c LDR	X0, [SP, #304]

(917) 0x460f90 LDR	X15, [SP, #336]

(917) 0x460f94 STR	XZR, [X0, X20,LSL #3]

(917) 0x460f98 LDR	X0, [X15, X20,LSL #3]

(917) 0x460f9c BL	546e20

(917) 0x460fa0 LDR	X13, [SP, #336]

(917) 0x460fa4 STR	X23, [SP, #160]

(917) 0x460fa8 LDR	X23, [SP, #168]

(917) 0x460fac STR	XZR, [X13, X20,LSL #3]

(917) 0x460fb0 B	4608a4

      (934) 0x460fb4 MOVZ	X13, #0

      (934) 0x460fb8 HINT	#0

      (934) 0x460fbc HINT	#0

      (934) 0x460fc0 UBFM	X0, X13, #61, #60

      (934) 0x460fc4 LDR	X13, [X20, X0]

      (934) 0x460fc8 LDR	X10, [X21, X0]

      (934) 0x460fcc SUB	X12, X4, X13

      (934) 0x460fd0 LDR	X11, [X10, X12,LSL #3]

      (934) 0x460fd4 STR	X11, [X18, X3,LSL #3]

      (934) 0x460fd8 ADD	X3, X3, #1

      (934) 0x460fdc B	46013c

        (928) 0x460fe0 LDR	X7, [SP, #120]

        (928) 0x460fe4 ADD	X22, X22, #8

        (928) 0x460fe8 CMP	X7, X20

        (928) 0x460fec B.NE	460284

      (927) 0x460ff0 LDR	X4, [X23, X25,LSL #3]

      (927) 0x460ff4 LDR	X10, [SP, #168]

      (927) 0x460ff8 LDR	X6, [X21, X7,LSL #3]

      (927) 0x460ffc LDR	X13, [X4, X19]

      (927) 0x461000 UBFM	X12, X10, #61, #60

      (927) 0x461004 ADD	X11, X10, #1

      (927) 0x461008 LDR	X5, [SP, #224]

      (927) 0x46100c STR	X11, [SP, #168]

      (927) 0x461010 STR	X13, [X6, X12]

      (927) 0x461014 STR	X26, [X5, X12]

      (927) 0x461018 B	46023c

  (937) 0x46101c LDR	X17, [X12, X20]

  (937) 0x461020 ADD	X16, X7, #1

  (937) 0x461024 ADD	X9, X9, #1

  (937) 0x461028 LDR	X0, [X11, #8]

  (937) 0x46102c STR	X17, [X0, X7,LSL #3]

  (937) 0x461030 ORR	X7, XZR, X16

  (937) 0x461034 LDR	X2, [X8]

  (937) 0x461038 CMP	X2, X9

  (937) 0x46103c B.GT	45fb60

(902) 0x461040 LDR	X3, [X30, #16]

(902) 0x461044 ADD	X5, X5, #1

(902) 0x461048 CMP	X3, X5

(902) 0x46104c B.GT	45fae4

0x461050 B	45fb90

  (938) 0x461054 LDR	X0, [X23, X9]

  (938) 0x461058 ADD	X2, X4, #1

  (938) 0x46105c ADD	X16, X16, #1

  (938) 0x461060 LDR	X3, [X27, #8]

  (938) 0x461064 STR	X0, [X3, X4,LSL #3]

  (938) 0x461068 ORR	X4, XZR, X2

  (938) 0x46106c LDR	X1, [X20]

  (938) 0x461070 CMP	X16, X1

  (938) 0x461074 B.LT	45fb20

(902) 0x461078 B	45fb40

      (934) 0x46107c MOVZ	X13, #1

      (934) 0x461080 B	460fc0

      (934) 0x461084 MOVZ	X28, #0

      (934) 0x461088 UBFM	X4, X28, #61, #60

      (934) 0x46108c LDR	X10, [X20, X4]

      (934) 0x461090 LDR	X17, [X21, X4]

      (934) 0x461094 SUB	X13, X13, X10

      (934) 0x461098 LDR	X12, [X17, X13,LSL #3]

      (934) 0x46109c STR	X12, [X18, X3,LSL #3]

      (934) 0x4610a0 ADD	X3, X3, #1

      (934) 0x4610a4 B	46009c

    (933) 0x4610a8 UBFM	X7, X3, #61, #60

    (933) 0x4610ac ADD	X2, X5, #1

    (933) 0x4610b0 STR	X7, [SP, #120]

    (933) 0x4610b4 LDR	X4, [SP, #120]

    (933) 0x4610b8 SUB	X17, X12, X2

    (933) 0x4610bc ANDS	X6, X17, #4224

    (933) 0x4610c0 SUB	X28, X4, X5,LSL #3

    (933) 0x4610c4 ADD	X28, X18, X28

    (933) 0x4610c8 B.EQ	461298

    (933) 0x4610cc LDR	X8, [X11, X5,LSL #3]

    (933) 0x4610d0 ADD	X7, X8, X16

    (933) 0x4610d4 STR	X7, [X28, X5,LSL #3]

    (933) 0x4610d8 ORR	X5, XZR, X2

    (933) 0x4610dc ADD	X2, X2, #1

    (933) 0x4610e0 CMP	X6, #1

    (933) 0x4610e4 B.EQ	461298

    (933) 0x4610e8 CMP	X6, #2

    (933) 0x4610ec B.EQ	461174

    (933) 0x4610f0 CMP	X6, #3

    (933) 0x4610f4 B.EQ	461160

    (933) 0x4610f8 CMP	X6, #4

    (933) 0x4610fc B.EQ	46114c

    (933) 0x461100 CMP	X6, #5

    (933) 0x461104 B.EQ	461138

    (933) 0x461108 CMP	X6, #6

    (933) 0x46110c B.EQ	461124

    (933) 0x461110 LDR	X17, [X11, X5,LSL #3]

    (933) 0x461114 ADD	X6, X17, X16

    (933) 0x461118 STR	X6, [X28, X5,LSL #3]

    (933) 0x46111c ORR	X5, XZR, X2

    (933) 0x461120 ADD	X2, X2, #1

    (933) 0x461124 LDR	X4, [X11, X5,LSL #3]

    (933) 0x461128 ADD	X8, X4, X16

    (933) 0x46112c STR	X8, [X28, X5,LSL #3]

    (933) 0x461130 ORR	X5, XZR, X2

    (933) 0x461134 ADD	X2, X2, #1

    (933) 0x461138 LDR	X7, [X11, X5,LSL #3]

    (933) 0x46113c ADD	X17, X7, X16

    (933) 0x461140 STR	X17, [X28, X5,LSL #3]

    (933) 0x461144 ORR	X5, XZR, X2

    (933) 0x461148 ADD	X2, X2, #1

    (933) 0x46114c LDR	X6, [X11, X5,LSL #3]

    (933) 0x461150 ADD	X4, X6, X16

    (933) 0x461154 STR	X4, [X28, X5,LSL #3]

    (933) 0x461158 ORR	X5, XZR, X2

    (933) 0x46115c ADD	X2, X2, #1

    (933) 0x461160 LDR	X8, [X11, X5,LSL #3]

    (933) 0x461164 ADD	X7, X8, X16

    (933) 0x461168 STR	X7, [X28, X5,LSL #3]

    (933) 0x46116c ORR	X5, XZR, X2

    (933) 0x461170 ADD	X2, X2, #1

    (933) 0x461174 LDR	X17, [X11, X5,LSL #3]

    (933) 0x461178 STR	X0, [SP, #120]

    (933) 0x46117c STR	X13, [SP, #136]

    (933) 0x461180 ADD	X6, X17, X16

    (933) 0x461184 STR	X6, [X28, X5,LSL #3]

    (933) 0x461188 ORR	X5, XZR, X2

    (933) 0x46118c ADD	X2, X2, #1

    (933) 0x461190 B	4611ec

      (935) 0x461194 LDR	X0, [X11, X2,LSL #3]

      (935) 0x461198 ADD	X0, X0, X16

      (935) 0x46119c STR	X0, [X28, X2,LSL #3]

      (935) 0x4611a0 ADD	X2, X2, #8

      (935) 0x4611a4 LDR	X0, [X11, X17,LSL #3]

      (935) 0x4611a8 ADD	X0, X0, X16

      (935) 0x4611ac STR	X0, [X28, X17,LSL #3]

      (935) 0x4611b0 LDR	X17, [X11, X13,LSL #3]

      (935) 0x4611b4 ADD	X0, X17, X16

      (935) 0x4611b8 STR	X0, [X28, X13,LSL #3]

      (935) 0x4611bc LDR	X13, [X11, X8,LSL #3]

      (935) 0x4611c0 ADD	X17, X13, X16

      (935) 0x4611c4 STR	X17, [X28, X8,LSL #3]

      (935) 0x4611c8 LDR	X8, [X11, X7,LSL #3]

      (935) 0x4611cc ADD	X0, X8, X16

      (935) 0x4611d0 STR	X0, [X28, X7,LSL #3]

      (935) 0x4611d4 LDR	X7, [X11, X6,LSL #3]

      (935) 0x4611d8 ADD	X13, X7, X16

      (935) 0x4611dc STR	X13, [X28, X6,LSL #3]

      (935) 0x4611e0 LDR	X6, [X11, X4,LSL #3]

      (935) 0x4611e4 ADD	X17, X6, X16

      (935) 0x4611e8 STR	X17, [X28, X4,LSL #3]

      (935) 0x4611ec LDR	X0, [X11, X5,LSL #3]

      (935) 0x4611f0 ADD	X17, X2, #1

      (935) 0x4611f4 ADD	X13, X2, #2

      (935) 0x4611f8 ADD	X8, X2, #3

      (935) 0x4611fc ADD	X7, X2, #4

      (935) 0x461200 ADD	X6, X2, #5

      (935) 0x461204 ADD	X4, X2, #6

      (935) 0x461208 ADD	X0, X0, X16

      (935) 0x46120c STR	X0, [X28, X5,LSL #3]

      (935) 0x461210 ADD	X5, X2, #7

      (935) 0x461214 CMP	X12, X2

      (935) 0x461218 B.NE	461194

    (933) 0x46121c LDR	X0, [SP, #120]

    (933) 0x461220 LDR	X13, [SP, #136]

    (933) 0x461224 B	45ffb8

      (934) 0x461228 MOVZ	X28, #1

      (934) 0x46122c B	461088

      (934) 0x461230 MOVZ	X13, #2

      (934) 0x461234 B	460fc0

      (934) 0x461238 MOVZ	X28, #2

      (934) 0x46123c B	461088

      (934) 0x461240 MOVZ	X13, #3

      (934) 0x461244 B	460fc0

      (934) 0x461248 MOVZ	X13, #4

      (934) 0x46124c B	460fc0

      (934) 0x461250 MOVZ	X28, #3

      (934) 0x461254 B	461088

      (934) 0x461258 MOVZ	X28, #4

      (934) 0x46125c B	461088

      (934) 0x461260 MOVZ	X13, #5

      (934) 0x461264 B	460fc0

    (926) 0x461268 ORR	X18, XZR, X15

    (926) 0x46126c B	4601e8

      (934) 0x461270 MOVZ	X28, #5

      (934) 0x461274 B	461088

      (934) 0x461278 MOVZ	X13, #6

      (934) 0x46127c B	460fc0

      (934) 0x461280 MOVZ	X13, #7

      (934) 0x461284 B	460fc0

      (934) 0x461288 MOVZ	X28, #6

      (934) 0x46128c B	461088

      (934) 0x461290 MOVZ	X28, #7

      (934) 0x461294 B	461088

    (933) 0x461298 STR	X0, [SP, #120]

    (933) 0x46129c STR	X13, [SP, #136]

    (933) 0x4612a0 B	4611ec

(904) 0x4612a4 LDR	X15, [SP, #336]

(904) 0x4612a8 LDR	X24, [SP, #176]

(904) 0x4612ac LDR	X18, [X15, X23,LSL #3]

(904) 0x4612b0 STR	XZR, [X18]

(904) 0x4612b4 CMP	X24, #0

(904) 0x4612b8 B.LE	462db0

(904) 0x4612bc LDR	X5, [SP, #664]

(904) 0x4612c0 MOVZ	X22, #0

(904) 0x4612c4 MOVZ	X3, #8

(904) 0x4612c8 LDR	X11, [SP, #456]

(904) 0x4612cc LDR	X17, [SP, #744]

(904) 0x4612d0 SUB	X14, X5, #8

  (929) 0x4612d4 LDR	X30, [X14, X3]

  (929) 0x4612d8 LDR	X2, [X5, X3]

  (929) 0x4612dc CMP	X30, X2

  (929) 0x4612e0 B.GE	4612fc

    (930) 0x4612e4 LDR	X1, [X26, X30,LSL #3]

    (930) 0x4612e8 CMP	X19, X1

    (930) 0x4612ec B.EQ	461390

    (930) 0x4612f0 ADD	X30, X30, #1

    (930) 0x4612f4 CMP	X30, X2

    (930) 0x4612f8 B.LT	4612e4

  (929) 0x4612fc STR	X22, [X18, X3]

  (929) 0x461300 ADD	X3, X3, #8

  (929) 0x461304 CMP	X17, X3

  (929) 0x461308 B.NE	4612d4

(904) 0x46130c LDR	X18, [SP, #368]

(904) 0x461310 LDR	X24, [SP, #712]

(904) 0x461314 LDR	X15, [SP, #176]

(904) 0x461318 ADD	X28, X18, #40

(904) 0x46131c LDR	X8, [SP, #304]

(904) 0x461320 STR	X24, [X18, #16]

(904) 0x461324 LDR	X9, [SP, #720]

(904) 0x461328 LDR	X7, [X8, X23,LSL #3]

(904) 0x46132c STP	X15, X9, [X28]

(904) 0x461330 LDR	X4, [SP, #152]

(904) 0x461334 STR	X7, [X18, #24]

(904) 0x461338 LDR	X6, [SP, #400]

(904) 0x46133c STP	X6, X4, [X18]

(904) 0x461340 LDR	X0, [SP, #336]

(904) 0x461344 LDR	X13, [X0, X23,LSL #3]

(904) 0x461348 STR	X13, [X18, #56]

(904) 0x46134c CBNZ	X22, 462c7c

(904) 0x461350 LDR	X10, [SP, #560]

(904) 0x461354 MOVZ	X0, #11

(904) 0x461358 LDR	X1, [SP, #368]

(904) 0x46135c LDR	X2, [SP, #384]

(904) 0x461360 STR	XZR, [X10, X23,LSL #3]

(904) 0x461364 STR	XZR, [X21, X19,LSL #3]

(904) 0x461368 LDR	X3, [X10, X23,UXTW #3]

(904) 0x46136c BL	4fd0a4

(904) 0x461370 BL	4fd8ac

(904) 0x461374 LDR	X11, [SP, #504]

(904) 0x461378 TBNZ	X11, #63, 462c60

(904) 0x46137c LDR	X5, [SP, #176]

(904) 0x461380 STR	XZR, [SP, #504]

(904) 0x461384 CMP	X5, #0

(904) 0x461388 B.GT	46018c

(904) 0x46138c B	460330

    (930) 0x461390 STR	X22, [X11, X30,LSL #3]

    (930) 0x461394 LDR	X16, [X27, X30,LSL #3]

    (930) 0x461398 ADD	X30, X30, #1

    (930) 0x46139c LDR	X2, [X5, X3]

    (930) 0x4613a0 ADD	X22, X22, X16

    (930) 0x4613a4 CMP	X2, X30

    (930) 0x4613a8 B.GT	4612e4

  (929) 0x4613ac STR	X22, [X18, X3]

  (929) 0x4613b0 ADD	X3, X3, #8

  (929) 0x4613b4 CMP	X17, X3

  (929) 0x4613b8 B.NE	4612d4

(904) 0x4613bc B	46130c

(904) 0x4613c0 LDR	X22, [SP, #152]

(904) 0x4613c4 MOVZ	X1, #8

(904) 0x4613c8 ADD	X0, X22, #1

(904) 0x4613cc BL	546d88

(904) 0x4613d0 LDR	X24, [SP, #304]

(904) 0x4613d4 ORR	X13, XZR, X0

(904) 0x4613d8 MOVZ	X1, #8

(904) 0x4613dc LDR	X0, [SP, #552]

(904) 0x4613e0 STR	X13, [X24, X23,LSL #3]

(904) 0x4613e4 BL	546d88

(904) 0x4613e8 LDR	X14, [SP, #336]

(904) 0x4613ec STR	X0, [X14, X23,LSL #3]

(904) 0x4613f0 LDR	X15, [X24, X23,LSL #3]

(904) 0x4613f4 STR	XZR, [X15]

(904) 0x4613f8 CMP	X22, #0

(904) 0x4613fc B.LE	462f7c

(904) 0x461400 ADRP	X1,

(904) 0x461404 MOVZ	X18, #0

(904) 0x461408 ADD	X8, X1, #3616

(904) 0x46140c MOVZ	X3, #0

(904) 0x461410 STR	X8, [SP, #120]

(904) 0x461414 TBZ	W22, #0, 461488

(904) 0x461418 LDR	X4, [SP, #216]

(904) 0x46141c ADD	X7, SP, #848

(904) 0x461420 MOVZ	W3, #0

(904) 0x461424 MOVZ	W2, #0

(904) 0x461428 LDR	X9, [SP, #256]

(904) 0x46142c LDR	X1, [SP, #296]

(904) 0x461430 STP	X23, X25, [X7, #40]

(904) 0x461434 STP	X9, X4, [X7]

(904) 0x461438 LDR	X17, [SP, #200]

(904) 0x46143c STR	XZR, [SP, #904]

(904) 0x461440 LDR	X5, [SP, #376]

(904) 0x461444 STR	XZR, [SP, #912]

(904) 0x461448 LDR	X16, [SP, #568]

(904) 0x46144c STR	X17, [SP, #864]

(904) 0x461450 LDR	X0, [SP, #120]

(904) 0x461454 STR	X5, [SP, #880]

(904) 0x461458 STR	X16, [SP, #872]

(904) 0x46145c BL	410bc0

(904) 0x461460 LDR	X0, [SP, #304]

(904) 0x461464 MOVZ	X2, #1

(904) 0x461468 ORR	X3, XZR, X2

(904) 0x46146c LDR	X18, [SP, #912]

(904) 0x461470 LDR	X24, [SP, #152]

(904) 0x461474 LDR	X11, [X0, X23,LSL #3]

(904) 0x461478 STR	X18, [X11, X2,LSL #3]

(904) 0x46147c CMP	X24, X2

(904) 0x461480 B.EQ	46156c

(904) 0x461484 LDR	X24, [SP, #304]

(904) 0x461488 ORR	X28, XZR, X26

(904) 0x46148c ORR	X30, XZR, X20

(904) 0x461490 STR	X27, [SP, #136]

(904) 0x461494 LDR	X26, [SP, #568]

(904) 0x461498 ORR	X20, XZR, X21

(904) 0x46149c ORR	X22, XZR, X3

(904) 0x4614a0 ORR	X21, XZR, X30

(904) 0x4614a4 ORR	X27, XZR, X19

  (931) 0x4614a8 LDR	X6, [SP, #200]

  (931) 0x4614ac ADD	X14, SP, #848

  (931) 0x4614b0 ADD	X15, SP, #880

  (931) 0x4614b4 MOVZ	W3, #0

  (931) 0x4614b8 MOVZ	W2, #0

  (931) 0x4614bc LDR	X10, [SP, #216]

  (931) 0x4614c0 LDR	X19, [SP, #256]

  (931) 0x4614c4 LDR	X13, [SP, #376]

  (931) 0x4614c8 LDR	X0, [SP, #120]

  (931) 0x4614cc LDR	X1, [SP, #296]

  (931) 0x4614d0 STP	X19, X10, [X14]

  (931) 0x4614d4 STP	X6, X26, [X14, #16]

  (931) 0x4614d8 STP	X13, X23, [X15]

  (931) 0x4614dc STP	X25, X22, [X15, #16]

  (931) 0x4614e0 ADD	X22, X22, #1

  (931) 0x4614e4 STR	X18, [SP, #912]

  (931) 0x4614e8 BL	410bc0

  (931) 0x4614ec LDR	X12, [X24, X23,LSL #3]

  (931) 0x4614f0 ADD	X5, SP, #848

  (931) 0x4614f4 ADD	X18, SP, #880

  (931) 0x4614f8 MOVZ	W3, #0

  (931) 0x4614fc MOVZ	W2, #0

  (931) 0x461500 LDR	X4, [SP, #912]

  (931) 0x461504 LDR	X8, [SP, #200]

  (931) 0x461508 LDR	X7, [SP, #216]

  (931) 0x46150c STR	X4, [X12, X22,LSL #3]

  (931) 0x461510 LDR	X9, [SP, #376]

  (931) 0x461514 LDR	X0, [SP, #120]

  (931) 0x461518 LDR	X1, [SP, #296]

  (931) 0x46151c STP	X19, X7, [X5]

  (931) 0x461520 STP	X8, X26, [X5, #16]

  (931) 0x461524 STP	X9, X23, [X18]

  (931) 0x461528 STP	X25, X22, [X18, #16]

  (931) 0x46152c STR	X4, [SP, #912]

  (931) 0x461530 BL	410bc0

  (931) 0x461534 LDR	X1, [X24, X23,LSL #3]

  (931) 0x461538 ADD	X2, X22, #1

  (931) 0x46153c ORR	X22, XZR, X2

  (931) 0x461540 LDR	X18, [SP, #912]

  (931) 0x461544 LDR	X3, [SP, #152]

  (931) 0x461548 STR	X18, [X1, X2,LSL #3]

  (931) 0x46154c CMP	X3, X2

  (931) 0x461550 B.NE	4614a8

(904) 0x461554 ORR	X19, XZR, X27

(904) 0x461558 LDR	X27, [SP, #136]

(904) 0x46155c ORR	X17, XZR, X21

(904) 0x461560 ORR	X26, XZR, X28

(904) 0x461564 ORR	X21, XZR, X20

(904) 0x461568 ORR	X20, XZR, X17

(904) 0x46156c LDR	X1, [SP, #344]

(904) 0x461570 ORR	X3, XZR, X27

(904) 0x461574 MOVZ	X0, #11

(904) 0x461578 STR	X18, [SP, #120]

(904) 0x46157c LDR	X2, [SP, #376]

(904) 0x461580 BL	4fd0a4

(904) 0x461584 BL	4fd8ac

(904) 0x461588 LDR	X11, [SP, #120]

(904) 0x46158c LDR	X0, [SP, #544]

(904) 0x461590 CMP	X11, X0

(904) 0x461594 B.GT	461900

(904) 0x461598 STR	X11, [SP, #544]

(904) 0x46159c B	45fc5c

    (919) 0x4615a0 LD1D	{Z26.D}, P4/Z, [X13, #1, MUL VL]

    (919) 0x4615a4 ST1D	{Z26.D}, P4, [X11, #1, MUL VL]

    (919) 0x4615a8 B	460ce8

    (919) 0x4615ac LD1D	{Z19.D}, P6/Z, [X12, #1, MUL VL]

    (919) 0x4615b0 ADD	X5, X5, X14

    (919) 0x4615b4 ST1D	{Z19.D}, P6, [X10, #1, MUL VL]

    (919) 0x4615b8 B	460f14

    (919) 0x4615bc SUB	X4, X4, X3,LSL #3

    (919) 0x4615c0 SUB	X23, X18, X0

    (919) 0x4615c4 ANDS	X17, X23, #4224

    (919) 0x4615c8 ADD	X30, X26, X4

    (919) 0x4615cc B.EQ	4616b0

    (919) 0x4615d0 LDR	D20, [X28, X3,LSL #3]

    (919) 0x4615d4 STR	D20, [X30, X3,LSL #3]

    (919) 0x4615d8 ORR	X3, XZR, X0

    (919) 0x4615dc ADD	X0, X0, #1

    (919) 0x4615e0 CMP	X17, #1

    (919) 0x4615e4 B.EQ	4616b0

    (919) 0x4615e8 CMP	X17, #2

    (919) 0x4615ec B.EQ	461660

    (919) 0x4615f0 CMP	X17, #3

    (919) 0x4615f4 B.EQ	461650

    (919) 0x4615f8 CMP	X17, #4

    (919) 0x4615fc B.EQ	461640

    (919) 0x461600 CMP	X17, #5

    (919) 0x461604 B.EQ	461630

    (919) 0x461608 CMP	X17, #6

    (919) 0x46160c B.EQ	461620

    (919) 0x461610 LDR	D21, [X28, X3,LSL #3]

    (919) 0x461614 STR	D21, [X30, X3,LSL #3]

    (919) 0x461618 ORR	X3, XZR, X0

    (919) 0x46161c ADD	X0, X0, #1

    (919) 0x461620 LDR	D1, [X28, X3,LSL #3]

    (919) 0x461624 STR	D1, [X30, X3,LSL #3]

    (919) 0x461628 ORR	X3, XZR, X0

    (919) 0x46162c ADD	X0, X0, #1

    (919) 0x461630 LDR	D22, [X28, X3,LSL #3]

    (919) 0x461634 STR	D22, [X30, X3,LSL #3]

    (919) 0x461638 ORR	X3, XZR, X0

    (919) 0x46163c ADD	X0, X0, #1

    (919) 0x461640 LDR	D23, [X28, X3,LSL #3]

    (919) 0x461644 STR	D23, [X30, X3,LSL #3]

    (919) 0x461648 ORR	X3, XZR, X0

    (919) 0x46164c ADD	X0, X0, #1

    (919) 0x461650 LDR	D24, [X28, X3,LSL #3]

    (919) 0x461654 STR	D24, [X30, X3,LSL #3]

    (919) 0x461658 ORR	X3, XZR, X0

    (919) 0x46165c ADD	X0, X0, #1

    (919) 0x461660 LDR	D25, [X28, X3,LSL #3]

    (919) 0x461664 STR	D25, [X30, X3,LSL #3]

    (919) 0x461668 ORR	X3, XZR, X0

    (919) 0x46166c ADD	X0, X0, #1

    (919) 0x461670 B	4616b0

      (920) 0x461674 LDR	D27, [X28, X0,LSL #3]

      (920) 0x461678 STR	D27, [X30, X0,LSL #3]

      (920) 0x46167c ADD	X0, X0, #8

      (920) 0x461680 LDR	D28, [X28, X16,LSL #3]

      (920) 0x461684 STR	D28, [X30, X16,LSL #3]

      (920) 0x461688 LDR	D31, [X28, X15,LSL #3]

      (920) 0x46168c STR	D31, [X30, X15,LSL #3]

      (920) 0x461690 LDR	D0, [X28, X13,LSL #3]

      (920) 0x461694 STR	D0, [X30, X13,LSL #3]

      (920) 0x461698 LDR	D2, [X28, X10,LSL #3]

      (920) 0x46169c STR	D2, [X30, X10,LSL #3]

      (920) 0x4616a0 LDR	D30, [X28, X12,LSL #3]

      (920) 0x4616a4 STR	D30, [X30, X12,LSL #3]

      (920) 0x4616a8 LDR	D3, [X28, X7,LSL #3]

      (920) 0x4616ac STR	D3, [X30, X7,LSL #3]

      (920) 0x4616b0 LDR	D26, [X28, X3,LSL #3]

      (920) 0x4616b4 ADD	X16, X0, #1

      (920) 0x4616b8 ADD	X15, X0, #2

      (920) 0x4616bc ADD	X13, X0, #3

      (920) 0x4616c0 ADD	X10, X0, #4

      (920) 0x4616c4 ADD	X12, X0, #5

      (920) 0x4616c8 ADD	X7, X0, #6

      (920) 0x4616cc STR	D26, [X30, X3,LSL #3]

      (920) 0x4616d0 ADD	X3, X0, #7

      (920) 0x4616d4 CMP	X0, X18

      (920) 0x4616d8 B.NE	461674

    (919) 0x4616dc ADD	X5, X5, X14

    (919) 0x4616e0 B	460f14

    (919) 0x4616e4 SUB	X23, X30, X4,LSL #3

    (919) 0x4616e8 SUB	X18, X11, X3

    (919) 0x4616ec ANDS	X14, X18, #4224

    (919) 0x4616f0 ADD	X7, X26, X23

    (919) 0x4616f4 B.EQ	4617d8

    (919) 0x4616f8 LDR	D27, [X27, X4,LSL #3]

    (919) 0x4616fc STR	D27, [X7, X4,LSL #3]

    (919) 0x461700 ORR	X4, XZR, X3

    (919) 0x461704 ADD	X3, X3, #1

    (919) 0x461708 CMP	X14, #1

    (919) 0x46170c B.EQ	4617d8

    (919) 0x461710 CMP	X14, #2

    (919) 0x461714 B.EQ	461788

    (919) 0x461718 CMP	X14, #3

    (919) 0x46171c B.EQ	461778

    (919) 0x461720 CMP	X14, #4

    (919) 0x461724 B.EQ	461768

    (919) 0x461728 CMP	X14, #5

    (919) 0x46172c B.EQ	461758

    (919) 0x461730 CMP	X14, #6

    (919) 0x461734 B.EQ	461748

    (919) 0x461738 LDR	D28, [X27, X4,LSL #3]

    (919) 0x46173c STR	D28, [X7, X4,LSL #3]

    (919) 0x461740 ORR	X4, XZR, X3

    (919) 0x461744 ADD	X3, X3, #1

    (919) 0x461748 LDR	D31, [X27, X4,LSL #3]

    (919) 0x46174c STR	D31, [X7, X4,LSL #3]

    (919) 0x461750 ORR	X4, XZR, X3

    (919) 0x461754 ADD	X3, X3, #1

    (919) 0x461758 LDR	D0, [X27, X4,LSL #3]

    (919) 0x46175c STR	D0, [X7, X4,LSL #3]

    (919) 0x461760 ORR	X4, XZR, X3

    (919) 0x461764 ADD	X3, X3, #1

    (919) 0x461768 LDR	D2, [X27, X4,LSL #3]

    (919) 0x46176c STR	D2, [X7, X4,LSL #3]

    (919) 0x461770 ORR	X4, XZR, X3

    (919) 0x461774 ADD	X3, X3, #1

    (919) 0x461778 LDR	D30, [X27, X4,LSL #3]

    (919) 0x46177c STR	D30, [X7, X4,LSL #3]

    (919) 0x461780 ORR	X4, XZR, X3

    (919) 0x461784 ADD	X3, X3, #1

    (919) 0x461788 LDR	D3, [X27, X4,LSL #3]

    (919) 0x46178c STR	D3, [X7, X4,LSL #3]

    (919) 0x461790 ORR	X4, XZR, X3

    (919) 0x461794 ADD	X3, X3, #1

    (919) 0x461798 B	4617d8

      (922) 0x46179c LDR	D4, [X27, X3,LSL #3]

      (922) 0x4617a0 STR	D4, [X7, X3,LSL #3]

      (922) 0x4617a4 ADD	X3, X3, #8

      (922) 0x4617a8 LDR	D29, [X27, X30,LSL #3]

      (922) 0x4617ac STR	D29, [X7, X30,LSL #3]

      (922) 0x4617b0 LDR	D5, [X27, X17,LSL #3]

      (922) 0x4617b4 STR	D5, [X7, X17,LSL #3]

      (922) 0x4617b8 LDR	D6, [X27, X23,LSL #3]

      (922) 0x4617bc STR	D6, [X7, X23,LSL #3]

      (922) 0x4617c0 LDR	D7, [X27, X13,LSL #3]

      (922) 0x4617c4 STR	D7, [X7, X13,LSL #3]

      (922) 0x4617c8 LDR	D16, [X27, X12,LSL #3]

      (922) 0x4617cc STR	D16, [X7, X12,LSL #3]

      (922) 0x4617d0 LDR	D17, [X27, X10,LSL #3]

      (922) 0x4617d4 STR	D17, [X7, X10,LSL #3]

      (922) 0x4617d8 LDR	D4, [X27, X4,LSL #3]

      (922) 0x4617dc ADD	X30, X3, #1

      (922) 0x4617e0 ADD	X17, X3, #2

      (922) 0x4617e4 ADD	X23, X3, #3

      (922) 0x4617e8 ADD	X13, X3, #4

      (922) 0x4617ec ADD	X12, X3, #5

      (922) 0x4617f0 ADD	X10, X3, #6

      (922) 0x4617f4 STR	D4, [X7, X4,LSL #3]

      (922) 0x4617f8 ADD	X4, X3, #7

      (922) 0x4617fc CMP	X11, X3

      (922) 0x461800 B.NE	46179c

    (919) 0x461804 B	460ce8

    (919) 0x461808 MOVZ	X3, #0

    (919) 0x46180c B	460cbc

    (919) 0x461810 MOVZ	X30, #0

    (919) 0x461814 B	460ee4

(904) 0x461818 LDR	X24, [SP, #224]

(904) 0x46181c SUB	X3, X18, #1

(904) 0x461820 MOVZ	X2, #0

(904) 0x461824 STR	X18, [SP, #120]

(904) 0x461828 LDR	X0, [X21, X19,LSL #3]

(904) 0x46182c ORR	X1, XZR, X24

(904) 0x461830 BL	547a40

(904) 0x461834 LDR	X10, [SP, #560]

(904) 0x461838 ORR	X13, XZR, X24

(904) 0x46183c LDR	X6, [X20, X19,LSL #3]

(904) 0x461840 LDR	X11, [X24]

(904) 0x461844 LDR	X5, [X10, X23,LSL #3]

(904) 0x461848 STR	X6, [SP, #576]

(904) 0x46184c LDR	X12, [SP, #120]

(904) 0x461850 STR	X6, [X5, X11,LSL #3]

(904) 0x461854 CMP	X12, #1

(904) 0x461858 B.EQ	4618a8

(904) 0x46185c LDR	X14, [X21, X19,LSL #3]

(904) 0x461860 MOVZ	X2, #0

(904) 0x461864 MOVZ	X1, #0

(904) 0x461868 MOVZ	X3, #1

  (925) 0x46186c LDR	X30, [X14, X3,LSL #3]

  (925) 0x461870 ADD	X17, X14, X1

  (925) 0x461874 LDR	X16, [X14, X1]

  (925) 0x461878 CMP	X16, X30

  (925) 0x46187c B.GE	4618b8

  (925) 0x461880 STR	X30, [X17, #8]

  (925) 0x461884 ADD	X6, X6, #1

  (925) 0x461888 ADD	X2, X2, #1

  (925) 0x46188c LDR	X8, [X13, X3,LSL #3]

  (925) 0x461890 ADD	X3, X3, #1

  (925) 0x461894 UBFM	X1, X2, #61, #60

  (925) 0x461898 STR	X6, [X5, X8,LSL #3]

  (925) 0x46189c CMP	X3, X12

  (925) 0x4618a0 B.NE	46186c

(904) 0x4618a4 STR	X6, [SP, #576]

(904) 0x4618a8 LDR	X15, [SP, #576]

(904) 0x4618ac ADD	X22, X15, #1

(904) 0x4618b0 STR	X22, [X20, X23,LSL #3]

(904) 0x4618b4 B	460344

  (925) 0x4618b8 LDR	X9, [X13, X3,LSL #3]

  (925) 0x4618bc ADD	X3, X3, #1

  (925) 0x4618c0 STR	X6, [X5, X9,LSL #3]

  (925) 0x4618c4 CMP	X12, X3

  (925) 0x4618c8 B.NE	46186c

(904) 0x4618cc B	4618a4

0x4618d0 MOVZ	X1, #8

0x4618d4 ORR	X0, XZR, X20

0x4618d8 STR	X20, [SP, #120]

0x4618dc BL	546d88

0x4618e0 ORR	X19, XZR, X0

0x4618e4 LDR	X0, [SP, #120]

0x4618e8 MOVZ	X1, #8

0x4618ec STR	X19, [SP, #120]

0x4618f0 BL	546d88

0x4618f4 LDR	X6, [SP, #136]

0x4618f8 ORR	X28, XZR, X0

0x4618fc B	460500

(904) 0x461900 LDR	X0, [SP, #384]

(904) 0x461904 BL	546e20

(904) 0x461908 LDR	X0, [SP, #120]

(904) 0x46190c MOVZ	X1, #8

(904) 0x461910 BL	546d88

(904) 0x461914 LDR	X24, [SP, #120]

(904) 0x461918 STR	X0, [SP, #384]

(904) 0x46191c STR	X24, [SP, #544]

(904) 0x461920 B	45fc5c

(917) 0x461924 ORR	X0, XZR, X26

(917) 0x461928 BL	546e20

(917) 0x46192c LDR	X0, [SP, #168]

(917) 0x461930 MOVZ	X1, #8

(917) 0x461934 BL	546d88

(917) 0x461938 LDR	X23, [SP, #304]

(917) 0x46193c ORR	X26, XZR, X0

(917) 0x461940 LDR	X1, [X23, X20,LSL #3]

(917) 0x461944 B	460a6c

(917) 0x461948 LDR	X0, [SP, #136]

(917) 0x46194c BL	546e20

(917) 0x461950 MOVZ	X1, #8

(917) 0x461954 ORR	X0, XZR, X23

(917) 0x461958 BL	546d88

(917) 0x46195c STR	X0, [SP, #136]

(917) 0x461960 B	460f68

0x461964 LDR	X6, [SP, #144]

0x461968 ADRP	X10,

0x46196c MOVZ	W2, #0

0x461970 ADD	X0, X10, #4080

0x461974 STR	X18, [SP, #136]

0x461978 MOVZ	W3, #0

0x46197c LDR	X7, [SP, #192]

0x461980 STR	X27, [SP, #936]

0x461984 LDR	X19, [SP, #216]

0x461988 STR	X6, [SP, #952]

0x46198c LDR	X21, [SP, #256]

0x461990 STR	X7, [SP, #928]

0x461994 LDR	X20, [SP, #320]

0x461998 STR	X28, [SP, #960]

0x46199c LDR	X11, [SP, #432]

0x4619a0 STR	X21, [SP, #944]

0x4619a4 LDR	X8, [SP, #440]

0x4619a8 STR	X20, [SP, #848]

0x4619ac LDR	X15, [SP, #448]

0x4619b0 STR	X11, [SP, #856]

0x4619b4 LDR	X5, [SP, #584]

0x4619b8 STR	X8, [SP, #904]

0x4619bc LDR	X14, [SP, #592]

0x4619c0 STR	X15, [SP, #920]

0x4619c4 LDR	X30, [SP, #600]

0x4619c8 STR	X5, [SP, #864]

0x4619cc LDR	X16, [SP, #608]

0x4619d0 STR	X14, [SP, #880]

0x4619d4 LDR	X9, [SP, #616]

0x4619d8 STR	X30, [SP, #888]

0x4619dc LDR	X17, [SP, #1192]

0x4619e0 STR	X16, [SP, #896]

0x4619e4 LDR	X1, [SP, #296]

0x4619e8 STR	X9, [SP, #912]

0x4619ec STR	X19, [SP, #968]

0x4619f0 STR	X17, [SP, #872]

0x4619f4 LDR	X23, [SP, #120]

0x4619f8 STR	X13, [SP, #1096]

0x4619fc LDR	X14, [SP, #184]

0x461a00 LDR	X17, [SP, #208]

0x461a04 STR	X23, [SP, #976]

0x461a08 LDR	X9, [SP, #248]

0x461a0c STR	X14, [SP, #1056]

0x461a10 LDR	X20, [SP, #264]

0x461a14 STR	X17, [SP, #1048]

0x461a18 LDR	X16, [SP, #272]

0x461a1c STR	X9, [SP, #1088]

0x461a20 LDR	X10, [SP, #280]

0x461a24 STR	X20, [SP, #1024]

0x461a28 LDR	X8, [SP, #312]

0x461a2c STR	X16, [SP, #1072]

0x461a30 LDR	X18, [SP, #352]

0x461a34 STR	X10, [SP, #1016]

0x461a38 LDR	X13, [SP, #360]

0x461a3c STR	X8, [SP, #1080]

0x461a40 LDR	X5, [SP, #408]

0x461a44 STR	X18, [SP, #984]

0x461a48 LDR	X11, [SP, #416]

0x461a4c STR	X13, [SP, #1000]

0x461a50 LDR	X4, [SP, #424]

0x461a54 STR	X5, [SP, #1032]

0x461a58 LDR	X12, [SP, #512]

0x461a5c STR	X11, [SP, #1040]

0x461a60 LDR	X30, [SP, #536]

0x461a64 STR	X4, [SP, #992]

0x461a68 STR	X12, [SP, #1008]

0x461a6c STR	X30, [SP, #1064]

0x461a70 BL	410bc0

0x461a74 LDP	X0, X2, [SP, #128]

0x461a78 CBNZ	X0, 462f50

0x461a7c STR	X2, [SP, #136]

0x461a80 LDR	X0, [SP, #512]

0x461a84 BL	546e20

0x461a88 LDR	X21, [SP, #208]

0x461a8c LDR	X0, [X21, #8]

0x461a90 BL	546e20

0x461a94 LDR	X3, [SP, #832]

0x461a98 STR	XZR, [X21, #8]

0x461a9c LDR	X15, [SP, #136]

0x461aa0 CMP	X3, #1

0x461aa4 B.LE	461abc

0x461aa8 LDR	X19, [SP, #184]

0x461aac LDR	X0, [X19, #8]

0x461ab0 BL	546e20

0x461ab4 LDR	X15, [SP, #136]

0x461ab8 STR	XZR, [X19, #8]

0x461abc LDR	X7, [SP, #328]

0x461ac0 CMP	X7, #2

0x461ac4 B.EQ	462f60

0x461ac8 LDR	X18, [SP, #152]

0x461acc ADRP	X6,

0x461ad0 MOVZ	X23, #0

0x461ad4 ADD	X4, X6, #3168

0x461ad8 MOVZ	X19, #2

0x461adc STR	XZR, [SP, #136]

0x461ae0 LDR	X12, [SP, #176]

0x461ae4 MOVZ	X21, #1

0x461ae8 STR	XZR, [SP, #160]

0x461aec LDR	X17, [SP, #200]

0x461af0 UBFM	X13, X18, #61, #60

0x461af4 STR	X26, [SP, #224]

0x461af8 ORR	X26, XZR, X23

0x461afc LDR	X5, [SP, #264]

0x461b00 UBFM	X10, X12, #61, #60

0x461b04 STR	X13, [SP, #232]

0x461b08 LDR	X20, [SP, #256]

0x461b0c ADD	X14, X17, #8

0x461b10 STR	X10, [SP, #240]

0x461b14 STR	X4, [SP, #288]

0x461b18 ADD	X11, X5, #8

0x461b1c STR	X14, [SP, #344]

0x461b20 STR	X15, [SP, #376]

0x461b24 STR	X11, [SP, #360]

0x461b28 B	461ccc

(910) 0x461b2c LDR	X30, [SP, #264]

(910) 0x461b30 ADD	X6, SP, #968

(910) 0x461b34 MOVZ	W3, #0

(910) 0x461b38 LDP	X0, X1, [SP, #288]

(910) 0x461b3c MOVZ	W2, #0

(910) 0x461b40 LDR	X16, [SP, #360]

(910) 0x461b44 LDR	X10, [SP, #488]

(910) 0x461b48 LDR	X5, [SP, #144]

(910) 0x461b4c LDR	X7, [X30, X19,LSL #3]

(910) 0x461b50 LDR	X12, [X16, X19,LSL #3]

(910) 0x461b54 STR	X10, [SP, #944]

(910) 0x461b58 STP	X27, X20, [X6]

(910) 0x461b5c STP	X5, X28, [X6, #16]

(910) 0x461b60 SUB	X9, X12, X7

(910) 0x461b64 LDR	X18, [SP, #120]

(910) 0x461b68 STR	X30, [SP, #1048]

(910) 0x461b6c LDR	X11, [SP, #192]

(910) 0x461b70 LDR	X8, [SP, #216]

(910) 0x461b74 STR	X18, [SP, #1008]

(910) 0x461b78 LDR	X13, [SP, #280]

(910) 0x461b7c STR	X11, [SP, #960]

(910) 0x461b80 LDR	X17, [SP, #352]

(910) 0x461b84 STR	X8, [SP, #1000]

(910) 0x461b88 LDR	X14, [SP, #392]

(910) 0x461b8c STR	X13, [SP, #1040]

(910) 0x461b90 LDR	X30, [SP, #408]

(910) 0x461b94 STR	X17, [SP, #1024]

(910) 0x461b98 LDR	X15, [SP, #424]

(910) 0x461b9c STR	X14, [SP, #952]

(910) 0x461ba0 LDR	X4, [SP, #456]

(910) 0x461ba4 STR	X30, [SP, #1056]

(910) 0x461ba8 LDR	X16, [SP, #416]

(910) 0x461bac STR	X15, [SP, #1032]

(910) 0x461bb0 LDR	X10, [SP, #464]

(910) 0x461bb4 STR	X4, [SP, #1016]

(910) 0x461bb8 LDR	X12, [SP, #184]

(910) 0x461bbc LDP	X6, X8, [SP, #312]

(910) 0x461bc0 STR	X9, [SP, #1176]

(910) 0x461bc4 LDR	X14, [SP, #128]

(910) 0x461bc8 STR	X8, [SP, #848]

(910) 0x461bcc LDR	X17, [SP, #136]

(910) 0x461bd0 STR	X16, [SP, #1064]

(910) 0x461bd4 LDR	X9, [SP, #208]

(910) 0x461bd8 STR	X12, [SP, #1080]

(910) 0x461bdc LDR	X4, [SP, #224]

(910) 0x461be0 STR	X24, [SP, #1088]

(910) 0x461be4 LDR	X7, [SP, #272]

(910) 0x461be8 STR	X9, [SP, #1072]

(910) 0x461bec LDR	X5, [SP, #376]

(910) 0x461bf0 STR	X10, [SP, #1096]

(910) 0x461bf4 LDR	X18, [SP, #432]

(910) 0x461bf8 STR	X7, [SP, #1104]

(910) 0x461bfc LDR	X15, [SP, #472]

(910) 0x461c00 STR	X5, [SP, #936]

(910) 0x461c04 LDR	X11, [SP, #496]

(910) 0x461c08 STR	X18, [SP, #856]

(910) 0x461c0c LDR	X13, [SP, #584]

(910) 0x461c10 STR	X19, [SP, #1112]

(910) 0x461c14 STR	X6, [SP, #1120]

(910) 0x461c18 STR	X14, [SP, #1128]

(910) 0x461c1c STR	X11, [SP, #1136]

(910) 0x461c20 STR	X13, [SP, #864]

(910) 0x461c24 STR	X22, [SP, #1144]

(910) 0x461c28 STR	X4, [SP, #1152]

(910) 0x461c2c STR	X17, [SP, #1160]

(910) 0x461c30 STR	X15, [SP, #1168]

(910) 0x461c34 LDR	X30, [SP, #1192]

(910) 0x461c38 LDR	X9, [SP, #440]

(910) 0x461c3c LDR	X5, [SP, #448]

(910) 0x461c40 STR	X30, [SP, #872]

(910) 0x461c44 LDR	X6, [SP, #480]

(910) 0x461c48 STR	X9, [SP, #904]

(910) 0x461c4c LDR	X16, [SP, #592]

(910) 0x461c50 STR	X5, [SP, #920]

(910) 0x461c54 LDR	X10, [SP, #600]

(910) 0x461c58 STR	X6, [SP, #928]

(910) 0x461c5c LDR	X12, [SP, #608]

(910) 0x461c60 STR	X16, [SP, #880]

(910) 0x461c64 LDR	X7, [SP, #616]

(910) 0x461c68 STR	X10, [SP, #888]

(910) 0x461c6c STR	X12, [SP, #896]

(910) 0x461c70 STR	X7, [SP, #912]

(910) 0x461c74 BL	410bc0

(910) 0x461c78 LDR	X2, [SP, #208]

(910) 0x461c7c LDR	X0, [X2, X19,LSL #3]

(910) 0x461c80 BL	546e20

(910) 0x461c84 LDR	X1, [SP, #208]

(910) 0x461c88 LDR	X3, [SP, #832]

(910) 0x461c8c STR	XZR, [X1, X19,LSL #3]

(910) 0x461c90 CMP	X3, #1

(910) 0x461c94 B.LE	461cb8

(910) 0x461c98 LDR	X0, [SP, #184]

(910) 0x461c9c LDR	X0, [X0, X19,LSL #3]

(910) 0x461ca0 BL	546e20

(910) 0x461ca4 LDR	X8, [SP, #184]

(910) 0x461ca8 STR	XZR, [X8, X19,LSL #3]

(910) 0x461cac LDR	X0, [X24, X19,LSL #3]

(910) 0x461cb0 BL	546e20

(910) 0x461cb4 STR	XZR, [X24, X19,LSL #3]

(910) 0x461cb8 LDR	X14, [SP, #328]

(910) 0x461cbc ADD	X19, X19, #1

(910) 0x461cc0 ADD	X21, X21, #1

(910) 0x461cc4 CMP	X14, X19

(910) 0x461cc8 B.EQ	4624f4

(910) 0x461ccc LDR	X30, [SP, #832]

(910) 0x461cd0 CMP	X30, #1

(910) 0x461cd4 B.LE	461b2c

(910) 0x461cd8 LDR	X16, [SP, #304]

(910) 0x461cdc LDR	X8, [SP, #232]

(910) 0x461ce0 LDR	X1, [X16, X19,LSL #3]

(910) 0x461ce4 LDR	X9, [X1, X8]

(910) 0x461ce8 STR	X9, [SP, #168]

(910) 0x461cec CMP	X9, X23

(910) 0x461cf0 B.GT	4624b4

(910) 0x461cf4 LDR	X0, [SP, #152]

(910) 0x461cf8 MOVZ	X5, #0

(910) 0x461cfc MOVZ	X2, #0

(910) 0x461d00 CMP	X0, #0

(910) 0x461d04 B.LE	4621b8

(910) 0x461d08 LDR	X9, [SP, #216]

  (911) 0x461d0c LDR	X3, [SP, #200]

  (911) 0x461d10 LDR	X15, [SP, #344]

  (911) 0x461d14 LDR	X6, [X3, X2,LSL #3]

  (911) 0x461d18 LDR	X8, [X15, X2,LSL #3]

  (911) 0x461d1c CMP	X6, X8

  (911) 0x461d20 B.LT	461d34

  (911) 0x461d24 B	4621a8

    (912) 0x461d28 ADD	X6, X6, #1

    (912) 0x461d2c CMP	X6, X8

    (912) 0x461d30 B.EQ	4621a8

    (912) 0x461d34 LDR	X7, [X25, X6,LSL #3]

    (912) 0x461d38 UBFM	X0, X7, #61, #60

    (912) 0x461d3c LDR	X4, [X22, X0]

    (912) 0x461d40 CMP	X4, X21

    (912) 0x461d44 B.NE	461d28

    (912) 0x461d48 ADD	X15, X0, #8

    (912) 0x461d4c LDR	X4, [X20, X0]

    (912) 0x461d50 LDR	X11, [X20, X15]

    (912) 0x461d54 CMP	X4, X11

    (912) 0x461d58 B.GE	461f74

    (912) 0x461d5c SUB	X16, X11, X4

    (912) 0x461d60 UBFM	X30, X5, #61, #60

    (912) 0x461d64 ADD	X3, X4, #1

    (912) 0x461d68 CMP	X16, #1

    (912) 0x461d6c B.EQ	462380

    (912) 0x461d70 ADD	X3, X4, #1

    (912) 0x461d74 ADD	X10, X26, X5,LSL #3

    (912) 0x461d78 UBFM	X30, X5, #61, #60

    (912) 0x461d7c ADD	X13, X27, X3,LSL #3

    (912) 0x461d80 UBFM	X18, X3, #61, #60

    (912) 0x461d84 SUB	X12, X10, X13

    (912) 0x461d88 CMP	X12, #16

    (912) 0x461d8c B.LS	462380

    (912) 0x461d90 SUB	X17, X16, #1

    (912) 0x461d94 CMP	X17, #2

    (912) 0x461d98 B.LS	4624a4

    (912) 0x461d9c UBFM	X23, X16, #2, #63

    (912) 0x461da0 SUB	X7, X18, #8

    (912) 0x461da4 UBFM	X17, X23, #59, #58

    (912) 0x461da8 ADD	X11, X27, X7

    (912) 0x461dac SUB	X18, X17, #32

    (912) 0x461db0 MOVZ	X3, #0

    (912) 0x461db4 UBFM	X14, X18, #5, #63

    (912) 0x461db8 ADD	X13, X11, #16

    (912) 0x461dbc ADD	X23, X14, #1

    (912) 0x461dc0 ADD	X12, X10, #16

    (912) 0x461dc4 ANDS	X18, X23, #4224

    (912) 0x461dc8 B.EQ	461e90

    (912) 0x461dcc CMP	X18, #1

    (912) 0x461dd0 B.EQ	461e74

    (912) 0x461dd4 CMP	X18, #2

    (912) 0x461dd8 B.EQ	461e60

    (912) 0x461ddc CMP	X18, #3

    (912) 0x461de0 B.EQ	461e4c

    (912) 0x461de4 CMP	X18, #4

    (912) 0x461de8 B.EQ	461e38

    (912) 0x461dec CMP	X18, #5

    (912) 0x461df0 B.EQ	461e24

    (912) 0x461df4 CMP	X18, #6

    (912) 0x461df8 B.EQ	461e10

    (912) 0x461dfc LDR	Q1, [X27, X7]

    (912) 0x461e00 MOVZ	X3, #32

    (912) 0x461e04 LDR	Q22, [X11, #16]

    (912) 0x461e08 STR	Q1, [X26, X30]

    (912) 0x461e0c STR	Q22, [X10, #16]

    (912) 0x461e10 LDR	Q24, [X11, X3]

    (912) 0x461e14 LDR	Q23, [X13, X3]

    (912) 0x461e18 STR	Q24, [X10, X3]

    (912) 0x461e1c STR	Q23, [X12, X3]

    (912) 0x461e20 ADD	X3, X3, #32

    (912) 0x461e24 LDR	Q26, [X11, X3]

    (912) 0x461e28 LDR	Q25, [X13, X3]

    (912) 0x461e2c STR	Q26, [X10, X3]

    (912) 0x461e30 STR	Q25, [X12, X3]

    (912) 0x461e34 ADD	X3, X3, #32

    (912) 0x461e38 LDR	Q28, [X11, X3]

    (912) 0x461e3c LDR	Q27, [X13, X3]

    (912) 0x461e40 STR	Q28, [X10, X3]

    (912) 0x461e44 STR	Q27, [X12, X3]

    (912) 0x461e48 ADD	X3, X3, #32

    (912) 0x461e4c LDR	Q0, [X11, X3]

    (912) 0x461e50 LDR	Q31, [X13, X3]

    (912) 0x461e54 STR	Q0, [X10, X3]

    (912) 0x461e58 STR	Q31, [X12, X3]

    (912) 0x461e5c ADD	X3, X3, #32

    (912) 0x461e60 LDR	Q30, [X11, X3]

    (912) 0x461e64 LDR	Q2, [X13, X3]

    (912) 0x461e68 STR	Q30, [X10, X3]

    (912) 0x461e6c STR	Q2, [X12, X3]

    (912) 0x461e70 ADD	X3, X3, #32

    (912) 0x461e74 LDR	Q4, [X11, X3]

    (912) 0x461e78 LDR	Q3, [X13, X3]

    (912) 0x461e7c STR	Q4, [X10, X3]

    (912) 0x461e80 STR	Q3, [X12, X3]

    (912) 0x461e84 ADD	X3, X3, #32

    (912) 0x461e88 CMP	X17, X3

    (912) 0x461e8c B.EQ	461f38

      (916) 0x461e90 LDR	Q5, [X11, X3]

      (916) 0x461e94 ADD	X7, X3, #32

      (916) 0x461e98 ADD	X30, X3, #64

      (916) 0x461e9c ADD	X23, X3, #96

      (916) 0x461ea0 ADD	X18, X3, #128

      (916) 0x461ea4 LDR	Q29, [X13, X3]

      (916) 0x461ea8 ADD	X14, X3, #160

      (916) 0x461eac STR	Q5, [X10, X3]

      (916) 0x461eb0 STR	Q29, [X12, X3]

      (916) 0x461eb4 LDR	Q7, [X11, X7]

      (916) 0x461eb8 LDR	Q6, [X13, X7]

      (916) 0x461ebc STR	Q7, [X10, X7]

      (916) 0x461ec0 STR	Q6, [X12, X7]

      (916) 0x461ec4 ADD	X7, X3, #192

      (916) 0x461ec8 LDR	Q17, [X11, X30]

      (916) 0x461ecc LDR	Q16, [X13, X30]

      (916) 0x461ed0 STR	Q17, [X10, X30]

      (916) 0x461ed4 STR	Q16, [X12, X30]

      (916) 0x461ed8 ADD	X30, X3, #224

      (916) 0x461edc ADD	X3, X3, #256

      (916) 0x461ee0 LDR	Q19, [X11, X23]

      (916) 0x461ee4 LDR	Q18, [X13, X23]

      (916) 0x461ee8 STR	Q19, [X10, X23]

      (916) 0x461eec STR	Q18, [X12, X23]

      (916) 0x461ef0 LDR	Q21, [X11, X18]

      (916) 0x461ef4 LDR	Q20, [X13, X18]

      (916) 0x461ef8 STR	Q21, [X10, X18]

      (916) 0x461efc STR	Q20, [X12, X18]

      (916) 0x461f00 LDR	Q22, [X11, X14]

      (916) 0x461f04 LDR	Q1, [X13, X14]

      (916) 0x461f08 STR	Q22, [X10, X14]

      (916) 0x461f0c STR	Q1, [X12, X14]

      (916) 0x461f10 LDR	Q24, [X11, X7]

      (916) 0x461f14 LDR	Q23, [X13, X7]

      (916) 0x461f18 STR	Q24, [X10, X7]

      (916) 0x461f1c STR	Q23, [X12, X7]

      (916) 0x461f20 LDR	Q26, [X11, X30]

      (916) 0x461f24 LDR	Q25, [X13, X30]

      (916) 0x461f28 STR	Q26, [X10, X30]

      (916) 0x461f2c STR	Q25, [X12, X30]

      (916) 0x461f30 CMP	X17, X3

      (916) 0x461f34 B.NE	461e90

    (912) 0x461f38 AND	X14, X16, #8062

    (912) 0x461f3c ANDS	XZR, X16, #4160

    (912) 0x461f40 B.EQ	461f70

    (912) 0x461f44 ADD	X10, X14, X5

    (912) 0x461f48 ADD	X4, X14, X4

    (912) 0x461f4c SUB	X17, X16, X14

    (912) 0x461f50 ADD	X11, X26, X10,LSL #3

    (912) 0x461f54 WHILELO	P7.D, XZR, X17

    (912) 0x461f58 LD1D	{Z27.D}, P7/Z, [X27, X4,LSL #3]

    (912) 0x461f5c ST1D	{Z27.D}, P7, [X11, MUL VL]

    (912) 0x461f60 MOVZ	X12, #2

    (912) 0x461f64 ADD	X13, X27, X4,LSL #3

    (912) 0x461f68 WHILELO	P0.D, X12, X17

    (912) 0x461f6c B.NE	46223c

    (912) 0x461f70 ADD	X5, X5, X16

    (912) 0x461f74 LDR	X3, [X9, X0]

    (912) 0x461f78 LDR	X18, [X9, X15]

    (912) 0x461f7c CMP	X3, X18

    (912) 0x461f80 B.GE	461d28

    (912) 0x461f84 SUB	X14, X18, X3

    (912) 0x461f88 UBFM	X4, X5, #61, #60

    (912) 0x461f8c ADD	X0, X3, #1

    (912) 0x461f90 CMP	X14, #1

    (912) 0x461f94 B.EQ	462258

    (912) 0x461f98 ADD	X0, X3, #1

    (912) 0x461f9c ADD	X7, X26, X5,LSL #3

    (912) 0x461fa0 UBFM	X4, X5, #61, #60

    (912) 0x461fa4 ADD	X15, X28, X0,LSL #3

    (912) 0x461fa8 UBFM	X16, X0, #61, #60

    (912) 0x461fac SUB	X11, X7, X15

    (912) 0x461fb0 CMP	X11, #16

    (912) 0x461fb4 B.LS	462258

    (912) 0x461fb8 SUB	X0, X14, #1

    (912) 0x461fbc CMP	X0, #2

    (912) 0x461fc0 B.LS	4624ac

    (912) 0x461fc4 UBFM	X17, X14, #2, #63

    (912) 0x461fc8 SUB	X23, X16, #8

    (912) 0x461fcc UBFM	X15, X17, #59, #58

    (912) 0x461fd0 ADD	X10, X28, X23

    (912) 0x461fd4 SUB	X13, X15, #32

    (912) 0x461fd8 MOVZ	X0, #0

    (912) 0x461fdc UBFM	X18, X13, #5, #63

    (912) 0x461fe0 ADD	X12, X10, #16

    (912) 0x461fe4 ADD	X16, X18, #1

    (912) 0x461fe8 ADD	X11, X7, #16

    (912) 0x461fec ANDS	X30, X16, #4224

    (912) 0x461ff0 B.EQ	4620b8

    (912) 0x461ff4 CMP	X30, #1

    (912) 0x461ff8 B.EQ	46209c

    (912) 0x461ffc CMP	X30, #2

    (912) 0x462000 B.EQ	462088

    (912) 0x462004 CMP	X30, #3

    (912) 0x462008 B.EQ	462074

    (912) 0x46200c CMP	X30, #4

    (912) 0x462010 B.EQ	462060

    (912) 0x462014 CMP	X30, #5

    (912) 0x462018 B.EQ	46204c

    (912) 0x46201c CMP	X30, #6

    (912) 0x462020 B.EQ	462038

    (912) 0x462024 LDR	Q6, [X28, X23]

    (912) 0x462028 MOVZ	X0, #32

    (912) 0x46202c LDR	Q7, [X10, #16]

    (912) 0x462030 STR	Q6, [X26, X4]

    (912) 0x462034 STR	Q7, [X7, #16]

    (912) 0x462038 LDR	Q17, [X10, X0]

    (912) 0x46203c LDR	Q16, [X12, X0]

    (912) 0x462040 STR	Q17, [X7, X0]

    (912) 0x462044 STR	Q16, [X11, X0]

    (912) 0x462048 ADD	X0, X0, #32

    (912) 0x46204c LDR	Q19, [X10, X0]

    (912) 0x462050 LDR	Q18, [X12, X0]

    (912) 0x462054 STR	Q19, [X7, X0]

    (912) 0x462058 STR	Q18, [X11, X0]

    (912) 0x46205c ADD	X0, X0, #32

    (912) 0x462060 LDR	Q21, [X10, X0]

    (912) 0x462064 LDR	Q20, [X12, X0]

    (912) 0x462068 STR	Q21, [X7, X0]

    (912) 0x46206c STR	Q20, [X11, X0]

    (912) 0x462070 ADD	X0, X0, #32

    (912) 0x462074 LDR	Q22, [X10, X0]

    (912) 0x462078 LDR	Q1, [X12, X0]

    (912) 0x46207c STR	Q22, [X7, X0]

    (912) 0x462080 STR	Q1, [X11, X0]

    (912) 0x462084 ADD	X0, X0, #32

    (912) 0x462088 LDR	Q24, [X10, X0]

    (912) 0x46208c LDR	Q23, [X12, X0]

    (912) 0x462090 STR	Q24, [X7, X0]

    (912) 0x462094 STR	Q23, [X11, X0]

    (912) 0x462098 ADD	X0, X0, #32

    (912) 0x46209c LDR	Q26, [X10, X0]

    (912) 0x4620a0 LDR	Q25, [X12, X0]

    (912) 0x4620a4 STR	Q26, [X7, X0]

    (912) 0x4620a8 STR	Q25, [X11, X0]

    (912) 0x4620ac ADD	X0, X0, #32

    (912) 0x4620b0 CMP	X0, X15

    (912) 0x4620b4 B.EQ	462160

      (914) 0x4620b8 LDR	Q28, [X10, X0]

      (914) 0x4620bc ADD	X4, X0, #32

      (914) 0x4620c0 ADD	X23, X0, #64

      (914) 0x4620c4 ADD	X18, X0, #96

      (914) 0x4620c8 ADD	X17, X0, #128

      (914) 0x4620cc LDR	Q27, [X12, X0]

      (914) 0x4620d0 ADD	X16, X0, #160

      (914) 0x4620d4 ADD	X13, X0, #192

      (914) 0x4620d8 ADD	X30, X0, #224

      (914) 0x4620dc STR	Q28, [X7, X0]

      (914) 0x4620e0 STR	Q27, [X11, X0]

      (914) 0x4620e4 ADD	X0, X0, #256

      (914) 0x4620e8 LDR	Q0, [X10, X4]

      (914) 0x4620ec LDR	Q31, [X12, X4]

      (914) 0x4620f0 STR	Q0, [X7, X4]

      (914) 0x4620f4 STR	Q31, [X11, X4]

      (914) 0x4620f8 LDR	Q30, [X10, X23]

      (914) 0x4620fc LDR	Q2, [X12, X23]

      (914) 0x462100 STR	Q30, [X7, X23]

      (914) 0x462104 STR	Q2, [X11, X23]

      (914) 0x462108 LDR	Q4, [X10, X18]

      (914) 0x46210c LDR	Q3, [X12, X18]

      (914) 0x462110 STR	Q4, [X7, X18]

      (914) 0x462114 STR	Q3, [X11, X18]

      (914) 0x462118 LDR	Q5, [X10, X17]

      (914) 0x46211c LDR	Q29, [X12, X17]

      (914) 0x462120 STR	Q5, [X7, X17]

      (914) 0x462124 STR	Q29, [X11, X17]

      (914) 0x462128 LDR	Q7, [X10, X16]

      (914) 0x46212c LDR	Q6, [X12, X16]

      (914) 0x462130 STR	Q7, [X7, X16]

      (914) 0x462134 STR	Q6, [X11, X16]

      (914) 0x462138 LDR	Q17, [X10, X13]

      (914) 0x46213c LDR	Q16, [X12, X13]

      (914) 0x462140 STR	Q17, [X7, X13]

      (914) 0x462144 STR	Q16, [X11, X13]

      (914) 0x462148 LDR	Q19, [X10, X30]

      (914) 0x46214c LDR	Q18, [X12, X30]

      (914) 0x462150 STR	Q19, [X7, X30]

      (914) 0x462154 STR	Q18, [X11, X30]

      (914) 0x462158 CMP	X0, X15

      (914) 0x46215c B.NE	4620b8

    (912) 0x462160 AND	X30, X14, #8062

    (912) 0x462164 ANDS	XZR, X14, #4160

    (912) 0x462168 B.EQ	462198

    (912) 0x46216c ADD	X7, X30, X5

    (912) 0x462170 ADD	X3, X30, X3

    (912) 0x462174 SUB	X15, X14, X30

    (912) 0x462178 ADD	X10, X26, X7,LSL #3

    (912) 0x46217c WHILELO	P1.D, XZR, X15

    (912) 0x462180 LD1D	{Z20.D}, P1/Z, [X28, X3,LSL #3]

    (912) 0x462184 ST1D	{Z20.D}, P1, [X10, MUL VL]

    (912) 0x462188 MOVZ	X11, #2

    (912) 0x46218c ADD	X12, X28, X3,LSL #3

    (912) 0x462190 WHILELO	P2.D, X11, X15

    (912) 0x462194 B.NE	462248

    (912) 0x462198 ADD	X5, X5, X14

    (912) 0x46219c ADD	X6, X6, #1

    (912) 0x4621a0 CMP	X6, X8

    (912) 0x4621a4 B.NE	461d34

  (911) 0x4621a8 LDR	X8, [SP, #152]

  (911) 0x4621ac ADD	X2, X2, #1

  (911) 0x4621b0 CMP	X8, X2

  (911) 0x4621b4 B.NE	461d0c

(910) 0x4621b8 LDR	X9, [SP, #336]

(910) 0x4621bc LDR	X14, [SP, #368]

(910) 0x4621c0 LDR	X11, [SP, #152]

(910) 0x4621c4 LDR	X4, [SP, #176]

(910) 0x4621c8 STR	X1, [X14, #24]

(910) 0x4621cc LDR	X18, [X9, X19,LSL #3]

(910) 0x4621d0 STR	X11, [X14, #8]

(910) 0x4621d4 LDR	X23, [SP, #240]

(910) 0x4621d8 STR	X4, [X14, #40]

(910) 0x4621dc LDR	X17, [SP, #160]

(910) 0x4621e0 LDR	X23, [X18, X23]

(910) 0x4621e4 STR	X18, [X14, #56]

(910) 0x4621e8 CMP	X23, X17

(910) 0x4621ec B.GT	4624d8

(910) 0x4621f0 LDR	X3, [SP, #136]

(910) 0x4621f4 ORR	X2, XZR, X26

(910) 0x4621f8 MOVZ	X0, #1

(910) 0x4621fc LDR	X1, [SP, #368]

(910) 0x462200 BL	4fd0a4

(910) 0x462204 BL	4fd8ac

(910) 0x462208 LDR	X3, [SP, #304]

(910) 0x46220c LDR	X0, [X3, X19,LSL #3]

(910) 0x462210 BL	546e20

(910) 0x462214 LDR	X0, [SP, #304]

(910) 0x462218 LDR	X15, [SP, #336]

(910) 0x46221c STR	XZR, [X0, X19,LSL #3]

(910) 0x462220 LDR	X0, [X15, X19,LSL #3]

(910) 0x462224 BL	546e20

(910) 0x462228 LDR	X13, [SP, #336]

(910) 0x46222c STR	X23, [SP, #160]

(910) 0x462230 LDR	X23, [SP, #168]

(910) 0x462234 STR	XZR, [X13, X19,LSL #3]

(910) 0x462238 B	461b2c

    (912) 0x46223c LD1D	{Z28.D}, P0/Z, [X13, #1, MUL VL]

    (912) 0x462240 ST1D	{Z28.D}, P0, [X11, #1, MUL VL]

    (912) 0x462244 B	461f70

    (912) 0x462248 LD1D	{Z21.D}, P2/Z, [X12, #1, MUL VL]

    (912) 0x46224c ADD	X5, X5, X14

    (912) 0x462250 ST1D	{Z21.D}, P2, [X10, #1, MUL VL]

    (912) 0x462254 B	46219c

    (912) 0x462258 SUB	X4, X4, X3,LSL #3

    (912) 0x46225c SUB	X23, X18, X0

    (912) 0x462260 ANDS	X17, X23, #4224

    (912) 0x462264 ADD	X30, X26, X4

    (912) 0x462268 B.EQ	46234c

    (912) 0x46226c LDR	D1, [X28, X3,LSL #3]

    (912) 0x462270 STR	D1, [X30, X3,LSL #3]

    (912) 0x462274 ORR	X3, XZR, X0

    (912) 0x462278 ADD	X0, X0, #1

    (912) 0x46227c CMP	X17, #1

    (912) 0x462280 B.EQ	46234c

    (912) 0x462284 CMP	X17, #2

    (912) 0x462288 B.EQ	4622fc

    (912) 0x46228c CMP	X17, #3

    (912) 0x462290 B.EQ	4622ec

    (912) 0x462294 CMP	X17, #4

    (912) 0x462298 B.EQ	4622dc

    (912) 0x46229c CMP	X17, #5

    (912) 0x4622a0 B.EQ	4622cc

    (912) 0x4622a4 CMP	X17, #6

    (912) 0x4622a8 B.EQ	4622bc

    (912) 0x4622ac LDR	D22, [X28, X3,LSL #3]

    (912) 0x4622b0 STR	D22, [X30, X3,LSL #3]

    (912) 0x4622b4 ORR	X3, XZR, X0

    (912) 0x4622b8 ADD	X0, X0, #1

    (912) 0x4622bc LDR	D23, [X28, X3,LSL #3]

    (912) 0x4622c0 STR	D23, [X30, X3,LSL #3]

    (912) 0x4622c4 ORR	X3, XZR, X0

    (912) 0x4622c8 ADD	X0, X0, #1

    (912) 0x4622cc LDR	D24, [X28, X3,LSL #3]

    (912) 0x4622d0 STR	D24, [X30, X3,LSL #3]

    (912) 0x4622d4 ORR	X3, XZR, X0

    (912) 0x4622d8 ADD	X0, X0, #1

    (912) 0x4622dc LDR	D25, [X28, X3,LSL #3]

    (912) 0x4622e0 STR	D25, [X30, X3,LSL #3]

    (912) 0x4622e4 ORR	X3, XZR, X0

    (912) 0x4622e8 ADD	X0, X0, #1

    (912) 0x4622ec LDR	D26, [X28, X3,LSL #3]

    (912) 0x4622f0 STR	D26, [X30, X3,LSL #3]

    (912) 0x4622f4 ORR	X3, XZR, X0

    (912) 0x4622f8 ADD	X0, X0, #1

    (912) 0x4622fc LDR	D27, [X28, X3,LSL #3]

    (912) 0x462300 STR	D27, [X30, X3,LSL #3]

    (912) 0x462304 ORR	X3, XZR, X0

    (912) 0x462308 ADD	X0, X0, #1

    (912) 0x46230c B	46234c

      (913) 0x462310 LDR	D31, [X28, X0,LSL #3]

      (913) 0x462314 STR	D31, [X30, X0,LSL #3]

      (913) 0x462318 ADD	X0, X0, #8

      (913) 0x46231c LDR	D0, [X28, X16,LSL #3]

      (913) 0x462320 STR	D0, [X30, X16,LSL #3]

      (913) 0x462324 LDR	D2, [X28, X15,LSL #3]

      (913) 0x462328 STR	D2, [X30, X15,LSL #3]

      (913) 0x46232c LDR	D30, [X28, X13,LSL #3]

      (913) 0x462330 STR	D30, [X30, X13,LSL #3]

      (913) 0x462334 LDR	D3, [X28, X10,LSL #3]

      (913) 0x462338 STR	D3, [X30, X10,LSL #3]

      (913) 0x46233c LDR	D4, [X28, X12,LSL #3]

      (913) 0x462340 STR	D4, [X30, X12,LSL #3]

      (913) 0x462344 LDR	D29, [X28, X7,LSL #3]

      (913) 0x462348 STR	D29, [X30, X7,LSL #3]

      (913) 0x46234c LDR	D28, [X28, X3,LSL #3]

      (913) 0x462350 ADD	X16, X0, #1

      (913) 0x462354 ADD	X15, X0, #2

      (913) 0x462358 ADD	X13, X0, #3

      (913) 0x46235c ADD	X10, X0, #4

      (913) 0x462360 ADD	X12, X0, #5

      (913) 0x462364 ADD	X7, X0, #6

      (913) 0x462368 STR	D28, [X30, X3,LSL #3]

      (913) 0x46236c ADD	X3, X0, #7

      (913) 0x462370 CMP	X18, X0

      (913) 0x462374 B.NE	462310

    (912) 0x462378 ADD	X5, X5, X14

    (912) 0x46237c B	46219c

    (912) 0x462380 SUB	X23, X30, X4,LSL #3

    (912) 0x462384 SUB	X18, X11, X3

    (912) 0x462388 ANDS	X14, X18, #4224

    (912) 0x46238c ADD	X7, X26, X23

    (912) 0x462390 B.EQ	462474

    (912) 0x462394 LDR	D31, [X27, X4,LSL #3]

    (912) 0x462398 STR	D31, [X7, X4,LSL #3]

    (912) 0x46239c ORR	X4, XZR, X3

    (912) 0x4623a0 ADD	X3, X3, #1

    (912) 0x4623a4 CMP	X14, #1

    (912) 0x4623a8 B.EQ	462474

    (912) 0x4623ac CMP	X14, #2

    (912) 0x4623b0 B.EQ	462424

    (912) 0x4623b4 CMP	X14, #3

    (912) 0x4623b8 B.EQ	462414

    (912) 0x4623bc CMP	X14, #4

    (912) 0x4623c0 B.EQ	462404

    (912) 0x4623c4 CMP	X14, #5

    (912) 0x4623c8 B.EQ	4623f4

    (912) 0x4623cc CMP	X14, #6

    (912) 0x4623d0 B.EQ	4623e4

    (912) 0x4623d4 LDR	D0, [X27, X4,LSL #3]

    (912) 0x4623d8 STR	D0, [X7, X4,LSL #3]

    (912) 0x4623dc ORR	X4, XZR, X3

    (912) 0x4623e0 ADD	X3, X3, #1

    (912) 0x4623e4 LDR	D2, [X27, X4,LSL #3]

    (912) 0x4623e8 STR	D2, [X7, X4,LSL #3]

    (912) 0x4623ec ORR	X4, XZR, X3

    (912) 0x4623f0 ADD	X3, X3, #1

    (912) 0x4623f4 LDR	D30, [X27, X4,LSL #3]

    (912) 0x4623f8 STR	D30, [X7, X4,LSL #3]

    (912) 0x4623fc ORR	X4, XZR, X3

    (912) 0x462400 ADD	X3, X3, #1

    (912) 0x462404 LDR	D3, [X27, X4,LSL #3]

    (912) 0x462408 STR	D3, [X7, X4,LSL #3]

    (912) 0x46240c ORR	X4, XZR, X3

    (912) 0x462410 ADD	X3, X3, #1

    (912) 0x462414 LDR	D4, [X27, X4,LSL #3]

    (912) 0x462418 STR	D4, [X7, X4,LSL #3]

    (912) 0x46241c ORR	X4, XZR, X3

    (912) 0x462420 ADD	X3, X3, #1

    (912) 0x462424 LDR	D29, [X27, X4,LSL #3]

    (912) 0x462428 STR	D29, [X7, X4,LSL #3]

    (912) 0x46242c ORR	X4, XZR, X3

    (912) 0x462430 ADD	X3, X3, #1

    (912) 0x462434 B	462474

      (915) 0x462438 LDR	D5, [X27, X3,LSL #3]

      (915) 0x46243c STR	D5, [X7, X3,LSL #3]

      (915) 0x462440 ADD	X3, X3, #8

      (915) 0x462444 LDR	D6, [X27, X30,LSL #3]

      (915) 0x462448 STR	D6, [X7, X30,LSL #3]

      (915) 0x46244c LDR	D7, [X27, X17,LSL #3]

      (915) 0x462450 STR	D7, [X7, X17,LSL #3]

      (915) 0x462454 LDR	D16, [X27, X23,LSL #3]

      (915) 0x462458 STR	D16, [X7, X23,LSL #3]

      (915) 0x46245c LDR	D17, [X27, X13,LSL #3]

      (915) 0x462460 STR	D17, [X7, X13,LSL #3]

      (915) 0x462464 LDR	D18, [X27, X12,LSL #3]

      (915) 0x462468 STR	D18, [X7, X12,LSL #3]

      (915) 0x46246c LDR	D19, [X27, X10,LSL #3]

      (915) 0x462470 STR	D19, [X7, X10,LSL #3]

      (915) 0x462474 LDR	D5, [X27, X4,LSL #3]

      (915) 0x462478 ADD	X30, X3, #1

      (915) 0x46247c ADD	X17, X3, #2

      (915) 0x462480 ADD	X23, X3, #3

      (915) 0x462484 ADD	X13, X3, #4

      (915) 0x462488 ADD	X12, X3, #5

      (915) 0x46248c ADD	X10, X3, #6

      (915) 0x462490 STR	D5, [X7, X4,LSL #3]

      (915) 0x462494 ADD	X4, X3, #7

      (915) 0x462498 CMP	X11, X3

      (915) 0x46249c B.NE	462438

    (912) 0x4624a0 B	461f70

    (912) 0x4624a4 MOVZ	X14, #0

    (912) 0x4624a8 B	461f44

    (912) 0x4624ac MOVZ	X30, #0

    (912) 0x4624b0 B	46216c

(910) 0x4624b4 ORR	X0, XZR, X26

(910) 0x4624b8 BL	546e20

(910) 0x4624bc LDR	X0, [SP, #168]

(910) 0x4624c0 MOVZ	X1, #8

(910) 0x4624c4 BL	546d88

(910) 0x4624c8 LDR	X23, [SP, #304]

(910) 0x4624cc ORR	X26, XZR, X0

(910) 0x4624d0 LDR	X1, [X23, X19,LSL #3]

(910) 0x4624d4 B	461cf4

(910) 0x4624d8 LDR	X0, [SP, #136]

(910) 0x4624dc BL	546e20

(910) 0x4624e0 MOVZ	X1, #8

(910) 0x4624e4 ORR	X0, XZR, X23

(910) 0x4624e8 BL	546d88

(910) 0x4624ec STR	X0, [SP, #136]

(910) 0x4624f0 B	4621f0

0x4624f4 ORR	X25, XZR, X26

0x4624f8 LDR	X26, [SP, #224]

0x4624fc LDR	X0, [SP, #352]

0x462500 BL	546e20

0x462504 LDR	X0, [SP, #304]

0x462508 BL	546e20

0x46250c LDR	X0, [SP, #336]

0x462510 BL	546e20

0x462514 LDR	X0, [SP, #424]

0x462518 BL	546e20

0x46251c ORR	X0, XZR, X25

0x462520 BL	546e20

0x462524 LDR	X0, [SP, #136]

0x462528 BL	546e20

0x46252c LDR	X0, [SP, #208]

0x462530 BL	546e20

0x462534 LDR	X0, [SP, #184]

0x462538 BL	546e20

0x46253c ORR	X0, XZR, X24

0x462540 BL	546e20

0x462544 LDR	X0, [SP, #408]

0x462548 BL	546e20

0x46254c LDR	X0, [SP, #416]

0x462550 BL	546e20

0x462554 LDR	X0, [SP, #456]

0x462558 BL	546e20

0x46255c LDR	X0, [SP, #464]

0x462560 BL	546e20

0x462564 LDR	X0, [SP, #248]

0x462568 BL	546e20

0x46256c ORR	X0, XZR, X22

0x462570 BL	546e20

0x462574 ORR	X0, XZR, X26

0x462578 BL	546e20

0x46257c LDR	X0, [SP, #264]

0x462580 BL	546e20

0x462584 LDR	X0, [SP, #280]

0x462588 BL	546e20

0x46258c LDR	X0, [SP, #536]

0x462590 BL	546e20

0x462594 LDR	X0, [SP, #272]

0x462598 BL	546e20

0x46259c LDR	X22, [SP, #832]

0x4625a0 CMP	X22, #1

0x4625a4 B.LE	4625b0

0x4625a8 LDR	X0, [SP, #368]

0x4625ac BL	546e20

0x4625b0 LDR	X19, [SP, #312]

0x4625b4 MOVZ	X5, #0

0x4625b8 LDR	X21, [SP, #216]

0x4625bc LDR	X25, [SP, #256]

0x4625c0 UBFM	X24, X19, #61, #60

0x4625c4 LDR	X18, [SP, #680]

0x4625c8 ADD	X23, X21, X19,LSL #3

0x4625cc LDR	X7, [X21, X24]

0x4625d0 LDR	X6, [X25, X24]

0x4625d4 LDR	X1, [X18, #8]

0x4625d8 LDR	X3, [X18, #104]

0x4625dc LDR	X0, [SP, #400]

0x4625e0 LDR	X4, [SP, #688]

0x4625e4 LDR	X2, [SP, #840]

0x4625e8 BL	510520

0x4625ec LDR	X15, [SP, #144]

0x4625f0 FCMP	D15, #0

0x4625f4 ORR	X20, XZR, X0

0x4625f8 LDP	X4, X19, [X0, #56]

0x4625fc STP	X25, X15, [X4]

0x462600 STR	X27, [X4, #48]

0x462604 LDR	X27, [SP, #120]

0x462608 STR	X28, [X19, #48]

0x46260c LDR	X13, [SP, #728]

0x462610 STP	X21, X27, [X19]

0x462614 CCMP	X13, #0, #0, #0

0x462618 STR	XZR, [X0, #136]

0x46261c B.NE	462aac

0x462620 LDR	X24, [X23]

0x462624 CBZ	X24, 462a20

0x462628 LDR	X16, [SP, #192]

0x46262c LDR	X0, [SP, #472]

0x462630 CMP	X16, X0

0x462634 B.LT	46263c

0x462638 ORR	X0, XZR, X16

0x46263c MOVZ	X1, #8

0x462640 BL	546d88

0x462644 LDR	X8, [SP, #472]

0x462648 ORR	X27, XZR, X0

0x46264c ADRP	X12,

0x462650 MOVZ	W3, #0

0x462654 ADD	X0, X12, #2464

0x462658 LDR	X1, [SP, #296]

0x46265c MOVZ	W2, #0

0x462660 STR	X27, [SP, #848]

0x462664 STR	X8, [SP, #856]

0x462668 BL	410bc0

0x46266c CMP	X24, #0

0x462670 B.LE	462f40

0x462674 LDR	X2, [SP, #120]

0x462678 UBFM	X5, X24, #61, #60

0x46267c MOVZ	X9, #1

0x462680 SUB	X6, X5, #8

0x462684 MOVZ	X26, #0

0x462688 UBFM	X1, X6, #3, #63

0x46268c ADD	X14, X1, X9

0x462690 ANDS	X22, X14, #4224

0x462694 ADD	X3, X2, X24,LSL #3

0x462698 ORR	X0, XZR, X2

0x46269c B.EQ	46279c

0x4626a0 CMP	X22, X9

0x4626a4 B.EQ	462778

0x4626a8 CMP	X22, #2

0x4626ac B.EQ	46275c

0x4626b0 CMP	X22, #3

0x4626b4 B.EQ	462740

0x4626b8 CMP	X22, #4

0x4626bc B.EQ	462724

0x4626c0 CMP	X22, #5

0x4626c4 B.EQ	462708

0x4626c8 CMP	X22, #6

0x4626cc B.EQ	4626ec

0x4626d0 LDR	X0, [SP, #120]

0x4626d4 LDR	X21, [X0]

0x4626d8 ADD	X18, X27, X21,LSL #3

0x4626dc LDR	X11, [X18]

0x4626e0 CBZ	X11, 4632d8

0x4626e4 LDR	X4, [SP, #120]

0x4626e8 ADD	X0, X4, #8

0x4626ec LDR	X15, [X0]

0x4626f0 ADD	X13, X27, X15,LSL #3

0x4626f4 LDR	X10, [X13]

0x4626f8 CBNZ	X10, 462704

0x4626fc ADD	X26, X26, #1

0x462700 STR	X9, [X13]

0x462704 ADD	X0, X0, #8

0x462708 LDR	X17, [X0]

0x46270c ADD	X23, X27, X17,LSL #3

0x462710 LDR	X25, [X23]

0x462714 CBNZ	X25, 462720

0x462718 ADD	X26, X26, #1

0x46271c STR	X9, [X23]

0x462720 ADD	X0, X0, #8

0x462724 LDR	X30, [X0]

0x462728 ADD	X28, X27, X30,LSL #3

0x46272c LDR	X16, [X28]

0x462730 CBNZ	X16, 46273c

0x462734 ADD	X26, X26, #1

0x462738 STR	X9, [X28]

0x46273c ADD	X0, X0, #8

0x462740 LDR	X12, [X0]

0x462744 ADD	X8, X27, X12,LSL #3

0x462748 LDR	X7, [X8]

0x46274c CBNZ	X7, 462758

0x462750 ADD	X26, X26, #1

0x462754 STR	X9, [X8]

0x462758 ADD	X0, X0, #8

0x46275c LDR	X5, [X0]

0x462760 ADD	X6, X27, X5,LSL #3

0x462764 LDR	X1, [X6]

0x462768 CBNZ	X1, 462774

0x46276c ADD	X26, X26, #1

0x462770 STR	X9, [X6]

0x462774 ADD	X0, X0, #8

0x462778 LDR	X2, [X0]

0x46277c ADD	X14, X27, X2,LSL #3

0x462780 LDR	X22, [X14]

0x462784 CBNZ	X22, 462790

0x462788 ADD	X26, X26, #1

0x46278c STR	X9, [X14]

0x462790 ADD	X0, X0, #8

0x462794 CMP	X0, X3

0x462798 B.EQ	46286c

(909) 0x46279c LDR	X21, [X0]

(909) 0x4627a0 UBFM	X18, X21, #61, #60

(909) 0x4627a4 LDR	X11, [X27, X18]

(909) 0x4627a8 CBNZ	X11, 4627b4

(909) 0x4627ac ADD	X26, X26, #1

(909) 0x4627b0 STR	X9, [X27, X18]

(909) 0x4627b4 LDR	X4, [X0, #8]

(909) 0x4627b8 ADD	X0, X0, #8

(909) 0x4627bc UBFM	X15, X4, #61, #60

(909) 0x4627c0 LDR	X13, [X27, X15]

(909) 0x4627c4 CBNZ	X13, 4627d0

(909) 0x4627c8 ADD	X26, X26, #1

(909) 0x4627cc STR	X9, [X27, X15]

(909) 0x4627d0 LDR	X10, [X0, #8]

(909) 0x4627d4 UBFM	X17, X10, #61, #60

(909) 0x4627d8 LDR	X23, [X27, X17]

(909) 0x4627dc CBNZ	X23, 4627e8

(909) 0x4627e0 ADD	X26, X26, #1

(909) 0x4627e4 STR	X9, [X27, X17]

(909) 0x4627e8 LDR	X25, [X0, #16]

(909) 0x4627ec UBFM	X30, X25, #61, #60

(909) 0x4627f0 LDR	X28, [X27, X30]

(909) 0x4627f4 CBNZ	X28, 462800

(909) 0x4627f8 ADD	X26, X26, #1

(909) 0x4627fc STR	X9, [X27, X30]

(909) 0x462800 LDR	X16, [X0, #24]

(909) 0x462804 UBFM	X12, X16, #61, #60

(909) 0x462808 LDR	X8, [X27, X12]

(909) 0x46280c CBNZ	X8, 462818

(909) 0x462810 ADD	X26, X26, #1

(909) 0x462814 STR	X9, [X27, X12]

(909) 0x462818 LDR	X7, [X0, #32]

(909) 0x46281c UBFM	X5, X7, #61, #60

(909) 0x462820 LDR	X6, [X27, X5]

(909) 0x462824 CBNZ	X6, 462830

(909) 0x462828 ADD	X26, X26, #1

(909) 0x46282c STR	X9, [X27, X5]

(909) 0x462830 LDR	X1, [X0, #40]

(909) 0x462834 UBFM	X2, X1, #61, #60

(909) 0x462838 LDR	X14, [X27, X2]

(909) 0x46283c CBNZ	X14, 462848

(909) 0x462840 ADD	X26, X26, #1

(909) 0x462844 STR	X9, [X27, X2]

(909) 0x462848 LDR	X22, [X0, #48]

(909) 0x46284c UBFM	X21, X22, #61, #60

(909) 0x462850 LDR	X18, [X27, X21]

(909) 0x462854 CBNZ	X18, 462860

(909) 0x462858 ADD	X26, X26, #1

(909) 0x46285c STR	X9, [X27, X21]

(909) 0x462860 ADD	X0, X0, #56

(909) 0x462864 CMP	X0, X3

(909) 0x462868 B.NE	46279c

0x46286c ORR	X0, XZR, X26

0x462870 SUB	X7, X26, #1

0x462874 MOVZ	X1, #8

0x462878 STR	X7, [SP, #128]

0x46287c BL	546d88

0x462880 LDR	X21, [SP, #528]

0x462884 MOVZ	X1, #8

0x462888 ORR	X25, XZR, X0

0x46288c LDR	X3, [SP, #632]

0x462890 ADD	X9, X21, X3

0x462894 LDUR	X0, [X9, #504]

0x462898 BL	546d88

0x46289c LDR	X4, [SP, #328]

0x4628a0 ADRP	X11,

0x4628a4 ORR	X23, XZR, X0

0x4628a8 MOVZ	W3, #0

0x4628ac ADD	X0, X11, #2316

0x4628b0 STR	X21, [SP, #848]

0x4628b4 LDR	X1, [SP, #296]

0x4628b8 MOVZ	W2, #0

0x4628bc STR	X23, [SP, #856]

0x4628c0 SUB	X28, X4, #1

0x4628c4 STR	X4, [SP, #864]

0x4628c8 BL	410bc0

0x4628cc LDR	X13, [SP, #128]

0x4628d0 MOVZ	X1, #0

0x4628d4 MOVZ	X5, #0

0x4628d8 ADD	X15, X21, #8

0x4628dc LDR	X10, [SP, #520]

(907) 0x4628e0 LDR	X30, [X21, X1,LSL #3]

(907) 0x4628e4 LDR	X6, [X15, X1,LSL #3]

(907) 0x4628e8 CMP	X30, X6

(907) 0x4628ec B.GE	462924

  (908) 0x4628f0 LDR	X17, [X27, X30,LSL #3]

  (908) 0x4628f4 CBZ	X17, 462a90

  (908) 0x4628f8 LDR	X16, [X21, X1,LSL #3]

  (908) 0x4628fc LDR	X12, [X10, X1,LSL #3]

  (908) 0x462900 SUB	X8, X30, X16

  (908) 0x462904 LDR	X7, [X12, X8,LSL #3]

  (908) 0x462908 STR	X7, [X25, X5,LSL #3]

  (908) 0x46290c ADD	X5, X5, #1

  (908) 0x462910 STR	X7, [X23, X30,LSL #3]

  (908) 0x462914 ADD	X30, X30, #1

  (908) 0x462918 LDR	X6, [X15, X1,LSL #3]

  (908) 0x46291c CMP	X30, X6

  (908) 0x462920 B.LT	4628f0

(907) 0x462924 ADD	X1, X1, #1

(907) 0x462928 CMP	X1, X28

(907) 0x46292c B.NE	4628e0

0x462930 ORR	X2, XZR, X13

0x462934 MOVZ	X1, #0

0x462938 ORR	X0, XZR, X25

0x46293c BL	5474a8

0x462940 LDR	X22, [SP, #296]

0x462944 ADD	X9, SP, #848

0x462948 ADRP	X2,

0x46294c ADD	X0, X2, #3172

0x462950 MOVZ	W3, #0

0x462954 LDR	X14, [SP, #328]

0x462958 MOVZ	W2, #0

0x46295c LDR	X18, [SP, #528]

0x462960 ORR	X1, XZR, X22

0x462964 STP	X23, X14, [X9, #16]

0x462968 STP	X18, X25, [X9]

0x46296c STR	X26, [SP, #880]

0x462970 BL	410bc0

0x462974 LDR	X11, [SP, #120]

0x462978 ADRP	X0,

0x46297c ORR	X1, XZR, X22

0x462980 ADD	X0, X0, #1936

0x462984 MOVZ	W3, #0

0x462988 STR	X23, [SP, #856]

0x46298c MOVZ	W2, #0

0x462990 STR	X24, [SP, #864]

0x462994 STR	X11, [SP, #848]

0x462998 BL	410bc0

0x46299c ORR	X0, XZR, X27

0x4629a0 BL	546e20

0x4629a4 LDR	X24, [SP, #832]

0x4629a8 CMP	X24, #1

0x4629ac B.GT	462a40

(905) 0x4629b0 ORR	X0, XZR, X23

(905) 0x4629b4 BL	546e20

(905) 0x4629b8 LDR	X0, [SP, #520]

(905) 0x4629bc BL	546e20

(905) 0x4629c0 LDR	X0, [SP, #528]

(905) 0x4629c4 BL	546e20

(905) 0x4629c8 CBZ	X26, 4629d4

(905) 0x4629cc STR	X25, [X20, #88]

(905) 0x4629d0 STR	X26, [X19, #24]

(905) 0x4629d4 LDR	X19, [SP, #704]

(905) 0x4629d8 CBNZ	X19, 462a64

(905) 0x4629dc LDR	X3, [SP, #832]

(905) 0x4629e0 CMP	X3, #1

(905) 0x4629e4 B.LE	4629f0

(905) 0x4629e8 ORR	X0, XZR, X20

(905) 0x4629ec BL	4fee4c

(905) 0x4629f0 LDR	X4, [SP, #1200]

(905) 0x4629f4 MOVZ	X0, #0

(905) 0x4629f8 LDR	D15, [SP, #96]

(905) 0x4629fc STR	X20, [X4]

(905) 0x462a00 LDP	X29, X30, [SP]

(905) 0x462a04 LDP	X19, X20, [SP, #16]

(905) 0x462a08 LDP	X21, X22, [SP, #32]

(905) 0x462a0c LDP	X23, X24, [SP, #48]

(905) 0x462a10 LDP	X25, X26, [SP, #64]

(905) 0x462a14 LDP	X27, X28, [SP, #80]

(905) 0x462a18 ADD	SP, SP, #1184

(905) 0x462a1c RET

(905) 0x462a20 LDR	X17, [SP, #832]

(905) 0x462a24 CMP	X17, #1

(905) 0x462a28 B.LE	462d88

(905) 0x462a2c LDR	X30, [SP, #328]

(905) 0x462a30 MOVZ	X26, #0

(905) 0x462a34 MOVZ	X23, #0

(905) 0x462a38 MOVZ	X25, #0

(905) 0x462a3c SUB	X28, X30, #1

(905) 0x462a40 LDR	X27, [SP, #520]

(905) 0x462a44 ADD	X28, X27, W28,UXTW #3

(905) 0x462a48 ORR	X21, XZR, X27

  (906) 0x462a4c LDR	X0, [X21]

  (906) 0x462a50 BL	546e20

  (906) 0x462a54 STR	XZR, [X21], #8

  (906) 0x462a58 CMP	X21, X28

  (906) 0x462a5c B.NE	462a4c

(905) 0x462a60 B	4629b0

(905) 0x462a64 LDR	X26, [SP, #312]

(905) 0x462a68 ADRP	X23,

(905) 0x462a6c MOVZ	W3, #0

(905) 0x462a70 ADD	X0, X23, #2596

(905) 0x462a74 MOVZ	W2, #0

(905) 0x462a78 LDR	X25, [SP, #320]

(905) 0x462a7c LDR	X1, [SP, #296]

(905) 0x462a80 STR	X26, [SP, #856]

(905) 0x462a84 STR	X25, [SP, #848]

(905) 0x462a88 BL	410bc0

(905) 0x462a8c B	4629dc

  (908) 0x462a90 ADD	X30, X30, #1

  (908) 0x462a94 CMP	X30, X6

  (908) 0x462a98 B.LT	4628f0

(907) 0x462a9c ADD	X1, X1, #1

(907) 0x462aa0 CMP	X1, X28

(907) 0x462aa4 B.NE	4628e0

0x462aa8 B	462930

0x462aac LDR	X1, [SP, #728]

0x462ab0 FMOV	D0, D15

0x462ab4 BL	44e820

0x462ab8 LDP	X28, X10, [X19]

0x462abc ADD	X23, X28, X24

0x462ac0 STR	X10, [SP, #120]

0x462ac4 B	462620

0x462ac8 MOVZ	X1, #112

0x462acc MOVZ	X0, #1

0x462ad0 STR	X6, [SP, #120]

0x462ad4 STR	X7, [SP, #136]

0x462ad8 BL	546d88

0x462adc ORR	X6, XZR, X0

0x462ae0 MOVZ	X1, #8

0x462ae4 ORR	X0, XZR, X24

0x462ae8 STR	X6, [SP, #368]

0x462aec BL	546d88

0x462af0 ORR	X23, XZR, X0

0x462af4 MOVZ	X1, #8

0x462af8 ORR	X0, XZR, X24

0x462afc STR	X23, [SP, #304]

0x462b00 BL	546d88

0x462b04 ORR	X18, XZR, X0

0x462b08 MOVZ	X1, #8

0x462b0c ORR	X0, XZR, X24

0x462b10 STR	X18, [SP, #336]

0x462b14 BL	546d88

0x462b18 LDR	X28, [SP, #192]

0x462b1c ORR	X24, XZR, X0

0x462b20 MOVZ	X1, #8

0x462b24 ADD	X0, X28, #1

0x462b28 BL	546d88

0x462b2c STP	XZR, X0, [SP, #456]

0x462b30 LDR	X12, [SP, #120]

0x462b34 LDR	X4, [SP, #136]

0x462b38 CBNZ	X28, 462f24

0x462b3c STR	XZR, [SP, #376]

0x462b40 LDR	X14, [SP, #152]

0x462b44 LDR	X15, [SP, #200]

0x462b48 LDR	X0, [X15, X14,LSL #3]

0x462b4c CBNZ	X0, 462f04

0x462b50 LDR	X19, [SP, #296]

0x462b54 ADRP	X1,

0x462b58 MOVZ	W3, #0

0x462b5c ADD	X0, X1, #1800

0x462b60 MOVZ	W2, #0

0x462b64 STR	X12, [SP, #120]

0x462b68 LDR	X8, [SP, #192]

0x462b6c ADRP	X21,

0x462b70 STR	X4, [SP, #136]

0x462b74 LDR	X20, [SP, #464]

0x462b78 ORR	X1, XZR, X19

0x462b7c STR	X8, [SP, #848]

0x462b80 STR	X20, [SP, #856]

0x462b84 BL	410bc0

0x462b88 LDR	X2, [SP, #200]

0x462b8c ORR	X1, XZR, X19

0x462b90 ADD	X0, X21, #1664

0x462b94 MOVZ	W3, #0

0x462b98 LDR	X9, [SP, #152]

0x462b9c LDR	X7, [SP, #376]

0x462ba0 STR	X2, [SP, #856]

0x462ba4 MOVZ	W2, #0

0x462ba8 STR	X9, [SP, #848]

0x462bac STR	X7, [SP, #864]

0x462bb0 BL	410bc0

0x462bb4 LDR	X17, [SP, #328]

0x462bb8 LDR	X6, [SP, #120]

0x462bbc LDR	X7, [SP, #136]

0x462bc0 CMP	X17, #2

0x462bc4 B.NE	45fbc8

0x462bc8 MOVZ	X16, #0

0x462bcc STR	XZR, [SP, #224]

0x462bd0 B	460480

0x462bd4 MOVZ	X1, #8

0x462bd8 ORR	X0, XZR, X24

0x462bdc BL	546d88

0x462be0 STR	X0, [SP, #184]

0x462be4 MOVZ	X7, #0

0x462be8 LDR	X13, [SP, #120]

0x462bec CBNZ	X28, 462eec

0x462bf0 MOVZ	X1, #8

0x462bf4 ORR	X0, XZR, X24

0x462bf8 STR	X13, [SP, #120]

0x462bfc LDR	X28, [SP, #184]

0x462c00 STR	X7, [X28, #8]

0x462c04 BL	546d88

0x462c08 LDR	X8, [SP, #328]

0x462c0c ORR	X21, XZR, X0

0x462c10 MOVZ	X1, #8

0x462c14 STR	X21, [SP, #520]

0x462c18 ADD	X0, X8, #1

0x462c1c BL	546d88

0x462c20 LDR	X9, [SP, #496]

0x462c24 MOVZ	X7, #0

0x462c28 STR	X0, [SP, #528]

0x462c2c STR	X9, [SP, #472]

0x462c30 STP	XZR, X9, [X0]

0x462c34 LDR	X30, [SP, #264]

0x462c38 LDR	X4, [SP, #136]

0x462c3c LDR	X6, [SP, #120]

0x462c40 ADD	X17, X30, #8

0x462c44 STR	X4, [X21]

0x462c48 LDP	X5, X16, [X17]

0x462c4c CMP	X5, X16

0x462c50 B.LT	45fabc

0x462c54 LDR	X3, [SP, #128]

0x462c58 STR	X3, [SP, #624]

0x462c5c B	45fb9c

(904) 0x462c60 LDR	X0, [SP, #224]

(904) 0x462c64 BL	546e20

(904) 0x462c68 MOVZ	X1, #8

(904) 0x462c6c MOVZ	X0, #0

(904) 0x462c70 BL	546d88

(904) 0x462c74 STR	X0, [SP, #224]

(904) 0x462c78 B	46137c

(904) 0x462c7c MOVZ	X1, #8

(904) 0x462c80 ORR	X0, XZR, X22

(904) 0x462c84 BL	546d88

(904) 0x462c88 LDR	X24, [SP, #560]

(904) 0x462c8c ORR	X14, XZR, X0

(904) 0x462c90 MOVZ	X1, #8

(904) 0x462c94 ORR	X0, XZR, X22

(904) 0x462c98 STR	X14, [X24, X23,LSL #3]

(904) 0x462c9c BL	546d88

(904) 0x462ca0 ORR	X1, XZR, X0

(904) 0x462ca4 LDR	X2, [SP, #384]

(904) 0x462ca8 MOVZ	X0, #11

(904) 0x462cac STR	X1, [X21, X19,LSL #3]

(904) 0x462cb0 LDR	X3, [X24, X23,UXTW #3]

(904) 0x462cb4 LDR	X1, [SP, #368]

(904) 0x462cb8 BL	4fd0a4

(904) 0x462cbc BL	4fd8ac

(904) 0x462cc0 LDR	X2, [SP, #504]

(904) 0x462cc4 CMP	X22, X2

(904) 0x462cc8 B.GT	462d44

(904) 0x462ccc STR	X22, [SP, #504]

(904) 0x462cd0 B	46018c

(957) 0x462cd4 STR	X10, [X4, X3,LSL #3]

(957) 0x462cd8 SUB	X3, X3, #1

(957) 0x462cdc STR	XZR, [X2, X10,LSL #3]

(957) 0x462ce0 STR	XZR, [X14, X10,LSL #3]

(957) 0x462ce4 STR	X11, [X22, X10,LSL #3]

(957) 0x462ce8 STR	X11, [X15, X10,LSL #3]

(957) 0x462cec B	45ec44

(957) 0x462cf0 STR	X7, [X4, X3,LSL #3]

(957) 0x462cf4 SUB	X3, X3, #1

(957) 0x462cf8 STR	XZR, [X2, X7,LSL #3]

(957) 0x462cfc STR	XZR, [X14, X7,LSL #3]

(957) 0x462d00 STR	X9, [X22, X7,LSL #3]

(957) 0x462d04 STR	X9, [X15, X7,LSL #3]

(957) 0x462d08 B	45ec1c

(957) 0x462d0c STR	X0, [X4, X3,LSL #3]

(957) 0x462d10 SUB	X3, X3, #1

(957) 0x462d14 STR	XZR, [X2, X0,LSL #3]

(957) 0x462d18 STR	XZR, [X14, X0,LSL #3]

(957) 0x462d1c STR	X8, [X22, X0,LSL #3]

(957) 0x462d20 STR	X8, [X15, X0,LSL #3]

(957) 0x462d24 B	45ebf4

(957) 0x462d28 STR	X0, [X4, X3,LSL #3]

(957) 0x462d2c SUB	X3, X3, #1

(957) 0x462d30 STR	XZR, [X2, X0,LSL #3]

(957) 0x462d34 STR	XZR, [X14, X0,LSL #3]

(957) 0x462d38 STR	X30, [X22, X0,LSL #3]

(957) 0x462d3c STR	X30, [X15, X0,LSL #3]

(957) 0x462d40 B	45ebcc

(904) 0x462d44 LDR	X0, [SP, #224]

(904) 0x462d48 BL	546e20

(904) 0x462d4c MOVZ	X1, #8

(904) 0x462d50 ORR	X0, XZR, X22

(904) 0x462d54 BL	546d88

(904) 0x462d58 STR	X0, [SP, #224]

(904) 0x462d5c STR	X22, [SP, #504]

(904) 0x462d60 B	46018c

0x462d64 LDR	X5, [SP, #248]

0x462d68 LDR	X28, [SP, #360]

0x462d6c STR	X1, [X5, X0,LSL #3]

0x462d70 STR	X0, [X28, X1,LSL #3]

0x462d74 ADD	X1, X1, #1

0x462d78 STR	XZR, [X22, X0,LSL #3]

0x462d7c STR	X9, [X2, X0,LSL #3]

0x462d80 STR	XZR, [X14, X0,LSL #3]

0x462d84 B	45eb90

(905) 0x462d88 MOVZ	X0, #0

(905) 0x462d8c BL	546e20

(905) 0x462d90 LDR	X0, [SP, #520]

(905) 0x462d94 BL	546e20

(905) 0x462d98 LDR	X0, [SP, #528]

(905) 0x462d9c BL	546e20

(905) 0x462da0 B	4629d4

0x462da4 LDR	X21, [SP, #216]

0x462da8 LDR	X1, [SP, #256]

0x462dac B	4605e0

(904) 0x462db0 LDR	X22, [SP, #368]

(904) 0x462db4 LDR	X28, [SP, #712]

(904) 0x462db8 LDR	X4, [SP, #304]

(904) 0x462dbc ADD	X7, X22, #40

(904) 0x462dc0 LDR	X8, [SP, #720]

(904) 0x462dc4 STR	X28, [X22, #16]

(904) 0x462dc8 LDR	X6, [X4, X23,LSL #3]

(904) 0x462dcc STP	X24, X8, [X7]

(904) 0x462dd0 LDR	X0, [SP, #152]

(904) 0x462dd4 STR	X6, [X22, #24]

(904) 0x462dd8 LDR	X13, [SP, #400]

(904) 0x462ddc STP	X13, X0, [X22]

(904) 0x462de0 LDR	X10, [SP, #336]

(904) 0x462de4 LDR	X12, [X10, X23,LSL #3]

(904) 0x462de8 STR	X12, [X22, #56]

(904) 0x462dec B	461350

0x462df0 ORR	X21, XZR, X20

0x462df4 ORR	X20, XZR, X24

0x462df8 LDR	X28, [SP, #168]

0x462dfc MOVZ	X24, #16

0x462e00 ADD	X11, X24, W19,UXTW #3

0x462e04 STR	X11, [SP, #632]

0x462e08 LDR	X24, [SP, #288]

0x462e0c B	45fa28

0x462e10 MOVZ	X1, #8

0x462e14 STR	X8, [SP, #136]

0x462e18 MOVZ	X22, #0

0x462e1c BL	546d88

0x462e20 ORR	X4, XZR, X0

0x462e24 MOVZ	X1, #8

0x462e28 MOVZ	X0, #11

0x462e2c STR	X4, [SP, #280]

0x462e30 BL	546d88

0x462e34 LDR	X5, [SP, #136]

0x462e38 STR	XZR, [SP, #248]

0x462e3c STR	X0, [SP, #264]

0x462e40 B	45e850

0x462e44 LDR	X17, [SP, #432]

0x462e48 CMP	X17, #1

0x462e4c B.GT	45f8c8

0x462e50 MOVZ	X1, #1

0x462e54 MOVZ	X20, #0

0x462e58 STR	XZR, [SP, #152]

0x462e5c STR	XZR, [SP, #176]

0x462e60 STR	X1, [SP, #552]

0x462e64 B	45ea4c

0x462e68 STP	XZR, XZR, [SP, #440]

0x462e6c B	45e7b8

0x462e70 LDR	X16, [X24, #8]

0x462e74 ORR	X19, XZR, X21

0x462e78 STR	X23, [SP, #192]

0x462e7c LDR	X17, [X24, #48]

0x462e80 STR	XZR, [SP, #1192]

0x462e84 STR	X16, [SP, #448]

0x462e88 STR	X17, [SP, #440]

0x462e8c B	45e7c4

0x462e90 MOVZ	X1, #8

0x462e94 STR	X6, [SP, #136]

0x462e98 BL	546d88

0x462e9c LDR	X18, [SP, #176]

0x462ea0 ORR	X20, XZR, X0

0x462ea4 LDR	X15, [SP, #152]

0x462ea8 LDR	X6, [SP, #136]

0x462eac ADD	X28, X18, #1

0x462eb0 CMP	X15, #0

0x462eb4 STR	X28, [SP, #552]

0x462eb8 B.GT	45e908

0x462ebc LDR	X16, [SP, #832]

0x462ec0 CMP	X16, #1

0x462ec4 B.LE	45ea4c

0x462ec8 B	45e984

0x462ecc LDR	X27, [SP, #680]

0x462ed0 ORR	X0, XZR, X27

0x462ed4 BL	4fee4c

0x462ed8 LDR	X1, [X27, #112]

0x462edc LDR	X18, [SP, #120]

0x462ee0 STR	X1, [SP, #344]

0x462ee4 CBZ	X23, 45f100

0x462ee8 B	462e70

0x462eec ORR	X0, XZR, X28

0x462ef0 MOVZ	X1, #8

0x462ef4 BL	546d88

0x462ef8 LDR	X13, [SP, #120]

0x462efc ORR	X7, XZR, X0

0x462f00 B	462bf0

0x462f04 MOVZ	X1, #8

0x462f08 STR	X12, [SP, #120]

0x462f0c STR	X4, [SP, #136]

0x462f10 BL	546d88

0x462f14 LDR	X12, [SP, #120]

0x462f18 STR	X0, [SP, #376]

0x462f1c LDR	X4, [SP, #136]

0x462f20 B	462b50

0x462f24 LDR	X0, [SP, #192]

0x462f28 MOVZ	X1, #8

0x462f2c BL	546d88

0x462f30 LDR	X12, [SP, #120]

0x462f34 STR	X0, [SP, #456]

0x462f38 LDR	X4, [SP, #136]

0x462f3c B	462b3c

0x462f40 MOVZ	X0, #0

0x462f44 MOVZ	X26, #0

0x462f48 MOVN	X7, #0

0x462f4c B	462874

0x462f50 LDR	X0, [SP, #360]

0x462f54 BL	546e20

0x462f58 LDR	X2, [SP, #136]

0x462f5c B	461a7c

0x462f60 MOVZ	X25, #0

0x462f64 STR	XZR, [SP, #136]

0x462f68 B	4624fc

0x462f6c LDR	X0, [SP, #360]

0x462f70 BL	546e20

0x462f74 LDR	X1, [SP, #136]

0x462f78 B	4607f4

(904) 0x462f7c LDR	X1, [SP, #344]

(904) 0x462f80 ORR	X3, XZR, X27

(904) 0x462f84 MOVZ	X0, #11

(904) 0x462f88 LDR	X2, [SP, #376]

(904) 0x462f8c BL	4fd0a4

(904) 0x462f90 BL	4fd8ac

(904) 0x462f94 LDR	X12, [SP, #544]

(904) 0x462f98 TBNZ	X12, #63, 462fa4

(904) 0x462f9c STR	XZR, [SP, #544]

(904) 0x462fa0 B	460174

(904) 0x462fa4 LDR	X0, [SP, #384]

(904) 0x462fa8 BL	546e20

(904) 0x462fac MOVZ	X1, #8

(904) 0x462fb0 MOVZ	X0, #0

(904) 0x462fb4 BL	546d88

(904) 0x462fb8 STR	X0, [SP, #384]

(904) 0x462fbc STR	XZR, [SP, #544]

(904) 0x462fc0 B	460174

0x462fc4 LDR	X11, [SP, #280]

0x462fc8 LDR	X12, [SP, #248]

0x462fcc STR	X0, [X11, X3,LSL #3]

0x462fd0 SUB	X3, X3, #1

0x462fd4 STR	XZR, [X2, X0,LSL #3]

0x462fd8 STR	XZR, [X14, X0,LSL #3]

0x462fdc STR	X9, [X22, X0,LSL #3]

0x462fe0 STR	X9, [X12, X0,LSL #3]

0x462fe4 B	45eb90

0x462fe8 LDR	X16, [SP, #280]

0x462fec LDR	X17, [SP, #248]

0x462ff0 STR	X0, [X16, X3,LSL #3]

0x462ff4 SUB	X3, X3, #1

0x462ff8 STR	XZR, [X2, X0,LSL #3]

0x462ffc STR	XZR, [X14, X0,LSL #3]

0x463000 STR	X15, [X22, X0,LSL #3]

0x463004 STR	X15, [X17, X0,LSL #3]

0x463008 ADD	X0, X0, #1

0x46300c B	45eb64

0x463010 LDR	X30, [SP, #248]

0x463014 LDR	X8, [SP, #360]

0x463018 STR	X1, [X30, X0,LSL #3]

0x46301c STR	X0, [X8, X1,LSL #3]

0x463020 ADD	X1, X1, #1

0x463024 STR	XZR, [X22, X0,LSL #3]

0x463028 STR	X15, [X2, X0,LSL #3]

0x46302c STR	XZR, [X14, X0,LSL #3]

0x463030 ADD	X0, X0, #1

0x463034 B	45eb64

0x463038 MOVZ	X1, #8

0x46303c STR	X12, [SP, #136]

0x463040 BL	546d88

0x463044 ORR	X27, XZR, X0

0x463048 MOVZ	X1, #8

0x46304c MOVZ	X0, #11

0x463050 STR	X27, [SP, #280]

0x463054 BL	546d88

0x463058 LDR	X15, [SP, #136]

0x46305c STR	X0, [SP, #264]

0x463060 B	45f1a0

0x463064 LDR	X0, [SP, #192]

0x463068 MOVZ	X1, #8

0x46306c STR	X6, [SP, #136]

0x463070 BL	546d88

0x463074 LDR	X8, [SP, #832]

0x463078 STR	X0, [SP, #424]

0x46307c LDR	X6, [SP, #136]

0x463080 CMP	X8, #1

0x463084 B.GT	45e8a8

0x463088 B	45f8c8

0x46308c MOVZ	X24, #2

0x463090 MOVZ	X27, #16

0x463094 STR	X24, [SP, #328]

0x463098 STR	X27, [SP, #632]

0x46309c B	45fa28

0x4630a0 LDR	X11, [X21, X1,LSL #3]

0x4630a4 MOVN	X7, #0

0x4630a8 LDR	X12, [X19, X0,LSL #3]

0x4630ac CMP	X11, X12

0x4630b0 B.EQ	4632ac

0x4630b4 LDR	X3, [SP, #272]

0x4630b8 STR	X7, [X3, X1,LSL #3]

0x4630bc ADD	X1, X1, #1

0x4630c0 LDR	X13, [SP, #192]

0x4630c4 CMP	X13, X0

0x4630c8 B.LE	45efe0

0x4630cc LDR	X5, [X21, X1,LSL #3]

0x4630d0 MOVN	X2, #0

0x4630d4 LDR	X24, [X19, X0,LSL #3]

0x4630d8 CMP	X5, X24

0x4630dc B.NE	4630e8

0x4630e0 ORR	X2, XZR, X0

0x4630e4 ADD	X0, X0, #1

0x4630e8 LDR	X14, [SP, #272]

0x4630ec STR	X2, [X14, X1,LSL #3]

0x4630f0 ADD	X1, X1, #1

0x4630f4 CMP	X23, X1

0x4630f8 B.EQ	45f01c

0x4630fc LDR	X28, [SP, #192]

0x463100 B	46310c

0x463104 LDR	X28, [SP, #192]

0x463108 LDR	X14, [SP, #272]

(952) 0x46310c CMP	X28, X0

(952) 0x463110 B.LE	45efe0

(952) 0x463114 LDR	X18, [X21, X1,LSL #3]

(952) 0x463118 MOVN	X16, #0

(952) 0x46311c LDR	X15, [X19, X0,LSL #3]

(952) 0x463120 CMP	X18, X15

(952) 0x463124 B.NE	463130

(952) 0x463128 ORR	X16, XZR, X0

(952) 0x46312c ADD	X0, X0, #1

(952) 0x463130 STR	X16, [X14, X1,LSL #3]

(952) 0x463134 ADD	X1, X1, #1

(952) 0x463138 ORR	X17, XZR, X1

(952) 0x46313c CMP	X28, X0

(952) 0x463140 B.LE	45efe0

(952) 0x463144 LDR	X30, [X21, X1,LSL #3]

(952) 0x463148 MOVN	X1, #0

(952) 0x46314c LDR	X9, [X19, X0,LSL #3]

(952) 0x463150 CMP	X30, X9

(952) 0x463154 B.NE	463160

(952) 0x463158 ORR	X1, XZR, X0

(952) 0x46315c ADD	X0, X0, #1

(952) 0x463160 STR	X1, [X14, X17,LSL #3]

(952) 0x463164 ADD	X1, X17, #1

(952) 0x463168 CMP	X28, X0

(952) 0x46316c B.LE	45efe0

(952) 0x463170 LDR	X10, [X21, X1,LSL #3]

(952) 0x463174 MOVN	X4, #0

(952) 0x463178 LDR	X8, [X19, X0,LSL #3]

(952) 0x46317c CMP	X10, X8

(952) 0x463180 B.NE	46318c

(952) 0x463184 ORR	X4, XZR, X0

(952) 0x463188 ADD	X0, X0, #1

(952) 0x46318c STR	X4, [X14, X1,LSL #3]

(952) 0x463190 ADD	X1, X17, #2

(952) 0x463194 CMP	X28, X0

(952) 0x463198 B.LE	45efe0

(952) 0x46319c LDR	X11, [X21, X1,LSL #3]

(952) 0x4631a0 MOVN	X7, #0

(952) 0x4631a4 LDR	X12, [X19, X0,LSL #3]

(952) 0x4631a8 CMP	X11, X12

(952) 0x4631ac B.NE	4631b8

(952) 0x4631b0 ORR	X7, XZR, X0

(952) 0x4631b4 ADD	X0, X0, #1

(952) 0x4631b8 STR	X7, [X14, X1,LSL #3]

(952) 0x4631bc ADD	X1, X17, #3

(952) 0x4631c0 CMP	X28, X0

(952) 0x4631c4 B.LE	45efe0

(952) 0x4631c8 LDR	X3, [X21, X1,LSL #3]

(952) 0x4631cc MOVN	X5, #0

(952) 0x4631d0 LDR	X13, [X19, X0,LSL #3]

(952) 0x4631d4 CMP	X3, X13

(952) 0x4631d8 B.NE	4631e4

(952) 0x4631dc ORR	X5, XZR, X0

(952) 0x4631e0 ADD	X0, X0, #1

(952) 0x4631e4 STR	X5, [X14, X1,LSL #3]

(952) 0x4631e8 ADD	X1, X17, #4

(952) 0x4631ec CMP	X28, X0

(952) 0x4631f0 B.LE	45efe0

(952) 0x4631f4 LDR	X24, [X21, X1,LSL #3]

(952) 0x4631f8 MOVN	X18, #0

(952) 0x4631fc LDR	X2, [X19, X0,LSL #3]

(952) 0x463200 CMP	X24, X2

(952) 0x463204 B.NE	463210

(952) 0x463208 ORR	X18, XZR, X0

(952) 0x46320c ADD	X0, X0, #1

(952) 0x463210 STR	X18, [X14, X1,LSL #3]

(952) 0x463214 ADD	X1, X17, #5

(952) 0x463218 CMP	X28, X0

(952) 0x46321c B.LE	45efe0

(952) 0x463220 LDR	X15, [X21, X1,LSL #3]

(952) 0x463224 MOVN	X30, #0

(952) 0x463228 LDR	X16, [X19, X0,LSL #3]

(952) 0x46322c CMP	X15, X16

(952) 0x463230 B.NE	46323c

(952) 0x463234 ORR	X30, XZR, X0

(952) 0x463238 ADD	X0, X0, #1

(952) 0x46323c STR	X30, [X14, X1,LSL #3]

(952) 0x463240 ADD	X1, X17, #6

(952) 0x463244 CMP	X28, X0

(952) 0x463248 B.LE	45efe0

(952) 0x46324c LDR	X9, [X21, X1,LSL #3]

(952) 0x463250 MOVN	X8, #0

(952) 0x463254 LDR	X10, [X19, X0,LSL #3]

(952) 0x463258 CMP	X9, X10

(952) 0x46325c B.EQ	4632b8

(952) 0x463260 STR	X8, [X14, X1,LSL #3]

(952) 0x463264 ADD	X1, X17, #7

(952) 0x463268 CMP	X23, X1

(952) 0x46326c B.NE	46310c

0x463270 B	45f01c

0x463274 LDR	X1, [SP, #248]

0x463278 MOVZ	X0, #1

0x46327c LDR	X28, [SP, #360]

0x463280 STR	XZR, [X1]

0x463284 ORR	X1, XZR, X12

0x463288 STR	XZR, [X28]

0x46328c STR	XZR, [X22]

0x463290 STR	X12, [X2]

0x463294 STR	XZR, [X14]

0x463298 B	45eb34

0x46329c LDR	X18, [SP, #432]

0x4632a0 CMP	X18, #1

0x4632a4 B.GT	45e9c0

0x4632a8 B	45ea4c

0x4632ac ORR	X7, XZR, X0

0x4632b0 ADD	X0, X0, #1

0x4632b4 B	4630b4

(952) 0x4632b8 ORR	X8, XZR, X0

(952) 0x4632bc ADD	X0, X0, #1

(952) 0x4632c0 B	463260

0x4632c4 UBFM	X27, X19, #61, #31

0x4632c8 ORR	X21, XZR, X23

0x4632cc STR	X19, [SP, #328]

0x4632d0 STR	X27, [SP, #632]

0x4632d4 B	45fa28

0x4632d8 ORR	X26, XZR, X9

0x4632dc STR	X9, [X18]

0x4632e0 B	4626e4

0x4632e4 HINT	#0

0x4632e8 HINT	#0

0x4632ec HINT	#0

0x4632f0 HINT	#0

0x4632f4 HINT	#0

0x4632f8 HINT	#0

0x4632fc HINT	#0

Coverage (%)	Name	Source Location	Module
►100.00+	hypre_BoomerAMGSetup	par_amg_setup.c:737	exec
○	hypre_PCGSetup	pcg.c:234	exec
○	main	amg.c:398	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	amg.c:253	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_2

Source file and lines	par_multi_interp.c:41-2061
Module	exec

The function is defined in /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:41-71,83-108,114-131,146-150,185-186,194,202-208,216-223,229-241,252-261,267-272,278-333,340,346-351,381-469,479-518,525-536,544-557,568-576,583-636,643-685,691-706,717-759,768-891,1140-1161,1167,1177-1184,1304-1369,1562-1566,1575,1669-1705,1711-1737,1884-1915,1921-1938,1944-1997,2007-2032,2038-2043,2061.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 290.67 to 23.25 cycles (12.50x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is not vectorized. Only 52% of vector register length is used (average across all VPU instructions). By fully vectorizing your function, you can lower the cost of an iteration from 290.67 to 230.17 cycles (1.26x speedup).

Details

0% of VPU instructions are used in vector version (process two or more data elements in vector registers):

0% of VPU loads are used in vector version.
0% of VPU stores are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
1% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 290.67 to 57.50 cycles (5.06x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 4032 bytes. The binary function is storing 3280 bytes.

General properties

nb instructions	1685
loop length	6740
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

209.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	139.50	139.50	106.33	106.33	106.33	106.33	106.33	106.33	1.50	1.50	1.50	1.50	290.67	290.67	290.67	192.00	192.00
cycles	139.50	139.50	106.33	106.33	106.33	106.33	106.33	106.33	1.50	1.50	1.50	1.50	290.67	290.67	290.67	192.00	192.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	209.75
Overall L1	290.67

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	1%

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	1%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 290.67 cycles. At this rate:

14% of peak load performance is reached (13.87 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
23% of peak store performance is reached (11.28 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 45e600

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
SUB SP, SP, #1184	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X6, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X8, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X29, X30, [SP]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ADD X29, SP, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STR X0, [SP, #680]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #56	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STR D15, [SP, #96]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
FMOV D15, D0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
LDP X22, X24, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
MOVZ X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X4, [SP, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X3, [SP, #688]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X3, X20, [X2, #56]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
STR X5, [SP, #584]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X7, [SP, #728]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [X20]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X4, [SP, #616]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X5, [SP, #488]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X7, [SP, #400]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X9, X10, [X22]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
STR X9, [SP, #600]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X10, [SP, #608]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X11, X12, [X3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
STR X12, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X11, [SP, #480]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X13, [X20, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [X22, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X19, [X2, #88]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X13, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X2, [X2, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X14, [SP, #592]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X23, [X24, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X21, [X8, #88]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X2, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X26, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X0, [SP, #640]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 549980 <hypre_NumThreads>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X0, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X15, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X15, [SP, #648]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #656]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X1, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45e71c <hypre_BoomerAMGBuildMultipass+0x11c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [SP, #640]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X28, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X26, [SP, #400]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X1, SP, #832	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X18, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X0, XZR, X26	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 548c40 <hypre_MPI_Comm_size>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X1, SP, #824	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X26	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 548c70 <hypre_MPI_Comm_rank>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #688]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [SP, #824]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X6]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X8, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X3, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
STR X4, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B.NE 45e76c <hypre_BoomerAMGBuildMultipass+0x16c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [SP, #688]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X5, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X7, [SP, #840]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADRP X9, <58176c>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LDR X4, [SP, #400]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X10, X9, #1280	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, SP, #840	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X8, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X2, XZR, X10	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X10, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 549328 <hypre_MPI_Bcast>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X18, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X11, 45f0ec <hypre_BoomerAMGBuildMultipass+0xaec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X12, [SP, #1192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X12, 45f0fc <hypre_BoomerAMGBuildMultipass+0xafc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X23, 462e68 <hypre_BoomerAMGBuildMultipass+0x4868>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X24, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X24, [X24, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X2, [SP, #448]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X24, [SP, #440]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X13, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [SP, #392]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBZ X13, 45e7cc <hypre_BoomerAMGBuildMultipass+0x1cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X20, [X20, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X20, [SP, #392]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X0, [X22, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X18, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 45f124 <hypre_BoomerAMGBuildMultipass+0xb24>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X30, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X1, SP, #848	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X26, SP, #848	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADRP X28, 45e7e8 <hypre_BoomerAMGBuildMultipass+0x1e8>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X28, #736	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP XZR, XZR, [X26, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X30, XZR, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
BL 410bc0 <@plt_start@+0x440>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #872]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X3, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X0, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUBS X0, X3, X6	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
STR X6, [SP, #704]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B.NE 462e10 <hypre_BoomerAMGBuildMultipass+0x4810>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X8, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X22, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X5, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X18, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X20, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X0, [SP, #760]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X28, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X28, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X0, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X0, X6, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
CBNZ X0, 45f8e0 <hypre_BoomerAMGBuildMultipass+0x12e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X0, 45f898 <hypre_BoomerAMGBuildMultipass+0x1298>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CMP X16, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 462e44 <hypre_BoomerAMGBuildMultipass+0x4844>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X25, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X25, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X9, X25, #24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP X4, X5, [X3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
ORR X7, XZR, X25	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X11, X7, #40	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X12, [X7, #56]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X4, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
UBFM X24, X4, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X5, [SP, #712]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X10, X25, [X9]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
STR X10, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X2, X13, [X11]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
STR X12, [SP, #664]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X0, [X10, X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X2, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X13, [SP, #720]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 462e90 <hypre_BoomerAMGBuildMultipass+0x4890>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X27, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X14, X2, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X20, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X14, [SP, #552]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CMP X27, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45e984 <hypre_BoomerAMGBuildMultipass+0x384>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X27, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X26, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X1, X17, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X3, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X30, X1, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X15, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X15, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 46329c <hypre_BoomerAMGBuildMultipass+0x4c9c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X1, X3, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
ORR X2, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 4fd0a4 <hypre_ParCSRCommHandleCreate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
BL 4fd8ac <hypre_ParCSRCommHandleDestroy>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X28, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45ea4c <hypre_BoomerAMGBuildMultipass+0x44c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X16, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X1, X16, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X17, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45ea20 <hypre_BoomerAMGBuildMultipass+0x420>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X26, [SP, #584]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X5, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X24, X1, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X1, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X1, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45ea4c <hypre_BoomerAMGBuildMultipass+0x44c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X2, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [SP, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 4fd0a4 <hypre_ParCSRCommHandleCreate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
BL 4fd8ac <hypre_ParCSRCommHandleDestroy>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X15, SP, #848	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADRP X27, <20045da50>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X28, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X27, #4032	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X18, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STP XZR, XZR, [X15, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X28, X18, [X15]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
LDR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 410bc0 <@plt_start@+0x440>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [SP, #872]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X3, [SP, #496]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X28, 45f830 <hypre_BoomerAMGBuildMultipass+0x1230>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X26, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X24, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #536]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X16, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X30, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X8, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X30]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUB X27, X17, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X8, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45ed00 <hypre_BoomerAMGBuildMultipass+0x700>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ANDS X7, X8, #4160	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
ORR X3, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X10, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X13, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X14, X9, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X2, X10, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B.EQ 45eba0 <hypre_BoomerAMGBuildMultipass+0x5a0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X7, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45eb64 <hypre_BoomerAMGBuildMultipass+0x564>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X7, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45eb34 <hypre_BoomerAMGBuildMultipass+0x534>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X11]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X12, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 463274 <hypre_BoomerAMGBuildMultipass+0x4c74>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMN X12, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 45eb1c <hypre_BoomerAMGBuildMultipass+0x51c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X3, X27, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [X0, X27,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [X2]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X13, [X22]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X13, [X5]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X15, [X18, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X15, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 463010 <hypre_BoomerAMGBuildMultipass+0x4a10>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMN X15, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 462fe8 <hypre_BoomerAMGBuildMultipass+0x49e8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X2, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X13, [X22, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X13, [X4, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X7, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X9, [X7, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X9, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 462d64 <hypre_BoomerAMGBuildMultipass+0x4764>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMN X9, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 462fc4 <hypre_BoomerAMGBuildMultipass+0x49c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X10, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X2, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X13, [X22, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X13, [X10, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X18, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45ed00 <hypre_BoomerAMGBuildMultipass+0x700>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X15, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X16, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 45ec54 <hypre_BoomerAMGBuildMultipass+0x654>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X10, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X13, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X12, X2, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X14, X12, X13,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X13, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45ed78 <hypre_BoomerAMGBuildMultipass+0x778>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X18, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X13, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X13, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45eda4 <hypre_BoomerAMGBuildMultipass+0x7a4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X3, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X2, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 4fd0a4 <hypre_ParCSRCommHandleCreate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
BL 4fd8ac <hypre_ParCSRCommHandleDestroy>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X0, [SP, #552]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR XZR, [SP, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #672]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X0, [SP, #496]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X0, 45f884 <hypre_BoomerAMGBuildMultipass+0x1284>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [SP, #672]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X28, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X2]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CMP X28, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45ee58 <hypre_BoomerAMGBuildMultipass+0x858>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #664]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X18, X28, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X7, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X5, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
UBFM X15, X18, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X17, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X16, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X30, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X4, X8, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X9, [SP, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [SP, #536]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X14, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X24, [SP, #1192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X24, 45f8f4 <hypre_BoomerAMGBuildMultipass+0x12f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X23, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
STR X0, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B.LE 45f01c <hypre_BoomerAMGBuildMultipass+0xa1c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ANDS X14, X23, #4224	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOVZ X1, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B.EQ 463104 <hypre_BoomerAMGBuildMultipass+0x4b04>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4630c0 <hypre_BoomerAMGBuildMultipass+0x4ac0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45efd4 <hypre_BoomerAMGBuildMultipass+0x9d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45efa0 <hypre_BoomerAMGBuildMultipass+0x9a0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45ef6c <hypre_BoomerAMGBuildMultipass+0x96c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45ef38 <hypre_BoomerAMGBuildMultipass+0x938>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #6	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45ef04 <hypre_BoomerAMGBuildMultipass+0x904>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X28, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45efe0 <hypre_BoomerAMGBuildMultipass+0x9e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [X19]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X18, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X15, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X30, [X21]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X30, X17	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
CSEL X9, X18, X15, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CSEL X0, X0, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X10]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X8, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X8, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45efe0 <hypre_BoomerAMGBuildMultipass+0x9e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [X21, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X12, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X11, [X19, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X4, X11	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 45ef2c <hypre_BoomerAMGBuildMultipass+0x92c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X12, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X3, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X12, [X3, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X7, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X7, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45efe0 <hypre_BoomerAMGBuildMultipass+0x9e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X13, [X21, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X5, [X19, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X13, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 45ef60 <hypre_BoomerAMGBuildMultipass+0x960>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X2, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X24, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X2, [X24, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X14, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X14, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45efe0 <hypre_BoomerAMGBuildMultipass+0x9e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [X21, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X15, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X18, [X19, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X28, X18	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 45ef94 <hypre_BoomerAMGBuildMultipass+0x994>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X15, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X16, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X15, [X16, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X17, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X17, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45efe0 <hypre_BoomerAMGBuildMultipass+0x9e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X30, [X21, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X10, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X9, [X19, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X30, X9	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 45efc8 <hypre_BoomerAMGBuildMultipass+0x9c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X10, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X8, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X10, [X8, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X4, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X4, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 4630a0 <hypre_BoomerAMGBuildMultipass+0x4aa0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X21, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X19, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X21, [X0, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CMP X23, X19	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45f01c <hypre_BoomerAMGBuildMultipass+0xa1c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB X23, X23, X19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, X19,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W1, #255	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
UBFM X14, X23, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X28, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CSEL X2, X14, X28, #12	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 4108c0 <@plt_start@+0x140>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STP XZR, XZR, [X17]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
TBNZ X27, #63, 45f904 <hypre_BoomerAMGBuildMultipass+0x1304>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X28, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X4, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X13, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X7, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
UBFM X8, X27, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP X15, X16, [SP, #480]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
MOVZ X23, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X12, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X30, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X9, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [SP, #392]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X19, [SP, #680]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [X19, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X14, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBZ X14, 462ecc <hypre_BoomerAMGBuildMultipass+0x48cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBNZ X23, 462e70 <hypre_BoomerAMGBuildMultipass+0x4870>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP XZR, XZR, [SP, #440]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X19, XZR, X21	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [X22, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X18, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #392]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #1192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBZ X0, 45e7dc <hypre_BoomerAMGBuildMultipass+0x1dc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X24, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X1, SP, #848	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X10, SP, #848	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADRP X11, <20045e13c>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STR X0, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X11, #736	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP XZR, XZR, [X10, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X9, X24, [X10]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
BL 410bc0 <@plt_start@+0x440>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X13, [SP, #872]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X2, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X14, X24, X13	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X13, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUBS X0, X14, X2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
STR X2, [SP, #704]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B.NE 463038 <hypre_BoomerAMGBuildMultipass+0x4a38>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X12, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X15, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X0, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X15, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X22, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 45e850 <hypre_BoomerAMGBuildMultipass+0x250>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 45ed78 <hypre_BoomerAMGBuildMultipass+0x778>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 45ee58 <hypre_BoomerAMGBuildMultipass+0x858>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X13, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X4, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUB X24, X13, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X12, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X30, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X12, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X23, [X30, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X9, X4, X14,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X14, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45f2e8 <hypre_BoomerAMGBuildMultipass+0xce8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X11, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45f314 <hypre_BoomerAMGBuildMultipass+0xd14>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X3, XZR, X26	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X2, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 4fd0a4 <hypre_ParCSRCommHandleCreate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
BL 4fd8ac <hypre_ParCSRCommHandleDestroy>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X19, <581314>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X1, SP, #808	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X13, X19, #1800	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X3, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X2, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X4, XZR, X13	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, SP, #816	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X24, [SP, #816]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [SP, #400]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X13, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 549550 <hypre_MPI_Allreduce>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X24, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X12, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X15, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [SP, #808]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X9, X24, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X21, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X10, X15, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X10, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBZ X14, 46308c <hypre_BoomerAMGBuildMultipass+0x4a8c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X24, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X11, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X27, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X20, XZR, X21	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X30, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X28, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X21, [SP, #392]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X28, XZR, X12	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X27, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X0, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X26, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X4, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X4, [SP, #536]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X24, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [SP, #496]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45ea9c <hypre_BoomerAMGBuildMultipass+0x49c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45edc8 <hypre_BoomerAMGBuildMultipass+0x7c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X26, [SP, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X26, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 463064 <hypre_BoomerAMGBuildMultipass+0x4a64>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X30, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [SP, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CMP X30, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 45e8a8 <hypre_BoomerAMGBuildMultipass+0x2a8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X20, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #552]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45ea4c <hypre_BoomerAMGBuildMultipass+0x44c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45e88c <hypre_BoomerAMGBuildMultipass+0x28c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP XZR, XZR, [X17]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
TBZ X27, #63, 45f028 <hypre_BoomerAMGBuildMultipass+0xa28>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X28, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X23, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X24, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45f270 <hypre_BoomerAMGBuildMultipass+0xc70>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X27, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X23, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X20, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X19, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X21, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 45fa18 <hypre_BoomerAMGBuildMultipass+0x1418>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X21, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X20, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X24, #10	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X23, #80	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X24, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X23, [SP, #632]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X0, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X21, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X19, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X20, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X15, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X15, [X19, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X0, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X12, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X12, [SP, #408]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X18, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #416]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X18, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 462bd4 <hypre_BoomerAMGBuildMultipass+0x45d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X30, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X7, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #472]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #520]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #528]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X17, X30, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP X5, X16, [X17]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
CMP X5, X16	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 462c54 <hypre_BoomerAMGBuildMultipass+0x4654>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X4, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP X14, X15, [SP, #480]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDR X27, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X23, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X18, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X13, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X28, [SP, #392]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [SP, #536]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X30, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X11, X30, X4	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X11, [SP, #624]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X27, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X27, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 462ac8 <hypre_BoomerAMGBuildMultipass+0x44c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X24, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #304]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #336]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP XZR, XZR, [SP, #456]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
CMP X17, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 462bc8 <hypre_BoomerAMGBuildMultipass+0x45c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X5, <200458bc8>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ X3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR D31, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
MOVZ X19, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X23, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X24, [SP, #560]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X24, X5, #588	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X25, [SP, #568]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X25, XZR, X22	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVN X22, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X27, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
DUP V0.2D, V31.D[0]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
STR X6, [SP, #736]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #464]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X30, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X21, [SP, #520]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X11, X30, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X6, X27, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X3, [SP, #384]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X20, [SP, #528]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X27, X18, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #504]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #544]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X22, [SP, #576]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X7, [SP, #696]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X11, [SP, #744]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X6, [SP, #752]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR Q0, [SP, #768]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STR X24, [SP, #784]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X16, [SP, #384]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X22, XZR, X25	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X24, [SP, #560]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X25, [SP, #568]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [SP, #696]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #736]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X16, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ X28, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X7, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #672]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #648]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #656]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #640]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X21, [SP, #624]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X21	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X27, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X21	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X27, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X20, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X27, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X20, 4618d0 <hypre_BoomerAMGBuildMultipass+0x32d0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X14, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 460678 <hypre_BoomerAMGBuildMultipass+0x2078>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X30, [SP, #760]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X23, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X7, X30, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X16, X7, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
UBFM X9, X16, #3, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X2, X23, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X8, X9, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ANDS X15, X8, #4160	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
SUB X3, X17, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B.EQ 462da4 <hypre_BoomerAMGBuildMultipass+0x47a4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X15, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4605a4 <hypre_BoomerAMGBuildMultipass+0x1fa4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X15, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 460578 <hypre_BoomerAMGBuildMultipass+0x1f78>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X0, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X18, [X3, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X13, [X4, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X12, X13, X18	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X12, [X4, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X10, [X2, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X11, [X5, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X1, X11, X10	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X1, [X5, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X20, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X21, [X3, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X30, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X19, [X20, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X14, X19, X21	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X14, [X20, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X17, [X2, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X16, [X30, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X9, X16, X17	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X30, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X15, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [X3, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X13, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X23, [X15, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X18, X23, X8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X18, [X15, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [X2, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X13, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X10, X12, X4	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X10, [X13, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X0, X7	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 460678 <hypre_BoomerAMGBuildMultipass+0x2078>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X21, XZR, X13	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X19, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X0, <20045767c>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #3216	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X7, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X27, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X23, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X19, [SP, #880]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X21, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X7, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X23, [SP, #888]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X21, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X6, [SP, #872]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410bc0 <@plt_start@+0x440>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [SP, #1184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X18, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X2, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP X1, X4, [X3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
SUB X13, X4, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CBZ X12, 461964 <hypre_BoomerAMGBuildMultipass+0x3364>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X20, <20045a6e0>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X18, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X20, #3584	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X9, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X27, [SP, #936]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X5, [SP, #952]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X7, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X9, [SP, #928]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X23, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X28, [SP, #960]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X7, [SP, #944]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X16, [SP, #440]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X23, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X12, [SP, #448]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X18, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X11, [SP, #584]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X16, [SP, #904]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X17, [SP, #592]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X12, [SP, #920]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X15, [SP, #600]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X11, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X30, [SP, #608]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X17, [SP, #880]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X10, [SP, #616]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X15, [SP, #888]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [SP, #1192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X30, [SP, #896]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X10, [SP, #912]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X6, [SP, #968]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X4, [SP, #872]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X8, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X13, [SP, #1096]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X17, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X8, [SP, #976]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X10, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X17, [SP, #1056]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X23, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X4, [SP, #1048]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X30, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X10, [SP, #1088]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X20, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X23, [SP, #1024]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X16, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X30, [SP, #1072]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X13, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X20, [SP, #1016]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X21, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X16, [SP, #1080]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X11, [SP, #408]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X13, [SP, #984]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #416]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X21, [SP, #1000]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X19, [SP, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X11, [SP, #1032]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X14, [SP, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X18, [SP, #1040]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X15, [SP, #536]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X19, [SP, #992]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X14, [SP, #1008]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X15, [SP, #1064]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410bc0 <@plt_start@+0x440>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X2, X1, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
CBNZ X2, 462f6c <hypre_BoomerAMGBuildMultipass+0x496c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X1, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X0, [SP, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X19, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X19, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X9, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X3, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 460834 <hypre_BoomerAMGBuildMultipass+0x2234>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X21, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X21, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X21, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X7, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X7, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 462f60 <hypre_BoomerAMGBuildMultipass+0x4960>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X5, <200459844>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ X23, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X6, X5, #1856	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X20, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X14, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X21, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X17, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X13, X8, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X26, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X26, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X18, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X11, X14, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X13, [SP, #232]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X19, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X15, X17, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X11, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X6, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X4, X18, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X15, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X9, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X4, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 460a44 <hypre_BoomerAMGBuildMultipass+0x2444>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 45fb90 <hypre_BoomerAMGBuildMultipass+0x1590>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X20, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X19, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X28, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 460500 <hypre_BoomerAMGBuildMultipass+0x1f00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X10, <20045c968>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X10, #4080	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X18, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X7, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X27, [SP, #936]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X19, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X6, [SP, #952]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X21, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X7, [SP, #928]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X20, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X28, [SP, #960]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X11, [SP, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X21, [SP, #944]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X8, [SP, #440]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X20, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X15, [SP, #448]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X11, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [SP, #584]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X8, [SP, #904]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X14, [SP, #592]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X15, [SP, #920]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X30, [SP, #600]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X5, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X16, [SP, #608]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X14, [SP, #880]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X9, [SP, #616]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X30, [SP, #888]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X17, [SP, #1192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X16, [SP, #896]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X9, [SP, #912]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X19, [SP, #968]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X17, [SP, #872]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X23, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X13, [SP, #1096]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X14, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X23, [SP, #976]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X9, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X14, [SP, #1056]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X20, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X17, [SP, #1048]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X16, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X9, [SP, #1088]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X10, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X20, [SP, #1024]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X8, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X16, [SP, #1072]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X10, [SP, #1016]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X13, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X8, [SP, #1080]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [SP, #408]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X18, [SP, #984]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X11, [SP, #416]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X13, [SP, #1000]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [SP, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X5, [SP, #1032]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X12, [SP, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X11, [SP, #1040]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X30, [SP, #536]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X4, [SP, #992]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X12, [SP, #1008]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X30, [SP, #1064]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410bc0 <@plt_start@+0x440>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X0, X2, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
CBNZ X0, 462f50 <hypre_BoomerAMGBuildMultipass+0x4950>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X2, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X0, [SP, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X21, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X21, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X21, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X15, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X3, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 461abc <hypre_BoomerAMGBuildMultipass+0x34bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X19, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X15, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X19, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X7, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X7, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 462f60 <hypre_BoomerAMGBuildMultipass+0x4960>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X18, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X6, <20045bacc>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ X23, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X4, X6, #3168	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X19, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X12, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X21, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X17, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X13, X18, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X26, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X26, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X5, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X10, X12, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X13, [SP, #232]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X20, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X14, X17, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X10, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X4, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X11, X5, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X14, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X15, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X11, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 461ccc <hypre_BoomerAMGBuildMultipass+0x36cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X25, XZR, X26	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X26, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #304]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #336]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X25	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #408]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #416]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #456]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #464]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X22	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X26	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #536]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X22, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X22, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 4625b0 <hypre_BoomerAMGBuildMultipass+0x3fb0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #368]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X5, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X21, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X25, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X24, X19, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X18, [SP, #680]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X23, X21, X19,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X7, [X21, X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X25, X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X1, [X18, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X18, #104]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [SP, #400]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [SP, #688]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X2, [SP, #840]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 510520 <hypre_ParCSRMatrixCreate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X15, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
FCMP D15, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
ORR X20, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP X4, X19, [X0, #56]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
STP X25, X15, [X4]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STR X27, [X4, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X27, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X28, [X19, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X13, [SP, #728]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STP X21, X27, [X19]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
CCMP X13, #0, #0, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	1	scal (50.0%)
STR XZR, [X0, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B.NE 462aac <hypre_BoomerAMGBuildMultipass+0x44ac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X24, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X24, 462a20 <hypre_BoomerAMGBuildMultipass+0x4420>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [SP, #472]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X16, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 46263c <hypre_BoomerAMGBuildMultipass+0x403c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #472]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X27, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADRP X12, <20045764c>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X12, #2464	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X27, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X8, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410bc0 <@plt_start@+0x440>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X24, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 462f40 <hypre_BoomerAMGBuildMultipass+0x4940>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X5, X24, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X9, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X6, X5, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X26, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
UBFM X1, X6, #3, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X14, X1, X9	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ANDS X22, X14, #4224	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
ADD X3, X2, X24,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B.EQ 46279c <hypre_BoomerAMGBuildMultipass+0x419c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, X9	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 462778 <hypre_BoomerAMGBuildMultipass+0x4178>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 46275c <hypre_BoomerAMGBuildMultipass+0x415c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, #3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 462740 <hypre_BoomerAMGBuildMultipass+0x4140>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, #4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 462724 <hypre_BoomerAMGBuildMultipass+0x4124>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, #5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 462708 <hypre_BoomerAMGBuildMultipass+0x4108>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, #6	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4626ec <hypre_BoomerAMGBuildMultipass+0x40ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X21, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X18, X27, X21,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X11, [X18]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X11, 4632d8 <hypre_BoomerAMGBuildMultipass+0x4cd8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X4, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X15, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X13, X27, X15,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X10, [X13]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X10, 462704 <hypre_BoomerAMGBuildMultipass+0x4104>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X26, X26, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X13]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X17, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X23, X27, X17,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X25, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X25, 462720 <hypre_BoomerAMGBuildMultipass+0x4120>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X26, X26, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X30, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X28, X27, X30,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X16, [X28]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X16, 46273c <hypre_BoomerAMGBuildMultipass+0x413c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X26, X26, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X28]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X12, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X8, X27, X12,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X7, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X7, 462758 <hypre_BoomerAMGBuildMultipass+0x4158>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X26, X26, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X5, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X6, X27, X5,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X1, [X6]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X1, 462774 <hypre_BoomerAMGBuildMultipass+0x4174>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X26, X26, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X6]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X2, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X14, X27, X2,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X22, [X14]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X22, 462790 <hypre_BoomerAMGBuildMultipass+0x4190>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X26, X26, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X14]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X0, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 46286c <hypre_BoomerAMGBuildMultipass+0x426c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X26	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X7, X26, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X7, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X21, [SP, #528]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X25, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X3, [SP, #632]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X9, X21, X3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDUR X0, [X9, #504]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X11, <2004578a0>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X23, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X11, #2316	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X21, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X23, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUB X28, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X4, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410bc0 <@plt_start@+0x440>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X13, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X5, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X15, X21, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X10, [SP, #520]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X2, XZR, X13	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X25	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 5474a8 <hypre_qsort0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X22, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X9, SP, #848	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADRP X2, <20045d948>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X0, X2, #3172	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X14, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X18, [SP, #528]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X1, XZR, X22	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X23, X14, [X9, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X18, X25, [X9]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STR X26, [SP, #880]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410bc0 <@plt_start@+0x440>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X0, <200457978>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X1, XZR, X22	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #1936	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X23, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X24, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X11, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410bc0 <@plt_start@+0x440>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X24, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X24, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 462a40 <hypre_BoomerAMGBuildMultipass+0x4440>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 462930 <hypre_BoomerAMGBuildMultipass+0x4330>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #728]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
FMOV D0, D15	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
BL 44e820 <hypre_BoomerAMGInterpTruncation>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X28, X10, [X19]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
ADD X23, X28, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X10, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 462620 <hypre_BoomerAMGBuildMultipass+0x4020>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #112	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X7, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X6, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #368]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X23, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X23, [SP, #304]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X18, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X18, [SP, #336]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X24, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X28, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP XZR, X0, [SP, #456]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
LDR X12, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X28, 462f24 <hypre_BoomerAMGBuildMultipass+0x4924>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR XZR, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X14, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X15, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X15, X14,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X0, 462f04 <hypre_BoomerAMGBuildMultipass+0x4904>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X1, <200457b54>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X1, #1800	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X12, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X8, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X21, <200457b6c>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STR X4, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X20, [SP, #464]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X1, XZR, X19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X8, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X20, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410bc0 <@plt_start@+0x440>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X1, XZR, X19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X21, #1664	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X9, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X2, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X7, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410bc0 <@plt_start@+0x440>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X17, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 45fbc8 <hypre_BoomerAMGBuildMultipass+0x15c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X16, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 460480 <hypre_BoomerAMGBuildMultipass+0x1e80>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X0, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ X7, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X13, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X28, 462eec <hypre_BoomerAMGBuildMultipass+0x48ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X13, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X28, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X7, [X28, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X21, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X21, [SP, #520]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X8, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [SP, #496]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X7, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X0, [SP, #528]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X9, [SP, #472]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP XZR, X9, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
LDR X30, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X17, X30, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X4, [X21]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X5, X16, [X17]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
CMP X5, X16	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 45fabc <hypre_BoomerAMGBuildMultipass+0x14bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X3, [SP, #624]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45fb9c <hypre_BoomerAMGBuildMultipass+0x159c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X28, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X1, [X5, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [X28, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [X22, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X9, [X2, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45eb90 <hypre_BoomerAMGBuildMultipass+0x590>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X21, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X1, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 4605e0 <hypre_BoomerAMGBuildMultipass+0x1fe0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X21, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X20, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X28, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X24, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X11, X24, W19,UXTW #3	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
STR X11, [SP, #632]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X24, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 45fa28 <hypre_BoomerAMGBuildMultipass+0x1428>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X8, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ X22, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X4, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X4, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45e850 <hypre_BoomerAMGBuildMultipass+0x250>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [SP, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X17, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 45f8c8 <hypre_BoomerAMGBuildMultipass+0x12c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X20, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X1, [SP, #552]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45ea4c <hypre_BoomerAMGBuildMultipass+0x44c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP XZR, XZR, [SP, #440]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
B 45e7b8 <hypre_BoomerAMGBuildMultipass+0x1b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [X24, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X19, XZR, X21	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X23, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X17, [X24, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [SP, #1192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X16, [SP, #448]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X17, [SP, #440]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45e7c4 <hypre_BoomerAMGBuildMultipass+0x1c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X18, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X20, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X15, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X28, X18, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X15, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
STR X28, [SP, #552]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B.GT 45e908 <hypre_BoomerAMGBuildMultipass+0x308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X16, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45ea4c <hypre_BoomerAMGBuildMultipass+0x44c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 45e984 <hypre_BoomerAMGBuildMultipass+0x384>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X27, [SP, #680]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X0, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 4fee4c <hypre_MatvecCommPkgCreate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [X27, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X18, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X1, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBZ X23, 45f100 <hypre_BoomerAMGBuildMultipass+0xb00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 462e70 <hypre_BoomerAMGBuildMultipass+0x4870>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X28	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X13, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X7, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 462bf0 <hypre_BoomerAMGBuildMultipass+0x45f0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X12, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X4, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X12, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 462b50 <hypre_BoomerAMGBuildMultipass+0x4550>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X12, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #456]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 462b3c <hypre_BoomerAMGBuildMultipass+0x453c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X0, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X26, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVN X7, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 462874 <hypre_BoomerAMGBuildMultipass+0x4274>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 461a7c <hypre_BoomerAMGBuildMultipass+0x347c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X25, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 4624fc <hypre_BoomerAMGBuildMultipass+0x3efc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 4607f4 <hypre_BoomerAMGBuildMultipass+0x21f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [X11, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUB X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [X2, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X9, [X22, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X9, [X12, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45eb90 <hypre_BoomerAMGBuildMultipass+0x590>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [X16, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUB X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [X2, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X15, [X22, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X15, [X17, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 45eb64 <hypre_BoomerAMGBuildMultipass+0x564>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X30, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X1, [X30, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [X8, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [X22, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X15, [X2, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 45eb64 <hypre_BoomerAMGBuildMultipass+0x564>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X12, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X27, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X27, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X15, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45f1a0 <hypre_BoomerAMGBuildMultipass+0xba0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X8, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 45e8a8 <hypre_BoomerAMGBuildMultipass+0x2a8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 45f8c8 <hypre_BoomerAMGBuildMultipass+0x12c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X24, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X27, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X24, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X27, [SP, #632]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45fa28 <hypre_BoomerAMGBuildMultipass+0x1428>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [X21, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X7, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X12, [X19, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X11, X12	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4632ac <hypre_BoomerAMGBuildMultipass+0x4cac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X7, [X3, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X13, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X13, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45efe0 <hypre_BoomerAMGBuildMultipass+0x9e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [X21, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X24, [X19, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X5, X24	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 4630e8 <hypre_BoomerAMGBuildMultipass+0x4ae8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X2, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X14, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X2, [X14, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X23, X1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45f01c <hypre_BoomerAMGBuildMultipass+0xa1c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 46310c <hypre_BoomerAMGBuildMultipass+0x4b0c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 45f01c <hypre_BoomerAMGBuildMultipass+0xa1c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X28, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X1]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X1, XZR, X12	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [X28]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X22]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X12, [X2]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45eb34 <hypre_BoomerAMGBuildMultipass+0x534>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X18, [SP, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X18, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 45e9c0 <hypre_BoomerAMGBuildMultipass+0x3c0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 45ea4c <hypre_BoomerAMGBuildMultipass+0x44c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X7, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 4630b4 <hypre_BoomerAMGBuildMultipass+0x4ab4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X27, X19, #61, #31	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X21, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X19, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X27, [SP, #632]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45fa28 <hypre_BoomerAMGBuildMultipass+0x1428>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X26, XZR, X9	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X18]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 4626e4 <hypre_BoomerAMGBuildMultipass+0x40e4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_2

Source file and lines	par_multi_interp.c:41-2061
Module	exec

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

0% of VPU instructions are used in vector version (process two or more data elements in vector registers):

0% of VPU loads are used in vector version.
0% of VPU stores are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
1% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 290.67 to 57.50 cycles (5.06x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 4032 bytes. The binary function is storing 3280 bytes.

General properties

nb instructions	1685
loop length	6740
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

209.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	139.50	139.50	106.33	106.33	106.33	106.33	106.33	106.33	1.50	1.50	1.50	1.50	290.67	290.67	290.67	192.00	192.00
cycles	139.50	139.50	106.33	106.33	106.33	106.33	106.33	106.33	1.50	1.50	1.50	1.50	290.67	290.67	290.67	192.00	192.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	209.75
Overall L1	290.67

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	1%

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	1%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 290.67 cycles. At this rate:

14% of peak load performance is reached (13.87 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
23% of peak store performance is reached (11.28 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 45e600

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
SUB SP, SP, #1184	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X6, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X8, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X29, X30, [SP]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ADD X29, SP, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STR X0, [SP, #680]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #56	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STR D15, [SP, #96]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
FMOV D15, D0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
LDP X22, X24, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
MOVZ X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X4, [SP, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X3, [SP, #688]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X3, X20, [X2, #56]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
STR X5, [SP, #584]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X7, [SP, #728]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [X20]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X4, [SP, #616]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X5, [SP, #488]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X7, [SP, #400]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X9, X10, [X22]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
STR X9, [SP, #600]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X10, [SP, #608]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X11, X12, [X3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
STR X12, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X11, [SP, #480]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X13, [X20, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [X22, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X19, [X2, #88]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X13, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X2, [X2, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X14, [SP, #592]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X23, [X24, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X21, [X8, #88]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X2, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X26, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X0, [SP, #640]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 549980 <hypre_NumThreads>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X0, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X15, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X15, [SP, #648]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #656]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X1, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45e71c <hypre_BoomerAMGBuildMultipass+0x11c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [SP, #640]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X28, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X26, [SP, #400]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X1, SP, #832	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X18, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X0, XZR, X26	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 548c40 <hypre_MPI_Comm_size>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X1, SP, #824	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X26	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 548c70 <hypre_MPI_Comm_rank>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #688]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [SP, #824]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X6]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X8, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X3, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
STR X4, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B.NE 45e76c <hypre_BoomerAMGBuildMultipass+0x16c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [SP, #688]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X5, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X7, [SP, #840]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADRP X9, <58176c>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LDR X4, [SP, #400]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X10, X9, #1280	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, SP, #840	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X8, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X2, XZR, X10	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X10, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 549328 <hypre_MPI_Bcast>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X18, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X11, 45f0ec <hypre_BoomerAMGBuildMultipass+0xaec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X12, [SP, #1192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X12, 45f0fc <hypre_BoomerAMGBuildMultipass+0xafc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X23, 462e68 <hypre_BoomerAMGBuildMultipass+0x4868>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X24, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X24, [X24, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X2, [SP, #448]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X24, [SP, #440]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X13, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [SP, #392]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBZ X13, 45e7cc <hypre_BoomerAMGBuildMultipass+0x1cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X20, [X20, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X20, [SP, #392]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X0, [X22, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X18, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 45f124 <hypre_BoomerAMGBuildMultipass+0xb24>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X30, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X1, SP, #848	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X26, SP, #848	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADRP X28, 45e7e8 <hypre_BoomerAMGBuildMultipass+0x1e8>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X28, #736	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP XZR, XZR, [X26, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X30, XZR, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
BL 410bc0 <@plt_start@+0x440>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #872]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X3, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X0, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUBS X0, X3, X6	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
STR X6, [SP, #704]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B.NE 462e10 <hypre_BoomerAMGBuildMultipass+0x4810>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X8, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X22, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X5, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X18, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X20, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X0, [SP, #760]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X28, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X28, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X0, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X0, X6, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
CBNZ X0, 45f8e0 <hypre_BoomerAMGBuildMultipass+0x12e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X0, 45f898 <hypre_BoomerAMGBuildMultipass+0x1298>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CMP X16, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 462e44 <hypre_BoomerAMGBuildMultipass+0x4844>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X25, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X25, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X9, X25, #24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP X4, X5, [X3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
ORR X7, XZR, X25	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X11, X7, #40	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X12, [X7, #56]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X4, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
UBFM X24, X4, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X5, [SP, #712]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X10, X25, [X9]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
STR X10, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X2, X13, [X11]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
STR X12, [SP, #664]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X0, [X10, X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X2, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X13, [SP, #720]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 462e90 <hypre_BoomerAMGBuildMultipass+0x4890>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X27, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X14, X2, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X20, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X14, [SP, #552]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CMP X27, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45e984 <hypre_BoomerAMGBuildMultipass+0x384>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X27, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X26, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X1, X17, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X3, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X30, X1, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X15, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X15, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 46329c <hypre_BoomerAMGBuildMultipass+0x4c9c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X1, X3, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
ORR X2, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 4fd0a4 <hypre_ParCSRCommHandleCreate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
BL 4fd8ac <hypre_ParCSRCommHandleDestroy>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X28, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45ea4c <hypre_BoomerAMGBuildMultipass+0x44c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X16, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X1, X16, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X17, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45ea20 <hypre_BoomerAMGBuildMultipass+0x420>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X26, [SP, #584]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X5, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X24, X1, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X1, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X1, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45ea4c <hypre_BoomerAMGBuildMultipass+0x44c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X2, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [SP, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 4fd0a4 <hypre_ParCSRCommHandleCreate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
BL 4fd8ac <hypre_ParCSRCommHandleDestroy>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X15, SP, #848	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADRP X27, <20045da50>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X28, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X27, #4032	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X18, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STP XZR, XZR, [X15, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X28, X18, [X15]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
LDR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 410bc0 <@plt_start@+0x440>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [SP, #872]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X3, [SP, #496]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X28, 45f830 <hypre_BoomerAMGBuildMultipass+0x1230>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X26, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X24, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #536]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X16, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X30, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X8, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X30]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUB X27, X17, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X8, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45ed00 <hypre_BoomerAMGBuildMultipass+0x700>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ANDS X7, X8, #4160	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
ORR X3, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X10, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X13, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X14, X9, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X2, X10, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B.EQ 45eba0 <hypre_BoomerAMGBuildMultipass+0x5a0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X7, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45eb64 <hypre_BoomerAMGBuildMultipass+0x564>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X7, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45eb34 <hypre_BoomerAMGBuildMultipass+0x534>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X11]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X12, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 463274 <hypre_BoomerAMGBuildMultipass+0x4c74>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMN X12, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 45eb1c <hypre_BoomerAMGBuildMultipass+0x51c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X3, X27, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [X0, X27,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [X2]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X13, [X22]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X13, [X5]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X15, [X18, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X15, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 463010 <hypre_BoomerAMGBuildMultipass+0x4a10>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMN X15, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 462fe8 <hypre_BoomerAMGBuildMultipass+0x49e8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X2, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X13, [X22, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X13, [X4, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X7, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X9, [X7, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X9, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 462d64 <hypre_BoomerAMGBuildMultipass+0x4764>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMN X9, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 462fc4 <hypre_BoomerAMGBuildMultipass+0x49c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X10, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X2, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X13, [X22, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X13, [X10, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X18, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45ed00 <hypre_BoomerAMGBuildMultipass+0x700>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X15, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X16, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 45ec54 <hypre_BoomerAMGBuildMultipass+0x654>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X10, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X13, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X12, X2, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X14, X12, X13,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X13, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45ed78 <hypre_BoomerAMGBuildMultipass+0x778>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X18, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X13, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X13, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45eda4 <hypre_BoomerAMGBuildMultipass+0x7a4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X3, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X2, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 4fd0a4 <hypre_ParCSRCommHandleCreate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
BL 4fd8ac <hypre_ParCSRCommHandleDestroy>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X0, [SP, #552]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR XZR, [SP, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #672]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X0, [SP, #496]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X0, 45f884 <hypre_BoomerAMGBuildMultipass+0x1284>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [SP, #672]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X28, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X2]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CMP X28, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45ee58 <hypre_BoomerAMGBuildMultipass+0x858>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #664]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X18, X28, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X7, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X5, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
UBFM X15, X18, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X17, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X16, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X30, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X4, X8, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X9, [SP, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [SP, #536]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X14, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X24, [SP, #1192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X24, 45f8f4 <hypre_BoomerAMGBuildMultipass+0x12f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X23, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
STR X0, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B.LE 45f01c <hypre_BoomerAMGBuildMultipass+0xa1c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ANDS X14, X23, #4224	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOVZ X1, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B.EQ 463104 <hypre_BoomerAMGBuildMultipass+0x4b04>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4630c0 <hypre_BoomerAMGBuildMultipass+0x4ac0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45efd4 <hypre_BoomerAMGBuildMultipass+0x9d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45efa0 <hypre_BoomerAMGBuildMultipass+0x9a0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45ef6c <hypre_BoomerAMGBuildMultipass+0x96c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45ef38 <hypre_BoomerAMGBuildMultipass+0x938>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #6	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45ef04 <hypre_BoomerAMGBuildMultipass+0x904>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X28, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45efe0 <hypre_BoomerAMGBuildMultipass+0x9e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [X19]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X18, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X15, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X30, [X21]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X30, X17	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
CSEL X9, X18, X15, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CSEL X0, X0, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X10]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X8, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X8, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45efe0 <hypre_BoomerAMGBuildMultipass+0x9e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [X21, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X12, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X11, [X19, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X4, X11	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 45ef2c <hypre_BoomerAMGBuildMultipass+0x92c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X12, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X3, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X12, [X3, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X7, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X7, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45efe0 <hypre_BoomerAMGBuildMultipass+0x9e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X13, [X21, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X5, [X19, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X13, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 45ef60 <hypre_BoomerAMGBuildMultipass+0x960>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X2, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X24, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X2, [X24, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X14, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X14, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45efe0 <hypre_BoomerAMGBuildMultipass+0x9e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [X21, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X15, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X18, [X19, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X28, X18	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 45ef94 <hypre_BoomerAMGBuildMultipass+0x994>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X15, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X16, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X15, [X16, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X17, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X17, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45efe0 <hypre_BoomerAMGBuildMultipass+0x9e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X30, [X21, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X10, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X9, [X19, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X30, X9	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 45efc8 <hypre_BoomerAMGBuildMultipass+0x9c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X10, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X8, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X10, [X8, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X4, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X4, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 4630a0 <hypre_BoomerAMGBuildMultipass+0x4aa0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X21, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X19, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X21, [X0, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CMP X23, X19	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45f01c <hypre_BoomerAMGBuildMultipass+0xa1c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB X23, X23, X19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, X19,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W1, #255	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
UBFM X14, X23, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X28, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CSEL X2, X14, X28, #12	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 4108c0 <@plt_start@+0x140>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STP XZR, XZR, [X17]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
TBNZ X27, #63, 45f904 <hypre_BoomerAMGBuildMultipass+0x1304>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X28, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X4, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X13, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X7, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
UBFM X8, X27, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP X15, X16, [SP, #480]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
MOVZ X23, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X12, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X30, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X9, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [SP, #392]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X19, [SP, #680]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [X19, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X14, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBZ X14, 462ecc <hypre_BoomerAMGBuildMultipass+0x48cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBNZ X23, 462e70 <hypre_BoomerAMGBuildMultipass+0x4870>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP XZR, XZR, [SP, #440]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X19, XZR, X21	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [X22, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X18, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #392]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #1192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBZ X0, 45e7dc <hypre_BoomerAMGBuildMultipass+0x1dc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X24, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X1, SP, #848	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X10, SP, #848	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADRP X11, <20045e13c>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STR X0, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X11, #736	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP XZR, XZR, [X10, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X9, X24, [X10]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
BL 410bc0 <@plt_start@+0x440>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X13, [SP, #872]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X2, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X14, X24, X13	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X13, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUBS X0, X14, X2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
STR X2, [SP, #704]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B.NE 463038 <hypre_BoomerAMGBuildMultipass+0x4a38>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X12, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X15, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X0, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X15, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X22, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 45e850 <hypre_BoomerAMGBuildMultipass+0x250>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 45ed78 <hypre_BoomerAMGBuildMultipass+0x778>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 45ee58 <hypre_BoomerAMGBuildMultipass+0x858>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X13, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X4, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUB X24, X13, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X12, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X30, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X12, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X23, [X30, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X9, X4, X14,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X14, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45f2e8 <hypre_BoomerAMGBuildMultipass+0xce8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X11, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45f314 <hypre_BoomerAMGBuildMultipass+0xd14>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X3, XZR, X26	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X2, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 4fd0a4 <hypre_ParCSRCommHandleCreate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
BL 4fd8ac <hypre_ParCSRCommHandleDestroy>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X19, <581314>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X1, SP, #808	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X13, X19, #1800	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X3, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X2, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X4, XZR, X13	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, SP, #816	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X24, [SP, #816]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [SP, #400]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X13, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 549550 <hypre_MPI_Allreduce>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X24, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X12, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X15, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [SP, #808]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X9, X24, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X21, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X10, X15, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X10, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBZ X14, 46308c <hypre_BoomerAMGBuildMultipass+0x4a8c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X24, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X11, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X27, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X20, XZR, X21	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X30, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X28, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X21, [SP, #392]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X28, XZR, X12	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X27, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X0, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X26, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X4, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X4, [SP, #536]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X24, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [SP, #496]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45ea9c <hypre_BoomerAMGBuildMultipass+0x49c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45edc8 <hypre_BoomerAMGBuildMultipass+0x7c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X26, [SP, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X26, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 463064 <hypre_BoomerAMGBuildMultipass+0x4a64>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X30, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [SP, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CMP X30, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 45e8a8 <hypre_BoomerAMGBuildMultipass+0x2a8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X20, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #552]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45ea4c <hypre_BoomerAMGBuildMultipass+0x44c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45e88c <hypre_BoomerAMGBuildMultipass+0x28c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP XZR, XZR, [X17]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
TBZ X27, #63, 45f028 <hypre_BoomerAMGBuildMultipass+0xa28>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X28, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X23, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X24, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45f270 <hypre_BoomerAMGBuildMultipass+0xc70>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X27, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X23, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X20, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X19, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X21, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 45fa18 <hypre_BoomerAMGBuildMultipass+0x1418>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X21, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X20, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X24, #10	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X23, #80	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X24, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X23, [SP, #632]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X0, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X21, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X19, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X20, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X15, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X15, [X19, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X0, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X12, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X12, [SP, #408]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X18, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #416]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X18, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 462bd4 <hypre_BoomerAMGBuildMultipass+0x45d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X30, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X7, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #472]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #520]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #528]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X17, X30, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP X5, X16, [X17]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
CMP X5, X16	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 462c54 <hypre_BoomerAMGBuildMultipass+0x4654>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X4, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP X14, X15, [SP, #480]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDR X27, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X23, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X18, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X13, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X28, [SP, #392]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [SP, #536]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X30, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X11, X30, X4	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X11, [SP, #624]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X27, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X27, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 462ac8 <hypre_BoomerAMGBuildMultipass+0x44c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X24, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #304]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #336]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP XZR, XZR, [SP, #456]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
CMP X17, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 462bc8 <hypre_BoomerAMGBuildMultipass+0x45c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X5, <200458bc8>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ X3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR D31, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
MOVZ X19, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X23, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X24, [SP, #560]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X24, X5, #588	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X25, [SP, #568]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X25, XZR, X22	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVN X22, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X27, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
DUP V0.2D, V31.D[0]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
STR X6, [SP, #736]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #464]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X30, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X21, [SP, #520]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X11, X30, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X6, X27, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X3, [SP, #384]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X20, [SP, #528]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X27, X18, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #504]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #544]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X22, [SP, #576]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X7, [SP, #696]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X11, [SP, #744]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X6, [SP, #752]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR Q0, [SP, #768]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STR X24, [SP, #784]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X16, [SP, #384]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X22, XZR, X25	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X24, [SP, #560]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X25, [SP, #568]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [SP, #696]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #736]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X16, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ X28, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X7, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #672]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #648]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #656]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #640]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X21, [SP, #624]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X21	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X27, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X21	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X27, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X20, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X27, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X20, 4618d0 <hypre_BoomerAMGBuildMultipass+0x32d0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X14, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 460678 <hypre_BoomerAMGBuildMultipass+0x2078>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X30, [SP, #760]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X23, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X7, X30, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X16, X7, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
UBFM X9, X16, #3, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X2, X23, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X8, X9, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ANDS X15, X8, #4160	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
SUB X3, X17, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B.EQ 462da4 <hypre_BoomerAMGBuildMultipass+0x47a4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X15, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4605a4 <hypre_BoomerAMGBuildMultipass+0x1fa4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X15, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 460578 <hypre_BoomerAMGBuildMultipass+0x1f78>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X0, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X18, [X3, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X13, [X4, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X12, X13, X18	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X12, [X4, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X10, [X2, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X11, [X5, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X1, X11, X10	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X1, [X5, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X20, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X21, [X3, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X30, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X19, [X20, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X14, X19, X21	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X14, [X20, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X17, [X2, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X16, [X30, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X9, X16, X17	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X30, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X15, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [X3, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X13, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X23, [X15, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X18, X23, X8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X18, [X15, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [X2, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X13, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X10, X12, X4	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X10, [X13, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X0, X7	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 460678 <hypre_BoomerAMGBuildMultipass+0x2078>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X21, XZR, X13	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X19, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X0, <20045767c>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #3216	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X7, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X27, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X23, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X19, [SP, #880]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X21, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X7, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X23, [SP, #888]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X21, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X6, [SP, #872]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410bc0 <@plt_start@+0x440>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [SP, #1184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X18, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X2, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP X1, X4, [X3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
SUB X13, X4, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CBZ X12, 461964 <hypre_BoomerAMGBuildMultipass+0x3364>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X20, <20045a6e0>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X18, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X20, #3584	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X9, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X27, [SP, #936]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X5, [SP, #952]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X7, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X9, [SP, #928]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X23, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X28, [SP, #960]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X7, [SP, #944]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X16, [SP, #440]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X23, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X12, [SP, #448]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X18, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X11, [SP, #584]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X16, [SP, #904]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X17, [SP, #592]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X12, [SP, #920]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X15, [SP, #600]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X11, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X30, [SP, #608]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X17, [SP, #880]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X10, [SP, #616]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X15, [SP, #888]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [SP, #1192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X30, [SP, #896]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X10, [SP, #912]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X6, [SP, #968]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X4, [SP, #872]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X8, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X13, [SP, #1096]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X17, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X8, [SP, #976]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X10, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X17, [SP, #1056]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X23, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X4, [SP, #1048]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X30, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X10, [SP, #1088]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X20, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X23, [SP, #1024]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X16, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X30, [SP, #1072]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X13, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X20, [SP, #1016]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X21, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X16, [SP, #1080]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X11, [SP, #408]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X13, [SP, #984]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #416]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X21, [SP, #1000]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X19, [SP, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X11, [SP, #1032]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X14, [SP, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X18, [SP, #1040]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X15, [SP, #536]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X19, [SP, #992]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X14, [SP, #1008]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X15, [SP, #1064]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410bc0 <@plt_start@+0x440>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X2, X1, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
CBNZ X2, 462f6c <hypre_BoomerAMGBuildMultipass+0x496c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X1, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X0, [SP, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X19, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X19, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X9, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X3, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 460834 <hypre_BoomerAMGBuildMultipass+0x2234>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X21, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X21, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X21, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X7, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X7, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 462f60 <hypre_BoomerAMGBuildMultipass+0x4960>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X5, <200459844>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ X23, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X6, X5, #1856	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X20, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X14, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X21, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X17, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X13, X8, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X26, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X26, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X18, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X11, X14, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X13, [SP, #232]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X19, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X15, X17, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X11, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X6, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X4, X18, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X15, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X9, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X4, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 460a44 <hypre_BoomerAMGBuildMultipass+0x2444>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 45fb90 <hypre_BoomerAMGBuildMultipass+0x1590>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X20, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X19, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X28, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 460500 <hypre_BoomerAMGBuildMultipass+0x1f00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X10, <20045c968>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X10, #4080	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X18, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X7, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X27, [SP, #936]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X19, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X6, [SP, #952]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X21, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X7, [SP, #928]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X20, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X28, [SP, #960]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X11, [SP, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X21, [SP, #944]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X8, [SP, #440]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X20, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X15, [SP, #448]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X11, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [SP, #584]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X8, [SP, #904]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X14, [SP, #592]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X15, [SP, #920]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X30, [SP, #600]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X5, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X16, [SP, #608]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X14, [SP, #880]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X9, [SP, #616]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X30, [SP, #888]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X17, [SP, #1192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X16, [SP, #896]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X9, [SP, #912]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X19, [SP, #968]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X17, [SP, #872]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X23, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X13, [SP, #1096]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X14, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X23, [SP, #976]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X9, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X14, [SP, #1056]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X20, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X17, [SP, #1048]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X16, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X9, [SP, #1088]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X10, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X20, [SP, #1024]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X8, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X16, [SP, #1072]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X10, [SP, #1016]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X13, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X8, [SP, #1080]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [SP, #408]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X18, [SP, #984]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X11, [SP, #416]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X13, [SP, #1000]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [SP, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X5, [SP, #1032]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X12, [SP, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X11, [SP, #1040]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X30, [SP, #536]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X4, [SP, #992]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X12, [SP, #1008]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X30, [SP, #1064]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410bc0 <@plt_start@+0x440>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X0, X2, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
CBNZ X0, 462f50 <hypre_BoomerAMGBuildMultipass+0x4950>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X2, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X0, [SP, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X21, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X21, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X21, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X15, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X3, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 461abc <hypre_BoomerAMGBuildMultipass+0x34bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X19, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X15, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X19, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X7, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X7, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 462f60 <hypre_BoomerAMGBuildMultipass+0x4960>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X18, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X6, <20045bacc>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ X23, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X4, X6, #3168	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X19, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X12, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X21, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X17, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X13, X18, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X26, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X26, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X5, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X10, X12, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X13, [SP, #232]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X20, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X14, X17, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X10, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X4, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X11, X5, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X14, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X15, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X11, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 461ccc <hypre_BoomerAMGBuildMultipass+0x36cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X25, XZR, X26	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X26, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #304]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #336]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X25	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #408]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #416]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #456]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #464]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X22	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X26	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #536]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X22, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X22, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 4625b0 <hypre_BoomerAMGBuildMultipass+0x3fb0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #368]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X5, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X21, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X25, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X24, X19, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X18, [SP, #680]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X23, X21, X19,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X7, [X21, X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X25, X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X1, [X18, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X18, #104]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [SP, #400]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [SP, #688]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X2, [SP, #840]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 510520 <hypre_ParCSRMatrixCreate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X15, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
FCMP D15, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
ORR X20, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP X4, X19, [X0, #56]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
STP X25, X15, [X4]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STR X27, [X4, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X27, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X28, [X19, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X13, [SP, #728]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STP X21, X27, [X19]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
CCMP X13, #0, #0, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	1	scal (50.0%)
STR XZR, [X0, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B.NE 462aac <hypre_BoomerAMGBuildMultipass+0x44ac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X24, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X24, 462a20 <hypre_BoomerAMGBuildMultipass+0x4420>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [SP, #472]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X16, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 46263c <hypre_BoomerAMGBuildMultipass+0x403c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #472]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X27, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADRP X12, <20045764c>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X12, #2464	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X27, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X8, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410bc0 <@plt_start@+0x440>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X24, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 462f40 <hypre_BoomerAMGBuildMultipass+0x4940>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X5, X24, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X9, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X6, X5, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X26, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
UBFM X1, X6, #3, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X14, X1, X9	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ANDS X22, X14, #4224	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
ADD X3, X2, X24,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B.EQ 46279c <hypre_BoomerAMGBuildMultipass+0x419c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, X9	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 462778 <hypre_BoomerAMGBuildMultipass+0x4178>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 46275c <hypre_BoomerAMGBuildMultipass+0x415c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, #3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 462740 <hypre_BoomerAMGBuildMultipass+0x4140>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, #4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 462724 <hypre_BoomerAMGBuildMultipass+0x4124>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, #5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 462708 <hypre_BoomerAMGBuildMultipass+0x4108>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, #6	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4626ec <hypre_BoomerAMGBuildMultipass+0x40ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X21, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X18, X27, X21,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X11, [X18]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X11, 4632d8 <hypre_BoomerAMGBuildMultipass+0x4cd8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X4, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X15, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X13, X27, X15,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X10, [X13]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X10, 462704 <hypre_BoomerAMGBuildMultipass+0x4104>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X26, X26, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X13]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X17, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X23, X27, X17,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X25, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X25, 462720 <hypre_BoomerAMGBuildMultipass+0x4120>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X26, X26, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X30, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X28, X27, X30,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X16, [X28]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X16, 46273c <hypre_BoomerAMGBuildMultipass+0x413c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X26, X26, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X28]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X12, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X8, X27, X12,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X7, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X7, 462758 <hypre_BoomerAMGBuildMultipass+0x4158>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X26, X26, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X5, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X6, X27, X5,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X1, [X6]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X1, 462774 <hypre_BoomerAMGBuildMultipass+0x4174>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X26, X26, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X6]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X2, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X14, X27, X2,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X22, [X14]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X22, 462790 <hypre_BoomerAMGBuildMultipass+0x4190>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X26, X26, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X14]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X0, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 46286c <hypre_BoomerAMGBuildMultipass+0x426c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X26	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X7, X26, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X7, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X21, [SP, #528]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X25, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X3, [SP, #632]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X9, X21, X3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDUR X0, [X9, #504]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X11, <2004578a0>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X23, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X11, #2316	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X21, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X23, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUB X28, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X4, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410bc0 <@plt_start@+0x440>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X13, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X5, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X15, X21, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X10, [SP, #520]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X2, XZR, X13	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X25	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 5474a8 <hypre_qsort0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X22, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X9, SP, #848	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADRP X2, <20045d948>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X0, X2, #3172	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X14, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X18, [SP, #528]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X1, XZR, X22	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X23, X14, [X9, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X18, X25, [X9]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STR X26, [SP, #880]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410bc0 <@plt_start@+0x440>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X0, <200457978>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X1, XZR, X22	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #1936	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X23, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X24, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X11, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410bc0 <@plt_start@+0x440>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X24, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X24, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 462a40 <hypre_BoomerAMGBuildMultipass+0x4440>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 462930 <hypre_BoomerAMGBuildMultipass+0x4330>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #728]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
FMOV D0, D15	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
BL 44e820 <hypre_BoomerAMGInterpTruncation>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X28, X10, [X19]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
ADD X23, X28, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X10, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 462620 <hypre_BoomerAMGBuildMultipass+0x4020>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #112	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X7, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X6, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #368]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X23, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X23, [SP, #304]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X18, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X18, [SP, #336]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X24, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X28, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP XZR, X0, [SP, #456]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
LDR X12, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X28, 462f24 <hypre_BoomerAMGBuildMultipass+0x4924>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR XZR, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X14, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X15, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X15, X14,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X0, 462f04 <hypre_BoomerAMGBuildMultipass+0x4904>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X1, <200457b54>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X1, #1800	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X12, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X8, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X21, <200457b6c>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STR X4, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X20, [SP, #464]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X1, XZR, X19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X8, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X20, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410bc0 <@plt_start@+0x440>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X1, XZR, X19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X21, #1664	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X9, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X2, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X7, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410bc0 <@plt_start@+0x440>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X17, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 45fbc8 <hypre_BoomerAMGBuildMultipass+0x15c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X16, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 460480 <hypre_BoomerAMGBuildMultipass+0x1e80>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X0, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ X7, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X13, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X28, 462eec <hypre_BoomerAMGBuildMultipass+0x48ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X13, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X28, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X7, [X28, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X21, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X21, [SP, #520]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X8, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [SP, #496]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X7, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X0, [SP, #528]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X9, [SP, #472]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP XZR, X9, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
LDR X30, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X17, X30, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X4, [X21]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X5, X16, [X17]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
CMP X5, X16	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 45fabc <hypre_BoomerAMGBuildMultipass+0x14bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X3, [SP, #624]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45fb9c <hypre_BoomerAMGBuildMultipass+0x159c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X28, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X1, [X5, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [X28, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [X22, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X9, [X2, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45eb90 <hypre_BoomerAMGBuildMultipass+0x590>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X21, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X1, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 4605e0 <hypre_BoomerAMGBuildMultipass+0x1fe0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X21, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X20, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X28, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X24, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X11, X24, W19,UXTW #3	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
STR X11, [SP, #632]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X24, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 45fa28 <hypre_BoomerAMGBuildMultipass+0x1428>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X8, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ X22, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X4, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X4, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45e850 <hypre_BoomerAMGBuildMultipass+0x250>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [SP, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X17, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 45f8c8 <hypre_BoomerAMGBuildMultipass+0x12c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X20, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X1, [SP, #552]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45ea4c <hypre_BoomerAMGBuildMultipass+0x44c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP XZR, XZR, [SP, #440]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
B 45e7b8 <hypre_BoomerAMGBuildMultipass+0x1b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [X24, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X19, XZR, X21	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X23, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X17, [X24, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [SP, #1192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X16, [SP, #448]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X17, [SP, #440]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45e7c4 <hypre_BoomerAMGBuildMultipass+0x1c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X18, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X20, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X15, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X28, X18, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X15, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
STR X28, [SP, #552]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B.GT 45e908 <hypre_BoomerAMGBuildMultipass+0x308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X16, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45ea4c <hypre_BoomerAMGBuildMultipass+0x44c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 45e984 <hypre_BoomerAMGBuildMultipass+0x384>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X27, [SP, #680]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X0, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 4fee4c <hypre_MatvecCommPkgCreate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [X27, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X18, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X1, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBZ X23, 45f100 <hypre_BoomerAMGBuildMultipass+0xb00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 462e70 <hypre_BoomerAMGBuildMultipass+0x4870>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X28	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X13, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X7, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 462bf0 <hypre_BoomerAMGBuildMultipass+0x45f0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X12, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X4, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X12, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 462b50 <hypre_BoomerAMGBuildMultipass+0x4550>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X12, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #456]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 462b3c <hypre_BoomerAMGBuildMultipass+0x453c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X0, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X26, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVN X7, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 462874 <hypre_BoomerAMGBuildMultipass+0x4274>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 461a7c <hypre_BoomerAMGBuildMultipass+0x347c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X25, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 4624fc <hypre_BoomerAMGBuildMultipass+0x3efc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 546e20 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 4607f4 <hypre_BoomerAMGBuildMultipass+0x21f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [X11, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUB X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [X2, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X9, [X22, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X9, [X12, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45eb90 <hypre_BoomerAMGBuildMultipass+0x590>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [X16, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUB X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [X2, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X15, [X22, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X15, [X17, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 45eb64 <hypre_BoomerAMGBuildMultipass+0x564>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X30, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X1, [X30, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [X8, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [X22, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X15, [X2, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 45eb64 <hypre_BoomerAMGBuildMultipass+0x564>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X12, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X27, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X27, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X15, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45f1a0 <hypre_BoomerAMGBuildMultipass+0xba0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 546d88 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X8, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 45e8a8 <hypre_BoomerAMGBuildMultipass+0x2a8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 45f8c8 <hypre_BoomerAMGBuildMultipass+0x12c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X24, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X27, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X24, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X27, [SP, #632]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45fa28 <hypre_BoomerAMGBuildMultipass+0x1428>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [X21, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X7, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X12, [X19, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X11, X12	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4632ac <hypre_BoomerAMGBuildMultipass+0x4cac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X7, [X3, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X13, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X13, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45efe0 <hypre_BoomerAMGBuildMultipass+0x9e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [X21, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X24, [X19, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X5, X24	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 4630e8 <hypre_BoomerAMGBuildMultipass+0x4ae8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X2, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X14, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X2, [X14, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X23, X1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45f01c <hypre_BoomerAMGBuildMultipass+0xa1c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 46310c <hypre_BoomerAMGBuildMultipass+0x4b0c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 45f01c <hypre_BoomerAMGBuildMultipass+0xa1c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X28, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X1]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X1, XZR, X12	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [X28]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X22]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X12, [X2]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45eb34 <hypre_BoomerAMGBuildMultipass+0x534>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X18, [SP, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X18, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 45e9c0 <hypre_BoomerAMGBuildMultipass+0x3c0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 45ea4c <hypre_BoomerAMGBuildMultipass+0x44c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X7, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 4630b4 <hypre_BoomerAMGBuildMultipass+0x4ab4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X27, X19, #61, #31	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X21, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X19, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X27, [SP, #632]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45fa28 <hypre_BoomerAMGBuildMultipass+0x1428>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X26, XZR, X9	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X18]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 4626e4 <hypre_BoomerAMGBuildMultipass+0x40e4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A

Name	Coverage (%)	Time (s)
▼hypre_BoomerAMGBuildMultipass–	0.30	0.05
○Loop 957 - par_multi_interp.c:385-410 - exec	0.01	0.16
○Loop 924 - par_multi_interp.c:1158-1161 - exec	0.01	0.14
▼Loop 901 - par_multi_interp.c:488-514 - exec–	0.01	0.09
○Loop 951 - par_multi_interp.c:491-498 - exec	0.09	1.12
○Loop 950 - par_multi_interp.c:501-508 - exec	0.00	0.00
▼Loop 902 - par_multi_interp.c:646-661 - exec–	0.00	0.04
○Loop 938 - par_multi_interp.c:651-655 - exec	0.09	1.08
○Loop 937 - par_multi_interp.c:657-661 - exec	0.00	0.00
○Loop 952 - par_multi_interp.c:466-469 - exec	0.00	0.00
▼Loop 955 - par_multi_interp.c:415-423 - exec–	0.00	0.00
○Loop 956 - par_multi_interp.c:418-423 - exec	0.00	0.00
▼Loop 942 - par_multi_interp.c:548-600 - exec–	0.00	0.00
▼Loop 945 - par_multi_interp.c:550-576 - exec–	0.05	0.59
○Loop 947 - par_multi_interp.c:554-557 - exec	0.02	0.27
○Loop 946 - par_multi_interp.c:568-571 - exec	0.00	0.00
▼Loop 943 - par_multi_interp.c:590-594 - exec–	0.00	0.00
○Loop 944 - par_multi_interp.c:593-594 - exec	0.00	0.00
▼Loop 900 - par_multi_interp.c:323-327 - exec–	0.00	0.00
○Loop 958 - par_multi_interp.c:326-327 - exec	0.00	0.00
○Loop 909 - par_multi_interp.c:1962-1968 - exec	0.00	0.00
▼Loop 899 - par_multi_interp.c:307-311 - exec–	0.00	0.00
○Loop 959 - par_multi_interp.c:310-311 - exec	0.00	0.00
▼Loop 953 - par_multi_interp.c:440-457 - exec–	0.00	0.00
○Loop 954 - par_multi_interp.c:442-454 - exec	0.00	0.00
▼Loop 948 - par_multi_interp.c:526-530 - exec–	0.00	0.00
○Loop 949 - par_multi_interp.c:529-530 - exec	0.00	0.00
○Loop 960 - par_multi_interp.c:205-208 - exec	0.00	0.00
▼Loop 910 - par_multi_interp.c:1674-1888 - exec–	0.00	0.00
▼Loop 911 - par_multi_interp.c:1688-1705 - exec–	0.00	0.00
▼Loop 912 - par_multi_interp.c:1690-1705 - exec–	0.00	0.00
○Loop 913 - par_multi_interp.c:1703-1705 - exec	0.00	0.00
○Loop 916 - par_multi_interp.c:1697-1699 - exec	0.00	0.00
○Loop 915 - par_multi_interp.c:1697-1699 - exec	0.00	0.00
○Loop 914 - par_multi_interp.c:1703-1705 - exec	0.00	0.00
▼Loop 939 - par_multi_interp.c:548-600 - exec–	0.00	0.00
▼Loop 940 - par_multi_interp.c:590-594 - exec–	0.00	0.00
○Loop 941 - par_multi_interp.c:593-594 - exec	0.00	0.00
▼Loop 905 - par_multi_interp.c:130-2061 - exec–	0.00	0.00
○Loop 906 - par_multi_interp.c:2016-2017 - exec	0.00	0.00
▼Loop 904 - par_multi_interp.c:693-891 - exec–	0.00	0.00
▼Loop 929 - par_multi_interp.c:773-784 - exec–	0.00	0.00
○Loop 930 - par_multi_interp.c:775-780 - exec	0.00	0.00
▼Loop 932 - par_multi_interp.c:733-759 - exec–	0.00	0.00
▼Loop 933 - par_multi_interp.c:735-759 - exec–	0.00	0.00
○Loop 934 - par_multi_interp.c:749-759 - exec	0.00	0.00
○Loop 936 - par_multi_interp.c:742-745 - exec	0.00	0.00
○Loop 935 - par_multi_interp.c:742-745 - exec	0.00	0.00
▼Loop 903 - par_multi_interp.c:823-860 - exec–	0.00	0.00
▼Loop 926 - par_multi_interp.c:825-860 - exec–	0.00	0.00
▼Loop 927 - par_multi_interp.c:829-856 - exec–	0.00	0.00
○Loop 928 - par_multi_interp.c:839-850 - exec	0.00	0.00
○Loop 925 - par_multi_interp.c:872-879 - exec	0.00	0.00
○Loop 931 - par_multi_interp.c:703-717 - exec	0.00	0.00
▼Loop 907 - par_multi_interp.c:1982-1989 - exec–	0.00	0.00
○Loop 908 - par_multi_interp.c:1984-1989 - exec	0.00	0.00
▼Loop 917 - par_multi_interp.c:1310-1566 - exec–	0.00	0.00
▼Loop 918 - par_multi_interp.c:1324-1338 - exec–	0.00	0.00
▼Loop 919 - par_multi_interp.c:1326-1338 - exec–	0.00	0.00
○Loop 920 - par_multi_interp.c:1337-1338 - exec	0.00	0.00
○Loop 921 - par_multi_interp.c:1337-1338 - exec	0.00	0.00
○Loop 922 - par_multi_interp.c:1333-1334 - exec	0.00	0.00
○Loop 923 - par_multi_interp.c:1333-1334 - exec	0.00	0.00

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code