OV - exec - Function hypre_CSRMatrixMatvecOutOfPlace.omp

	Function: hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18	Module: exec	Source: csr_matvec.c:243-404 [...]	Coverage (incl. loops): 20.71% \| (excl. loops): 0.00%

/home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c: 243 - 404

--------------------------------------------------------------------------------

243: #pragma omp parallel private(i,jj,tempx)

244: #endif

245:       {

246:       HYPRE_Int iBegin = hypre_CSRMatrixGetLoadBalancedPartitionBegin(A);

247:       HYPRE_Int iEnd = hypre_CSRMatrixGetLoadBalancedPartitionEnd(A);

248:       hypre_assert(iBegin <= iEnd);

249:       hypre_assert(iBegin >= 0 && iBegin <= num_rows);

250:       hypre_assert(iEnd >= 0 && iEnd <= num_rows);

251:

252:       if (0 == temp)

253:       {

254:          if (1 == alpha) // JSP: a common path

255:          {

256:             for (i = iBegin; i < iEnd; i++)

257:             {

258:                tempx = 0.0;

259:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

260:                {

261:                   tempx += A_data[jj] * x_data[A_j[jj]];

262:                }

263:                y_data[i] = tempx;

264:             }

265:          } // y = A*x

266:          else if (-1 == alpha)

267:          {

268:             for (i = iBegin; i < iEnd; i++)

269:             {

270:                tempx = 0.0;

271:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

272:                {

273:                   tempx -= A_data[jj] * x_data[A_j[jj]];

274:                }

275:                y_data[i] = tempx;

276:             }

277:          } // y = -A*x

278:          else

279:          {

280:             for (i = iBegin; i < iEnd; i++)

281:             {

282:                tempx = 0.0;

283:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

284:                {

285:                   tempx += A_data[jj] * x_data[A_j[jj]];

286:                }

287:                y_data[i] = alpha*tempx;

288:             }

289:          } // y = alpha*A*x

290:       } // temp == 0

291:       else if (-1 == temp) // beta == -alpha

292:       {

293:          if (1 == alpha) // JSP: a common path

294:          {

295:             for (i = iBegin; i < iEnd; i++)

296:             {

297:                tempx = -b_data[i];

298:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

299:                {

300:                   tempx += A_data[jj] * x_data[A_j[jj]];

301:                }

302:                y_data[i] = tempx;

303:             }

304:          } // y = A*x - y

305:          else if (-1 == alpha) // JSP: a common path

306:          {

307:             for (i = iBegin; i < iEnd; i++)

308:             {

309:                tempx = b_data[i];

310:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

311:                {

312:                   tempx -= A_data[jj] * x_data[A_j[jj]];

313:                }

314:                y_data[i] = tempx;

315:             }

316:          } // y = -A*x + y

317:          else

318:          {

319:             for (i = iBegin; i < iEnd; i++)

320:             {

321:                tempx = -b_data[i];

322:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

323:                {

324:                   tempx += A_data[jj] * x_data[A_j[jj]];

325:                }

326:                y_data[i] = alpha*tempx;

327:             }

328:          } // y = alpha*(A*x - y)

329:       } // temp == -1

330:       else if (1 == temp)

331:       {

332:          if (1 == alpha) // JSP: a common path

333:          {

334:             for (i = iBegin; i < iEnd; i++)

335:             {

336:                tempx = b_data[i];

337:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

338:                {

339:                   tempx += A_data[jj] * x_data[A_j[jj]];

340:                }

341:                y_data[i] = tempx;

342:             }

343:          } // y = A*x + y

344:          else if (-1 == alpha)

345:          {

346:             for (i = iBegin; i < iEnd; i++)

347:             {

348:                tempx = -b_data[i];

349:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

350:                {

351:                   tempx -= A_data[jj] * x_data[A_j[jj]];

352:                }

353:                y_data[i] = tempx;

354:             }

355:          } // y = -A*x - y

356:          else

357:          {

358:             for (i = iBegin; i < iEnd; i++)

359:             {

360:                tempx = b_data[i];

361:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

362:                {

363:                   tempx += A_data[jj] * x_data[A_j[jj]];

364:                }

365:                y_data[i] = alpha*tempx;

[...]

371:          if (1 == alpha) // JSP: a common path

372:          {

373:             for (i = iBegin; i < iEnd; i++)

374:             {

375:                tempx = b_data[i]*temp;

376:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

377:                {

378:                   tempx += A_data[jj] * x_data[A_j[jj]];

379:                }

380:                y_data[i] = tempx;

381:             }

382:          } // y = A*x + temp*y

383:          else if (-1 == alpha)

384:          {

385:             for (i = iBegin; i < iEnd; i++)

386:             {

387:                tempx = -b_data[i]*temp;

388:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

389:                {

390:                   tempx -= A_data[jj] * x_data[A_j[jj]];

391:                }

392:                y_data[i] = tempx;

393:             }

394:          } // y = -A*x - temp*y

395:          else

396:          {

397:             for (i = iBegin; i < iEnd; i++)

398:             {

399:                tempx = b_data[i]*temp;

400:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

401:                {

402:                   tempx += A_data[jj] * x_data[A_j[jj]];

403:                }

404:                y_data[i] = alpha*tempx;

0x49eef0 STP	X29, X30, [SP, #928]!

0x49eef4 STP	X28, X27, [SP, #16]

0x49eef8 STP	X26, X25, [SP, #32]

0x49eefc STP	X24, X23, [SP, #48]

0x49ef00 STP	X22, X21, [SP, #64]

0x49ef04 STP	X20, X19, [SP, #80]

0x49ef08 ADD	X29, SP, #0

0x49ef0c LDR	X0, [X2]

0x49ef10 ORR	X23, XZR, X7

0x49ef14 ORR	X24, XZR, X6

0x49ef18 ORR	X21, XZR, X5

0x49ef1c ORR	X22, XZR, X4

0x49ef20 ORR	X25, XZR, X3

0x49ef24 ORR	X19, XZR, X2

0x49ef28 BL	49dc80

0x49ef2c ORR	X20, XZR, X0

0x49ef30 LDR	X0, [X19]

0x49ef34 BL	49dd00

0x49ef38 ADRP	X28,

0x49ef3c ORR	X19, XZR, X0

0x49ef40 LDR	X28, [X28, #3824]

0x49ef44 CMP	X20, X0

0x49ef48 B.LE	49ef7c

0x49ef4c LDR	X0, [X28]

0x49ef50 ADRP	X1,

0x49ef54 ADD	X1, X1, #3474

0x49ef58 ADRP	X2,

0x49ef5c ADD	X2, X2, #2780

0x49ef60 BL	4a6f90

0x49ef64 ADRP	X0,

0x49ef68 ADD	X0, X0, #546

0x49ef6c MOVZ	W1, #248

0x49ef70 MOVZ	W2, #1

0x49ef74 ORR	X3, XZR, XZR

0x49ef78 BL	4a9360

0x49ef7c TBNZ	X20, #63, 49ef8c

0x49ef80 LDR	X8, [X25]

0x49ef84 CMP	X20, X8

0x49ef88 B.LE	49efc0

0x49ef8c LDR	X0, [X28]

0x49ef90 ADRP	X1,

0x49ef94 ADD	X1, X1, #3474

0x49ef98 ADRP	X2,

0x49ef9c ADD	X2, X2, #2216

0x49efa0 BL	4a6f90

0x49efa4 ADRP	X0,

0x49efa8 ADD	X0, X0, #546

0x49efac MOVZ	W1, #249

0x49efb0 MOVZ	W2, #1

0x49efb4 ORR	X3, XZR, XZR

0x49efb8 BL	4a9360

0x49efbc LDR	X8, [X25]

0x49efc0 LDP	X26, X25, [X29, #104]

0x49efc4 LDR	X27, [X29, #96]

0x49efc8 TBNZ	X19, #63, 49efd4

0x49efcc CMP	X19, X8

0x49efd0 B.LE	49f004

0x49efd4 LDR	X0, [X28]

0x49efd8 ADRP	X1,

0x49efdc ADD	X1, X1, #3474

0x49efe0 ADRP	X2,

0x49efe4 ADD	X2, X2, #2250

0x49efe8 BL	4a6f90

0x49efec ADRP	X0,

0x49eff0 ADD	X0, X0, #546

0x49eff4 MOVZ	W1, #250

0x49eff8 MOVZ	W2, #1

0x49effc ORR	X3, XZR, XZR

0x49f000 BL	4a9360

0x49f004 LDR	D1, [X22]

0x49f008 FCMP	D1, #0

0x49f00c B.NE	49f17c

0x49f010 LDR	D0, [X21]

0x49f014 FMOV	D1, #1.0000000

0x49f018 FCMP	D0, D1

0x49f01c B.NE	49f2fc

0x49f020 CMP	X20, X19

0x49f024 B.GE	4a00dc

0x49f028 LDR	X8, [X24]

0x49f02c LDR	X9, [X23]

0x49f030 LDR	X11, [X26]

0x49f034 ADD	X13, X9, #8

0x49f038 LDR	X10, [X27]

0x49f03c LDR	X12, [X25]

0x49f040 LDR	X14, [X8, X20,LSL #3]

0x49f044 ADD	X15, X11, #8

0x49f048 ADD	X16, X11, #16

0x49f04c ADD	X17, X9, #16

0x49f050 B	49f070

0x49f054 HINT	#0

0x49f058 HINT	#0

0x49f05c HINT	#0

  (3595) 0x49f060 STR	D0, [X12, X20,LSL #3]

  (3595) 0x49f064 ORR	X20, XZR, X18

  (3595) 0x49f068 CMP	X18, X19

  (3595) 0x49f06c B.EQ	4a00dc

  (3595) 0x49f070 ADD	X18, X20, #1

  (3595) 0x49f074 ORR	X4, XZR, X14

  (3595) 0x49f078 MOVI	D0, #0

  (3595) 0x49f07c LDR	X14, [X8, X18,LSL #3]

  (3595) 0x49f080 SUBS	X1, X14, X4

  (3595) 0x49f084 B.LE	49f060

  (3595) 0x49f088 CMP	X1, #2

  (3595) 0x49f08c B.CS	49f0a0

  (3595) 0x49f090 ORR	X0, XZR, X4

  (3595) 0x49f094 B	49f0f4

0x49f098 HINT	#0

0x49f09c HINT	#0

(3596) 0x49f0a0 AND	X2, X1, #8127

(3596) 0x49f0a4 MOVI	D1, #0

(3596) 0x49f0a8 ADD	X3, X13, X4,LSL #3

(3596) 0x49f0ac ADD	X0, X4, X2

(3596) 0x49f0b0 ADD	X4, X15, X4,LSL #3

(3596) 0x49f0b4 ORR	X5, XZR, X2

(3596) 0x49f0b8 HINT	#0

(3596) 0x49f0bc HINT	#0

  (3594) 0x49f0c0 LDP	X6, X7, [X4, #1016]

  (3594) 0x49f0c4 LDP	D2, D3, [X3, #1016]

  (3594) 0x49f0c8 SUBS	X5, X5, #2

  (3594) 0x49f0cc ADD	X3, X3, #16

  (3594) 0x49f0d0 ADD	X4, X4, #16

  (3594) 0x49f0d4 LDR	D4, [X10, X6,LSL #3]

  (3594) 0x49f0d8 LDR	D5, [X10, X7,LSL #3]

  (3594) 0x49f0dc FMADD	D0, D4, D2, D0

  (3594) 0x49f0e0 FMADD	D1, D5, D3, D1

  (3594) 0x49f0e4 B.NE	49f0c0

(3596) 0x49f0e8 FADD	D0, D1, D0

(3596) 0x49f0ec CMP	X1, X2

(3596) 0x49f0f0 B.EQ	49f060

  (3595) 0x49f0f4 SUB	W1, W14, W0

  (3595) 0x49f0f8 ORR	X2, XZR, X0

  (3595) 0x49f0fc ANDS	X1, X1, #4160

  (3595) 0x49f100 B.EQ	49f120

    (3598) 0x49f104 LDR	X3, [X11, X2,LSL #3]

    (3598) 0x49f108 LDR	D1, [X9, X2,LSL #3]

    (3598) 0x49f10c ADD	X2, X2, #1

    (3598) 0x49f110 SUBS	X1, X1, #1

    (3598) 0x49f114 LDR	D2, [X10, X3,LSL #3]

    (3598) 0x49f118 FMADD	D0, D2, D1, D0

    (3598) 0x49f11c B.NE	49f104

  (3595) 0x49f120 SUB	X0, X0, X14

  (3595) 0x49f124 CMN	X0, #4

  (3595) 0x49f128 B.HI	49f060

  (3595) 0x49f12c SUB	X0, X14, X2

  (3595) 0x49f130 ADD	X1, X16, X2,LSL #3

  (3595) 0x49f134 ADD	X2, X17, X2,LSL #3

  (3595) 0x49f138 HINT	#0

  (3595) 0x49f13c HINT	#0

    (3597) 0x49f140 LDP	X3, X4, [X1, #1008]

    (3597) 0x49f144 LDP	D2, D3, [X2, #1008]

    (3597) 0x49f148 SUBS	X0, X0, #4

    (3597) 0x49f14c LDR	D1, [X10, X3,LSL #3]

    (3597) 0x49f150 FMADD	D0, D1, D2, D0

    (3597) 0x49f154 LDR	D1, [X10, X4,LSL #3]

    (3597) 0x49f158 LDP	X3, X4, [X1], #32

    (3597) 0x49f15c LDR	D2, [X10, X3,LSL #3]

    (3597) 0x49f160 FMADD	D0, D1, D3, D0

    (3597) 0x49f164 LDP	D1, D3, [X2], #32

    (3597) 0x49f168 FMADD	D0, D2, D1, D0

    (3597) 0x49f16c LDR	D1, [X10, X4,LSL #3]

    (3597) 0x49f170 FMADD	D0, D1, D3, D0

    (3597) 0x49f174 B.NE	49f140

  (3595) 0x49f178 B	49f060

0x49f17c LDR	X8, [X29, #120]

0x49f180 FMOV	D0, #-1.0000000

0x49f184 FCMP	D1, D0

0x49f188 B.NE	49f460

0x49f18c LDR	D0, [X21]

0x49f190 FMOV	D1, #1.0000000

0x49f194 FCMP	D0, D1

0x49f198 B.NE	49f5dc

0x49f19c CMP	X20, X19

0x49f1a0 B.GE	4a00dc

0x49f1a4 LDR	X9, [X24]

0x49f1a8 LDR	X10, [X23]

0x49f1ac LDR	X12, [X26]

0x49f1b0 ADD	X14, X10, #8

0x49f1b4 LDR	X8, [X8]

0x49f1b8 LDR	X11, [X27]

0x49f1bc LDR	X13, [X25]

0x49f1c0 LDR	X17, [X9, X20,LSL #3]

0x49f1c4 ADD	X15, X12, #8

0x49f1c8 ADD	X16, X12, #16

0x49f1cc ADD	X18, X10, #16

0x49f1d0 B	49f1f0

0x49f1d4 HINT	#0

0x49f1d8 HINT	#0

0x49f1dc HINT	#0

  (3590) 0x49f1e0 STR	D0, [X13, X20,LSL #3]

  (3590) 0x49f1e4 ORR	X20, XZR, X0

  (3590) 0x49f1e8 CMP	X0, X19

  (3590) 0x49f1ec B.EQ	4a00dc

  (3590) 0x49f1f0 LDR	D0, [X8, X20,LSL #3]

  (3590) 0x49f1f4 ADD	X0, X20, #1

  (3590) 0x49f1f8 ORR	X5, XZR, X17

  (3590) 0x49f1fc LDR	X17, [X9, X0,LSL #3]

  (3590) 0x49f200 SUBS	X2, X17, X5

  (3590) 0x49f204 FNEG	D0, D0

  (3590) 0x49f208 B.LE	49f1e0

  (3590) 0x49f20c CMP	X2, #2

  (3590) 0x49f210 B.CS	49f220

  (3590) 0x49f214 ORR	X1, XZR, X5

  (3590) 0x49f218 B	49f274

0x49f21c HINT	#0

(3591) 0x49f220 AND	X3, X2, #8127

(3591) 0x49f224 MOVI	D1, #0

(3591) 0x49f228 ADD	X4, X14, X5,LSL #3

(3591) 0x49f22c ADD	X1, X5, X3

(3591) 0x49f230 ADD	X5, X15, X5,LSL #3

(3591) 0x49f234 ORR	X6, XZR, X3

(3591) 0x49f238 HINT	#0

(3591) 0x49f23c HINT	#0

  (3589) 0x49f240 LDP	X7, X21, [X5, #1016]

  (3589) 0x49f244 LDP	D2, D3, [X4, #1016]

  (3589) 0x49f248 SUBS	X6, X6, #2

  (3589) 0x49f24c ADD	X4, X4, #16

  (3589) 0x49f250 ADD	X5, X5, #16

  (3589) 0x49f254 LDR	D4, [X11, X7,LSL #3]

  (3589) 0x49f258 LDR	D5, [X11, X21,LSL #3]

  (3589) 0x49f25c FMADD	D0, D4, D2, D0

  (3589) 0x49f260 FMADD	D1, D5, D3, D1

  (3589) 0x49f264 B.NE	49f240

(3591) 0x49f268 FADD	D0, D1, D0

(3591) 0x49f26c CMP	X2, X3

(3591) 0x49f270 B.EQ	49f1e0

  (3590) 0x49f274 SUB	W2, W17, W1

  (3590) 0x49f278 ORR	X3, XZR, X1

  (3590) 0x49f27c ANDS	X2, X2, #4160

  (3590) 0x49f280 B.EQ	49f2a0

    (3593) 0x49f284 LDR	X4, [X12, X3,LSL #3]

    (3593) 0x49f288 LDR	D1, [X10, X3,LSL #3]

    (3593) 0x49f28c ADD	X3, X3, #1

    (3593) 0x49f290 SUBS	X2, X2, #1

    (3593) 0x49f294 LDR	D2, [X11, X4,LSL #3]

    (3593) 0x49f298 FMADD	D0, D2, D1, D0

    (3593) 0x49f29c B.NE	49f284

  (3590) 0x49f2a0 SUB	X1, X1, X17

  (3590) 0x49f2a4 CMN	X1, #4

  (3590) 0x49f2a8 B.HI	49f1e0

  (3590) 0x49f2ac SUB	X1, X17, X3

  (3590) 0x49f2b0 ADD	X2, X16, X3,LSL #3

  (3590) 0x49f2b4 ADD	X3, X18, X3,LSL #3

  (3590) 0x49f2b8 HINT	#0

  (3590) 0x49f2bc HINT	#0

    (3592) 0x49f2c0 LDP	X4, X5, [X2, #1008]

    (3592) 0x49f2c4 LDP	D2, D3, [X3, #1008]

    (3592) 0x49f2c8 SUBS	X1, X1, #4

    (3592) 0x49f2cc LDR	D1, [X11, X4,LSL #3]

    (3592) 0x49f2d0 FMADD	D0, D1, D2, D0

    (3592) 0x49f2d4 LDR	D1, [X11, X5,LSL #3]

    (3592) 0x49f2d8 LDP	X4, X5, [X2], #32

    (3592) 0x49f2dc LDR	D2, [X11, X4,LSL #3]

    (3592) 0x49f2e0 FMADD	D0, D1, D3, D0

    (3592) 0x49f2e4 LDP	D1, D3, [X3], #32

    (3592) 0x49f2e8 FMADD	D0, D2, D1, D0

    (3592) 0x49f2ec LDR	D1, [X11, X5,LSL #3]

    (3592) 0x49f2f0 FMADD	D0, D1, D3, D0

    (3592) 0x49f2f4 B.NE	49f2c0

  (3590) 0x49f2f8 B	49f1e0

0x49f2fc FMOV	D1, #-1.0000000

0x49f300 FCMP	D0, D1

0x49f304 B.NE	49f740

0x49f308 CMP	X20, X19

0x49f30c B.GE	4a00dc

0x49f310 LDR	X8, [X24]

0x49f314 LDR	X9, [X23]

0x49f318 LDR	X11, [X26]

0x49f31c ADD	X13, X9, #8

0x49f320 LDR	X10, [X27]

0x49f324 LDR	X12, [X25]

0x49f328 LDR	X14, [X8, X20,LSL #3]

0x49f32c ADD	X15, X11, #8

0x49f330 ADD	X16, X11, #16

0x49f334 ADD	X17, X9, #16

0x49f338 B	49f350

0x49f33c HINT	#0

  (3585) 0x49f340 STR	D0, [X12, X20,LSL #3]

  (3585) 0x49f344 ORR	X20, XZR, X18

  (3585) 0x49f348 CMP	X18, X19

  (3585) 0x49f34c B.EQ	4a00dc

  (3585) 0x49f350 ADD	X18, X20, #1

  (3585) 0x49f354 ORR	X4, XZR, X14

  (3585) 0x49f358 MOVI	D0, #0

  (3585) 0x49f35c LDR	X14, [X8, X18,LSL #3]

  (3585) 0x49f360 SUBS	X1, X14, X4

  (3585) 0x49f364 B.LE	49f340

  (3585) 0x49f368 CMP	X1, #2

  (3585) 0x49f36c B.CS	49f380

  (3585) 0x49f370 ORR	X0, XZR, X4

  (3585) 0x49f374 B	49f3d4

0x49f378 HINT	#0

0x49f37c HINT	#0

(3586) 0x49f380 AND	X2, X1, #8127

(3586) 0x49f384 MOVI	D1, #0

(3586) 0x49f388 ADD	X3, X13, X4,LSL #3

(3586) 0x49f38c ADD	X0, X4, X2

(3586) 0x49f390 ADD	X4, X15, X4,LSL #3

(3586) 0x49f394 ORR	X5, XZR, X2

(3586) 0x49f398 HINT	#0

(3586) 0x49f39c HINT	#0

  (3584) 0x49f3a0 LDP	X6, X7, [X4, #1016]

  (3584) 0x49f3a4 LDP	D2, D3, [X3, #1016]

  (3584) 0x49f3a8 SUBS	X5, X5, #2

  (3584) 0x49f3ac ADD	X3, X3, #16

  (3584) 0x49f3b0 ADD	X4, X4, #16

  (3584) 0x49f3b4 LDR	D4, [X10, X6,LSL #3]

  (3584) 0x49f3b8 LDR	D5, [X10, X7,LSL #3]

  (3584) 0x49f3bc FMSUB	D0, D4, D2, D0

  (3584) 0x49f3c0 FMSUB	D1, D5, D3, D1

  (3584) 0x49f3c4 B.NE	49f3a0

(3586) 0x49f3c8 FADD	D0, D1, D0

(3586) 0x49f3cc CMP	X1, X2

(3586) 0x49f3d0 B.EQ	49f340

  (3585) 0x49f3d4 SUB	W1, W14, W0

  (3585) 0x49f3d8 ORR	X2, XZR, X0

  (3585) 0x49f3dc ANDS	X1, X1, #4160

  (3585) 0x49f3e0 B.EQ	49f400

    (3588) 0x49f3e4 LDR	X3, [X11, X2,LSL #3]

    (3588) 0x49f3e8 LDR	D1, [X9, X2,LSL #3]

    (3588) 0x49f3ec ADD	X2, X2, #1

    (3588) 0x49f3f0 SUBS	X1, X1, #1

    (3588) 0x49f3f4 LDR	D2, [X10, X3,LSL #3]

    (3588) 0x49f3f8 FMSUB	D0, D2, D1, D0

    (3588) 0x49f3fc B.NE	49f3e4

  (3585) 0x49f400 SUB	X0, X0, X14

  (3585) 0x49f404 CMN	X0, #4

  (3585) 0x49f408 B.HI	49f340

  (3585) 0x49f40c SUB	X0, X14, X2

  (3585) 0x49f410 ADD	X1, X16, X2,LSL #3

  (3585) 0x49f414 ADD	X2, X17, X2,LSL #3

  (3585) 0x49f418 HINT	#0

  (3585) 0x49f41c HINT	#0

    (3587) 0x49f420 LDP	X3, X4, [X1, #1008]

    (3587) 0x49f424 LDP	D2, D3, [X2, #1008]

    (3587) 0x49f428 SUBS	X0, X0, #4

    (3587) 0x49f42c LDR	D4, [X10, X4,LSL #3]

    (3587) 0x49f430 LDR	D1, [X10, X3,LSL #3]

    (3587) 0x49f434 LDP	X3, X4, [X1], #32

    (3587) 0x49f438 FMUL	D3, D4, D3

    (3587) 0x49f43c LDR	D4, [X10, X3,LSL #3]

    (3587) 0x49f440 FMADD	D1, D1, D2, D3

    (3587) 0x49f444 LDP	D2, D3, [X2], #32

    (3587) 0x49f448 FMADD	D1, D4, D2, D1

    (3587) 0x49f44c LDR	D2, [X10, X4,LSL #3]

    (3587) 0x49f450 FMADD	D1, D2, D3, D1

    (3587) 0x49f454 FSUB	D0, D0, S1

    (3587) 0x49f458 B.NE	49f420

  (3585) 0x49f45c B	49f340

0x49f460 LDR	D0, [X21]

0x49f464 FMOV	D2, #1.0000000

0x49f468 FCMP	D1, D2

0x49f46c B.NE	49f89c

0x49f470 FCMP	D0, D2

0x49f474 B.NE	49f9fc

0x49f478 CMP	X20, X19

0x49f47c B.GE	4a00dc

0x49f480 LDR	X9, [X24]

0x49f484 LDR	X10, [X23]

0x49f488 LDR	X12, [X26]

0x49f48c ADD	X14, X10, #8

0x49f490 LDR	X8, [X8]

0x49f494 LDR	X11, [X27]

0x49f498 LDR	X13, [X25]

0x49f49c LDR	X16, [X9, X20,LSL #3]

0x49f4a0 ADD	X15, X12, #8

0x49f4a4 ADD	X17, X12, #16

0x49f4a8 ADD	X18, X10, #16

0x49f4ac B	49f4d0

0x49f4b0 HINT	#0

0x49f4b4 HINT	#0

0x49f4b8 HINT	#0

0x49f4bc HINT	#0

  (3580) 0x49f4c0 STR	D0, [X13, X20,LSL #3]

  (3580) 0x49f4c4 ORR	X20, XZR, X0

  (3580) 0x49f4c8 CMP	X0, X19

  (3580) 0x49f4cc B.EQ	4a00dc

  (3580) 0x49f4d0 LDR	D0, [X8, X20,LSL #3]

  (3580) 0x49f4d4 ADD	X0, X20, #1

  (3580) 0x49f4d8 ORR	X5, XZR, X16

  (3580) 0x49f4dc LDR	X16, [X9, X0,LSL #3]

  (3580) 0x49f4e0 SUBS	X2, X16, X5

  (3580) 0x49f4e4 B.LE	49f4c0

  (3580) 0x49f4e8 CMP	X2, #2

  (3580) 0x49f4ec B.CS	49f500

  (3580) 0x49f4f0 ORR	X1, XZR, X5

  (3580) 0x49f4f4 B	49f554

0x49f4f8 HINT	#0

0x49f4fc HINT	#0

(3581) 0x49f500 AND	X3, X2, #8127

(3581) 0x49f504 MOVI	D1, #0

(3581) 0x49f508 ADD	X4, X14, X5,LSL #3

(3581) 0x49f50c ADD	X1, X5, X3

(3581) 0x49f510 ADD	X5, X15, X5,LSL #3

(3581) 0x49f514 ORR	X6, XZR, X3

(3581) 0x49f518 HINT	#0

(3581) 0x49f51c HINT	#0

  (3579) 0x49f520 LDP	X7, X21, [X5, #1016]

  (3579) 0x49f524 LDP	D2, D3, [X4, #1016]

  (3579) 0x49f528 SUBS	X6, X6, #2

  (3579) 0x49f52c ADD	X4, X4, #16

  (3579) 0x49f530 ADD	X5, X5, #16

  (3579) 0x49f534 LDR	D4, [X11, X7,LSL #3]

  (3579) 0x49f538 LDR	D5, [X11, X21,LSL #3]

  (3579) 0x49f53c FMADD	D0, D4, D2, D0

  (3579) 0x49f540 FMADD	D1, D5, D3, D1

  (3579) 0x49f544 B.NE	49f520

(3581) 0x49f548 FADD	D0, D1, D0

(3581) 0x49f54c CMP	X2, X3

(3581) 0x49f550 B.EQ	49f4c0

  (3580) 0x49f554 SUB	W2, W16, W1

  (3580) 0x49f558 ORR	X3, XZR, X1

  (3580) 0x49f55c ANDS	X2, X2, #4160

  (3580) 0x49f560 B.EQ	49f580

    (3583) 0x49f564 LDR	X4, [X12, X3,LSL #3]

    (3583) 0x49f568 LDR	D1, [X10, X3,LSL #3]

    (3583) 0x49f56c ADD	X3, X3, #1

    (3583) 0x49f570 SUBS	X2, X2, #1

    (3583) 0x49f574 LDR	D2, [X11, X4,LSL #3]

    (3583) 0x49f578 FMADD	D0, D2, D1, D0

    (3583) 0x49f57c B.NE	49f564

  (3580) 0x49f580 SUB	X1, X1, X16

  (3580) 0x49f584 CMN	X1, #4

  (3580) 0x49f588 B.HI	49f4c0

  (3580) 0x49f58c SUB	X1, X16, X3

  (3580) 0x49f590 ADD	X2, X17, X3,LSL #3

  (3580) 0x49f594 ADD	X3, X18, X3,LSL #3

  (3580) 0x49f598 HINT	#0

  (3580) 0x49f59c HINT	#0

    (3582) 0x49f5a0 LDP	X4, X5, [X2, #1008]

    (3582) 0x49f5a4 LDP	D2, D3, [X3, #1008]

    (3582) 0x49f5a8 SUBS	X1, X1, #4

    (3582) 0x49f5ac LDR	D1, [X11, X4,LSL #3]

    (3582) 0x49f5b0 FMADD	D0, D1, D2, D0

    (3582) 0x49f5b4 LDR	D1, [X11, X5,LSL #3]

    (3582) 0x49f5b8 LDP	X4, X5, [X2], #32

    (3582) 0x49f5bc LDR	D2, [X11, X4,LSL #3]

    (3582) 0x49f5c0 FMADD	D0, D1, D3, D0

    (3582) 0x49f5c4 LDP	D1, D3, [X3], #32

    (3582) 0x49f5c8 FMADD	D0, D2, D1, D0

    (3582) 0x49f5cc LDR	D1, [X11, X5,LSL #3]

    (3582) 0x49f5d0 FMADD	D0, D1, D3, D0

    (3582) 0x49f5d4 B.NE	49f5a0

  (3580) 0x49f5d8 B	49f4c0

0x49f5dc FMOV	D1, #-1.0000000

0x49f5e0 FCMP	D0, D1

0x49f5e4 B.NE	49fb60

0x49f5e8 CMP	X20, X19

0x49f5ec B.GE	4a00dc

0x49f5f0 LDR	X9, [X24]

0x49f5f4 LDR	X10, [X23]

0x49f5f8 LDR	X12, [X26]

0x49f5fc ADD	X14, X10, #8

0x49f600 LDR	X8, [X8]

0x49f604 LDR	X11, [X27]

0x49f608 LDR	X13, [X25]

0x49f60c LDR	X16, [X9, X20,LSL #3]

0x49f610 ADD	X15, X12, #8

0x49f614 ADD	X17, X12, #16

0x49f618 ADD	X18, X10, #16

0x49f61c B	49f630

  (3575) 0x49f620 STR	D0, [X13, X20,LSL #3]

  (3575) 0x49f624 ORR	X20, XZR, X0

  (3575) 0x49f628 CMP	X0, X19

  (3575) 0x49f62c B.EQ	4a00dc

  (3575) 0x49f630 LDR	D0, [X8, X20,LSL #3]

  (3575) 0x49f634 ADD	X0, X20, #1

  (3575) 0x49f638 ORR	X5, XZR, X16

  (3575) 0x49f63c LDR	X16, [X9, X0,LSL #3]

  (3575) 0x49f640 SUBS	X2, X16, X5

  (3575) 0x49f644 B.LE	49f620

  (3575) 0x49f648 CMP	X2, #2

  (3575) 0x49f64c B.CS	49f660

  (3575) 0x49f650 ORR	X1, XZR, X5

  (3575) 0x49f654 B	49f6b4

0x49f658 HINT	#0

0x49f65c HINT	#0

(3576) 0x49f660 AND	X3, X2, #8127

(3576) 0x49f664 MOVI	D1, #0

(3576) 0x49f668 ADD	X4, X14, X5,LSL #3

(3576) 0x49f66c ADD	X1, X5, X3

(3576) 0x49f670 ADD	X5, X15, X5,LSL #3

(3576) 0x49f674 ORR	X6, XZR, X3

(3576) 0x49f678 HINT	#0

(3576) 0x49f67c HINT	#0

  (3574) 0x49f680 LDP	X7, X21, [X5, #1016]

  (3574) 0x49f684 LDP	D2, D3, [X4, #1016]

  (3574) 0x49f688 SUBS	X6, X6, #2

  (3574) 0x49f68c ADD	X4, X4, #16

  (3574) 0x49f690 ADD	X5, X5, #16

  (3574) 0x49f694 LDR	D4, [X11, X7,LSL #3]

  (3574) 0x49f698 LDR	D5, [X11, X21,LSL #3]

  (3574) 0x49f69c FMSUB	D0, D4, D2, D0

  (3574) 0x49f6a0 FMSUB	D1, D5, D3, D1

  (3574) 0x49f6a4 B.NE	49f680

(3576) 0x49f6a8 FADD	D0, D1, D0

(3576) 0x49f6ac CMP	X2, X3

(3576) 0x49f6b0 B.EQ	49f620

  (3575) 0x49f6b4 SUB	W2, W16, W1

  (3575) 0x49f6b8 ORR	X3, XZR, X1

  (3575) 0x49f6bc ANDS	X2, X2, #4160

  (3575) 0x49f6c0 B.EQ	49f6e0

    (3578) 0x49f6c4 LDR	X4, [X12, X3,LSL #3]

    (3578) 0x49f6c8 LDR	D1, [X10, X3,LSL #3]

    (3578) 0x49f6cc ADD	X3, X3, #1

    (3578) 0x49f6d0 SUBS	X2, X2, #1

    (3578) 0x49f6d4 LDR	D2, [X11, X4,LSL #3]

    (3578) 0x49f6d8 FMSUB	D0, D2, D1, D0

    (3578) 0x49f6dc B.NE	49f6c4

  (3575) 0x49f6e0 SUB	X1, X1, X16

  (3575) 0x49f6e4 CMN	X1, #4

  (3575) 0x49f6e8 B.HI	49f620

  (3575) 0x49f6ec SUB	X1, X16, X3

  (3575) 0x49f6f0 ADD	X2, X17, X3,LSL #3

  (3575) 0x49f6f4 ADD	X3, X18, X3,LSL #3

  (3575) 0x49f6f8 HINT	#0

  (3575) 0x49f6fc HINT	#0

    (3577) 0x49f700 LDP	X4, X5, [X2, #1008]

    (3577) 0x49f704 LDP	D2, D3, [X3, #1008]

    (3577) 0x49f708 SUBS	X1, X1, #4

    (3577) 0x49f70c LDR	D4, [X11, X5,LSL #3]

    (3577) 0x49f710 LDR	D1, [X11, X4,LSL #3]

    (3577) 0x49f714 LDP	X4, X5, [X2], #32

    (3577) 0x49f718 FMUL	D3, D4, D3

    (3577) 0x49f71c LDR	D4, [X11, X4,LSL #3]

    (3577) 0x49f720 FMADD	D1, D1, D2, D3

    (3577) 0x49f724 LDP	D2, D3, [X3], #32

    (3577) 0x49f728 FMADD	D1, D4, D2, D1

    (3577) 0x49f72c LDR	D2, [X11, X5,LSL #3]

    (3577) 0x49f730 FMADD	D1, D2, D3, D1

    (3577) 0x49f734 FSUB	D0, D0, S1

    (3577) 0x49f738 B.NE	49f700

  (3575) 0x49f73c B	49f620

0x49f740 CMP	X20, X19

0x49f744 B.GE	4a00dc

0x49f748 LDR	X8, [X24]

0x49f74c LDR	X9, [X23]

0x49f750 LDR	X11, [X26]

0x49f754 ADD	X13, X9, #8

0x49f758 LDR	X10, [X27]

0x49f75c LDR	X12, [X25]

0x49f760 LDR	X14, [X8, X20,LSL #3]

0x49f764 ADD	X15, X11, #8

0x49f768 ADD	X16, X11, #16

0x49f76c ADD	X17, X9, #16

0x49f770 B	49f798

0x49f774 HINT	#0

0x49f778 HINT	#0

0x49f77c HINT	#0

(3570) 0x49f780 LDR	D1, [X21]

(3570) 0x49f784 FMUL	D0, D1, D0

(3570) 0x49f788 STR	D0, [X12, X20,LSL #3]

(3570) 0x49f78c ORR	X20, XZR, X18

(3570) 0x49f790 CMP	X18, X19

(3570) 0x49f794 B.EQ	4a00dc

(3570) 0x49f798 ADD	X18, X20, #1

(3570) 0x49f79c ORR	X4, XZR, X14

(3570) 0x49f7a0 MOVI	D0, #0

(3570) 0x49f7a4 LDR	X14, [X8, X18,LSL #3]

(3570) 0x49f7a8 SUBS	X1, X14, X4

(3570) 0x49f7ac B.LE	49f780

(3570) 0x49f7b0 CMP	X1, #2

(3570) 0x49f7b4 B.CS	49f7c0

(3570) 0x49f7b8 ORR	X0, XZR, X4

(3570) 0x49f7bc B	49f814

(3570) 0x49f7c0 AND	X2, X1, #8127

(3570) 0x49f7c4 MOVI	D1, #0

(3570) 0x49f7c8 ADD	X3, X13, X4,LSL #3

(3570) 0x49f7cc ADD	X0, X4, X2

(3570) 0x49f7d0 ADD	X4, X15, X4,LSL #3

(3570) 0x49f7d4 ORR	X5, XZR, X2

(3570) 0x49f7d8 HINT	#0

(3570) 0x49f7dc HINT	#0

  (3571) 0x49f7e0 LDP	X6, X7, [X4, #1016]

  (3571) 0x49f7e4 LDP	D2, D3, [X3, #1016]

  (3571) 0x49f7e8 SUBS	X5, X5, #2

  (3571) 0x49f7ec ADD	X3, X3, #16

  (3571) 0x49f7f0 ADD	X4, X4, #16

  (3571) 0x49f7f4 LDR	D4, [X10, X6,LSL #3]

  (3571) 0x49f7f8 LDR	D5, [X10, X7,LSL #3]

  (3571) 0x49f7fc FMADD	D0, D4, D2, D0

  (3571) 0x49f800 FMADD	D1, D5, D3, D1

  (3571) 0x49f804 B.NE	49f7e0

(3570) 0x49f808 FADD	D0, D1, D0

(3570) 0x49f80c CMP	X1, X2

(3570) 0x49f810 B.EQ	49f780

(3570) 0x49f814 SUB	W1, W14, W0

(3570) 0x49f818 ORR	X2, XZR, X0

(3570) 0x49f81c ANDS	X1, X1, #4160

(3570) 0x49f820 B.EQ	49f840

  (3573) 0x49f824 LDR	X3, [X11, X2,LSL #3]

  (3573) 0x49f828 LDR	D1, [X9, X2,LSL #3]

  (3573) 0x49f82c ADD	X2, X2, #1

  (3573) 0x49f830 SUBS	X1, X1, #1

  (3573) 0x49f834 LDR	D2, [X10, X3,LSL #3]

  (3573) 0x49f838 FMADD	D0, D2, D1, D0

  (3573) 0x49f83c B.NE	49f824

(3570) 0x49f840 SUB	X0, X0, X14

(3570) 0x49f844 CMN	X0, #4

(3570) 0x49f848 B.HI	49f780

(3570) 0x49f84c SUB	X0, X14, X2

(3570) 0x49f850 ADD	X1, X16, X2,LSL #3

(3570) 0x49f854 ADD	X2, X17, X2,LSL #3

(3570) 0x49f858 HINT	#0

(3570) 0x49f85c HINT	#0

  (3572) 0x49f860 LDP	X3, X4, [X1, #1008]

  (3572) 0x49f864 LDP	D2, D3, [X2, #1008]

  (3572) 0x49f868 SUBS	X0, X0, #4

  (3572) 0x49f86c LDR	D1, [X10, X3,LSL #3]

  (3572) 0x49f870 FMADD	D0, D1, D2, D0

  (3572) 0x49f874 LDR	D1, [X10, X4,LSL #3]

  (3572) 0x49f878 LDP	X3, X4, [X1], #32

  (3572) 0x49f87c LDR	D2, [X10, X3,LSL #3]

  (3572) 0x49f880 FMADD	D0, D1, D3, D0

  (3572) 0x49f884 LDP	D1, D3, [X2], #32

  (3572) 0x49f888 FMADD	D0, D2, D1, D0

  (3572) 0x49f88c LDR	D1, [X10, X4,LSL #3]

  (3572) 0x49f890 FMADD	D0, D1, D3, D0

  (3572) 0x49f894 B.NE	49f860

(3570) 0x49f898 B	49f780

0x49f89c FCMP	D0, D2

0x49f8a0 B.NE	49fcbc

0x49f8a4 CMP	X20, X19

0x49f8a8 B.GE	4a00dc

0x49f8ac LDR	X9, [X24]

0x49f8b0 LDR	X10, [X23]

0x49f8b4 LDR	X12, [X26]

0x49f8b8 ADD	X14, X10, #8

0x49f8bc LDR	X8, [X8]

0x49f8c0 LDR	X11, [X27]

0x49f8c4 LDR	X13, [X25]

0x49f8c8 LDR	X18, [X9, X20,LSL #3]

0x49f8cc ADD	X15, X12, #8

0x49f8d0 ADD	X16, X12, #16

0x49f8d4 ADD	X17, X10, #16

0x49f8d8 B	49f8f0

0x49f8dc HINT	#0

(3566) 0x49f8e0 STR	D0, [X13, X20,LSL #3]

(3566) 0x49f8e4 ORR	X20, XZR, X0

(3566) 0x49f8e8 CMP	X0, X19

(3566) 0x49f8ec B.EQ	4a00dc

(3566) 0x49f8f0 LDR	D0, [X8, X20,LSL #3]

(3566) 0x49f8f4 LDR	D1, [X22]

(3566) 0x49f8f8 ADD	X0, X20, #1

(3566) 0x49f8fc ORR	X5, XZR, X18

(3566) 0x49f900 LDR	X18, [X9, X0,LSL #3]

(3566) 0x49f904 SUBS	X2, X18, X5

(3566) 0x49f908 FMUL	D0, D1, D0

(3566) 0x49f90c B.LE	49f8e0

(3566) 0x49f910 CMP	X2, #2

(3566) 0x49f914 B.CS	49f920

(3566) 0x49f918 ORR	X1, XZR, X5

(3566) 0x49f91c B	49f974

(3566) 0x49f920 AND	X3, X2, #8127

(3566) 0x49f924 MOVI	D1, #0

(3566) 0x49f928 ADD	X4, X14, X5,LSL #3

(3566) 0x49f92c ADD	X1, X5, X3

(3566) 0x49f930 ADD	X5, X15, X5,LSL #3

(3566) 0x49f934 ORR	X6, XZR, X3

(3566) 0x49f938 HINT	#0

(3566) 0x49f93c HINT	#0

  (3567) 0x49f940 LDP	X7, X21, [X5, #1016]

  (3567) 0x49f944 LDP	D2, D3, [X4, #1016]

  (3567) 0x49f948 SUBS	X6, X6, #2

  (3567) 0x49f94c ADD	X4, X4, #16

  (3567) 0x49f950 ADD	X5, X5, #16

  (3567) 0x49f954 LDR	D4, [X11, X7,LSL #3]

  (3567) 0x49f958 LDR	D5, [X11, X21,LSL #3]

  (3567) 0x49f95c FMADD	D0, D4, D2, D0

  (3567) 0x49f960 FMADD	D1, D5, D3, D1

  (3567) 0x49f964 B.NE	49f940

(3566) 0x49f968 FADD	D0, D1, D0

(3566) 0x49f96c CMP	X2, X3

(3566) 0x49f970 B.EQ	49f8e0

(3566) 0x49f974 SUB	W2, W18, W1

(3566) 0x49f978 ORR	X3, XZR, X1

(3566) 0x49f97c ANDS	X2, X2, #4160

(3566) 0x49f980 B.EQ	49f9a0

  (3569) 0x49f984 LDR	X4, [X12, X3,LSL #3]

  (3569) 0x49f988 LDR	D1, [X10, X3,LSL #3]

  (3569) 0x49f98c ADD	X3, X3, #1

  (3569) 0x49f990 SUBS	X2, X2, #1

  (3569) 0x49f994 LDR	D2, [X11, X4,LSL #3]

  (3569) 0x49f998 FMADD	D0, D2, D1, D0

  (3569) 0x49f99c B.NE	49f984

(3566) 0x49f9a0 SUB	X1, X1, X18

(3566) 0x49f9a4 CMN	X1, #4

(3566) 0x49f9a8 B.HI	49f8e0

(3566) 0x49f9ac SUB	X1, X18, X3

(3566) 0x49f9b0 ADD	X2, X16, X3,LSL #3

(3566) 0x49f9b4 ADD	X3, X17, X3,LSL #3

(3566) 0x49f9b8 HINT	#0

(3566) 0x49f9bc HINT	#0

  (3568) 0x49f9c0 LDP	X4, X5, [X2, #1008]

  (3568) 0x49f9c4 LDP	D2, D3, [X3, #1008]

  (3568) 0x49f9c8 SUBS	X1, X1, #4

  (3568) 0x49f9cc LDR	D1, [X11, X4,LSL #3]

  (3568) 0x49f9d0 FMADD	D0, D1, D2, D0

  (3568) 0x49f9d4 LDR	D1, [X11, X5,LSL #3]

  (3568) 0x49f9d8 LDP	X4, X5, [X2], #32

  (3568) 0x49f9dc LDR	D2, [X11, X4,LSL #3]

  (3568) 0x49f9e0 FMADD	D0, D1, D3, D0

  (3568) 0x49f9e4 LDP	D1, D3, [X3], #32

  (3568) 0x49f9e8 FMADD	D0, D2, D1, D0

  (3568) 0x49f9ec LDR	D1, [X11, X5,LSL #3]

  (3568) 0x49f9f0 FMADD	D0, D1, D3, D0

  (3568) 0x49f9f4 B.NE	49f9c0

(3566) 0x49f9f8 B	49f8e0

0x49f9fc FMOV	D1, #-1.0000000

0x49fa00 FCMP	D0, D1

0x49fa04 B.NE	49fe20

0x49fa08 CMP	X20, X19

0x49fa0c B.GE	4a00dc

0x49fa10 LDR	X9, [X24]

0x49fa14 LDR	X10, [X23]

0x49fa18 LDR	X12, [X26]

0x49fa1c ADD	X14, X10, #8

0x49fa20 LDR	X8, [X8]

0x49fa24 LDR	X11, [X27]

0x49fa28 LDR	X13, [X25]

0x49fa2c LDR	X17, [X9, X20,LSL #3]

0x49fa30 ADD	X15, X12, #8

0x49fa34 ADD	X16, X12, #16

0x49fa38 ADD	X18, X10, #16

0x49fa3c B	49fa50

(3611) 0x49fa40 STR	D0, [X13, X20,LSL #3]

(3611) 0x49fa44 ORR	X20, XZR, X0

(3611) 0x49fa48 CMP	X0, X19

(3611) 0x49fa4c B.EQ	4a00dc

(3611) 0x49fa50 LDR	D0, [X8, X20,LSL #3]

(3611) 0x49fa54 ADD	X0, X20, #1

(3611) 0x49fa58 ORR	X5, XZR, X17

(3611) 0x49fa5c LDR	X17, [X9, X0,LSL #3]

(3611) 0x49fa60 SUBS	X2, X17, X5

(3611) 0x49fa64 FNEG	D0, D0

(3611) 0x49fa68 B.LE	49fa40

(3611) 0x49fa6c CMP	X2, #2

(3611) 0x49fa70 B.CS	49fa7c

(3611) 0x49fa74 ORR	X1, XZR, X5

(3611) 0x49fa78 B	49fad4

(3611) 0x49fa7c AND	X3, X2, #8127

(3611) 0x49fa80 MOVI	D1, #0

(3611) 0x49fa84 ADD	X4, X14, X5,LSL #3

(3611) 0x49fa88 ADD	X1, X5, X3

(3611) 0x49fa8c ADD	X5, X15, X5,LSL #3

(3611) 0x49fa90 ORR	X6, XZR, X3

(3611) 0x49fa94 HINT	#0

(3611) 0x49fa98 HINT	#0

(3611) 0x49fa9c HINT	#0

  (3612) 0x49faa0 LDP	X7, X21, [X5, #1016]

  (3612) 0x49faa4 LDP	D2, D3, [X4, #1016]

  (3612) 0x49faa8 SUBS	X6, X6, #2

  (3612) 0x49faac ADD	X4, X4, #16

  (3612) 0x49fab0 ADD	X5, X5, #16

  (3612) 0x49fab4 LDR	D4, [X11, X7,LSL #3]

  (3612) 0x49fab8 LDR	D5, [X11, X21,LSL #3]

  (3612) 0x49fabc FMSUB	D0, D4, D2, D0

  (3612) 0x49fac0 FMSUB	D1, D5, D3, D1

  (3612) 0x49fac4 B.NE	49faa0

(3611) 0x49fac8 FADD	D0, D1, D0

(3611) 0x49facc CMP	X2, X3

(3611) 0x49fad0 B.EQ	49fa40

(3611) 0x49fad4 SUB	W2, W17, W1

(3611) 0x49fad8 ORR	X3, XZR, X1

(3611) 0x49fadc ANDS	X2, X2, #4160

(3611) 0x49fae0 B.EQ	49fb00

  (3614) 0x49fae4 LDR	X4, [X12, X3,LSL #3]

  (3614) 0x49fae8 LDR	D1, [X10, X3,LSL #3]

  (3614) 0x49faec ADD	X3, X3, #1

  (3614) 0x49faf0 SUBS	X2, X2, #1

  (3614) 0x49faf4 LDR	D2, [X11, X4,LSL #3]

  (3614) 0x49faf8 FMSUB	D0, D2, D1, D0

  (3614) 0x49fafc B.NE	49fae4

(3611) 0x49fb00 SUB	X1, X1, X17

(3611) 0x49fb04 CMN	X1, #4

(3611) 0x49fb08 B.HI	49fa40

(3611) 0x49fb0c SUB	X1, X17, X3

(3611) 0x49fb10 ADD	X2, X16, X3,LSL #3

(3611) 0x49fb14 ADD	X3, X18, X3,LSL #3

(3611) 0x49fb18 HINT	#0

(3611) 0x49fb1c HINT	#0

  (3613) 0x49fb20 LDP	X4, X5, [X2, #1008]

  (3613) 0x49fb24 LDP	D2, D3, [X3, #1008]

  (3613) 0x49fb28 SUBS	X1, X1, #4

  (3613) 0x49fb2c LDR	D4, [X11, X5,LSL #3]

  (3613) 0x49fb30 LDR	D1, [X11, X4,LSL #3]

  (3613) 0x49fb34 LDP	X4, X5, [X2], #32

  (3613) 0x49fb38 FMUL	D3, D4, D3

  (3613) 0x49fb3c LDR	D4, [X11, X4,LSL #3]

  (3613) 0x49fb40 FMADD	D1, D1, D2, D3

  (3613) 0x49fb44 LDP	D2, D3, [X3], #32

  (3613) 0x49fb48 FMADD	D1, D4, D2, D1

  (3613) 0x49fb4c LDR	D2, [X11, X5,LSL #3]

  (3613) 0x49fb50 FMADD	D1, D2, D3, D1

  (3613) 0x49fb54 FSUB	D0, D0, S1

  (3613) 0x49fb58 B.NE	49fb20

(3611) 0x49fb5c B	49fa40

0x49fb60 CMP	X20, X19

0x49fb64 B.GE	4a00dc

0x49fb68 LDR	X9, [X24]

0x49fb6c LDR	X10, [X23]

0x49fb70 LDR	X12, [X26]

0x49fb74 ADD	X14, X10, #8

0x49fb78 LDR	X8, [X8]

0x49fb7c LDR	X11, [X27]

0x49fb80 LDR	X13, [X25]

0x49fb84 LDR	X17, [X9, X20,LSL #3]

0x49fb88 ADD	X15, X12, #8

0x49fb8c ADD	X16, X12, #16

0x49fb90 ADD	X18, X10, #16

0x49fb94 B	49fbb8

0x49fb98 HINT	#0

0x49fb9c HINT	#0

(3562) 0x49fba0 LDR	D1, [X21]

(3562) 0x49fba4 FMUL	D0, D1, D0

(3562) 0x49fba8 STR	D0, [X13, X20,LSL #3]

(3562) 0x49fbac ORR	X20, XZR, X0

(3562) 0x49fbb0 CMP	X0, X19

(3562) 0x49fbb4 B.EQ	4a00dc

(3562) 0x49fbb8 LDR	D0, [X8, X20,LSL #3]

(3562) 0x49fbbc ADD	X0, X20, #1

(3562) 0x49fbc0 ORR	X5, XZR, X17

(3562) 0x49fbc4 LDR	X17, [X9, X0,LSL #3]

(3562) 0x49fbc8 SUBS	X2, X17, X5

(3562) 0x49fbcc FNEG	D0, D0

(3562) 0x49fbd0 B.LE	49fba0

(3562) 0x49fbd4 CMP	X2, #2

(3562) 0x49fbd8 B.CS	49fbe4

(3562) 0x49fbdc ORR	X1, XZR, X5

(3562) 0x49fbe0 B	49fc34

(3562) 0x49fbe4 AND	X3, X2, #8127

(3562) 0x49fbe8 MOVI	D1, #0

(3562) 0x49fbec ADD	X4, X14, X5,LSL #3

(3562) 0x49fbf0 ADD	X1, X5, X3

(3562) 0x49fbf4 ADD	X5, X15, X5,LSL #3

(3562) 0x49fbf8 ORR	X6, XZR, X3

(3562) 0x49fbfc HINT	#0

  (3563) 0x49fc00 LDP	X7, X22, [X5, #1016]

  (3563) 0x49fc04 LDP	D2, D3, [X4, #1016]

  (3563) 0x49fc08 SUBS	X6, X6, #2

  (3563) 0x49fc0c ADD	X4, X4, #16

  (3563) 0x49fc10 ADD	X5, X5, #16

  (3563) 0x49fc14 LDR	D4, [X11, X7,LSL #3]

  (3563) 0x49fc18 LDR	D5, [X11, X22,LSL #3]

  (3563) 0x49fc1c FMADD	D0, D4, D2, D0

  (3563) 0x49fc20 FMADD	D1, D5, D3, D1

  (3563) 0x49fc24 B.NE	49fc00

(3562) 0x49fc28 FADD	D0, D1, D0

(3562) 0x49fc2c CMP	X2, X3

(3562) 0x49fc30 B.EQ	49fba0

(3562) 0x49fc34 SUB	W2, W17, W1

(3562) 0x49fc38 ORR	X3, XZR, X1

(3562) 0x49fc3c ANDS	X2, X2, #4160

(3562) 0x49fc40 B.EQ	49fc60

  (3565) 0x49fc44 LDR	X4, [X12, X3,LSL #3]

  (3565) 0x49fc48 LDR	D1, [X10, X3,LSL #3]

  (3565) 0x49fc4c ADD	X3, X3, #1

  (3565) 0x49fc50 SUBS	X2, X2, #1

  (3565) 0x49fc54 LDR	D2, [X11, X4,LSL #3]

  (3565) 0x49fc58 FMADD	D0, D2, D1, D0

  (3565) 0x49fc5c B.NE	49fc44

(3562) 0x49fc60 SUB	X1, X1, X17

(3562) 0x49fc64 CMN	X1, #4

(3562) 0x49fc68 B.HI	49fba0

(3562) 0x49fc6c SUB	X1, X17, X3

(3562) 0x49fc70 ADD	X2, X16, X3,LSL #3

(3562) 0x49fc74 ADD	X3, X18, X3,LSL #3

(3562) 0x49fc78 HINT	#0

(3562) 0x49fc7c HINT	#0

  (3564) 0x49fc80 LDP	X4, X5, [X2, #1008]

  (3564) 0x49fc84 LDP	D2, D3, [X3, #1008]

  (3564) 0x49fc88 SUBS	X1, X1, #4

  (3564) 0x49fc8c LDR	D1, [X11, X4,LSL #3]

  (3564) 0x49fc90 FMADD	D0, D1, D2, D0

  (3564) 0x49fc94 LDR	D1, [X11, X5,LSL #3]

  (3564) 0x49fc98 LDP	X4, X5, [X2], #32

  (3564) 0x49fc9c LDR	D2, [X11, X4,LSL #3]

  (3564) 0x49fca0 FMADD	D0, D1, D3, D0

  (3564) 0x49fca4 LDP	D1, D3, [X3], #32

  (3564) 0x49fca8 FMADD	D0, D2, D1, D0

  (3564) 0x49fcac LDR	D1, [X11, X5,LSL #3]

  (3564) 0x49fcb0 FMADD	D0, D1, D3, D0

  (3564) 0x49fcb4 B.NE	49fc80

(3562) 0x49fcb8 B	49fba0

0x49fcbc FMOV	D1, #-1.0000000

0x49fcc0 FCMP	D0, D1

0x49fcc4 B.NE	49ff7c

0x49fcc8 CMP	X20, X19

0x49fccc B.GE	4a00dc

0x49fcd0 LDR	X9, [X24]

0x49fcd4 LDR	X10, [X23]

0x49fcd8 LDR	X12, [X26]

0x49fcdc ADD	X14, X10, #8

0x49fce0 LDR	X8, [X8]

0x49fce4 LDR	X11, [X27]

0x49fce8 LDR	X13, [X25]

0x49fcec LDR	X18, [X9, X20,LSL #3]

0x49fcf0 ADD	X15, X12, #8

0x49fcf4 ADD	X16, X12, #16

0x49fcf8 ADD	X17, X10, #16

0x49fcfc B	49fd10

(3603) 0x49fd00 STR	D0, [X13, X20,LSL #3]

(3603) 0x49fd04 ORR	X20, XZR, X0

(3603) 0x49fd08 CMP	X0, X19

(3603) 0x49fd0c B.EQ	4a00dc

(3603) 0x49fd10 LDR	D0, [X8, X20,LSL #3]

(3603) 0x49fd14 LDR	D1, [X22]

(3603) 0x49fd18 ADD	X0, X20, #1

(3603) 0x49fd1c ORR	X5, XZR, X18

(3603) 0x49fd20 LDR	X18, [X9, X0,LSL #3]

(3603) 0x49fd24 SUBS	X2, X18, X5

(3603) 0x49fd28 FNMUL	D0, D0, D1

(3603) 0x49fd2c B.LE	49fd00

(3603) 0x49fd30 CMP	X2, #2

(3603) 0x49fd34 B.CS	49fd40

(3603) 0x49fd38 ORR	X1, XZR, X5

(3603) 0x49fd3c B	49fd94

(3603) 0x49fd40 AND	X3, X2, #8127

(3603) 0x49fd44 MOVI	D1, #0

(3603) 0x49fd48 ADD	X4, X14, X5,LSL #3

(3603) 0x49fd4c ADD	X1, X5, X3

(3603) 0x49fd50 ADD	X5, X15, X5,LSL #3

(3603) 0x49fd54 ORR	X6, XZR, X3

(3603) 0x49fd58 HINT	#0

(3603) 0x49fd5c HINT	#0

  (3604) 0x49fd60 LDP	X7, X21, [X5, #1016]

  (3604) 0x49fd64 LDP	D2, D3, [X4, #1016]

  (3604) 0x49fd68 SUBS	X6, X6, #2

  (3604) 0x49fd6c ADD	X4, X4, #16

  (3604) 0x49fd70 ADD	X5, X5, #16

  (3604) 0x49fd74 LDR	D4, [X11, X7,LSL #3]

  (3604) 0x49fd78 LDR	D5, [X11, X21,LSL #3]

  (3604) 0x49fd7c FMSUB	D0, D4, D2, D0

  (3604) 0x49fd80 FMSUB	D1, D5, D3, D1

  (3604) 0x49fd84 B.NE	49fd60

(3603) 0x49fd88 FADD	D0, D1, D0

(3603) 0x49fd8c CMP	X2, X3

(3603) 0x49fd90 B.EQ	49fd00

(3603) 0x49fd94 SUB	W2, W18, W1

(3603) 0x49fd98 ORR	X3, XZR, X1

(3603) 0x49fd9c ANDS	X2, X2, #4160

(3603) 0x49fda0 B.EQ	49fdc0

  (3606) 0x49fda4 LDR	X4, [X12, X3,LSL #3]

  (3606) 0x49fda8 LDR	D1, [X10, X3,LSL #3]

  (3606) 0x49fdac ADD	X3, X3, #1

  (3606) 0x49fdb0 SUBS	X2, X2, #1

  (3606) 0x49fdb4 LDR	D2, [X11, X4,LSL #3]

  (3606) 0x49fdb8 FMSUB	D0, D2, D1, D0

  (3606) 0x49fdbc B.NE	49fda4

(3603) 0x49fdc0 SUB	X1, X1, X18

(3603) 0x49fdc4 CMN	X1, #4

(3603) 0x49fdc8 B.HI	49fd00

(3603) 0x49fdcc SUB	X1, X18, X3

(3603) 0x49fdd0 ADD	X2, X16, X3,LSL #3

(3603) 0x49fdd4 ADD	X3, X17, X3,LSL #3

(3603) 0x49fdd8 HINT	#0

(3603) 0x49fddc HINT	#0

  (3605) 0x49fde0 LDP	X4, X5, [X2, #1008]

  (3605) 0x49fde4 LDP	D2, D3, [X3, #1008]

  (3605) 0x49fde8 SUBS	X1, X1, #4

  (3605) 0x49fdec LDR	D4, [X11, X5,LSL #3]

  (3605) 0x49fdf0 LDR	D1, [X11, X4,LSL #3]

  (3605) 0x49fdf4 LDP	X4, X5, [X2], #32

  (3605) 0x49fdf8 FMUL	D3, D4, D3

  (3605) 0x49fdfc LDR	D4, [X11, X4,LSL #3]

  (3605) 0x49fe00 FMADD	D1, D1, D2, D3

  (3605) 0x49fe04 LDP	D2, D3, [X3], #32

  (3605) 0x49fe08 FMADD	D1, D4, D2, D1

  (3605) 0x49fe0c LDR	D2, [X11, X5,LSL #3]

  (3605) 0x49fe10 FMADD	D1, D2, D3, D1

  (3605) 0x49fe14 FSUB	D0, D0, S1

  (3605) 0x49fe18 B.NE	49fde0

(3603) 0x49fe1c B	49fd00

0x49fe20 CMP	X20, X19

0x49fe24 B.GE	4a00dc

0x49fe28 LDR	X9, [X24]

0x49fe2c LDR	X10, [X23]

0x49fe30 LDR	X12, [X26]

0x49fe34 ADD	X14, X10, #8

0x49fe38 LDR	X8, [X8]

0x49fe3c LDR	X11, [X27]

0x49fe40 LDR	X13, [X25]

0x49fe44 LDR	X16, [X9, X20,LSL #3]

0x49fe48 ADD	X15, X12, #8

0x49fe4c ADD	X17, X12, #16

0x49fe50 ADD	X18, X10, #16

0x49fe54 B	49fe70

(3607) 0x49fe58 LDR	D1, [X21]

(3607) 0x49fe5c FMUL	D0, D1, D0

(3607) 0x49fe60 STR	D0, [X13, X20,LSL #3]

(3607) 0x49fe64 ORR	X20, XZR, X0

(3607) 0x49fe68 CMP	X0, X19

(3607) 0x49fe6c B.EQ	4a00dc

(3607) 0x49fe70 LDR	D0, [X8, X20,LSL #3]

(3607) 0x49fe74 ADD	X0, X20, #1

(3607) 0x49fe78 ORR	X5, XZR, X16

(3607) 0x49fe7c LDR	X16, [X9, X0,LSL #3]

(3607) 0x49fe80 SUBS	X2, X16, X5

(3607) 0x49fe84 B.LE	49fe58

(3607) 0x49fe88 CMP	X2, #2

(3607) 0x49fe8c B.CS	49fe98

(3607) 0x49fe90 ORR	X1, XZR, X5

(3607) 0x49fe94 B	49fef4

(3607) 0x49fe98 AND	X3, X2, #8127

(3607) 0x49fe9c MOVI	D1, #0

(3607) 0x49fea0 ADD	X4, X14, X5,LSL #3

(3607) 0x49fea4 ADD	X1, X5, X3

(3607) 0x49fea8 ADD	X5, X15, X5,LSL #3

(3607) 0x49feac ORR	X6, XZR, X3

(3607) 0x49feb0 HINT	#0

(3607) 0x49feb4 HINT	#0

(3607) 0x49feb8 HINT	#0

(3607) 0x49febc HINT	#0

  (3608) 0x49fec0 LDP	X7, X22, [X5, #1016]

  (3608) 0x49fec4 LDP	D2, D3, [X4, #1016]

  (3608) 0x49fec8 SUBS	X6, X6, #2

  (3608) 0x49fecc ADD	X4, X4, #16

  (3608) 0x49fed0 ADD	X5, X5, #16

  (3608) 0x49fed4 LDR	D4, [X11, X7,LSL #3]

  (3608) 0x49fed8 LDR	D5, [X11, X22,LSL #3]

  (3608) 0x49fedc FMADD	D0, D4, D2, D0

  (3608) 0x49fee0 FMADD	D1, D5, D3, D1

  (3608) 0x49fee4 B.NE	49fec0

(3607) 0x49fee8 FADD	D0, D1, D0

(3607) 0x49feec CMP	X2, X3

(3607) 0x49fef0 B.EQ	49fe58

(3607) 0x49fef4 SUB	W2, W16, W1

(3607) 0x49fef8 ORR	X3, XZR, X1

(3607) 0x49fefc ANDS	X2, X2, #4160

(3607) 0x49ff00 B.EQ	49ff20

  (3610) 0x49ff04 LDR	X4, [X12, X3,LSL #3]

  (3610) 0x49ff08 LDR	D1, [X10, X3,LSL #3]

  (3610) 0x49ff0c ADD	X3, X3, #1

  (3610) 0x49ff10 SUBS	X2, X2, #1

  (3610) 0x49ff14 LDR	D2, [X11, X4,LSL #3]

  (3610) 0x49ff18 FMADD	D0, D2, D1, D0

  (3610) 0x49ff1c B.NE	49ff04

(3607) 0x49ff20 SUB	X1, X1, X16

(3607) 0x49ff24 CMN	X1, #4

(3607) 0x49ff28 B.HI	49fe58

(3607) 0x49ff2c SUB	X1, X16, X3

(3607) 0x49ff30 ADD	X2, X17, X3,LSL #3

(3607) 0x49ff34 ADD	X3, X18, X3,LSL #3

(3607) 0x49ff38 HINT	#0

(3607) 0x49ff3c HINT	#0

  (3609) 0x49ff40 LDP	X4, X5, [X2, #1008]

  (3609) 0x49ff44 LDP	D2, D3, [X3, #1008]

  (3609) 0x49ff48 SUBS	X1, X1, #4

  (3609) 0x49ff4c LDR	D1, [X11, X4,LSL #3]

  (3609) 0x49ff50 FMADD	D0, D1, D2, D0

  (3609) 0x49ff54 LDR	D1, [X11, X5,LSL #3]

  (3609) 0x49ff58 LDP	X4, X5, [X2], #32

  (3609) 0x49ff5c LDR	D2, [X11, X4,LSL #3]

  (3609) 0x49ff60 FMADD	D0, D1, D3, D0

  (3609) 0x49ff64 LDP	D1, D3, [X3], #32

  (3609) 0x49ff68 FMADD	D0, D2, D1, D0

  (3609) 0x49ff6c LDR	D1, [X11, X5,LSL #3]

  (3609) 0x49ff70 FMADD	D0, D1, D3, D0

  (3609) 0x49ff74 B.NE	49ff40

(3607) 0x49ff78 B	49fe58

0x49ff7c CMP	X20, X19

0x49ff80 B.GE	4a00dc

0x49ff84 LDR	X9, [X24]

0x49ff88 LDR	X10, [X23]

0x49ff8c LDR	X12, [X26]

0x49ff90 ADD	X14, X10, #8

0x49ff94 LDR	X8, [X8]

0x49ff98 LDR	X11, [X27]

0x49ff9c LDR	X13, [X25]

0x49ffa0 LDR	X18, [X9, X20,LSL #3]

0x49ffa4 ADD	X15, X12, #8

0x49ffa8 ADD	X16, X12, #16

0x49ffac ADD	X17, X10, #16

0x49ffb0 B	49ffcc

(3599) 0x49ffb4 LDR	D1, [X21]

(3599) 0x49ffb8 FMUL	D0, D1, D0

(3599) 0x49ffbc STR	D0, [X13, X20,LSL #3]

(3599) 0x49ffc0 ORR	X20, XZR, X0

(3599) 0x49ffc4 CMP	X0, X19

(3599) 0x49ffc8 B.EQ	4a00dc

(3599) 0x49ffcc LDR	D0, [X8, X20,LSL #3]

(3599) 0x49ffd0 LDR	D1, [X22]

(3599) 0x49ffd4 ADD	X0, X20, #1

(3599) 0x49ffd8 ORR	X5, XZR, X18

(3599) 0x49ffdc LDR	X18, [X9, X0,LSL #3]

(3599) 0x49ffe0 SUBS	X2, X18, X5

(3599) 0x49ffe4 FMUL	D0, D1, D0

(3599) 0x49ffe8 B.LE	49ffb4

(3599) 0x49ffec CMP	X2, #2

(3599) 0x49fff0 B.CS	49fffc

(3599) 0x49fff4 ORR	X1, XZR, X5

(3599) 0x49fff8 B	4a0054

(3599) 0x49fffc AND	X3, X2, #8127

(3599) 0x4a0000 MOVI	D1, #0

(3599) 0x4a0004 ADD	X4, X14, X5,LSL #3

(3599) 0x4a0008 ADD	X1, X5, X3

(3599) 0x4a000c ADD	X5, X15, X5,LSL #3

(3599) 0x4a0010 ORR	X6, XZR, X3

(3599) 0x4a0014 HINT	#0

(3599) 0x4a0018 HINT	#0

(3599) 0x4a001c HINT	#0

  (3600) 0x4a0020 LDP	X7, X23, [X5, #1016]

  (3600) 0x4a0024 LDP	D2, D3, [X4, #1016]

  (3600) 0x4a0028 SUBS	X6, X6, #2

  (3600) 0x4a002c ADD	X4, X4, #16

  (3600) 0x4a0030 ADD	X5, X5, #16

  (3600) 0x4a0034 LDR	D4, [X11, X7,LSL #3]

  (3600) 0x4a0038 LDR	D5, [X11, X23,LSL #3]

  (3600) 0x4a003c FMADD	D0, D4, D2, D0

  (3600) 0x4a0040 FMADD	D1, D5, D3, D1

  (3600) 0x4a0044 B.NE	4a0020

(3599) 0x4a0048 FADD	D0, D1, D0

(3599) 0x4a004c CMP	X2, X3

(3599) 0x4a0050 B.EQ	49ffb4

(3599) 0x4a0054 SUB	W2, W18, W1

(3599) 0x4a0058 ORR	X3, XZR, X1

(3599) 0x4a005c ANDS	X2, X2, #4160

(3599) 0x4a0060 B.EQ	4a0080

  (3602) 0x4a0064 LDR	X4, [X12, X3,LSL #3]

  (3602) 0x4a0068 LDR	D1, [X10, X3,LSL #3]

  (3602) 0x4a006c ADD	X3, X3, #1

  (3602) 0x4a0070 SUBS	X2, X2, #1

  (3602) 0x4a0074 LDR	D2, [X11, X4,LSL #3]

  (3602) 0x4a0078 FMADD	D0, D2, D1, D0

  (3602) 0x4a007c B.NE	4a0064

(3599) 0x4a0080 SUB	X1, X1, X18

(3599) 0x4a0084 CMN	X1, #4

(3599) 0x4a0088 B.HI	49ffb4

(3599) 0x4a008c SUB	X1, X18, X3

(3599) 0x4a0090 ADD	X2, X16, X3,LSL #3

(3599) 0x4a0094 ADD	X3, X17, X3,LSL #3

(3599) 0x4a0098 HINT	#0

(3599) 0x4a009c HINT	#0

  (3601) 0x4a00a0 LDP	X4, X5, [X2, #1008]

  (3601) 0x4a00a4 LDP	D2, D3, [X3, #1008]

  (3601) 0x4a00a8 SUBS	X1, X1, #4

  (3601) 0x4a00ac LDR	D1, [X11, X4,LSL #3]

  (3601) 0x4a00b0 FMADD	D0, D1, D2, D0

  (3601) 0x4a00b4 LDR	D1, [X11, X5,LSL #3]

  (3601) 0x4a00b8 LDP	X4, X5, [X2], #32

  (3601) 0x4a00bc LDR	D2, [X11, X4,LSL #3]

  (3601) 0x4a00c0 FMADD	D0, D1, D3, D0

  (3601) 0x4a00c4 LDP	D1, D3, [X3], #32

  (3601) 0x4a00c8 FMADD	D0, D2, D1, D0

  (3601) 0x4a00cc LDR	D1, [X11, X5,LSL #3]

  (3601) 0x4a00d0 FMADD	D0, D1, D3, D0

  (3601) 0x4a00d4 B.NE	4a00a0

(3599) 0x4a00d8 B	49ffb4

0x4a00dc LDP	X20, X19, [SP, #80]

0x4a00e0 LDP	X22, X21, [SP, #64]

0x4a00e4 LDP	X24, X23, [SP, #48]

0x4a00e8 LDP	X26, X25, [SP, #32]

0x4a00ec LDP	X28, X27, [SP, #16]

0x4a00f0 LDP	X29, X30, [SP], #96

0x4a00f4 RET

0x4a00f8 HINT	#0

0x4a00fc HINT	#0

Coverage (%)	Name	Source Location	Module
○100.00	__kmp_invoke_microtask		libomp.so

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run armclang_5

Source file and lines	csr_matvec.c:243-404
Module	exec

The function is defined in /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:243-365,371-404.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 36.00 to 6.33 cycles (5.68x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is not vectorized. Only 51% of vector register length is used (average across all VPU instructions). By vectorizing your function, you can lower the cost of an iteration from 36.00 to 27.50 cycles (1.31x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 36.00 to 4.00 cycles (9.00x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 872 bytes. The binary function is storing 96 bytes.

General properties

nb instructions	304
loop length	1216
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

34.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	24.50	24.50	18.25	18.25	18.17	18.17	18.08	18.08	11.00	2.75	2.75	2.50	36.00	36.00	36.00	3.00	3.00
cycles	24.50	24.50	18.25	18.25	18.17	18.17	18.08	18.08	11.00	2.75	2.75	2.50	36.00	36.00	36.00	3.00	3.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	34.50
Overall L1	36.00

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 36.00 cycles. At this rate:

25% of peak load performance is reached (24.22 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (2.67 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 49eef0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
STP X29, X30, [SP, #928]!	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X28, X27, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X26, X25, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X24, X23, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X22, X21, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X20, X19, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ADD X29, SP, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [X2]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ORR X23, XZR, X7	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X24, XZR, X6	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X21, XZR, X5	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X22, XZR, X4	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X25, XZR, X3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X19, XZR, X2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 49dc80 <hypre_CSRMatrixGetLoadBalancedPartitionBegin>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X20, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [X19]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
BL 49dd00 <hypre_CSRMatrixGetLoadBalancedPartitionEnd>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X28, <4dff38>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X19, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X28, [X28, #3824]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X20, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 49ef7c <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x8c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [X28]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADRP X1, <4baf50>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (50.0%)
ADD X1, X1, #3474	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADRP X2, <4bcf58>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X2, X2, #2780	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 4a6f90 <hypre_fprintf>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <4bdf64>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (50.0%)
ADD X0, X0, #546	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
MOVZ W1, #248	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
MOVZ W2, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X3, XZR, XZR	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
BL 4a9360 <hypre_error_handler>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
TBNZ X20, #63, 49ef8c <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x9c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X20, X8	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 49efc0 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0xd0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [X28]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADRP X1, <4baf90>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (50.0%)
ADD X1, X1, #3474	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADRP X2, <4bdf98>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X2, X2, #2216	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 4a6f90 <hypre_fprintf>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <4bdfa4>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (50.0%)
ADD X0, X0, #546	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
MOVZ W1, #249	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
MOVZ W2, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X3, XZR, XZR	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
BL 4a9360 <hypre_error_handler>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDP X26, X25, [X29, #104]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDR X27, [X29, #96]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
TBNZ X19, #63, 49efd4 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0xe4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X19, X8	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 49f004 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x114>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [X28]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADRP X1, <4bafd8>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (50.0%)
ADD X1, X1, #3474	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADRP X2, <4bdfe0>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X2, X2, #2250	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 4a6f90 <hypre_fprintf>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <4bdfec>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (50.0%)
ADD X0, X0, #546	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
MOVZ W1, #250	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
MOVZ W2, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X3, XZR, XZR	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
BL 4a9360 <hypre_error_handler>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D1, [X22]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMP D1, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.NE 49f17c <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x28c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D0, [X21]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMOV D1, #1.0000000	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
FCMP D0, D1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.NE 49f2fc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x40c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X20, X19	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4a00dc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x11ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X9, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X11, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X13, X9, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR X10, [X27]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X14, [X8, X20,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X15, X11, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X16, X11, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X17, X9, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 49f070 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x180>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
LDR X8, [X29, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
FMOV D0, #-1.0000000	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
FCMP D1, D0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.NE 49f460 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x570>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D0, [X21]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMOV D1, #1.0000000	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
FCMP D0, D1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.NE 49f5dc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x6ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X20, X19	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4a00dc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x11ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X14, X10, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR X8, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X11, [X27]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X13, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X17, [X9, X20,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X15, X12, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X16, X12, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X18, X10, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
B 49f1f0 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x300>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
FMOV D1, #-1.0000000	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
FCMP D0, D1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.NE 49f740 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x850>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X20, X19	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4a00dc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x11ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X9, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X11, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X13, X9, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR X10, [X27]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X14, [X8, X20,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X15, X11, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X16, X11, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X17, X9, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 49f350 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x460>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
LDR D0, [X21]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMOV D2, #1.0000000	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
FCMP D1, D2	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.NE 49f89c <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x9ac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FCMP D0, D2	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.NE 49f9fc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0xb0c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X20, X19	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4a00dc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x11ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X14, X10, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR X8, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X11, [X27]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X13, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X16, [X9, X20,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X15, X12, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X17, X12, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X18, X10, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
B 49f4d0 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x5e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
FMOV D1, #-1.0000000	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
FCMP D0, D1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.NE 49fb60 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0xc70>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X20, X19	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4a00dc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x11ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X14, X10, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR X8, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X11, [X27]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X13, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X16, [X9, X20,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X15, X12, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X17, X12, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X18, X10, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
B 49f630 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x740>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
HINT #0																					N/A
CMP X20, X19	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4a00dc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x11ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X9, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X11, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X13, X9, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR X10, [X27]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X14, [X8, X20,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X15, X11, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X16, X11, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X17, X9, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 49f798 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x8a8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
FCMP D0, D2	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.NE 49fcbc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0xdcc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X20, X19	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4a00dc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x11ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X14, X10, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR X8, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X11, [X27]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X13, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X18, [X9, X20,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X15, X12, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X16, X12, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X17, X10, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 49f8f0 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0xa00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
FMOV D1, #-1.0000000	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
FCMP D0, D1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.NE 49fe20 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0xf30>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X20, X19	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4a00dc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x11ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X14, X10, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR X8, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X11, [X27]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X13, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X17, [X9, X20,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X15, X12, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X16, X12, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X18, X10, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
B 49fa50 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0xb60>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X20, X19	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4a00dc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x11ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X14, X10, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR X8, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X11, [X27]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X13, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X17, [X9, X20,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X15, X12, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X16, X12, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X18, X10, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
B 49fbb8 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0xcc8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
HINT #0																					N/A
FMOV D1, #-1.0000000	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
FCMP D0, D1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.NE 49ff7c <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x108c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X20, X19	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4a00dc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x11ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X14, X10, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR X8, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X11, [X27]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X13, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X18, [X9, X20,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X15, X12, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X16, X12, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X17, X10, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 49fd10 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0xe20>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X20, X19	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4a00dc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x11ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X14, X10, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR X8, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X11, [X27]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X13, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X16, [X9, X20,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X15, X12, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X17, X12, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X18, X10, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
B 49fe70 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0xf80>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X20, X19	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4a00dc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x11ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X14, X10, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR X8, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X11, [X27]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X13, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X18, [X9, X20,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X15, X12, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X16, X12, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X17, X10, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 49ffcc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x10dc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X20, X19, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X22, X21, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X24, X23, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X26, X25, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X28, X27, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X29, X30, [SP], #96	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
HINT #0																					N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run armclang_5

Source file and lines	csr_matvec.c:243-404
Module	exec

The function is defined in /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:243-365,371-404.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 36.00 to 6.33 cycles (5.68x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 36.00 to 4.00 cycles (9.00x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 872 bytes. The binary function is storing 96 bytes.

General properties

nb instructions	304
loop length	1216
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

34.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	24.50	24.50	18.25	18.25	18.17	18.17	18.08	18.08	11.00	2.75	2.75	2.50	36.00	36.00	36.00	3.00	3.00
cycles	24.50	24.50	18.25	18.25	18.17	18.17	18.08	18.08	11.00	2.75	2.75	2.50	36.00	36.00	36.00	3.00	3.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	34.50
Overall L1	36.00

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 36.00 cycles. At this rate:

25% of peak load performance is reached (24.22 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (2.67 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 49eef0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
STP X29, X30, [SP, #928]!	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X28, X27, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X26, X25, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X24, X23, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X22, X21, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X20, X19, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ADD X29, SP, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [X2]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ORR X23, XZR, X7	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X24, XZR, X6	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X21, XZR, X5	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X22, XZR, X4	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X25, XZR, X3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X19, XZR, X2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 49dc80 <hypre_CSRMatrixGetLoadBalancedPartitionBegin>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X20, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [X19]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
BL 49dd00 <hypre_CSRMatrixGetLoadBalancedPartitionEnd>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X28, <4dff38>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X19, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X28, [X28, #3824]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X20, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 49ef7c <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x8c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [X28]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADRP X1, <4baf50>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (50.0%)
ADD X1, X1, #3474	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADRP X2, <4bcf58>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X2, X2, #2780	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 4a6f90 <hypre_fprintf>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <4bdf64>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (50.0%)
ADD X0, X0, #546	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
MOVZ W1, #248	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
MOVZ W2, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X3, XZR, XZR	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
BL 4a9360 <hypre_error_handler>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
TBNZ X20, #63, 49ef8c <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x9c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X20, X8	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 49efc0 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0xd0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [X28]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADRP X1, <4baf90>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (50.0%)
ADD X1, X1, #3474	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADRP X2, <4bdf98>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X2, X2, #2216	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 4a6f90 <hypre_fprintf>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <4bdfa4>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (50.0%)
ADD X0, X0, #546	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
MOVZ W1, #249	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
MOVZ W2, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X3, XZR, XZR	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
BL 4a9360 <hypre_error_handler>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDP X26, X25, [X29, #104]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDR X27, [X29, #96]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
TBNZ X19, #63, 49efd4 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0xe4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X19, X8	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 49f004 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x114>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [X28]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADRP X1, <4bafd8>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (50.0%)
ADD X1, X1, #3474	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADRP X2, <4bdfe0>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X2, X2, #2250	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 4a6f90 <hypre_fprintf>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <4bdfec>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (50.0%)
ADD X0, X0, #546	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
MOVZ W1, #250	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
MOVZ W2, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X3, XZR, XZR	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
BL 4a9360 <hypre_error_handler>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D1, [X22]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMP D1, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.NE 49f17c <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x28c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D0, [X21]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMOV D1, #1.0000000	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
FCMP D0, D1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.NE 49f2fc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x40c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X20, X19	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4a00dc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x11ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X9, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X11, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X13, X9, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR X10, [X27]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X14, [X8, X20,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X15, X11, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X16, X11, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X17, X9, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 49f070 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x180>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
LDR X8, [X29, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
FMOV D0, #-1.0000000	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
FCMP D1, D0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.NE 49f460 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x570>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D0, [X21]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMOV D1, #1.0000000	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
FCMP D0, D1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.NE 49f5dc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x6ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X20, X19	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4a00dc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x11ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X14, X10, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR X8, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X11, [X27]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X13, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X17, [X9, X20,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X15, X12, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X16, X12, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X18, X10, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
B 49f1f0 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x300>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
FMOV D1, #-1.0000000	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
FCMP D0, D1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.NE 49f740 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x850>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X20, X19	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4a00dc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x11ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X9, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X11, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X13, X9, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR X10, [X27]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X14, [X8, X20,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X15, X11, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X16, X11, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X17, X9, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 49f350 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x460>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
LDR D0, [X21]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMOV D2, #1.0000000	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
FCMP D1, D2	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.NE 49f89c <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x9ac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FCMP D0, D2	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.NE 49f9fc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0xb0c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X20, X19	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4a00dc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x11ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X14, X10, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR X8, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X11, [X27]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X13, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X16, [X9, X20,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X15, X12, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X17, X12, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X18, X10, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
B 49f4d0 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x5e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
FMOV D1, #-1.0000000	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
FCMP D0, D1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.NE 49fb60 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0xc70>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X20, X19	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4a00dc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x11ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X14, X10, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR X8, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X11, [X27]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X13, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X16, [X9, X20,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X15, X12, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X17, X12, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X18, X10, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
B 49f630 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x740>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
HINT #0																					N/A
CMP X20, X19	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4a00dc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x11ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X9, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X11, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X13, X9, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR X10, [X27]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X14, [X8, X20,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X15, X11, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X16, X11, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X17, X9, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 49f798 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x8a8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
FCMP D0, D2	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.NE 49fcbc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0xdcc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X20, X19	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4a00dc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x11ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X14, X10, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR X8, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X11, [X27]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X13, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X18, [X9, X20,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X15, X12, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X16, X12, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X17, X10, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 49f8f0 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0xa00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
FMOV D1, #-1.0000000	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
FCMP D0, D1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.NE 49fe20 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0xf30>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X20, X19	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4a00dc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x11ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X14, X10, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR X8, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X11, [X27]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X13, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X17, [X9, X20,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X15, X12, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X16, X12, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X18, X10, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
B 49fa50 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0xb60>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X20, X19	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4a00dc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x11ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X14, X10, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR X8, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X11, [X27]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X13, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X17, [X9, X20,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X15, X12, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X16, X12, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X18, X10, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
B 49fbb8 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0xcc8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
HINT #0																					N/A
FMOV D1, #-1.0000000	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
FCMP D0, D1	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.NE 49ff7c <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x108c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X20, X19	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4a00dc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x11ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X14, X10, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR X8, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X11, [X27]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X13, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X18, [X9, X20,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X15, X12, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X16, X12, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X17, X10, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 49fd10 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0xe20>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X20, X19	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4a00dc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x11ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X14, X10, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR X8, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X11, [X27]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X13, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X16, [X9, X20,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X15, X12, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X17, X12, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X18, X10, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
B 49fe70 <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0xf80>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X20, X19	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 4a00dc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x11ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X14, X10, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR X8, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X11, [X27]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X13, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X18, [X9, X20,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X15, X12, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X16, X12, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X17, X10, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 49ffcc <hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18+0x10dc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X20, X19, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X22, X21, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X24, X23, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X26, X25, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X28, X27, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X29, X30, [SP], #96	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
HINT #0																					N/A

Name	Coverage (%)	Time (s)
▼hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.18–	20.71	4.45
▼Loop 3576 - csr_matvec.c:307-314 - exec–	0.04	0.01
○Loop 3574 - csr_matvec.c:312-312 - exec	9.76	1.52
▼Loop 3575 - csr_matvec.c:307-314 - exec–	0.14	0.02
○Loop 3578 - csr_matvec.c:310-312 - exec	0.44	0.07
○Loop 3577 - csr_matvec.c:310-312 - exec	0.00	0.00
▼Loop 3596 - csr_matvec.c:256-263 - exec–	0.04	0.01
○Loop 3594 - csr_matvec.c:261-261 - exec	8.70	1.36
▼Loop 3595 - csr_matvec.c:256-263 - exec–	0.09	0.01
○Loop 3598 - csr_matvec.c:259-261 - exec	0.39	0.06
○Loop 3597 - csr_matvec.c:259-261 - exec	0.00	0.00
▼Loop 3581 - csr_matvec.c:334-341 - exec–	0.03	0.01
○Loop 3579 - csr_matvec.c:339-339 - exec	0.55	0.09
▼Loop 3580 - csr_matvec.c:334-341 - exec–	0.18	0.03
○Loop 3583 - csr_matvec.c:337-339 - exec	0.35	0.06
○Loop 3582 - csr_matvec.c:337-339 - exec	0.00	0.00
▼Loop 3599 - csr_matvec.c:397-404 - exec–	0.00	0.00
○Loop 3601 - csr_matvec.c:400-402 - exec	0.00	0.00
○Loop 3602 - csr_matvec.c:400-402 - exec	0.00	0.00
○Loop 3600 - csr_matvec.c:402-402 - exec	0.00	0.00
▼Loop 3591 - csr_matvec.c:295-302 - exec–	0.00	0.00
○Loop 3589 - csr_matvec.c:300-300 - exec	0.00	0.00
▼Loop 3590 - csr_matvec.c:295-302 - exec–	0.00	0.00
○Loop 3593 - csr_matvec.c:298-300 - exec	0.00	0.00
○Loop 3592 - csr_matvec.c:298-300 - exec	0.00	0.00
▼Loop 3603 - csr_matvec.c:385-392 - exec–	0.00	0.00
○Loop 3605 - csr_matvec.c:388-390 - exec	0.00	0.00
○Loop 3606 - csr_matvec.c:388-390 - exec	0.00	0.00
○Loop 3604 - csr_matvec.c:390-390 - exec	0.00	0.00
▼Loop 3607 - csr_matvec.c:358-365 - exec–	0.00	0.00
○Loop 3609 - csr_matvec.c:361-363 - exec	0.00	0.00
○Loop 3608 - csr_matvec.c:363-363 - exec	0.00	0.00
○Loop 3610 - csr_matvec.c:361-363 - exec	0.00	0.00
▼Loop 3562 - csr_matvec.c:319-326 - exec–	0.00	0.00
○Loop 3563 - csr_matvec.c:324-324 - exec	0.00	0.00
○Loop 3564 - csr_matvec.c:322-324 - exec	0.00	0.00
○Loop 3565 - csr_matvec.c:322-324 - exec	0.00	0.00
▼Loop 3586 - csr_matvec.c:268-275 - exec–	0.00	0.00
▼Loop 3585 - csr_matvec.c:268-275 - exec–	0.00	0.00
○Loop 3587 - csr_matvec.c:271-273 - exec	0.00	0.00
○Loop 3588 - csr_matvec.c:271-273 - exec	0.00	0.00
○Loop 3584 - csr_matvec.c:273-273 - exec	0.00	0.00
▼Loop 3570 - csr_matvec.c:280-287 - exec–	0.00	0.00
○Loop 3573 - csr_matvec.c:283-285 - exec	0.00	0.00
○Loop 3571 - csr_matvec.c:285-285 - exec	0.00	0.00
○Loop 3572 - csr_matvec.c:283-285 - exec	0.00	0.00
▼Loop 3566 - csr_matvec.c:373-380 - exec–	0.00	0.00
○Loop 3567 - csr_matvec.c:378-378 - exec	0.00	0.00
○Loop 3568 - csr_matvec.c:376-378 - exec	0.00	0.00
○Loop 3569 - csr_matvec.c:376-378 - exec	0.00	0.00
▼Loop 3611 - csr_matvec.c:346-353 - exec–	0.00	0.00
○Loop 3612 - csr_matvec.c:351-351 - exec	0.00	0.00
○Loop 3613 - csr_matvec.c:349-351 - exec	0.00	0.00
○Loop 3614 - csr_matvec.c:349-351 - exec	0.00	0.00

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Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

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Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code