OV - exec - Loop 965

	Loop Id: 965	Module: exec	Source: par_lr_interp.c:1196-1756 [...]	Coverage: 0.01%

  (966) 0x4630bc LDR	X6, [X26, X21,LSL #3]

  (966) 0x4630c0 UBFM	X2, X1, #61, #60

  (966) 0x4630c4 STR	X6, [X30, X2]

  (966) 0x4630c8 STR	D14, [X0, X2]

  (966) 0x4630cc SUB	X18, X18, #1

  (966) 0x4630d0 ADD	X28, X28, #8

  (966) 0x4630d4 ORR	X21, XZR, X13

  (966) 0x4630d8 CMP	X16, X13

  (966) 0x4630dc B.EQ	4637b4

  (966) 0x4630e0 ADD	X13, X13, #1

  (966) 0x4630e4 LDR	X10, [X20, X21,LSL #3]

  (966) 0x4630e8 LDR	X1, [X17, X21,LSL #3]

  (966) 0x4630ec TBZ	X10, #63, 4630bc

  (966) 0x4630f0 CMN	X10, #3

  (966) 0x4630f4 B.EQ	4630cc

  (967) 0x4630f8 LDR	X15, [SP, #272]

  (967) 0x4630fc SUB	X18, X18, #1

  (967) 0x463100 ORR	X4, XZR, X1

  (967) 0x463104 LDR	X27, [X11, X28]

  (967) 0x463108 LDR	X2, [X11, X21,LSL #3]

  (967) 0x46310c LDR	X7, [X15, X21,LSL #3]

  (967) 0x463110 ORR	X5, XZR, X7

  (967) 0x463114 CMP	X2, X27

  (967) 0x463118 B.GE	463220

  (967) 0x46311c ORR	X6, XZR, X17

  (967) 0x463120 ORR	X17, XZR, X16

  (967) 0x463124 STR	X0, [SP, #112]

  (967) 0x463128 ORR	X0, XZR, X12

  (967) 0x46312c LDR	X12, [SP, #160]

  (967) 0x463130 B	46316c

    (974) 0x463134 LDR	X14, [X19, X10]

    (974) 0x463138 CMP	X1, X14

    (974) 0x46313c B.LE	463160

    (974) 0x463140 STR	X4, [X19, X10]

    (974) 0x463144 UBFM	X16, X4, #61, #60

    (974) 0x463148 ADD	X4, X4, #1

    (974) 0x46314c LDR	X10, [X26, X10]

    (974) 0x463150 LDR	X8, [SP, #112]

    (974) 0x463154 STR	X10, [X30, X16]

    (974) 0x463158 LDR	X27, [X11, X28]

    (974) 0x46315c STR	D15, [X8, X16]

    (974) 0x463160 ADD	X2, X2, #1

    (974) 0x463164 CMP	X2, X27

    (974) 0x463168 B.GE	463210

    (974) 0x46316c LDR	X14, [X22, X2,LSL #3]

    (974) 0x463170 UBFM	X10, X14, #61, #60

    (974) 0x463174 LDR	X8, [X20, X10]

    (974) 0x463178 TBZ	X8, #63, 463134

    (974) 0x46317c CMN	X8, #3

    (974) 0x463180 B.EQ	463160

    (974) 0x463184 ADD	X14, X10, #8

    (974) 0x463188 STR	X18, [X19, X10]

    (974) 0x46318c LDR	X8, [X11, X10]

    (974) 0x463190 ADD	X16, X11, X14

    (974) 0x463194 LDR	X9, [X11, X14]

    (974) 0x463198 HINT	#0

    (974) 0x46319c HINT	#0

      (977) 0x4631a0 CMP	X8, X9

      (977) 0x4631a4 B.GE	4631f0

        (978) 0x4631a8 LDR	X15, [X22, X8,LSL #3]

        (978) 0x4631ac ADD	X8, X8, #1

        (978) 0x4631b0 UBFM	X3, X15, #61, #60

        (978) 0x4631b4 LDR	X27, [X20, X3]

        (978) 0x4631b8 TBNZ	X27, #63, 4631a0

        (978) 0x4631bc LDR	X27, [X19, X3]

        (978) 0x4631c0 UBFM	X15, X4, #61, #60

        (978) 0x4631c4 CMP	X1, X27

        (978) 0x4631c8 B.LE	4631a0

        (978) 0x4631cc STR	X4, [X19, X3]

        (978) 0x4631d0 ADD	X4, X4, #1

        (978) 0x4631d4 LDR	X9, [X26, X3]

        (978) 0x4631d8 LDR	X3, [SP, #112]

        (978) 0x4631dc STR	X9, [X30, X15]

        (978) 0x4631e0 LDR	X9, [X16]

        (978) 0x4631e4 STR	D15, [X3, X15]

        (978) 0x4631e8 CMP	X8, X9

        (978) 0x4631ec B.LT	4631a8

    (974) 0x4631f0 LDR	X3, [SP, #136]

    (974) 0x4631f4 LDR	X9, [X3]

    (974) 0x4631f8 CMP	X9, #1

    (974) 0x4631fc B.GT	46371c

    (974) 0x463200 LDR	X27, [X11, X28]

    (974) 0x463204 ADD	X2, X2, #1

    (974) 0x463208 CMP	X2, X27

    (974) 0x46320c B.LT	46316c

  (967) 0x463210 ORR	X12, XZR, X0

  (967) 0x463214 LDR	X0, [SP, #112]

  (967) 0x463218 ORR	X16, XZR, X17

  (967) 0x46321c ORR	X17, XZR, X6

  (967) 0x463220 LDR	X15, [SP, #136]

  (967) 0x463224 LDR	X9, [X15]

  (967) 0x463228 STR	X9, [SP, #112]

  (967) 0x46322c CMP	X9, #1

  (967) 0x463230 B.GT	4640d8

  (967) 0x463234 LDR	X2, [SP, #176]

  (967) 0x463238 LDR	X6, [SP, #144]

  (967) 0x46323c LDR	X8, [X2, X21,LSL #3]

  (967) 0x463240 LDR	X9, [X2, X28]

  (967) 0x463244 ADD	X2, X8, #1

  (967) 0x463248 LDR	D29, [X6, X8,LSL #3]

  (967) 0x46324c CMP	X2, X9

  (967) 0x463250 B.GE	4632f0

  (969) 0x463254 STP	X5, X16, [SP, #200]

  (969) 0x463258 LDR	X5, [SP, #280]

  (969) 0x46325c STP	X26, X17, [SP, #224]

  (969) 0x463260 STP	X22, X4, [SP, #240]

  (969) 0x463264 LDR	X4, [SP, #184]

  (969) 0x463268 B	46328c

  (968) 0x46326c UBFM	X10, X16, #61, #60

  (968) 0x463270 LDR	D28, [X6, X2,LSL #3]

  (968) 0x463274 LDR	D31, [X0, X10]

  (968) 0x463278 FADD	D27, D31, D28

  (968) 0x46327c STR	D27, [X0, X10]

  (968) 0x463280 ADD	X2, X2, #1

  (968) 0x463284 CMP	X2, X9

  (968) 0x463288 B.EQ	4632e4

    (970) 0x46328c LDR	X26, [X5, X2,LSL #3]

    (970) 0x463290 UBFM	X3, X26, #61, #60

    (970) 0x463294 LDR	X16, [X19, X3]

    (970) 0x463298 CMP	X1, X16

    (970) 0x46329c B.LE	46326c

    (970) 0x4632a0 CMP	X16, X18

    (970) 0x4632a4 B.EQ	4637ec

    (970) 0x4632a8 LDR	X22, [X20, X3]

    (970) 0x4632ac CMN	X22, #3

    (970) 0x4632b0 B.EQ	463280

    (970) 0x4632b4 LDR	X14, [SP, #128]

    (970) 0x4632b8 CMP	X14, #1

    (970) 0x4632bc B.EQ	4632d0

    (970) 0x4632c0 LDR	X17, [X4, X3]

    (970) 0x4632c4 LDR	X27, [X4, X21,LSL #3]

    (970) 0x4632c8 CMP	X27, X17

    (970) 0x4632cc B.NE	463280

    (970) 0x4632d0 LDR	D3, [X6, X2,LSL #3]

    (970) 0x4632d4 ADD	X2, X2, #1

    (970) 0x4632d8 FADD	D29, D29, D3

    (970) 0x4632dc CMP	X2, X9

    (970) 0x4632e0 B.NE	46328c

    (971) 0x4632e4 LDP	X5, X16, [SP, #200]

    (971) 0x4632e8 LDP	X26, X17, [SP, #224]

    (971) 0x4632ec LDP	X22, X4, [SP, #240]

  (967) 0x4632f0 LDR	X2, [SP, #112]

  (967) 0x4632f4 CMP	X2, #1

  (967) 0x4632f8 B.GT	463fdc

0x4632fc FCMP	D29, #0

0x463300 B.EQ	4630cc

0x463304 CMP	X4, X1

0x463308 B.LE	463468

0x46330c SUB	X21, X4, X1

0x463310 SUB	X4, X21, #1

0x463314 CMP	X4, #2

0x463318 B.LS	465530

0x46331c UBFM	X9, X21, #2, #63

0x463320 ADD	X2, X0, X1,LSL #3

0x463324 DUP	V4.2D, V29.D[0]

0x463328 UBFM	X10, X1, #61, #60

0x46332c UBFM	X14, X9, #59, #58

0x463330 SUB	X15, X14, #32

0x463334 ADD	X27, X2, X9,LSL #5

0x463338 UBFM	X3, X15, #5, #63

0x46333c ADD	X6, X3, #1

0x463340 ANDS	X4, X6, #4160

0x463344 B.EQ	4633b4

0x463348 CMP	X4, #1

0x46334c B.EQ	463394

0x463350 CMP	X4, #2

0x463354 B.EQ	46337c

0x463358 LDR	Q30, [X0, X10]

0x46335c ADD	X2, X2, #32

0x463360 LDUR	Q7, [X2, #496]

0x463364 FNEG	V5.2D, V30.2D

0x463368 FNEG	V16.2D, V7.2D

0x46336c FDIV	V6.2D, V5.2D, V4.2D

0x463370 FDIV	V17.2D, V16.2D, V4.2D

0x463374 STR	Q6, [X0, X10]

0x463378 STUR	Q17, [X2, #496]

0x46337c LDP	Q18, Q19, [X2]

0x463380 FNEG	V21.2D, V18.2D

0x463384 FNEG	V22.2D, V19.2D

0x463388 FDIV	V23.2D, V21.2D, V4.2D

0x46338c FDIV	V24.2D, V22.2D, V4.2D

0x463390 STP	Q23, Q24, [X2], #32

0x463394 LDP	Q1, Q0, [X2]

0x463398 FNEG	V26.2D, V1.2D

0x46339c FNEG	V28.2D, V0.2D

0x4633a0 FDIV	V31.2D, V26.2D, V4.2D

0x4633a4 FDIV	V20.2D, V28.2D, V4.2D

0x4633a8 STP	Q31, Q20, [X2], #32

0x4633ac CMP	X2, X27

0x4633b0 B.EQ	463428

  (980) 0x4633b4 LDP	Q3, Q27, [X2]

  (980) 0x4633b8 ORR	X8, XZR, X2

  (980) 0x4633bc LDP	Q16, Q17, [X2, #32]

  (980) 0x4633c0 LDP	Q23, Q24, [X2, #64]

  (980) 0x4633c4 LDP	Q31, Q20, [X2, #96]

  (980) 0x4633c8 ADD	X2, X2, #128

  (980) 0x4633cc FNEG	V30.2D, V3.2D

  (980) 0x4633d0 FNEG	V5.2D, V27.2D

  (980) 0x4633d4 FNEG	V18.2D, V16.2D

  (980) 0x4633d8 FNEG	V21.2D, V17.2D

  (980) 0x4633dc FNEG	V1.2D, V23.2D

  (980) 0x4633e0 FNEG	V26.2D, V24.2D

  (980) 0x4633e4 FDIV	V6.2D, V30.2D, V4.2D

  (980) 0x4633e8 FDIV	V7.2D, V5.2D, V4.2D

  (980) 0x4633ec FNEG	V3.2D, V31.2D

  (980) 0x4633f0 FNEG	V27.2D, V20.2D

  (980) 0x4633f4 FDIV	V19.2D, V18.2D, V4.2D

  (980) 0x4633f8 FDIV	V22.2D, V21.2D, V4.2D

  (980) 0x4633fc FDIV	V0.2D, V1.2D, V4.2D

  (980) 0x463400 FDIV	V28.2D, V26.2D, V4.2D

  (980) 0x463404 STP	Q6, Q7, [X2, #1920]

  (980) 0x463408 FDIV	V5.2D, V3.2D, V4.2D

  (980) 0x46340c FDIV	V30.2D, V27.2D, V4.2D

  (980) 0x463410 STP	Q19, Q22, [X2, #1952]

  (980) 0x463414 STP	Q0, Q28, [X2, #1984]

  (980) 0x463418 STUR	Q5, [X2, #480]

  (980) 0x46341c STR	Q30, [X8, #112]

  (980) 0x463420 CMP	X2, X27

  (980) 0x463424 B.NE	4633b4

0x463428 AND	X8, X21, #8062

0x46342c ANDS	XZR, X21, #4160

0x463430 B.EQ	463468

0x463434 ADD	X1, X1, X8

0x463438 SUB	X21, X21, X8

0x46343c PTRUE	P1.B, ALL

0x463440 WHILELO	P2.D, XZR, X21

0x463444 DUP	Z4.D, Z29.D[0]

0x463448 LD1D	{Z6.D}, P2/Z, [X0, X1,LSL #3]

0x46344c ADD	X9, X0, X1,LSL #3

0x463450 FNEG	Z6.D, P1/M, Z6.D

0x463454 FDIV	Z6.D, P2/M, Z6.D, Z4.D

0x463458 ST1D	{Z6.D}, P2, [X9, MUL VL]

0x46345c CNTD	X10, ALL

0x463460 WHILELO	P3.D, X10, X21

0x463464 B.NE	464d34

0x463468 CMP	X5, X7

0x46346c B.LE	4630cc

0x463470 LDR	X14, [SP, #152]

0x463474 SUB	X5, X5, X7

0x463478 SUB	X27, X5, #1

0x46347c LDR	X15, [X14, #200]

0x463480 CMP	X27, #2

0x463484 B.LS	465538

0x463488 UBFM	X6, X5, #2, #63

0x46348c ADD	X1, X15, X7,LSL #3

0x463490 DUP	V16.2D, V29.D[0]

0x463494 UBFM	X2, X7, #61, #60

0x463498 UBFM	X4, X6, #59, #58

0x46349c SUB	X8, X4, #32

0x4634a0 ADD	X21, X1, X6,LSL #5

0x4634a4 UBFM	X9, X8, #5, #63

0x4634a8 ADD	X10, X9, #1

0x4634ac ANDS	X14, X10, #4160

0x4634b0 B.EQ	463520

0x4634b4 CMP	X14, #1

0x4634b8 B.EQ	463500

0x4634bc CMP	X14, #2

0x4634c0 B.EQ	4634e8

0x4634c4 LDR	Q17, [X15, X2]

0x4634c8 ADD	X1, X1, #32

0x4634cc LDUR	Q21, [X1, #496]

0x4634d0 FNEG	V18.2D, V17.2D

0x4634d4 FNEG	V22.2D, V21.2D

0x4634d8 FDIV	V19.2D, V18.2D, V16.2D

0x4634dc FDIV	V23.2D, V22.2D, V16.2D

0x4634e0 STR	Q19, [X15, X2]

0x4634e4 STUR	Q23, [X1, #496]

0x4634e8 LDP	Q24, Q1, [X1]

0x4634ec FNEG	V0.2D, V24.2D

0x4634f0 FNEG	V26.2D, V1.2D

0x4634f4 FDIV	V31.2D, V0.2D, V16.2D

0x4634f8 FDIV	V28.2D, V26.2D, V16.2D

0x4634fc STP	Q31, Q28, [X1], #32

0x463500 LDP	Q20, Q3, [X1]

0x463504 FNEG	V27.2D, V20.2D

0x463508 FNEG	V5.2D, V3.2D

0x46350c FDIV	V30.2D, V27.2D, V16.2D

0x463510 FDIV	V4.2D, V5.2D, V16.2D

0x463514 STP	Q30, Q4, [X1], #32

0x463518 CMP	X21, X1

0x46351c B.EQ	463594

  (979) 0x463520 LDP	Q6, Q7, [X1]

  (979) 0x463524 ORR	X27, XZR, X1

  (979) 0x463528 LDP	Q22, Q23, [X1, #32]

  (979) 0x46352c LDP	Q31, Q20, [X1, #64]

  (979) 0x463530 LDP	Q4, Q30, [X1, #96]

  (979) 0x463534 ADD	X1, X1, #128

  (979) 0x463538 FNEG	V17.2D, V6.2D

  (979) 0x46353c FNEG	V18.2D, V7.2D

  (979) 0x463540 FNEG	V24.2D, V22.2D

  (979) 0x463544 FNEG	V0.2D, V23.2D

  (979) 0x463548 FNEG	V28.2D, V31.2D

  (979) 0x46354c FNEG	V27.2D, V20.2D

  (979) 0x463550 FDIV	V19.2D, V17.2D, V16.2D

  (979) 0x463554 FDIV	V21.2D, V18.2D, V16.2D

  (979) 0x463558 FNEG	V6.2D, V4.2D

  (979) 0x46355c FNEG	V7.2D, V30.2D

  (979) 0x463560 FDIV	V1.2D, V24.2D, V16.2D

  (979) 0x463564 FDIV	V26.2D, V0.2D, V16.2D

  (979) 0x463568 FDIV	V3.2D, V28.2D, V16.2D

  (979) 0x46356c FDIV	V5.2D, V27.2D, V16.2D

  (979) 0x463570 STP	Q19, Q21, [X1, #1920]

  (979) 0x463574 FDIV	V17.2D, V6.2D, V16.2D

  (979) 0x463578 FDIV	V18.2D, V7.2D, V16.2D

  (979) 0x46357c STP	Q1, Q26, [X1, #1952]

  (979) 0x463580 STP	Q3, Q5, [X1, #1984]

  (979) 0x463584 STUR	Q17, [X1, #480]

  (979) 0x463588 STR	Q18, [X27, #112]

  (979) 0x46358c CMP	X21, X1

  (979) 0x463590 B.NE	463520

0x463594 AND	X3, X5, #8062

0x463598 ANDS	XZR, X5, #4160

0x46359c B.EQ	4630cc

0x4635a0 ADD	X7, X7, X3

0x4635a4 SUB	X5, X5, X3

0x4635a8 DUP	Z29.D, Z29.D[0]

0x4635ac WHILELO	P4.D, XZR, X5

0x4635b0 PTRUE	P5.B, ALL

0x4635b4 LD1D	{Z16.D}, P4/Z, [X15, X7,LSL #3]

0x4635b8 ADD	X15, X15, X7,LSL #3

0x4635bc FNEG	Z16.D, P5/M, Z16.D

0x4635c0 FDIV	Z16.D, P4/M, Z16.D, Z29.D

0x4635c4 ST1D	{Z16.D}, P4, [X15, MUL VL]

0x4635c8 CNTD	X3, ALL

0x4635cc WHILELO	P7.D, X3, X5

0x4635d0 B.EQ	4630cc

0x4635d4 LD1D	{Z19.D}, P7/Z, [X15, #1, MUL VL]

0x4635d8 FNEG	Z19.D, P5/M, Z19.D

0x4635dc FDIV	Z19.D, P7/M, Z19.D, Z29.D

0x4635e0 ST1D	{Z19.D}, P7, [X15, #1, MUL VL]

0x4635e4 B	4630cc

    (974) 0x46371c LDR	X27, [SP, #168]

    (974) 0x463720 LDR	X3, [X27, X10]

    (974) 0x463724 ADD	X15, X27, X14

    (974) 0x463728 LDR	X9, [X27, X14]

    (974) 0x46372c CMP	X3, X9

    (974) 0x463730 B.GE	463200

    (974) 0x463734 LDR	X10, [SP, #152]

    (974) 0x463738 LDR	X8, [X10, #240]

    (974) 0x46373c LDR	X14, [X10, #200]

    (974) 0x463740 LDR	X16, [X10, #216]

    (974) 0x463744 LDR	X10, [X8]

    (974) 0x463748 CBZ	X25, 464760

    (974) 0x46374c STP	X19, X0, [SP, #200]

    (974) 0x463750 ORR	X19, XZR, X17

    (974) 0x463754 HINT	#0

    (974) 0x463758 HINT	#0

    (974) 0x46375c HINT	#0

      (976) 0x463760 LDR	X0, [X12, X3,LSL #3]

      (976) 0x463764 ADD	X3, X3, #1

      (976) 0x463768 LDR	X17, [X25, X0,LSL #3]

      (976) 0x46376c UBFM	X8, X17, #61, #60

      (976) 0x463770 LDR	X27, [X10, X8]

      (976) 0x463774 TBNZ	X27, #63, 46379c

      (976) 0x463778 LDR	X0, [X24, X8]

      (976) 0x46377c UBFM	X27, X5, #61, #60

      (976) 0x463780 CMP	X7, X0

      (976) 0x463784 B.LE	46379c

      (976) 0x463788 STR	X5, [X24, X8]

      (976) 0x46378c ADD	X5, X5, #1

      (976) 0x463790 STR	X17, [X16, X27]

      (976) 0x463794 LDR	X9, [X15]

      (976) 0x463798 STR	D15, [X14, X27]

      (976) 0x46379c CMP	X9, X3

      (976) 0x4637a0 B.GT	463760

    (974) 0x4637a4 LDR	X27, [X11, X28]

    (974) 0x4637a8 ORR	X17, XZR, X19

    (974) 0x4637ac LDP	X19, X0, [SP, #200]

    (974) 0x4637b0 B	463204

0x4637b4 LDR	X23, [SP, #152]

0x4637b8 LDR	X20, [SP, #120]

0x4637bc CBNZ	X20, 464380

0x4637c0 LDR	X19, [X23, #304]

0x4637c4 LDR	X18, [X19]

0x4637c8 CBNZ	X18, 464394

0x4637cc LDP	D14, D15, [SP, #96]

0x4637d0 LDP	X19, X20, [SP, #16]

0x4637d4 LDP	X21, X22, [SP, #32]

0x4637d8 LDP	X23, X24, [SP, #48]

0x4637dc LDP	X25, X26, [SP, #64]

0x4637e0 LDP	X27, X28, [SP, #80]

0x4637e4 LDP	X29, X30, [SP], #384

0x4637e8 RET

  (969) 0x4637ec LDR	X10, [SP, #176]

  (969) 0x4637f0 ADD	X26, X3, #8

  (969) 0x4637f4 FMOV	D26, D15

  (969) 0x4637f8 STR	X26, [SP, #288]

  (969) 0x4637fc LDR	X8, [X10, X3]

  (969) 0x463800 LDR	X15, [X10, X26]

  (969) 0x463804 LDR	D4, [X6, X8,LSL #3]

  (969) 0x463808 ADD	X8, X8, #1

  (969) 0x46380c ORR	X10, XZR, X8

  (969) 0x463810 FCMPE	D4, #0

  (969) 0x463814 FCSEL	D28, D25, D2, #4

  (969) 0x463818 CMP	X8, X15

  (969) 0x46381c B.GE	46502c

0x463820 SUB	X22, X15, X8

0x463824 ANDS	X14, X22, #4160

0x463828 B.EQ	4638c0

0x46382c CMP	X14, #1

0x463830 B.EQ	46388c

0x463834 CMP	X14, #2

0x463838 B.EQ	463864

0x46383c LDR	X17, [X5, X8,LSL #3]

0x463840 LDR	X27, [X19, X17,LSL #3]

0x463844 CMP	X1, X27

0x463848 CCMP	X21, X17, #4, #12

0x46384c B.NE	463860

0x463850 LDR	D5, [X6, X8,LSL #3]

0x463854 FMUL	D6, D5, D28

0x463858 FCMPE	D6, #0

0x46385c B.MI	464eb0

0x463860 ADD	X10, X8, #1

0x463864 LDR	X26, [X5, X10,LSL #3]

0x463868 LDR	X16, [X19, X26,LSL #3]

0x46386c CMP	X1, X16

0x463870 CCMP	X21, X26, #4, #12

0x463874 B.NE	463888

0x463878 LDR	D7, [X6, X10,LSL #3]

0x46387c FMUL	D16, D7, D28

0x463880 FCMPE	D16, #0

0x463884 B.MI	464ca8

0x463888 ADD	X10, X10, #1

0x46388c LDR	X22, [X5, X10,LSL #3]

0x463890 LDR	X14, [X19, X22,LSL #3]

0x463894 CMP	X1, X14

0x463898 CCMP	X21, X22, #4, #12

0x46389c B.NE	4638b0

0x4638a0 LDR	D17, [X6, X10,LSL #3]

0x4638a4 FMUL	D18, D17, D28

0x4638a8 FCMPE	D18, #0

0x4638ac B.MI	4647b8

0x4638b0 ADD	X10, X10, #1

0x4638b4 CMP	X15, X10

0x4638b8 B.EQ	463968

0x4638bc HINT	#0

  (987) 0x4638c0 LDR	X17, [X5, X10,LSL #3]

  (987) 0x4638c4 LDR	X27, [X19, X17,LSL #3]

  (987) 0x4638c8 CMP	X1, X27

  (987) 0x4638cc CCMP	X21, X17, #4, #12

  (987) 0x4638d0 B.NE	4638e4

  (987) 0x4638d4 LDR	D19, [X6, X10,LSL #3]

  (987) 0x4638d8 FMUL	D20, D19, D28

  (987) 0x4638dc FCMPE	D20, #0

  (987) 0x4638e0 B.MI	464268

  (987) 0x4638e4 ADD	X10, X10, #1

  (987) 0x4638e8 LDR	X26, [X5, X10,LSL #3]

  (987) 0x4638ec LDR	X16, [X19, X26,LSL #3]

  (987) 0x4638f0 CMP	X1, X16

  (987) 0x4638f4 CCMP	X21, X26, #4, #12

  (987) 0x4638f8 B.NE	46390c

  (987) 0x4638fc LDR	D21, [X6, X10,LSL #3]

  (987) 0x463900 FMUL	D22, D21, D28

  (987) 0x463904 FCMPE	D22, #0

  (987) 0x463908 B.MI	464278

  (987) 0x46390c ADD	X22, X10, #1

  (987) 0x463910 LDR	X14, [X5, X22,LSL #3]

  (987) 0x463914 LDR	X17, [X19, X14,LSL #3]

  (987) 0x463918 CMP	X1, X17

  (987) 0x46391c CCMP	X21, X14, #4, #12

  (987) 0x463920 B.NE	463934

  (987) 0x463924 LDR	D23, [X6, X22,LSL #3]

  (987) 0x463928 FMUL	D24, D23, D28

  (987) 0x46392c FCMPE	D24, #0

  (987) 0x463930 B.MI	464270

  (987) 0x463934 ADD	X27, X10, #2

  (987) 0x463938 LDR	X26, [X5, X27,LSL #3]

  (987) 0x46393c LDR	X16, [X19, X26,LSL #3]

  (987) 0x463940 CMP	X1, X16

  (987) 0x463944 CCMP	X21, X26, #4, #12

  (987) 0x463948 B.NE	46395c

  (987) 0x46394c LDR	D1, [X6, X27,LSL #3]

  (987) 0x463950 FMUL	D0, D1, D28

  (987) 0x463954 FCMPE	D0, #0

  (987) 0x463958 B.MI	464260

  (987) 0x46395c ADD	X10, X10, #3

  (987) 0x463960 CMP	X15, X10

  (987) 0x463964 B.NE	4638c0

0x463968 LDR	X22, [SP, #112]

0x46396c LDR	D27, [X6, X2,LSL #3]

0x463970 CMP	X22, #1

0x463974 B.GT	4643b8

0x463978 FCMP	D26, #0

0x46397c B.NE	46485c

0x463980 FADD	D29, D29, D27

0x463984 B	463280

0x463fdc LDR	X6, [SP, #320]

0x463fe0 LDR	X2, [X6, X21,LSL #3]

0x463fe4 LDR	X9, [X6, X28]

0x463fe8 CMP	X9, X2

0x463fec B.LE	4632fc

0x463ff0 ORR	X27, XZR, X5

0x463ff4 LDR	X5, [SP, #152]

0x463ff8 STR	X2, [SP, #112]

0x463ffc LDR	X14, [X5, #256]

0x464000 LDR	X8, [X5, #240]

0x464004 LDR	X10, [X5, #200]

0x464008 LDR	X3, [X14]

0x46400c LDR	X15, [X8]

0x464010 STP	X16, X26, [SP, #200]

0x464014 ORR	X26, XZR, X22

0x464018 LDR	X14, [SP, #192]

0x46401c STP	X17, X4, [SP, #224]

0x464020 ORR	X4, XZR, X3

0x464024 LDR	X16, [SP, #312]

0x464028 LDP	X8, X17, [SP, #336]

0x46402c B	464058

  (981) 0x464030 UBFM	X2, X2, #61, #60

  (981) 0x464034 LDR	D20, [X16, X22,LSL #3]

  (981) 0x464038 LDR	D27, [X10, X2]

  (981) 0x46403c FADD	D3, D27, D20

  (981) 0x464040 STR	D3, [X10, X2]

  (981) 0x464044 LDR	X22, [SP, #112]

  (981) 0x464048 ADD	X5, X22, #1

  (981) 0x46404c STR	X5, [SP, #112]

  (981) 0x464050 CMP	X9, X5

  (981) 0x464054 B.EQ	4640c4

  (981) 0x464058 LDR	X22, [SP, #112]

  (981) 0x46405c LDR	X6, [X23, X22,LSL #3]

  (981) 0x464060 UBFM	X5, X6, #61, #60

  (981) 0x464064 LDR	X2, [X24, X5]

  (981) 0x464068 CMP	X7, X2

  (981) 0x46406c B.LE	464030

  (981) 0x464070 CMP	X2, X18

  (981) 0x464074 B.EQ	46444c

  (981) 0x464078 LDR	X3, [X15, X5]

  (981) 0x46407c CMN	X3, #3

  (981) 0x464080 B.EQ	464044

  (981) 0x464084 LDR	X22, [SP, #128]

  (981) 0x464088 CMP	X22, #1

  (981) 0x46408c B.EQ	4640a4

  (981) 0x464090 LDR	X6, [X4, X5]

  (981) 0x464094 LDR	X5, [SP, #184]

  (981) 0x464098 LDR	X2, [X5, X21,LSL #3]

  (981) 0x46409c CMP	X2, X6

  (981) 0x4640a0 B.NE	464044

  (981) 0x4640a4 LDR	X6, [SP, #112]

  (981) 0x4640a8 LDR	X22, [SP, #112]

  (981) 0x4640ac LDR	D18, [X16, X6,LSL #3]

  (981) 0x4640b0 ADD	X5, X22, #1

  (981) 0x4640b4 STR	X5, [SP, #112]

  (981) 0x4640b8 FADD	D29, D29, D18

  (981) 0x4640bc CMP	X9, X5

  (981) 0x4640c0 B.NE	464058

0x4640c4 ORR	X22, XZR, X26

0x4640c8 LDP	X17, X4, [SP, #224]

0x4640cc ORR	X5, XZR, X27

0x4640d0 LDP	X16, X26, [SP, #200]

0x4640d4 B	4632fc

  (967) 0x4640d8 LDR	X3, [SP, #168]

  (967) 0x4640dc LDR	X10, [X3, X21,LSL #3]

  (967) 0x4640e0 LDR	X15, [X3, X28]

  (967) 0x4640e4 CMP	X10, X15

  (967) 0x4640e8 B.GE	463234

  (967) 0x4640ec ORR	X9, XZR, X11

  (967) 0x4640f0 LDP	X14, X11, [SP, #152]

  (967) 0x4640f4 STR	X16, [SP, #208]

  (967) 0x4640f8 LDR	X27, [SP, #264]

  (967) 0x4640fc STR	X13, [SP, #240]

  (967) 0x464100 ORR	X13, XZR, X3

  (967) 0x464104 LDR	X2, [X14, #240]

  (967) 0x464108 LDR	X8, [X14, #200]

  (967) 0x46410c LDR	X6, [X14, #216]

  (967) 0x464110 LDR	X14, [X2]

  (967) 0x464114 STP	X17, X22, [SP, #224]

  (967) 0x464118 ORR	X22, XZR, X15

  (967) 0x46411c LDR	X17, [SP, #192]

  (967) 0x464120 B	464158

    (972) 0x464124 LDR	X2, [X24, X3]

    (972) 0x464128 CMP	X7, X2

    (972) 0x46412c B.LE	46414c

    (972) 0x464130 UBFM	X22, X5, #61, #60

    (972) 0x464134 STR	X5, [X24, X3]

    (972) 0x464138 ADD	X5, X5, #1

    (972) 0x46413c ORR	X16, XZR, X22

    (972) 0x464140 STR	X15, [X6, X22]

    (972) 0x464144 LDR	X22, [X13, X28]

    (972) 0x464148 STR	D15, [X8, X16]

    (972) 0x46414c ADD	X10, X10, #1

    (972) 0x464150 CMP	X22, X10

    (972) 0x464154 B.LE	464240

    (972) 0x464158 LDR	X15, [X11, X10,LSL #3]

    (972) 0x46415c CBZ	X25, 464164

    (972) 0x464160 LDR	X15, [X25, X15,LSL #3]

    (972) 0x464164 UBFM	X3, X15, #61, #60

    (972) 0x464168 LDR	X16, [X14, X3]

    (972) 0x46416c TBZ	X16, #63, 464124

    (972) 0x464170 CMN	X16, #3

    (972) 0x464174 B.EQ	46414c

    (972) 0x464178 LDR	X15, [SP, #256]

    (972) 0x46417c ADD	X2, X3, #8

    (972) 0x464180 STR	X18, [X24, X3]

    (972) 0x464184 LDR	X3, [X15, X3]

    (972) 0x464188 ADD	X22, X15, X2

    (972) 0x46418c LDR	X16, [X15, X2]

    (972) 0x464190 CMP	X3, X16

    (972) 0x464194 B.GE	464230

    (972) 0x464198 STR	X11, [SP, #112]

    (972) 0x46419c STR	X13, [SP, #200]

    (972) 0x4641a0 B	4641d4

      (973) 0x4641a4 LDR	X11, [X24, X15]

      (973) 0x4641a8 UBFM	X2, X5, #61, #60

      (973) 0x4641ac CMP	X7, X11

      (973) 0x4641b0 B.LE	4641c8

      (973) 0x4641b4 STR	X5, [X24, X15]

      (973) 0x4641b8 ADD	X5, X5, #1

      (973) 0x4641bc STR	X13, [X6, X2]

      (973) 0x4641c0 LDR	X16, [X22]

      (973) 0x4641c4 STR	D15, [X8, X2]

      (973) 0x4641c8 ADD	X3, X3, #1

      (973) 0x4641cc CMP	X3, X16

      (973) 0x4641d0 B.GE	464228

      (973) 0x4641d4 LDR	X2, [X27, X3,LSL #3]

      (973) 0x4641d8 CMP	X17, X2

      (973) 0x4641dc ORN	X13, XZR, X2

      (973) 0x4641e0 SUB	X11, X2, X12

      (973) 0x4641e4 CCMP	X12, X2, #0, #12

      (973) 0x4641e8 UBFM	X15, X13, #61, #60

      (973) 0x4641ec UBFM	X11, X11, #61, #60

      (973) 0x4641f0 B.GT	4641a4

      (973) 0x4641f4 LDR	X13, [X19, X11]

      (973) 0x4641f8 UBFM	X15, X4, #61, #60

      (973) 0x4641fc CMP	X1, X13

      (973) 0x464200 B.LE	4641c8

      (973) 0x464204 STR	X4, [X19, X11]

      (973) 0x464208 ADD	X3, X3, #1

      (973) 0x46420c ADD	X4, X4, #1

      (973) 0x464210 LDR	X16, [X26, X11]

      (973) 0x464214 STR	X16, [X30, X15]

      (973) 0x464218 LDR	X16, [X22]

      (973) 0x46421c STR	D15, [X0, X15]

      (973) 0x464220 CMP	X3, X16

      (973) 0x464224 B.LT	4641d4

    (972) 0x464228 LDR	X11, [SP, #112]

    (972) 0x46422c LDR	X13, [SP, #200]

    (972) 0x464230 ADD	X10, X10, #1

    (972) 0x464234 LDR	X22, [X13, X28]

    (972) 0x464238 CMP	X22, X10

    (972) 0x46423c B.GT	464158

  (967) 0x464240 LDR	X15, [SP, #136]

  (967) 0x464244 ORR	X11, XZR, X9

  (967) 0x464248 LDP	X17, X22, [SP, #224]

  (967) 0x46424c LDR	X3, [X15]

  (967) 0x464250 LDR	X16, [SP, #208]

  (967) 0x464254 LDR	X13, [SP, #240]

  (967) 0x464258 STR	X3, [SP, #112]

  (967) 0x46425c B	463234

  (987) 0x464260 FADD	D26, D26, D1

  (987) 0x464264 B	46395c

  (987) 0x464268 FADD	D26, D26, D19

  (987) 0x46426c B	4638e4

  (987) 0x464270 FADD	D26, D26, D23

  (987) 0x464274 B	463934

  (987) 0x464278 FADD	D26, D26, D21

  (987) 0x46427c B	46390c

0x464380 ORR	X0, XZR, X19

0x464384 BL	52b3a0

0x464388 LDR	X19, [X23, #304]

0x46438c LDR	X18, [X19]

0x464390 CBZ	X18, 4637cc

0x4643b8 LDR	X14, [SP, #288]

0x4643bc LDR	X27, [SP, #320]

0x4643c0 LDR	X16, [X27, X14]

0x4643c4 LDR	X17, [X27, X3]

0x4643c8 STR	X16, [SP, #296]

0x4643cc CMP	X17, X16

0x4643d0 B.GE	46550c

0x4643d4 LDR	X14, [SP, #312]

0x4643d8 ADD	X27, X23, X17,LSL #3

0x4643dc MOVZ	X10, #0

0x4643e0 CNTD	X26, ALL

0x4643e4 DUP	Z31.D, X7

0x4643e8 CNTB	X22, ALL

0x4643ec SUB	X16, X16, X17

0x4643f0 DUP	Z3.D, Z28.D[0]

0x4643f4 WHILELO	P6.D, XZR, X16

0x4643f8 ADD	X14, X14, X17,LSL #3

0x4643fc HINT	#0

  (986) 0x464400 LD1D	{Z4.D}, P6/Z, [X27, X10,LSL #3]

  (986) 0x464404 LD1D	{Z30.D}, P6/Z, [X24, Z4.D,LSL #3]

  (986) 0x464408 CMPGE	P7.D, P6/Z, Z30.D, Z31.D

  (986) 0x46440c ADD	X10, X10, X26

  (986) 0x464410 LD1D	{Z5.D}, P7/Z, [X14, MUL VL]

  (986) 0x464414 WHILELO	P6.D, X10, X16

  (986) 0x464418 MOVPRFX	Z6, Z5

  (986) 0x46441c FMUL	Z6.D, P7/M, Z6.D, Z3.D

  (986) 0x464420 ADD	X14, X14, X22

  (986) 0x464424 FCMLT	P0.D, P7/Z, Z6.D, #0

  (986) 0x464428 FADDA	D26, P0, D26, Z5.D

  (986) 0x46442c B.NE	464400

0x464430 FCMP	D26, #0

0x464434 B.EQ	463980

0x464438 FDIV	D31, D27, D26

0x46443c CMP	X8, X15

0x464440 B.LT	464860

0x464444 LDR	X22, [SP, #296]

0x464448 B	464940

  (981) 0x46444c LDR	X22, [SP, #352]

  (981) 0x464450 FMOV	D17, D15

  (981) 0x464454 ADD	X3, X22, X5

  (981) 0x464458 LDR	X6, [X22, X5]

  (981) 0x46445c LDR	X22, [X3, #8]

  (981) 0x464460 ORR	X3, XZR, X6

  (981) 0x464464 CMP	X6, X22

  (981) 0x464468 B.GE	465524

  (981) 0x46446c SUB	X5, X22, X6

  (981) 0x464470 ANDS	X2, X5, #4160

  (981) 0x464474 B.EQ	464518

  (981) 0x464478 CMP	X2, #1

  (981) 0x46447c B.EQ	4644e4

  (981) 0x464480 CMP	X2, #2

  (981) 0x464484 B.EQ	4644b4

  (981) 0x464488 LDR	X3, [X8, X6,LSL #3]

  (981) 0x46448c CMP	X14, X3

  (981) 0x464490 CCMP	X12, X3, #0, #12

  (981) 0x464494 B.LE	46529c

  (981) 0x464498 ORN	X5, XZR, X3

  (981) 0x46449c LDR	X2, [X24, X5,LSL #3]

  (981) 0x4644a0 CMP	X7, X2

  (981) 0x4644a4 B.GT	4644b0

  (981) 0x4644a8 LDR	D3, [X17, X6,LSL #3]

  (981) 0x4644ac FADD	D17, D15, D3

  (981) 0x4644b0 ADD	X3, X6, #1

  (981) 0x4644b4 LDR	X2, [X8, X3,LSL #3]

  (981) 0x4644b8 CMP	X14, X2

  (981) 0x4644bc CCMP	X12, X2, #0, #12

  (981) 0x4644c0 B.GT	4650e8

  (981) 0x4644c4 SUB	X5, X2, X12

  (981) 0x4644c8 LDR	X2, [X19, X5,LSL #3]

  (981) 0x4644cc CMP	X1, X2

  (981) 0x4644d0 CCMP	X21, X5, #4, #12

  (981) 0x4644d4 B.NE	4644e0

  (981) 0x4644d8 LDR	D4, [X17, X3,LSL #3]

  (981) 0x4644dc FADD	D17, D17, D4

  (981) 0x4644e0 ADD	X3, X3, #1

  (981) 0x4644e4 LDR	X5, [X8, X3,LSL #3]

  (981) 0x4644e8 CMP	X14, X5

  (981) 0x4644ec CCMP	X12, X5, #0, #12

  (981) 0x4644f0 B.LE	464cb4

  (981) 0x4644f4 ORN	X2, XZR, X5

  (981) 0x4644f8 LDR	X5, [X24, X2,LSL #3]

  (981) 0x4644fc CMP	X7, X5

  (981) 0x464500 B.GT	46450c

  (981) 0x464504 LDR	D30, [X17, X3,LSL #3]

  (981) 0x464508 FADD	D17, D17, D30

  (981) 0x46450c ADD	X3, X3, #1

  (981) 0x464510 CMP	X22, X3

  (981) 0x464514 B.EQ	4645dc

  (981) 0x464518 STR	X0, [SP, #240]

    (982) 0x46451c LDR	X0, [X8, X3,LSL #3]

    (982) 0x464520 CMP	X14, X0

    (982) 0x464524 CCMP	X12, X0, #0, #12

    (982) 0x464528 B.LE	4646d4

    (982) 0x46452c ORN	X5, XZR, X0

    (982) 0x464530 LDR	X2, [X24, X5,LSL #3]

    (982) 0x464534 CMP	X7, X2

    (982) 0x464538 B.LE	4646e8

    (982) 0x46453c ADD	X2, X3, #1

    (982) 0x464540 LDR	X3, [X8, X2,LSL #3]

    (982) 0x464544 CMP	X14, X3

    (982) 0x464548 CCMP	X12, X3, #0, #12

    (982) 0x46454c B.GT	464704

    (982) 0x464550 SUB	X3, X3, X12

    (982) 0x464554 LDR	X0, [X19, X3,LSL #3]

    (982) 0x464558 CMP	X1, X0

    (982) 0x46455c CCMP	X21, X3, #4, #12

    (982) 0x464560 B.NE	46456c

    (982) 0x464564 LDR	D6, [X17, X2,LSL #3]

    (982) 0x464568 FADD	D17, D17, D6

    (982) 0x46456c ADD	X5, X2, #1

    (982) 0x464570 LDR	X3, [X8, X5,LSL #3]

    (982) 0x464574 CMP	X14, X3

    (982) 0x464578 CCMP	X12, X3, #0, #12

    (982) 0x46457c B.GT	464728

    (982) 0x464580 SUB	X3, X3, X12

    (982) 0x464584 LDR	X0, [X19, X3,LSL #3]

    (982) 0x464588 CMP	X1, X0

    (982) 0x46458c CCMP	X21, X3, #4, #12

    (982) 0x464590 B.NE	46459c

    (982) 0x464594 LDR	D7, [X17, X5,LSL #3]

    (982) 0x464598 FADD	D17, D17, D7

    (982) 0x46459c ADD	X5, X2, #2

    (982) 0x4645a0 LDR	X3, [X8, X5,LSL #3]

    (982) 0x4645a4 CMP	X14, X3

    (982) 0x4645a8 CCMP	X12, X3, #0, #12

    (982) 0x4645ac B.GT	46474c

    (982) 0x4645b0 SUB	X3, X3, X12

    (982) 0x4645b4 LDR	X0, [X19, X3,LSL #3]

    (982) 0x4645b8 CMP	X1, X0

    (982) 0x4645bc CCMP	X21, X3, #4, #12

    (982) 0x4645c0 B.NE	4645cc

    (982) 0x4645c4 LDR	D16, [X17, X5,LSL #3]

    (982) 0x4645c8 FADD	D17, D17, D16

    (982) 0x4645cc ADD	X3, X2, #3

    (982) 0x4645d0 CMP	X22, X3

    (982) 0x4645d4 B.NE	46451c

  (981) 0x4645d8 LDR	X0, [SP, #240]

  (981) 0x4645dc FCMP	D17, #0

  (981) 0x4645e0 B.EQ	4640a4

  (981) 0x4645e4 LDR	X3, [SP, #112]

  (981) 0x4645e8 SUB	X2, X22, X6

  (981) 0x4645ec ANDS	X5, X2, #4160

  (981) 0x4645f0 LDR	D19, [X16, X3,LSL #3]

  (981) 0x4645f4 FDIV	D20, D19, D17

  (981) 0x4645f8 B.EQ	464db4

  (981) 0x4645fc CMP	X5, #1

  (981) 0x464600 B.EQ	46468c

  (981) 0x464604 CMP	X5, #2

  (981) 0x464608 B.EQ	46464c

  (981) 0x46460c LDR	X2, [X8, X6,LSL #3]

  (981) 0x464610 CMP	X14, X2

  (981) 0x464614 CCMP	X12, X2, #0, #12

  (981) 0x464618 B.GT	465598

  (981) 0x46461c SUB	X5, X2, X12

  (981) 0x464620 LDR	X3, [X19, X5,LSL #3]

  (981) 0x464624 CMP	X1, X3

  (981) 0x464628 B.GT	464640

  (981) 0x46462c UBFM	X2, X3, #61, #60

  (981) 0x464630 LDR	D24, [X17, X6,LSL #3]

  (981) 0x464634 LDR	D1, [X0, X2]

  (981) 0x464638 FMADD	D0, D20, D24, D1

  (981) 0x46463c STR	D0, [X0, X2]

  (981) 0x464640 CMP	X21, X5

  (981) 0x464644 B.EQ	4654ec

  (981) 0x464648 ADD	X6, X6, #1

  (981) 0x46464c LDR	X5, [X8, X6,LSL #3]

  (981) 0x464650 CMP	X14, X5

  (981) 0x464654 CCMP	X12, X5, #0, #12

  (981) 0x464658 B.GT	465554

  (981) 0x46465c SUB	X2, X5, X12

  (981) 0x464660 LDR	X3, [X19, X2,LSL #3]

  (981) 0x464664 CMP	X1, X3

  (981) 0x464668 B.GT	464680

  (981) 0x46466c UBFM	X5, X3, #61, #60

  (981) 0x464670 LDR	D3, [X17, X6,LSL #3]

  (981) 0x464674 LDR	D4, [X0, X5]

  (981) 0x464678 FMADD	D30, D20, D3, D4

  (981) 0x46467c STR	D30, [X0, X5]

  (981) 0x464680 CMP	X21, X2

  (981) 0x464684 B.EQ	46547c

  (981) 0x464688 ADD	X6, X6, #1

  (981) 0x46468c LDR	X2, [X8, X6,LSL #3]

  (981) 0x464690 CMP	X14, X2

  (981) 0x464694 CCMP	X12, X2, #0, #12

  (981) 0x464698 B.GT	465320

  (981) 0x46469c SUB	X5, X2, X12

  (981) 0x4646a0 LDR	X3, [X19, X5,LSL #3]

  (981) 0x4646a4 CMP	X1, X3

  (981) 0x4646a8 B.GT	4646c0

  (981) 0x4646ac UBFM	X2, X3, #61, #60

  (981) 0x4646b0 LDR	D17, [X17, X6,LSL #3]

  (981) 0x4646b4 LDR	D18, [X0, X2]

  (981) 0x4646b8 FMADD	D19, D20, D17, D18

  (981) 0x4646bc STR	D19, [X0, X2]

  (981) 0x4646c0 CMP	X21, X5

  (981) 0x4646c4 B.NE	465344

  (981) 0x4646c8 LDR	D21, [X17, X6,LSL #3]

  (981) 0x4646cc FMADD	D29, D20, D21, D29

  (981) 0x4646d0 B	465344

    (982) 0x4646d4 SUB	X0, X0, X12

    (982) 0x4646d8 LDR	X5, [X19, X0,LSL #3]

    (982) 0x4646dc CMP	X1, X5

    (982) 0x4646e0 CCMP	X21, X0, #4, #12

    (982) 0x4646e4 B.NE	46453c

    (982) 0x4646e8 ADD	X2, X3, #1

    (982) 0x4646ec LDR	D5, [X17, X3,LSL #3]

    (982) 0x4646f0 LDR	X3, [X8, X2,LSL #3]

    (982) 0x4646f4 FADD	D17, D17, D5

    (982) 0x4646f8 CMP	X14, X3

    (982) 0x4646fc CCMP	X12, X3, #0, #12

    (982) 0x464700 B.LE	464550

    (982) 0x464704 ORN	X0, XZR, X3

    (982) 0x464708 LDR	X5, [X24, X0,LSL #3]

    (982) 0x46470c CMP	X7, X5

    (982) 0x464710 B.LE	464564

    (982) 0x464714 ADD	X5, X2, #1

    (982) 0x464718 LDR	X3, [X8, X5,LSL #3]

    (982) 0x46471c CMP	X14, X3

    (982) 0x464720 CCMP	X12, X3, #0, #12

    (982) 0x464724 B.LE	464580

    (982) 0x464728 ORN	X0, XZR, X3

    (982) 0x46472c LDR	X3, [X24, X0,LSL #3]

    (982) 0x464730 CMP	X7, X3

    (982) 0x464734 B.LE	464594

    (982) 0x464738 ADD	X5, X2, #2

    (982) 0x46473c LDR	X3, [X8, X5,LSL #3]

    (982) 0x464740 CMP	X14, X3

    (982) 0x464744 CCMP	X12, X3, #0, #12

    (982) 0x464748 B.LE	4645b0

    (982) 0x46474c ORN	X0, XZR, X3

    (982) 0x464750 LDR	X3, [X24, X0,LSL #3]

    (982) 0x464754 CMP	X7, X3

    (982) 0x464758 B.GT	4645cc

    (982) 0x46475c B	4645c4

    (974) 0x464760 ORR	X27, XZR, X17

    (974) 0x464764 STP	X19, X0, [SP, #200]

      (975) 0x464768 LDR	X17, [X12, X3,LSL #3]

      (975) 0x46476c ADD	X3, X3, #1

      (975) 0x464770 UBFM	X8, X17, #61, #60

      (975) 0x464774 LDR	X19, [X10, X8]

      (975) 0x464778 TBNZ	X19, #63, 4647a0

      (975) 0x46477c LDR	X0, [X24, X8]

      (975) 0x464780 UBFM	X19, X5, #61, #60

      (975) 0x464784 CMP	X7, X0

      (975) 0x464788 B.LE	4647a0

      (975) 0x46478c STR	X5, [X24, X8]

      (975) 0x464790 ADD	X5, X5, #1

      (975) 0x464794 STR	X17, [X16, X19]

      (975) 0x464798 LDR	X9, [X15]

      (975) 0x46479c STR	D15, [X14, X19]

      (975) 0x4647a0 CMP	X9, X3

      (975) 0x4647a4 B.GT	464768

    (974) 0x4647a8 ORR	X17, XZR, X27

    (974) 0x4647ac LDR	X27, [X11, X28]

    (974) 0x4647b0 LDP	X19, X0, [SP, #200]

    (974) 0x4647b4 B	463204

0x4647b8 ADD	X10, X10, #1

0x4647bc FADD	D26, D26, D17

0x4647c0 CMP	X15, X10

0x4647c4 B.NE	4638c0

0x4647c8 B	463968

0x46485c FDIV	D31, D27, D26

0x464860 LDR	X17, [X5, X8,LSL #3]

0x464864 ORN	X27, XZR, X8

0x464868 ADD	X26, X27, X15

0x46486c AND	X22, X26, #4160

0x464870 LDR	X16, [X19, X17,LSL #3]

0x464874 CMP	X1, X16

0x464878 B.GT	464f9c

0x46487c LDR	D7, [X6, X8,LSL #3]

0x464880 FMUL	D16, D7, D28

0x464884 FCMPE	D16, #0

0x464888 B.MI	464f8c

0x46488c ADD	X8, X8, #1

0x464890 CMP	X15, X8

0x464894 B.LE	464920

0x464898 CBZ	X22, 464c44

0x46489c CMP	X22, #1

0x4648a0 B.EQ	4648f4

0x4648a4 CMP	X22, #2

0x4648a8 B.EQ	4648d0

0x4648ac LDR	X14, [X5, X8,LSL #3]

0x4648b0 LDR	X17, [X19, X14,LSL #3]

0x4648b4 CMP	X1, X17

0x4648b8 B.GT	46545c

0x4648bc LDR	D21, [X6, X8,LSL #3]

0x4648c0 FMUL	D22, D21, D28

0x4648c4 FCMPE	D22, #0

0x4648c8 B.MI	46544c

0x4648cc ADD	X8, X8, #1

0x4648d0 LDR	X26, [X5, X8,LSL #3]

0x4648d4 LDR	X22, [X19, X26,LSL #3]

0x4648d8 CMP	X1, X22

0x4648dc B.GT	464ed4

0x4648e0 LDR	D26, [X6, X8,LSL #3]

0x4648e4 FMUL	D27, D26, D28

0x4648e8 FCMPE	D27, #0

0x4648ec B.MI	464ec4

0x4648f0 ADD	X8, X8, #1

0x4648f4 LDR	X10, [X5, X8,LSL #3]

0x4648f8 LDR	X14, [X19, X10,LSL #3]

0x4648fc CMP	X1, X14

0x464900 B.GT	465010

0x464904 LDR	D6, [X6, X8,LSL #3]

0x464908 FMUL	D7, D6, D28

0x46490c FCMPE	D7, #0

0x464910 B.MI	465000

0x464914 ADD	X8, X8, #1

0x464918 CMP	X15, X8

0x46491c B.GT	464c44

0x464920 LDR	X15, [SP, #112]

0x464924 CMP	X15, #1

0x464928 B.LE	463280

0x46492c LDR	X26, [SP, #288]

0x464930 LDR	X27, [SP, #320]

0x464934 LDR	X22, [X27, X26]

0x464938 LDR	X17, [X27, X3]

0x46493c STR	X22, [SP, #296]

0x464940 CMP	X17, X22

0x464944 B.GE	463280

0x464948 LDR	X14, [SP, #152]

0x46494c SUB	X10, X22, X17

0x464950 ANDS	X16, X10, #4224

0x464954 LDR	X10, [X14, #200]

0x464958 B.EQ	4655c0

0x46495c CMP	X16, #1

0x464960 B.EQ	464a68

0x464964 CMP	X16, #2

0x464968 B.EQ	464a54

0x46496c CMP	X16, #3

0x464970 B.EQ	464a2c

0x464974 CMP	X16, #4

0x464978 B.EQ	464a04

0x46497c CMP	X16, #5

0x464980 B.EQ	4649dc

0x464984 CMP	X16, #6

0x464988 B.EQ	4649b4

0x46498c LDR	X8, [X23, X17,LSL #3]

0x464990 LDR	X15, [X24, X8,LSL #3]

0x464994 CMP	X7, X15

0x464998 B.GT	4649b0

0x46499c LDR	X27, [SP, #312]

0x4649a0 LDR	D1, [X27, X17,LSL #3]

0x4649a4 FMUL	D0, D1, D28

0x4649a8 FCMPE	D0, #0

0x4649ac B.MI	4654f8

0x4649b0 ADD	X17, X17, #1

0x4649b4 LDR	X26, [X23, X17,LSL #3]

0x4649b8 LDR	X22, [X24, X26,LSL #3]

0x4649bc CMP	X7, X22

0x4649c0 B.GT	4649d8

0x4649c4 LDR	X16, [SP, #312]

0x4649c8 LDR	D3, [X16, X17,LSL #3]

0x4649cc FMUL	D4, D3, D28

0x4649d0 FCMPE	D4, #0

0x4649d4 B.MI	4654d8

0x4649d8 ADD	X17, X17, #1

0x4649dc LDR	X8, [X23, X17,LSL #3]

0x4649e0 LDR	X15, [X24, X8,LSL #3]

0x4649e4 CMP	X7, X15

0x4649e8 B.GT	464a00

0x4649ec LDR	X27, [SP, #312]

0x4649f0 LDR	D6, [X27, X17,LSL #3]

0x4649f4 FMUL	D7, D6, D28

0x4649f8 FCMPE	D7, #0

0x4649fc B.MI	4654c4

0x464a00 ADD	X17, X17, #1

0x464a04 LDR	X26, [X23, X17,LSL #3]

0x464a08 LDR	X22, [X24, X26,LSL #3]

0x464a0c CMP	X7, X22

0x464a10 B.GT	464a28

0x464a14 LDR	X16, [SP, #312]

0x464a18 LDR	D18, [X16, X17,LSL #3]

0x464a1c FMUL	D19, D18, D28

0x464a20 FCMPE	D19, #0

0x464a24 B.MI	4654b0

0x464a28 ADD	X17, X17, #1

0x464a2c LDR	X8, [X23, X17,LSL #3]

0x464a30 LDR	X15, [X24, X8,LSL #3]

0x464a34 CMP	X7, X15

0x464a38 B.GT	464a50

0x464a3c LDR	X27, [SP, #312]

0x464a40 LDR	D22, [X27, X17,LSL #3]

0x464a44 FMUL	D23, D22, D28

0x464a48 FCMPE	D23, #0

0x464a4c B.MI	465498

0x464a50 ADD	X17, X17, #1

0x464a54 LDR	X26, [X23, X17,LSL #3]

0x464a58 LDR	X22, [X24, X26,LSL #3]

0x464a5c CMP	X7, X22

0x464a60 B.LE	465308

0x464a64 ADD	X17, X17, #1

0x464a68 LDR	X8, [X23, X17,LSL #3]

0x464a6c LDR	X15, [X24, X8,LSL #3]

0x464a70 CMP	X7, X15

0x464a74 B.LE	4652b8

0x464a78 LDR	X26, [SP, #296]

0x464a7c ADD	X17, X17, #1

0x464a80 CMP	X17, X26

0x464a84 B.EQ	463280

0x464a88 LDR	X8, [SP, #312]

0x464a8c ORR	X22, XZR, X26

  (984) 0x464a90 LDR	X16, [X23, X17,LSL #3]

  (984) 0x464a94 LDR	X14, [X24, X16,LSL #3]

  (984) 0x464a98 CMP	X7, X14

  (984) 0x464a9c B.GT	464ab0

  (984) 0x464aa0 LDR	D7, [X8, X17,LSL #3]

  (984) 0x464aa4 FMUL	D16, D7, D28

  (984) 0x464aa8 FCMPE	D16, #0

  (984) 0x464aac B.MI	4653b8

  (984) 0x464ab0 ADD	X17, X17, #1

  (984) 0x464ab4 LDR	X27, [X23, X17,LSL #3]

  (984) 0x464ab8 LDR	X3, [X24, X27,LSL #3]

  (984) 0x464abc CMP	X7, X3

  (984) 0x464ac0 B.GT	464ad4

  (984) 0x464ac4 LDR	D19, [X8, X17,LSL #3]

  (984) 0x464ac8 FMUL	D20, D19, D28

  (984) 0x464acc FCMPE	D20, #0

  (984) 0x464ad0 B.MI	4653cc

  (984) 0x464ad4 ADD	X16, X17, #1

  (984) 0x464ad8 LDR	X14, [X23, X16,LSL #3]

  (984) 0x464adc LDR	X15, [X24, X14,LSL #3]

  (984) 0x464ae0 CMP	X7, X15

  (984) 0x464ae4 B.GT	464af8

  (984) 0x464ae8 LDR	D23, [X8, X16,LSL #3]

  (984) 0x464aec FMUL	D24, D23, D28

  (984) 0x464af0 FCMPE	D24, #0

  (984) 0x464af4 B.MI	46537c

  (984) 0x464af8 ADD	X3, X17, #2

  (984) 0x464afc LDR	X26, [X23, X3,LSL #3]

  (984) 0x464b00 LDR	X16, [X24, X26,LSL #3]

  (984) 0x464b04 CMP	X7, X16

  (984) 0x464b08 B.GT	464b1c

  (984) 0x464b0c LDR	D26, [X8, X3,LSL #3]

  (984) 0x464b10 FMUL	D27, D26, D28

  (984) 0x464b14 FCMPE	D27, #0

  (984) 0x464b18 B.MI	465408

  (984) 0x464b1c ADD	X15, X17, #3

  (984) 0x464b20 LDR	X27, [X23, X15,LSL #3]

  (984) 0x464b24 LDR	X3, [X24, X27,LSL #3]

  (984) 0x464b28 CMP	X7, X3

  (984) 0x464b2c B.GT	464b40

  (984) 0x464b30 LDR	D30, [X8, X15,LSL #3]

  (984) 0x464b34 FMUL	D5, D30, D28

  (984) 0x464b38 FCMPE	D5, #0

  (984) 0x464b3c B.MI	4653e0

  (984) 0x464b40 ADD	X16, X17, #4

  (984) 0x464b44 LDR	X14, [X23, X16,LSL #3]

  (984) 0x464b48 LDR	X15, [X24, X14,LSL #3]

  (984) 0x464b4c CMP	X7, X15

  (984) 0x464b50 B.GT	464b64

  (984) 0x464b54 LDR	D16, [X8, X16,LSL #3]

  (984) 0x464b58 FMUL	D17, D16, D28

  (984) 0x464b5c FCMPE	D17, #0

  (984) 0x464b60 B.MI	4653f4

  (984) 0x464b64 ADD	X3, X17, #5

  (984) 0x464b68 LDR	X26, [X23, X3,LSL #3]

  (984) 0x464b6c LDR	X16, [X24, X26,LSL #3]

  (984) 0x464b70 CMP	X7, X16

  (984) 0x464b74 B.GT	464b88

  (984) 0x464b78 LDR	D20, [X8, X3,LSL #3]

  (984) 0x464b7c FMUL	D21, D20, D28

  (984) 0x464b80 FCMPE	D21, #0

  (984) 0x464b84 B.MI	4653a4

  (984) 0x464b88 ADD	X15, X17, #6

  (984) 0x464b8c LDR	X27, [X23, X15,LSL #3]

  (984) 0x464b90 LDR	X3, [X24, X27,LSL #3]

  (984) 0x464b94 CMP	X7, X3

  (984) 0x464b98 B.GT	464bac

  (984) 0x464b9c LDR	D24, [X8, X15,LSL #3]

  (984) 0x464ba0 FMUL	D1, D24, D28

  (984) 0x464ba4 FCMPE	D1, #0

  (984) 0x464ba8 B.MI	465390

  (984) 0x464bac ADD	X17, X17, #7

  (984) 0x464bb0 CMP	X17, X22

  (984) 0x464bb4 B.NE	464a90

0x464bb8 B	463280

  (985) 0x464bbc LDR	D20, [X6, X8,LSL #3]

  (985) 0x464bc0 FMUL	D21, D20, D28

  (985) 0x464bc4 FCMPE	D21, #0

  (985) 0x464bc8 B.MI	46504c

  (985) 0x464bcc ADD	X8, X8, #1

  (985) 0x464bd0 LDR	X16, [X5, X8,LSL #3]

  (985) 0x464bd4 LDR	X10, [X19, X16,LSL #3]

  (985) 0x464bd8 CMP	X1, X10

  (985) 0x464bdc B.GT	464f68

  (985) 0x464be0 LDR	D0, [X6, X8,LSL #3]

  (985) 0x464be4 FMUL	D26, D0, D28

  (985) 0x464be8 FCMPE	D26, #0

  (985) 0x464bec B.MI	464f58

  (985) 0x464bf0 ADD	X17, X8, #1

  (985) 0x464bf4 LDR	X27, [X5, X17,LSL #3]

  (985) 0x464bf8 LDR	X26, [X19, X27,LSL #3]

  (985) 0x464bfc CMP	X1, X26

  (985) 0x464c00 B.GT	464f34

  (985) 0x464c04 LDR	D5, [X6, X17,LSL #3]

  (985) 0x464c08 FMUL	D6, D5, D28

  (985) 0x464c0c FCMPE	D6, #0

  (985) 0x464c10 B.MI	464f24

  (985) 0x464c14 ADD	X10, X8, #2

  (985) 0x464c18 LDR	X16, [X5, X10,LSL #3]

  (985) 0x464c1c LDR	X14, [X19, X16,LSL #3]

  (985) 0x464c20 CMP	X1, X14

  (985) 0x464c24 B.GT	464f00

  (985) 0x464c28 LDR	D19, [X6, X10,LSL #3]

  (985) 0x464c2c FMUL	D20, D19, D28

  (985) 0x464c30 FCMPE	D20, #0

  (985) 0x464c34 B.MI	464ef0

  (985) 0x464c38 ADD	X8, X8, #3

  (985) 0x464c3c CMP	X15, X8

  (985) 0x464c40 B.LE	464920

  (985) 0x464c44 LDR	X27, [X5, X8,LSL #3]

  (985) 0x464c48 LDR	X26, [X19, X27,LSL #3]

  (985) 0x464c4c CMP	X1, X26

  (985) 0x464c50 B.LE	464bbc

  (985) 0x464c54 CMP	X21, X27

  (985) 0x464c58 B.NE	464bcc

  (985) 0x464c5c LDR	D24, [X6, X8,LSL #3]

  (985) 0x464c60 FMUL	D1, D24, D28

  (985) 0x464c64 FCMPE	D1, #0

  (985) 0x464c68 B.MI	464ebc

  (985) 0x464c6c B	464bcc

0x464ca8 FADD	D26, D26, D7

0x464cac ADD	X10, X10, #1

0x464cb0 B	46388c

  (981) 0x464cb4 SUB	X5, X5, X12

  (981) 0x464cb8 LDR	X2, [X19, X5,LSL #3]

  (981) 0x464cbc CMP	X1, X2

  (981) 0x464cc0 CCMP	X21, X5, #4, #12

  (981) 0x464cc4 B.EQ	464504

  (981) 0x464cc8 B	46450c

0x464d34 LD1D	{Z7.D}, P3/Z, [X9, #1, MUL VL]

0x464d38 FNEG	Z7.D, P1/M, Z7.D

0x464d3c FDIV	Z7.D, P3/M, Z7.D, Z4.D

0x464d40 ST1D	{Z7.D}, P3, [X9, #1, MUL VL]

0x464d44 B	463468

    (983) 0x464d84 ORN	X6, XZR, X3

    (983) 0x464d88 LDR	X3, [X24, X6,LSL #3]

    (983) 0x464d8c CMP	X7, X3

    (983) 0x464d90 B.GT	464da8

    (983) 0x464d94 UBFM	X6, X3, #61, #60

    (983) 0x464d98 LDR	D23, [X17, X5,LSL #3]

    (983) 0x464d9c LDR	D24, [X10, X6]

    (983) 0x464da0 FMADD	D1, D20, D23, D24

    (983) 0x464da4 STR	D1, [X10, X6]

    (983) 0x464da8 ADD	X6, X2, #3

    (983) 0x464dac CMP	X22, X6

    (983) 0x464db0 B.EQ	464044

    (983) 0x464db4 LDR	X5, [X8, X6,LSL #3]

    (983) 0x464db8 CMP	X14, X5

    (983) 0x464dbc CCMP	X12, X5, #0, #12

    (983) 0x464dc0 B.LE	465088

    (983) 0x464dc4 ORN	X3, XZR, X5

    (983) 0x464dc8 LDR	X2, [X24, X3,LSL #3]

    (983) 0x464dcc CMP	X7, X2

    (983) 0x464dd0 B.LE	46526c

    (983) 0x464dd4 ADD	X2, X6, #1

    (983) 0x464dd8 LDR	X6, [X8, X2,LSL #3]

    (983) 0x464ddc CMP	X14, X6

    (983) 0x464de0 CCMP	X12, X6, #0, #12

    (983) 0x464de4 B.GT	4650c0

    (983) 0x464de8 SUB	X3, X6, X12

    (983) 0x464dec LDR	X5, [X19, X3,LSL #3]

    (983) 0x464df0 CMP	X1, X5

    (983) 0x464df4 B.LE	465284

    (983) 0x464df8 CMP	X21, X3

    (983) 0x464dfc B.NE	464e08

    (983) 0x464e00 LDR	D6, [X17, X2,LSL #3]

    (983) 0x464e04 FMADD	D29, D20, D6, D29

    (983) 0x464e08 ADD	X5, X2, #1

    (983) 0x464e0c LDR	X3, [X8, X5,LSL #3]

    (983) 0x464e10 CMP	X14, X3

    (983) 0x464e14 CCMP	X12, X3, #0, #12

    (983) 0x464e18 B.GT	465060

    (983) 0x464e1c SUB	X3, X3, X12

    (983) 0x464e20 LDR	X6, [X19, X3,LSL #3]

    (983) 0x464e24 CMP	X1, X6

    (983) 0x464e28 B.LE	465254

    (983) 0x464e2c CMP	X21, X3

    (983) 0x464e30 B.NE	464e3c

    (983) 0x464e34 LDR	D22, [X17, X5,LSL #3]

    (983) 0x464e38 FMADD	D29, D20, D22, D29

    (983) 0x464e3c ADD	X5, X2, #2

    (983) 0x464e40 LDR	X3, [X8, X5,LSL #3]

    (983) 0x464e44 CMP	X14, X3

    (983) 0x464e48 CCMP	X12, X3, #0, #12

    (983) 0x464e4c B.GT	464d84

    (983) 0x464e50 SUB	X3, X3, X12

    (983) 0x464e54 LDR	X6, [X19, X3,LSL #3]

    (983) 0x464e58 CMP	X1, X6

    (983) 0x464e5c B.LE	46523c

    (983) 0x464e60 CMP	X21, X3

    (983) 0x464e64 B.NE	464da8

    (983) 0x464e68 LDR	D31, [X17, X5,LSL #3]

    (983) 0x464e6c FMADD	D29, D20, D31, D29

    (983) 0x464e70 B	464da8

0x464eb0 FADD	D26, D15, D5

0x464eb4 ADD	X10, X8, #1

0x464eb8 B	463864

  (985) 0x464ebc FMADD	D29, D31, D24, D29

  (985) 0x464ec0 B	464bcc

0x464ec4 UBFM	X16, X22, #61, #60

0x464ec8 LDR	D3, [X0, X16]

0x464ecc FMADD	D4, D31, D26, D3

0x464ed0 STR	D4, [X0, X16]

0x464ed4 CMP	X21, X26

0x464ed8 B.NE	4648f0

0x464edc LDR	D30, [X6, X8,LSL #3]

0x464ee0 FMUL	D5, D30, D28

0x464ee4 FCMPE	D5, #0

0x464ee8 B.MI	46541c

0x464eec B	4648f0

  (985) 0x464ef0 UBFM	X17, X14, #61, #60

  (985) 0x464ef4 LDR	D21, [X0, X17]

  (985) 0x464ef8 FMADD	D22, D31, D19, D21

  (985) 0x464efc STR	D22, [X0, X17]

  (985) 0x464f00 CMP	X21, X16

  (985) 0x464f04 B.NE	464c38

  (985) 0x464f08 LDR	D23, [X6, X10,LSL #3]

  (985) 0x464f0c FMUL	D24, D23, D28

  (985) 0x464f10 FCMPE	D24, #0

  (985) 0x464f14 B.MI	464f1c

  (985) 0x464f18 B	464c38

  (985) 0x464f1c FMADD	D29, D31, D23, D29

  (985) 0x464f20 B	464c38

  (985) 0x464f24 UBFM	X22, X26, #61, #60

  (985) 0x464f28 LDR	D7, [X0, X22]

  (985) 0x464f2c FMADD	D16, D31, D5, D7

  (985) 0x464f30 STR	D16, [X0, X22]

  (985) 0x464f34 CMP	X21, X27

  (985) 0x464f38 B.NE	464c14

  (985) 0x464f3c LDR	D17, [X6, X17,LSL #3]

  (985) 0x464f40 FMUL	D18, D17, D28

  (985) 0x464f44 FCMPE	D18, #0

  (985) 0x464f48 B.MI	464f50

  (985) 0x464f4c B	464c14

  (985) 0x464f50 FMADD	D29, D31, D17, D29

  (985) 0x464f54 B	464c14

  (985) 0x464f58 UBFM	X14, X10, #61, #60

  (985) 0x464f5c LDR	D27, [X0, X14]

  (985) 0x464f60 FMADD	D3, D31, D0, D27

  (985) 0x464f64 STR	D3, [X0, X14]

  (985) 0x464f68 CMP	X21, X16

  (985) 0x464f6c B.NE	464bf0

  (985) 0x464f70 LDR	D4, [X6, X8,LSL #3]

  (985) 0x464f74 FMUL	D30, D4, D28

  (985) 0x464f78 FCMPE	D30, #0

  (985) 0x464f7c B.MI	464f84

  (985) 0x464f80 B	464bf0

  (985) 0x464f84 FMADD	D29, D31, D4, D29

  (985) 0x464f88 B	464bf0

0x464f8c UBFM	X10, X16, #61, #60

0x464f90 LDR	D17, [X0, X10]

0x464f94 FMADD	D18, D31, D7, D17

0x464f98 STR	D18, [X0, X10]

0x464f9c CMP	X21, X17

0x464fa0 B.NE	46488c

0x464fa4 LDR	D19, [X6, X8,LSL #3]

0x464fa8 FMUL	D20, D19, D28

0x464fac FCMPE	D20, #0

0x464fb0 B.MI	4652d0

0x464fb4 B	46488c

0x465000 UBFM	X17, X14, #61, #60

0x465004 LDR	D16, [X0, X17]

0x465008 FMADD	D17, D31, D6, D16

0x46500c STR	D17, [X0, X17]

0x465010 CMP	X21, X10

0x465014 B.NE	464914

0x465018 LDR	D18, [X6, X8,LSL #3]

0x46501c FMUL	D19, D18, D28

0x465020 FCMPE	D19, #0

0x465024 B.MI	465374

0x465028 B	464914

0x46502c LDR	X16, [SP, #112]

0x465030 LDR	D27, [X6, X2,LSL #3]

0x465034 CMP	X16, #1

0x465038 B.GT	4643b8

0x46503c FCMP	D15, #0

0x465040 B.NE	463280

0x465044 FADD	D29, D29, D27

0x465048 B	463280

  (985) 0x46504c UBFM	X22, X26, #61, #60

  (985) 0x465050 LDR	D22, [X0, X22]

  (985) 0x465054 FMADD	D23, D31, D20, D22

  (985) 0x465058 STR	D23, [X0, X22]

  (985) 0x46505c B	464c54

    (983) 0x465060 ORN	X6, XZR, X3

    (983) 0x465064 LDR	X3, [X24, X6,LSL #3]

    (983) 0x465068 CMP	X7, X3

    (983) 0x46506c B.GT	464e3c

    (983) 0x465070 UBFM	X6, X3, #61, #60

    (983) 0x465074 LDR	D7, [X17, X5,LSL #3]

    (983) 0x465078 LDR	D16, [X10, X6]

    (983) 0x46507c FMADD	D17, D20, D7, D16

    (983) 0x465080 STR	D17, [X10, X6]

    (983) 0x465084 B	464e3c

    (983) 0x465088 SUB	X3, X5, X12

    (983) 0x46508c LDR	X2, [X19, X3,LSL #3]

    (983) 0x465090 CMP	X1, X2

    (983) 0x465094 B.GT	4650ac

    (983) 0x465098 UBFM	X5, X2, #61, #60

    (983) 0x46509c LDR	D1, [X17, X6,LSL #3]

    (983) 0x4650a0 LDR	D0, [X0, X5]

    (983) 0x4650a4 FMADD	D26, D20, D1, D0

    (983) 0x4650a8 STR	D26, [X0, X5]

    (983) 0x4650ac CMP	X21, X3

    (983) 0x4650b0 B.NE	464dd4

    (983) 0x4650b4 LDR	D28, [X17, X6,LSL #3]

    (983) 0x4650b8 FMADD	D29, D20, D28, D29

    (983) 0x4650bc B	464dd4

    (983) 0x4650c0 ORN	X3, XZR, X6

    (983) 0x4650c4 LDR	X5, [X24, X3,LSL #3]

    (983) 0x4650c8 CMP	X7, X5

    (983) 0x4650cc B.GT	464e08

    (983) 0x4650d0 UBFM	X6, X5, #61, #60

    (983) 0x4650d4 LDR	D31, [X17, X2,LSL #3]

    (983) 0x4650d8 LDR	D27, [X10, X6]

    (983) 0x4650dc FMADD	D3, D20, D31, D27

    (983) 0x4650e0 STR	D3, [X10, X6]

    (983) 0x4650e4 B	464e08

  (981) 0x4650e8 ORN	X5, XZR, X2

  (981) 0x4650ec LDR	X2, [X24, X5,LSL #3]

  (981) 0x4650f0 CMP	X7, X2

  (981) 0x4650f4 B.GT	4644e0

  (981) 0x4650f8 B	4644d8

    (983) 0x46523c UBFM	X6, X6, #61, #60

    (983) 0x465240 LDR	D0, [X17, X5,LSL #3]

    (983) 0x465244 LDR	D26, [X0, X6]

    (983) 0x465248 FMADD	D28, D20, D0, D26

    (983) 0x46524c STR	D28, [X0, X6]

    (983) 0x465250 B	464e60

    (983) 0x465254 UBFM	X6, X6, #61, #60

    (983) 0x465258 LDR	D18, [X17, X5,LSL #3]

    (983) 0x46525c LDR	D19, [X0, X6]

    (983) 0x465260 FMADD	D21, D20, D18, D19

    (983) 0x465264 STR	D21, [X0, X6]

    (983) 0x465268 B	464e2c

    (983) 0x46526c UBFM	X5, X2, #61, #60

    (983) 0x465270 LDR	D22, [X17, X6,LSL #3]

    (983) 0x465274 LDR	D23, [X10, X5]

    (983) 0x465278 FMADD	D24, D20, D22, D23

    (983) 0x46527c STR	D24, [X10, X5]

    (983) 0x465280 B	464dd4

    (983) 0x465284 UBFM	X6, X5, #61, #60

    (983) 0x465288 LDR	D4, [X17, X2,LSL #3]

    (983) 0x46528c LDR	D30, [X0, X6]

    (983) 0x465290 FMADD	D5, D20, D4, D30

    (983) 0x465294 STR	D5, [X0, X6]

    (983) 0x465298 B	464df8

  (981) 0x46529c SUB	X3, X3, X12

  (981) 0x4652a0 LDR	X5, [X19, X3,LSL #3]

  (981) 0x4652a4 CMP	X1, X5

  (981) 0x4652a8 CCMP	X21, X3, #4, #12

  (981) 0x4652ac B.EQ	4644a8

  (981) 0x4652b0 ADD	X3, X6, #1

  (981) 0x4652b4 B	4644b4

0x4652b8 LDR	X27, [SP, #312]

0x4652bc LDR	D4, [X27, X17,LSL #3]

0x4652c0 FMUL	D30, D4, D28

0x4652c4 FCMPE	D30, #0

0x4652c8 B.MI	465424

0x4652cc B	464a78

0x4652d0 FMADD	D29, D31, D19, D29

0x4652d4 B	46488c

0x465308 LDR	X16, [SP, #312]

0x46530c LDR	D0, [X16, X17,LSL #3]

0x465310 FMUL	D26, D0, D28

0x465314 FCMPE	D26, #0

0x465318 B.MI	465438

0x46531c B	464a64

  (981) 0x465320 ORN	X3, XZR, X2

  (981) 0x465324 LDR	X5, [X24, X3,LSL #3]

  (981) 0x465328 CMP	X7, X5

  (981) 0x46532c B.GT	465344

  (981) 0x465330 UBFM	X2, X5, #61, #60

  (981) 0x465334 LDR	D6, [X17, X6,LSL #3]

  (981) 0x465338 LDR	D7, [X10, X2]

  (981) 0x46533c FMADD	D16, D20, D6, D7

  (981) 0x465340 STR	D16, [X10, X2]

  (981) 0x465344 ADD	X6, X6, #1

  (981) 0x465348 CMP	X22, X6

  (981) 0x46534c B.NE	464db4

  (981) 0x465350 B	464044

0x465374 FMADD	D29, D31, D18, D29

0x465378 B	464914

  (984) 0x46537c UBFM	X27, X15, #61, #60

  (984) 0x465380 LDR	D1, [X10, X27]

  (984) 0x465384 FMADD	D0, D31, D23, D1

  (984) 0x465388 STR	D0, [X10, X27]

  (984) 0x46538c B	464af8

  (984) 0x465390 UBFM	X26, X3, #61, #60

  (984) 0x465394 LDR	D0, [X10, X26]

  (984) 0x465398 FMADD	D26, D31, D24, D0

  (984) 0x46539c STR	D26, [X10, X26]

  (984) 0x4653a0 B	464bac

  (984) 0x4653a4 UBFM	X14, X16, #61, #60

  (984) 0x4653a8 LDR	D22, [X10, X14]

  (984) 0x4653ac FMADD	D23, D31, D20, D22

  (984) 0x4653b0 STR	D23, [X10, X14]

  (984) 0x4653b4 B	464b88

  (984) 0x4653b8 UBFM	X15, X14, #61, #60

  (984) 0x4653bc LDR	D17, [X10, X15]

  (984) 0x4653c0 FMADD	D18, D31, D7, D17

  (984) 0x4653c4 STR	D18, [X10, X15]

  (984) 0x4653c8 B	464ab0

  (984) 0x4653cc UBFM	X26, X3, #61, #60

  (984) 0x4653d0 LDR	D21, [X10, X26]

  (984) 0x4653d4 FMADD	D22, D31, D19, D21

  (984) 0x4653d8 STR	D22, [X10, X26]

  (984) 0x4653dc B	464ad4

  (984) 0x4653e0 UBFM	X26, X3, #61, #60

  (984) 0x4653e4 LDR	D6, [X10, X26]

  (984) 0x4653e8 FMADD	D7, D31, D30, D6

  (984) 0x4653ec STR	D7, [X10, X26]

  (984) 0x4653f0 B	464b40

  (984) 0x4653f4 UBFM	X27, X15, #61, #60

  (984) 0x4653f8 LDR	D18, [X10, X27]

  (984) 0x4653fc FMADD	D19, D31, D16, D18

  (984) 0x465400 STR	D19, [X10, X27]

  (984) 0x465404 B	464b64

  (984) 0x465408 UBFM	X14, X16, #61, #60

  (984) 0x46540c LDR	D3, [X10, X14]

  (984) 0x465410 FMADD	D4, D31, D26, D3

  (984) 0x465414 STR	D4, [X10, X14]

  (984) 0x465418 B	464b1c

0x46541c FMADD	D29, D31, D30, D29

0x465420 B	4648f0

0x465424 UBFM	X3, X15, #61, #60

0x465428 LDR	D5, [X10, X3]

0x46542c FMADD	D6, D31, D4, D5

0x465430 STR	D6, [X10, X3]

0x465434 B	464a78

0x465438 UBFM	X14, X22, #61, #60

0x46543c LDR	D27, [X10, X14]

0x465440 FMADD	D3, D31, D0, D27

0x465444 STR	D3, [X10, X14]

0x465448 B	464a64

0x46544c UBFM	X27, X17, #61, #60

0x465450 LDR	D23, [X0, X27]

0x465454 FMADD	D24, D31, D21, D23

0x465458 STR	D24, [X0, X27]

0x46545c CMP	X21, X14

0x465460 B.NE	4648cc

0x465464 LDR	D1, [X6, X8,LSL #3]

0x465468 FMUL	D0, D1, D28

0x46546c FCMPE	D0, #0

0x465470 B.MI	46548c

0x465474 ADD	X8, X8, #1

0x465478 B	4648d0

  (981) 0x46547c LDR	D5, [X17, X6,LSL #3]

  (981) 0x465480 ADD	X6, X6, #1

  (981) 0x465484 FMADD	D29, D20, D5, D29

  (981) 0x465488 B	46468c

0x46548c FMADD	D29, D31, D1, D29

0x465490 ADD	X8, X8, #1

0x465494 B	4648d0

0x465498 UBFM	X3, X15, #61, #60

0x46549c ADD	X17, X17, #1

0x4654a0 LDR	D24, [X10, X3]

0x4654a4 FMADD	D1, D31, D22, D24

0x4654a8 STR	D1, [X10, X3]

0x4654ac B	464a54

0x4654b0 UBFM	X14, X22, #61, #60

0x4654b4 LDR	D20, [X10, X14]

0x4654b8 FMADD	D21, D31, D18, D20

0x4654bc STR	D21, [X10, X14]

0x4654c0 B	464a28

0x4654c4 UBFM	X3, X15, #61, #60

0x4654c8 LDR	D16, [X10, X3]

0x4654cc FMADD	D17, D31, D6, D16

0x4654d0 STR	D17, [X10, X3]

0x4654d4 B	464a00

0x4654d8 UBFM	X14, X22, #61, #60

0x4654dc LDR	D30, [X10, X14]

0x4654e0 FMADD	D5, D31, D3, D30

0x4654e4 STR	D5, [X10, X14]

0x4654e8 B	4649d8

  (981) 0x4654ec LDR	D26, [X17, X6,LSL #3]

  (981) 0x4654f0 FMADD	D29, D20, D26, D29

  (981) 0x4654f4 B	464648

0x4654f8 UBFM	X3, X15, #61, #60

0x4654fc LDR	D26, [X10, X3]

0x465500 FMADD	D27, D31, D1, D26

0x465504 STR	D27, [X10, X3]

0x465508 B	4649b0

0x46550c FCMP	D26, #0

0x465510 B.EQ	463980

0x465514 FDIV	D31, D27, D26

0x465518 CMP	X8, X15

0x46551c B.LT	464860

0x465520 B	463280

  (981) 0x465524 FCMP	D15, #0

  (981) 0x465528 B.EQ	4640a4

  (981) 0x46552c B	464044

0x465530 MOVZ	X8, #0

0x465534 B	463434

0x465538 MOVZ	X3, #0

0x46553c B	4635a0

  (981) 0x465554 ORN	X3, XZR, X5

  (981) 0x465558 LDR	X2, [X24, X3,LSL #3]

  (981) 0x46555c CMP	X7, X2

  (981) 0x465560 B.GT	464688

  (981) 0x465564 UBFM	X5, X2, #61, #60

  (981) 0x465568 LDR	D28, [X17, X6,LSL #3]

  (981) 0x46556c ADD	X6, X6, #1

  (981) 0x465570 LDR	D31, [X10, X5]

  (981) 0x465574 FMADD	D27, D20, D28, D31

  (981) 0x465578 STR	D27, [X10, X5]

  (981) 0x46557c B	46468c

  (981) 0x465598 ORN	X5, XZR, X2

  (981) 0x46559c LDR	X3, [X24, X5,LSL #3]

  (981) 0x4655a0 CMP	X7, X3

  (981) 0x4655a4 B.GT	464648

  (981) 0x4655a8 UBFM	X2, X3, #61, #60

  (981) 0x4655ac LDR	D21, [X17, X6,LSL #3]

  (981) 0x4655b0 LDR	D22, [X10, X2]

  (981) 0x4655b4 FMADD	D23, D20, D21, D22

  (981) 0x4655b8 STR	D23, [X10, X2]

  (981) 0x4655bc B	464648

0x4655c0 LDR	X22, [SP, #296]

0x4655c4 LDR	X8, [SP, #312]

0x4655c8 B	464a90

/home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c: 1196 - 1756

--------------------------------------------------------------------------------

1196: #pragma omp parallel private(i,my_thread_num,num_threads,start,stop,coarse_counter,jj_counter,jj_counter_offd, P_marker, P_marker_offd,jj,kk,i1,k1,loc_col,jj_begin_row,jj_begin_row_offd,jj_end_row,jj_end_row_offd,diagonal,sum,sgn,jj1,i2,distribute,strong_f_marker)

[...]

1469:        for (i = start; i < stop; i++)

1470:        {

1471:          jj_begin_row = P_diag_i[i];

1472:          jj_begin_row_offd = P_offd_i[i];

1473:          jj_counter = jj_begin_row;

1474:          jj_counter_offd = jj_begin_row_offd;

[...]

1480:          if (CF_marker[i] >= 0)

1481:          {

1482:            P_diag_j[jj_counter]    = fine_to_coarse[i];

1483:            P_diag_data[jj_counter] = one;

[...]

1491:          else if (CF_marker[i] != -3)

1492:          {

1493:            strong_f_marker--;

1494:            for (jj = S_diag_i[i]; jj < S_diag_i[i+1]; jj++)

[...]

1503:              if (CF_marker[i1] >= 0)

1504:              {

1505:                if (P_marker[i1] < jj_begin_row)

1506:                {

1507:                  P_marker[i1] = jj_counter;

1508:                  P_diag_j[jj_counter]    = fine_to_coarse[i1];

1509:                  P_diag_data[jj_counter] = zero;

1510:                  jj_counter++;

1511:                }

1512:              }

1513:              else  if (CF_marker[i1] != -3)

1514:              {

1515:                P_marker[i1] = strong_f_marker;

1516:                for (kk = S_diag_i[i1]; kk < S_diag_i[i1+1]; kk++)

1517:                {

1518:                  k1 = S_diag_j[kk];

1519:                  if (CF_marker[k1] >= 0)

1520:                  {

1521:                    if(P_marker[k1] < jj_begin_row)

1522:                    {

1523:                      P_marker[k1] = jj_counter;

1524:                      P_diag_j[jj_counter] = fine_to_coarse[k1];

1525:                      P_diag_data[jj_counter] = zero;

1526:                      jj_counter++;

1527:                    }

1528:                  }

1529:                }

1530:                if(num_procs > 1)

1531:                {

1532:                  for (kk = S_offd_i[i1]; kk < S_offd_i[i1+1]; kk++)

1533:                  {

1534:                    if(col_offd_S_to_A)

1535:                     k1 = col_offd_S_to_A[S_offd_j[kk]];

1536:                    else

1537:                     k1 = S_offd_j[kk];

1538:                    if(CF_marker_offd[k1] >= 0)

1539:                    {

1540:                      if(P_marker_offd[k1] < jj_begin_row_offd)

1541:                      {

1542:                        P_marker_offd[k1] = jj_counter_offd;

1543:                        P_offd_j[jj_counter_offd] = k1;

1544:                        P_offd_data[jj_counter_offd] = zero;

1545:                        jj_counter_offd++;

[...]

1553:            if ( num_procs > 1)

1554:            {

1555:              for (jj=S_offd_i[i]; jj < S_offd_i[i+1]; jj++)

1556:              {

1557:                i1 = S_offd_j[jj];

1558:                if(col_offd_S_to_A)

1559:                  i1 = col_offd_S_to_A[i1];

1560:                if ( CF_marker_offd[i1] >= 0)

1561:                {

1562:                  if(P_marker_offd[i1] < jj_begin_row_offd)

1563:                  {

1564:                    P_marker_offd[i1] = jj_counter_offd;

1565:                    P_offd_j[jj_counter_offd] = i1;

1566:                    P_offd_data[jj_counter_offd] = zero;

1567:                    jj_counter_offd++;

1568:                  }

1569:                }

1570:                else if (CF_marker_offd[i1] != -3)

1571:                {

1572:                  P_marker_offd[i1] = strong_f_marker;

1573:                  for(kk = Sop_i[i1]; kk < Sop_i[i1+1]; kk++)

1574:                  {

1575:                    k1 = Sop_j[kk];

1576:                    /* Find local col number */

1577:                    if(k1 >= col_1 && k1 < col_n)

1578:                    {

1579:                      loc_col = k1-col_1;

1580:                      if(P_marker[loc_col] < jj_begin_row)

1581:                      {

1582:                        P_marker[loc_col] = jj_counter;

1583:                        P_diag_j[jj_counter] = fine_to_coarse[loc_col];

1584:                        P_diag_data[jj_counter] = zero;

1585:                        jj_counter++;

1586:                      }

1587:                    }

1588:                    else

1589:                    {

1590:                      loc_col = -k1 - 1;

1591:                      if(P_marker_offd[loc_col] < jj_begin_row_offd)

1592:                      {

1593:                        P_marker_offd[loc_col] = jj_counter_offd;

1594:                        P_offd_j[jj_counter_offd]=loc_col;

1595:                        P_offd_data[jj_counter_offd] = zero;

1596:                        jj_counter_offd++;

[...]

1607:            diagonal = A_diag_data[A_diag_i[i]];

1608:

1609:            for (jj = A_diag_i[i]+1; jj < A_diag_i[i+1]; jj++)

1610:            { /* i1 is a c-point and strongly influences i, accumulate

1611:               * a_(i,i1) into interpolation weight */

1612:              i1 = A_diag_j[jj];

1613:              if (P_marker[i1] >= jj_begin_row)

1614:              {

1615:                P_diag_data[P_marker[i1]] += A_diag_data[jj];

1616:              }

1617:              else if(P_marker[i1] == strong_f_marker)

1618:              {

1619:                sum = zero;

1620:                sgn = 1;

1621:                if(A_diag_data[A_diag_i[i1]] < 0) sgn = -1;

1622:                /* Loop over row of A for point i1 and calculate the sum

1623:                 * of the connections to c-points that strongly influence i. */

1624:                for(jj1 = A_diag_i[i1]+1; jj1 < A_diag_i[i1+1]; jj1++)

1625:                {

1626:                  i2 = A_diag_j[jj1];

1627:                  if((P_marker[i2] >= jj_begin_row || i2 == i) && (sgn*A_diag_data[jj1]) < 0)

1628:                    sum += A_diag_data[jj1];

1629:                }

1630:                if(num_procs > 1)

1631:                {

1632:                  for(jj1 = A_offd_i[i1]; jj1< A_offd_i[i1+1]; jj1++)

1633:                  {

1634:                    i2 = A_offd_j[jj1];

1635:                    if(P_marker_offd[i2] >= jj_begin_row_offd &&

1636:                       (sgn*A_offd_data[jj1]) < 0)

1637:                       sum += A_offd_data[jj1];

1638:                  }

1639:                }

1640:                if(sum != 0)

1641:                {

1642:                  distribute = A_diag_data[jj]/sum;

1643:                  /* Loop over row of A for point i1 and do the distribution */

1644:                  for(jj1 = A_diag_i[i1]+1; jj1 < A_diag_i[i1+1]; jj1++)

1645:                  {

1646:                    i2 = A_diag_j[jj1];

1647:                    if(P_marker[i2] >= jj_begin_row && (sgn*A_diag_data[jj1]) < 0)

1648:                       P_diag_data[P_marker[i2]] +=

1649:                       distribute*A_diag_data[jj1];

1650:                        if(i2 == i && (sgn*A_diag_data[jj1]) < 0)

1651:                          diagonal += distribute*A_diag_data[jj1];

1652:                  }

1653:                  if(num_procs > 1)

1654:                  {

1655:                    for(jj1 = A_offd_i[i1]; jj1 < A_offd_i[i1+1]; jj1++)

1656:                    {

1657:                      i2 = A_offd_j[jj1];

1658:                      if(P_marker_offd[i2] >= jj_begin_row_offd &&

1659:                                 (sgn*A_offd_data[jj1]) < 0)

1660:                        P_offd_data[P_marker_offd[i2]] +=

[...]

1667:                  diagonal += A_diag_data[jj];

1668:                }

1669:              }

1670:              /* neighbor i1 weakly influences i, accumulate a_(i,i1) into

1671:               * diagonal */

1672:              else if (CF_marker[i1] != -3)

1673:              {

1674:                if(num_functions == 1 || dof_func[i] == dof_func[i1])

1675:                  diagonal += A_diag_data[jj];

1676:              }

1677:            }

1678:            if(num_procs > 1)

1679:            {

1680:              for(jj = A_offd_i[i]; jj < A_offd_i[i+1]; jj++)

1681:              {

1682:                i1 = A_offd_j[jj];

1683:                if(P_marker_offd[i1] >= jj_begin_row_offd)

1684:                  P_offd_data[P_marker_offd[i1]] += A_offd_data[jj];

1685:                else if(P_marker_offd[i1] == strong_f_marker)

1686:                {

1687:                  sum = zero;

1688:                  for(jj1 = A_ext_i[i1]; jj1 < A_ext_i[i1+1]; jj1++)

1689:                  {

1690:                    k1 = A_ext_j[jj1];

1691:                    if(k1 >= col_1 && k1 < col_n)

1692:                    { /* diag */

1693:                      loc_col = k1 - col_1;

1694:                      if(P_marker[loc_col] >= jj_begin_row || loc_col == i)

1695:                        sum += A_ext_data[jj1];

1696:                    }

1697:                    else

1698:                    {

1699:                      loc_col = -k1 - 1;

1700:                      if(P_marker_offd[loc_col] >= jj_begin_row_offd)

1701:                        sum += A_ext_data[jj1];

1702:                    }

1703:                  }

1704:                  if(sum != 0)

1705:                  {

1706:                    distribute = A_offd_data[jj] / sum;

1707:                    for(jj1 = A_ext_i[i1]; jj1 < A_ext_i[i1+1]; jj1++)

1708:                    {

1709:                      k1 = A_ext_j[jj1];

1710:                      if(k1 >= col_1 && k1 < col_n)

1711:                      { /* diag */

1712:                        loc_col = k1 - col_1;

1713:                        if(P_marker[loc_col] >= jj_begin_row)

1714:                          P_diag_data[P_marker[loc_col]] += distribute*

1715:                           A_ext_data[jj1];

1716:                                if(loc_col == i)

1717:                                  diagonal += distribute*A_ext_data[jj1];

1718:                      }

1719:                      else

1720:                      {

1721:                        loc_col = -k1 - 1;

1722:                        if(P_marker_offd[loc_col] >= jj_begin_row_offd)

1723:                          P_offd_data[P_marker_offd[loc_col]] += distribute*

[...]

1730:                    diagonal += A_offd_data[jj];

1731:                  }

1732:                }

1733:                else if (CF_marker_offd[i1] != -3)

1734:                {

1735:                  if(num_functions == 1 || dof_func[i] == dof_func_offd[i1])

1736:                    diagonal += A_offd_data[jj];

1737:                }

1738:              }

1739:            }

1740:            if (diagonal)

1741:            {

1742:              for(jj = jj_begin_row; jj < jj_end_row; jj++)

1743:                 P_diag_data[jj] /= -diagonal;

1744:              for(jj = jj_begin_row_offd; jj < jj_end_row_offd; jj++)

1745:                 P_offd_data[jj] /= -diagonal;

1746:            }

1747:          }

1748:          strong_f_marker--;

[...]

1754:        if (n_fine)

1755:        {  hypre_TFree(P_marker); }

1756:        if (full_off_procNodes)

Coverage (%)	Name	Source Location	Module
►100.00+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Metric	Value
CQA speedup if no scalar integer	1.18 - 1.09
CQA speedup if FP arith vectorized	1.04
CQA speedup if fully vectorized	1.10 - 1.04
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.86
Bottlenecks	P8, P10,
Function	hypre_BoomerAMGBuildExtPIInterp._omp_fn.0
Source	par_lr_interp.c:1196-1196,par_lr_interp.c:1494-1494,par_lr_interp.c:1624-1632,par_lr_interp.c:1640-1655,par_lr_interp.c:1658-1660,par_lr_interp.c:1667-1667,par_lr_interp.c:1675-1675,par_lr_interp.c:1680-1680,par_lr_interp.c:1684-1684,par_lr_interp.c:1723-1723,par_lr_interp.c:1733-1735,par_lr_interp.c:1740-1745,par_lr_interp.c:1754-1756
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	65.75 - 122.38
CQA cycles if no scalar integer	55.94 - 111.89
CQA cycles if FP arith vectorized	63.20 - 117.13
CQA cycles if fully vectorized	60.00 - 117.13
Front-end cycles	65.75
P0 cycles	60.00
P1 cycles	60.00
P2 cycles	26.08
P3 cycles	26.08
P4 cycles	26.00
P5 cycles	26.00
P6 cycles	25.92
P7 cycles	25.92
P8 cycles	31.00
P9 cycles	31.00
P10 cycles	31.00
P11 cycles	31.00
P12 cycles	51.33
P13 cycles	51.33
P14 cycles	51.33
P15 cycles	2.50
P16 cycles	2.50
DIV/SQRT cycles	61.20 - 122.38
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	528.00
Nb uops	526.00
Nb loads	NA
Nb stores	28.00
Nb stack references	0.00
FLOP/cycle	1.34 - 0.72
Nb FLOP add-sub	5.00
Nb FLOP mul	18.00
Nb FLOP fma	15.00
Nb FLOP div	35.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	13.47 - 25.06
Bytes prefetched	0.00
Bytes loaded	1248.00
Bytes stored	400.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	25.94
Vectorization ratio load	27.08
Vectorization ratio store	42.86
Vectorization ratio mul	0.00
Vectorization ratio add_sub	0.00
Vectorization ratio fma	0.00
Vectorization ratio div_sqrt	84.21
Vectorization ratio other	20.00
Vector-efficiency ratio all	64.02
Vector-efficiency ratio load	64.58
Vector-efficiency ratio store	75.00
Vector-efficiency ratio mul	50.00
Vector-efficiency ratio add_sub	50.00
Vector-efficiency ratio fma	50.00
Vector-efficiency ratio div_sqrt	92.11
Vector-efficiency ratio other	60.95

Metric	Value
CQA speedup if no scalar integer	1.18 - 1.09
CQA speedup if FP arith vectorized	1.04
CQA speedup if fully vectorized	1.10 - 1.04
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.86
Bottlenecks	P8, P10,
Function	hypre_BoomerAMGBuildExtPIInterp._omp_fn.0
Source	par_lr_interp.c:1196-1196,par_lr_interp.c:1494-1494,par_lr_interp.c:1624-1632,par_lr_interp.c:1640-1655,par_lr_interp.c:1658-1660,par_lr_interp.c:1667-1667,par_lr_interp.c:1675-1675,par_lr_interp.c:1680-1680,par_lr_interp.c:1684-1684,par_lr_interp.c:1723-1723,par_lr_interp.c:1733-1735,par_lr_interp.c:1740-1745,par_lr_interp.c:1754-1756
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	65.75 - 122.38
CQA cycles if no scalar integer	55.94 - 111.89
CQA cycles if FP arith vectorized	63.20 - 117.13
CQA cycles if fully vectorized	60.00 - 117.13
Front-end cycles	65.75
P0 cycles	60.00
P1 cycles	60.00
P2 cycles	26.08
P3 cycles	26.08
P4 cycles	26.00
P5 cycles	26.00
P6 cycles	25.92
P7 cycles	25.92
P8 cycles	31.00
P9 cycles	31.00
P10 cycles	31.00
P11 cycles	31.00
P12 cycles	51.33
P13 cycles	51.33
P14 cycles	51.33
P15 cycles	2.50
P16 cycles	2.50
DIV/SQRT cycles	61.20 - 122.38
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	528.00
Nb uops	526.00
Nb loads	NA
Nb stores	28.00
Nb stack references	0.00
FLOP/cycle	1.34 - 0.72
Nb FLOP add-sub	5.00
Nb FLOP mul	18.00
Nb FLOP fma	15.00
Nb FLOP div	35.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	13.47 - 25.06
Bytes prefetched	0.00
Bytes loaded	1248.00
Bytes stored	400.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	25.94
Vectorization ratio load	27.08
Vectorization ratio store	42.86
Vectorization ratio mul	0.00
Vectorization ratio add_sub	0.00
Vectorization ratio fma	0.00
Vectorization ratio div_sqrt	84.21
Vectorization ratio other	20.00
Vector-efficiency ratio all	64.02
Vector-efficiency ratio load	64.58
Vector-efficiency ratio store	75.00
Vector-efficiency ratio mul	50.00
Vector-efficiency ratio add_sub	50.00
Vector-efficiency ratio fma	50.00
Vector-efficiency ratio div_sqrt	92.11
Vector-efficiency ratio other	60.95

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	hypre_BoomerAMGBuildExtPIInterp._omp_fn.0
Source file and lines	par_lr_interp.c:1196-1756
Module	exec

The loop is defined in /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1196,1469-1474,1480-1483,1491-1494,1503-1545,1553-1596,1607-1660,1667-1723,1730-1748,1754-1756.

Analyzed code is defined in /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1196,1494,1624-1632,1640-1655,1658-1660,1667,1675,1680,1684,1723,1733-1735,1740-1745,1754-1756.

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Failed to get the number of paths
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 122.38 to 111.89 cycles (1.09x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your loop is poorly vectorized. Only 64% of vector register length is used (average across all VPU instructions). By fully vectorizing your loop, you can lower the cost of an iteration from 122.38 to 117.13 cycles (1.04x speedup).

Details

25% of VPU instructions are used in vector version (process two or more data elements in vector registers):

27% of VPU loads are used in vector version.
42% of VPU stores are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU multiply instructions are used in vector version.
0% of VPU fused multiply-add instructions are used in vector version.
84% of VPU divide and square root instructions are used in vector version.
20% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with fassociative-math (included in Ofast or ffast-math) to extend loop vectorization to FP reductions.
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 122.38 to 0.50 cycles (244.76x speedup).

FMA

Detected 15 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible. For instance a + b*c is a valid FMA (MUL then ADD). However (a+b)* c cannot be translated into an FMA (ADD then MUL).

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 88 FP arithmetical operations:

20: addition or subtraction (15 inside FMA instructions)
33: multiply (15 inside FMA instructions)
35: divide

The binary loop is loading 1248 bytes. The binary loop is storing 400 bytes.

Arithmetic intensity

Arithmetic intensity is 0.05 FP operations per loaded or stored byte.

General properties

nb instructions	528
loop length	2112
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

65.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	60.00	60.00	26.08	26.08	26.00	26.00	25.92	25.92	31.00	31.00	31.00	31.00	51.33	51.33	51.33	2.50	2.50
cycles	60.00	60.00	26.08	26.08	26.00	26.00	25.92	25.92	31.00	31.00	31.00	31.00	51.33	51.33	51.33	2.50	2.50

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

61.20-122.38

Cycles summary

Front-end	65.75
Overall L1	65.75-122.38

Vectorization ratios

INT

all	20%
load	27%
store	42%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	7%

all	33%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	0%
add-sub	0%
fma	0%
div/sqrt	84%
other	41%

INT+FP

all	25%
load	27%
store	42%
mul	0%
add-sub	0%
fma	0%
div/sqrt	84%
other	20%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 122.38 cycles. At this rate:

10% of peak load performance is reached (10.20 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
6% of peak store performance is reached (3.27 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 4637b8

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
FCMP D29, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.EQ 4630cc <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x920>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X4, X1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 463468 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xcbc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB X21, X4, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X4, X21, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
CMP X4, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LS 465530 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2d84>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X9, X21, #2, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X2, X0, X1,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
DUP V4.2D, V29.D[0]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
UBFM X10, X1, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
UBFM X14, X9, #59, #58	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X15, X14, #32	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X27, X2, X9,LSL #5	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
UBFM X3, X15, #5, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X6, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ANDS X4, X6, #4160	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4633b4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xc08>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X4, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 463394 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xbe8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X4, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 46337c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xbd0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR Q30, [X0, X10]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
ADD X2, X2, #32	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDUR Q7, [X2, #496]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
FNEG V5.2D, V30.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FNEG V16.2D, V7.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FDIV V6.2D, V5.2D, V4.2D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
FDIV V17.2D, V16.2D, V4.2D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
STR Q6, [X0, X10]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STUR Q17, [X2, #496]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
LDP Q18, Q19, [X2]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.67	vect (100.0%)
FNEG V21.2D, V18.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FNEG V22.2D, V19.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FDIV V23.2D, V21.2D, V4.2D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
FDIV V24.2D, V22.2D, V4.2D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
STP Q23, Q24, [X2], #32	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
LDP Q1, Q0, [X2]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.67	vect (100.0%)
FNEG V26.2D, V1.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FNEG V28.2D, V0.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FDIV V31.2D, V26.2D, V4.2D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
FDIV V20.2D, V28.2D, V4.2D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
STP Q31, Q20, [X2], #32	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
CMP X2, X27	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 463428 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xc7c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
AND X8, X21, #8062	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ANDS XZR, X21, #4160	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 463468 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xcbc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X1, X1, X8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X21, X21, X8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PTRUE P1.B, ALL	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	scal (100.0%)
WHILELO P2.D, XZR, X21	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	3	1	N/A
DUP Z4.D, Z29.D[0]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
LD1D {Z6.D}, P2/Z, [X0, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
ADD X9, X0, X1,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
FNEG Z6.D, P1/M, Z6.D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FDIV Z6.D, P2/M, Z6.D, Z4.D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
ST1D {Z6.D}, P2, [X9, MUL VL]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
CNTD X10, ALL	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
WHILELO P3.D, X10, X21	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	3	1	N/A
B.NE 464d34 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2588>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X5, X7	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 4630cc <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x920>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X5, X5, X7	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X27, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X15, [X14, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X27, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LS 465538 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2d8c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X6, X5, #2, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X1, X15, X7,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
DUP V16.2D, V29.D[0]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
UBFM X2, X7, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
UBFM X4, X6, #59, #58	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
SUB X8, X4, #32	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X21, X1, X6,LSL #5	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
UBFM X9, X8, #5, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X10, X9, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ANDS X14, X10, #4160	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
B.EQ 463520 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xd74>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 463500 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xd54>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4634e8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xd3c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR Q17, [X15, X2]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
ADD X1, X1, #32	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDUR Q21, [X1, #496]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
FNEG V18.2D, V17.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FNEG V22.2D, V21.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FDIV V19.2D, V18.2D, V16.2D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
FDIV V23.2D, V22.2D, V16.2D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
STR Q19, [X15, X2]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STUR Q23, [X1, #496]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
LDP Q24, Q1, [X1]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.67	vect (100.0%)
FNEG V0.2D, V24.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FNEG V26.2D, V1.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FDIV V31.2D, V0.2D, V16.2D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
FDIV V28.2D, V26.2D, V16.2D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
STP Q31, Q28, [X1], #32	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
LDP Q20, Q3, [X1]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.67	vect (100.0%)
FNEG V27.2D, V20.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FNEG V5.2D, V3.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FDIV V30.2D, V27.2D, V16.2D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
FDIV V4.2D, V5.2D, V16.2D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
STP Q30, Q4, [X1], #32	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
CMP X21, X1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 463594 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xde8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
AND X3, X5, #8062	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ANDS XZR, X5, #4160	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4630cc <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x920>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X7, X7, X3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X5, X5, X3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
DUP Z29.D, Z29.D[0]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
WHILELO P4.D, XZR, X5	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	3	1	N/A
PTRUE P5.B, ALL	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	scal (100.0%)
LD1D {Z16.D}, P4/Z, [X15, X7,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
ADD X15, X15, X7,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
FNEG Z16.D, P5/M, Z16.D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FDIV Z16.D, P4/M, Z16.D, Z29.D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
ST1D {Z16.D}, P4, [X15, MUL VL]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
CNTD X3, ALL	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
WHILELO P7.D, X3, X5	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	3	1	N/A
B.EQ 4630cc <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x920>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LD1D {Z19.D}, P7/Z, [X15, #1, MUL VL]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
FNEG Z19.D, P5/M, Z19.D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FDIV Z19.D, P7/M, Z19.D, Z29.D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
ST1D {Z19.D}, P7, [X15, #1, MUL VL]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
B 4630cc <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x920>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X23, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X20, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
CBNZ X20, 464380 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1bd4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [X23, #304]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X18, [X19]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
CBNZ X18, 464394 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1be8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP D14, D15, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X29, X30, [SP], #384	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB X22, X15, X8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ANDS X14, X22, #4160	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
B.EQ 4638c0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1114>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 46388c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x10e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 463864 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x10b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [X5, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X27, [X19, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X1, X27	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
CCMP X21, X17, #4, #12	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	1	scal (50.0%)
B.NE 463860 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x10b4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D5, [X6, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D6, D5, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D6, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 464eb0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2704>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X10, X8, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X26, [X5, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X16, [X19, X26,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X1, X16	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
CCMP X21, X26, #4, #12	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	1	scal (50.0%)
B.NE 463888 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x10dc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D7, [X6, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D16, D7, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D16, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 464ca8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x24fc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X10, X10, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X22, [X5, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [X19, X22,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X1, X14	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
CCMP X21, X22, #4, #12	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	1	scal (50.0%)
B.NE 4638b0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1104>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D17, [X6, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D18, D17, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D18, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 4647b8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x200c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X10, X10, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X15, X10	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 463968 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x11bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
LDR X22, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR D27, [X6, X2,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
CMP X22, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 4643b8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1c0c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FCMP D26, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.NE 46485c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x20b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FADD D29, D29, D27	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
B 463280 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xad4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X2, [X6, X21,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X9, [X6, X28]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X9, X2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 4632fc <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xb50>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X27, XZR, X5	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X5, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X2, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X14, [X5, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [X5, #240]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [X5, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X14]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X15, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STP X16, X26, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X26, XZR, X22	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X14, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STP X17, X4, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X4, XZR, X3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR X16, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDP X8, X17, [SP, #336]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
B 464058 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x18ac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X22, XZR, X26	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP X17, X4, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
ORR X5, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP X16, X26, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
B 4632fc <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xb50>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [X23, #304]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X18, [X19]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
CBZ X18, 4637cc <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1020>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X27, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X16, [X27, X14]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [X27, X3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X16, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CMP X17, X16	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 46550c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2d60>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X27, X23, X17,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X10, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CNTD X26, ALL	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
DUP Z31.D, X7	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1	scal (50.0%)
CNTB X22, ALL	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
SUB X16, X16, X17	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
DUP Z3.D, Z28.D[0]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
WHILELO P6.D, XZR, X16	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD X14, X14, X17,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
HINT #0																					N/A
FCMP D26, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.EQ 463980 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x11d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FDIV D31, D27, D26	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1.75-3.50	scal (50.0%)
CMP X8, X15	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 464860 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x20b4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X22, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 464940 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2194>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X10, X10, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
FADD D26, D26, D17	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
CMP X15, X10	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 4638c0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1114>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 463968 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x11bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FDIV D31, D27, D26	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1.75-3.50	scal (50.0%)
LDR X17, [X5, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORN X27, XZR, X8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X26, X27, X15	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND X22, X26, #4160	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X16, [X19, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X1, X16	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 464f9c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x27f0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D7, [X6, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D16, D7, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D16, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 464f8c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x27e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X8, X8, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X15, X8	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 464920 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2174>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X22, 464c44 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2498>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4648f4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2148>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4648d0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2124>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [X5, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [X19, X14,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X1, X17	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 46545c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2cb0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D21, [X6, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D22, D21, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D22, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 46544c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2ca0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X8, X8, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X26, [X5, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X22, [X19, X26,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X1, X22	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 464ed4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2728>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D26, [X6, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D27, D26, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D27, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 464ec4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2718>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X8, X8, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X10, [X5, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [X19, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X1, X14	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 465010 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2864>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D6, [X6, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D7, D6, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D7, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 465000 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2854>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X8, X8, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X15, X8	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 464c44 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2498>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X15, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X15, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 463280 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xad4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X26, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X27, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X22, [X27, X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [X27, X3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X22, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CMP X17, X22	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 463280 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xad4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X10, X22, X17	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ANDS X16, X10, #4224	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
LDR X10, [X14, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B.EQ 4655c0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2e14>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X16, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 464a68 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x22bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X16, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 464a54 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x22a8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X16, #3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 464a2c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2280>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X16, #4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 464a04 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2258>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X16, #5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4649dc <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2230>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X16, #6	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4649b4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2208>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [X23, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X15, [X24, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X7, X15	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 4649b0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2204>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X27, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR D1, [X27, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D0, D1, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D0, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 4654f8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2d4c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X17, X17, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X26, [X23, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X22, [X24, X26,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X7, X22	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 4649d8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x222c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR D3, [X16, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D4, D3, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D4, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 4654d8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2d2c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X17, X17, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X8, [X23, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X15, [X24, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X7, X15	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 464a00 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2254>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X27, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR D6, [X27, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D7, D6, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D7, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 4654c4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2d18>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X17, X17, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X26, [X23, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X22, [X24, X26,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X7, X22	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 464a28 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x227c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR D18, [X16, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D19, D18, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D19, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 4654b0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2d04>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X17, X17, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X8, [X23, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X15, [X24, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X7, X15	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 464a50 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x22a4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X27, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR D22, [X27, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D23, D22, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D23, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 465498 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2cec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X17, X17, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X26, [X23, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X22, [X24, X26,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X7, X22	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 465308 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2b5c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X17, X17, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X8, [X23, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X15, [X24, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X7, X15	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 4652b8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2b0c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X26, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X17, X17, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X17, X26	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 463280 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xad4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X22, XZR, X26	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 463280 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xad4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FADD D26, D26, D7	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
ADD X10, X10, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 46388c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x10e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LD1D {Z7.D}, P3/Z, [X9, #1, MUL VL]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
FNEG Z7.D, P1/M, Z7.D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FDIV Z7.D, P3/M, Z7.D, Z4.D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
ST1D {Z7.D}, P3, [X9, #1, MUL VL]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
B 463468 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xcbc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FADD D26, D15, D5	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
ADD X10, X8, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 463864 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x10b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X16, X22, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR D3, [X0, X16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMADD D4, D31, D26, D3	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
STR D4, [X0, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
CMP X21, X26	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 4648f0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2144>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D30, [X6, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D5, D30, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D5, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 46541c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2c70>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4648f0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2144>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X10, X16, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR D17, [X0, X10]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMADD D18, D31, D7, D17	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
STR D18, [X0, X10]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
CMP X21, X17	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 46488c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x20e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D19, [X6, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D20, D19, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D20, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 4652d0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2b24>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 46488c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x20e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X17, X14, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR D16, [X0, X17]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMADD D17, D31, D6, D16	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
STR D17, [X0, X17]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
CMP X21, X10	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 464914 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2168>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D18, [X6, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D19, D18, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D19, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 465374 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2bc8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 464914 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2168>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR D27, [X6, X2,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
CMP X16, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 4643b8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1c0c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FCMP D15, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.NE 463280 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xad4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FADD D29, D29, D27	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
B 463280 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xad4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X27, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR D4, [X27, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D30, D4, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D30, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 465424 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2c78>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 464a78 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x22cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FMADD D29, D31, D19, D29	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
B 46488c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x20e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR D0, [X16, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D26, D0, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D26, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 465438 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2c8c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 464a64 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x22b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FMADD D29, D31, D18, D29	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
B 464914 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2168>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FMADD D29, D31, D30, D29	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
B 4648f0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2144>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X3, X15, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR D5, [X10, X3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMADD D6, D31, D4, D5	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
STR D6, [X10, X3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
B 464a78 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x22cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X14, X22, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR D27, [X10, X14]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMADD D3, D31, D0, D27	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
STR D3, [X10, X14]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
B 464a64 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x22b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X27, X17, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR D23, [X0, X27]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMADD D24, D31, D21, D23	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
STR D24, [X0, X27]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
CMP X21, X14	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 4648cc <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2120>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D1, [X6, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D0, D1, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D0, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 46548c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2ce0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X8, X8, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 4648d0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2124>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FMADD D29, D31, D1, D29	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
ADD X8, X8, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 4648d0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2124>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X3, X15, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X17, X17, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR D24, [X10, X3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMADD D1, D31, D22, D24	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
STR D1, [X10, X3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
B 464a54 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x22a8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X14, X22, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR D20, [X10, X14]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMADD D21, D31, D18, D20	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
STR D21, [X10, X14]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
B 464a28 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x227c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X3, X15, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR D16, [X10, X3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMADD D17, D31, D6, D16	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
STR D17, [X10, X3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
B 464a00 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2254>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X14, X22, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR D30, [X10, X14]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMADD D5, D31, D3, D30	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
STR D5, [X10, X14]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
B 4649d8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x222c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X3, X15, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR D26, [X10, X3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMADD D27, D31, D1, D26	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
STR D27, [X10, X3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
B 4649b0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2204>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FCMP D26, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.EQ 463980 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x11d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FDIV D31, D27, D26	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1.75-3.50	scal (50.0%)
CMP X8, X15	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
B.LT 464860 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x20b4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 463280 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xad4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X8, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 463434 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xc88>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 4635a0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xdf4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X22, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 464a90 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x22e4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A

Function	hypre_BoomerAMGBuildExtPIInterp._omp_fn.0
Source file and lines	par_lr_interp.c:1196-1756
Module	exec

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Failed to get the number of paths
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

25% of VPU instructions are used in vector version (process two or more data elements in vector registers):

27% of VPU loads are used in vector version.
42% of VPU stores are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU multiply instructions are used in vector version.
0% of VPU fused multiply-add instructions are used in vector version.
84% of VPU divide and square root instructions are used in vector version.
20% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with fassociative-math (included in Ofast or ffast-math) to extend loop vectorization to FP reductions.
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 122.38 to 0.50 cycles (244.76x speedup).

FMA

Detected 15 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 88 FP arithmetical operations:

20: addition or subtraction (15 inside FMA instructions)
33: multiply (15 inside FMA instructions)
35: divide

The binary loop is loading 1248 bytes. The binary loop is storing 400 bytes.

Arithmetic intensity

Arithmetic intensity is 0.05 FP operations per loaded or stored byte.

General properties

nb instructions	528
loop length	2112
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

65.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	60.00	60.00	26.08	26.08	26.00	26.00	25.92	25.92	31.00	31.00	31.00	31.00	51.33	51.33	51.33	2.50	2.50
cycles	60.00	60.00	26.08	26.08	26.00	26.00	25.92	25.92	31.00	31.00	31.00	31.00	51.33	51.33	51.33	2.50	2.50

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

61.20-122.38

Cycles summary

Front-end	65.75
Overall L1	65.75-122.38

Vectorization ratios

INT

all	20%
load	27%
store	42%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	7%

all	33%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	0%
add-sub	0%
fma	0%
div/sqrt	84%
other	41%

INT+FP

all	25%
load	27%
store	42%
mul	0%
add-sub	0%
fma	0%
div/sqrt	84%
other	20%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 122.38 cycles. At this rate:

10% of peak load performance is reached (10.20 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
6% of peak store performance is reached (3.27 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 4637b8

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
FCMP D29, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.EQ 4630cc <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x920>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X4, X1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 463468 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xcbc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB X21, X4, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X4, X21, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
CMP X4, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LS 465530 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2d84>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X9, X21, #2, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X2, X0, X1,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
DUP V4.2D, V29.D[0]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
UBFM X10, X1, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
UBFM X14, X9, #59, #58	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X15, X14, #32	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X27, X2, X9,LSL #5	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
UBFM X3, X15, #5, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X6, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ANDS X4, X6, #4160	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4633b4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xc08>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X4, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 463394 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xbe8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X4, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 46337c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xbd0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR Q30, [X0, X10]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
ADD X2, X2, #32	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDUR Q7, [X2, #496]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
FNEG V5.2D, V30.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FNEG V16.2D, V7.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FDIV V6.2D, V5.2D, V4.2D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
FDIV V17.2D, V16.2D, V4.2D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
STR Q6, [X0, X10]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STUR Q17, [X2, #496]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
LDP Q18, Q19, [X2]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.67	vect (100.0%)
FNEG V21.2D, V18.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FNEG V22.2D, V19.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FDIV V23.2D, V21.2D, V4.2D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
FDIV V24.2D, V22.2D, V4.2D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
STP Q23, Q24, [X2], #32	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
LDP Q1, Q0, [X2]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.67	vect (100.0%)
FNEG V26.2D, V1.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FNEG V28.2D, V0.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FDIV V31.2D, V26.2D, V4.2D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
FDIV V20.2D, V28.2D, V4.2D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
STP Q31, Q20, [X2], #32	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
CMP X2, X27	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 463428 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xc7c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
AND X8, X21, #8062	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ANDS XZR, X21, #4160	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 463468 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xcbc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X1, X1, X8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X21, X21, X8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PTRUE P1.B, ALL	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	scal (100.0%)
WHILELO P2.D, XZR, X21	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	3	1	N/A
DUP Z4.D, Z29.D[0]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
LD1D {Z6.D}, P2/Z, [X0, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
ADD X9, X0, X1,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
FNEG Z6.D, P1/M, Z6.D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FDIV Z6.D, P2/M, Z6.D, Z4.D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
ST1D {Z6.D}, P2, [X9, MUL VL]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
CNTD X10, ALL	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
WHILELO P3.D, X10, X21	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	3	1	N/A
B.NE 464d34 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2588>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X5, X7	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 4630cc <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x920>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X5, X5, X7	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X27, X5, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X15, [X14, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X27, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LS 465538 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2d8c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X6, X5, #2, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X1, X15, X7,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
DUP V16.2D, V29.D[0]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
UBFM X2, X7, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
UBFM X4, X6, #59, #58	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
SUB X8, X4, #32	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X21, X1, X6,LSL #5	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
UBFM X9, X8, #5, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X10, X9, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ANDS X14, X10, #4160	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
B.EQ 463520 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xd74>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 463500 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xd54>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4634e8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xd3c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR Q17, [X15, X2]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
ADD X1, X1, #32	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDUR Q21, [X1, #496]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
FNEG V18.2D, V17.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FNEG V22.2D, V21.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FDIV V19.2D, V18.2D, V16.2D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
FDIV V23.2D, V22.2D, V16.2D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
STR Q19, [X15, X2]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STUR Q23, [X1, #496]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
LDP Q24, Q1, [X1]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.67	vect (100.0%)
FNEG V0.2D, V24.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FNEG V26.2D, V1.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FDIV V31.2D, V0.2D, V16.2D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
FDIV V28.2D, V26.2D, V16.2D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
STP Q31, Q28, [X1], #32	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
LDP Q20, Q3, [X1]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.67	vect (100.0%)
FNEG V27.2D, V20.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FNEG V5.2D, V3.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FDIV V30.2D, V27.2D, V16.2D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
FDIV V4.2D, V5.2D, V16.2D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
STP Q30, Q4, [X1], #32	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
CMP X21, X1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 463594 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xde8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
AND X3, X5, #8062	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ANDS XZR, X5, #4160	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4630cc <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x920>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X7, X7, X3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X5, X5, X3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
DUP Z29.D, Z29.D[0]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
WHILELO P4.D, XZR, X5	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	3	1	N/A
PTRUE P5.B, ALL	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	scal (100.0%)
LD1D {Z16.D}, P4/Z, [X15, X7,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
ADD X15, X15, X7,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
FNEG Z16.D, P5/M, Z16.D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FDIV Z16.D, P4/M, Z16.D, Z29.D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
ST1D {Z16.D}, P4, [X15, MUL VL]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
CNTD X3, ALL	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
WHILELO P7.D, X3, X5	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	3	1	N/A
B.EQ 4630cc <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x920>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LD1D {Z19.D}, P7/Z, [X15, #1, MUL VL]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
FNEG Z19.D, P5/M, Z19.D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FDIV Z19.D, P7/M, Z19.D, Z29.D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
ST1D {Z19.D}, P7, [X15, #1, MUL VL]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
B 4630cc <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x920>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X23, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X20, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
CBNZ X20, 464380 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1bd4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [X23, #304]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X18, [X19]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
CBNZ X18, 464394 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1be8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP D14, D15, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X29, X30, [SP], #384	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB X22, X15, X8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ANDS X14, X22, #4160	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
B.EQ 4638c0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1114>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 46388c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x10e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 463864 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x10b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [X5, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X27, [X19, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X1, X27	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
CCMP X21, X17, #4, #12	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	1	scal (50.0%)
B.NE 463860 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x10b4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D5, [X6, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D6, D5, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D6, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 464eb0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2704>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X10, X8, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X26, [X5, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X16, [X19, X26,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X1, X16	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
CCMP X21, X26, #4, #12	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	1	scal (50.0%)
B.NE 463888 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x10dc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D7, [X6, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D16, D7, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D16, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 464ca8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x24fc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X10, X10, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X22, [X5, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [X19, X22,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X1, X14	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
CCMP X21, X22, #4, #12	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	1	scal (50.0%)
B.NE 4638b0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1104>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D17, [X6, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D18, D17, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D18, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 4647b8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x200c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X10, X10, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X15, X10	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 463968 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x11bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
LDR X22, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR D27, [X6, X2,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
CMP X22, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 4643b8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1c0c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FCMP D26, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.NE 46485c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x20b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FADD D29, D29, D27	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
B 463280 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xad4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X2, [X6, X21,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X9, [X6, X28]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X9, X2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 4632fc <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xb50>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X27, XZR, X5	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X5, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X2, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X14, [X5, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [X5, #240]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [X5, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X14]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X15, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STP X16, X26, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X26, XZR, X22	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X14, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STP X17, X4, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X4, XZR, X3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR X16, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDP X8, X17, [SP, #336]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
B 464058 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x18ac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X22, XZR, X26	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP X17, X4, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
ORR X5, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP X16, X26, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
B 4632fc <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xb50>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [X23, #304]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X18, [X19]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
CBZ X18, 4637cc <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1020>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X27, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X16, [X27, X14]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [X27, X3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X16, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CMP X17, X16	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 46550c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2d60>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X27, X23, X17,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X10, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CNTD X26, ALL	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
DUP Z31.D, X7	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1	scal (50.0%)
CNTB X22, ALL	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
SUB X16, X16, X17	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
DUP Z3.D, Z28.D[0]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
WHILELO P6.D, XZR, X16	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD X14, X14, X17,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
HINT #0																					N/A
FCMP D26, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.EQ 463980 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x11d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FDIV D31, D27, D26	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1.75-3.50	scal (50.0%)
CMP X8, X15	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 464860 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x20b4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X22, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 464940 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2194>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X10, X10, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
FADD D26, D26, D17	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
CMP X15, X10	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 4638c0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1114>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 463968 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x11bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FDIV D31, D27, D26	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1.75-3.50	scal (50.0%)
LDR X17, [X5, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORN X27, XZR, X8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X26, X27, X15	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND X22, X26, #4160	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X16, [X19, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X1, X16	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 464f9c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x27f0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D7, [X6, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D16, D7, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D16, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 464f8c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x27e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X8, X8, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X15, X8	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 464920 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2174>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X22, 464c44 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2498>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4648f4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2148>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4648d0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2124>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [X5, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [X19, X14,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X1, X17	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 46545c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2cb0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D21, [X6, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D22, D21, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D22, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 46544c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2ca0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X8, X8, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X26, [X5, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X22, [X19, X26,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X1, X22	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 464ed4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2728>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D26, [X6, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D27, D26, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D27, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 464ec4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2718>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X8, X8, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X10, [X5, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [X19, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X1, X14	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 465010 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2864>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D6, [X6, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D7, D6, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D7, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 465000 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2854>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X8, X8, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X15, X8	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 464c44 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2498>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X15, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X15, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 463280 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xad4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X26, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X27, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X22, [X27, X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [X27, X3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X22, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CMP X17, X22	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 463280 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xad4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X10, X22, X17	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ANDS X16, X10, #4224	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
LDR X10, [X14, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B.EQ 4655c0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2e14>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X16, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 464a68 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x22bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X16, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 464a54 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x22a8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X16, #3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 464a2c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2280>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X16, #4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 464a04 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2258>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X16, #5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4649dc <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2230>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X16, #6	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4649b4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2208>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [X23, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X15, [X24, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X7, X15	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 4649b0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2204>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X27, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR D1, [X27, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D0, D1, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D0, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 4654f8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2d4c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X17, X17, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X26, [X23, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X22, [X24, X26,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X7, X22	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 4649d8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x222c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR D3, [X16, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D4, D3, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D4, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 4654d8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2d2c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X17, X17, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X8, [X23, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X15, [X24, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X7, X15	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 464a00 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2254>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X27, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR D6, [X27, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D7, D6, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D7, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 4654c4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2d18>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X17, X17, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X26, [X23, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X22, [X24, X26,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X7, X22	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 464a28 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x227c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR D18, [X16, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D19, D18, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D19, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 4654b0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2d04>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X17, X17, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X8, [X23, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X15, [X24, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X7, X15	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 464a50 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x22a4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X27, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR D22, [X27, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D23, D22, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D23, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 465498 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2cec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X17, X17, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X26, [X23, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X22, [X24, X26,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X7, X22	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 465308 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2b5c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X17, X17, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X8, [X23, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X15, [X24, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X7, X15	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 4652b8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2b0c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X26, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X17, X17, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X17, X26	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 463280 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xad4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X22, XZR, X26	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 463280 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xad4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FADD D26, D26, D7	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
ADD X10, X10, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 46388c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x10e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LD1D {Z7.D}, P3/Z, [X9, #1, MUL VL]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
FNEG Z7.D, P1/M, Z7.D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FDIV Z7.D, P3/M, Z7.D, Z4.D	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	3.50-6.99	vect (100.0%)
ST1D {Z7.D}, P3, [X9, #1, MUL VL]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
B 463468 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xcbc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FADD D26, D15, D5	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
ADD X10, X8, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 463864 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x10b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X16, X22, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR D3, [X0, X16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMADD D4, D31, D26, D3	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
STR D4, [X0, X16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
CMP X21, X26	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 4648f0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2144>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D30, [X6, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D5, D30, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D5, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 46541c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2c70>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4648f0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2144>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X10, X16, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR D17, [X0, X10]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMADD D18, D31, D7, D17	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
STR D18, [X0, X10]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
CMP X21, X17	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 46488c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x20e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D19, [X6, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D20, D19, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D20, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 4652d0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2b24>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 46488c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x20e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X17, X14, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR D16, [X0, X17]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMADD D17, D31, D6, D16	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
STR D17, [X0, X17]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
CMP X21, X10	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 464914 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2168>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D18, [X6, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D19, D18, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D19, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 465374 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2bc8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 464914 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2168>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR D27, [X6, X2,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
CMP X16, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 4643b8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1c0c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FCMP D15, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.NE 463280 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xad4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FADD D29, D29, D27	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
B 463280 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xad4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X27, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR D4, [X27, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D30, D4, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D30, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 465424 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2c78>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 464a78 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x22cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FMADD D29, D31, D19, D29	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
B 46488c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x20e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR D0, [X16, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D26, D0, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D26, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 465438 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2c8c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 464a64 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x22b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FMADD D29, D31, D18, D29	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
B 464914 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2168>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FMADD D29, D31, D30, D29	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
B 4648f0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2144>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X3, X15, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR D5, [X10, X3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMADD D6, D31, D4, D5	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
STR D6, [X10, X3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
B 464a78 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x22cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X14, X22, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR D27, [X10, X14]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMADD D3, D31, D0, D27	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
STR D3, [X10, X14]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
B 464a64 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x22b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X27, X17, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR D23, [X0, X27]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMADD D24, D31, D21, D23	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
STR D24, [X0, X27]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
CMP X21, X14	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 4648cc <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2120>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D1, [X6, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMUL D0, D1, D28	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (50.0%)
FCMPE D0, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.MI 46548c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2ce0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X8, X8, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 4648d0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2124>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FMADD D29, D31, D1, D29	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
ADD X8, X8, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 4648d0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2124>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X3, X15, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X17, X17, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR D24, [X10, X3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMADD D1, D31, D22, D24	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
STR D1, [X10, X3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
B 464a54 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x22a8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X14, X22, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR D20, [X10, X14]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMADD D21, D31, D18, D20	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
STR D21, [X10, X14]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
B 464a28 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x227c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X3, X15, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR D16, [X10, X3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMADD D17, D31, D6, D16	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
STR D17, [X10, X3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
B 464a00 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2254>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X14, X22, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR D30, [X10, X14]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMADD D5, D31, D3, D30	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
STR D5, [X10, X14]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
B 4649d8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x222c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X3, X15, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR D26, [X10, X3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FMADD D27, D31, D1, D26	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25	scal (50.0%)
STR D27, [X10, X3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
B 4649b0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2204>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FCMP D26, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
B.EQ 463980 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x11d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FDIV D31, D27, D26	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1.75-3.50	scal (50.0%)
CMP X8, X15	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
B.LT 464860 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x20b4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 463280 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xad4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X8, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 463434 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xc88>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 4635a0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xdf4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X22, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 464a90 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x22e4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

FMA

Workaround

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

FMA

Workaround

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code