OV - exec - Loop 178

	Loop Id: 178	Module: exec	Source: par_coarsen.c:2332-2334	Coverage: 0.06%

0x4284dc LDR	X12, [X0]    [8]

0x4284e0 UBFM	X13, X12, #61, #60

0x4284e4 LDR	D6, [X9, X13]    [27]

0x4284e8 FCMPE	D6, D31

0x4284ec B.GT	428658

0x4284f0 LDR	X14, [X0, #8]    [10]

0x4284f4 ADD	X0, X0, #8

0x4284f8 UBFM	X15, X14, #61, #60

0x4284fc LDR	D5, [X9, X15]    [29]

0x428500 FCMPE	D5, D31

0x428504 B.GT	42863c

0x428508 LDR	X16, [X0, #8]    [12]

0x42850c UBFM	X17, X16, #61, #60

0x428510 LDR	D4, [X9, X17]    [31]

0x428514 FCMPE	D4, D31

0x428518 B.GT	428620

0x42851c LDR	X18, [X0, #16]    [14]

0x428520 UBFM	X30, X18, #61, #60

0x428524 LDR	D3, [X9, X30]    [33]

0x428528 FCMPE	D3, D31

0x42852c B.GT	428604

0x428530 LDR	X20, [X0, #24]    [16]

0x428534 UBFM	X21, X20, #61, #60

0x428538 LDR	D2, [X9, X21]    [1]

0x42853c FCMPE	D2, D31

0x428540 B.GT	4285e8

0x428544 LDR	X19, [X0, #32]    [18]

0x428548 UBFM	X1, X19, #61, #60

0x42854c LDR	D1, [X9, X1]    [3]

0x428550 FCMPE	D1, D31

0x428554 B.GT	4285cc

0x428558 LDR	X3, [X0, #40]    [22]

0x42855c UBFM	X2, X3, #61, #60

0x428560 LDR	D0, [X9, X2]    [5]

0x428564 FCMPE	D0, D31

0x428568 B.GT	4285b0

0x42856c LDR	X7, [X0, #48]    [25]

0x428570 UBFM	X8, X7, #61, #60

0x428574 LDR	D30, [X9, X8]    [7]

0x428578 FCMPE	D30, D31

0x42857c B.GT	42859c

0x428580 ADD	X0, X0, #56

0x428584 CMP	X10, X0

0x428588 B.NE	4284dc

0x4285b0 STR	X5, [X4, X2]    [37]

0x4285b4 LDR	X7, [X0, #48]    [24]

0x4285b8 UBFM	X8, X7, #61, #60

0x4285bc LDR	D30, [X9, X8]    [6]

0x4285c0 FCMPE	D30, D31

0x4285c4 B.GT	42859c

0x4285c8 B	428580

0x4285cc STR	X5, [X4, X1]    [36]

0x4285d0 LDR	X3, [X0, #40]    [21]

0x4285d4 UBFM	X2, X3, #61, #60

0x4285d8 LDR	D0, [X9, X2]    [4]

0x4285dc FCMPE	D0, D31

0x4285e0 B.GT	4285b0

0x4285e4 B	42856c

0x4285e8 STR	X5, [X4, X21]    [35]

0x4285ec LDR	X19, [X0, #32]    [17]

0x4285f0 UBFM	X1, X19, #61, #60

0x4285f4 LDR	D1, [X9, X1]    [2]

0x4285f8 FCMPE	D1, D31

0x4285fc B.GT	4285cc

0x428600 B	428558

0x428604 STR	X5, [X4, X30]    [26]

0x428608 LDR	X20, [X0, #24]    [15]

0x42860c UBFM	X21, X20, #61, #60

0x428610 LDR	D2, [X9, X21]    [34]

0x428614 FCMPE	D2, D31

0x428618 B.GT	4285e8

0x42861c B	428544

0x428620 STR	X5, [X4, X17]    [23]

0x428624 LDR	X18, [X0, #16]    [13]

0x428628 UBFM	X30, X18, #61, #60

0x42862c LDR	D3, [X9, X30]    [32]

0x428630 FCMPE	D3, D31

0x428634 B.GT	428604

0x428638 B	428530

0x42863c STR	X5, [X4, X15]    [20]

0x428640 LDR	X16, [X0, #8]    [11]

0x428644 UBFM	X17, X16, #61, #60

0x428648 LDR	D4, [X9, X17]    [30]

0x42864c FCMPE	D4, D31

0x428650 B.GT	428620

0x428654 B	42851c

0x428658 STR	X5, [X4, X13]    [19]

0x42865c ADD	X0, X0, #8

0x428660 LDR	X14, [X0]    [9]

0x428664 UBFM	X15, X14, #61, #60

0x428668 LDR	D5, [X9, X15]    [28]

0x42866c FCMPE	D5, D31

0x428670 B.GT	42863c

0x428674 B	428508

/home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/build/AMG/AMG/parcsr_ls/par_coarsen.c: 2332 - 2334

--------------------------------------------------------------------------------

2332:            if (measure_array[i] > 1)

2333:            {

2334:               CF_marker[i] = 1;

Coverage (%)	Name	Source Location	Module
►100.00+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Metric	Value
CQA speedup if no scalar integer	3.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	2.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.20
Bottlenecks	P8,
Function	hypre_BoomerAMGCoarsenPMIS._omp_fn.4
Source	par_coarsen.c:2332-2334
Source loop unroll info	not unrolled or unrolled with no peel/tail loop
Source loop unroll confidence level	max
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	15.00
CQA cycles if no scalar integer	5.00
CQA cycles if FP arith vectorized	15.00
CQA cycles if fully vectorized	7.50
Front-end cycles	11.75
P0 cycles	11.50
P1 cycles	11.50
P2 cycles	3.25
P3 cycles	3.25
P4 cycles	3.17
P5 cycles	3.17
P6 cycles	3.08
P7 cycles	3.08
P8 cycles	15.00
P9 cycles	0.00
P10 cycles	0.00
P11 cycles	0.00
P12 cycles	12.50
P13 cycles	12.17
P14 cycles	12.33
P15 cycles	3.50
P16 cycles	3.50
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	94.00
Nb uops	94.00
Nb loads	NA
Nb stores	7.00
Nb stack references	0.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	19.73
Bytes prefetched	0.00
Bytes loaded	240.00
Bytes stored	56.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	50.00
Vector-efficiency ratio load	50.00
Vector-efficiency ratio store	50.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	50.00

Metric	Value
CQA speedup if no scalar integer	3.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	2.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.20
Bottlenecks	P8,
Function	hypre_BoomerAMGCoarsenPMIS._omp_fn.4
Source	par_coarsen.c:2332-2334
Source loop unroll info	not unrolled or unrolled with no peel/tail loop
Source loop unroll confidence level	max
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	15.00
CQA cycles if no scalar integer	5.00
CQA cycles if FP arith vectorized	15.00
CQA cycles if fully vectorized	7.50
Front-end cycles	11.75
P0 cycles	11.50
P1 cycles	11.50
P2 cycles	3.25
P3 cycles	3.25
P4 cycles	3.17
P5 cycles	3.17
P6 cycles	3.08
P7 cycles	3.08
P8 cycles	15.00
P9 cycles	0.00
P10 cycles	0.00
P11 cycles	0.00
P12 cycles	12.50
P13 cycles	12.17
P14 cycles	12.33
P15 cycles	3.50
P16 cycles	3.50
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	94.00
Nb uops	94.00
Nb loads	NA
Nb stores	7.00
Nb stack references	0.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	19.73
Bytes prefetched	0.00
Bytes loaded	240.00
Bytes stored	56.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	50.00
Vector-efficiency ratio load	50.00
Vector-efficiency ratio store	50.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	50.00

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	hypre_BoomerAMGCoarsenPMIS._omp_fn.4
Source file and lines	par_coarsen.c:2332-2334
Module	exec

The loop is defined in /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/build/AMG/AMG/parcsr_ls/par_coarsen.c:2332-2334.

The related source loop is not unrolled or unrolled with no peel/tail loop.
Warnings:

Ignoring paths for analysis
Failed to get the number of paths
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 15.00 to 5.00 cycles (3.00x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your loop is not vectorized. 2 data elements could be processed at once in vector registers. By vectorizing your loop, you can lower the cost of an iteration from 15.00 to 7.50 cycles (2.00x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with fassociative-math (included in Ofast or ffast-math) to extend loop vectorization to FP reductions.
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 240 bytes. The binary loop is storing 56 bytes.

General properties

nb instructions	94
loop length	376
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

11.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	11.50	11.50	3.25	3.25	3.17	3.17	3.08	3.08	15.00	0.00	0.00	0.00	12.50	12.17	12.33	3.50	3.50
cycles	11.50	11.50	3.25	3.25	3.17	3.17	3.08	3.08	15.00	0.00	0.00	0.00	12.50	12.17	12.33	3.50	3.50

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	11.75
Overall L1	15.00

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 15.00 cycles. At this rate:

16% of peak load performance is reached (16.00 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
7% of peak store performance is reached (3.73 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 4284dc

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
LDR X12, [X0]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
UBFM X13, X12, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR D6, [X9, X13]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMPE D6, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GT 428658 <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x2d8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [X0, #8]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
UBFM X15, X14, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR D5, [X9, X15]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMPE D5, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GT 42863c <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x2bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [X0, #8]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
UBFM X17, X16, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR D4, [X9, X17]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMPE D4, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GT 428620 <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x2a0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X18, [X0, #16]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
UBFM X30, X18, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR D3, [X9, X30]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMPE D3, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GT 428604 <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x284>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X20, [X0, #24]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
UBFM X21, X20, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR D2, [X9, X21]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMPE D2, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GT 4285e8 <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x268>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
UBFM X1, X19, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR D1, [X9, X1]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMPE D1, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GT 4285cc <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x24c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X0, #40]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
UBFM X2, X3, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR D0, [X9, X2]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMPE D0, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GT 4285b0 <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x230>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X7, [X0, #48]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
UBFM X8, X7, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR D30, [X9, X8]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMPE D30, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GT 42859c <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x21c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X0, X0, #56	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP X10, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 4284dc <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x15c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X5, [X4, X2]	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X7, [X0, #48]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
UBFM X8, X7, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR D30, [X9, X8]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMPE D30, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GT 42859c <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x21c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 428580 <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x200>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X5, [X4, X1]	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X0, #40]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
UBFM X2, X3, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR D0, [X9, X2]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMPE D0, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GT 4285b0 <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x230>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 42856c <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x1ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X5, [X4, X21]	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X19, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
UBFM X1, X19, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR D1, [X9, X1]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMPE D1, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GT 4285cc <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x24c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 428558 <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x1d8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X5, [X4, X30]	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X20, [X0, #24]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
UBFM X21, X20, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR D2, [X9, X21]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMPE D2, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GT 4285e8 <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x268>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 428544 <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x1c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X5, [X4, X17]	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [X0, #16]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
UBFM X30, X18, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR D3, [X9, X30]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMPE D3, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GT 428604 <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x284>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 428530 <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x1b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X5, [X4, X15]	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X16, [X0, #8]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
UBFM X17, X16, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR D4, [X9, X17]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMPE D4, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GT 428620 <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x2a0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 42851c <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x19c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X5, [X4, X13]	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR X14, [X0]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
UBFM X15, X14, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR D5, [X9, X15]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMPE D5, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GT 42863c <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x2bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 428508 <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x188>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A

Function	hypre_BoomerAMGCoarsenPMIS._omp_fn.4
Source file and lines	par_coarsen.c:2332-2334
Module	exec

Ignoring paths for analysis
Failed to get the number of paths
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 15.00 to 5.00 cycles (3.00x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with fassociative-math (included in Ofast or ffast-math) to extend loop vectorization to FP reductions.
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 240 bytes. The binary loop is storing 56 bytes.

General properties

nb instructions	94
loop length	376
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

11.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	11.50	11.50	3.25	3.25	3.17	3.17	3.08	3.08	15.00	0.00	0.00	0.00	12.50	12.17	12.33	3.50	3.50
cycles	11.50	11.50	3.25	3.25	3.17	3.17	3.08	3.08	15.00	0.00	0.00	0.00	12.50	12.17	12.33	3.50	3.50

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	11.75
Overall L1	15.00

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 15.00 cycles. At this rate:

16% of peak load performance is reached (16.00 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
7% of peak store performance is reached (3.73 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 4284dc

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
LDR X12, [X0]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
UBFM X13, X12, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR D6, [X9, X13]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMPE D6, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GT 428658 <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x2d8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [X0, #8]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
UBFM X15, X14, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR D5, [X9, X15]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMPE D5, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GT 42863c <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x2bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [X0, #8]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
UBFM X17, X16, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR D4, [X9, X17]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMPE D4, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GT 428620 <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x2a0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X18, [X0, #16]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
UBFM X30, X18, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR D3, [X9, X30]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMPE D3, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GT 428604 <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x284>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X20, [X0, #24]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
UBFM X21, X20, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR D2, [X9, X21]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMPE D2, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GT 4285e8 <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x268>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
UBFM X1, X19, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR D1, [X9, X1]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMPE D1, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GT 4285cc <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x24c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X0, #40]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
UBFM X2, X3, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR D0, [X9, X2]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMPE D0, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GT 4285b0 <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x230>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X7, [X0, #48]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
UBFM X8, X7, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR D30, [X9, X8]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMPE D30, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GT 42859c <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x21c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X0, X0, #56	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
CMP X10, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 4284dc <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x15c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X5, [X4, X2]	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X7, [X0, #48]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
UBFM X8, X7, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR D30, [X9, X8]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMPE D30, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GT 42859c <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x21c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 428580 <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x200>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X5, [X4, X1]	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [X0, #40]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
UBFM X2, X3, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR D0, [X9, X2]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMPE D0, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GT 4285b0 <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x230>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 42856c <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x1ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X5, [X4, X21]	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X19, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
UBFM X1, X19, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR D1, [X9, X1]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMPE D1, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GT 4285cc <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x24c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 428558 <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x1d8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X5, [X4, X30]	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X20, [X0, #24]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
UBFM X21, X20, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR D2, [X9, X21]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMPE D2, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GT 4285e8 <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x268>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 428544 <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x1c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X5, [X4, X17]	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [X0, #16]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
UBFM X30, X18, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR D3, [X9, X30]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMPE D3, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GT 428604 <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x284>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 428530 <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x1b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X5, [X4, X15]	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X16, [X0, #8]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
UBFM X17, X16, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR D4, [X9, X17]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMPE D4, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GT 428620 <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x2a0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 42851c <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x19c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X5, [X4, X13]	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR X14, [X0]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
UBFM X15, X14, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LDR D5, [X9, X15]	1	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FCMPE D5, D31	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
B.GT 42863c <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x2bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 428508 <hypre_BoomerAMGCoarsenPMIS._omp_fn.4+0x188>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code