OV - exec - Function hypre_BoomerAMGBuildMultipass

	Function: hypre_BoomerAMGBuildMultipass	Module: exec	Source: par_multi_interp.c:41-2061 [...]	Coverage (incl. loops): 0.30% \| (excl. loops): 0.00%

/home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 41 - 2061

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41: {

42: #ifdef HYPRE_PROFILE

43:    hypre_profile_times[HYPRE_TIMER_ID_MULTIPASS_INTERP] -= hypre_MPI_Wtime();

44: #endif

45:

46:    MPI_Comm	           comm = hypre_ParCSRMatrixComm(A);

47:    hypre_ParCSRCommPkg    *comm_pkg = hypre_ParCSRMatrixCommPkg(S);

48:    hypre_ParCSRCommHandle *comm_handle;

49:    hypre_ParCSRCommPkg    *tmp_comm_pkg;

50:

51:    hypre_CSRMatrix *A_diag = hypre_ParCSRMatrixDiag(A);

52:    HYPRE_Real      *A_diag_data = hypre_CSRMatrixData(A_diag);

53:    HYPRE_Int             *A_diag_i = hypre_CSRMatrixI(A_diag);

54:    HYPRE_Int             *A_diag_j = hypre_CSRMatrixJ(A_diag);

55:

56:    hypre_CSRMatrix *A_offd = hypre_ParCSRMatrixOffd(A);

57:    HYPRE_Real      *A_offd_data = NULL;

58:    HYPRE_Int             *A_offd_i = hypre_CSRMatrixI(A_offd);

59:    HYPRE_Int             *A_offd_j = NULL;

60:    HYPRE_Int		   *col_map_offd_A = hypre_ParCSRMatrixColMapOffd(A);

61:    HYPRE_Int		    num_cols_offd_A = hypre_CSRMatrixNumCols(A_offd);

62:

63:    hypre_CSRMatrix *S_diag = hypre_ParCSRMatrixDiag(S);

64:    HYPRE_Int             *S_diag_i = hypre_CSRMatrixI(S_diag);

65:    HYPRE_Int             *S_diag_j = hypre_CSRMatrixJ(S_diag);

66:

67:    hypre_CSRMatrix *S_offd = hypre_ParCSRMatrixOffd(S);

68:    HYPRE_Int             *S_offd_i = hypre_CSRMatrixI(S_offd);

69:    HYPRE_Int             *S_offd_j = NULL;

70:    HYPRE_Int		   *col_map_offd_S = hypre_ParCSRMatrixColMapOffd(S);

71:    HYPRE_Int		    num_cols_offd_S = hypre_CSRMatrixNumCols(S_offd);

[...]

83:    HYPRE_Real      *P_offd_data = NULL;

84:    HYPRE_Int             *P_offd_i; /*at first counter of nonzero cols for each row,

85: 				finally will be pointer to start of row */

86:    HYPRE_Int             *P_offd_j = NULL;

87:

88:    HYPRE_Int              num_sends = 0;

89:    HYPRE_Int             *int_buf_data = NULL;

90:    HYPRE_Int             *send_map_start;

91:    HYPRE_Int             *send_map_elmt;

92:    HYPRE_Int             *send_procs;

93:    HYPRE_Int              num_recvs = 0;

94:    HYPRE_Int             *recv_vec_start;

95:    HYPRE_Int             *recv_procs;

96:    HYPRE_Int             *new_recv_vec_start = NULL;

97:    HYPRE_Int            **Pext_send_map_start = NULL;

98:    HYPRE_Int            **Pext_recv_vec_start = NULL;

99:    HYPRE_Int             *Pext_start = NULL;

100:    HYPRE_Int             *P_ncols = NULL;

101:

102:    HYPRE_Int             *CF_marker_offd = NULL;

103:    HYPRE_Int             *dof_func_offd = NULL;

104:    HYPRE_Int             *P_marker;

105:    HYPRE_Int             *P_marker_offd = NULL;

106:    HYPRE_Int             *C_array;

107:    HYPRE_Int             *C_array_offd = NULL;

108:    HYPRE_Int             *pass_array = NULL; /* contains points ordered according to pass */

[...]

114:    HYPRE_Int            **P_offd_pass = NULL;

115:    HYPRE_Int            **Pext_pass = NULL;

116:    HYPRE_Int            **new_elmts = NULL; /* new neighbors generated in each pass */

117:    HYPRE_Int             *new_counter = NULL; /* contains no. of new neighbors for

118: 					each pass */

119:    HYPRE_Int             *loc = NULL; /* contains locations for new neighbor

120: 			connections in int_o_buffer to avoid searching */

121:    HYPRE_Int             *Pext_i = NULL; /*contains P_diag_i and P_offd_i info for nonzero

122: 				cols of off proc neighbors */

123:    HYPRE_Int             *Pext_send_buffer = NULL; /* used to collect global nonzero

124: 				col ids in P_diag for send_map_elmts */

125:

126:    HYPRE_Int             *map_S_to_new = NULL;

127:    /*HYPRE_Int             *map_A_to_new = NULL;*/

128:    HYPRE_Int             *map_A_to_S = NULL;

129:    HYPRE_Int             *new_col_map_offd = NULL;

130:    HYPRE_Int             *col_map_offd_P = NULL;

131:    HYPRE_Int             *permute = NULL;

[...]

146:    HYPRE_Int             *fine_to_coarse = NULL;

147:    HYPRE_Int             *fine_to_coarse_offd = NULL;

148:

149:    HYPRE_Int             *assigned = NULL;

150:    HYPRE_Int             *assigned_offd = NULL;

[...]

185:    HYPRE_Int              local_index = -1;

186:    HYPRE_Int              new_num_cols_offd = 0;

[...]

194:    HYPRE_Int * max_num_threads = hypre_CTAlloc(HYPRE_Int, 1);

[...]

202:    max_num_threads[0] = hypre_NumThreads();

203:    cnt_nz_per_thread = hypre_CTAlloc(HYPRE_Int, max_num_threads[0]);

204:    cnt_nz_offd_per_thread = hypre_CTAlloc(HYPRE_Int, max_num_threads[0]);

205:    for(i=0; i < max_num_threads[0]; i++)

206:    {

207:        cnt_nz_offd_per_thread[i] = 0;

208:        cnt_nz_per_thread[i] = 0;

[...]

216:    hypre_MPI_Comm_size(comm,&num_procs);

217:    hypre_MPI_Comm_rank(comm,&my_id);

218:

219: #ifdef HYPRE_NO_GLOBAL_PARTITION

220:    my_first_cpt = num_cpts_global[0];

221:    /*   total_global_cpts = 0; */

222:     if (my_id == (num_procs -1)) total_global_cpts = num_cpts_global[1];

223:     hypre_MPI_Bcast(&total_global_cpts, 1, HYPRE_MPI_INT, num_procs-1, comm);

[...]

229:    if (!comm_pkg)

230:    {

231:       comm_pkg = hypre_ParCSRMatrixCommPkg(A);

232:       if (!comm_pkg)

233:       {

234:           hypre_MatvecCommPkgCreate(A);

235:

236:           comm_pkg = hypre_ParCSRMatrixCommPkg(A);

237:       }

238:       col_offd_S_to_A = NULL;

239:    }

240:

241:    if (col_offd_S_to_A)

[...]

252:    if (num_cols_offd_A)

253:    {

254:       A_offd_data = hypre_CSRMatrixData(A_offd);

255:       A_offd_j    = hypre_CSRMatrixJ(A_offd);

256:    }

257:

258:    if (num_cols_offd)

259:       S_offd_j    = hypre_CSRMatrixJ(S_offd);

260:

261:    n_fine = hypre_CSRMatrixNumRows(A_diag);

[...]

267:    if (n_fine) fine_to_coarse = hypre_CTAlloc(HYPRE_Int, n_fine);

268:

269:    n_coarse = 0;

270:    n_SF = 0;

271: #ifdef HYPRE_USING_OPENMP

272: #pragma omp parallel for private(i) reduction(+:n_coarse,n_SF ) HYPRE_SMP_SCHEDULE

[...]

278:    pass_array_size = n_fine-n_coarse-n_SF;

279:    if (pass_array_size) pass_array = hypre_CTAlloc(HYPRE_Int, pass_array_size);

280:    pass_pointer = hypre_CTAlloc(HYPRE_Int, max_num_passes+1);

281:    if (n_fine) assigned = hypre_CTAlloc(HYPRE_Int, n_fine);

282:    P_diag_i = hypre_CTAlloc(HYPRE_Int, n_fine+1);

283:    P_offd_i = hypre_CTAlloc(HYPRE_Int, n_fine+1);

284:    if (n_coarse) C_array = hypre_CTAlloc(HYPRE_Int, n_coarse);

285:

286:    if (num_cols_offd)

287:    {

288:       CF_marker_offd = hypre_CTAlloc(HYPRE_Int, num_cols_offd);

289:       if (num_functions > 1) dof_func_offd = hypre_CTAlloc(HYPRE_Int, num_cols_offd);

290:    }

291:

292:    if (num_procs > 1)

293:    {

294:       num_sends = hypre_ParCSRCommPkgNumSends(comm_pkg);

295:       send_procs = hypre_ParCSRCommPkgSendProcs(comm_pkg);

296:       send_map_start = hypre_ParCSRCommPkgSendMapStarts(comm_pkg);

297:       send_map_elmt = hypre_ParCSRCommPkgSendMapElmts(comm_pkg);

298:       num_recvs = hypre_ParCSRCommPkgNumRecvs(comm_pkg);

299:       recv_procs = hypre_ParCSRCommPkgRecvProcs(comm_pkg);

300:       recv_vec_start = hypre_ParCSRCommPkgRecvVecStarts(comm_pkg);

301:       if (send_map_start[num_sends])

302:          int_buf_data = hypre_CTAlloc(HYPRE_Int, send_map_start[num_sends]);

303:    }

304:

305:

306:    index = 0;

307:    for (i=0; i < num_sends; i++)

308:    {

309:       start = send_map_start[i];

310:       for (j = start; j < send_map_start[i+1]; j++)

311:          int_buf_data[index++] = CF_marker[send_map_elmt[j]];

312:    }

313:    if (num_procs > 1)

314:    {

315:       comm_handle = hypre_ParCSRCommHandleCreate(11, comm_pkg, int_buf_data,

316: 	 CF_marker_offd);

317:       hypre_ParCSRCommHandleDestroy(comm_handle);

318:    }

319:

320:    if (num_functions > 1)

321:    {

322:       index = 0;

323:       for (i=0; i < num_sends; i++)

324:       {

325:          start = send_map_start[i];

326:          for (j = start; j < send_map_start[i+1]; j++)

327: 	    int_buf_data[index++] = dof_func[send_map_elmt[j]];

328:       }

329:       if (num_procs > 1)

330:       {

331:          comm_handle = hypre_ParCSRCommHandleCreate(11, comm_pkg, int_buf_data,

332: 	    dof_func_offd);

333:          hypre_ParCSRCommHandleDestroy(comm_handle);

[...]

340: #pragma omp parallel for private(i) reduction(+:n_coarse_offd,n_SF_offd) HYPRE_SMP_SCHEDULE

[...]

346:    if (num_cols_offd)

347:    {

348:       assigned_offd = hypre_CTAlloc(HYPRE_Int, num_cols_offd);

349:       map_S_to_new = hypre_CTAlloc(HYPRE_Int, num_cols_offd);

350:       fine_to_coarse_offd = hypre_CTAlloc(HYPRE_Int, num_cols_offd);

351:       new_col_map_offd = hypre_CTAlloc(HYPRE_Int, n_coarse_offd);

[...]

381:    cnt = 0;

382:    p_cnt = pass_array_size-1;

383:    P_diag_i[0] = 0;

384:    P_offd_i[0] = 0;

385:    for (i = 0; i < n_fine; i++)

386:    {

387:       if (CF_marker[i] == 1)

388:       {

389:          fine_to_coarse[i] = cnt; /* this C point is assigned index

390:                                      coarse_counter on coarse grid,

391:                                      and in column of P */

392:          C_array[cnt++] = i;

393:          assigned[i] = 0;

394:          P_diag_i[i+1] = 1; /* one element in row i1 of P */

395:          P_offd_i[i+1] = 0;

396:       }

397:       else if (CF_marker[i] == -1)

398:       {

399:          pass_array[p_cnt--] = i;

400:          P_diag_i[i+1] = 0;

401:          P_offd_i[i+1] = 0;

402:          assigned[i] = -1;

403:          fine_to_coarse[i] = -1;

404:       }

405:       else

406:       {

407:          P_diag_i[i+1] = 0;

408:          P_offd_i[i+1] = 0;

409:          assigned[i] = -1;

410:          fine_to_coarse[i] = -1;

411:       }

412:    }

413:

414:    index = 0;

415:    for (i=0; i < num_sends; i++)

416:    {

417:       start = send_map_start[i];

418:       for (j = start; j < send_map_start[i+1]; j++)

419:       {

420:          int_buf_data[index] = fine_to_coarse[send_map_elmt[j]];

421:          if (int_buf_data[index] > -1)

422:             int_buf_data[index] += my_first_cpt;

423:          index++;

424:       }

425:    }

426:    if (num_procs > 1)

427:    {

428:       comm_handle = hypre_ParCSRCommHandleCreate(11, comm_pkg, int_buf_data,

429:          fine_to_coarse_offd);

430:       hypre_ParCSRCommHandleDestroy(comm_handle);

431:    }

432:

433:    new_recv_vec_start = hypre_CTAlloc(HYPRE_Int,num_recvs+1);

434:

435:    if (n_coarse_offd)

436:       C_array_offd = hypre_CTAlloc(HYPRE_Int,n_coarse_offd);

437:

438:    cnt = 0;

439:    new_recv_vec_start[0] = 0;

440:    for (j = 0; j < num_recvs; j++)

441:    {

442:       for (i = recv_vec_start[j]; i < recv_vec_start[j+1]; i++)

443:       {

444:          if (CF_marker_offd[i] == 1)

445:          {

446:             map_S_to_new[i] = cnt;

447:             C_array_offd[cnt] = i;

448:             new_col_map_offd[cnt++] = fine_to_coarse_offd[i];

449:             assigned_offd[i] = 0;

450:          }

451:          else

452:          {

453:             assigned_offd[i] = -1;

454:             map_S_to_new[i] = -1;

455:          }

456:       }

457:       new_recv_vec_start[j+1] = cnt;

458:    }

459:

460:    cnt = 0;

461:    hypre_TFree(fine_to_coarse_offd);

462:

463:    if (col_offd_S_to_A)

464:    {

465:       map_A_to_S = hypre_CTAlloc(HYPRE_Int,num_cols_offd_A);

466:       for (i=0; i < num_cols_offd_A; i++)

467:       {

468:         if (cnt < num_cols_offd && col_map_offd_A[i] == col_map_offd[cnt])

469:            map_A_to_S[i] = cnt++;

[...]

479:    pass_pointer[0] = 0;

480:    pass_pointer[1] = 0;

481:    total_nz = n_coarse;  /* accumulates total number of nonzeros in P_diag */

482:    total_nz_offd = 0; /* accumulates total number of nonzeros in P_offd */

483:

484:    cnt = 0;

485:    cnt_offd = 0;

486:    cnt_nz = 0;

487:    cnt_nz_offd = 0;

488:    for (i = pass_array_size-1; i > cnt-1; i--)

489:    {

490:      i1 = pass_array[i];

491:      for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++)

492:      {

493:         j1 = S_diag_j[j];

494:         if (CF_marker[j1] == 1)

495:         {

496:            P_diag_i[i1+1]++;

497:            cnt_nz++;

498:            assigned[i1] = 1;

499:         }

500:      }

501:      for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++)

502:      {

503:         j1 = S_offd_j[j];

504:         if (CF_marker_offd[j1] == 1)

505:         {

506:            P_offd_i[i1+1]++;

507:            cnt_nz_offd++;

508:            assigned[i1] = 1;

509:         }

510:      }

511:      if (assigned[i1] == 1)

512:      {

513:         pass_array[i++] = pass_array[cnt];

514:         pass_array[cnt++] = i1;

515:      }

516:    }

517:

518:    pass_pointer[2] = cnt;

[...]

525:    index = 0;

526:    for (i=0; i < num_sends; i++)

527:    {

528:       start = send_map_start[i];

529:       for (j = start; j < send_map_start[i+1]; j++)

530:       {    int_buf_data[index++] = assigned[send_map_elmt[j]]; }

531:    }

532:    if (num_procs > 1)

533:    {

534:       comm_handle = hypre_ParCSRCommHandleCreate(11, comm_pkg, int_buf_data,

535:                      assigned_offd);

536:       hypre_ParCSRCommHandleDestroy(comm_handle);

[...]

544:    pass = 2;

545:    local_pass_array_size = pass_array_size - cnt;

546:    hypre_MPI_Allreduce(&local_pass_array_size, &global_pass_array_size, 1, HYPRE_MPI_INT,

547:                        hypre_MPI_SUM, comm);

548:    while (global_pass_array_size && pass < max_num_passes)

549:    {

550:       for (i = pass_array_size-1; i > cnt-1; i--)

551:       {

552:          i1 = pass_array[i];

553:          no_break = 1;

554:          for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++)

555:          {

556:             j1 = S_diag_j[j];

557:             if (assigned[j1] == pass-1)

[...]

568:             for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++)

569:             {

570:                j1 = S_offd_j[j];

571:                if (assigned_offd[j1] == pass-1)

572:                {

573:                   pass_array[i++] = pass_array[cnt];

574:                   pass_array[cnt++] = i1;

575:                   assigned[i1] = pass;

576:                   break;

[...]

583:       pass++;

584:       pass_pointer[pass] = cnt;

585:

586:       local_pass_array_size = pass_array_size - cnt;

587:       hypre_MPI_Allreduce(&local_pass_array_size, &global_pass_array_size, 1, HYPRE_MPI_INT,

588:                           hypre_MPI_SUM, comm);

589:       index = 0;

590:       for (i=0; i < num_sends; i++)

591:       {

592:          start = send_map_start[i];

593:          for (j = start; j < send_map_start[i+1]; j++)

594:          {   int_buf_data[index++] = assigned[send_map_elmt[j]]; }

595:       }

596:       if (num_procs > 1)

597:       {

598:          comm_handle = hypre_ParCSRCommHandleCreate(11, comm_pkg, int_buf_data,

599:                        assigned_offd);

600:          hypre_ParCSRCommHandleDestroy(comm_handle);

601:       }

602:    }

603:

604:    hypre_TFree(int_buf_data);

605:

606:    num_passes = pass;

607:

608:    P_diag_pass = hypre_CTAlloc(HYPRE_Int*,num_passes); /* P_diag_pass[i] will contain

609:                                  all column numbers for points of pass i */

610:

611:    P_diag_pass[1] = hypre_CTAlloc(HYPRE_Int,cnt_nz);

612:

613:    P_diag_start = hypre_CTAlloc(HYPRE_Int, n_fine); /* P_diag_start[i] contains

614:            pointer to begin of column numbers in P_pass for point i,

615:            P_diag_i[i+1] contains number of columns for point i */

616:

617:    P_offd_start = hypre_CTAlloc(HYPRE_Int, n_fine);

618:

619:    if (num_procs > 1)

620:    {

621:       P_offd_pass = hypre_CTAlloc(HYPRE_Int*,num_passes);

622:

623:       if (cnt_nz_offd)

624:          P_offd_pass[1] = hypre_CTAlloc(HYPRE_Int,cnt_nz_offd);

625:       else

626:          P_offd_pass[1] = NULL;

627:

628:       new_elmts = hypre_CTAlloc(HYPRE_Int*,num_passes);

629:

630:       new_counter = hypre_CTAlloc(HYPRE_Int, num_passes+1);

631:

632:       new_counter[0] = 0;

633:       new_counter[1] = n_coarse_offd;

634:       new_num_cols_offd = n_coarse_offd;

635:

636:       new_elmts[0] = new_col_map_offd;

[...]

643:    cnt_nz = 0;

644:    cnt_nz_offd = 0;

645:    /* JBS: Possible candidate for threading */

646:    for (i=pass_pointer[1]; i < pass_pointer[2]; i++)

647:    {

648:       i1 = pass_array[i];

649:       P_diag_start[i1] = cnt_nz;

650:       P_offd_start[i1] = cnt_nz_offd;

651:       for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++)

652:       {

653:          j1 = S_diag_j[j];

654:          if (CF_marker[j1] == 1)

655:          {   P_diag_pass[1][cnt_nz++] = fine_to_coarse[j1]; }

656:       }

657:       for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++)

658:       {

659:          j1 = S_offd_j[j];

660:          if (CF_marker_offd[j1] == 1)

661:          {   P_offd_pass[1][cnt_nz_offd++] = map_S_to_new[j1]; }

662:       }

663:    }

664:

665:

666:    total_nz += cnt_nz;

667:    total_nz_offd += cnt_nz_offd;

668:

669:    if (num_procs > 1)

670:    {

671:       tmp_comm_pkg = hypre_CTAlloc(hypre_ParCSRCommPkg,1);

672:       Pext_send_map_start = hypre_CTAlloc(HYPRE_Int*,num_passes);

673:       Pext_recv_vec_start = hypre_CTAlloc(HYPRE_Int*,num_passes);

674:       Pext_pass = hypre_CTAlloc(HYPRE_Int*,num_passes);

675:       Pext_i = hypre_CTAlloc(HYPRE_Int, num_cols_offd+1);

676:       if (num_cols_offd) Pext_start = hypre_CTAlloc(HYPRE_Int, num_cols_offd);

677:       if (send_map_start[num_sends])

678:          P_ncols = hypre_CTAlloc(HYPRE_Int,send_map_start[num_sends]);

679: #ifdef HYPRE_USING_OPENMP

680: #pragma omp parallel for private(i) HYPRE_SMP_SCHEDULE

681: #endif

682:       for (i=0; i < num_cols_offd+1; i++)

683:       {   Pext_i[i] = 0; }

684: #ifdef HYPRE_USING_OPENMP

685: #pragma omp parallel for private(i) HYPRE_SMP_SCHEDULE

[...]

691:    old_Pext_send_size = 0;

692:    old_Pext_recv_size = 0;

693:    for (pass=2; pass < num_passes; pass++)

694:    {

695:

696:       if (num_procs > 1)

697:       {

698:          Pext_send_map_start[pass] = hypre_CTAlloc(HYPRE_Int, num_sends+1);

699:          Pext_recv_vec_start[pass] = hypre_CTAlloc(HYPRE_Int, num_recvs+1);

700:          Pext_send_size = 0;

701:          Pext_send_map_start[pass][0] = 0;

702:

703:          for (i=0; i < num_sends; i++)

704:          {

705: #ifdef HYPRE_USING_OPENMP

706: #pragma omp parallel for private(j,j1) reduction(+:Pext_send_size) HYPRE_SMP_SCHEDULE

[...]

717:             Pext_send_map_start[pass][i+1] = Pext_send_size;

718:          }

719:

720:          comm_handle = hypre_ParCSRCommHandleCreate (11, comm_pkg,

721:                                               P_ncols, &Pext_i[1]);

722:          hypre_ParCSRCommHandleDestroy(comm_handle);

723:

724:          if (Pext_send_size > old_Pext_send_size)

725:          {

726:             hypre_TFree(Pext_send_buffer);

727:             Pext_send_buffer = hypre_CTAlloc(HYPRE_Int, Pext_send_size);

728:          }

729:          old_Pext_send_size = Pext_send_size;

730:       }

731:

732:       cnt_offd = 0;

733:       for (i=0; i < num_sends; i++)

734:       {

735:          for (j=send_map_start[i]; j < send_map_start[i+1]; j++)

736:          {

737:             j1 = send_map_elmt[j];

738:             if (assigned[j1] == pass-1)

739:             {

740:                j_start = P_diag_start[j1];

741:                j_end = j_start+P_diag_i[j1+1];

742:                for (k=j_start; k < j_end; k++)

743:                {

744:                 Pext_send_buffer[cnt_offd++] = my_first_cpt

745:                     +P_diag_pass[pass-1][k];

746:                }

747:                j_start = P_offd_start[j1];

748:                j_end = j_start+P_offd_i[j1+1];

749:                for (k=j_start; k < j_end; k++)

750:                {

751:                  k1 = P_offd_pass[pass-1][k];

752:                  k3 = 0;

753:                  while (k3 < pass-1)

754:                  {

755:                     if (k1 < new_counter[k3+1])

756:                     {

757:                        k2 = k1-new_counter[k3];

758:                        Pext_send_buffer[cnt_offd++] = new_elmts[k3][k2];

759:                        break;

[...]

768:       if (num_procs > 1)

769:       {

770:          Pext_recv_size = 0;

771:          Pext_recv_vec_start[pass][0] = 0;

772:          cnt_offd = 0;

773:          for (i=0; i < num_recvs; i++)

774:          {

775:             for (j=recv_vec_start[i]; j<recv_vec_start[i+1]; j++)

776:             {

777:                if (assigned_offd[j] == pass-1)

778:                {

779:                   Pext_start[j] = cnt_offd;

780:                   cnt_offd += Pext_i[j+1];

781:                }

782:             }

783:             Pext_recv_size = cnt_offd;

784:             Pext_recv_vec_start[pass][i+1] = Pext_recv_size;

785:          }

786:

787:          hypre_ParCSRCommPkgComm(tmp_comm_pkg) = comm;

788:          hypre_ParCSRCommPkgNumSends(tmp_comm_pkg) = num_sends;

789:          hypre_ParCSRCommPkgSendProcs(tmp_comm_pkg) = send_procs;

790:          hypre_ParCSRCommPkgSendMapStarts(tmp_comm_pkg) =

791:             Pext_send_map_start[pass];

792:          hypre_ParCSRCommPkgNumRecvs(tmp_comm_pkg) = num_recvs;

793:          hypre_ParCSRCommPkgRecvProcs(tmp_comm_pkg) = recv_procs;

794:          hypre_ParCSRCommPkgRecvVecStarts(tmp_comm_pkg) =

795:             Pext_recv_vec_start[pass];

796:

797:          if (Pext_recv_size)

798:          {

799:             Pext_pass[pass] = hypre_CTAlloc(HYPRE_Int, Pext_recv_size);

800:             new_elmts[pass-1] = hypre_CTAlloc(HYPRE_Int,Pext_recv_size);

801:          }

802:          else

803:          {

804:             Pext_pass[pass] = NULL;

805:             new_elmts[pass-1] = NULL;

806:          }

807:

808:          comm_handle = hypre_ParCSRCommHandleCreate (11, tmp_comm_pkg,

809:             Pext_send_buffer, Pext_pass[pass]);

810:          hypre_ParCSRCommHandleDestroy(comm_handle);

811:

812:          if (Pext_recv_size > old_Pext_recv_size)

813:          {

814:             hypre_TFree(loc);

815:             loc = hypre_CTAlloc(HYPRE_Int,Pext_recv_size);

816:          }

817:          old_Pext_recv_size = Pext_recv_size;

818:       }

819:

820:       cnt_new = 0;

821:       cnt_offd = 0;

822:       /* JBS: Possible candidate for threading */

823:       for (i=0; i < num_recvs; i++)

824:       {

825:          for (j=recv_vec_start[i]; j < recv_vec_start[i+1]; j++)

826:          {

827:             if (assigned_offd[j] == pass-1)

828:             {

829:                for (j1 = cnt_offd; j1 < cnt_offd+Pext_i[j+1]; j1++)

830:                {

831:                   k1 = Pext_pass[pass][j1];

832:                   k2 = k1 - my_first_cpt;

833:                   if (k2 > -1 && k2 < n_coarse)

834:                   {  Pext_pass[pass][j1] = -k2-1; }

835:                   else

836:                   {

837:                      not_found = 1;

838:                      k3 = 0;

839:                      while (k3 < pass-1 && not_found)

840:                      {

841:                         k2 = hypre_BinarySearch(new_elmts[k3], k1,

842:                                 (new_counter[k3+1]-new_counter[k3]));

843:                         if (k2 > -1)

844:                         {

845:                             Pext_pass[pass][j1] = k2 + new_counter[k3];

846:                             not_found = 0;

847:                         }

848:                         else

849:                         {

850:                             k3++;

851:                         }

852:                      }

853:                      if (not_found)

854:                      {

855:                          new_elmts[pass-1][cnt_new] = Pext_pass[pass][j1];

856:                          loc[cnt_new++] = j1;

857:                      }

858:                   }

859:                }

860:                cnt_offd += Pext_i[j+1];

861:             }

862:          }

863:       }

864:

865:       if (cnt_new)

866:       {

867:          hypre_qsort2i(new_elmts[pass-1],loc,0,cnt_new-1);

868:          cnt = 0;

869:          local_index = new_counter[pass-1];

870:          Pext_pass[pass][loc[0]] = local_index;

871:

872:          for (i=1; i < cnt_new; i++)

873:          {

874:             if (new_elmts[pass-1][i] > new_elmts[pass-1][cnt])

875:             {

876:                new_elmts[pass-1][++cnt] = new_elmts[pass-1][i];

877:                local_index++;

878:             }

879:             Pext_pass[pass][loc[i]] = local_index;

880:          }

881:          new_counter[pass] = local_index+1;

882:       }

883:       else if (num_procs > 1)

884:          new_counter[pass] = new_counter[pass-1];

885:

886:       if (new_num_cols_offd < local_index+1)

887:       {    new_num_cols_offd = local_index+1; }

888:

889:       pass_length = pass_pointer[pass+1] - pass_pointer[pass];

890:       #ifdef HYPRE_USING_OPENMP

891:       #pragma omp parallel private(i,my_thread_num,num_threads,thread_start,thread_stop,cnt_nz,cnt_nz_offd,i1,j,j1,j_start,j_end,k1,k,P_marker,P_marker_offd)

[...]

1140:    hypre_TFree(loc);

1141:    hypre_TFree(P_ncols);

1142:    hypre_TFree(Pext_send_buffer);

1143:    hypre_TFree(new_recv_vec_start);

1144:    hypre_TFree(cnt_nz_per_thread);

1145:    hypre_TFree(cnt_nz_offd_per_thread);

1146:    hypre_TFree(max_num_threads);

1147:

1148:    P_diag_j = hypre_CTAlloc(HYPRE_Int,total_nz);

1149:    P_diag_data = hypre_CTAlloc(HYPRE_Real,total_nz);

1150:

1151:

1152:    if (total_nz_offd)

1153:    {

1154:       P_offd_j = hypre_CTAlloc(HYPRE_Int,total_nz_offd);

1155:       P_offd_data = hypre_CTAlloc(HYPRE_Real,total_nz_offd);

1156:    }

1157:

1158:    for (i=0; i < n_fine; i++)

1159:    {

1160:       P_diag_i[i+1] += P_diag_i[i];

1161:       P_offd_i[i+1] += P_offd_i[i];

[...]

1167: #pragma omp parallel for private(i,i1) HYPRE_SMP_SCHEDULE

[...]

1177:    if (weight_option) /*if this is set, weights are separated into

1178:                         negative and positive offdiagonals and accumulated

1179:                         accordingly */

1180:    {

1181:

1182:        pass_length = pass_pointer[2]-pass_pointer[1];

1183: #ifdef HYPRE_USING_OPENMP

1184: #pragma omp parallel private(thread_start,thread_stop,my_thread_num,num_threads,P_marker,P_marker_offd,i,i1,sum_C_pos,sum_C_neg,sum_N_pos,sum_N_neg,j_start,j_end,j,k1,cnt,j1,cnt_offd,diagonal,alfa,beta)

[...]

1304:       if (n_coarse) hypre_TFree(C_array);

1305:       hypre_TFree(C_array_offd);

1306:       hypre_TFree(P_diag_pass[1]);

1307:       if (num_procs > 1) hypre_TFree(P_offd_pass[1]);

1308:

1309:

1310:       for (pass = 2; pass < num_passes; pass++)

1311:       {

1312:

1313:          if (num_procs > 1)

1314:          {

1315:             Pext_send_size = Pext_send_map_start[pass][num_sends];

1316:             if (Pext_send_size > old_Pext_send_size)

1317:             {

1318:                hypre_TFree(Pext_send_data);

1319:                Pext_send_data = hypre_CTAlloc(HYPRE_Real, Pext_send_size);

1320:             }

1321:             old_Pext_send_size = Pext_send_size;

1322:

1323:             cnt_offd = 0;

1324:             for (i=0; i < num_sends; i++)

1325:             {

1326:                for (j=send_map_start[i]; j < send_map_start[i+1]; j++)

1327:                {

1328:                   j1 = send_map_elmt[j];

1329:                   if (assigned[j1] == pass-1)

1330:                   {

1331:                      j_start = P_diag_i[j1];

1332:                      j_end = P_diag_i[j1+1];

1333:                      for (k=j_start; k < j_end; k++)

1334:                      {   Pext_send_data[cnt_offd++] = P_diag_data[k]; }

1335:                      j_start = P_offd_i[j1];

1336:                      j_end = P_offd_i[j1+1];

1337:                      for (k=j_start; k < j_end; k++)

1338:                      {  Pext_send_data[cnt_offd++] = P_offd_data[k]; }

1339:                   }

1340:                }

1341:             }

1342:

1343:             hypre_ParCSRCommPkgNumSends(tmp_comm_pkg) = num_sends;

1344:             hypre_ParCSRCommPkgSendMapStarts(tmp_comm_pkg) =

1345:                 Pext_send_map_start[pass];

1346:             hypre_ParCSRCommPkgNumRecvs(tmp_comm_pkg) = num_recvs;

1347:             hypre_ParCSRCommPkgRecvVecStarts(tmp_comm_pkg) =

1348:                 Pext_recv_vec_start[pass];

1349:

1350:             Pext_recv_size = Pext_recv_vec_start[pass][num_recvs];

1351:

1352:             if (Pext_recv_size > old_Pext_recv_size)

1353:             {

1354:                hypre_TFree(Pext_data);

1355:                Pext_data = hypre_CTAlloc(HYPRE_Real, Pext_recv_size);

1356:             }

1357:             old_Pext_recv_size = Pext_recv_size;

1358:

1359:             comm_handle = hypre_ParCSRCommHandleCreate (1, tmp_comm_pkg,

1360:                 Pext_send_data, Pext_data);

1361:             hypre_ParCSRCommHandleDestroy(comm_handle);

1362:

1363:             hypre_TFree(Pext_send_map_start[pass]);

1364:             hypre_TFree(Pext_recv_vec_start[pass]);

1365:          }

1366:

1367:          pass_length = pass_pointer[pass+1]-pass_pointer[pass];

1368: #ifdef HYPRE_USING_OPENMP

1369: #pragma omp parallel private(thread_start,thread_stop,my_thread_num,num_threads,P_marker,P_marker_offd,i,i1,sum_C_neg,sum_C_pos,sum_N_neg,sum_N_pos,j_start,j_end,cnt,j,k1,cnt_offd,j1,k,alfa,beta,diagonal,C_array,C_array_offd)

[...]

1562:          hypre_TFree(P_diag_pass[pass]);

1563:          if (num_procs > 1)

1564:          {

1565:             hypre_TFree(P_offd_pass[pass]);

1566:             hypre_TFree(Pext_pass[pass]);

[...]

1575: #pragma omp parallel private(thread_start,thread_stop,my_thread_num,num_threads,k,k1,i,i1,j,j1,sum_C,sum_N,j_start,j_end,cnt,tmp_marker,tmp_marker_offd,cnt_offd,diagonal,alfa)

[...]

1669:       if (n_coarse) hypre_TFree(C_array);

1670:       hypre_TFree(C_array_offd);

1671:       hypre_TFree(P_diag_pass[1]);

1672:       if (num_procs > 1) hypre_TFree(P_offd_pass[1]);

1673:

1674:       for (pass = 2; pass < num_passes; pass++)

1675:       {

1676:

1677:          if (num_procs > 1)

1678:          {

1679:             Pext_send_size = Pext_send_map_start[pass][num_sends];

1680:             if (Pext_send_size > old_Pext_send_size)

1681:             {

1682:                hypre_TFree(Pext_send_data);

1683:                Pext_send_data = hypre_CTAlloc(HYPRE_Real, Pext_send_size);

1684:             }

1685:             old_Pext_send_size = Pext_send_size;

1686:

1687:             cnt_offd = 0;

1688:             for (i=0; i < num_sends; i++)

1689:             {

1690:                for (j=send_map_start[i]; j < send_map_start[i+1]; j++)

1691:                {

1692:                   j1 = send_map_elmt[j];

1693:                   if (assigned[j1] == pass-1)

1694:                   {

1695:                      j_start = P_diag_i[j1];

1696:                      j_end = P_diag_i[j1+1];

1697:                      for (k=j_start; k < j_end; k++)

1698:                      {

1699:                         Pext_send_data[cnt_offd++] = P_diag_data[k];

1700:                      }

1701:                      j_start = P_offd_i[j1];

1702:                      j_end = P_offd_i[j1+1];

1703:                      for (k=j_start; k < j_end; k++)

1704:                      {

1705:                         Pext_send_data[cnt_offd++] = P_offd_data[k];

[...]

1711:             hypre_ParCSRCommPkgNumSends(tmp_comm_pkg) = num_sends;

1712:             hypre_ParCSRCommPkgSendMapStarts(tmp_comm_pkg) =

1713:                 Pext_send_map_start[pass];

1714:             hypre_ParCSRCommPkgNumRecvs(tmp_comm_pkg) = num_recvs;

1715:             hypre_ParCSRCommPkgRecvVecStarts(tmp_comm_pkg) =

1716:                 Pext_recv_vec_start[pass];

1717:

1718:             Pext_recv_size = Pext_recv_vec_start[pass][num_recvs];

1719:

1720:             if (Pext_recv_size > old_Pext_recv_size)

1721:             {

1722:                hypre_TFree(Pext_data);

1723:                Pext_data = hypre_CTAlloc(HYPRE_Real, Pext_recv_size);

1724:             }

1725:             old_Pext_recv_size = Pext_recv_size;

1726:

1727:             comm_handle = hypre_ParCSRCommHandleCreate (1, tmp_comm_pkg,

1728:                 Pext_send_data, Pext_data);

1729:             hypre_ParCSRCommHandleDestroy(comm_handle);

1730:

1731:             hypre_TFree(Pext_send_map_start[pass]);

1732:             hypre_TFree(Pext_recv_vec_start[pass]);

1733:          }

1734:

1735:          pass_length = pass_pointer[pass+1]-pass_pointer[pass];

1736: #ifdef HYPRE_USING_OPENMP

1737: #pragma omp parallel private(thread_start,thread_stop,my_thread_num,num_threads,k,k1,i,i1,j,j1,sum_C,sum_N,j_start,j_end,cnt,tmp_marker,tmp_marker_offd,cnt_offd,diagonal,alfa,tmp_array,tmp_array_offd)

[...]

1884:          hypre_TFree(P_diag_pass[pass]);

1885:          if (num_procs > 1)

1886:          {

1887:             hypre_TFree(P_offd_pass[pass]);

1888:             hypre_TFree(Pext_pass[pass]);

1889:          }

1890:       }

1891:    }

1892:

1893:    hypre_TFree(CF_marker_offd);

1894:    hypre_TFree(Pext_send_map_start);

1895:    hypre_TFree(Pext_recv_vec_start);

1896:    hypre_TFree(dof_func_offd);

1897:    hypre_TFree(Pext_send_data);

1898:    hypre_TFree(Pext_data);

1899:    hypre_TFree(P_diag_pass);

1900:    hypre_TFree(P_offd_pass);

1901:    hypre_TFree(Pext_pass);

1902:    hypre_TFree(P_diag_start);

1903:    hypre_TFree(P_offd_start);

1904:    hypre_TFree(Pext_start);

1905:    hypre_TFree(Pext_i);

1906:    hypre_TFree(fine_to_coarse);

1907:    hypre_TFree(assigned);

1908:    hypre_TFree(assigned_offd);

1909:    hypre_TFree(pass_pointer);

1910:    hypre_TFree(pass_array);

1911:    hypre_TFree(map_S_to_new);

1912:    hypre_TFree(map_A_to_S);

1913:    if (num_procs > 1) hypre_TFree(tmp_comm_pkg);

1914:

1915:     P = hypre_ParCSRMatrixCreate(comm,

[...]

1921:                                 P_diag_i[n_fine],

1922:                                 P_offd_i[n_fine]);

1923:    P_diag = hypre_ParCSRMatrixDiag(P);

1924:    hypre_CSRMatrixData(P_diag) = P_diag_data;

1925:    hypre_CSRMatrixI(P_diag) = P_diag_i;

1926:    hypre_CSRMatrixJ(P_diag) = P_diag_j;

1927:    P_offd = hypre_ParCSRMatrixOffd(P);

1928:    hypre_CSRMatrixData(P_offd) = P_offd_data;

1929:    hypre_CSRMatrixI(P_offd) = P_offd_i;

1930:    hypre_CSRMatrixJ(P_offd) = P_offd_j;

1931:    hypre_ParCSRMatrixOwnsRowStarts(P) = 0;

1932:

1933:    /* Compress P, removing coefficients smaller than trunc_factor * Max

1934:       and/or keep yat most <P_max_elmts> per row absolutely maximal coefficients */

1935:

1936:    if (trunc_factor != 0.0 || P_max_elmts != 0)

1937:    {

1938:       hypre_BoomerAMGInterpTruncation(P, trunc_factor, P_max_elmts);

[...]

1944:       P_offd_j = hypre_CSRMatrixJ(P_offd);

1945:    }

1946:    P_offd_size = P_offd_i[n_fine];

1947:

1948:    num_cols_offd_P = 0;

1949:    if (P_offd_size)

1950:    {

1951:       if (new_num_cols_offd > num_cols_offd)

1952:       {   P_marker_offd = hypre_CTAlloc(HYPRE_Int,new_num_cols_offd); }

1953:       else

1954:       {   P_marker_offd = hypre_CTAlloc(HYPRE_Int,num_cols_offd); }

1955: #ifdef HYPRE_USING_OPENMP

1956: #pragma omp parallel for private(i) HYPRE_SMP_SCHEDULE

1957: #endif

1958:       for (i=0; i < new_num_cols_offd; i++)

1959:       {   P_marker_offd[i] = 0; }

1960:

1961:       num_cols_offd_P = 0;

1962:       for (i=0; i < P_offd_size; i++)

1963:       {

1964:          index = P_offd_j[i];

1965:          if (!P_marker_offd[index])

1966:          {

1967:             num_cols_offd_P++;

1968:             P_marker_offd[index] = 1;

1969:          }

1970:       }

1971:

1972:       col_map_offd_P = hypre_CTAlloc(HYPRE_Int,num_cols_offd_P);

1973:       permute = hypre_CTAlloc(HYPRE_Int, new_counter[num_passes-1]);

1974:

1975: #ifdef HYPRE_USING_OPENMP

1976: #pragma omp parallel for private(i) HYPRE_SMP_SCHEDULE

1977: #endif

1978:       for (i=0; i < new_counter[num_passes-1]; i++)

1979:          permute[i] = -1;

1980:

1981:       cnt = 0;

1982:       for (i=0; i < num_passes-1; i++)

1983:       {

1984:          for (j=new_counter[i]; j < new_counter[i+1]; j++)

1985:          {

1986:             if (P_marker_offd[j])

1987:             {

1988:                col_map_offd_P[cnt] = new_elmts[i][j-new_counter[i]];

1989:                permute[j] = col_map_offd_P[cnt++];

1990:             }

1991:          }

1992:       }

1993:

1994:       hypre_qsort0(col_map_offd_P,0,num_cols_offd_P-1);

1995:

1996: #ifdef HYPRE_USING_OPENMP

1997: #pragma omp parallel for private(i,k1) HYPRE_SMP_SCHEDULE

[...]

2007: #pragma omp parallel for private(i) HYPRE_SMP_SCHEDULE

2008: #endif

2009:       for (i=0; i < P_offd_size; i++)

2010:       {   P_offd_j[i] = permute[P_offd_j[i]]; }

2011:

2012:       hypre_TFree(P_marker_offd);

2013:    }

2014:    if (num_procs > 1)

2015:    {

2016:       for (i=0; i < num_passes-1; i++)

2017:          hypre_TFree(new_elmts[i]);

2018:    }

2019:    hypre_TFree(permute);

2020:    hypre_TFree(new_elmts);

2021:    hypre_TFree(new_counter);

2022:

2023:    if (num_cols_offd_P)

2024:    {

2025:         hypre_ParCSRMatrixColMapOffd(P) = col_map_offd_P;

2026:         hypre_CSRMatrixNumCols(P_offd) = num_cols_offd_P;

2027:    }

2028:

2029:    if (n_SF)

2030:    {

2031: #ifdef HYPRE_USING_OPENMP

2032: #pragma omp parallel for private(i) HYPRE_SMP_SCHEDULE

[...]

2038:    if (num_procs > 1)

2039:    {

2040:         hypre_MatvecCommPkgCreate(P);

2041:    }

2042:

2043:    *P_ptr = P;

[...]

2061: }

0x45d860 SUB	SP, SP, #1184

0x45d864 ORR	X6, XZR, X1

0x45d868 ORR	X8, XZR, X0

0x45d86c MOVZ	X1, #8

0x45d870 STP	X29, X30, [SP]

0x45d874 ADD	X29, SP, #0

0x45d878 STR	X0, [SP, #680]

0x45d87c ADD	X0, X0, #56

0x45d880 STP	X19, X20, [SP, #16]

0x45d884 STP	X21, X22, [SP, #32]

0x45d888 STP	X23, X24, [SP, #48]

0x45d88c STP	X25, X26, [SP, #64]

0x45d890 STP	X27, X28, [SP, #80]

0x45d894 STR	D15, [SP, #96]

0x45d898 FMOV	D15, D0

0x45d89c LDP	X22, X24, [X0]

0x45d8a0 MOVZ	X0, #1

0x45d8a4 STR	X6, [SP, #320]

0x45d8a8 STR	X4, [SP, #432]

0x45d8ac STR	X3, [SP, #688]

0x45d8b0 LDP	X3, X20, [X2, #56]

0x45d8b4 STR	X5, [SP, #584]

0x45d8b8 LDR	X4, [X24]

0x45d8bc STR	X7, [SP, #728]

0x45d8c0 LDR	X5, [X20]

0x45d8c4 LDR	X7, [X8]

0x45d8c8 STR	X4, [SP, #616]

0x45d8cc STR	X5, [SP, #488]

0x45d8d0 STR	X7, [SP, #400]

0x45d8d4 LDP	X9, X10, [X22]

0x45d8d8 STR	X9, [SP, #600]

0x45d8dc STR	X10, [SP, #608]

0x45d8e0 LDP	X11, X12, [X3]

0x45d8e4 STR	X12, [SP, #120]

0x45d8e8 STR	X11, [SP, #480]

0x45d8ec LDR	X13, [X20, #24]

0x45d8f0 LDR	X14, [X22, #48]

0x45d8f4 LDR	X19, [X2, #88]

0x45d8f8 STR	X13, [SP, #192]

0x45d8fc LDR	X2, [X2, #112]

0x45d900 STR	X14, [SP, #592]

0x45d904 LDR	X23, [X24, #24]

0x45d908 LDR	X21, [X8, #88]

0x45d90c STR	X2, [SP, #344]

0x45d910 BL	52b308

0x45d914 ORR	X26, XZR, X0

0x45d918 STR	X0, [SP, #640]

0x45d91c BL	52df20

0x45d920 MOVZ	X1, #8

0x45d924 STR	X0, [X26]

0x45d928 BL	52b308

0x45d92c ORR	X15, XZR, X0

0x45d930 LDR	X0, [X26]

0x45d934 MOVZ	X1, #8

0x45d938 STR	X15, [SP, #648]

0x45d93c BL	52b308

0x45d940 LDR	X1, [X26]

0x45d944 STR	X0, [SP, #656]

0x45d948 LDR	X18, [SP, #120]

0x45d94c CMP	X1, #0

0x45d950 B.LE	45d97c

0x45d954 LDR	X16, [SP, #640]

0x45d958 MOVZ	X28, #0

(961) 0x45d95c LDR	X17, [SP, #656]

(961) 0x45d960 LDR	X27, [SP, #648]

(961) 0x45d964 STR	XZR, [X17, X28,LSL #3]

(961) 0x45d968 STR	XZR, [X27, X28,LSL #3]

(961) 0x45d96c ADD	X28, X28, #1

(961) 0x45d970 LDR	X30, [X16]

(961) 0x45d974 CMP	X30, X28

(961) 0x45d978 B.GT	45d95c

0x45d97c LDR	X26, [SP, #400]

0x45d980 ADD	X1, SP, #832

0x45d984 STR	X18, [SP, #120]

0x45d988 ORR	X0, XZR, X26

0x45d98c BL	52d1e0

0x45d990 ADD	X1, SP, #824

0x45d994 ORR	X0, XZR, X26

0x45d998 BL	52d210

0x45d99c LDR	X6, [SP, #688]

0x45d9a0 LDR	X3, [SP, #832]

0x45d9a4 LDR	X0, [SP, #824]

0x45d9a8 LDR	X4, [X6]

0x45d9ac SUB	X3, X3, #1

0x45d9b0 LDR	X8, [SP, #120]

0x45d9b4 CMP	X3, X0

0x45d9b8 STR	X4, [SP, #144]

0x45d9bc B.NE	45d9cc

0x45d9c0 LDR	X5, [SP, #688]

0x45d9c4 LDR	X7, [X5, #8]

0x45d9c8 STR	X7, [SP, #840]

0x45d9cc ADRP	X9,

0x45d9d0 LDR	X4, [SP, #400]

0x45d9d4 MOVZ	X1, #1

0x45d9d8 ADD	X10, X9, #2304

0x45d9dc ADD	X0, SP, #840

0x45d9e0 STR	X8, [SP, #120]

0x45d9e4 ORR	X2, XZR, X10

0x45d9e8 STR	X10, [SP, #160]

0x45d9ec BL	52d8c8

0x45d9f0 LDR	X11, [SP, #344]

0x45d9f4 LDR	X18, [SP, #120]

0x45d9f8 CBZ	X11, 45e34c

0x45d9fc LDR	X12, [SP, #1192]

0x45da00 CBZ	X12, 45e35c

0x45da04 CBZ	X23, 4620c4

0x45da08 LDR	X2, [X24, #8]

0x45da0c LDR	X24, [X24, #48]

0x45da10 STR	X2, [SP, #448]

0x45da14 STR	X24, [SP, #440]

0x45da18 LDR	X13, [SP, #192]

0x45da1c STR	XZR, [SP, #392]

0x45da20 CBZ	X13, 45da2c

0x45da24 LDR	X20, [X20, #8]

0x45da28 STR	X20, [SP, #392]

0x45da2c LDR	X0, [X22, #16]

0x45da30 STR	X18, [SP, #136]

0x45da34 STR	X0, [SP, #312]

0x45da38 CBNZ	X0, 45e384

0x45da3c LDR	X30, [SP, #320]

0x45da40 ADD	X1, SP, #848

0x45da44 ADD	X26, SP, #848

0x45da48 ADRP	X28, 45da48

0x45da4c MOVZ	W3, #0

0x45da50 STR	X1, [SP, #296]

0x45da54 ADD	X0, X28, #1348

0x45da58 MOVZ	W2, #0

0x45da5c STP	XZR, XZR, [X26, #16]

0x45da60 STP	X30, XZR, [X26]

0x45da64 BL	410c40

0x45da68 LDR	X0, [SP, #872]

0x45da6c LDR	X6, [SP, #864]

0x45da70 LDR	X8, [SP, #136]

0x45da74 SUB	X3, XZR, X0

0x45da78 STR	X0, [SP, #128]

0x45da7c SUBS	X0, X3, X6

0x45da80 STR	X6, [SP, #704]

0x45da84 STR	X0, [SP, #120]

0x45da88 B.NE	46206c

0x45da8c MOVZ	X1, #8

0x45da90 MOVZ	X0, #11

0x45da94 STR	X8, [SP, #136]

0x45da98 BL	52b308

0x45da9c LDR	X5, [SP, #136]

0x45daa0 MOVZ	X22, #0

0x45daa4 STR	XZR, [SP, #248]

0x45daa8 STR	X0, [SP, #264]

0x45daac STR	XZR, [SP, #280]

0x45dab0 LDR	X18, [SP, #312]

0x45dab4 MOVZ	X1, #8

0x45dab8 STR	X5, [SP, #136]

0x45dabc ADD	X0, X18, #1

0x45dac0 ORR	X20, XZR, X0

0x45dac4 STR	X0, [SP, #760]

0x45dac8 BL	52b308

0x45dacc ORR	X28, XZR, X0

0x45dad0 MOVZ	X1, #8

0x45dad4 ORR	X0, XZR, X20

0x45dad8 STR	X28, [SP, #256]

0x45dadc BL	52b308

0x45dae0 STR	X0, [SP, #216]

0x45dae4 LDP	X0, X6, [SP, #128]

0x45dae8 CBNZ	X0, 45eb40

0x45daec LDR	X0, [SP, #192]

0x45daf0 CBNZ	X0, 45eaf8

0x45daf4 LDR	X16, [SP, #832]

0x45daf8 STR	XZR, [SP, #352]

0x45dafc STR	XZR, [SP, #424]

0x45db00 CMP	X16, #1

0x45db04 B.LE	4620a0

0x45db08 LDR	X25, [SP, #344]

0x45db0c ADD	X3, X25, #8

0x45db10 ADD	X9, X25, #24

0x45db14 LDP	X4, X5, [X3]

0x45db18 ORR	X7, XZR, X25

0x45db1c ADD	X11, X7, #40

0x45db20 LDR	X12, [X7, #56]

0x45db24 STR	X4, [SP, #152]

0x45db28 UBFM	X24, X4, #61, #60

0x45db2c STR	X5, [SP, #712]

0x45db30 LDP	X10, X25, [X9]

0x45db34 STR	X10, [SP, #200]

0x45db38 LDP	X2, X13, [X11]

0x45db3c STR	X12, [SP, #664]

0x45db40 LDR	X0, [X10, X24]

0x45db44 STR	X2, [SP, #176]

0x45db48 STR	X13, [SP, #720]

0x45db4c CBNZ	X0, 4620ec

0x45db50 LDR	X27, [SP, #152]

0x45db54 ADD	X14, X2, #1

0x45db58 MOVZ	X20, #0

0x45db5c STR	X14, [SP, #552]

0x45db60 CMP	X27, #0

0x45db64 B.LE	45dbe4

0x45db68 LDR	X17, [SP, #200]

0x45db6c MOVZ	X27, #0

0x45db70 LDR	X26, [SP, #320]

0x45db74 ADD	X1, X17, #8

0x45db78 ORR	X3, XZR, X1

0x45db7c ADD	X30, X1, X24

(900) 0x45db80 LDP	X0, X8, [X3, #1016]

(900) 0x45db84 CMP	X0, X8

(900) 0x45db88 B.GE	45dbcc

(900) 0x45db8c UBFM	X4, X27, #61, #60

(900) 0x45db90 ORR	X7, XZR, X0

(900) 0x45db94 SUB	X9, X4, X0,LSL #3

(900) 0x45db98 ADD	X10, X20, X9

(900) 0x45db9c HINT	#0

  (960) 0x45dba0 LDR	X11, [X25, X0,LSL #3]

  (960) 0x45dba4 ORR	X12, XZR, X0

  (960) 0x45dba8 LDR	X13, [X26, X11,LSL #3]

  (960) 0x45dbac STR	X13, [X10, X0,LSL #3]

  (960) 0x45dbb0 ADD	X0, X0, #1

  (960) 0x45dbb4 LDR	X2, [X3]

  (960) 0x45dbb8 CMP	X2, X0

  (960) 0x45dbbc B.GT	45dba0

(900) 0x45dbc0 SUB	X14, X12, X7

(900) 0x45dbc4 ADD	X5, X27, #1

(900) 0x45dbc8 ADD	X27, X14, X5

(900) 0x45dbcc ADD	X3, X3, #8

(900) 0x45dbd0 CMP	X3, X30

(900) 0x45dbd4 B.NE	45db80

0x45dbd8 LDR	X15, [SP, #832]

0x45dbdc CMP	X15, #1

0x45dbe0 B.LE	4624f8

0x45dbe4 LDP	X1, X3, [SP, #344]

0x45dbe8 ORR	X2, XZR, X20

0x45dbec MOVZ	X0, #11

0x45dbf0 STR	X6, [SP, #136]

0x45dbf4 BL	4e46a4

0x45dbf8 BL	4e4eac

0x45dbfc LDR	X28, [SP, #432]

0x45dc00 LDR	X6, [SP, #136]

0x45dc04 CMP	X28, #1

0x45dc08 B.LE	45dcac

0x45dc0c LDR	X17, [SP, #152]

0x45dc10 LDR	X16, [SP, #200]

0x45dc14 ADD	X1, X16, #8

0x45dc18 CMP	X17, #0

0x45dc1c B.LE	45dc80

0x45dc20 LDR	X26, [SP, #584]

0x45dc24 MOVZ	X5, #0

0x45dc28 ADD	X24, X1, X24

(901) 0x45dc2c LDP	X13, X30, [X1, #1016]

(901) 0x45dc30 CMP	X13, X30

(901) 0x45dc34 B.GE	45dc74

(901) 0x45dc38 SUB	X4, XZR, X13,LSL #3

(901) 0x45dc3c ORR	X8, XZR, X13

(901) 0x45dc40 ADD	X7, X4, X5,LSL #3

(901) 0x45dc44 ADD	X9, X20, X7

  (959) 0x45dc48 LDR	X10, [X25, X13,LSL #3]

  (959) 0x45dc4c ORR	X11, XZR, X13

  (959) 0x45dc50 LDR	X12, [X26, X10,LSL #3]

  (959) 0x45dc54 STR	X12, [X9, X13,LSL #3]

  (959) 0x45dc58 ADD	X13, X13, #1

  (959) 0x45dc5c LDR	X0, [X1]

  (959) 0x45dc60 CMP	X0, X13

  (959) 0x45dc64 B.GT	45dc48

(901) 0x45dc68 SUB	X2, X11, X8

(901) 0x45dc6c ADD	X14, X5, #1

(901) 0x45dc70 ADD	X5, X2, X14

(901) 0x45dc74 ADD	X1, X1, #8

(901) 0x45dc78 CMP	X1, X24

(901) 0x45dc7c B.NE	45dc2c

0x45dc80 LDR	X1, [SP, #832]

0x45dc84 CMP	X1, #1

0x45dc88 B.LE	45dcac

0x45dc8c LDR	X1, [SP, #344]

0x45dc90 ORR	X2, XZR, X20

0x45dc94 MOVZ	X0, #11

0x45dc98 STR	X6, [SP, #136]

0x45dc9c LDR	X3, [SP, #424]

0x45dca0 BL	4e46a4

0x45dca4 BL	4e4eac

0x45dca8 LDR	X6, [SP, #136]

0x45dcac ADD	X15, SP, #848

0x45dcb0 ADRP	X27, 45dcb0

0x45dcb4 STR	X6, [SP, #136]

0x45dcb8 LDR	X28, [SP, #192]

0x45dcbc MOVZ	W3, #0

0x45dcc0 ADD	X0, X27, #552

0x45dcc4 MOVZ	W2, #0

0x45dcc8 LDR	X18, [SP, #352]

0x45dccc STP	XZR, XZR, [X15, #16]

0x45dcd0 STP	X28, X18, [X15]

0x45dcd4 LDR	X1, [SP, #296]

0x45dcd8 BL	410c40

0x45dcdc LDR	X3, [SP, #872]

0x45dce0 LDR	X6, [SP, #136]

0x45dce4 STR	X3, [SP, #496]

0x45dce8 CBNZ	X28, 45ea90

0x45dcec MOVZ	X26, #0

0x45dcf0 MOVZ	X24, #0

0x45dcf4 STR	XZR, [SP, #136]

0x45dcf8 STR	XZR, [SP, #536]

0x45dcfc LDR	X16, [SP, #256]

0x45dd00 LDR	X30, [SP, #216]

0x45dd04 LDR	X17, [SP, #120]

0x45dd08 STR	XZR, [X16]

0x45dd0c LDR	X8, [SP, #312]

0x45dd10 STR	XZR, [X30]

0x45dd14 SUB	X27, X17, #1

0x45dd18 CMP	X8, #0

0x45dd1c B.LE	45df60

0x45dd20 LDR	X9, [SP, #216]

0x45dd24 ANDS	X7, X8, #4160

0x45dd28 ORR	X3, XZR, X27

0x45dd2c MOVZ	X0, #0

0x45dd30 MOVZ	X1, #0

0x45dd34 LDR	X10, [SP, #256]

0x45dd38 MOVN	X13, #0

0x45dd3c ADD	X14, X9, #8

0x45dd40 ADD	X2, X10, #8

0x45dd44 B.EQ	45de00

0x45dd48 CMP	X7, #1

0x45dd4c B.EQ	45ddc4

0x45dd50 CMP	X7, #2

0x45dd54 B.EQ	45dd94

0x45dd58 LDR	X11, [SP, #320]

0x45dd5c LDR	X12, [X11]

0x45dd60 CMP	X12, #1

0x45dd64 B.EQ	4624d0

0x45dd68 CMN	X12, #1

0x45dd6c B.NE	45dd7c

0x45dd70 LDR	X0, [SP, #280]

0x45dd74 SUB	X3, X27, #1

0x45dd78 STR	XZR, [X0, X27,LSL #3]

0x45dd7c LDR	X5, [SP, #248]

0x45dd80 MOVZ	X0, #1

0x45dd84 STR	XZR, [X2]

0x45dd88 STR	XZR, [X14]

0x45dd8c STR	X13, [X22]

0x45dd90 STR	X13, [X5]

0x45dd94 LDR	X18, [SP, #320]

0x45dd98 LDR	X15, [X18, X0,LSL #3]

0x45dd9c CMP	X15, #1

0x45dda0 B.EQ	46226c

0x45dda4 CMN	X15, #1

0x45dda8 B.EQ	462244

0x45ddac LDR	X4, [SP, #248]

0x45ddb0 STR	XZR, [X2, X0,LSL #3]

0x45ddb4 STR	XZR, [X14, X0,LSL #3]

0x45ddb8 STR	X13, [X22, X0,LSL #3]

0x45ddbc STR	X13, [X4, X0,LSL #3]

0x45ddc0 ADD	X0, X0, #1

0x45ddc4 LDR	X7, [SP, #320]

0x45ddc8 LDR	X9, [X7, X0,LSL #3]

0x45ddcc CMP	X9, #1

0x45ddd0 B.EQ	461fc0

0x45ddd4 CMN	X9, #1

0x45ddd8 B.EQ	462220

0x45dddc LDR	X10, [SP, #248]

0x45dde0 STR	XZR, [X2, X0,LSL #3]

0x45dde4 STR	XZR, [X14, X0,LSL #3]

0x45dde8 STR	X13, [X22, X0,LSL #3]

0x45ddec STR	X13, [X10, X0,LSL #3]

0x45ddf0 LDR	X18, [SP, #312]

0x45ddf4 ADD	X0, X0, #1

0x45ddf8 CMP	X18, X0

0x45ddfc B.EQ	45df60

0x45de00 LDR	X15, [SP, #248]

0x45de04 LDR	X4, [SP, #280]

0x45de08 LDR	X16, [SP, #320]

0x45de0c LDR	X17, [SP, #360]

0x45de10 B	45deb4

(958) 0x45de14 CMN	X30, #1

(958) 0x45de18 B.EQ	461f84

(958) 0x45de1c STR	XZR, [X2, X0,LSL #3]

(958) 0x45de20 STR	XZR, [X14, X0,LSL #3]

(958) 0x45de24 STR	X13, [X22, X0,LSL #3]

(958) 0x45de28 STR	X13, [X15, X0,LSL #3]

(958) 0x45de2c ADD	X0, X0, #1

(958) 0x45de30 LDR	X8, [X16, X0,LSL #3]

(958) 0x45de34 CMP	X8, #1

(958) 0x45de38 B.EQ	45dee8

(958) 0x45de3c CMN	X8, #1

(958) 0x45de40 B.EQ	461f68

(958) 0x45de44 STR	XZR, [X2, X0,LSL #3]

(958) 0x45de48 STR	XZR, [X14, X0,LSL #3]

(958) 0x45de4c STR	X13, [X22, X0,LSL #3]

(958) 0x45de50 STR	X13, [X15, X0,LSL #3]

(958) 0x45de54 ADD	X7, X0, #1

(958) 0x45de58 LDR	X9, [X16, X7,LSL #3]

(958) 0x45de5c CMP	X9, #1

(958) 0x45de60 B.EQ	45df10

(958) 0x45de64 CMN	X9, #1

(958) 0x45de68 B.EQ	461f4c

(958) 0x45de6c STR	XZR, [X2, X7,LSL #3]

(958) 0x45de70 STR	XZR, [X14, X7,LSL #3]

(958) 0x45de74 STR	X13, [X22, X7,LSL #3]

(958) 0x45de78 STR	X13, [X15, X7,LSL #3]

(958) 0x45de7c ADD	X10, X0, #2

(958) 0x45de80 LDR	X11, [X16, X10,LSL #3]

(958) 0x45de84 CMP	X11, #1

(958) 0x45de88 B.EQ	45df38

(958) 0x45de8c CMN	X11, #1

(958) 0x45de90 B.EQ	461f30

(958) 0x45de94 STR	XZR, [X2, X10,LSL #3]

(958) 0x45de98 STR	XZR, [X14, X10,LSL #3]

(958) 0x45de9c STR	X13, [X22, X10,LSL #3]

(958) 0x45dea0 STR	X13, [X15, X10,LSL #3]

(958) 0x45dea4 LDR	X12, [SP, #312]

(958) 0x45dea8 ADD	X0, X0, #3

(958) 0x45deac CMP	X12, X0

(958) 0x45deb0 B.EQ	45df60

(958) 0x45deb4 LDR	X30, [X16, X0,LSL #3]

(958) 0x45deb8 CMP	X30, #1

(958) 0x45debc B.NE	45de14

(958) 0x45dec0 STR	X1, [X15, X0,LSL #3]

(958) 0x45dec4 STR	X0, [X17, X1,LSL #3]

(958) 0x45dec8 ADD	X1, X1, #1

(958) 0x45decc STR	XZR, [X22, X0,LSL #3]

(958) 0x45ded0 STR	X30, [X2, X0,LSL #3]

(958) 0x45ded4 STR	XZR, [X14, X0,LSL #3]

(958) 0x45ded8 ADD	X0, X0, #1

(958) 0x45dedc LDR	X8, [X16, X0,LSL #3]

(958) 0x45dee0 CMP	X8, #1

(958) 0x45dee4 B.NE	45de3c

(958) 0x45dee8 STR	X1, [X15, X0,LSL #3]

(958) 0x45deec ADD	X7, X0, #1

(958) 0x45def0 STR	X0, [X17, X1,LSL #3]

(958) 0x45def4 ADD	X1, X1, #1

(958) 0x45def8 STR	XZR, [X22, X0,LSL #3]

(958) 0x45defc STR	X8, [X2, X0,LSL #3]

(958) 0x45df00 STR	XZR, [X14, X0,LSL #3]

(958) 0x45df04 LDR	X9, [X16, X7,LSL #3]

(958) 0x45df08 CMP	X9, #1

(958) 0x45df0c B.NE	45de64

(958) 0x45df10 STR	X1, [X15, X7,LSL #3]

(958) 0x45df14 ADD	X10, X0, #2

(958) 0x45df18 STR	X7, [X17, X1,LSL #3]

(958) 0x45df1c ADD	X1, X1, #1

(958) 0x45df20 STR	XZR, [X22, X7,LSL #3]

(958) 0x45df24 STR	X9, [X2, X7,LSL #3]

(958) 0x45df28 STR	XZR, [X14, X7,LSL #3]

(958) 0x45df2c LDR	X11, [X16, X10,LSL #3]

(958) 0x45df30 CMP	X11, #1

(958) 0x45df34 B.NE	45de8c

(958) 0x45df38 LDR	X12, [SP, #312]

(958) 0x45df3c ADD	X0, X0, #3

(958) 0x45df40 STR	X1, [X15, X10,LSL #3]

(958) 0x45df44 STR	X10, [X17, X1,LSL #3]

(958) 0x45df48 ADD	X1, X1, #1

(958) 0x45df4c STR	XZR, [X22, X10,LSL #3]

(958) 0x45df50 STR	X11, [X2, X10,LSL #3]

(958) 0x45df54 STR	XZR, [X14, X10,LSL #3]

(958) 0x45df58 CMP	X12, X0

(958) 0x45df5c B.NE	45deb4

0x45df60 LDR	X2, [SP, #200]

0x45df64 MOVZ	X10, #0

0x45df68 LDR	X13, [SP, #152]

0x45df6c ADD	X12, X2, #8

0x45df70 ADD	X14, X12, X13,LSL #3

0x45df74 CMP	X13, #0

0x45df78 B.LE	45dfd8

0x45df7c LDR	X28, [SP, #144]

0x45df80 LDR	X18, [SP, #248]

(956) 0x45df84 LDP	X15, X5, [X12, #1016]

(956) 0x45df88 CMP	X15, X5

(956) 0x45df8c B.GE	45dfcc

(956) 0x45df90 UBFM	X4, X15, #61, #60

(956) 0x45df94 SUB	X16, X15, X10

(956) 0x45df98 SUB	X17, X4, X10,LSL #3

(956) 0x45df9c ADD	X30, X25, X17

  (957) 0x45dfa0 LDR	X8, [X30, X10,LSL #3]

  (957) 0x45dfa4 LDR	X7, [X18, X8,LSL #3]

  (957) 0x45dfa8 STR	X7, [X20, X10,LSL #3]

  (957) 0x45dfac ADD	X9, X28, X7

  (957) 0x45dfb0 TBNZ	X7, #63, 45e41c

  (957) 0x45dfb4 STR	X9, [X20, X10,LSL #3]

  (957) 0x45dfb8 ADD	X10, X10, #1

  (957) 0x45dfbc LDR	X1, [X12]

  (957) 0x45dfc0 ADD	X0, X16, X10

  (957) 0x45dfc4 CMP	X0, X1

  (957) 0x45dfc8 B.LT	45dfa0

(956) 0x45dfcc ADD	X12, X12, #8

(956) 0x45dfd0 CMP	X12, X14

(956) 0x45dfd4 B.NE	45df84

0x45dfd8 LDR	X13, [SP, #832]

0x45dfdc CMP	X13, #1

0x45dfe0 B.LE	45e004

0x45dfe4 LDR	X1, [SP, #344]

0x45dfe8 ORR	X3, XZR, X24

0x45dfec ORR	X2, XZR, X20

0x45dff0 MOVZ	X0, #11

0x45dff4 STR	X6, [SP, #168]

0x45dff8 BL	4e46a4

0x45dffc BL	4e4eac

0x45e000 LDR	X6, [SP, #168]

0x45e004 MOVZ	X1, #8

0x45e008 STR	X6, [SP, #168]

0x45e00c LDR	X0, [SP, #552]

0x45e010 BL	52b308

0x45e014 STR	XZR, [SP, #512]

0x45e018 STR	X0, [SP, #672]

0x45e01c LDR	X0, [SP, #496]

0x45e020 LDR	X14, [SP, #168]

0x45e024 CBNZ	X0, 45eae4

0x45e028 LDR	X2, [SP, #672]

0x45e02c LDR	X28, [SP, #176]

0x45e030 STR	XZR, [X2]

0x45e034 CMP	X28, #0

0x45e038 B.LE	45e0b8

0x45e03c LDR	X8, [SP, #664]

0x45e040 ADD	X18, X28, #1

0x45e044 MOVZ	X7, #0

0x45e048 MOVZ	X5, #8

0x45e04c UBFM	X15, X18, #61, #60

0x45e050 LDR	X17, [SP, #136]

0x45e054 MOVN	X16, #0

0x45e058 LDR	X30, [SP, #352]

0x45e05c SUB	X4, X8, #8

0x45e060 LDR	X9, [SP, #512]

0x45e064 LDR	X10, [SP, #536]

(954) 0x45e068 LDR	X0, [X4, X5]

(954) 0x45e06c LDR	X11, [X8, X5]

(954) 0x45e070 CMP	X0, X11

(954) 0x45e074 B.GE	45e0a4

(954) 0x45e078 HINT	#0

(954) 0x45e07c HINT	#0

  (955) 0x45e080 LDR	X3, [X30, X0,LSL #3]

  (955) 0x45e084 CMP	X3, #1

  (955) 0x45e088 B.EQ	45e440

  (955) 0x45e08c STR	X16, [X26, X0,LSL #3]

  (955) 0x45e090 STR	X16, [X10, X0,LSL #3]

  (955) 0x45e094 ADD	X0, X0, #1

  (955) 0x45e098 LDR	X1, [X8, X5]

  (955) 0x45e09c CMP	X0, X1

  (955) 0x45e0a0 B.LT	45e080

(954) 0x45e0a4 LDR	X2, [SP, #672]

(954) 0x45e0a8 STR	X7, [X2, X5]

(954) 0x45e0ac ADD	X5, X5, #8

(954) 0x45e0b0 CMP	X15, X5

(954) 0x45e0b4 B.NE	45e068

0x45e0b8 ORR	X0, XZR, X24

0x45e0bc STR	X14, [SP, #168]

0x45e0c0 BL	52b3a0

0x45e0c4 LDR	X24, [SP, #1192]

0x45e0c8 LDR	X6, [SP, #168]

0x45e0cc CBZ	X24, 45eb54

0x45e0d0 MOVZ	X1, #8

0x45e0d4 ORR	X0, XZR, X23

0x45e0d8 STR	X6, [SP, #168]

0x45e0dc BL	52b308

0x45e0e0 CMP	X23, #0

0x45e0e4 STR	X0, [SP, #272]

0x45e0e8 LDR	X6, [SP, #168]

0x45e0ec B.LE	45e27c

0x45e0f0 ANDS	X14, X23, #4224

0x45e0f4 MOVZ	X1, #0

0x45e0f8 MOVZ	X0, #0

0x45e0fc B.EQ	462360

0x45e100 CMP	X14, #1

0x45e104 B.EQ	46231c

0x45e108 CMP	X14, #2

0x45e10c B.EQ	45e234

0x45e110 CMP	X14, #3

0x45e114 B.EQ	45e200

0x45e118 CMP	X14, #4

0x45e11c B.EQ	45e1cc

0x45e120 CMP	X14, #5

0x45e124 B.EQ	45e198

0x45e128 CMP	X14, #6

0x45e12c B.EQ	45e164

0x45e130 LDR	X28, [SP, #192]

0x45e134 CMP	X28, #0

0x45e138 B.LE	45e240

0x45e13c LDR	X17, [X19]

0x45e140 MOVN	X18, #0

0x45e144 MOVZ	X15, #0

0x45e148 MOVZ	X1, #1

0x45e14c LDR	X30, [X21]

0x45e150 LDR	X10, [SP, #272]

0x45e154 CMP	X30, X17

0x45e158 CSEL	X9, X18, X15, #1

0x45e15c CSEL	X0, X0, X1, #1

0x45e160 STR	X9, [X10]

0x45e164 LDR	X8, [SP, #192]

0x45e168 CMP	X8, X0

0x45e16c B.LE	45e240

0x45e170 LDR	X4, [X21, X1,LSL #3]

0x45e174 MOVN	X12, #0

0x45e178 LDR	X11, [X19, X0,LSL #3]

0x45e17c CMP	X4, X11

0x45e180 B.NE	45e18c

0x45e184 ORR	X12, XZR, X0

0x45e188 ADD	X0, X0, #1

0x45e18c LDR	X3, [SP, #272]

0x45e190 STR	X12, [X3, X1,LSL #3]

0x45e194 ADD	X1, X1, #1

0x45e198 LDR	X7, [SP, #192]

0x45e19c CMP	X7, X0

0x45e1a0 B.LE	45e240

0x45e1a4 LDR	X13, [X21, X1,LSL #3]

0x45e1a8 MOVN	X2, #0

0x45e1ac LDR	X5, [X19, X0,LSL #3]

0x45e1b0 CMP	X13, X5

0x45e1b4 B.NE	45e1c0

0x45e1b8 ORR	X2, XZR, X0

0x45e1bc ADD	X0, X0, #1

0x45e1c0 LDR	X24, [SP, #272]

0x45e1c4 STR	X2, [X24, X1,LSL #3]

0x45e1c8 ADD	X1, X1, #1

0x45e1cc LDR	X14, [SP, #192]

0x45e1d0 CMP	X14, X0

0x45e1d4 B.LE	45e240

0x45e1d8 LDR	X28, [X21, X1,LSL #3]

0x45e1dc MOVN	X15, #0

0x45e1e0 LDR	X18, [X19, X0,LSL #3]

0x45e1e4 CMP	X28, X18

0x45e1e8 B.NE	45e1f4

0x45e1ec ORR	X15, XZR, X0

0x45e1f0 ADD	X0, X0, #1

0x45e1f4 LDR	X16, [SP, #272]

0x45e1f8 STR	X15, [X16, X1,LSL #3]

0x45e1fc ADD	X1, X1, #1

0x45e200 LDR	X17, [SP, #192]

0x45e204 CMP	X17, X0

0x45e208 B.LE	45e240

0x45e20c LDR	X30, [X21, X1,LSL #3]

0x45e210 MOVN	X10, #0

0x45e214 LDR	X9, [X19, X0,LSL #3]

0x45e218 CMP	X30, X9

0x45e21c B.NE	45e228

0x45e220 ORR	X10, XZR, X0

0x45e224 ADD	X0, X0, #1

0x45e228 LDR	X8, [SP, #272]

0x45e22c STR	X10, [X8, X1,LSL #3]

0x45e230 ADD	X1, X1, #1

0x45e234 LDR	X4, [SP, #192]

0x45e238 CMP	X4, X0

0x45e23c B.GT	4622fc

0x45e240 LDR	X0, [SP, #272]

0x45e244 MOVN	X21, #0

0x45e248 ADD	X19, X1, #1

0x45e24c STR	X21, [X0, X1,LSL #3]

0x45e250 CMP	X23, X19

0x45e254 B.EQ	45e27c

0x45e258 SUB	X23, X23, X19

0x45e25c ADD	X0, X0, X19,LSL #3

0x45e260 MOVZ	W1, #255

0x45e264 STR	X6, [SP, #168]

0x45e268 UBFM	X14, X23, #61, #60

0x45e26c MOVZ	X28, #8

0x45e270 CSEL	X2, X14, X28, #12

0x45e274 BL	410950

0x45e278 LDR	X6, [SP, #168]

0x45e27c LDR	X17, [SP, #264]

0x45e280 STP	XZR, XZR, [X17]

0x45e284 TBNZ	X27, #63, 45eb64

0x45e288 MOVZ	X28, #0

0x45e28c MOVZ	X4, #0

0x45e290 LDR	X13, [SP, #216]

0x45e294 ORR	X7, XZR, X27

0x45e298 UBFM	X8, X27, #61, #60

0x45e29c LDP	X15, X16, [SP, #480]

0x45e2a0 MOVZ	X23, #0

0x45e2a4 LDR	X12, [SP, #256]

0x45e2a8 LDR	X30, [SP, #280]

0x45e2ac LDR	X14, [SP, #320]

0x45e2b0 LDR	X9, [SP, #352]

0x45e2b4 LDR	X5, [SP, #392]

(902) 0x45e2b8 ADD	X18, X30, X8

(902) 0x45e2bc LDR	X10, [X30, X8]

(902) 0x45e2c0 UBFM	X19, X10, #61, #60

(902) 0x45e2c4 ADD	X2, X19, #8

(902) 0x45e2c8 LDR	X0, [X15, X19]

(902) 0x45e2cc ADD	X11, X22, X19

(902) 0x45e2d0 ADD	X21, X15, X2

(902) 0x45e2d4 LDR	X3, [X15, X2]

(902) 0x45e2d8 CMP	X0, X3

(902) 0x45e2dc B.GE	45e2fc

  (952) 0x45e2e0 LDR	X1, [X6, X0,LSL #3]

  (952) 0x45e2e4 LDR	X17, [X14, X1,LSL #3]

  (952) 0x45e2e8 CMP	X17, #1

  (952) 0x45e2ec B.EQ	45ea4c

  (952) 0x45e2f0 ADD	X0, X0, #1

  (952) 0x45e2f4 CMP	X0, X3

  (952) 0x45e2f8 B.LT	45e2e0

(902) 0x45e2fc LDR	X17, [X16, X19]

(902) 0x45e300 ADD	X19, X16, X2

(902) 0x45e304 LDR	X3, [X16, X2]

(902) 0x45e308 CMP	X17, X3

(902) 0x45e30c B.GE	45e32c

  (951) 0x45e310 LDR	X21, [X5, X17,LSL #3]

  (951) 0x45e314 LDR	X1, [X9, X21,LSL #3]

  (951) 0x45e318 CMP	X1, #1

  (951) 0x45e31c B.EQ	45e484

  (951) 0x45e320 ADD	X17, X17, #1

  (951) 0x45e324 CMP	X17, X3

  (951) 0x45e328 B.LT	45e310

(902) 0x45e32c LDR	X2, [X11]

(902) 0x45e330 CMP	X2, #1

(902) 0x45e334 B.EQ	45e4a8

(902) 0x45e338 SUB	X7, X7, #1

(902) 0x45e33c CMP	X23, X7

(902) 0x45e340 B.GT	45e4c4

(902) 0x45e344 UBFM	X8, X7, #61, #60

(902) 0x45e348 B	45e2b8

0x45e34c LDR	X19, [SP, #680]

0x45e350 LDR	X14, [X19, #112]

0x45e354 STR	X14, [SP, #344]

0x45e358 CBZ	X14, 462128

0x45e35c CBNZ	X23, 4620cc

0x45e360 STP	XZR, XZR, [SP, #440]

0x45e364 ORR	X19, XZR, X21

0x45e368 LDR	X0, [X22, #16]

0x45e36c STR	X18, [SP, #136]

0x45e370 STR	XZR, [SP, #192]

0x45e374 STR	XZR, [SP, #392]

0x45e378 STR	XZR, [SP, #1192]

0x45e37c STR	X0, [SP, #312]

0x45e380 CBZ	X0, 45da3c

0x45e384 MOVZ	X1, #8

0x45e388 ORR	X24, XZR, X0

0x45e38c BL	52b308

0x45e390 LDR	X9, [SP, #320]

0x45e394 ADD	X1, SP, #848

0x45e398 ADD	X10, SP, #848

0x45e39c ADRP	X11,

0x45e3a0 STR	X0, [SP, #248]

0x45e3a4 MOVZ	W2, #0

0x45e3a8 STR	X1, [SP, #296]

0x45e3ac ADD	X0, X11, #1348

0x45e3b0 MOVZ	W3, #0

0x45e3b4 STP	XZR, XZR, [X10, #16]

0x45e3b8 STP	X9, X24, [X10]

0x45e3bc BL	410c40

0x45e3c0 LDR	X13, [SP, #872]

0x45e3c4 LDR	X2, [SP, #864]

0x45e3c8 LDR	X12, [SP, #136]

0x45e3cc SUB	X14, X24, X13

0x45e3d0 STR	X13, [SP, #128]

0x45e3d4 SUBS	X0, X14, X2

0x45e3d8 STR	X2, [SP, #704]

0x45e3dc STR	X0, [SP, #120]

0x45e3e0 B.NE	462294

0x45e3e4 MOVZ	X1, #8

0x45e3e8 MOVZ	X0, #11

0x45e3ec STR	X12, [SP, #136]

0x45e3f0 BL	52b308

0x45e3f4 LDR	X15, [SP, #136]

0x45e3f8 STR	X0, [SP, #264]

0x45e3fc STR	XZR, [SP, #280]

0x45e400 LDR	X0, [SP, #312]

0x45e404 MOVZ	X1, #8

0x45e408 STR	X15, [SP, #136]

0x45e40c BL	52b308

0x45e410 LDR	X5, [SP, #136]

0x45e414 ORR	X22, XZR, X0

0x45e418 B	45dab0

  (957) 0x45e41c LDR	X3, [X12]

  (957) 0x45e420 ADD	X10, X10, #1

  (957) 0x45e424 ADD	X11, X16, X10

  (957) 0x45e428 CMP	X11, X3

  (957) 0x45e42c B.LT	45dfa0

(956) 0x45e430 ADD	X12, X12, #8

(956) 0x45e434 CMP	X12, X14

(956) 0x45e438 B.NE	45df84

0x45e43c B	45dfd8

  (955) 0x45e440 UBFM	X12, X7, #61, #60

  (955) 0x45e444 STR	X7, [X10, X0,LSL #3]

  (955) 0x45e448 ADD	X7, X7, #1

  (955) 0x45e44c STR	X0, [X9, X12]

  (955) 0x45e450 LDR	X13, [X24, X0,LSL #3]

  (955) 0x45e454 STR	X13, [X17, X12]

  (955) 0x45e458 STR	XZR, [X26, X0,LSL #3]

  (955) 0x45e45c ADD	X0, X0, #1

  (955) 0x45e460 LDR	X6, [X8, X5]

  (955) 0x45e464 CMP	X6, X0

  (955) 0x45e468 B.GT	45e080

(954) 0x45e46c LDR	X2, [SP, #672]

(954) 0x45e470 STR	X7, [X2, X5]

(954) 0x45e474 ADD	X5, X5, #8

(954) 0x45e478 CMP	X15, X5

(954) 0x45e47c B.NE	45e068

0x45e480 B	45e0b8

  (951) 0x45e484 LDR	X0, [X13, X2]

  (951) 0x45e488 ADD	X17, X17, #1

  (951) 0x45e48c ADD	X28, X28, #1

  (951) 0x45e490 ADD	X24, X0, #1

  (951) 0x45e494 STR	X24, [X13, X2]

  (951) 0x45e498 STR	X1, [X11]

  (951) 0x45e49c LDR	X3, [X19]

  (951) 0x45e4a0 CMP	X17, X3

  (951) 0x45e4a4 B.LT	45e310

(902) 0x45e4a8 UBFM	X11, X23, #61, #60

(902) 0x45e4ac ADD	X23, X23, #1

(902) 0x45e4b0 LDR	X19, [X30, X11]

(902) 0x45e4b4 STR	X19, [X18]

(902) 0x45e4b8 STR	X10, [X30, X11]

(902) 0x45e4bc CMP	X23, X7

(902) 0x45e4c0 B.LE	45e2b8

0x45e4c4 LDR	X13, [SP, #120]

0x45e4c8 STR	X4, [SP, #208]

0x45e4cc SUB	X24, X13, X23

0x45e4d0 LDR	X12, [SP, #200]

0x45e4d4 MOVZ	X3, #0

0x45e4d8 LDR	X30, [SP, #264]

0x45e4dc LDR	X14, [SP, #152]

0x45e4e0 ADD	X4, X12, #8

0x45e4e4 STR	X23, [X30, #16]

0x45e4e8 ADD	X9, X4, X14,LSL #3

0x45e4ec CMP	X14, #0

0x45e4f0 B.LE	45e548

(949) 0x45e4f4 LDP	X7, X15, [X4, #1016]

(949) 0x45e4f8 CMP	X7, X15

(949) 0x45e4fc B.GE	45e53c

(949) 0x45e500 UBFM	X16, X3, #61, #60

(949) 0x45e504 ORR	X10, XZR, X7

(949) 0x45e508 SUB	X18, X16, X7,LSL #3

(949) 0x45e50c ADD	X21, X20, X18

  (950) 0x45e510 LDR	X1, [X25, X7,LSL #3]

  (950) 0x45e514 ORR	X17, XZR, X7

  (950) 0x45e518 LDR	X2, [X22, X1,LSL #3]

  (950) 0x45e51c STR	X2, [X21, X7,LSL #3]

  (950) 0x45e520 ADD	X7, X7, #1

  (950) 0x45e524 LDR	X8, [X4]

  (950) 0x45e528 CMP	X8, X7

  (950) 0x45e52c B.GT	45e510

(949) 0x45e530 ADD	X5, X3, #1

(949) 0x45e534 SUB	X0, X17, X10

(949) 0x45e538 ADD	X3, X5, X0

(949) 0x45e53c ADD	X4, X4, #8

(949) 0x45e540 CMP	X9, X4

(949) 0x45e544 B.NE	45e4f4

0x45e548 LDR	X11, [SP, #832]

0x45e54c CMP	X11, #1

0x45e550 B.LE	45e574

0x45e554 LDR	X1, [SP, #344]

0x45e558 ORR	X3, XZR, X26

0x45e55c ORR	X2, XZR, X20

0x45e560 MOVZ	X0, #11

0x45e564 STR	X6, [SP, #168]

0x45e568 BL	4e46a4

0x45e56c BL	4e4eac

0x45e570 LDR	X6, [SP, #168]

0x45e574 ADRP	X19,

0x45e578 ADD	X1, SP, #808

0x45e57c STR	X6, [SP, #168]

0x45e580 ADD	X13, X19, #768

0x45e584 LDR	X3, [SP, #160]

0x45e588 MOVZ	X2, #1

0x45e58c ORR	X4, XZR, X13

0x45e590 ADD	X0, SP, #816

0x45e594 STR	X24, [SP, #816]

0x45e598 LDR	X5, [SP, #400]

0x45e59c STR	X13, [SP, #224]

0x45e5a0 BL	52daf0

0x45e5a4 LDR	X24, [SP, #152]

0x45e5a8 MOVZ	X12, #1

0x45e5ac LDR	X15, [SP, #264]

0x45e5b0 LDR	X14, [SP, #808]

0x45e5b4 UBFM	X9, X24, #61, #60

0x45e5b8 LDR	X21, [SP, #168]

0x45e5bc ADD	X10, X15, #16

0x45e5c0 STR	X9, [SP, #184]

0x45e5c4 STR	X10, [SP, #240]

0x45e5c8 CBZ	X14, 4622e8

0x45e5cc ORR	X24, XZR, X20

0x45e5d0 ORR	X11, XZR, X27

0x45e5d4 LDR	X27, [SP, #280]

0x45e5d8 ORR	X20, XZR, X21

0x45e5dc ORR	X30, XZR, X23

0x45e5e0 STR	X28, [SP, #168]

0x45e5e4 LDR	X21, [SP, #392]

0x45e5e8 ORR	X28, XZR, X12

(943) 0x45e5ec ORR	X19, XZR, X28

(943) 0x45e5f0 ORR	X4, XZR, X11

(943) 0x45e5f4 ADD	X28, X28, #1

(943) 0x45e5f8 ORR	X23, XZR, X30

(943) 0x45e5fc CMP	X11, X30

(943) 0x45e600 B.LT	45e934

(943) 0x45e604 LDP	X6, X8, [SP, #480]

  (946) 0x45e608 ADD	X9, X27, X4,LSL #3

  (946) 0x45e60c LDR	X5, [X27, X4,LSL #3]

  (946) 0x45e610 UBFM	X2, X5, #61, #60

  (946) 0x45e614 ADD	X7, X2, #8

  (946) 0x45e618 LDR	X0, [X6, X2]

  (946) 0x45e61c LDR	X3, [X6, X7]

  (946) 0x45e620 CMP	X0, X3

  (946) 0x45e624 B.GE	45e7a0

  (946) 0x45e628 SUB	X16, X3, X0

  (946) 0x45e62c ANDS	X18, X16, #4224

  (946) 0x45e630 B.EQ	45e6f8

  (946) 0x45e634 CMP	X18, #1

  (946) 0x45e638 B.EQ	45e6dc

  (946) 0x45e63c CMP	X18, #2

  (946) 0x45e640 B.EQ	45e6c8

  (946) 0x45e644 CMP	X18, #3

  (946) 0x45e648 B.EQ	45e6b4

  (946) 0x45e64c CMP	X18, #4

  (946) 0x45e650 B.EQ	45e6a0

  (946) 0x45e654 CMP	X18, #5

  (946) 0x45e658 B.EQ	45e68c

  (946) 0x45e65c CMP	X18, #6

  (946) 0x45e660 B.EQ	45e678

  (946) 0x45e664 LDR	X1, [X20, X0,LSL #3]

  (946) 0x45e668 ADD	X0, X0, #1

  (946) 0x45e66c LDR	X17, [X22, X1,LSL #3]

  (946) 0x45e670 CMP	X17, X19

  (946) 0x45e674 B.EQ	45ea74

  (946) 0x45e678 LDR	X13, [X20, X0,LSL #3]

  (946) 0x45e67c ADD	X0, X0, #1

  (946) 0x45e680 LDR	X12, [X22, X13,LSL #3]

  (946) 0x45e684 CMP	X12, X19

  (946) 0x45e688 B.EQ	45ea74

  (946) 0x45e68c LDR	X14, [X20, X0,LSL #3]

  (946) 0x45e690 ADD	X0, X0, #1

  (946) 0x45e694 LDR	X15, [X22, X14,LSL #3]

  (946) 0x45e698 CMP	X15, X19

  (946) 0x45e69c B.EQ	45ea74

  (946) 0x45e6a0 LDR	X10, [X20, X0,LSL #3]

  (946) 0x45e6a4 ADD	X0, X0, #1

  (946) 0x45e6a8 LDR	X16, [X22, X10,LSL #3]

  (946) 0x45e6ac CMP	X16, X19

  (946) 0x45e6b0 B.EQ	45ea74

  (946) 0x45e6b4 LDR	X18, [X20, X0,LSL #3]

  (946) 0x45e6b8 ADD	X0, X0, #1

  (946) 0x45e6bc LDR	X1, [X22, X18,LSL #3]

  (946) 0x45e6c0 CMP	X1, X19

  (946) 0x45e6c4 B.EQ	45ea74

  (946) 0x45e6c8 LDR	X17, [X20, X0,LSL #3]

  (946) 0x45e6cc ADD	X0, X0, #1

  (946) 0x45e6d0 LDR	X13, [X22, X17,LSL #3]

  (946) 0x45e6d4 CMP	X13, X19

  (946) 0x45e6d8 B.EQ	45ea74

  (946) 0x45e6dc LDR	X12, [X20, X0,LSL #3]

  (946) 0x45e6e0 LDR	X14, [X22, X12,LSL #3]

  (946) 0x45e6e4 CMP	X14, X19

  (946) 0x45e6e8 B.EQ	45ea74

  (946) 0x45e6ec ADD	X0, X0, #1

  (946) 0x45e6f0 CMP	X0, X3

  (946) 0x45e6f4 B.EQ	45e7a0

    (948) 0x45e6f8 LDR	X18, [X20, X0,LSL #3]

    (948) 0x45e6fc ADD	X10, X0, #1

    (948) 0x45e700 ADD	X16, X0, #3

    (948) 0x45e704 ADD	X15, X0, #4

    (948) 0x45e708 ADD	X14, X0, #5

    (948) 0x45e70c ADD	X13, X0, #6

    (948) 0x45e710 ADD	X17, X0, #7

    (948) 0x45e714 ADD	X12, X10, #1

    (948) 0x45e718 ADD	X0, X0, #8

    (948) 0x45e71c LDR	X1, [X22, X18,LSL #3]

    (948) 0x45e720 CMP	X1, X19

    (948) 0x45e724 B.EQ	45ea74

    (948) 0x45e728 LDR	X10, [X20, X10,LSL #3]

    (948) 0x45e72c LDR	X18, [X22, X10,LSL #3]

    (948) 0x45e730 CMP	X18, X19

    (948) 0x45e734 B.EQ	45ea74

    (948) 0x45e738 LDR	X12, [X20, X12,LSL #3]

    (948) 0x45e73c LDR	X1, [X22, X12,LSL #3]

    (948) 0x45e740 CMP	X1, X19

    (948) 0x45e744 B.EQ	45ea74

    (948) 0x45e748 LDR	X16, [X20, X16,LSL #3]

    (948) 0x45e74c LDR	X10, [X22, X16,LSL #3]

    (948) 0x45e750 CMP	X10, X19

    (948) 0x45e754 B.EQ	45ea74

    (948) 0x45e758 LDR	X15, [X20, X15,LSL #3]

    (948) 0x45e75c LDR	X18, [X22, X15,LSL #3]

    (948) 0x45e760 CMP	X18, X19

    (948) 0x45e764 B.EQ	45ea74

    (948) 0x45e768 LDR	X14, [X20, X14,LSL #3]

    (948) 0x45e76c LDR	X12, [X22, X14,LSL #3]

    (948) 0x45e770 CMP	X12, X19

    (948) 0x45e774 B.EQ	45ea74

    (948) 0x45e778 LDR	X13, [X20, X13,LSL #3]

    (948) 0x45e77c LDR	X1, [X22, X13,LSL #3]

    (948) 0x45e780 CMP	X1, X19

    (948) 0x45e784 B.EQ	45ea74

    (948) 0x45e788 LDR	X17, [X20, X17,LSL #3]

    (948) 0x45e78c LDR	X16, [X22, X17,LSL #3]

    (948) 0x45e790 CMP	X16, X19

    (948) 0x45e794 B.EQ	45ea74

    (948) 0x45e798 CMP	X0, X3

    (948) 0x45e79c B.NE	45e6f8

  (946) 0x45e7a0 LDR	X3, [X8, X7]

  (946) 0x45e7a4 LDR	X0, [X8, X2]

  (946) 0x45e7a8 CMP	X0, X3

  (946) 0x45e7ac B.GE	45e928

  (946) 0x45e7b0 SUB	X7, X3, X0

  (946) 0x45e7b4 ANDS	X10, X7, #4224

  (946) 0x45e7b8 B.EQ	45e880

  (946) 0x45e7bc CMP	X10, #1

  (946) 0x45e7c0 B.EQ	45e864

  (946) 0x45e7c4 CMP	X10, #2

  (946) 0x45e7c8 B.EQ	45e850

  (946) 0x45e7cc CMP	X10, #3

  (946) 0x45e7d0 B.EQ	45e83c

  (946) 0x45e7d4 CMP	X10, #4

  (946) 0x45e7d8 B.EQ	45e828

  (946) 0x45e7dc CMP	X10, #5

  (946) 0x45e7e0 B.EQ	45e814

  (946) 0x45e7e4 CMP	X10, #6

  (946) 0x45e7e8 B.EQ	45e800

  (946) 0x45e7ec LDR	X15, [X21, X0,LSL #3]

  (946) 0x45e7f0 ADD	X0, X0, #1

  (946) 0x45e7f4 LDR	X18, [X26, X15,LSL #3]

  (946) 0x45e7f8 CMP	X18, X19

  (946) 0x45e7fc B.EQ	45ea74

  (946) 0x45e800 LDR	X14, [X21, X0,LSL #3]

  (946) 0x45e804 ADD	X0, X0, #1

  (946) 0x45e808 LDR	X12, [X26, X14,LSL #3]

  (946) 0x45e80c CMP	X12, X19

  (946) 0x45e810 B.EQ	45ea74

  (946) 0x45e814 LDR	X13, [X21, X0,LSL #3]

  (946) 0x45e818 ADD	X0, X0, #1

  (946) 0x45e81c LDR	X1, [X26, X13,LSL #3]

  (946) 0x45e820 CMP	X1, X19

  (946) 0x45e824 B.EQ	45ea74

  (946) 0x45e828 LDR	X17, [X21, X0,LSL #3]

  (946) 0x45e82c ADD	X0, X0, #1

  (946) 0x45e830 LDR	X16, [X26, X17,LSL #3]

  (946) 0x45e834 CMP	X16, X19

  (946) 0x45e838 B.EQ	45ea74

  (946) 0x45e83c LDR	X7, [X21, X0,LSL #3]

  (946) 0x45e840 ADD	X0, X0, #1

  (946) 0x45e844 LDR	X10, [X26, X7,LSL #3]

  (946) 0x45e848 CMP	X10, X19

  (946) 0x45e84c B.EQ	45ea74

  (946) 0x45e850 LDR	X15, [X21, X0,LSL #3]

  (946) 0x45e854 ADD	X0, X0, #1

  (946) 0x45e858 LDR	X18, [X26, X15,LSL #3]

  (946) 0x45e85c CMP	X18, X19

  (946) 0x45e860 B.EQ	45ea74

  (946) 0x45e864 LDR	X14, [X21, X0,LSL #3]

  (946) 0x45e868 LDR	X12, [X26, X14,LSL #3]

  (946) 0x45e86c CMP	X12, X19

  (946) 0x45e870 B.EQ	45ea74

  (946) 0x45e874 ADD	X0, X0, #1

  (946) 0x45e878 CMP	X0, X3

  (946) 0x45e87c B.EQ	45e928

    (947) 0x45e880 LDR	X17, [X21, X0,LSL #3]

    (947) 0x45e884 ADD	X1, X0, #1

    (947) 0x45e888 ADD	X10, X0, #3

    (947) 0x45e88c ADD	X15, X0, #4

    (947) 0x45e890 ADD	X18, X0, #5

    (947) 0x45e894 ADD	X7, X0, #6

    (947) 0x45e898 ADD	X13, X0, #7

    (947) 0x45e89c ADD	X16, X1, #1

    (947) 0x45e8a0 ADD	X0, X0, #8

    (947) 0x45e8a4 LDR	X14, [X26, X17,LSL #3]

    (947) 0x45e8a8 CMP	X14, X19

    (947) 0x45e8ac B.EQ	45ea74

    (947) 0x45e8b0 LDR	X12, [X21, X1,LSL #3]

    (947) 0x45e8b4 LDR	X1, [X26, X12,LSL #3]

    (947) 0x45e8b8 CMP	X1, X19

    (947) 0x45e8bc B.EQ	45ea74

    (947) 0x45e8c0 LDR	X17, [X21, X16,LSL #3]

    (947) 0x45e8c4 LDR	X16, [X26, X17,LSL #3]

    (947) 0x45e8c8 CMP	X16, X19

    (947) 0x45e8cc B.EQ	45ea74

    (947) 0x45e8d0 LDR	X10, [X21, X10,LSL #3]

    (947) 0x45e8d4 LDR	X14, [X26, X10,LSL #3]

    (947) 0x45e8d8 CMP	X14, X19

    (947) 0x45e8dc B.EQ	45ea74

    (947) 0x45e8e0 LDR	X15, [X21, X15,LSL #3]

    (947) 0x45e8e4 LDR	X12, [X26, X15,LSL #3]

    (947) 0x45e8e8 CMP	X12, X19

    (947) 0x45e8ec B.EQ	45ea74

    (947) 0x45e8f0 LDR	X18, [X21, X18,LSL #3]

    (947) 0x45e8f4 LDR	X1, [X26, X18,LSL #3]

    (947) 0x45e8f8 CMP	X1, X19

    (947) 0x45e8fc B.EQ	45ea74

    (947) 0x45e900 LDR	X7, [X21, X7,LSL #3]

    (947) 0x45e904 LDR	X17, [X26, X7,LSL #3]

    (947) 0x45e908 CMP	X17, X19

    (947) 0x45e90c B.EQ	45ea74

    (947) 0x45e910 LDR	X13, [X21, X13,LSL #3]

    (947) 0x45e914 LDR	X16, [X26, X13,LSL #3]

    (947) 0x45e918 CMP	X16, X19

    (947) 0x45e91c B.EQ	45ea74

    (947) 0x45e920 CMP	X0, X3

    (947) 0x45e924 B.NE	45e880

  (946) 0x45e928 SUB	X4, X4, #1

  (946) 0x45e92c CMP	X23, X4

  (946) 0x45e930 B.LE	45e608

(943) 0x45e934 LDR	X8, [SP, #120]

(943) 0x45e938 ADD	X6, X19, #2

(943) 0x45e93c MOVZ	X2, #1

(943) 0x45e940 ADD	X1, SP, #808

(943) 0x45e944 ADD	X0, SP, #816

(943) 0x45e948 STR	X11, [SP, #304]

(943) 0x45e94c LDR	X9, [SP, #240]

(943) 0x45e950 STR	X6, [SP, #288]

(943) 0x45e954 LDR	X3, [SP, #160]

(943) 0x45e958 SUB	X10, X8, X23

(943) 0x45e95c LDR	X4, [SP, #224]

(943) 0x45e960 STR	X23, [X9, X19,LSL #3]

(943) 0x45e964 LDR	X5, [SP, #400]

(943) 0x45e968 STR	X10, [SP, #232]

(943) 0x45e96c STP	X6, X30, [SP, #328]

(943) 0x45e970 STR	X10, [SP, #816]

(943) 0x45e974 BL	52daf0

(943) 0x45e978 LDR	X4, [SP, #200]

(943) 0x45e97c MOVZ	X9, #0

(943) 0x45e980 LDR	X15, [SP, #152]

(943) 0x45e984 LDR	X2, [SP, #184]

(943) 0x45e988 ADD	X3, X4, #8

(943) 0x45e98c LDR	X11, [SP, #304]

(943) 0x45e990 LDR	X10, [SP, #336]

(943) 0x45e994 ADD	X14, X3, X2

(943) 0x45e998 CMP	X15, #0

(943) 0x45e99c B.LE	45e9f8

  (944) 0x45e9a0 LDP	X0, X30, [X3, #1016]

  (944) 0x45e9a4 CMP	X0, X30

  (944) 0x45e9a8 B.GE	45e9ec

  (944) 0x45e9ac SUB	X12, XZR, X0,LSL #3

  (944) 0x45e9b0 ORR	X18, XZR, X0

  (944) 0x45e9b4 ADD	X1, X12, X9,LSL #3

  (944) 0x45e9b8 ADD	X7, X24, X1

  (944) 0x45e9bc HINT	#0

    (945) 0x45e9c0 LDR	X17, [X25, X0,LSL #3]

    (945) 0x45e9c4 ORR	X13, XZR, X0

    (945) 0x45e9c8 LDR	X16, [X22, X17,LSL #3]

    (945) 0x45e9cc STR	X16, [X7, X0,LSL #3]

    (945) 0x45e9d0 ADD	X0, X0, #1

    (945) 0x45e9d4 LDR	X6, [X3]

    (945) 0x45e9d8 CMP	X6, X0

    (945) 0x45e9dc B.GT	45e9c0

  (944) 0x45e9e0 ADD	X5, X9, #1

  (944) 0x45e9e4 SUB	X8, X13, X18

  (944) 0x45e9e8 ADD	X9, X5, X8

  (944) 0x45e9ec ADD	X3, X3, #8

  (944) 0x45e9f0 CMP	X3, X14

  (944) 0x45e9f4 B.NE	45e9a0

(943) 0x45e9f8 LDR	X4, [SP, #832]

(943) 0x45e9fc CMP	X4, #1

(943) 0x45ea00 B.LE	45ea2c

(943) 0x45ea04 LDR	X1, [SP, #344]

(943) 0x45ea08 ORR	X3, XZR, X26

(943) 0x45ea0c ORR	X2, XZR, X24

(943) 0x45ea10 MOVZ	X0, #11

(943) 0x45ea14 STR	X11, [SP, #304]

(943) 0x45ea18 STR	X10, [SP, #336]

(943) 0x45ea1c BL	4e46a4

(943) 0x45ea20 BL	4e4eac

(943) 0x45ea24 LDR	X11, [SP, #304]

(943) 0x45ea28 LDR	X10, [SP, #336]

(943) 0x45ea2c LDR	X2, [SP, #808]

(943) 0x45ea30 CBZ	X2, 46204c

(943) 0x45ea34 CMP	X19, #8

(943) 0x45ea38 B.EQ	45ec6c

(943) 0x45ea3c CMP	X11, X10

(943) 0x45ea40 B.LT	45eb78

(943) 0x45ea44 ORR	X30, XZR, X23

(943) 0x45ea48 B	45e5ec

  (952) 0x45ea4c LDR	X3, [X12, X2]

  (952) 0x45ea50 ADD	X0, X0, #1

  (952) 0x45ea54 ADD	X4, X4, #1

  (952) 0x45ea58 ADD	X24, X3, #1

  (952) 0x45ea5c STR	X24, [X12, X2]

  (952) 0x45ea60 STR	X17, [X11]

  (952) 0x45ea64 LDR	X3, [X21]

  (952) 0x45ea68 CMP	X3, X0

  (952) 0x45ea6c B.GT	45e2e0

(902) 0x45ea70 B	45e2fc

  (946) 0x45ea74 UBFM	X3, X23, #61, #60

  (946) 0x45ea78 ADD	X23, X23, #1

  (946) 0x45ea7c LDR	X0, [X27, X3]

  (946) 0x45ea80 STR	X0, [X9]

  (946) 0x45ea84 STR	X5, [X27, X3]

  (946) 0x45ea88 STR	X28, [X22, X2]

  (946) 0x45ea8c B	45e92c

0x45ea90 LDR	X27, [SP, #192]

0x45ea94 MOVZ	X1, #8

0x45ea98 STR	X6, [SP, #168]

0x45ea9c ORR	X0, XZR, X27

0x45eaa0 BL	52b308

0x45eaa4 MOVZ	X1, #8

0x45eaa8 ORR	X26, XZR, X0

0x45eaac ORR	X0, XZR, X27

0x45eab0 BL	52b308

0x45eab4 ORR	X4, XZR, X0

0x45eab8 MOVZ	X1, #8

0x45eabc ORR	X0, XZR, X27

0x45eac0 STR	X4, [SP, #536]

0x45eac4 BL	52b308

0x45eac8 ORR	X24, XZR, X0

0x45eacc LDR	X0, [SP, #496]

0x45ead0 MOVZ	X1, #8

0x45ead4 BL	52b308

0x45ead8 LDR	X6, [SP, #168]

0x45eadc STR	X0, [SP, #136]

0x45eae0 B	45dcfc

0x45eae4 MOVZ	X1, #8

0x45eae8 BL	52b308

0x45eaec LDR	X14, [SP, #168]

0x45eaf0 STR	X0, [SP, #512]

0x45eaf4 B	45e028

0x45eaf8 MOVZ	X1, #8

0x45eafc STR	X6, [SP, #136]

0x45eb00 BL	52b308

0x45eb04 LDR	X26, [SP, #432]

0x45eb08 STR	X0, [SP, #352]

0x45eb0c LDR	X6, [SP, #136]

0x45eb10 CMP	X26, #1

0x45eb14 B.GT	4622c0

0x45eb18 LDR	X30, [SP, #832]

0x45eb1c STR	XZR, [SP, #424]

0x45eb20 CMP	X30, #1

0x45eb24 B.GT	45db08

0x45eb28 MOVZ	X0, #1

0x45eb2c MOVZ	X20, #0

0x45eb30 STR	XZR, [SP, #152]

0x45eb34 STR	XZR, [SP, #176]

0x45eb38 STR	X0, [SP, #552]

0x45eb3c B	45dcac

0x45eb40 MOVZ	X1, #8

0x45eb44 BL	52b308

0x45eb48 LDR	X6, [SP, #136]

0x45eb4c STR	X0, [SP, #360]

0x45eb50 B	45daec

0x45eb54 LDR	X17, [SP, #264]

0x45eb58 STR	XZR, [SP, #272]

0x45eb5c STP	XZR, XZR, [X17]

0x45eb60 TBZ	X27, #63, 45e288

0x45eb64 MOVZ	X28, #0

0x45eb68 MOVZ	X23, #0

0x45eb6c LDR	X24, [SP, #120]

0x45eb70 STR	XZR, [SP, #208]

0x45eb74 B	45e4d0

0x45eb78 LDR	X28, [SP, #168]

0x45eb7c ORR	X27, XZR, X23

0x45eb80 ORR	X23, XZR, X20

0x45eb84 ORR	X20, XZR, X24

0x45eb88 LDR	X19, [SP, #328]

(940) 0x45eb8c LDP	X4, X14, [SP, #224]

(940) 0x45eb90 ADD	X19, X19, #1

(940) 0x45eb94 MOVZ	X2, #1

(940) 0x45eb98 ADD	X1, SP, #808

(940) 0x45eb9c ADD	X0, SP, #816

(940) 0x45eba0 ORR	X24, XZR, X19

(940) 0x45eba4 LDR	X15, [SP, #264]

(940) 0x45eba8 LDR	X3, [SP, #160]

(940) 0x45ebac LDR	X5, [SP, #400]

(940) 0x45ebb0 STR	X27, [X15, X19,LSL #3]

(940) 0x45ebb4 STR	X14, [SP, #816]

(940) 0x45ebb8 BL	52daf0

(940) 0x45ebbc LDR	X12, [SP, #152]

(940) 0x45ebc0 CMP	X12, #0

(940) 0x45ebc4 B.LE	45ec30

(940) 0x45ebc8 LDR	X30, [SP, #200]

(940) 0x45ebcc MOVZ	X11, #0

(940) 0x45ebd0 LDR	X18, [SP, #184]

(940) 0x45ebd4 ADD	X1, X30, #8

(940) 0x45ebd8 ADD	X17, X1, X18

  (941) 0x45ebdc LDP	X0, X7, [X1, #1016]

  (941) 0x45ebe0 CMP	X7, X0

  (941) 0x45ebe4 B.LE	45ec24

  (941) 0x45ebe8 UBFM	X13, X11, #61, #60

  (941) 0x45ebec ORR	X16, XZR, X0

  (941) 0x45ebf0 SUB	X6, X13, X0,LSL #3

  (941) 0x45ebf4 ADD	X8, X20, X6

    (942) 0x45ebf8 LDR	X9, [X25, X0,LSL #3]

    (942) 0x45ebfc ORR	X4, XZR, X0

    (942) 0x45ec00 LDR	X3, [X22, X9,LSL #3]

    (942) 0x45ec04 STR	X3, [X8, X0,LSL #3]

    (942) 0x45ec08 ADD	X0, X0, #1

    (942) 0x45ec0c LDR	X10, [X1]

    (942) 0x45ec10 CMP	X10, X0

    (942) 0x45ec14 B.GT	45ebf8

  (941) 0x45ec18 ADD	X5, X11, #1

  (941) 0x45ec1c SUB	X2, X4, X16

  (941) 0x45ec20 ADD	X11, X5, X2

  (941) 0x45ec24 ADD	X1, X1, #8

  (941) 0x45ec28 CMP	X17, X1

  (941) 0x45ec2c B.NE	45ebdc

(940) 0x45ec30 LDR	X21, [SP, #832]

(940) 0x45ec34 CMP	X21, #1

(940) 0x45ec38 B.LE	45ec54

(940) 0x45ec3c LDR	X1, [SP, #344]

(940) 0x45ec40 ORR	X3, XZR, X26

(940) 0x45ec44 ORR	X2, XZR, X20

(940) 0x45ec48 MOVZ	X0, #11

(940) 0x45ec4c BL	4e46a4

(940) 0x45ec50 BL	4e4eac

(940) 0x45ec54 LDR	X14, [SP, #808]

(940) 0x45ec58 CBZ	X14, 462520

(940) 0x45ec5c CMP	X19, #10

(940) 0x45ec60 B.NE	45eb8c

0x45ec64 ORR	X21, XZR, X23

0x45ec68 B	45ec78

0x45ec6c LDR	X28, [SP, #168]

0x45ec70 ORR	X21, XZR, X20

0x45ec74 ORR	X20, XZR, X24

0x45ec78 MOVZ	X24, #10

0x45ec7c MOVZ	X23, #80

0x45ec80 STR	X24, [SP, #328]

0x45ec84 STR	X23, [SP, #632]

0x45ec88 ORR	X0, XZR, X20

0x45ec8c STR	X21, [SP, #120]

0x45ec90 BL	52b3a0

0x45ec94 MOVZ	X1, #8

0x45ec98 ORR	X0, XZR, X24

0x45ec9c BL	52b308

0x45eca0 ORR	X19, XZR, X0

0x45eca4 LDR	X0, [SP, #208]

0x45eca8 MOVZ	X1, #8

0x45ecac STR	X19, [SP, #208]

0x45ecb0 BL	52b308

0x45ecb4 LDR	X20, [SP, #312]

0x45ecb8 ORR	X15, XZR, X0

0x45ecbc MOVZ	X1, #8

0x45ecc0 STR	X15, [X19, #8]

0x45ecc4 ORR	X0, XZR, X20

0x45ecc8 BL	52b308

0x45eccc ORR	X12, XZR, X0

0x45ecd0 MOVZ	X1, #8

0x45ecd4 ORR	X0, XZR, X20

0x45ecd8 STR	X12, [SP, #408]

0x45ecdc BL	52b308

0x45ece0 LDR	X18, [SP, #832]

0x45ece4 STR	X0, [SP, #416]

0x45ece8 LDR	X6, [SP, #120]

0x45ecec CMP	X18, #1

0x45ecf0 B.GT	461e30

0x45ecf4 LDR	X30, [SP, #264]

0x45ecf8 MOVZ	X7, #0

0x45ecfc STR	XZR, [SP, #184]

0x45ed00 STR	XZR, [SP, #472]

0x45ed04 STR	XZR, [SP, #520]

0x45ed08 STR	XZR, [SP, #528]

0x45ed0c ADD	X17, X30, #8

0x45ed10 LDP	X5, X16, [X17]

0x45ed14 CMP	X5, X16

0x45ed18 B.GE	461eb0

0x45ed1c LDR	X11, [SP, #184]

0x45ed20 MOVZ	X4, #0

0x45ed24 LDP	X14, X15, [SP, #480]

0x45ed28 LDR	X27, [SP, #208]

0x45ed2c LDR	X23, [SP, #248]

0x45ed30 LDR	X18, [SP, #280]

0x45ed34 LDR	X10, [SP, #320]

0x45ed38 LDR	X13, [SP, #352]

0x45ed3c LDR	X28, [SP, #392]

0x45ed40 LDR	X12, [SP, #536]

(903) 0x45ed44 LDR	X0, [X18, X5,LSL #3]

(903) 0x45ed48 LDR	X2, [SP, #408]

(903) 0x45ed4c LDR	X1, [SP, #416]

(903) 0x45ed50 UBFM	X8, X0, #61, #60

(903) 0x45ed54 ADD	X19, X8, #8

(903) 0x45ed58 STR	X4, [X2, X8]

(903) 0x45ed5c ADD	X20, X14, X19

(903) 0x45ed60 STR	X7, [X1, X8]

(903) 0x45ed64 LDR	X16, [X14, X8]

(903) 0x45ed68 LDR	X1, [X14, X19]

(903) 0x45ed6c CMP	X16, X1

(903) 0x45ed70 B.GE	45eda0

(903) 0x45ed74 HINT	#0

(903) 0x45ed78 HINT	#0

(903) 0x45ed7c HINT	#0

  (939) 0x45ed80 LDR	X21, [X6, X16,LSL #3]

  (939) 0x45ed84 UBFM	X9, X21, #61, #60

  (939) 0x45ed88 LDR	X17, [X10, X9]

  (939) 0x45ed8c CMP	X17, #1

  (939) 0x45ed90 B.EQ	4602b4

  (939) 0x45ed94 ADD	X16, X16, #1

  (939) 0x45ed98 CMP	X16, X1

  (939) 0x45ed9c B.LT	45ed80

(903) 0x45eda0 LDR	X9, [X15, X8]

(903) 0x45eda4 ADD	X8, X15, X19

(903) 0x45eda8 LDR	X2, [X15, X19]

(903) 0x45edac CMP	X9, X2

(903) 0x45edb0 B.GE	45ede0

(903) 0x45edb4 HINT	#0

(903) 0x45edb8 HINT	#0

(903) 0x45edbc HINT	#0

  (938) 0x45edc0 LDR	X19, [X28, X9,LSL #3]

  (938) 0x45edc4 UBFM	X20, X19, #61, #60

  (938) 0x45edc8 LDR	X21, [X13, X20]

  (938) 0x45edcc CMP	X21, #1

  (938) 0x45edd0 B.EQ	46027c

  (938) 0x45edd4 ADD	X9, X9, #1

  (938) 0x45edd8 CMP	X9, X2

  (938) 0x45eddc B.LT	45edc0

(903) 0x45ede0 LDR	X3, [X30, #16]

(903) 0x45ede4 ADD	X5, X5, #1

(903) 0x45ede8 CMP	X3, X5

(903) 0x45edec B.GT	45ed44

0x45edf0 LDR	X30, [SP, #128]

0x45edf4 ADD	X11, X30, X4

0x45edf8 STR	X11, [SP, #624]

0x45edfc LDR	X27, [SP, #832]

0x45ee00 CMP	X27, #1

0x45ee04 B.GT	461d24

0x45ee08 LDR	X17, [SP, #328]

0x45ee0c MOVZ	X24, #0

0x45ee10 STR	XZR, [SP, #304]

0x45ee14 STR	XZR, [SP, #336]

0x45ee18 STR	XZR, [SP, #376]

0x45ee1c STP	XZR, XZR, [SP, #456]

0x45ee20 CMP	X17, #2

0x45ee24 B.EQ	461e24

0x45ee28 ADRP	X5,

0x45ee2c MOVZ	X3, #0

0x45ee30 LDR	D31, [SP, #144]

0x45ee34 MOVZ	X19, #1

0x45ee38 MOVZ	X23, #2

0x45ee3c STR	X24, [SP, #560]

0x45ee40 ADD	X24, X5, #1580

0x45ee44 LDR	X0, [SP, #176]

0x45ee48 STR	X25, [SP, #568]

0x45ee4c ORR	X25, XZR, X22

0x45ee50 MOVN	X22, #0

0x45ee54 LDR	X27, [SP, #264]

0x45ee58 DUP	V0.2D, V31.D[0]

0x45ee5c STR	X6, [SP, #736]

0x45ee60 LDR	X18, [SP, #464]

0x45ee64 ADD	X30, X0, #1

0x45ee68 STR	XZR, [SP, #224]

0x45ee6c LDR	X21, [SP, #520]

0x45ee70 UBFM	X11, X30, #61, #60

0x45ee74 ADD	X6, X27, #8

0x45ee78 STR	X3, [SP, #384]

0x45ee7c LDR	X20, [SP, #528]

0x45ee80 ADD	X27, X18, #8

0x45ee84 STR	XZR, [SP, #504]

0x45ee88 STR	XZR, [SP, #544]

0x45ee8c STR	X22, [SP, #576]

0x45ee90 STR	X7, [SP, #696]

0x45ee94 STR	X11, [SP, #744]

0x45ee98 STR	X6, [SP, #752]

0x45ee9c STR	Q0, [SP, #768]

0x45eea0 STR	X24, [SP, #784]

(905) 0x45eea4 LDR	X28, [SP, #832]

(905) 0x45eea8 CMP	X28, #1

(905) 0x45eeac B.GT	460620

(905) 0x45eeb0 LDR	X10, [SP, #152]

(905) 0x45eeb4 CMP	X10, #0

(905) 0x45eeb8 B.LE	45f3e0

(905) 0x45eebc LDR	X30, [SP, #200]

(905) 0x45eec0 ORR	X17, XZR, X23

(905) 0x45eec4 MOVZ	X3, #0

(905) 0x45eec8 LDP	X23, X24, [SP, #408]

(905) 0x45eecc MOVZ	X14, #0

(905) 0x45eed0 STR	X26, [SP, #232]

(905) 0x45eed4 LDR	Q1, [SP, #768]

(905) 0x45eed8 ADD	X22, X30, #8

(905) 0x45eedc LDR	X16, [SP, #144]

(905) 0x45eee0 LDR	X15, [SP, #216]

(905) 0x45eee4 LDR	X26, [SP, #256]

(905) 0x45eee8 LDR	X18, [SP, #384]

(905) 0x45eeec LDR	X9, [SP, #568]

  (933) 0x45eef0 LDR	X28, [SP, #200]

  (933) 0x45eef4 LDR	X5, [X22, X14,LSL #3]

  (933) 0x45eef8 LDR	X1, [X28, X14,LSL #3]

  (933) 0x45eefc CMP	X1, X5

  (933) 0x45ef00 B.GE	45f3bc

  (933) 0x45ef04 ORR	X30, XZR, X17

  (933) 0x45ef08 B	45ef18

    (934) 0x45ef0c ADD	X1, X1, #1

    (934) 0x45ef10 CMP	X1, X5

    (934) 0x45ef14 B.GE	45f3b8

    (934) 0x45ef18 LDR	X6, [X9, X1,LSL #3]

    (934) 0x45ef1c UBFM	X0, X6, #61, #60

    (934) 0x45ef20 LDR	X10, [X25, X0]

    (934) 0x45ef24 CMP	X10, X19

    (934) 0x45ef28 B.NE	45ef0c

    (934) 0x45ef2c ADD	X13, X0, #8

    (934) 0x45ef30 LDR	X5, [X23, X0]

    (934) 0x45ef34 LDR	X10, [X26, X13]

    (934) 0x45ef38 ADD	X12, X10, X5

    (934) 0x45ef3c CMP	X5, X12

    (934) 0x45ef40 B.GE	45f21c

    (934) 0x45ef44 LDR	X4, [SP, #208]

    (934) 0x45ef48 SUB	X8, X10, #1

    (934) 0x45ef4c LDR	X11, [X4, X19,LSL #3]

    (934) 0x45ef50 CMP	X8, #3

    (934) 0x45ef54 B.LS	460308

    (934) 0x45ef58 ADD	X2, X5, #1

    (934) 0x45ef5c ADD	X4, X18, X3,LSL #3

    (934) 0x45ef60 UBFM	X17, X3, #61, #60

    (934) 0x45ef64 ADD	X6, X11, X2,LSL #3

    (934) 0x45ef68 UBFM	X28, X2, #61, #60

    (934) 0x45ef6c STR	X17, [SP, #120]

    (934) 0x45ef70 SUB	X8, X4, X6

    (934) 0x45ef74 CMP	X8, #16

    (934) 0x45ef78 B.LS	460314

    (934) 0x45ef7c UBFM	X17, X10, #2, #63

    (934) 0x45ef80 SUB	X7, X28, #8

    (934) 0x45ef84 UBFM	X28, X17, #59, #58

    (934) 0x45ef88 ADD	X6, X11, X7

    (934) 0x45ef8c SUB	X17, X28, #32

    (934) 0x45ef90 STR	X7, [SP, #136]

    (934) 0x45ef94 MOVZ	X2, #0

    (934) 0x45ef98 UBFM	X17, X17, #5, #63

    (934) 0x45ef9c ADD	X8, X6, #16

    (934) 0x45efa0 ADD	X17, X17, #1

    (934) 0x45efa4 ADD	X7, X4, #16

    (934) 0x45efa8 ANDS	X17, X17, #4224

    (934) 0x45efac B.EQ	45f0b4

    (934) 0x45efb0 CMP	X17, #1

    (934) 0x45efb4 B.EQ	45f090

    (934) 0x45efb8 CMP	X17, #2

    (934) 0x45efbc B.EQ	45f074

    (934) 0x45efc0 CMP	X17, #3

    (934) 0x45efc4 B.EQ	45f058

    (934) 0x45efc8 CMP	X17, #4

    (934) 0x45efcc B.EQ	45f03c

    (934) 0x45efd0 CMP	X17, #5

    (934) 0x45efd4 B.EQ	45f020

    (934) 0x45efd8 CMP	X17, #6

    (934) 0x45efdc B.EQ	45f004

    (934) 0x45efe0 LDR	X2, [SP, #136]

    (934) 0x45efe4 LDR	Q30, [X6, #16]

    (934) 0x45efe8 LDR	X17, [SP, #120]

    (934) 0x45efec LDR	Q29, [X11, X2]

    (934) 0x45eff0 MOVZ	X2, #32

    (934) 0x45eff4 ADD	V2.2D, V30.2D, V1.2D

    (934) 0x45eff8 ADD	V3.2D, V29.2D, V1.2D

    (934) 0x45effc STR	Q3, [X18, X17]

    (934) 0x45f000 STR	Q2, [X4, #16]

    (934) 0x45f004 LDR	Q4, [X6, X2]

    (934) 0x45f008 LDR	Q5, [X8, X2]

    (934) 0x45f00c ADD	V6.2D, V4.2D, V1.2D

    (934) 0x45f010 ADD	V7.2D, V5.2D, V1.2D

    (934) 0x45f014 STR	Q6, [X4, X2]

    (934) 0x45f018 STR	Q7, [X7, X2]

    (934) 0x45f01c ADD	X2, X2, #32

    (934) 0x45f020 LDR	Q16, [X6, X2]

    (934) 0x45f024 LDR	Q17, [X8, X2]

    (934) 0x45f028 ADD	V18.2D, V16.2D, V1.2D

    (934) 0x45f02c ADD	V19.2D, V17.2D, V1.2D

    (934) 0x45f030 STR	Q18, [X4, X2]

    (934) 0x45f034 STR	Q19, [X7, X2]

    (934) 0x45f038 ADD	X2, X2, #32

    (934) 0x45f03c LDR	Q20, [X6, X2]

    (934) 0x45f040 LDR	Q21, [X8, X2]

    (934) 0x45f044 ADD	V22.2D, V20.2D, V1.2D

    (934) 0x45f048 ADD	V23.2D, V21.2D, V1.2D

    (934) 0x45f04c STR	Q22, [X4, X2]

    (934) 0x45f050 STR	Q23, [X7, X2]

    (934) 0x45f054 ADD	X2, X2, #32

    (934) 0x45f058 LDR	Q24, [X6, X2]

    (934) 0x45f05c LDR	Q25, [X8, X2]

    (934) 0x45f060 ADD	V26.2D, V24.2D, V1.2D

    (934) 0x45f064 ADD	V27.2D, V25.2D, V1.2D

    (934) 0x45f068 STR	Q26, [X4, X2]

    (934) 0x45f06c STR	Q27, [X7, X2]

    (934) 0x45f070 ADD	X2, X2, #32

    (934) 0x45f074 LDR	Q28, [X6, X2]

    (934) 0x45f078 LDR	Q31, [X8, X2]

    (934) 0x45f07c ADD	V0.2D, V28.2D, V1.2D

    (934) 0x45f080 ADD	V30.2D, V31.2D, V1.2D

    (934) 0x45f084 STR	Q0, [X4, X2]

    (934) 0x45f088 STR	Q30, [X7, X2]

    (934) 0x45f08c ADD	X2, X2, #32

    (934) 0x45f090 LDR	Q2, [X6, X2]

    (934) 0x45f094 LDR	Q3, [X8, X2]

    (934) 0x45f098 ADD	V29.2D, V2.2D, V1.2D

    (934) 0x45f09c ADD	V4.2D, V3.2D, V1.2D

    (934) 0x45f0a0 STR	Q29, [X4, X2]

    (934) 0x45f0a4 STR	Q4, [X7, X2]

    (934) 0x45f0a8 ADD	X2, X2, #32

    (934) 0x45f0ac CMP	X28, X2

    (934) 0x45f0b0 B.EQ	45f1b4

    (934) 0x45f0b4 STR	X0, [SP, #120]

    (934) 0x45f0b8 STR	X13, [SP, #136]

    (934) 0x45f0bc STP	X10, X11, [SP, #160]

      (937) 0x45f0c0 ADD	X0, X2, #32

      (937) 0x45f0c4 ADD	X17, X2, #64

      (937) 0x45f0c8 ADD	X13, X2, #96

      (937) 0x45f0cc ADD	X11, X2, #128

      (937) 0x45f0d0 LDR	Q5, [X6, X2]

      (937) 0x45f0d4 ADD	X10, X2, #160

      (937) 0x45f0d8 LDR	Q6, [X8, X2]

      (937) 0x45f0dc ADD	V7.2D, V5.2D, V1.2D

      (937) 0x45f0e0 ADD	V16.2D, V6.2D, V1.2D

      (937) 0x45f0e4 STR	Q7, [X4, X2]

      (937) 0x45f0e8 STR	Q16, [X7, X2]

      (937) 0x45f0ec LDR	Q17, [X6, X0]

      (937) 0x45f0f0 LDR	Q18, [X8, X0]

      (937) 0x45f0f4 ADD	V19.2D, V17.2D, V1.2D

      (937) 0x45f0f8 ADD	V20.2D, V18.2D, V1.2D

      (937) 0x45f0fc STR	Q19, [X4, X0]

      (937) 0x45f100 STR	Q20, [X7, X0]

      (937) 0x45f104 ADD	X0, X2, #192

      (937) 0x45f108 LDR	Q21, [X6, X17]

      (937) 0x45f10c LDR	Q22, [X8, X17]

      (937) 0x45f110 ADD	V23.2D, V21.2D, V1.2D

      (937) 0x45f114 ADD	V24.2D, V22.2D, V1.2D

      (937) 0x45f118 STR	Q23, [X4, X17]

      (937) 0x45f11c STR	Q24, [X7, X17]

      (937) 0x45f120 ADD	X17, X2, #224

      (937) 0x45f124 ADD	X2, X2, #256

      (937) 0x45f128 LDR	Q25, [X6, X13]

      (937) 0x45f12c LDR	Q26, [X8, X13]

      (937) 0x45f130 ADD	V27.2D, V25.2D, V1.2D

      (937) 0x45f134 ADD	V28.2D, V26.2D, V1.2D

      (937) 0x45f138 STR	Q27, [X4, X13]

      (937) 0x45f13c STR	Q28, [X7, X13]

      (937) 0x45f140 LDR	Q31, [X6, X11]

      (937) 0x45f144 LDR	Q0, [X8, X11]

      (937) 0x45f148 ADD	V2.2D, V31.2D, V1.2D

      (937) 0x45f14c ADD	V30.2D, V0.2D, V1.2D

      (937) 0x45f150 STR	Q2, [X4, X11]

      (937) 0x45f154 STR	Q30, [X7, X11]

      (937) 0x45f158 LDR	Q3, [X6, X10]

      (937) 0x45f15c LDR	Q4, [X8, X10]

      (937) 0x45f160 ADD	V29.2D, V3.2D, V1.2D

      (937) 0x45f164 ADD	V5.2D, V4.2D, V1.2D

      (937) 0x45f168 STR	Q29, [X4, X10]

      (937) 0x45f16c STR	Q5, [X7, X10]

      (937) 0x45f170 LDR	Q6, [X6, X0]

      (937) 0x45f174 LDR	Q7, [X8, X0]

      (937) 0x45f178 ADD	V16.2D, V6.2D, V1.2D

      (937) 0x45f17c ADD	V17.2D, V7.2D, V1.2D

      (937) 0x45f180 STR	Q16, [X4, X0]

      (937) 0x45f184 STR	Q17, [X7, X0]

      (937) 0x45f188 LDR	Q18, [X6, X17]

      (937) 0x45f18c LDR	Q19, [X8, X17]

      (937) 0x45f190 ADD	V20.2D, V18.2D, V1.2D

      (937) 0x45f194 ADD	V21.2D, V19.2D, V1.2D

      (937) 0x45f198 STR	Q20, [X4, X17]

      (937) 0x45f19c STR	Q21, [X7, X17]

      (937) 0x45f1a0 CMP	X28, X2

      (937) 0x45f1a4 B.NE	45f0c0

    (934) 0x45f1a8 LDR	X0, [SP, #120]

    (934) 0x45f1ac LDP	X10, X11, [SP, #160]

    (934) 0x45f1b0 LDR	X13, [SP, #136]

    (934) 0x45f1b4 AND	X4, X10, #8062

    (934) 0x45f1b8 ADD	X5, X5, X4

    (934) 0x45f1bc ADD	X28, X3, X4

    (934) 0x45f1c0 ANDS	XZR, X10, #4160

    (934) 0x45f1c4 B.EQ	45f218

    (934) 0x45f1c8 LDR	X6, [X11, X5,LSL #3]

    (934) 0x45f1cc ADD	X8, X5, #1

    (934) 0x45f1d0 ADD	X7, X6, X16

    (934) 0x45f1d4 STR	X7, [X18, X28,LSL #3]

    (934) 0x45f1d8 CMP	X8, X12

    (934) 0x45f1dc B.GE	45f218

    (934) 0x45f1e0 UBFM	X17, X8, #61, #60

    (934) 0x45f1e4 ADD	X2, X28, #1

    (934) 0x45f1e8 LDR	X4, [X11, X17]

    (934) 0x45f1ec UBFM	X28, X2, #61, #60

    (934) 0x45f1f0 ADD	X5, X5, #2

    (934) 0x45f1f4 ADD	X6, X4, X16

    (934) 0x45f1f8 STR	X6, [X18, X28]

    (934) 0x45f1fc CMP	X12, X5

    (934) 0x45f200 B.LE	45f218

    (934) 0x45f204 ADD	X12, X11, X17

    (934) 0x45f208 ADD	X11, X18, X28

    (934) 0x45f20c LDR	X8, [X12, #8]

    (934) 0x45f210 ADD	X7, X8, X16

    (934) 0x45f214 STR	X7, [X11, #8]

    (934) 0x45f218 ADD	X3, X3, X10

    (934) 0x45f21c LDR	X10, [X24, X0]

    (934) 0x45f220 LDR	X12, [X15, X13]

    (934) 0x45f224 ADD	X11, X10, X12

    (934) 0x45f228 CMP	X10, X11

    (934) 0x45f22c B.GE	45f3a8

    (934) 0x45f230 LDR	X5, [SP, #184]

    (934) 0x45f234 UBFM	X28, X10, #61, #60

    (934) 0x45f238 LDR	X17, [X5, X19,LSL #3]

    (934) 0x45f23c ADD	X8, X17, X11,LSL #3

    (934) 0x45f240 ADD	X2, X17, X10,LSL #3

    (934) 0x45f244 SUB	X7, X8, X2

    (934) 0x45f248 TBZ	W7, #3, 45f260

    (934) 0x45f24c LDR	X4, [X17, X28]

    (934) 0x45f250 LDR	X6, [X20, #8]

    (934) 0x45f254 CMP	X4, X6

    (934) 0x45f258 B.GE	45f310

    (934) 0x45f25c B	460210

      (935) 0x45f260 LDR	X13, [X2]

      (935) 0x45f264 LDR	X10, [X20, #8]

      (935) 0x45f268 CMP	X13, X10

      (935) 0x45f26c B.LT	4602e4

      (935) 0x45f270 CMP	X19, #1

      (935) 0x45f274 B.EQ	45f2fc

      (935) 0x45f278 LDR	X17, [X20, #16]

      (935) 0x45f27c CMP	X13, X17

      (935) 0x45f280 B.LT	460488

      (935) 0x45f284 CMP	X19, #2

      (935) 0x45f288 B.EQ	45f2fc

      (935) 0x45f28c LDR	X12, [X20, #24]

      (935) 0x45f290 CMP	X13, X12

      (935) 0x45f294 B.LT	460498

      (935) 0x45f298 CMP	X19, #3

      (935) 0x45f29c B.EQ	45f2fc

      (935) 0x45f2a0 LDR	X7, [X20, #32]

      (935) 0x45f2a4 CMP	X13, X7

      (935) 0x45f2a8 B.LT	4604b0

      (935) 0x45f2ac CMP	X19, #4

      (935) 0x45f2b0 B.EQ	45f2fc

      (935) 0x45f2b4 LDR	X5, [X20, #40]

      (935) 0x45f2b8 CMP	X5, X13

      (935) 0x45f2bc B.GT	4604b8

      (935) 0x45f2c0 CMP	X19, #5

      (935) 0x45f2c4 B.EQ	45f2fc

      (935) 0x45f2c8 LDR	X6, [X20, #48]

      (935) 0x45f2cc CMP	X13, X6

      (935) 0x45f2d0 B.LT	4604d0

      (935) 0x45f2d4 CMP	X19, #6

      (935) 0x45f2d8 B.EQ	45f2fc

      (935) 0x45f2dc LDR	X0, [X20, #56]

      (935) 0x45f2e0 CMP	X13, X0

      (935) 0x45f2e4 B.LT	4604e8

      (935) 0x45f2e8 CMP	X19, #8

      (935) 0x45f2ec B.NE	45f2fc

      (935) 0x45f2f0 LDR	X11, [X20, #64]

      (935) 0x45f2f4 CMP	X11, X13

      (935) 0x45f2f8 B.GT	4604f0

      (935) 0x45f2fc LDR	X4, [X2, #8]

      (935) 0x45f300 ADD	X2, X2, #8

      (935) 0x45f304 LDR	X7, [X20, #8]

      (935) 0x45f308 CMP	X4, X7

      (935) 0x45f30c B.LT	460210

      (935) 0x45f310 CMP	X19, #1

      (935) 0x45f314 B.EQ	45f39c

      (935) 0x45f318 LDR	X5, [X20, #16]

      (935) 0x45f31c CMP	X4, X5

      (935) 0x45f320 B.LT	4602dc

      (935) 0x45f324 CMP	X19, #2

      (935) 0x45f328 B.EQ	45f39c

      (935) 0x45f32c LDR	X6, [X20, #24]

      (935) 0x45f330 CMP	X4, X6

      (935) 0x45f334 B.LT	460490

      (935) 0x45f338 CMP	X19, #3

      (935) 0x45f33c B.EQ	45f39c

      (935) 0x45f340 LDR	X0, [X20, #32]

      (935) 0x45f344 CMP	X4, X0

      (935) 0x45f348 B.LT	4604a0

      (935) 0x45f34c CMP	X19, #4

      (935) 0x45f350 B.EQ	45f39c

      (935) 0x45f354 LDR	X11, [X20, #40]

      (935) 0x45f358 CMP	X11, X4

      (935) 0x45f35c B.GT	4604a8

      (935) 0x45f360 CMP	X19, #5

      (935) 0x45f364 B.EQ	45f39c

      (935) 0x45f368 LDR	X28, [X20, #48]

      (935) 0x45f36c CMP	X4, X28

      (935) 0x45f370 B.LT	4604c0

      (935) 0x45f374 CMP	X19, #6

      (935) 0x45f378 B.EQ	45f39c

      (935) 0x45f37c LDR	X10, [X20, #56]

      (935) 0x45f380 CMP	X4, X10

      (935) 0x45f384 B.LT	4604d8

      (935) 0x45f388 CMP	X19, #8

      (935) 0x45f38c B.NE	45f39c

      (935) 0x45f390 LDR	X17, [X20, #64]

      (935) 0x45f394 CMP	X17, X4

      (935) 0x45f398 B.GT	4604e0

      (935) 0x45f39c ADD	X2, X2, #8

      (935) 0x45f3a0 CMP	X2, X8

      (935) 0x45f3a4 B.NE	45f260

    (934) 0x45f3a8 LDR	X5, [X22, X14,LSL #3]

    (934) 0x45f3ac ADD	X1, X1, #1

    (934) 0x45f3b0 CMP	X1, X5

    (934) 0x45f3b4 B.LT	45ef18

  (933) 0x45f3b8 ORR	X17, XZR, X30

  (933) 0x45f3bc LDR	X30, [SP, #152]

  (933) 0x45f3c0 ADD	X14, X14, #1

  (933) 0x45f3c4 CMP	X30, X14

  (933) 0x45f3c8 B.GT	45eef0

(905) 0x45f3cc LDR	X26, [SP, #232]

(905) 0x45f3d0 ORR	X23, XZR, X17

(905) 0x45f3d4 LDR	X3, [SP, #832]

(905) 0x45f3d8 CMP	X3, #1

(905) 0x45f3dc B.GT	460504

(905) 0x45f3e0 LDR	X16, [SP, #176]

(905) 0x45f3e4 CMP	X16, #0

(905) 0x45f3e8 B.LE	45f5a4

(905) 0x45f3ec LDR	X16, [SP, #664]

(905) 0x45f3f0 MOVZ	X30, #0

(905) 0x45f3f4 MOVZ	X17, #0

(905) 0x45f3f8 MOVZ	X28, #0

(905) 0x45f3fc ORR	X18, XZR, X30

(905) 0x45f400 STR	X25, [SP, #792]

(905) 0x45f404 LDR	X22, [SP, #560]

(905) 0x45f408 ORR	X15, XZR, X26

(905) 0x45f40c ORR	X25, XZR, X23

(905) 0x45f410 STP	X20, X17, [SP, #160]

(905) 0x45f414 ADD	X0, X16, #8

(905) 0x45f418 ORR	X7, XZR, X0

(905) 0x45f41c HINT	#0

  (904) 0x45f420 LDP	X8, X23, [X7, #1016]

  (904) 0x45f424 CMP	X8, X23

  (904) 0x45f428 B.GE	45f568

  (904) 0x45f42c ORR	X24, XZR, X27

  (904) 0x45f430 ORR	X9, XZR, X22

  (904) 0x45f434 STR	X28, [SP, #288]

  (904) 0x45f438 ORR	X27, XZR, X19

  (904) 0x45f43c ORR	X3, XZR, X15

  (904) 0x45f440 ORR	X19, XZR, X25

  (904) 0x45f444 B	45f454

    (927) 0x45f448 ADD	X8, X8, #1

    (927) 0x45f44c CMP	X8, X23

    (927) 0x45f450 B.GE	45f550

    (927) 0x45f454 LDR	X25, [X3, X8,LSL #3]

    (927) 0x45f458 CMP	X25, X27

    (927) 0x45f45c B.NE	45f448

    (927) 0x45f460 LDR	X26, [X24, X8,LSL #3]

    (927) 0x45f464 ADD	X15, X18, X26

    (927) 0x45f468 CMP	X15, X18

    (927) 0x45f46c B.LE	4604c8

    (927) 0x45f470 LDR	X4, [X9, X19,LSL #3]

    (927) 0x45f474 ORR	X26, XZR, X18

    (927) 0x45f478 ORR	X25, XZR, X19

    (927) 0x45f47c ORR	X28, XZR, X8

    (927) 0x45f480 ORR	X23, XZR, X9

    (927) 0x45f484 STR	X27, [SP, #120]

    (927) 0x45f488 STR	X18, [SP, #136]

    (927) 0x45f48c STP	X7, X3, [SP, #232]

    (927) 0x45f490 B	45f4c0

      (928) 0x45f494 ORN	X2, XZR, X3

      (928) 0x45f498 STR	X2, [X4, X19]

      (928) 0x45f49c LDR	X17, [X24, X28,LSL #3]

      (928) 0x45f4a0 ADD	X26, X26, #1

      (928) 0x45f4a4 LDR	X30, [SP, #136]

      (928) 0x45f4a8 ADD	X16, X30, X17

      (928) 0x45f4ac CMP	X16, X26

      (928) 0x45f4b0 B.LE	45f528

      (928) 0x45f4b4 HINT	#0

      (928) 0x45f4b8 HINT	#0

      (928) 0x45f4bc HINT	#0

      (928) 0x45f4c0 UBFM	X19, X26, #61, #60

      (928) 0x45f4c4 LDR	X22, [SP, #144]

      (928) 0x45f4c8 LDR	X27, [X4, X19]

      (928) 0x45f4cc LDR	X20, [SP, #128]

      (928) 0x45f4d0 SUBS	X3, X27, X22

      (928) 0x45f4d4 CCMP	X3, X20, #0, #5

      (928) 0x45f4d8 B.LT	45f494

      (928) 0x45f4dc LDR	X22, [SP, #160]

      (928) 0x45f4e0 MOVZ	X20, #0

        (929) 0x45f4e4 LDP	X9, X8, [X22]

        (929) 0x45f4e8 ORR	X1, XZR, X27

        (929) 0x45f4ec LDR	X0, [X21, X20,LSL #3]

        (929) 0x45f4f0 ADD	X20, X20, #1

        (929) 0x45f4f4 SUB	X2, X8, X9

        (929) 0x45f4f8 BL	529b40

        (929) 0x45f4fc TBNZ	X0, #63, 460240

      (928) 0x45f500 LDR	X14, [X22]

      (928) 0x45f504 ADD	X26, X26, #1

      (928) 0x45f508 LDR	X4, [X23, X25,LSL #3]

      (928) 0x45f50c LDR	X30, [SP, #136]

      (928) 0x45f510 ADD	X1, X14, X0

      (928) 0x45f514 STR	X1, [X4, X19]

      (928) 0x45f518 LDR	X17, [X24, X28,LSL #3]

      (928) 0x45f51c ADD	X16, X30, X17

      (928) 0x45f520 CMP	X16, X26

      (928) 0x45f524 B.GT	45f4c0

    (927) 0x45f528 LDP	X7, X3, [SP, #232]

    (927) 0x45f52c ORR	X9, XZR, X23

    (927) 0x45f530 ORR	X8, XZR, X28

    (927) 0x45f534 ADD	X8, X8, #1

    (927) 0x45f538 ORR	X19, XZR, X25

    (927) 0x45f53c ORR	X18, XZR, X16

    (927) 0x45f540 LDR	X27, [SP, #120]

    (927) 0x45f544 LDR	X23, [X7]

    (927) 0x45f548 CMP	X8, X23

    (927) 0x45f54c B.LT	45f454

  (904) 0x45f550 LDR	X28, [SP, #288]

  (904) 0x45f554 ORR	X25, XZR, X19

  (904) 0x45f558 ORR	X15, XZR, X3

  (904) 0x45f55c ORR	X19, XZR, X27

  (904) 0x45f560 ORR	X22, XZR, X9

  (904) 0x45f564 ORR	X27, XZR, X24

  (904) 0x45f568 LDR	X20, [SP, #176]

  (904) 0x45f56c ADD	X28, X28, #1

  (904) 0x45f570 ADD	X7, X7, #8

  (904) 0x45f574 CMP	X20, X28

  (904) 0x45f578 B.NE	45f420

(905) 0x45f57c LDP	X20, X18, [SP, #160]

(905) 0x45f580 ORR	X23, XZR, X25

(905) 0x45f584 ORR	X26, XZR, X15

(905) 0x45f588 LDR	X25, [SP, #792]

(905) 0x45f58c CBNZ	X18, 460a78

(905) 0x45f590 LDR	X0, [SP, #832]

(905) 0x45f594 CMP	X0, #1

(905) 0x45f598 B.LE	45f5a4

(905) 0x45f59c LDR	X4, [X20, X19,LSL #3]

(905) 0x45f5a0 STR	X4, [X20, X23,LSL #3]

(905) 0x45f5a4 LDR	X28, [SP, #264]

(905) 0x45f5a8 MOVZ	W3, #0

(905) 0x45f5ac MOVZ	W2, #0

(905) 0x45f5b0 LDP	X0, X24, [SP, #472]

(905) 0x45f5b4 ADD	X19, X19, #1

(905) 0x45f5b8 LDR	X18, [SP, #752]

(905) 0x45f5bc LDR	X15, [SP, #208]

(905) 0x45f5c0 LDR	X11, [SP, #216]

(905) 0x45f5c4 LDR	X10, [SP, #256]

(905) 0x45f5c8 LDR	X16, [SP, #280]

(905) 0x45f5cc LDR	X9, [SP, #392]

(905) 0x45f5d0 LDR	X6, [SP, #408]

(905) 0x45f5d4 LDR	X8, [SP, #416]

(905) 0x45f5d8 LDR	X17, [SP, #456]

(905) 0x45f5dc LDR	X30, [SP, #488]

(905) 0x45f5e0 LDR	X7, [SP, #576]

(905) 0x45f5e4 LDR	X14, [SP, #736]

(905) 0x45f5e8 LDR	X4, [X18, X23,LSL #3]

(905) 0x45f5ec CMP	X7, X0

(905) 0x45f5f0 CSINC	X13, X0, X7, #11

(905) 0x45f5f4 STR	X13, [SP, #472]

(905) 0x45f5f8 LDR	X12, [X28, X23,LSL #3]

(905) 0x45f5fc STR	X24, [SP, #848]

(905) 0x45f600 LDR	X22, [SP, #184]

(905) 0x45f604 STR	X14, [SP, #856]

(905) 0x45f608 STR	X30, [SP, #864]

(905) 0x45f60c STR	X9, [SP, #872]

(905) 0x45f610 SUB	X5, X4, X12

(905) 0x45f614 ADD	X12, SP, #832

(905) 0x45f618 STR	X10, [SP, #880]

(905) 0x45f61c STR	X11, [SP, #888]

(905) 0x45f620 STR	X17, [SP, #896]

(905) 0x45f624 STR	X16, [SP, #904]

(905) 0x45f628 STR	X28, [SP, #912]

(905) 0x45f62c ADD	X28, SP, #1000

(905) 0x45f630 STR	X6, [SP, #920]

(905) 0x45f634 STR	X8, [SP, #928]

(905) 0x45f638 STR	X15, [SP, #936]

(905) 0x45f63c LDR	X1, [SP, #296]

(905) 0x45f640 STR	X22, [SP, #944]

(905) 0x45f644 STR	X23, [SP, #976]

(905) 0x45f648 ADD	X23, X23, #1

(905) 0x45f64c STP	X25, X26, [X28]

(905) 0x45f650 STP	X7, X13, [X28, #32]

(905) 0x45f654 LDR	X0, [SP, #464]

(905) 0x45f658 STR	X5, [SP, #1048]

(905) 0x45f65c LDR	X7, [SP, #128]

(905) 0x45f660 STR	X12, [SP, #1016]

(905) 0x45f664 LDR	X24, [SP, #496]

(905) 0x45f668 STR	X0, [SP, #960]

(905) 0x45f66c LDR	X18, [SP, #560]

(905) 0x45f670 STR	X7, [SP, #984]

(905) 0x45f674 LDR	X5, [SP, #624]

(905) 0x45f678 STR	X24, [SP, #992]

(905) 0x45f67c LDR	X4, [SP, #640]

(905) 0x45f680 STR	X18, [SP, #952]

(905) 0x45f684 LDR	X13, [SP, #648]

(905) 0x45f688 STR	X5, [SP, #968]

(905) 0x45f68c LDR	X10, [SP, #656]

(905) 0x45f690 STR	X4, [SP, #1056]

(905) 0x45f694 LDR	X11, [SP, #696]

(905) 0x45f698 STR	X13, [SP, #1064]

(905) 0x45f69c LDR	X0, [SP, #784]

(905) 0x45f6a0 STR	X10, [SP, #1072]

(905) 0x45f6a4 STR	X11, [SP, #1024]

(905) 0x45f6a8 BL	410c40

(905) 0x45f6ac LDR	X3, [SP, #968]

(905) 0x45f6b0 LDR	X2, [SP, #1024]

(905) 0x45f6b4 LDR	X1, [SP, #328]

(905) 0x45f6b8 STR	X3, [SP, #624]

(905) 0x45f6bc STR	X2, [SP, #696]

(905) 0x45f6c0 CMP	X1, X23

(905) 0x45f6c4 B.NE	45eea4

0x45f6c8 LDR	X16, [SP, #384]

0x45f6cc ORR	X22, XZR, X25

0x45f6d0 LDR	X24, [SP, #560]

0x45f6d4 LDR	X25, [SP, #568]

0x45f6d8 LDR	X7, [SP, #696]

0x45f6dc LDR	X6, [SP, #736]

0x45f6e0 STR	X16, [SP, #120]

0x45f6e4 MOVZ	X28, #0

0x45f6e8 LDR	X0, [SP, #224]

0x45f6ec STR	X6, [SP, #136]

0x45f6f0 STR	X7, [SP, #160]

0x45f6f4 BL	52b3a0

0x45f6f8 LDR	X0, [SP, #376]

0x45f6fc BL	52b3a0

0x45f700 LDR	X0, [SP, #120]

0x45f704 BL	52b3a0

0x45f708 LDR	X0, [SP, #672]

0x45f70c BL	52b3a0

0x45f710 LDR	X0, [SP, #648]

0x45f714 BL	52b3a0

0x45f718 LDR	X0, [SP, #656]

0x45f71c BL	52b3a0

0x45f720 LDR	X0, [SP, #640]

0x45f724 BL	52b3a0

0x45f728 LDR	X21, [SP, #624]

0x45f72c MOVZ	X1, #8

0x45f730 ORR	X0, XZR, X21

0x45f734 BL	52b308

0x45f738 ORR	X27, XZR, X0

0x45f73c MOVZ	X1, #8

0x45f740 ORR	X0, XZR, X21

0x45f744 STR	X27, [SP, #144]

0x45f748 BL	52b308

0x45f74c LDR	X20, [SP, #160]

0x45f750 ORR	X27, XZR, X0

0x45f754 STR	XZR, [SP, #120]

0x45f758 LDR	X6, [SP, #136]

0x45f75c CBNZ	X20, 460b30

0x45f760 LDR	X14, [SP, #312]

0x45f764 CMP	X14, #0

0x45f768 B.LE	45f8d8

0x45f76c LDR	X30, [SP, #760]

0x45f770 MOVZ	X0, #8

0x45f774 LDR	X23, [SP, #216]

0x45f778 LDR	X17, [SP, #256]

0x45f77c UBFM	X7, X30, #61, #60

0x45f780 SUB	X16, X7, #16

0x45f784 UBFM	X9, X16, #3, #63

0x45f788 SUB	X2, X23, #8

0x45f78c ADD	X8, X9, #1

0x45f790 ANDS	X15, X8, #4160

0x45f794 SUB	X3, X17, #8

0x45f798 B.EQ	462000

0x45f79c CMP	X15, #1

0x45f7a0 B.EQ	45f804

0x45f7a4 CMP	X15, #2

0x45f7a8 B.EQ	45f7d8

0x45f7ac LDR	X4, [SP, #256]

0x45f7b0 MOVZ	X0, #16

0x45f7b4 LDR	X18, [X3, #8]

0x45f7b8 LDR	X5, [SP, #216]

0x45f7bc LDR	X13, [X4, #8]

0x45f7c0 ADD	X12, X13, X18

0x45f7c4 STR	X12, [X4, #8]

0x45f7c8 LDR	X10, [X2, #8]

0x45f7cc LDR	X11, [X5, #8]

0x45f7d0 ADD	X1, X11, X10

0x45f7d4 STR	X1, [X5, #8]

0x45f7d8 LDR	X20, [SP, #256]

0x45f7dc LDR	X21, [X3, X0]

0x45f7e0 LDR	X30, [SP, #216]

0x45f7e4 LDR	X19, [X20, X0]

0x45f7e8 ADD	X14, X19, X21

0x45f7ec STR	X14, [X20, X0]

0x45f7f0 LDR	X17, [X2, X0]

0x45f7f4 LDR	X16, [X30, X0]

0x45f7f8 ADD	X9, X16, X17

0x45f7fc STR	X9, [X30, X0]

0x45f800 ADD	X0, X0, #8

0x45f804 LDR	X15, [SP, #256]

0x45f808 LDR	X8, [X3, X0]

0x45f80c LDR	X13, [SP, #216]

0x45f810 LDR	X23, [X15, X0]

0x45f814 ADD	X18, X23, X8

0x45f818 STR	X18, [X15, X0]

0x45f81c LDR	X4, [X2, X0]

0x45f820 LDR	X12, [X13, X0]

0x45f824 ADD	X10, X12, X4

0x45f828 STR	X10, [X13, X0]

0x45f82c ADD	X0, X0, #8

0x45f830 CMP	X0, X7

0x45f834 B.EQ	45f8d8

0x45f838 LDR	X1, [SP, #256]

0x45f83c ORR	X21, XZR, X13

(925) 0x45f840 ADD	X5, X0, #8

(925) 0x45f844 ADD	X14, X0, #16

(925) 0x45f848 LDR	X20, [X1, X0]

(925) 0x45f84c ADD	X19, X0, #24

(925) 0x45f850 LDR	X11, [X3, X0]

(925) 0x45f854 ADD	X17, X20, X11

(925) 0x45f858 STR	X17, [X1, X0]

(925) 0x45f85c LDR	X30, [X21, X0]

(925) 0x45f860 LDR	X16, [X2, X0]

(925) 0x45f864 ADD	X9, X30, X16

(925) 0x45f868 STR	X9, [X21, X0]

(925) 0x45f86c ADD	X0, X0, #32

(925) 0x45f870 LDR	X8, [X1, X5]

(925) 0x45f874 LDR	X15, [X3, X5]

(925) 0x45f878 ADD	X23, X8, X15

(925) 0x45f87c STR	X23, [X1, X5]

(925) 0x45f880 LDR	X18, [X21, X5]

(925) 0x45f884 LDR	X4, [X2, X5]

(925) 0x45f888 ADD	X13, X18, X4

(925) 0x45f88c STR	X13, [X21, X5]

(925) 0x45f890 LDR	X12, [X1, X14]

(925) 0x45f894 LDR	X10, [X3, X14]

(925) 0x45f898 ADD	X20, X12, X10

(925) 0x45f89c STR	X20, [X1, X14]

(925) 0x45f8a0 LDR	X5, [X21, X14]

(925) 0x45f8a4 LDR	X11, [X2, X14]

(925) 0x45f8a8 ADD	X17, X5, X11

(925) 0x45f8ac STR	X17, [X21, X14]

(925) 0x45f8b0 LDR	X14, [X1, X19]

(925) 0x45f8b4 LDR	X30, [X3, X19]

(925) 0x45f8b8 ADD	X16, X14, X30

(925) 0x45f8bc STR	X16, [X1, X19]

(925) 0x45f8c0 LDR	X8, [X21, X19]

(925) 0x45f8c4 LDR	X9, [X2, X19]

(925) 0x45f8c8 ADD	X15, X8, X9

(925) 0x45f8cc STR	X15, [X21, X19]

(925) 0x45f8d0 CMP	X0, X7

(925) 0x45f8d4 B.NE	45f840

0x45f8d8 LDR	X19, [SP, #128]

0x45f8dc ADRP	X0,

0x45f8e0 MOVZ	W3, #0

0x45f8e4 STR	X6, [SP, #136]

0x45f8e8 MOVZ	W2, #0

0x45f8ec ADD	X0, X0, #112

0x45f8f0 LDR	X7, [SP, #144]

0x45f8f4 STR	X27, [SP, #848]

0x45f8f8 LDR	X23, [SP, #248]

0x45f8fc STR	X19, [SP, #880]

0x45f900 LDR	X21, [SP, #256]

0x45f904 STR	X7, [SP, #864]

0x45f908 LDR	X6, [SP, #360]

0x45f90c STR	X23, [SP, #888]

0x45f910 LDR	X1, [SP, #296]

0x45f914 STR	X21, [SP, #856]

0x45f918 STR	X6, [SP, #872]

0x45f91c BL	410c40

0x45f920 LDR	X2, [SP, #264]

0x45f924 LDR	X12, [SP, #1184]

0x45f928 LDR	X18, [SP, #136]

0x45f92c ADD	X3, X2, #8

0x45f930 LDP	X1, X4, [X3]

0x45f934 SUB	X13, X4, X1

0x45f938 CBZ	X12, 460bc4

0x45f93c LDR	X5, [SP, #144]

0x45f940 ADRP	X20,

0x45f944 MOVZ	W2, #0

0x45f948 STR	X18, [SP, #136]

0x45f94c ADD	X0, X20, #256

0x45f950 MOVZ	W3, #0

0x45f954 LDR	X9, [SP, #192]

0x45f958 STR	X27, [SP, #936]

0x45f95c LDR	X6, [SP, #216]

0x45f960 STR	X5, [SP, #952]

0x45f964 LDR	X7, [SP, #256]

0x45f968 STR	X9, [SP, #928]

0x45f96c LDR	X23, [SP, #320]

0x45f970 STR	X28, [SP, #960]

0x45f974 LDR	X18, [SP, #432]

0x45f978 STR	X7, [SP, #944]

0x45f97c LDR	X16, [SP, #440]

0x45f980 STR	X23, [SP, #848]

0x45f984 LDR	X12, [SP, #448]

0x45f988 STR	X18, [SP, #856]

0x45f98c LDR	X11, [SP, #584]

0x45f990 STR	X16, [SP, #904]

0x45f994 LDR	X17, [SP, #592]

0x45f998 STR	X12, [SP, #920]

0x45f99c LDR	X15, [SP, #600]

0x45f9a0 STR	X11, [SP, #864]

0x45f9a4 LDR	X30, [SP, #608]

0x45f9a8 STR	X17, [SP, #880]

0x45f9ac LDR	X10, [SP, #616]

0x45f9b0 STR	X15, [SP, #888]

0x45f9b4 LDR	X4, [SP, #1192]

0x45f9b8 STR	X30, [SP, #896]

0x45f9bc LDR	X1, [SP, #296]

0x45f9c0 STR	X10, [SP, #912]

0x45f9c4 STR	X6, [SP, #968]

0x45f9c8 STR	X4, [SP, #872]

0x45f9cc LDR	X8, [SP, #120]

0x45f9d0 STR	X13, [SP, #1096]

0x45f9d4 LDR	X17, [SP, #184]

0x45f9d8 LDR	X4, [SP, #208]

0x45f9dc STR	X8, [SP, #976]

0x45f9e0 LDR	X10, [SP, #248]

0x45f9e4 STR	X17, [SP, #1056]

0x45f9e8 LDR	X23, [SP, #264]

0x45f9ec STR	X4, [SP, #1048]

0x45f9f0 LDR	X30, [SP, #272]

0x45f9f4 STR	X10, [SP, #1088]

0x45f9f8 LDR	X20, [SP, #280]

0x45f9fc STR	X23, [SP, #1024]

0x45fa00 LDR	X16, [SP, #312]

0x45fa04 STR	X30, [SP, #1072]

0x45fa08 LDR	X13, [SP, #352]

0x45fa0c STR	X20, [SP, #1016]

0x45fa10 LDR	X21, [SP, #360]

0x45fa14 STR	X16, [SP, #1080]

0x45fa18 LDR	X11, [SP, #408]

0x45fa1c STR	X13, [SP, #984]

0x45fa20 LDR	X18, [SP, #416]

0x45fa24 STR	X21, [SP, #1000]

0x45fa28 LDR	X19, [SP, #424]

0x45fa2c STR	X11, [SP, #1032]

0x45fa30 LDR	X14, [SP, #512]

0x45fa34 STR	X18, [SP, #1040]

0x45fa38 LDR	X15, [SP, #536]

0x45fa3c STR	X19, [SP, #992]

0x45fa40 STR	X14, [SP, #1008]

0x45fa44 STR	X15, [SP, #1064]

0x45fa48 BL	410c40

0x45fa4c LDP	X2, X1, [SP, #128]

0x45fa50 CBNZ	X2, 4621c8

0x45fa54 STR	X1, [SP, #136]

0x45fa58 LDR	X0, [SP, #512]

0x45fa5c BL	52b3a0

0x45fa60 LDR	X19, [SP, #208]

0x45fa64 LDR	X0, [X19, #8]

0x45fa68 BL	52b3a0

0x45fa6c LDR	X3, [SP, #832]

0x45fa70 STR	XZR, [X19, #8]

0x45fa74 LDR	X9, [SP, #136]

0x45fa78 CMP	X3, #1

0x45fa7c B.LE	45fa94

0x45fa80 LDR	X21, [SP, #184]

0x45fa84 LDR	X0, [X21, #8]

0x45fa88 BL	52b3a0

0x45fa8c LDR	X9, [SP, #136]

0x45fa90 STR	XZR, [X21, #8]

0x45fa94 LDR	X7, [SP, #328]

0x45fa98 CMP	X7, #2

0x45fa9c B.EQ	4621bc

0x45faa0 LDR	X8, [SP, #152]

0x45faa4 ADRP	X5,

0x45faa8 MOVZ	X23, #0

0x45faac ADD	X6, X5, #2848

0x45fab0 MOVZ	X21, #1

0x45fab4 STR	XZR, [SP, #136]

0x45fab8 LDR	X14, [SP, #176]

0x45fabc MOVZ	X19, #2

0x45fac0 STR	XZR, [SP, #160]

0x45fac4 LDR	X17, [SP, #200]

0x45fac8 UBFM	X13, X8, #61, #60

0x45facc STR	X6, [SP, #288]

0x45fad0 LDR	X18, [SP, #264]

0x45fad4 UBFM	X11, X14, #61, #60

0x45fad8 STP	X26, X13, [SP, #224]

0x45fadc ORR	X26, XZR, X23

0x45fae0 ADD	X15, X17, #8

0x45fae4 LDR	X20, [SP, #256]

0x45fae8 ADD	X4, X18, #8

0x45faec STR	X11, [SP, #240]

0x45faf0 STR	X15, [SP, #344]

0x45faf4 STR	X4, [SP, #360]

0x45faf8 STR	X9, [SP, #376]

0x45fafc B	45fca0

(918) 0x45fb00 LDR	X30, [SP, #264]

(918) 0x45fb04 ADD	X6, SP, #968

(918) 0x45fb08 MOVZ	W3, #0

(918) 0x45fb0c LDP	X0, X1, [SP, #288]

(918) 0x45fb10 MOVZ	W2, #0

(918) 0x45fb14 LDR	X16, [SP, #360]

(918) 0x45fb18 LDR	X10, [SP, #488]

(918) 0x45fb1c LDR	X5, [SP, #144]

(918) 0x45fb20 LDR	X7, [X30, X19,LSL #3]

(918) 0x45fb24 LDR	X12, [X16, X19,LSL #3]

(918) 0x45fb28 STR	X10, [SP, #944]

(918) 0x45fb2c STP	X27, X20, [X6]

(918) 0x45fb30 STP	X5, X28, [X6, #16]

(918) 0x45fb34 SUB	X8, X12, X7

(918) 0x45fb38 LDR	X18, [SP, #120]

(918) 0x45fb3c STR	X30, [SP, #1048]

(918) 0x45fb40 LDR	X11, [SP, #192]

(918) 0x45fb44 LDR	X9, [SP, #216]

(918) 0x45fb48 STR	X18, [SP, #1008]

(918) 0x45fb4c LDR	X13, [SP, #280]

(918) 0x45fb50 STR	X11, [SP, #960]

(918) 0x45fb54 LDR	X17, [SP, #352]

(918) 0x45fb58 STR	X9, [SP, #1000]

(918) 0x45fb5c LDR	X14, [SP, #392]

(918) 0x45fb60 STR	X13, [SP, #1040]

(918) 0x45fb64 LDR	X30, [SP, #408]

(918) 0x45fb68 STR	X17, [SP, #1024]

(918) 0x45fb6c LDR	X15, [SP, #424]

(918) 0x45fb70 STR	X14, [SP, #952]

(918) 0x45fb74 LDR	X4, [SP, #456]

(918) 0x45fb78 STR	X30, [SP, #1056]

(918) 0x45fb7c LDR	X16, [SP, #416]

(918) 0x45fb80 STR	X15, [SP, #1032]

(918) 0x45fb84 LDR	X10, [SP, #464]

(918) 0x45fb88 STR	X4, [SP, #1016]

(918) 0x45fb8c LDR	X12, [SP, #184]

(918) 0x45fb90 LDP	X6, X9, [SP, #312]

(918) 0x45fb94 STR	X8, [SP, #1176]

(918) 0x45fb98 LDR	X14, [SP, #128]

(918) 0x45fb9c STR	X9, [SP, #848]

(918) 0x45fba0 LDR	X17, [SP, #136]

(918) 0x45fba4 STR	X16, [SP, #1064]

(918) 0x45fba8 LDR	X8, [SP, #208]

(918) 0x45fbac STR	X12, [SP, #1080]

(918) 0x45fbb0 LDR	X4, [SP, #224]

(918) 0x45fbb4 STR	X24, [SP, #1088]

(918) 0x45fbb8 LDR	X7, [SP, #272]

(918) 0x45fbbc STR	X8, [SP, #1072]

(918) 0x45fbc0 LDR	X5, [SP, #376]

(918) 0x45fbc4 STR	X10, [SP, #1096]

(918) 0x45fbc8 LDR	X18, [SP, #432]

(918) 0x45fbcc STR	X7, [SP, #1104]

(918) 0x45fbd0 LDR	X15, [SP, #472]

(918) 0x45fbd4 STR	X5, [SP, #936]

(918) 0x45fbd8 LDR	X11, [SP, #496]

(918) 0x45fbdc STR	X18, [SP, #856]

(918) 0x45fbe0 LDR	X13, [SP, #584]

(918) 0x45fbe4 STR	X19, [SP, #1112]

(918) 0x45fbe8 STR	X6, [SP, #1120]

(918) 0x45fbec STR	X14, [SP, #1128]

(918) 0x45fbf0 STR	X11, [SP, #1136]

(918) 0x45fbf4 STR	X13, [SP, #864]

(918) 0x45fbf8 STR	X22, [SP, #1144]

(918) 0x45fbfc STR	X4, [SP, #1152]

(918) 0x45fc00 STR	X17, [SP, #1160]

(918) 0x45fc04 STR	X15, [SP, #1168]

(918) 0x45fc08 LDR	X30, [SP, #1192]

(918) 0x45fc0c LDR	X8, [SP, #440]

(918) 0x45fc10 LDR	X5, [SP, #448]

(918) 0x45fc14 STR	X30, [SP, #872]

(918) 0x45fc18 LDR	X6, [SP, #480]

(918) 0x45fc1c STR	X8, [SP, #904]

(918) 0x45fc20 LDR	X16, [SP, #592]

(918) 0x45fc24 STR	X5, [SP, #920]

(918) 0x45fc28 LDR	X10, [SP, #600]

(918) 0x45fc2c STR	X6, [SP, #928]

(918) 0x45fc30 LDR	X12, [SP, #608]

(918) 0x45fc34 STR	X16, [SP, #880]

(918) 0x45fc38 LDR	X7, [SP, #616]

(918) 0x45fc3c STR	X10, [SP, #888]

(918) 0x45fc40 STR	X12, [SP, #896]

(918) 0x45fc44 STR	X7, [SP, #912]

(918) 0x45fc48 BL	410c40

(918) 0x45fc4c LDR	X2, [SP, #208]

(918) 0x45fc50 LDR	X0, [X2, X19,LSL #3]

(918) 0x45fc54 BL	52b3a0

(918) 0x45fc58 LDR	X1, [SP, #208]

(918) 0x45fc5c LDR	X3, [SP, #832]

(918) 0x45fc60 STR	XZR, [X1, X19,LSL #3]

(918) 0x45fc64 CMP	X3, #1

(918) 0x45fc68 B.LE	45fc8c

(918) 0x45fc6c LDR	X0, [SP, #184]

(918) 0x45fc70 LDR	X0, [X0, X19,LSL #3]

(918) 0x45fc74 BL	52b3a0

(918) 0x45fc78 LDR	X9, [SP, #184]

(918) 0x45fc7c STR	XZR, [X9, X19,LSL #3]

(918) 0x45fc80 LDR	X0, [X24, X19,LSL #3]

(918) 0x45fc84 BL	52b3a0

(918) 0x45fc88 STR	XZR, [X24, X19,LSL #3]

(918) 0x45fc8c LDR	X14, [SP, #328]

(918) 0x45fc90 ADD	X19, X19, #1

(918) 0x45fc94 ADD	X21, X21, #1

(918) 0x45fc98 CMP	X14, X19

(918) 0x45fc9c B.EQ	461750

(918) 0x45fca0 LDR	X30, [SP, #832]

(918) 0x45fca4 CMP	X30, #1

(918) 0x45fca8 B.LE	45fb00

(918) 0x45fcac LDR	X16, [SP, #304]

(918) 0x45fcb0 LDR	X10, [SP, #232]

(918) 0x45fcb4 LDR	X1, [X16, X19,LSL #3]

(918) 0x45fcb8 LDR	X2, [X1, X10]

(918) 0x45fcbc STR	X2, [SP, #168]

(918) 0x45fcc0 CMP	X2, X23

(918) 0x45fcc4 B.GT	460b84

(918) 0x45fcc8 LDR	X3, [SP, #152]

(918) 0x45fccc MOVZ	X5, #0

(918) 0x45fcd0 MOVZ	X2, #0

(918) 0x45fcd4 CMP	X3, #0

(918) 0x45fcd8 B.LE	46018c

(918) 0x45fcdc LDR	X9, [SP, #216]

  (919) 0x45fce0 LDR	X0, [SP, #200]

  (919) 0x45fce4 LDR	X12, [SP, #344]

  (919) 0x45fce8 LDR	X6, [X0, X2,LSL #3]

  (919) 0x45fcec LDR	X8, [X12, X2,LSL #3]

  (919) 0x45fcf0 CMP	X6, X8

  (919) 0x45fcf4 B.LT	45fd08

  (919) 0x45fcf8 B	46017c

    (920) 0x45fcfc ADD	X6, X6, #1

    (920) 0x45fd00 CMP	X6, X8

    (920) 0x45fd04 B.EQ	46017c

    (920) 0x45fd08 LDR	X7, [X25, X6,LSL #3]

    (920) 0x45fd0c UBFM	X0, X7, #61, #60

    (920) 0x45fd10 LDR	X13, [X22, X0]

    (920) 0x45fd14 CMP	X13, X21

    (920) 0x45fd18 B.NE	45fcfc

    (920) 0x45fd1c ADD	X15, X0, #8

    (920) 0x45fd20 LDR	X4, [X20, X0]

    (920) 0x45fd24 LDR	X11, [X20, X15]

    (920) 0x45fd28 CMP	X4, X11

    (920) 0x45fd2c B.GE	45ff48

    (920) 0x45fd30 SUB	X16, X11, X4

    (920) 0x45fd34 UBFM	X30, X5, #61, #60

    (920) 0x45fd38 ADD	X3, X4, #1

    (920) 0x45fd3c CMP	X16, #1

    (920) 0x45fd40 B.EQ	460944

    (920) 0x45fd44 ADD	X3, X4, #1

    (920) 0x45fd48 ADD	X10, X26, X5,LSL #3

    (920) 0x45fd4c UBFM	X30, X5, #61, #60

    (920) 0x45fd50 ADD	X14, X27, X3,LSL #3

    (920) 0x45fd54 UBFM	X18, X3, #61, #60

    (920) 0x45fd58 SUB	X17, X10, X14

    (920) 0x45fd5c CMP	X17, #16

    (920) 0x45fd60 B.LS	460944

    (920) 0x45fd64 SUB	X23, X16, #1

    (920) 0x45fd68 CMP	X23, #2

    (920) 0x45fd6c B.LS	460a68

    (920) 0x45fd70 UBFM	X12, X16, #2, #63

    (920) 0x45fd74 SUB	X7, X18, #8

    (920) 0x45fd78 UBFM	X17, X12, #59, #58

    (920) 0x45fd7c ADD	X11, X27, X7

    (920) 0x45fd80 SUB	X14, X17, #32

    (920) 0x45fd84 MOVZ	X3, #0

    (920) 0x45fd88 UBFM	X18, X14, #5, #63

    (920) 0x45fd8c ADD	X13, X11, #16

    (920) 0x45fd90 ADD	X23, X18, #1

    (920) 0x45fd94 ADD	X12, X10, #16

    (920) 0x45fd98 ANDS	X14, X23, #4224

    (920) 0x45fd9c B.EQ	45fe64

    (920) 0x45fda0 CMP	X14, #1

    (920) 0x45fda4 B.EQ	45fe48

    (920) 0x45fda8 CMP	X14, #2

    (920) 0x45fdac B.EQ	45fe34

    (920) 0x45fdb0 CMP	X14, #3

    (920) 0x45fdb4 B.EQ	45fe20

    (920) 0x45fdb8 CMP	X14, #4

    (920) 0x45fdbc B.EQ	45fe0c

    (920) 0x45fdc0 CMP	X14, #5

    (920) 0x45fdc4 B.EQ	45fdf8

    (920) 0x45fdc8 CMP	X14, #6

    (920) 0x45fdcc B.EQ	45fde4

    (920) 0x45fdd0 LDR	Q20, [X27, X7]

    (920) 0x45fdd4 MOVZ	X3, #32

    (920) 0x45fdd8 LDR	Q21, [X11, #16]

    (920) 0x45fddc STR	Q20, [X26, X30]

    (920) 0x45fde0 STR	Q21, [X10, #16]

    (920) 0x45fde4 LDR	Q22, [X11, X3]

    (920) 0x45fde8 LDR	Q1, [X13, X3]

    (920) 0x45fdec STR	Q22, [X10, X3]

    (920) 0x45fdf0 STR	Q1, [X12, X3]

    (920) 0x45fdf4 ADD	X3, X3, #32

    (920) 0x45fdf8 LDR	Q24, [X11, X3]

    (920) 0x45fdfc LDR	Q23, [X13, X3]

    (920) 0x45fe00 STR	Q24, [X10, X3]

    (920) 0x45fe04 STR	Q23, [X12, X3]

    (920) 0x45fe08 ADD	X3, X3, #32

    (920) 0x45fe0c LDR	Q26, [X11, X3]

    (920) 0x45fe10 LDR	Q25, [X13, X3]

    (920) 0x45fe14 STR	Q26, [X10, X3]

    (920) 0x45fe18 STR	Q25, [X12, X3]

    (920) 0x45fe1c ADD	X3, X3, #32

    (920) 0x45fe20 LDR	Q28, [X11, X3]

    (920) 0x45fe24 LDR	Q27, [X13, X3]

    (920) 0x45fe28 STR	Q28, [X10, X3]

    (920) 0x45fe2c STR	Q27, [X12, X3]

    (920) 0x45fe30 ADD	X3, X3, #32

    (920) 0x45fe34 LDR	Q0, [X11, X3]

    (920) 0x45fe38 LDR	Q31, [X13, X3]

    (920) 0x45fe3c STR	Q0, [X10, X3]

    (920) 0x45fe40 STR	Q31, [X12, X3]

    (920) 0x45fe44 ADD	X3, X3, #32

    (920) 0x45fe48 LDR	Q30, [X11, X3]

    (920) 0x45fe4c LDR	Q2, [X13, X3]

    (920) 0x45fe50 STR	Q30, [X10, X3]

    (920) 0x45fe54 STR	Q2, [X12, X3]

    (920) 0x45fe58 ADD	X3, X3, #32

    (920) 0x45fe5c CMP	X3, X17

    (920) 0x45fe60 B.EQ	45ff0c

      (924) 0x45fe64 LDR	Q4, [X11, X3]

      (924) 0x45fe68 ADD	X7, X3, #32

      (924) 0x45fe6c ADD	X30, X3, #64

      (924) 0x45fe70 ADD	X23, X3, #96

      (924) 0x45fe74 ADD	X18, X3, #128

      (924) 0x45fe78 LDR	Q3, [X13, X3]

      (924) 0x45fe7c ADD	X14, X3, #160

      (924) 0x45fe80 STR	Q4, [X10, X3]

      (924) 0x45fe84 STR	Q3, [X12, X3]

      (924) 0x45fe88 LDR	Q5, [X11, X7]

      (924) 0x45fe8c LDR	Q29, [X13, X7]

      (924) 0x45fe90 STR	Q5, [X10, X7]

      (924) 0x45fe94 STR	Q29, [X12, X7]

      (924) 0x45fe98 ADD	X7, X3, #192

      (924) 0x45fe9c LDR	Q7, [X11, X30]

      (924) 0x45fea0 LDR	Q6, [X13, X30]

      (924) 0x45fea4 STR	Q7, [X10, X30]

      (924) 0x45fea8 STR	Q6, [X12, X30]

      (924) 0x45feac ADD	X30, X3, #224

      (924) 0x45feb0 ADD	X3, X3, #256

      (924) 0x45feb4 LDR	Q17, [X11, X23]

      (924) 0x45feb8 LDR	Q16, [X13, X23]

      (924) 0x45febc STR	Q17, [X10, X23]

      (924) 0x45fec0 STR	Q16, [X12, X23]

      (924) 0x45fec4 LDR	Q19, [X11, X18]

      (924) 0x45fec8 LDR	Q18, [X13, X18]

      (924) 0x45fecc STR	Q19, [X10, X18]

      (924) 0x45fed0 STR	Q18, [X12, X18]

      (924) 0x45fed4 LDR	Q21, [X11, X14]

      (924) 0x45fed8 LDR	Q20, [X13, X14]

      (924) 0x45fedc STR	Q21, [X10, X14]

      (924) 0x45fee0 STR	Q20, [X12, X14]

      (924) 0x45fee4 LDR	Q22, [X11, X7]

      (924) 0x45fee8 LDR	Q1, [X13, X7]

      (924) 0x45feec STR	Q22, [X10, X7]

      (924) 0x45fef0 STR	Q1, [X12, X7]

      (924) 0x45fef4 LDR	Q24, [X11, X30]

      (924) 0x45fef8 LDR	Q23, [X13, X30]

      (924) 0x45fefc STR	Q24, [X10, X30]

      (924) 0x45ff00 STR	Q23, [X12, X30]

      (924) 0x45ff04 CMP	X3, X17

      (924) 0x45ff08 B.NE	45fe64

    (920) 0x45ff0c AND	X3, X16, #8062

    (920) 0x45ff10 ANDS	XZR, X16, #4160

    (920) 0x45ff14 B.EQ	45ff44

    (920) 0x45ff18 ADD	X10, X3, X5

    (920) 0x45ff1c ADD	X4, X3, X4

    (920) 0x45ff20 SUB	X17, X16, X3

    (920) 0x45ff24 ADD	X11, X26, X10,LSL #3

    (920) 0x45ff28 WHILELO	P3.D, XZR, X17

    (920) 0x45ff2c LD1D	{Z25.D}, P3/Z, [X27, X4,LSL #3]

    (920) 0x45ff30 ST1D	{Z25.D}, P3, [X11, MUL VL]

    (920) 0x45ff34 CNTD	X12, ALL

    (920) 0x45ff38 ADD	X13, X27, X4,LSL #3

    (920) 0x45ff3c WHILELO	P4.D, X12, X17

    (920) 0x45ff40 B.NE	460800

    (920) 0x45ff44 ADD	X5, X5, X16

    (920) 0x45ff48 LDR	X3, [X9, X0]

    (920) 0x45ff4c LDR	X18, [X9, X15]

    (920) 0x45ff50 CMP	X3, X18

    (920) 0x45ff54 B.GE	45fcfc

    (920) 0x45ff58 SUB	X14, X18, X3

    (920) 0x45ff5c UBFM	X4, X5, #61, #60

    (920) 0x45ff60 ADD	X0, X3, #1

    (920) 0x45ff64 CMP	X14, #1

    (920) 0x45ff68 B.EQ	46081c

    (920) 0x45ff6c ADD	X0, X3, #1

    (920) 0x45ff70 ADD	X7, X26, X5,LSL #3

    (920) 0x45ff74 UBFM	X4, X5, #61, #60

    (920) 0x45ff78 ADD	X15, X28, X0,LSL #3

    (920) 0x45ff7c UBFM	X16, X0, #61, #60

    (920) 0x45ff80 SUB	X11, X7, X15

    (920) 0x45ff84 CMP	X11, #16

    (920) 0x45ff88 B.LS	46081c

    (920) 0x45ff8c SUB	X0, X14, #1

    (920) 0x45ff90 CMP	X0, #2

    (920) 0x45ff94 B.LS	460a70

    (920) 0x45ff98 UBFM	X17, X14, #2, #63

    (920) 0x45ff9c SUB	X23, X16, #8

    (920) 0x45ffa0 UBFM	X15, X17, #59, #58

    (920) 0x45ffa4 ADD	X10, X28, X23

    (920) 0x45ffa8 SUB	X13, X15, #32

    (920) 0x45ffac MOVZ	X0, #0

    (920) 0x45ffb0 UBFM	X18, X13, #5, #63

    (920) 0x45ffb4 ADD	X12, X10, #16

    (920) 0x45ffb8 ADD	X16, X18, #1

    (920) 0x45ffbc ADD	X11, X7, #16

    (920) 0x45ffc0 ANDS	X30, X16, #4224

    (920) 0x45ffc4 B.EQ	46008c

    (920) 0x45ffc8 CMP	X30, #1

    (920) 0x45ffcc B.EQ	460070

    (920) 0x45ffd0 CMP	X30, #2

    (920) 0x45ffd4 B.EQ	46005c

    (920) 0x45ffd8 CMP	X30, #3

    (920) 0x45ffdc B.EQ	460048

    (920) 0x45ffe0 CMP	X30, #4

    (920) 0x45ffe4 B.EQ	460034

    (920) 0x45ffe8 CMP	X30, #5

    (920) 0x45ffec B.EQ	460020

    (920) 0x45fff0 CMP	X30, #6

    (920) 0x45fff4 B.EQ	46000c

    (920) 0x45fff8 LDR	Q29, [X28, X23]

    (920) 0x45fffc MOVZ	X0, #32

    (920) 0x460000 LDR	Q5, [X10, #16]

    (920) 0x460004 STR	Q29, [X26, X4]

    (920) 0x460008 STR	Q5, [X7, #16]

    (920) 0x46000c LDR	Q7, [X10, X0]

    (920) 0x460010 LDR	Q6, [X12, X0]

    (920) 0x460014 STR	Q7, [X7, X0]

    (920) 0x460018 STR	Q6, [X11, X0]

    (920) 0x46001c ADD	X0, X0, #32

    (920) 0x460020 LDR	Q17, [X10, X0]

    (920) 0x460024 LDR	Q16, [X12, X0]

    (920) 0x460028 STR	Q17, [X7, X0]

    (920) 0x46002c STR	Q16, [X11, X0]

    (920) 0x460030 ADD	X0, X0, #32

    (920) 0x460034 LDR	Q19, [X10, X0]

    (920) 0x460038 LDR	Q18, [X12, X0]

    (920) 0x46003c STR	Q19, [X7, X0]

    (920) 0x460040 STR	Q18, [X11, X0]

    (920) 0x460044 ADD	X0, X0, #32

    (920) 0x460048 LDR	Q21, [X10, X0]

    (920) 0x46004c LDR	Q20, [X12, X0]

    (920) 0x460050 STR	Q21, [X7, X0]

    (920) 0x460054 STR	Q20, [X11, X0]

    (920) 0x460058 ADD	X0, X0, #32

    (920) 0x46005c LDR	Q22, [X10, X0]

    (920) 0x460060 LDR	Q1, [X12, X0]

    (920) 0x460064 STR	Q22, [X7, X0]

    (920) 0x460068 STR	Q1, [X11, X0]

    (920) 0x46006c ADD	X0, X0, #32

    (920) 0x460070 LDR	Q24, [X10, X0]

    (920) 0x460074 LDR	Q23, [X12, X0]

    (920) 0x460078 STR	Q24, [X7, X0]

    (920) 0x46007c STR	Q23, [X11, X0]

    (920) 0x460080 ADD	X0, X0, #32

    (920) 0x460084 CMP	X15, X0

    (920) 0x460088 B.EQ	460134

      (922) 0x46008c LDR	Q26, [X10, X0]

      (922) 0x460090 ADD	X4, X0, #32

      (922) 0x460094 ADD	X23, X0, #64

      (922) 0x460098 ADD	X18, X0, #96

      (922) 0x46009c ADD	X17, X0, #128

      (922) 0x4600a0 LDR	Q25, [X12, X0]

      (922) 0x4600a4 ADD	X16, X0, #160

      (922) 0x4600a8 ADD	X13, X0, #192

      (922) 0x4600ac ADD	X30, X0, #224

      (922) 0x4600b0 STR	Q26, [X7, X0]

      (922) 0x4600b4 STR	Q25, [X11, X0]

      (922) 0x4600b8 ADD	X0, X0, #256

      (922) 0x4600bc LDR	Q28, [X10, X4]

      (922) 0x4600c0 LDR	Q27, [X12, X4]

      (922) 0x4600c4 STR	Q28, [X7, X4]

      (922) 0x4600c8 STR	Q27, [X11, X4]

      (922) 0x4600cc LDR	Q0, [X10, X23]

      (922) 0x4600d0 LDR	Q31, [X12, X23]

      (922) 0x4600d4 STR	Q0, [X7, X23]

      (922) 0x4600d8 STR	Q31, [X11, X23]

      (922) 0x4600dc LDR	Q30, [X10, X18]

      (922) 0x4600e0 LDR	Q2, [X12, X18]

      (922) 0x4600e4 STR	Q30, [X7, X18]

      (922) 0x4600e8 STR	Q2, [X11, X18]

      (922) 0x4600ec LDR	Q4, [X10, X17]

      (922) 0x4600f0 LDR	Q3, [X12, X17]

      (922) 0x4600f4 STR	Q4, [X7, X17]

      (922) 0x4600f8 STR	Q3, [X11, X17]

      (922) 0x4600fc LDR	Q5, [X10, X16]

      (922) 0x460100 LDR	Q29, [X12, X16]

      (922) 0x460104 STR	Q5, [X7, X16]

      (922) 0x460108 STR	Q29, [X11, X16]

      (922) 0x46010c LDR	Q7, [X10, X13]

      (922) 0x460110 LDR	Q6, [X12, X13]

      (922) 0x460114 STR	Q7, [X7, X13]

      (922) 0x460118 STR	Q6, [X11, X13]

      (922) 0x46011c LDR	Q17, [X10, X30]

      (922) 0x460120 LDR	Q16, [X12, X30]

      (922) 0x460124 STR	Q17, [X7, X30]

      (922) 0x460128 STR	Q16, [X11, X30]

      (922) 0x46012c CMP	X15, X0

      (922) 0x460130 B.NE	46008c

    (920) 0x460134 AND	X30, X14, #8062

    (920) 0x460138 ANDS	XZR, X14, #4160

    (920) 0x46013c B.EQ	46016c

    (920) 0x460140 ADD	X7, X30, X5

    (920) 0x460144 ADD	X3, X30, X3

    (920) 0x460148 SUB	X15, X14, X30

    (920) 0x46014c ADD	X10, X26, X7,LSL #3

    (920) 0x460150 WHILELO	P5.D, XZR, X15

    (920) 0x460154 LD1D	{Z18.D}, P5/Z, [X28, X3,LSL #3]

    (920) 0x460158 ST1D	{Z18.D}, P5, [X10, MUL VL]

    (920) 0x46015c CNTD	X11, ALL

    (920) 0x460160 ADD	X12, X28, X3,LSL #3

    (920) 0x460164 WHILELO	P6.D, X11, X15

    (920) 0x460168 B.NE	46080c

    (920) 0x46016c ADD	X5, X5, X14

    (920) 0x460170 ADD	X6, X6, #1

    (920) 0x460174 CMP	X6, X8

    (920) 0x460178 B.NE	45fd08

  (919) 0x46017c LDR	X8, [SP, #152]

  (919) 0x460180 ADD	X2, X2, #1

  (919) 0x460184 CMP	X8, X2

  (919) 0x460188 B.NE	45fce0

(918) 0x46018c LDR	X9, [SP, #336]

(918) 0x460190 LDR	X14, [SP, #368]

(918) 0x460194 LDR	X11, [SP, #152]

(918) 0x460198 LDR	X4, [SP, #176]

(918) 0x46019c STR	X1, [X14, #24]

(918) 0x4601a0 LDR	X18, [X9, X19,LSL #3]

(918) 0x4601a4 STR	X11, [X14, #8]

(918) 0x4601a8 LDR	X23, [SP, #240]

(918) 0x4601ac STR	X4, [X14, #40]

(918) 0x4601b0 LDR	X17, [SP, #160]

(918) 0x4601b4 LDR	X23, [X18, X23]

(918) 0x4601b8 STR	X18, [X14, #56]

(918) 0x4601bc CMP	X23, X17

(918) 0x4601c0 B.GT	460ba8

(918) 0x4601c4 LDR	X3, [SP, #136]

(918) 0x4601c8 ORR	X2, XZR, X26

(918) 0x4601cc MOVZ	X0, #1

(918) 0x4601d0 LDR	X1, [SP, #368]

(918) 0x4601d4 BL	4e46a4

(918) 0x4601d8 BL	4e4eac

(918) 0x4601dc LDR	X3, [SP, #304]

(918) 0x4601e0 LDR	X0, [X3, X19,LSL #3]

(918) 0x4601e4 BL	52b3a0

(918) 0x4601e8 LDR	X0, [SP, #304]

(918) 0x4601ec LDR	X15, [SP, #336]

(918) 0x4601f0 STR	XZR, [X0, X19,LSL #3]

(918) 0x4601f4 LDR	X0, [X15, X19,LSL #3]

(918) 0x4601f8 BL	52b3a0

(918) 0x4601fc LDR	X13, [SP, #336]

(918) 0x460200 STR	X23, [SP, #160]

(918) 0x460204 LDR	X23, [SP, #168]

(918) 0x460208 STR	XZR, [X13, X19,LSL #3]

(918) 0x46020c B	45fb00

      (935) 0x460210 MOVZ	X13, #0

      (935) 0x460214 HINT	#0

      (935) 0x460218 HINT	#0

      (935) 0x46021c HINT	#0

      (935) 0x460220 UBFM	X0, X13, #61, #60

      (935) 0x460224 LDR	X13, [X20, X0]

      (935) 0x460228 LDR	X10, [X21, X0]

      (935) 0x46022c SUB	X12, X4, X13

      (935) 0x460230 LDR	X11, [X10, X12,LSL #3]

      (935) 0x460234 STR	X11, [X18, X3,LSL #3]

      (935) 0x460238 ADD	X3, X3, #1

      (935) 0x46023c B	45f39c

        (929) 0x460240 LDR	X7, [SP, #120]

        (929) 0x460244 ADD	X22, X22, #8

        (929) 0x460248 CMP	X7, X20

        (929) 0x46024c B.NE	45f4e4

      (928) 0x460250 LDR	X4, [X23, X25,LSL #3]

      (928) 0x460254 LDR	X10, [SP, #168]

      (928) 0x460258 LDR	X6, [X21, X7,LSL #3]

      (928) 0x46025c LDR	X13, [X4, X19]

      (928) 0x460260 UBFM	X12, X10, #61, #60

      (928) 0x460264 ADD	X11, X10, #1

      (928) 0x460268 LDR	X5, [SP, #224]

      (928) 0x46026c STR	X11, [SP, #168]

      (928) 0x460270 STR	X13, [X6, X12]

      (928) 0x460274 STR	X26, [X5, X12]

      (928) 0x460278 B	45f49c

  (938) 0x46027c LDR	X17, [X12, X20]

  (938) 0x460280 ADD	X16, X7, #1

  (938) 0x460284 ADD	X9, X9, #1

  (938) 0x460288 LDR	X0, [X11, #8]

  (938) 0x46028c STR	X17, [X0, X7,LSL #3]

  (938) 0x460290 ORR	X7, XZR, X16

  (938) 0x460294 LDR	X2, [X8]

  (938) 0x460298 CMP	X2, X9

  (938) 0x46029c B.GT	45edc0

(903) 0x4602a0 LDR	X3, [X30, #16]

(903) 0x4602a4 ADD	X5, X5, #1

(903) 0x4602a8 CMP	X3, X5

(903) 0x4602ac B.GT	45ed44

0x4602b0 B	45edf0

  (939) 0x4602b4 LDR	X0, [X23, X9]

  (939) 0x4602b8 ADD	X2, X4, #1

  (939) 0x4602bc ADD	X16, X16, #1

  (939) 0x4602c0 LDR	X3, [X27, #8]

  (939) 0x4602c4 STR	X0, [X3, X4,LSL #3]

  (939) 0x4602c8 ORR	X4, XZR, X2

  (939) 0x4602cc LDR	X1, [X20]

  (939) 0x4602d0 CMP	X16, X1

  (939) 0x4602d4 B.LT	45ed80

(903) 0x4602d8 B	45eda0

      (935) 0x4602dc MOVZ	X13, #1

      (935) 0x4602e0 B	460220

      (935) 0x4602e4 MOVZ	X28, #0

      (935) 0x4602e8 UBFM	X4, X28, #61, #60

      (935) 0x4602ec LDR	X10, [X20, X4]

      (935) 0x4602f0 LDR	X17, [X21, X4]

      (935) 0x4602f4 SUB	X13, X13, X10

      (935) 0x4602f8 LDR	X12, [X17, X13,LSL #3]

      (935) 0x4602fc STR	X12, [X18, X3,LSL #3]

      (935) 0x460300 ADD	X3, X3, #1

      (935) 0x460304 B	45f2fc

    (934) 0x460308 UBFM	X7, X3, #61, #60

    (934) 0x46030c ADD	X2, X5, #1

    (934) 0x460310 STR	X7, [SP, #120]

    (934) 0x460314 LDR	X4, [SP, #120]

    (934) 0x460318 SUB	X17, X12, X2

    (934) 0x46031c ANDS	X6, X17, #4224

    (934) 0x460320 SUB	X28, X4, X5,LSL #3

    (934) 0x460324 ADD	X28, X18, X28

    (934) 0x460328 B.EQ	4604f8

    (934) 0x46032c LDR	X8, [X11, X5,LSL #3]

    (934) 0x460330 ADD	X7, X8, X16

    (934) 0x460334 STR	X7, [X28, X5,LSL #3]

    (934) 0x460338 ORR	X5, XZR, X2

    (934) 0x46033c ADD	X2, X2, #1

    (934) 0x460340 CMP	X6, #1

    (934) 0x460344 B.EQ	4604f8

    (934) 0x460348 CMP	X6, #2

    (934) 0x46034c B.EQ	4603d4

    (934) 0x460350 CMP	X6, #3

    (934) 0x460354 B.EQ	4603c0

    (934) 0x460358 CMP	X6, #4

    (934) 0x46035c B.EQ	4603ac

    (934) 0x460360 CMP	X6, #5

    (934) 0x460364 B.EQ	460398

    (934) 0x460368 CMP	X6, #6

    (934) 0x46036c B.EQ	460384

    (934) 0x460370 LDR	X17, [X11, X5,LSL #3]

    (934) 0x460374 ADD	X6, X17, X16

    (934) 0x460378 STR	X6, [X28, X5,LSL #3]

    (934) 0x46037c ORR	X5, XZR, X2

    (934) 0x460380 ADD	X2, X2, #1

    (934) 0x460384 LDR	X4, [X11, X5,LSL #3]

    (934) 0x460388 ADD	X8, X4, X16

    (934) 0x46038c STR	X8, [X28, X5,LSL #3]

    (934) 0x460390 ORR	X5, XZR, X2

    (934) 0x460394 ADD	X2, X2, #1

    (934) 0x460398 LDR	X7, [X11, X5,LSL #3]

    (934) 0x46039c ADD	X17, X7, X16

    (934) 0x4603a0 STR	X17, [X28, X5,LSL #3]

    (934) 0x4603a4 ORR	X5, XZR, X2

    (934) 0x4603a8 ADD	X2, X2, #1

    (934) 0x4603ac LDR	X6, [X11, X5,LSL #3]

    (934) 0x4603b0 ADD	X4, X6, X16

    (934) 0x4603b4 STR	X4, [X28, X5,LSL #3]

    (934) 0x4603b8 ORR	X5, XZR, X2

    (934) 0x4603bc ADD	X2, X2, #1

    (934) 0x4603c0 LDR	X8, [X11, X5,LSL #3]

    (934) 0x4603c4 ADD	X7, X8, X16

    (934) 0x4603c8 STR	X7, [X28, X5,LSL #3]

    (934) 0x4603cc ORR	X5, XZR, X2

    (934) 0x4603d0 ADD	X2, X2, #1

    (934) 0x4603d4 LDR	X17, [X11, X5,LSL #3]

    (934) 0x4603d8 STR	X0, [SP, #120]

    (934) 0x4603dc STR	X13, [SP, #136]

    (934) 0x4603e0 ADD	X6, X17, X16

    (934) 0x4603e4 STR	X6, [X28, X5,LSL #3]

    (934) 0x4603e8 ORR	X5, XZR, X2

    (934) 0x4603ec ADD	X2, X2, #1

    (934) 0x4603f0 B	46044c

      (936) 0x4603f4 LDR	X0, [X11, X2,LSL #3]

      (936) 0x4603f8 ADD	X0, X0, X16

      (936) 0x4603fc STR	X0, [X28, X2,LSL #3]

      (936) 0x460400 ADD	X2, X2, #8

      (936) 0x460404 LDR	X0, [X11, X17,LSL #3]

      (936) 0x460408 ADD	X0, X0, X16

      (936) 0x46040c STR	X0, [X28, X17,LSL #3]

      (936) 0x460410 LDR	X17, [X11, X13,LSL #3]

      (936) 0x460414 ADD	X0, X17, X16

      (936) 0x460418 STR	X0, [X28, X13,LSL #3]

      (936) 0x46041c LDR	X13, [X11, X8,LSL #3]

      (936) 0x460420 ADD	X17, X13, X16

      (936) 0x460424 STR	X17, [X28, X8,LSL #3]

      (936) 0x460428 LDR	X8, [X11, X7,LSL #3]

      (936) 0x46042c ADD	X0, X8, X16

      (936) 0x460430 STR	X0, [X28, X7,LSL #3]

      (936) 0x460434 LDR	X7, [X11, X6,LSL #3]

      (936) 0x460438 ADD	X13, X7, X16

      (936) 0x46043c STR	X13, [X28, X6,LSL #3]

      (936) 0x460440 LDR	X6, [X11, X4,LSL #3]

      (936) 0x460444 ADD	X17, X6, X16

      (936) 0x460448 STR	X17, [X28, X4,LSL #3]

      (936) 0x46044c LDR	X0, [X11, X5,LSL #3]

      (936) 0x460450 ADD	X17, X2, #1

      (936) 0x460454 ADD	X13, X2, #2

      (936) 0x460458 ADD	X8, X2, #3

      (936) 0x46045c ADD	X7, X2, #4

      (936) 0x460460 ADD	X6, X2, #5

      (936) 0x460464 ADD	X4, X2, #6

      (936) 0x460468 ADD	X0, X0, X16

      (936) 0x46046c STR	X0, [X28, X5,LSL #3]

      (936) 0x460470 ADD	X5, X2, #7

      (936) 0x460474 CMP	X12, X2

      (936) 0x460478 B.NE	4603f4

    (934) 0x46047c LDR	X0, [SP, #120]

    (934) 0x460480 LDR	X13, [SP, #136]

    (934) 0x460484 B	45f218

      (935) 0x460488 MOVZ	X28, #1

      (935) 0x46048c B	4602e8

      (935) 0x460490 MOVZ	X13, #2

      (935) 0x460494 B	460220

      (935) 0x460498 MOVZ	X28, #2

      (935) 0x46049c B	4602e8

      (935) 0x4604a0 MOVZ	X13, #3

      (935) 0x4604a4 B	460220

      (935) 0x4604a8 MOVZ	X13, #4

      (935) 0x4604ac B	460220

      (935) 0x4604b0 MOVZ	X28, #3

      (935) 0x4604b4 B	4602e8

      (935) 0x4604b8 MOVZ	X28, #4

      (935) 0x4604bc B	4602e8

      (935) 0x4604c0 MOVZ	X13, #5

      (935) 0x4604c4 B	460220

    (927) 0x4604c8 ORR	X18, XZR, X15

    (927) 0x4604cc B	45f448

      (935) 0x4604d0 MOVZ	X28, #5

      (935) 0x4604d4 B	4602e8

      (935) 0x4604d8 MOVZ	X13, #6

      (935) 0x4604dc B	460220

      (935) 0x4604e0 MOVZ	X13, #7

      (935) 0x4604e4 B	460220

      (935) 0x4604e8 MOVZ	X28, #6

      (935) 0x4604ec B	4602e8

      (935) 0x4604f0 MOVZ	X28, #7

      (935) 0x4604f4 B	4602e8

    (934) 0x4604f8 STR	X0, [SP, #120]

    (934) 0x4604fc STR	X13, [SP, #136]

    (934) 0x460500 B	46044c

(905) 0x460504 LDR	X15, [SP, #336]

(905) 0x460508 LDR	X24, [SP, #176]

(905) 0x46050c LDR	X18, [X15, X23,LSL #3]

(905) 0x460510 STR	XZR, [X18]

(905) 0x460514 CMP	X24, #0

(905) 0x460518 B.LE	46200c

(905) 0x46051c LDR	X5, [SP, #664]

(905) 0x460520 MOVZ	X22, #0

(905) 0x460524 MOVZ	X3, #8

(905) 0x460528 LDR	X11, [SP, #456]

(905) 0x46052c LDR	X17, [SP, #744]

(905) 0x460530 SUB	X14, X5, #8

  (930) 0x460534 LDR	X30, [X14, X3]

  (930) 0x460538 LDR	X2, [X5, X3]

  (930) 0x46053c CMP	X30, X2

  (930) 0x460540 B.GE	46055c

    (931) 0x460544 LDR	X1, [X26, X30,LSL #3]

    (931) 0x460548 CMP	X19, X1

    (931) 0x46054c B.EQ	4605f0

    (931) 0x460550 ADD	X30, X30, #1

    (931) 0x460554 CMP	X30, X2

    (931) 0x460558 B.LT	460544

  (930) 0x46055c STR	X22, [X18, X3]

  (930) 0x460560 ADD	X3, X3, #8

  (930) 0x460564 CMP	X17, X3

  (930) 0x460568 B.NE	460534

(905) 0x46056c LDR	X18, [SP, #368]

(905) 0x460570 LDR	X24, [SP, #712]

(905) 0x460574 LDR	X15, [SP, #176]

(905) 0x460578 ADD	X28, X18, #40

(905) 0x46057c LDR	X8, [SP, #304]

(905) 0x460580 STR	X24, [X18, #16]

(905) 0x460584 LDR	X9, [SP, #720]

(905) 0x460588 LDR	X7, [X8, X23,LSL #3]

(905) 0x46058c STP	X15, X9, [X28]

(905) 0x460590 LDR	X4, [SP, #152]

(905) 0x460594 STR	X7, [X18, #24]

(905) 0x460598 LDR	X6, [SP, #400]

(905) 0x46059c STP	X6, X4, [X18]

(905) 0x4605a0 LDR	X0, [SP, #336]

(905) 0x4605a4 LDR	X13, [X0, X23,LSL #3]

(905) 0x4605a8 STR	X13, [X18, #56]

(905) 0x4605ac CBNZ	X22, 461ed8

(905) 0x4605b0 LDR	X10, [SP, #560]

(905) 0x4605b4 MOVZ	X0, #11

(905) 0x4605b8 LDR	X1, [SP, #368]

(905) 0x4605bc LDR	X2, [SP, #384]

(905) 0x4605c0 STR	XZR, [X10, X23,LSL #3]

(905) 0x4605c4 STR	XZR, [X21, X19,LSL #3]

(905) 0x4605c8 LDR	X3, [X10, X23,UXTW #3]

(905) 0x4605cc BL	4e46a4

(905) 0x4605d0 BL	4e4eac

(905) 0x4605d4 LDR	X11, [SP, #504]

(905) 0x4605d8 TBNZ	X11, #63, 461ebc

(905) 0x4605dc LDR	X5, [SP, #176]

(905) 0x4605e0 STR	XZR, [SP, #504]

(905) 0x4605e4 CMP	X5, #0

(905) 0x4605e8 B.GT	45f3ec

(905) 0x4605ec B	45f590

    (931) 0x4605f0 STR	X22, [X11, X30,LSL #3]

    (931) 0x4605f4 LDR	X16, [X27, X30,LSL #3]

    (931) 0x4605f8 ADD	X30, X30, #1

    (931) 0x4605fc LDR	X2, [X5, X3]

    (931) 0x460600 ADD	X22, X22, X16

    (931) 0x460604 CMP	X2, X30

    (931) 0x460608 B.GT	460544

  (930) 0x46060c STR	X22, [X18, X3]

  (930) 0x460610 ADD	X3, X3, #8

  (930) 0x460614 CMP	X17, X3

  (930) 0x460618 B.NE	460534

(905) 0x46061c B	46056c

(905) 0x460620 LDR	X22, [SP, #152]

(905) 0x460624 MOVZ	X1, #8

(905) 0x460628 ADD	X0, X22, #1

(905) 0x46062c BL	52b308

(905) 0x460630 LDR	X24, [SP, #304]

(905) 0x460634 ORR	X13, XZR, X0

(905) 0x460638 MOVZ	X1, #8

(905) 0x46063c LDR	X0, [SP, #552]

(905) 0x460640 STR	X13, [X24, X23,LSL #3]

(905) 0x460644 BL	52b308

(905) 0x460648 LDR	X14, [SP, #336]

(905) 0x46064c STR	X0, [X14, X23,LSL #3]

(905) 0x460650 LDR	X15, [X24, X23,LSL #3]

(905) 0x460654 STR	XZR, [X15]

(905) 0x460658 CMP	X22, #0

(905) 0x46065c B.LE	4621d8

(905) 0x460660 ADRP	X1,

(905) 0x460664 MOVZ	X18, #0

(905) 0x460668 ADD	X8, X1, #512

(905) 0x46066c MOVZ	X3, #0

(905) 0x460670 STR	X8, [SP, #120]

(905) 0x460674 TBZ	W22, #0, 4606e8

(905) 0x460678 LDR	X4, [SP, #216]

(905) 0x46067c ADD	X7, SP, #848

(905) 0x460680 MOVZ	W3, #0

(905) 0x460684 MOVZ	W2, #0

(905) 0x460688 LDR	X9, [SP, #256]

(905) 0x46068c LDR	X1, [SP, #296]

(905) 0x460690 STP	X23, X25, [X7, #40]

(905) 0x460694 STP	X9, X4, [X7]

(905) 0x460698 LDR	X17, [SP, #200]

(905) 0x46069c STR	XZR, [SP, #904]

(905) 0x4606a0 LDR	X5, [SP, #376]

(905) 0x4606a4 STR	XZR, [SP, #912]

(905) 0x4606a8 LDR	X16, [SP, #568]

(905) 0x4606ac STR	X17, [SP, #864]

(905) 0x4606b0 LDR	X0, [SP, #120]

(905) 0x4606b4 STR	X5, [SP, #880]

(905) 0x4606b8 STR	X16, [SP, #872]

(905) 0x4606bc BL	410c40

(905) 0x4606c0 LDR	X0, [SP, #304]

(905) 0x4606c4 MOVZ	X2, #1

(905) 0x4606c8 ORR	X3, XZR, X2

(905) 0x4606cc LDR	X18, [SP, #912]

(905) 0x4606d0 LDR	X24, [SP, #152]

(905) 0x4606d4 LDR	X11, [X0, X23,LSL #3]

(905) 0x4606d8 STR	X18, [X11, X2,LSL #3]

(905) 0x4606dc CMP	X24, X2

(905) 0x4606e0 B.EQ	4607cc

(905) 0x4606e4 LDR	X24, [SP, #304]

(905) 0x4606e8 ORR	X28, XZR, X26

(905) 0x4606ec ORR	X30, XZR, X20

(905) 0x4606f0 STR	X27, [SP, #136]

(905) 0x4606f4 LDR	X26, [SP, #568]

(905) 0x4606f8 ORR	X20, XZR, X21

(905) 0x4606fc ORR	X22, XZR, X3

(905) 0x460700 ORR	X21, XZR, X30

(905) 0x460704 ORR	X27, XZR, X19

  (932) 0x460708 LDR	X6, [SP, #200]

  (932) 0x46070c ADD	X14, SP, #848

  (932) 0x460710 ADD	X15, SP, #880

  (932) 0x460714 MOVZ	W3, #0

  (932) 0x460718 MOVZ	W2, #0

  (932) 0x46071c LDR	X10, [SP, #216]

  (932) 0x460720 LDR	X19, [SP, #256]

  (932) 0x460724 LDR	X13, [SP, #376]

  (932) 0x460728 LDR	X0, [SP, #120]

  (932) 0x46072c LDR	X1, [SP, #296]

  (932) 0x460730 STP	X19, X10, [X14]

  (932) 0x460734 STP	X6, X26, [X14, #16]

  (932) 0x460738 STP	X13, X23, [X15]

  (932) 0x46073c STP	X25, X22, [X15, #16]

  (932) 0x460740 ADD	X22, X22, #1

  (932) 0x460744 STR	X18, [SP, #912]

  (932) 0x460748 BL	410c40

  (932) 0x46074c LDR	X12, [X24, X23,LSL #3]

  (932) 0x460750 ADD	X5, SP, #848

  (932) 0x460754 ADD	X18, SP, #880

  (932) 0x460758 MOVZ	W3, #0

  (932) 0x46075c MOVZ	W2, #0

  (932) 0x460760 LDR	X4, [SP, #912]

  (932) 0x460764 LDR	X8, [SP, #200]

  (932) 0x460768 LDR	X7, [SP, #216]

  (932) 0x46076c STR	X4, [X12, X22,LSL #3]

  (932) 0x460770 LDR	X9, [SP, #376]

  (932) 0x460774 LDR	X0, [SP, #120]

  (932) 0x460778 LDR	X1, [SP, #296]

  (932) 0x46077c STP	X19, X7, [X5]

  (932) 0x460780 STP	X8, X26, [X5, #16]

  (932) 0x460784 STP	X9, X23, [X18]

  (932) 0x460788 STP	X25, X22, [X18, #16]

  (932) 0x46078c STR	X4, [SP, #912]

  (932) 0x460790 BL	410c40

  (932) 0x460794 LDR	X1, [X24, X23,LSL #3]

  (932) 0x460798 ADD	X2, X22, #1

  (932) 0x46079c ORR	X22, XZR, X2

  (932) 0x4607a0 LDR	X18, [SP, #912]

  (932) 0x4607a4 LDR	X3, [SP, #152]

  (932) 0x4607a8 STR	X18, [X1, X2,LSL #3]

  (932) 0x4607ac CMP	X3, X2

  (932) 0x4607b0 B.NE	460708

(905) 0x4607b4 ORR	X19, XZR, X27

(905) 0x4607b8 LDR	X27, [SP, #136]

(905) 0x4607bc ORR	X17, XZR, X21

(905) 0x4607c0 ORR	X26, XZR, X28

(905) 0x4607c4 ORR	X21, XZR, X20

(905) 0x4607c8 ORR	X20, XZR, X17

(905) 0x4607cc LDR	X1, [SP, #344]

(905) 0x4607d0 ORR	X3, XZR, X27

(905) 0x4607d4 MOVZ	X0, #11

(905) 0x4607d8 STR	X18, [SP, #120]

(905) 0x4607dc LDR	X2, [SP, #376]

(905) 0x4607e0 BL	4e46a4

(905) 0x4607e4 BL	4e4eac

(905) 0x4607e8 LDR	X11, [SP, #120]

(905) 0x4607ec LDR	X0, [SP, #544]

(905) 0x4607f0 CMP	X11, X0

(905) 0x4607f4 B.GT	460b60

(905) 0x4607f8 STR	X11, [SP, #544]

(905) 0x4607fc B	45eebc

    (920) 0x460800 LD1D	{Z26.D}, P4/Z, [X13, #1, MUL VL]

    (920) 0x460804 ST1D	{Z26.D}, P4, [X11, #1, MUL VL]

    (920) 0x460808 B	45ff44

    (920) 0x46080c LD1D	{Z19.D}, P6/Z, [X12, #1, MUL VL]

    (920) 0x460810 ADD	X5, X5, X14

    (920) 0x460814 ST1D	{Z19.D}, P6, [X10, #1, MUL VL]

    (920) 0x460818 B	460170

    (920) 0x46081c SUB	X4, X4, X3,LSL #3

    (920) 0x460820 SUB	X23, X18, X0

    (920) 0x460824 ANDS	X17, X23, #4224

    (920) 0x460828 ADD	X30, X26, X4

    (920) 0x46082c B.EQ	460910

    (920) 0x460830 LDR	D20, [X28, X3,LSL #3]

    (920) 0x460834 STR	D20, [X30, X3,LSL #3]

    (920) 0x460838 ORR	X3, XZR, X0

    (920) 0x46083c ADD	X0, X0, #1

    (920) 0x460840 CMP	X17, #1

    (920) 0x460844 B.EQ	460910

    (920) 0x460848 CMP	X17, #2

    (920) 0x46084c B.EQ	4608c0

    (920) 0x460850 CMP	X17, #3

    (920) 0x460854 B.EQ	4608b0

    (920) 0x460858 CMP	X17, #4

    (920) 0x46085c B.EQ	4608a0

    (920) 0x460860 CMP	X17, #5

    (920) 0x460864 B.EQ	460890

    (920) 0x460868 CMP	X17, #6

    (920) 0x46086c B.EQ	460880

    (920) 0x460870 LDR	D21, [X28, X3,LSL #3]

    (920) 0x460874 STR	D21, [X30, X3,LSL #3]

    (920) 0x460878 ORR	X3, XZR, X0

    (920) 0x46087c ADD	X0, X0, #1

    (920) 0x460880 LDR	D1, [X28, X3,LSL #3]

    (920) 0x460884 STR	D1, [X30, X3,LSL #3]

    (920) 0x460888 ORR	X3, XZR, X0

    (920) 0x46088c ADD	X0, X0, #1

    (920) 0x460890 LDR	D22, [X28, X3,LSL #3]

    (920) 0x460894 STR	D22, [X30, X3,LSL #3]

    (920) 0x460898 ORR	X3, XZR, X0

    (920) 0x46089c ADD	X0, X0, #1

    (920) 0x4608a0 LDR	D23, [X28, X3,LSL #3]

    (920) 0x4608a4 STR	D23, [X30, X3,LSL #3]

    (920) 0x4608a8 ORR	X3, XZR, X0

    (920) 0x4608ac ADD	X0, X0, #1

    (920) 0x4608b0 LDR	D24, [X28, X3,LSL #3]

    (920) 0x4608b4 STR	D24, [X30, X3,LSL #3]

    (920) 0x4608b8 ORR	X3, XZR, X0

    (920) 0x4608bc ADD	X0, X0, #1

    (920) 0x4608c0 LDR	D25, [X28, X3,LSL #3]

    (920) 0x4608c4 STR	D25, [X30, X3,LSL #3]

    (920) 0x4608c8 ORR	X3, XZR, X0

    (920) 0x4608cc ADD	X0, X0, #1

    (920) 0x4608d0 B	460910

      (921) 0x4608d4 LDR	D27, [X28, X0,LSL #3]

      (921) 0x4608d8 STR	D27, [X30, X0,LSL #3]

      (921) 0x4608dc ADD	X0, X0, #8

      (921) 0x4608e0 LDR	D28, [X28, X16,LSL #3]

      (921) 0x4608e4 STR	D28, [X30, X16,LSL #3]

      (921) 0x4608e8 LDR	D31, [X28, X15,LSL #3]

      (921) 0x4608ec STR	D31, [X30, X15,LSL #3]

      (921) 0x4608f0 LDR	D0, [X28, X13,LSL #3]

      (921) 0x4608f4 STR	D0, [X30, X13,LSL #3]

      (921) 0x4608f8 LDR	D2, [X28, X10,LSL #3]

      (921) 0x4608fc STR	D2, [X30, X10,LSL #3]

      (921) 0x460900 LDR	D30, [X28, X12,LSL #3]

      (921) 0x460904 STR	D30, [X30, X12,LSL #3]

      (921) 0x460908 LDR	D3, [X28, X7,LSL #3]

      (921) 0x46090c STR	D3, [X30, X7,LSL #3]

      (921) 0x460910 LDR	D26, [X28, X3,LSL #3]

      (921) 0x460914 ADD	X16, X0, #1

      (921) 0x460918 ADD	X15, X0, #2

      (921) 0x46091c ADD	X13, X0, #3

      (921) 0x460920 ADD	X10, X0, #4

      (921) 0x460924 ADD	X12, X0, #5

      (921) 0x460928 ADD	X7, X0, #6

      (921) 0x46092c STR	D26, [X30, X3,LSL #3]

      (921) 0x460930 ADD	X3, X0, #7

      (921) 0x460934 CMP	X0, X18

      (921) 0x460938 B.NE	4608d4

    (920) 0x46093c ADD	X5, X5, X14

    (920) 0x460940 B	460170

    (920) 0x460944 SUB	X23, X30, X4,LSL #3

    (920) 0x460948 SUB	X18, X11, X3

    (920) 0x46094c ANDS	X14, X18, #4224

    (920) 0x460950 ADD	X7, X26, X23

    (920) 0x460954 B.EQ	460a38

    (920) 0x460958 LDR	D27, [X27, X4,LSL #3]

    (920) 0x46095c STR	D27, [X7, X4,LSL #3]

    (920) 0x460960 ORR	X4, XZR, X3

    (920) 0x460964 ADD	X3, X3, #1

    (920) 0x460968 CMP	X14, #1

    (920) 0x46096c B.EQ	460a38

    (920) 0x460970 CMP	X14, #2

    (920) 0x460974 B.EQ	4609e8

    (920) 0x460978 CMP	X14, #3

    (920) 0x46097c B.EQ	4609d8

    (920) 0x460980 CMP	X14, #4

    (920) 0x460984 B.EQ	4609c8

    (920) 0x460988 CMP	X14, #5

    (920) 0x46098c B.EQ	4609b8

    (920) 0x460990 CMP	X14, #6

    (920) 0x460994 B.EQ	4609a8

    (920) 0x460998 LDR	D28, [X27, X4,LSL #3]

    (920) 0x46099c STR	D28, [X7, X4,LSL #3]

    (920) 0x4609a0 ORR	X4, XZR, X3

    (920) 0x4609a4 ADD	X3, X3, #1

    (920) 0x4609a8 LDR	D31, [X27, X4,LSL #3]

    (920) 0x4609ac STR	D31, [X7, X4,LSL #3]

    (920) 0x4609b0 ORR	X4, XZR, X3

    (920) 0x4609b4 ADD	X3, X3, #1

    (920) 0x4609b8 LDR	D0, [X27, X4,LSL #3]

    (920) 0x4609bc STR	D0, [X7, X4,LSL #3]

    (920) 0x4609c0 ORR	X4, XZR, X3

    (920) 0x4609c4 ADD	X3, X3, #1

    (920) 0x4609c8 LDR	D2, [X27, X4,LSL #3]

    (920) 0x4609cc STR	D2, [X7, X4,LSL #3]

    (920) 0x4609d0 ORR	X4, XZR, X3

    (920) 0x4609d4 ADD	X3, X3, #1

    (920) 0x4609d8 LDR	D30, [X27, X4,LSL #3]

    (920) 0x4609dc STR	D30, [X7, X4,LSL #3]

    (920) 0x4609e0 ORR	X4, XZR, X3

    (920) 0x4609e4 ADD	X3, X3, #1

    (920) 0x4609e8 LDR	D3, [X27, X4,LSL #3]

    (920) 0x4609ec STR	D3, [X7, X4,LSL #3]

    (920) 0x4609f0 ORR	X4, XZR, X3

    (920) 0x4609f4 ADD	X3, X3, #1

    (920) 0x4609f8 B	460a38

      (923) 0x4609fc LDR	D4, [X27, X3,LSL #3]

      (923) 0x460a00 STR	D4, [X7, X3,LSL #3]

      (923) 0x460a04 ADD	X3, X3, #8

      (923) 0x460a08 LDR	D29, [X27, X30,LSL #3]

      (923) 0x460a0c STR	D29, [X7, X30,LSL #3]

      (923) 0x460a10 LDR	D5, [X27, X17,LSL #3]

      (923) 0x460a14 STR	D5, [X7, X17,LSL #3]

      (923) 0x460a18 LDR	D6, [X27, X23,LSL #3]

      (923) 0x460a1c STR	D6, [X7, X23,LSL #3]

      (923) 0x460a20 LDR	D7, [X27, X13,LSL #3]

      (923) 0x460a24 STR	D7, [X7, X13,LSL #3]

      (923) 0x460a28 LDR	D16, [X27, X12,LSL #3]

      (923) 0x460a2c STR	D16, [X7, X12,LSL #3]

      (923) 0x460a30 LDR	D17, [X27, X10,LSL #3]

      (923) 0x460a34 STR	D17, [X7, X10,LSL #3]

      (923) 0x460a38 LDR	D4, [X27, X4,LSL #3]

      (923) 0x460a3c ADD	X30, X3, #1

      (923) 0x460a40 ADD	X17, X3, #2

      (923) 0x460a44 ADD	X23, X3, #3

      (923) 0x460a48 ADD	X13, X3, #4

      (923) 0x460a4c ADD	X12, X3, #5

      (923) 0x460a50 ADD	X10, X3, #6

      (923) 0x460a54 STR	D4, [X7, X4,LSL #3]

      (923) 0x460a58 ADD	X4, X3, #7

      (923) 0x460a5c CMP	X11, X3

      (923) 0x460a60 B.NE	4609fc

    (920) 0x460a64 B	45ff44

    (920) 0x460a68 MOVZ	X3, #0

    (920) 0x460a6c B	45ff18

    (920) 0x460a70 MOVZ	X30, #0

    (920) 0x460a74 B	460140

(905) 0x460a78 LDR	X24, [SP, #224]

(905) 0x460a7c SUB	X3, X18, #1

(905) 0x460a80 MOVZ	X2, #0

(905) 0x460a84 STR	X18, [SP, #120]

(905) 0x460a88 LDR	X0, [X21, X19,LSL #3]

(905) 0x460a8c ORR	X1, XZR, X24

(905) 0x460a90 BL	52bfc0

(905) 0x460a94 LDR	X10, [SP, #560]

(905) 0x460a98 ORR	X13, XZR, X24

(905) 0x460a9c LDR	X6, [X20, X19,LSL #3]

(905) 0x460aa0 LDR	X11, [X24]

(905) 0x460aa4 LDR	X5, [X10, X23,LSL #3]

(905) 0x460aa8 STR	X6, [SP, #576]

(905) 0x460aac LDR	X12, [SP, #120]

(905) 0x460ab0 STR	X6, [X5, X11,LSL #3]

(905) 0x460ab4 CMP	X12, #1

(905) 0x460ab8 B.EQ	460b08

(905) 0x460abc LDR	X14, [X21, X19,LSL #3]

(905) 0x460ac0 MOVZ	X2, #0

(905) 0x460ac4 MOVZ	X1, #0

(905) 0x460ac8 MOVZ	X3, #1

  (926) 0x460acc LDR	X30, [X14, X3,LSL #3]

  (926) 0x460ad0 ADD	X17, X14, X1

  (926) 0x460ad4 LDR	X16, [X14, X1]

  (926) 0x460ad8 CMP	X16, X30

  (926) 0x460adc B.GE	460b18

  (926) 0x460ae0 STR	X30, [X17, #8]

  (926) 0x460ae4 ADD	X6, X6, #1

  (926) 0x460ae8 ADD	X2, X2, #1

  (926) 0x460aec LDR	X8, [X13, X3,LSL #3]

  (926) 0x460af0 ADD	X3, X3, #1

  (926) 0x460af4 UBFM	X1, X2, #61, #60

  (926) 0x460af8 STR	X6, [X5, X8,LSL #3]

  (926) 0x460afc CMP	X3, X12

  (926) 0x460b00 B.NE	460acc

(905) 0x460b04 STR	X6, [SP, #576]

(905) 0x460b08 LDR	X15, [SP, #576]

(905) 0x460b0c ADD	X22, X15, #1

(905) 0x460b10 STR	X22, [X20, X23,LSL #3]

(905) 0x460b14 B	45f5a4

  (926) 0x460b18 LDR	X9, [X13, X3,LSL #3]

  (926) 0x460b1c ADD	X3, X3, #1

  (926) 0x460b20 STR	X6, [X5, X9,LSL #3]

  (926) 0x460b24 CMP	X12, X3

  (926) 0x460b28 B.NE	460acc

(905) 0x460b2c B	460b04

0x460b30 MOVZ	X1, #8

0x460b34 ORR	X0, XZR, X20

0x460b38 STR	X20, [SP, #120]

0x460b3c BL	52b308

0x460b40 ORR	X19, XZR, X0

0x460b44 LDR	X0, [SP, #120]

0x460b48 MOVZ	X1, #8

0x460b4c STR	X19, [SP, #120]

0x460b50 BL	52b308

0x460b54 LDR	X6, [SP, #136]

0x460b58 ORR	X28, XZR, X0

0x460b5c B	45f760

(905) 0x460b60 LDR	X0, [SP, #384]

(905) 0x460b64 BL	52b3a0

(905) 0x460b68 LDR	X0, [SP, #120]

(905) 0x460b6c MOVZ	X1, #8

(905) 0x460b70 BL	52b308

(905) 0x460b74 LDR	X24, [SP, #120]

(905) 0x460b78 STR	X0, [SP, #384]

(905) 0x460b7c STR	X24, [SP, #544]

(905) 0x460b80 B	45eebc

(918) 0x460b84 ORR	X0, XZR, X26

(918) 0x460b88 BL	52b3a0

(918) 0x460b8c LDR	X0, [SP, #168]

(918) 0x460b90 MOVZ	X1, #8

(918) 0x460b94 BL	52b308

(918) 0x460b98 LDR	X23, [SP, #304]

(918) 0x460b9c ORR	X26, XZR, X0

(918) 0x460ba0 LDR	X1, [X23, X19,LSL #3]

(918) 0x460ba4 B	45fcc8

(918) 0x460ba8 LDR	X0, [SP, #136]

(918) 0x460bac BL	52b3a0

(918) 0x460bb0 MOVZ	X1, #8

(918) 0x460bb4 ORR	X0, XZR, X23

(918) 0x460bb8 BL	52b308

(918) 0x460bbc STR	X0, [SP, #136]

(918) 0x460bc0 B	4601c4

0x460bc4 LDR	X6, [SP, #144]

0x460bc8 ADRP	X10,

0x460bcc MOVZ	W2, #0

0x460bd0 ADD	X0, X10, #608

0x460bd4 STR	X18, [SP, #136]

0x460bd8 MOVZ	W3, #0

0x460bdc LDR	X7, [SP, #192]

0x460be0 STR	X27, [SP, #936]

0x460be4 LDR	X19, [SP, #216]

0x460be8 STR	X6, [SP, #952]

0x460bec LDR	X21, [SP, #256]

0x460bf0 STR	X7, [SP, #928]

0x460bf4 LDR	X20, [SP, #320]

0x460bf8 STR	X28, [SP, #960]

0x460bfc LDR	X11, [SP, #432]

0x460c00 STR	X21, [SP, #944]

0x460c04 LDR	X8, [SP, #440]

0x460c08 STR	X20, [SP, #848]

0x460c0c LDR	X15, [SP, #448]

0x460c10 STR	X11, [SP, #856]

0x460c14 LDR	X5, [SP, #584]

0x460c18 STR	X8, [SP, #904]

0x460c1c LDR	X14, [SP, #592]

0x460c20 STR	X15, [SP, #920]

0x460c24 LDR	X30, [SP, #600]

0x460c28 STR	X5, [SP, #864]

0x460c2c LDR	X16, [SP, #608]

0x460c30 STR	X14, [SP, #880]

0x460c34 LDR	X9, [SP, #616]

0x460c38 STR	X30, [SP, #888]

0x460c3c LDR	X17, [SP, #1192]

0x460c40 STR	X16, [SP, #896]

0x460c44 LDR	X1, [SP, #296]

0x460c48 STR	X9, [SP, #912]

0x460c4c STR	X19, [SP, #968]

0x460c50 STR	X17, [SP, #872]

0x460c54 LDR	X23, [SP, #120]

0x460c58 STR	X13, [SP, #1096]

0x460c5c LDR	X14, [SP, #184]

0x460c60 LDR	X17, [SP, #208]

0x460c64 STR	X23, [SP, #976]

0x460c68 LDR	X9, [SP, #248]

0x460c6c STR	X14, [SP, #1056]

0x460c70 LDR	X20, [SP, #264]

0x460c74 STR	X17, [SP, #1048]

0x460c78 LDR	X16, [SP, #272]

0x460c7c STR	X9, [SP, #1088]

0x460c80 LDR	X10, [SP, #280]

0x460c84 STR	X20, [SP, #1024]

0x460c88 LDR	X8, [SP, #312]

0x460c8c STR	X16, [SP, #1072]

0x460c90 LDR	X18, [SP, #352]

0x460c94 STR	X10, [SP, #1016]

0x460c98 LDR	X13, [SP, #360]

0x460c9c STR	X8, [SP, #1080]

0x460ca0 LDR	X5, [SP, #408]

0x460ca4 STR	X18, [SP, #984]

0x460ca8 LDR	X11, [SP, #416]

0x460cac STR	X13, [SP, #1000]

0x460cb0 LDR	X4, [SP, #424]

0x460cb4 STR	X5, [SP, #1032]

0x460cb8 LDR	X12, [SP, #512]

0x460cbc STR	X11, [SP, #1040]

0x460cc0 LDR	X30, [SP, #536]

0x460cc4 STR	X4, [SP, #992]

0x460cc8 STR	X12, [SP, #1008]

0x460ccc STR	X30, [SP, #1064]

0x460cd0 BL	410c40

0x460cd4 LDP	X0, X2, [SP, #128]

0x460cd8 CBNZ	X0, 4621ac

0x460cdc STR	X2, [SP, #136]

0x460ce0 LDR	X0, [SP, #512]

0x460ce4 BL	52b3a0

0x460ce8 LDR	X21, [SP, #208]

0x460cec LDR	X0, [X21, #8]

0x460cf0 BL	52b3a0

0x460cf4 LDR	X3, [SP, #832]

0x460cf8 STR	XZR, [X21, #8]

0x460cfc LDR	X15, [SP, #136]

0x460d00 CMP	X3, #1

0x460d04 B.LE	460d1c

0x460d08 LDR	X19, [SP, #184]

0x460d0c LDR	X0, [X19, #8]

0x460d10 BL	52b3a0

0x460d14 LDR	X15, [SP, #136]

0x460d18 STR	XZR, [X19, #8]

0x460d1c LDR	X7, [SP, #328]

0x460d20 CMP	X7, #2

0x460d24 B.EQ	4621bc

0x460d28 LDR	X18, [SP, #152]

0x460d2c ADRP	X6,

0x460d30 MOVZ	X23, #0

0x460d34 ADD	X4, X6, #3784

0x460d38 MOVZ	X21, #1

0x460d3c STR	XZR, [SP, #136]

0x460d40 LDR	X12, [SP, #176]

0x460d44 MOVZ	X19, #2

0x460d48 STR	XZR, [SP, #160]

0x460d4c LDR	X17, [SP, #200]

0x460d50 UBFM	X13, X18, #61, #60

0x460d54 STR	X4, [SP, #288]

0x460d58 LDR	X5, [SP, #264]

0x460d5c UBFM	X10, X12, #61, #60

0x460d60 STP	X26, X13, [SP, #224]

0x460d64 ORR	X26, XZR, X23

0x460d68 ADD	X14, X17, #8

0x460d6c LDR	X20, [SP, #256]

0x460d70 ADD	X11, X5, #8

0x460d74 STR	X10, [SP, #240]

0x460d78 STR	X14, [SP, #344]

0x460d7c STR	X11, [SP, #360]

0x460d80 STR	X15, [SP, #376]

0x460d84 B	460f28

(911) 0x460d88 LDR	X30, [SP, #264]

(911) 0x460d8c ADD	X6, SP, #968

(911) 0x460d90 MOVZ	W3, #0

(911) 0x460d94 LDP	X0, X1, [SP, #288]

(911) 0x460d98 MOVZ	W2, #0

(911) 0x460d9c LDR	X16, [SP, #360]

(911) 0x460da0 LDR	X10, [SP, #488]

(911) 0x460da4 LDR	X5, [SP, #144]

(911) 0x460da8 LDR	X7, [X30, X19,LSL #3]

(911) 0x460dac LDR	X12, [X16, X19,LSL #3]

(911) 0x460db0 STR	X10, [SP, #944]

(911) 0x460db4 STP	X27, X20, [X6]

(911) 0x460db8 STP	X5, X28, [X6, #16]

(911) 0x460dbc SUB	X9, X12, X7

(911) 0x460dc0 LDR	X18, [SP, #120]

(911) 0x460dc4 STR	X30, [SP, #1048]

(911) 0x460dc8 LDR	X11, [SP, #192]

(911) 0x460dcc LDR	X8, [SP, #216]

(911) 0x460dd0 STR	X18, [SP, #1008]

(911) 0x460dd4 LDR	X13, [SP, #280]

(911) 0x460dd8 STR	X11, [SP, #960]

(911) 0x460ddc LDR	X17, [SP, #352]

(911) 0x460de0 STR	X8, [SP, #1000]

(911) 0x460de4 LDR	X14, [SP, #392]

(911) 0x460de8 STR	X13, [SP, #1040]

(911) 0x460dec LDR	X30, [SP, #408]

(911) 0x460df0 STR	X17, [SP, #1024]

(911) 0x460df4 LDR	X15, [SP, #424]

(911) 0x460df8 STR	X14, [SP, #952]

(911) 0x460dfc LDR	X4, [SP, #456]

(911) 0x460e00 STR	X30, [SP, #1056]

(911) 0x460e04 LDR	X16, [SP, #416]

(911) 0x460e08 STR	X15, [SP, #1032]

(911) 0x460e0c LDR	X10, [SP, #464]

(911) 0x460e10 STR	X4, [SP, #1016]

(911) 0x460e14 LDR	X12, [SP, #184]

(911) 0x460e18 LDP	X6, X8, [SP, #312]

(911) 0x460e1c STR	X9, [SP, #1176]

(911) 0x460e20 LDR	X14, [SP, #128]

(911) 0x460e24 STR	X8, [SP, #848]

(911) 0x460e28 LDR	X17, [SP, #136]

(911) 0x460e2c STR	X16, [SP, #1064]

(911) 0x460e30 LDR	X9, [SP, #208]

(911) 0x460e34 STR	X12, [SP, #1080]

(911) 0x460e38 LDR	X4, [SP, #224]

(911) 0x460e3c STR	X24, [SP, #1088]

(911) 0x460e40 LDR	X7, [SP, #272]

(911) 0x460e44 STR	X9, [SP, #1072]

(911) 0x460e48 LDR	X5, [SP, #376]

(911) 0x460e4c STR	X10, [SP, #1096]

(911) 0x460e50 LDR	X18, [SP, #432]

(911) 0x460e54 STR	X7, [SP, #1104]

(911) 0x460e58 LDR	X15, [SP, #472]

(911) 0x460e5c STR	X5, [SP, #936]

(911) 0x460e60 LDR	X11, [SP, #496]

(911) 0x460e64 STR	X18, [SP, #856]

(911) 0x460e68 LDR	X13, [SP, #584]

(911) 0x460e6c STR	X19, [SP, #1112]

(911) 0x460e70 STR	X6, [SP, #1120]

(911) 0x460e74 STR	X14, [SP, #1128]

(911) 0x460e78 STR	X11, [SP, #1136]

(911) 0x460e7c STR	X13, [SP, #864]

(911) 0x460e80 STR	X22, [SP, #1144]

(911) 0x460e84 STR	X4, [SP, #1152]

(911) 0x460e88 STR	X17, [SP, #1160]

(911) 0x460e8c STR	X15, [SP, #1168]

(911) 0x460e90 LDR	X30, [SP, #1192]

(911) 0x460e94 LDR	X9, [SP, #440]

(911) 0x460e98 LDR	X5, [SP, #448]

(911) 0x460e9c STR	X30, [SP, #872]

(911) 0x460ea0 LDR	X6, [SP, #480]

(911) 0x460ea4 STR	X9, [SP, #904]

(911) 0x460ea8 LDR	X16, [SP, #592]

(911) 0x460eac STR	X5, [SP, #920]

(911) 0x460eb0 LDR	X10, [SP, #600]

(911) 0x460eb4 STR	X6, [SP, #928]

(911) 0x460eb8 LDR	X12, [SP, #608]

(911) 0x460ebc STR	X16, [SP, #880]

(911) 0x460ec0 LDR	X7, [SP, #616]

(911) 0x460ec4 STR	X10, [SP, #888]

(911) 0x460ec8 STR	X12, [SP, #896]

(911) 0x460ecc STR	X7, [SP, #912]

(911) 0x460ed0 BL	410c40

(911) 0x460ed4 LDR	X2, [SP, #208]

(911) 0x460ed8 LDR	X0, [X2, X19,LSL #3]

(911) 0x460edc BL	52b3a0

(911) 0x460ee0 LDR	X1, [SP, #208]

(911) 0x460ee4 LDR	X3, [SP, #832]

(911) 0x460ee8 STR	XZR, [X1, X19,LSL #3]

(911) 0x460eec CMP	X3, #1

(911) 0x460ef0 B.LE	460f14

(911) 0x460ef4 LDR	X0, [SP, #184]

(911) 0x460ef8 LDR	X0, [X0, X19,LSL #3]

(911) 0x460efc BL	52b3a0

(911) 0x460f00 LDR	X8, [SP, #184]

(911) 0x460f04 STR	XZR, [X8, X19,LSL #3]

(911) 0x460f08 LDR	X0, [X24, X19,LSL #3]

(911) 0x460f0c BL	52b3a0

(911) 0x460f10 STR	XZR, [X24, X19,LSL #3]

(911) 0x460f14 LDR	X14, [SP, #328]

(911) 0x460f18 ADD	X19, X19, #1

(911) 0x460f1c ADD	X21, X21, #1

(911) 0x460f20 CMP	X14, X19

(911) 0x460f24 B.EQ	461750

(911) 0x460f28 LDR	X30, [SP, #832]

(911) 0x460f2c CMP	X30, #1

(911) 0x460f30 B.LE	460d88

(911) 0x460f34 LDR	X16, [SP, #304]

(911) 0x460f38 LDR	X8, [SP, #232]

(911) 0x460f3c LDR	X1, [X16, X19,LSL #3]

(911) 0x460f40 LDR	X9, [X1, X8]

(911) 0x460f44 STR	X9, [SP, #168]

(911) 0x460f48 CMP	X9, X23

(911) 0x460f4c B.GT	461710

(911) 0x460f50 LDR	X0, [SP, #152]

(911) 0x460f54 MOVZ	X5, #0

(911) 0x460f58 MOVZ	X2, #0

(911) 0x460f5c CMP	X0, #0

(911) 0x460f60 B.LE	461414

(911) 0x460f64 LDR	X9, [SP, #216]

  (912) 0x460f68 LDR	X3, [SP, #200]

  (912) 0x460f6c LDR	X15, [SP, #344]

  (912) 0x460f70 LDR	X6, [X3, X2,LSL #3]

  (912) 0x460f74 LDR	X8, [X15, X2,LSL #3]

  (912) 0x460f78 CMP	X6, X8

  (912) 0x460f7c B.LT	460f90

  (912) 0x460f80 B	461404

    (913) 0x460f84 ADD	X6, X6, #1

    (913) 0x460f88 CMP	X6, X8

    (913) 0x460f8c B.EQ	461404

    (913) 0x460f90 LDR	X7, [X25, X6,LSL #3]

    (913) 0x460f94 UBFM	X0, X7, #61, #60

    (913) 0x460f98 LDR	X4, [X22, X0]

    (913) 0x460f9c CMP	X4, X21

    (913) 0x460fa0 B.NE	460f84

    (913) 0x460fa4 ADD	X15, X0, #8

    (913) 0x460fa8 LDR	X4, [X20, X0]

    (913) 0x460fac LDR	X11, [X20, X15]

    (913) 0x460fb0 CMP	X4, X11

    (913) 0x460fb4 B.GE	4611d0

    (913) 0x460fb8 SUB	X16, X11, X4

    (913) 0x460fbc UBFM	X30, X5, #61, #60

    (913) 0x460fc0 ADD	X3, X4, #1

    (913) 0x460fc4 CMP	X16, #1

    (913) 0x460fc8 B.EQ	4615dc

    (913) 0x460fcc ADD	X3, X4, #1

    (913) 0x460fd0 ADD	X10, X26, X5,LSL #3

    (913) 0x460fd4 UBFM	X30, X5, #61, #60

    (913) 0x460fd8 ADD	X13, X27, X3,LSL #3

    (913) 0x460fdc UBFM	X18, X3, #61, #60

    (913) 0x460fe0 SUB	X12, X10, X13

    (913) 0x460fe4 CMP	X12, #16

    (913) 0x460fe8 B.LS	4615dc

    (913) 0x460fec SUB	X17, X16, #1

    (913) 0x460ff0 CMP	X17, #2

    (913) 0x460ff4 B.LS	461700

    (913) 0x460ff8 UBFM	X23, X16, #2, #63

    (913) 0x460ffc SUB	X7, X18, #8

    (913) 0x461000 UBFM	X17, X23, #59, #58

    (913) 0x461004 ADD	X11, X27, X7

    (913) 0x461008 SUB	X18, X17, #32

    (913) 0x46100c MOVZ	X3, #0

    (913) 0x461010 UBFM	X14, X18, #5, #63

    (913) 0x461014 ADD	X13, X11, #16

    (913) 0x461018 ADD	X23, X14, #1

    (913) 0x46101c ADD	X12, X10, #16

    (913) 0x461020 ANDS	X18, X23, #4224

    (913) 0x461024 B.EQ	4610ec

    (913) 0x461028 CMP	X18, #1

    (913) 0x46102c B.EQ	4610d0

    (913) 0x461030 CMP	X18, #2

    (913) 0x461034 B.EQ	4610bc

    (913) 0x461038 CMP	X18, #3

    (913) 0x46103c B.EQ	4610a8

    (913) 0x461040 CMP	X18, #4

    (913) 0x461044 B.EQ	461094

    (913) 0x461048 CMP	X18, #5

    (913) 0x46104c B.EQ	461080

    (913) 0x461050 CMP	X18, #6

    (913) 0x461054 B.EQ	46106c

    (913) 0x461058 LDR	Q1, [X27, X7]

    (913) 0x46105c MOVZ	X3, #32

    (913) 0x461060 LDR	Q22, [X11, #16]

    (913) 0x461064 STR	Q1, [X26, X30]

    (913) 0x461068 STR	Q22, [X10, #16]

    (913) 0x46106c LDR	Q24, [X11, X3]

    (913) 0x461070 LDR	Q23, [X13, X3]

    (913) 0x461074 STR	Q24, [X10, X3]

    (913) 0x461078 STR	Q23, [X12, X3]

    (913) 0x46107c ADD	X3, X3, #32

    (913) 0x461080 LDR	Q26, [X11, X3]

    (913) 0x461084 LDR	Q25, [X13, X3]

    (913) 0x461088 STR	Q26, [X10, X3]

    (913) 0x46108c STR	Q25, [X12, X3]

    (913) 0x461090 ADD	X3, X3, #32

    (913) 0x461094 LDR	Q28, [X11, X3]

    (913) 0x461098 LDR	Q27, [X13, X3]

    (913) 0x46109c STR	Q28, [X10, X3]

    (913) 0x4610a0 STR	Q27, [X12, X3]

    (913) 0x4610a4 ADD	X3, X3, #32

    (913) 0x4610a8 LDR	Q0, [X11, X3]

    (913) 0x4610ac LDR	Q31, [X13, X3]

    (913) 0x4610b0 STR	Q0, [X10, X3]

    (913) 0x4610b4 STR	Q31, [X12, X3]

    (913) 0x4610b8 ADD	X3, X3, #32

    (913) 0x4610bc LDR	Q30, [X11, X3]

    (913) 0x4610c0 LDR	Q2, [X13, X3]

    (913) 0x4610c4 STR	Q30, [X10, X3]

    (913) 0x4610c8 STR	Q2, [X12, X3]

    (913) 0x4610cc ADD	X3, X3, #32

    (913) 0x4610d0 LDR	Q4, [X11, X3]

    (913) 0x4610d4 LDR	Q3, [X13, X3]

    (913) 0x4610d8 STR	Q4, [X10, X3]

    (913) 0x4610dc STR	Q3, [X12, X3]

    (913) 0x4610e0 ADD	X3, X3, #32

    (913) 0x4610e4 CMP	X17, X3

    (913) 0x4610e8 B.EQ	461194

      (917) 0x4610ec LDR	Q5, [X11, X3]

      (917) 0x4610f0 ADD	X7, X3, #32

      (917) 0x4610f4 ADD	X30, X3, #64

      (917) 0x4610f8 ADD	X23, X3, #96

      (917) 0x4610fc ADD	X18, X3, #128

      (917) 0x461100 LDR	Q29, [X13, X3]

      (917) 0x461104 ADD	X14, X3, #160

      (917) 0x461108 STR	Q5, [X10, X3]

      (917) 0x46110c STR	Q29, [X12, X3]

      (917) 0x461110 LDR	Q7, [X11, X7]

      (917) 0x461114 LDR	Q6, [X13, X7]

      (917) 0x461118 STR	Q7, [X10, X7]

      (917) 0x46111c STR	Q6, [X12, X7]

      (917) 0x461120 ADD	X7, X3, #192

      (917) 0x461124 LDR	Q17, [X11, X30]

      (917) 0x461128 LDR	Q16, [X13, X30]

      (917) 0x46112c STR	Q17, [X10, X30]

      (917) 0x461130 STR	Q16, [X12, X30]

      (917) 0x461134 ADD	X30, X3, #224

      (917) 0x461138 ADD	X3, X3, #256

      (917) 0x46113c LDR	Q19, [X11, X23]

      (917) 0x461140 LDR	Q18, [X13, X23]

      (917) 0x461144 STR	Q19, [X10, X23]

      (917) 0x461148 STR	Q18, [X12, X23]

      (917) 0x46114c LDR	Q21, [X11, X18]

      (917) 0x461150 LDR	Q20, [X13, X18]

      (917) 0x461154 STR	Q21, [X10, X18]

      (917) 0x461158 STR	Q20, [X12, X18]

      (917) 0x46115c LDR	Q22, [X11, X14]

      (917) 0x461160 LDR	Q1, [X13, X14]

      (917) 0x461164 STR	Q22, [X10, X14]

      (917) 0x461168 STR	Q1, [X12, X14]

      (917) 0x46116c LDR	Q24, [X11, X7]

      (917) 0x461170 LDR	Q23, [X13, X7]

      (917) 0x461174 STR	Q24, [X10, X7]

      (917) 0x461178 STR	Q23, [X12, X7]

      (917) 0x46117c LDR	Q26, [X11, X30]

      (917) 0x461180 LDR	Q25, [X13, X30]

      (917) 0x461184 STR	Q26, [X10, X30]

      (917) 0x461188 STR	Q25, [X12, X30]

      (917) 0x46118c CMP	X17, X3

      (917) 0x461190 B.NE	4610ec

    (913) 0x461194 AND	X14, X16, #8062

    (913) 0x461198 ANDS	XZR, X16, #4160

    (913) 0x46119c B.EQ	4611cc

    (913) 0x4611a0 ADD	X10, X14, X5

    (913) 0x4611a4 ADD	X4, X14, X4

    (913) 0x4611a8 SUB	X17, X16, X14

    (913) 0x4611ac ADD	X11, X26, X10,LSL #3

    (913) 0x4611b0 WHILELO	P7.D, XZR, X17

    (913) 0x4611b4 LD1D	{Z27.D}, P7/Z, [X27, X4,LSL #3]

    (913) 0x4611b8 ST1D	{Z27.D}, P7, [X11, MUL VL]

    (913) 0x4611bc CNTD	X12, ALL

    (913) 0x4611c0 ADD	X13, X27, X4,LSL #3

    (913) 0x4611c4 WHILELO	P0.D, X12, X17

    (913) 0x4611c8 B.NE	461498

    (913) 0x4611cc ADD	X5, X5, X16

    (913) 0x4611d0 LDR	X3, [X9, X0]

    (913) 0x4611d4 LDR	X18, [X9, X15]

    (913) 0x4611d8 CMP	X3, X18

    (913) 0x4611dc B.GE	460f84

    (913) 0x4611e0 SUB	X14, X18, X3

    (913) 0x4611e4 UBFM	X4, X5, #61, #60

    (913) 0x4611e8 ADD	X0, X3, #1

    (913) 0x4611ec CMP	X14, #1

    (913) 0x4611f0 B.EQ	4614b4

    (913) 0x4611f4 ADD	X0, X3, #1

    (913) 0x4611f8 ADD	X7, X26, X5,LSL #3

    (913) 0x4611fc UBFM	X4, X5, #61, #60

    (913) 0x461200 ADD	X15, X28, X0,LSL #3

    (913) 0x461204 UBFM	X16, X0, #61, #60

    (913) 0x461208 SUB	X11, X7, X15

    (913) 0x46120c CMP	X11, #16

    (913) 0x461210 B.LS	4614b4

    (913) 0x461214 SUB	X0, X14, #1

    (913) 0x461218 CMP	X0, #2

    (913) 0x46121c B.LS	461708

    (913) 0x461220 UBFM	X17, X14, #2, #63

    (913) 0x461224 SUB	X23, X16, #8

    (913) 0x461228 UBFM	X15, X17, #59, #58

    (913) 0x46122c ADD	X10, X28, X23

    (913) 0x461230 SUB	X13, X15, #32

    (913) 0x461234 MOVZ	X0, #0

    (913) 0x461238 UBFM	X18, X13, #5, #63

    (913) 0x46123c ADD	X12, X10, #16

    (913) 0x461240 ADD	X16, X18, #1

    (913) 0x461244 ADD	X11, X7, #16

    (913) 0x461248 ANDS	X30, X16, #4224

    (913) 0x46124c B.EQ	461314

    (913) 0x461250 CMP	X30, #1

    (913) 0x461254 B.EQ	4612f8

    (913) 0x461258 CMP	X30, #2

    (913) 0x46125c B.EQ	4612e4

    (913) 0x461260 CMP	X30, #3

    (913) 0x461264 B.EQ	4612d0

    (913) 0x461268 CMP	X30, #4

    (913) 0x46126c B.EQ	4612bc

    (913) 0x461270 CMP	X30, #5

    (913) 0x461274 B.EQ	4612a8

    (913) 0x461278 CMP	X30, #6

    (913) 0x46127c B.EQ	461294

    (913) 0x461280 LDR	Q6, [X28, X23]

    (913) 0x461284 MOVZ	X0, #32

    (913) 0x461288 LDR	Q7, [X10, #16]

    (913) 0x46128c STR	Q6, [X26, X4]

    (913) 0x461290 STR	Q7, [X7, #16]

    (913) 0x461294 LDR	Q17, [X10, X0]

    (913) 0x461298 LDR	Q16, [X12, X0]

    (913) 0x46129c STR	Q17, [X7, X0]

    (913) 0x4612a0 STR	Q16, [X11, X0]

    (913) 0x4612a4 ADD	X0, X0, #32

    (913) 0x4612a8 LDR	Q19, [X10, X0]

    (913) 0x4612ac LDR	Q18, [X12, X0]

    (913) 0x4612b0 STR	Q19, [X7, X0]

    (913) 0x4612b4 STR	Q18, [X11, X0]

    (913) 0x4612b8 ADD	X0, X0, #32

    (913) 0x4612bc LDR	Q21, [X10, X0]

    (913) 0x4612c0 LDR	Q20, [X12, X0]

    (913) 0x4612c4 STR	Q21, [X7, X0]

    (913) 0x4612c8 STR	Q20, [X11, X0]

    (913) 0x4612cc ADD	X0, X0, #32

    (913) 0x4612d0 LDR	Q22, [X10, X0]

    (913) 0x4612d4 LDR	Q1, [X12, X0]

    (913) 0x4612d8 STR	Q22, [X7, X0]

    (913) 0x4612dc STR	Q1, [X11, X0]

    (913) 0x4612e0 ADD	X0, X0, #32

    (913) 0x4612e4 LDR	Q24, [X10, X0]

    (913) 0x4612e8 LDR	Q23, [X12, X0]

    (913) 0x4612ec STR	Q24, [X7, X0]

    (913) 0x4612f0 STR	Q23, [X11, X0]

    (913) 0x4612f4 ADD	X0, X0, #32

    (913) 0x4612f8 LDR	Q26, [X10, X0]

    (913) 0x4612fc LDR	Q25, [X12, X0]

    (913) 0x461300 STR	Q26, [X7, X0]

    (913) 0x461304 STR	Q25, [X11, X0]

    (913) 0x461308 ADD	X0, X0, #32

    (913) 0x46130c CMP	X0, X15

    (913) 0x461310 B.EQ	4613bc

      (915) 0x461314 LDR	Q28, [X10, X0]

      (915) 0x461318 ADD	X4, X0, #32

      (915) 0x46131c ADD	X23, X0, #64

      (915) 0x461320 ADD	X18, X0, #96

      (915) 0x461324 ADD	X17, X0, #128

      (915) 0x461328 LDR	Q27, [X12, X0]

      (915) 0x46132c ADD	X16, X0, #160

      (915) 0x461330 ADD	X13, X0, #192

      (915) 0x461334 ADD	X30, X0, #224

      (915) 0x461338 STR	Q28, [X7, X0]

      (915) 0x46133c STR	Q27, [X11, X0]

      (915) 0x461340 ADD	X0, X0, #256

      (915) 0x461344 LDR	Q0, [X10, X4]

      (915) 0x461348 LDR	Q31, [X12, X4]

      (915) 0x46134c STR	Q0, [X7, X4]

      (915) 0x461350 STR	Q31, [X11, X4]

      (915) 0x461354 LDR	Q30, [X10, X23]

      (915) 0x461358 LDR	Q2, [X12, X23]

      (915) 0x46135c STR	Q30, [X7, X23]

      (915) 0x461360 STR	Q2, [X11, X23]

      (915) 0x461364 LDR	Q4, [X10, X18]

      (915) 0x461368 LDR	Q3, [X12, X18]

      (915) 0x46136c STR	Q4, [X7, X18]

      (915) 0x461370 STR	Q3, [X11, X18]

      (915) 0x461374 LDR	Q5, [X10, X17]

      (915) 0x461378 LDR	Q29, [X12, X17]

      (915) 0x46137c STR	Q5, [X7, X17]

      (915) 0x461380 STR	Q29, [X11, X17]

      (915) 0x461384 LDR	Q7, [X10, X16]

      (915) 0x461388 LDR	Q6, [X12, X16]

      (915) 0x46138c STR	Q7, [X7, X16]

      (915) 0x461390 STR	Q6, [X11, X16]

      (915) 0x461394 LDR	Q17, [X10, X13]

      (915) 0x461398 LDR	Q16, [X12, X13]

      (915) 0x46139c STR	Q17, [X7, X13]

      (915) 0x4613a0 STR	Q16, [X11, X13]

      (915) 0x4613a4 LDR	Q19, [X10, X30]

      (915) 0x4613a8 LDR	Q18, [X12, X30]

      (915) 0x4613ac STR	Q19, [X7, X30]

      (915) 0x4613b0 STR	Q18, [X11, X30]

      (915) 0x4613b4 CMP	X0, X15

      (915) 0x4613b8 B.NE	461314

    (913) 0x4613bc AND	X30, X14, #8062

    (913) 0x4613c0 ANDS	XZR, X14, #4160

    (913) 0x4613c4 B.EQ	4613f4

    (913) 0x4613c8 ADD	X7, X30, X5

    (913) 0x4613cc ADD	X3, X30, X3

    (913) 0x4613d0 SUB	X15, X14, X30

    (913) 0x4613d4 ADD	X10, X26, X7,LSL #3

    (913) 0x4613d8 WHILELO	P1.D, XZR, X15

    (913) 0x4613dc LD1D	{Z20.D}, P1/Z, [X28, X3,LSL #3]

    (913) 0x4613e0 ST1D	{Z20.D}, P1, [X10, MUL VL]

    (913) 0x4613e4 CNTD	X11, ALL

    (913) 0x4613e8 ADD	X12, X28, X3,LSL #3

    (913) 0x4613ec WHILELO	P2.D, X11, X15

    (913) 0x4613f0 B.NE	4614a4

    (913) 0x4613f4 ADD	X5, X5, X14

    (913) 0x4613f8 ADD	X6, X6, #1

    (913) 0x4613fc CMP	X6, X8

    (913) 0x461400 B.NE	460f90

  (912) 0x461404 LDR	X8, [SP, #152]

  (912) 0x461408 ADD	X2, X2, #1

  (912) 0x46140c CMP	X8, X2

  (912) 0x461410 B.NE	460f68

(911) 0x461414 LDR	X9, [SP, #336]

(911) 0x461418 LDR	X14, [SP, #368]

(911) 0x46141c LDR	X11, [SP, #152]

(911) 0x461420 LDR	X4, [SP, #176]

(911) 0x461424 STR	X1, [X14, #24]

(911) 0x461428 LDR	X18, [X9, X19,LSL #3]

(911) 0x46142c STR	X11, [X14, #8]

(911) 0x461430 LDR	X23, [SP, #240]

(911) 0x461434 STR	X4, [X14, #40]

(911) 0x461438 LDR	X17, [SP, #160]

(911) 0x46143c LDR	X23, [X18, X23]

(911) 0x461440 STR	X18, [X14, #56]

(911) 0x461444 CMP	X23, X17

(911) 0x461448 B.GT	461734

(911) 0x46144c LDR	X3, [SP, #136]

(911) 0x461450 ORR	X2, XZR, X26

(911) 0x461454 MOVZ	X0, #1

(911) 0x461458 LDR	X1, [SP, #368]

(911) 0x46145c BL	4e46a4

(911) 0x461460 BL	4e4eac

(911) 0x461464 LDR	X3, [SP, #304]

(911) 0x461468 LDR	X0, [X3, X19,LSL #3]

(911) 0x46146c BL	52b3a0

(911) 0x461470 LDR	X0, [SP, #304]

(911) 0x461474 LDR	X15, [SP, #336]

(911) 0x461478 STR	XZR, [X0, X19,LSL #3]

(911) 0x46147c LDR	X0, [X15, X19,LSL #3]

(911) 0x461480 BL	52b3a0

(911) 0x461484 LDR	X13, [SP, #336]

(911) 0x461488 STR	X23, [SP, #160]

(911) 0x46148c LDR	X23, [SP, #168]

(911) 0x461490 STR	XZR, [X13, X19,LSL #3]

(911) 0x461494 B	460d88

    (913) 0x461498 LD1D	{Z28.D}, P0/Z, [X13, #1, MUL VL]

    (913) 0x46149c ST1D	{Z28.D}, P0, [X11, #1, MUL VL]

    (913) 0x4614a0 B	4611cc

    (913) 0x4614a4 LD1D	{Z21.D}, P2/Z, [X12, #1, MUL VL]

    (913) 0x4614a8 ADD	X5, X5, X14

    (913) 0x4614ac ST1D	{Z21.D}, P2, [X10, #1, MUL VL]

    (913) 0x4614b0 B	4613f8

    (913) 0x4614b4 SUB	X4, X4, X3,LSL #3

    (913) 0x4614b8 SUB	X23, X18, X0

    (913) 0x4614bc ANDS	X17, X23, #4224

    (913) 0x4614c0 ADD	X30, X26, X4

    (913) 0x4614c4 B.EQ	4615a8

    (913) 0x4614c8 LDR	D1, [X28, X3,LSL #3]

    (913) 0x4614cc STR	D1, [X30, X3,LSL #3]

    (913) 0x4614d0 ORR	X3, XZR, X0

    (913) 0x4614d4 ADD	X0, X0, #1

    (913) 0x4614d8 CMP	X17, #1

    (913) 0x4614dc B.EQ	4615a8

    (913) 0x4614e0 CMP	X17, #2

    (913) 0x4614e4 B.EQ	461558

    (913) 0x4614e8 CMP	X17, #3

    (913) 0x4614ec B.EQ	461548

    (913) 0x4614f0 CMP	X17, #4

    (913) 0x4614f4 B.EQ	461538

    (913) 0x4614f8 CMP	X17, #5

    (913) 0x4614fc B.EQ	461528

    (913) 0x461500 CMP	X17, #6

    (913) 0x461504 B.EQ	461518

    (913) 0x461508 LDR	D22, [X28, X3,LSL #3]

    (913) 0x46150c STR	D22, [X30, X3,LSL #3]

    (913) 0x461510 ORR	X3, XZR, X0

    (913) 0x461514 ADD	X0, X0, #1

    (913) 0x461518 LDR	D23, [X28, X3,LSL #3]

    (913) 0x46151c STR	D23, [X30, X3,LSL #3]

    (913) 0x461520 ORR	X3, XZR, X0

    (913) 0x461524 ADD	X0, X0, #1

    (913) 0x461528 LDR	D24, [X28, X3,LSL #3]

    (913) 0x46152c STR	D24, [X30, X3,LSL #3]

    (913) 0x461530 ORR	X3, XZR, X0

    (913) 0x461534 ADD	X0, X0, #1

    (913) 0x461538 LDR	D25, [X28, X3,LSL #3]

    (913) 0x46153c STR	D25, [X30, X3,LSL #3]

    (913) 0x461540 ORR	X3, XZR, X0

    (913) 0x461544 ADD	X0, X0, #1

    (913) 0x461548 LDR	D26, [X28, X3,LSL #3]

    (913) 0x46154c STR	D26, [X30, X3,LSL #3]

    (913) 0x461550 ORR	X3, XZR, X0

    (913) 0x461554 ADD	X0, X0, #1

    (913) 0x461558 LDR	D27, [X28, X3,LSL #3]

    (913) 0x46155c STR	D27, [X30, X3,LSL #3]

    (913) 0x461560 ORR	X3, XZR, X0

    (913) 0x461564 ADD	X0, X0, #1

    (913) 0x461568 B	4615a8

      (914) 0x46156c LDR	D31, [X28, X0,LSL #3]

      (914) 0x461570 STR	D31, [X30, X0,LSL #3]

      (914) 0x461574 ADD	X0, X0, #8

      (914) 0x461578 LDR	D0, [X28, X16,LSL #3]

      (914) 0x46157c STR	D0, [X30, X16,LSL #3]

      (914) 0x461580 LDR	D2, [X28, X15,LSL #3]

      (914) 0x461584 STR	D2, [X30, X15,LSL #3]

      (914) 0x461588 LDR	D30, [X28, X13,LSL #3]

      (914) 0x46158c STR	D30, [X30, X13,LSL #3]

      (914) 0x461590 LDR	D3, [X28, X10,LSL #3]

      (914) 0x461594 STR	D3, [X30, X10,LSL #3]

      (914) 0x461598 LDR	D4, [X28, X12,LSL #3]

      (914) 0x46159c STR	D4, [X30, X12,LSL #3]

      (914) 0x4615a0 LDR	D29, [X28, X7,LSL #3]

      (914) 0x4615a4 STR	D29, [X30, X7,LSL #3]

      (914) 0x4615a8 LDR	D28, [X28, X3,LSL #3]

      (914) 0x4615ac ADD	X16, X0, #1

      (914) 0x4615b0 ADD	X15, X0, #2

      (914) 0x4615b4 ADD	X13, X0, #3

      (914) 0x4615b8 ADD	X10, X0, #4

      (914) 0x4615bc ADD	X12, X0, #5

      (914) 0x4615c0 ADD	X7, X0, #6

      (914) 0x4615c4 STR	D28, [X30, X3,LSL #3]

      (914) 0x4615c8 ADD	X3, X0, #7

      (914) 0x4615cc CMP	X18, X0

      (914) 0x4615d0 B.NE	46156c

    (913) 0x4615d4 ADD	X5, X5, X14

    (913) 0x4615d8 B	4613f8

    (913) 0x4615dc SUB	X23, X30, X4,LSL #3

    (913) 0x4615e0 SUB	X18, X11, X3

    (913) 0x4615e4 ANDS	X14, X18, #4224

    (913) 0x4615e8 ADD	X7, X26, X23

    (913) 0x4615ec B.EQ	4616d0

    (913) 0x4615f0 LDR	D31, [X27, X4,LSL #3]

    (913) 0x4615f4 STR	D31, [X7, X4,LSL #3]

    (913) 0x4615f8 ORR	X4, XZR, X3

    (913) 0x4615fc ADD	X3, X3, #1

    (913) 0x461600 CMP	X14, #1

    (913) 0x461604 B.EQ	4616d0

    (913) 0x461608 CMP	X14, #2

    (913) 0x46160c B.EQ	461680

    (913) 0x461610 CMP	X14, #3

    (913) 0x461614 B.EQ	461670

    (913) 0x461618 CMP	X14, #4

    (913) 0x46161c B.EQ	461660

    (913) 0x461620 CMP	X14, #5

    (913) 0x461624 B.EQ	461650

    (913) 0x461628 CMP	X14, #6

    (913) 0x46162c B.EQ	461640

    (913) 0x461630 LDR	D0, [X27, X4,LSL #3]

    (913) 0x461634 STR	D0, [X7, X4,LSL #3]

    (913) 0x461638 ORR	X4, XZR, X3

    (913) 0x46163c ADD	X3, X3, #1

    (913) 0x461640 LDR	D2, [X27, X4,LSL #3]

    (913) 0x461644 STR	D2, [X7, X4,LSL #3]

    (913) 0x461648 ORR	X4, XZR, X3

    (913) 0x46164c ADD	X3, X3, #1

    (913) 0x461650 LDR	D30, [X27, X4,LSL #3]

    (913) 0x461654 STR	D30, [X7, X4,LSL #3]

    (913) 0x461658 ORR	X4, XZR, X3

    (913) 0x46165c ADD	X3, X3, #1

    (913) 0x461660 LDR	D3, [X27, X4,LSL #3]

    (913) 0x461664 STR	D3, [X7, X4,LSL #3]

    (913) 0x461668 ORR	X4, XZR, X3

    (913) 0x46166c ADD	X3, X3, #1

    (913) 0x461670 LDR	D4, [X27, X4,LSL #3]

    (913) 0x461674 STR	D4, [X7, X4,LSL #3]

    (913) 0x461678 ORR	X4, XZR, X3

    (913) 0x46167c ADD	X3, X3, #1

    (913) 0x461680 LDR	D29, [X27, X4,LSL #3]

    (913) 0x461684 STR	D29, [X7, X4,LSL #3]

    (913) 0x461688 ORR	X4, XZR, X3

    (913) 0x46168c ADD	X3, X3, #1

    (913) 0x461690 B	4616d0

      (916) 0x461694 LDR	D5, [X27, X3,LSL #3]

      (916) 0x461698 STR	D5, [X7, X3,LSL #3]

      (916) 0x46169c ADD	X3, X3, #8

      (916) 0x4616a0 LDR	D6, [X27, X30,LSL #3]

      (916) 0x4616a4 STR	D6, [X7, X30,LSL #3]

      (916) 0x4616a8 LDR	D7, [X27, X17,LSL #3]

      (916) 0x4616ac STR	D7, [X7, X17,LSL #3]

      (916) 0x4616b0 LDR	D16, [X27, X23,LSL #3]

      (916) 0x4616b4 STR	D16, [X7, X23,LSL #3]

      (916) 0x4616b8 LDR	D17, [X27, X13,LSL #3]

      (916) 0x4616bc STR	D17, [X7, X13,LSL #3]

      (916) 0x4616c0 LDR	D18, [X27, X12,LSL #3]

      (916) 0x4616c4 STR	D18, [X7, X12,LSL #3]

      (916) 0x4616c8 LDR	D19, [X27, X10,LSL #3]

      (916) 0x4616cc STR	D19, [X7, X10,LSL #3]

      (916) 0x4616d0 LDR	D5, [X27, X4,LSL #3]

      (916) 0x4616d4 ADD	X30, X3, #1

      (916) 0x4616d8 ADD	X17, X3, #2

      (916) 0x4616dc ADD	X23, X3, #3

      (916) 0x4616e0 ADD	X13, X3, #4

      (916) 0x4616e4 ADD	X12, X3, #5

      (916) 0x4616e8 ADD	X10, X3, #6

      (916) 0x4616ec STR	D5, [X7, X4,LSL #3]

      (916) 0x4616f0 ADD	X4, X3, #7

      (916) 0x4616f4 CMP	X11, X3

      (916) 0x4616f8 B.NE	461694

    (913) 0x4616fc B	4611cc

    (913) 0x461700 MOVZ	X14, #0

    (913) 0x461704 B	4611a0

    (913) 0x461708 MOVZ	X30, #0

    (913) 0x46170c B	4613c8

(911) 0x461710 ORR	X0, XZR, X26

(911) 0x461714 BL	52b3a0

(911) 0x461718 LDR	X0, [SP, #168]

(911) 0x46171c MOVZ	X1, #8

(911) 0x461720 BL	52b308

(911) 0x461724 LDR	X23, [SP, #304]

(911) 0x461728 ORR	X26, XZR, X0

(911) 0x46172c LDR	X1, [X23, X19,LSL #3]

(911) 0x461730 B	460f50

(911) 0x461734 LDR	X0, [SP, #136]

(911) 0x461738 BL	52b3a0

(911) 0x46173c MOVZ	X1, #8

(911) 0x461740 ORR	X0, XZR, X23

(911) 0x461744 BL	52b308

(911) 0x461748 STR	X0, [SP, #136]

(911) 0x46174c B	46144c

0x461750 ORR	X25, XZR, X26

0x461754 LDR	X26, [SP, #224]

0x461758 LDR	X0, [SP, #352]

0x46175c BL	52b3a0

0x461760 LDR	X0, [SP, #304]

0x461764 BL	52b3a0

0x461768 LDR	X0, [SP, #336]

0x46176c BL	52b3a0

0x461770 LDR	X0, [SP, #424]

0x461774 BL	52b3a0

0x461778 ORR	X0, XZR, X25

0x46177c BL	52b3a0

0x461780 LDR	X0, [SP, #136]

0x461784 BL	52b3a0

0x461788 LDR	X0, [SP, #208]

0x46178c BL	52b3a0

0x461790 LDR	X0, [SP, #184]

0x461794 BL	52b3a0

0x461798 ORR	X0, XZR, X24

0x46179c BL	52b3a0

0x4617a0 LDR	X0, [SP, #408]

0x4617a4 BL	52b3a0

0x4617a8 LDR	X0, [SP, #416]

0x4617ac BL	52b3a0

0x4617b0 LDR	X0, [SP, #456]

0x4617b4 BL	52b3a0

0x4617b8 LDR	X0, [SP, #464]

0x4617bc BL	52b3a0

0x4617c0 LDR	X0, [SP, #248]

0x4617c4 BL	52b3a0

0x4617c8 ORR	X0, XZR, X22

0x4617cc BL	52b3a0

0x4617d0 ORR	X0, XZR, X26

0x4617d4 BL	52b3a0

0x4617d8 LDR	X0, [SP, #264]

0x4617dc BL	52b3a0

0x4617e0 LDR	X0, [SP, #280]

0x4617e4 BL	52b3a0

0x4617e8 LDR	X0, [SP, #536]

0x4617ec BL	52b3a0

0x4617f0 LDR	X0, [SP, #272]

0x4617f4 BL	52b3a0

0x4617f8 LDR	X22, [SP, #832]

0x4617fc CMP	X22, #1

0x461800 B.LE	46180c

0x461804 LDR	X0, [SP, #368]

0x461808 BL	52b3a0

0x46180c LDR	X20, [SP, #312]

0x461810 MOVZ	X5, #0

0x461814 LDR	X21, [SP, #216]

0x461818 LDR	X25, [SP, #256]

0x46181c UBFM	X24, X20, #61, #60

0x461820 LDR	X18, [SP, #680]

0x461824 ADD	X23, X21, X20,LSL #3

0x461828 LDR	X7, [X21, X24]

0x46182c LDR	X6, [X25, X24]

0x461830 LDR	X1, [X18, #8]

0x461834 LDR	X3, [X18, #104]

0x461838 LDR	X0, [SP, #400]

0x46183c LDR	X4, [SP, #688]

0x461840 LDR	X2, [SP, #840]

0x461844 BL	4f7720

0x461848 LDR	X15, [SP, #144]

0x46184c FCMP	D15, #0

0x461850 ORR	X20, XZR, X0

0x461854 LDP	X4, X19, [X0, #56]

0x461858 STP	X25, X15, [X4]

0x46185c STR	X27, [X4, #48]

0x461860 LDR	X27, [SP, #120]

0x461864 STR	X28, [X19, #48]

0x461868 LDR	X13, [SP, #728]

0x46186c STP	X21, X27, [X19]

0x461870 CCMP	X13, #0, #0, #0

0x461874 STR	XZR, [X0, #136]

0x461878 B.NE	461d08

0x46187c LDR	X24, [X23]

0x461880 CBZ	X24, 461c7c

0x461884 LDR	X16, [SP, #192]

0x461888 LDR	X0, [SP, #472]

0x46188c CMP	X16, X0

0x461890 B.LT	461898

0x461894 ORR	X0, XZR, X16

0x461898 MOVZ	X1, #8

0x46189c BL	52b308

0x4618a0 LDR	X8, [SP, #472]

0x4618a4 ORR	X27, XZR, X0

0x4618a8 ADRP	X12,

0x4618ac MOVZ	W3, #0

0x4618b0 ADD	X0, X12, #3456

0x4618b4 LDR	X1, [SP, #296]

0x4618b8 MOVZ	W2, #0

0x4618bc STR	X27, [SP, #848]

0x4618c0 STR	X8, [SP, #856]

0x4618c4 BL	410c40

0x4618c8 CMP	X24, #0

0x4618cc B.LE	46219c

0x4618d0 LDR	X2, [SP, #120]

0x4618d4 UBFM	X5, X24, #61, #60

0x4618d8 MOVZ	X9, #1

0x4618dc SUB	X6, X5, #8

0x4618e0 MOVZ	X26, #0

0x4618e4 UBFM	X1, X6, #3, #63

0x4618e8 ADD	X14, X1, X9

0x4618ec ANDS	X22, X14, #4224

0x4618f0 ADD	X3, X2, X24,LSL #3

0x4618f4 ORR	X0, XZR, X2

0x4618f8 B.EQ	4619f8

0x4618fc CMP	X22, X9

0x461900 B.EQ	4619d4

0x461904 CMP	X22, #2

0x461908 B.EQ	4619b8

0x46190c CMP	X22, #3

0x461910 B.EQ	46199c

0x461914 CMP	X22, #4

0x461918 B.EQ	461980

0x46191c CMP	X22, #5

0x461920 B.EQ	461964

0x461924 CMP	X22, #6

0x461928 B.EQ	461948

0x46192c LDR	X0, [SP, #120]

0x461930 LDR	X21, [X0]

0x461934 ADD	X18, X27, X21,LSL #3

0x461938 LDR	X11, [X18]

0x46193c CBZ	X11, 462534

0x461940 LDR	X4, [SP, #120]

0x461944 ADD	X0, X4, #8

0x461948 LDR	X15, [X0]

0x46194c ADD	X13, X27, X15,LSL #3

0x461950 LDR	X10, [X13]

0x461954 CBNZ	X10, 461960

0x461958 ADD	X26, X26, #1

0x46195c STR	X9, [X13]

0x461960 ADD	X0, X0, #8

0x461964 LDR	X17, [X0]

0x461968 ADD	X23, X27, X17,LSL #3

0x46196c LDR	X25, [X23]

0x461970 CBNZ	X25, 46197c

0x461974 ADD	X26, X26, #1

0x461978 STR	X9, [X23]

0x46197c ADD	X0, X0, #8

0x461980 LDR	X30, [X0]

0x461984 ADD	X28, X27, X30,LSL #3

0x461988 LDR	X16, [X28]

0x46198c CBNZ	X16, 461998

0x461990 ADD	X26, X26, #1

0x461994 STR	X9, [X28]

0x461998 ADD	X0, X0, #8

0x46199c LDR	X12, [X0]

0x4619a0 ADD	X8, X27, X12,LSL #3

0x4619a4 LDR	X7, [X8]

0x4619a8 CBNZ	X7, 4619b4

0x4619ac ADD	X26, X26, #1

0x4619b0 STR	X9, [X8]

0x4619b4 ADD	X0, X0, #8

0x4619b8 LDR	X5, [X0]

0x4619bc ADD	X6, X27, X5,LSL #3

0x4619c0 LDR	X1, [X6]

0x4619c4 CBNZ	X1, 4619d0

0x4619c8 ADD	X26, X26, #1

0x4619cc STR	X9, [X6]

0x4619d0 ADD	X0, X0, #8

0x4619d4 LDR	X2, [X0]

0x4619d8 ADD	X14, X27, X2,LSL #3

0x4619dc LDR	X22, [X14]

0x4619e0 CBNZ	X22, 4619ec

0x4619e4 ADD	X26, X26, #1

0x4619e8 STR	X9, [X14]

0x4619ec ADD	X0, X0, #8

0x4619f0 CMP	X0, X3

0x4619f4 B.EQ	461ac8

(910) 0x4619f8 LDR	X21, [X0]

(910) 0x4619fc UBFM	X18, X21, #61, #60

(910) 0x461a00 LDR	X11, [X27, X18]

(910) 0x461a04 CBNZ	X11, 461a10

(910) 0x461a08 ADD	X26, X26, #1

(910) 0x461a0c STR	X9, [X27, X18]

(910) 0x461a10 LDR	X4, [X0, #8]

(910) 0x461a14 ADD	X0, X0, #8

(910) 0x461a18 UBFM	X15, X4, #61, #60

(910) 0x461a1c LDR	X13, [X27, X15]

(910) 0x461a20 CBNZ	X13, 461a2c

(910) 0x461a24 ADD	X26, X26, #1

(910) 0x461a28 STR	X9, [X27, X15]

(910) 0x461a2c LDR	X10, [X0, #8]

(910) 0x461a30 UBFM	X17, X10, #61, #60

(910) 0x461a34 LDR	X23, [X27, X17]

(910) 0x461a38 CBNZ	X23, 461a44

(910) 0x461a3c ADD	X26, X26, #1

(910) 0x461a40 STR	X9, [X27, X17]

(910) 0x461a44 LDR	X25, [X0, #16]

(910) 0x461a48 UBFM	X30, X25, #61, #60

(910) 0x461a4c LDR	X28, [X27, X30]

(910) 0x461a50 CBNZ	X28, 461a5c

(910) 0x461a54 ADD	X26, X26, #1

(910) 0x461a58 STR	X9, [X27, X30]

(910) 0x461a5c LDR	X16, [X0, #24]

(910) 0x461a60 UBFM	X12, X16, #61, #60

(910) 0x461a64 LDR	X8, [X27, X12]

(910) 0x461a68 CBNZ	X8, 461a74

(910) 0x461a6c ADD	X26, X26, #1

(910) 0x461a70 STR	X9, [X27, X12]

(910) 0x461a74 LDR	X7, [X0, #32]

(910) 0x461a78 UBFM	X5, X7, #61, #60

(910) 0x461a7c LDR	X6, [X27, X5]

(910) 0x461a80 CBNZ	X6, 461a8c

(910) 0x461a84 ADD	X26, X26, #1

(910) 0x461a88 STR	X9, [X27, X5]

(910) 0x461a8c LDR	X1, [X0, #40]

(910) 0x461a90 UBFM	X2, X1, #61, #60

(910) 0x461a94 LDR	X14, [X27, X2]

(910) 0x461a98 CBNZ	X14, 461aa4

(910) 0x461a9c ADD	X26, X26, #1

(910) 0x461aa0 STR	X9, [X27, X2]

(910) 0x461aa4 LDR	X22, [X0, #48]

(910) 0x461aa8 UBFM	X21, X22, #61, #60

(910) 0x461aac LDR	X18, [X27, X21]

(910) 0x461ab0 CBNZ	X18, 461abc

(910) 0x461ab4 ADD	X26, X26, #1

(910) 0x461ab8 STR	X9, [X27, X21]

(910) 0x461abc ADD	X0, X0, #56

(910) 0x461ac0 CMP	X0, X3

(910) 0x461ac4 B.NE	4619f8

0x461ac8 ORR	X0, XZR, X26

0x461acc SUB	X7, X26, #1

0x461ad0 MOVZ	X1, #8

0x461ad4 STR	X7, [SP, #128]

0x461ad8 BL	52b308

0x461adc LDR	X21, [SP, #528]

0x461ae0 MOVZ	X1, #8

0x461ae4 ORR	X25, XZR, X0

0x461ae8 LDR	X3, [SP, #632]

0x461aec ADD	X9, X21, X3

0x461af0 LDUR	X0, [X9, #504]

0x461af4 BL	52b308

0x461af8 LDR	X4, [SP, #328]

0x461afc ADRP	X11,

0x461b00 ORR	X23, XZR, X0

0x461b04 MOVZ	W3, #0

0x461b08 ADD	X0, X11, #3308

0x461b0c STR	X21, [SP, #848]

0x461b10 LDR	X1, [SP, #296]

0x461b14 MOVZ	W2, #0

0x461b18 STR	X23, [SP, #856]

0x461b1c SUB	X28, X4, #1

0x461b20 STR	X4, [SP, #864]

0x461b24 BL	410c40

0x461b28 LDR	X13, [SP, #128]

0x461b2c MOVZ	X1, #0

0x461b30 MOVZ	X5, #0

0x461b34 ADD	X15, X21, #8

0x461b38 LDR	X10, [SP, #520]

(908) 0x461b3c LDR	X30, [X21, X1,LSL #3]

(908) 0x461b40 LDR	X6, [X15, X1,LSL #3]

(908) 0x461b44 CMP	X30, X6

(908) 0x461b48 B.GE	461b80

  (909) 0x461b4c LDR	X17, [X27, X30,LSL #3]

  (909) 0x461b50 CBZ	X17, 461cec

  (909) 0x461b54 LDR	X16, [X21, X1,LSL #3]

  (909) 0x461b58 LDR	X12, [X10, X1,LSL #3]

  (909) 0x461b5c SUB	X8, X30, X16

  (909) 0x461b60 LDR	X7, [X12, X8,LSL #3]

  (909) 0x461b64 STR	X7, [X25, X5,LSL #3]

  (909) 0x461b68 ADD	X5, X5, #1

  (909) 0x461b6c STR	X7, [X23, X30,LSL #3]

  (909) 0x461b70 ADD	X30, X30, #1

  (909) 0x461b74 LDR	X6, [X15, X1,LSL #3]

  (909) 0x461b78 CMP	X30, X6

  (909) 0x461b7c B.LT	461b4c

(908) 0x461b80 ADD	X1, X1, #1

(908) 0x461b84 CMP	X1, X28

(908) 0x461b88 B.NE	461b3c

0x461b8c ORR	X2, XZR, X13

0x461b90 MOVZ	X1, #0

0x461b94 ORR	X0, XZR, X25

0x461b98 BL	52ba28

0x461b9c LDR	X22, [SP, #296]

0x461ba0 ADD	X9, SP, #848

0x461ba4 ADRP	X2,

0x461ba8 ADD	X0, X2, #3792

0x461bac MOVZ	W3, #0

0x461bb0 LDR	X14, [SP, #328]

0x461bb4 MOVZ	W2, #0

0x461bb8 LDR	X18, [SP, #528]

0x461bbc ORR	X1, XZR, X22

0x461bc0 STP	X23, X14, [X9, #16]

0x461bc4 STP	X18, X25, [X9]

0x461bc8 STR	X26, [SP, #880]

0x461bcc BL	410c40

0x461bd0 LDR	X11, [SP, #120]

0x461bd4 ADRP	X0,

0x461bd8 ORR	X1, XZR, X22

0x461bdc ADD	X0, X0, #2928

0x461be0 MOVZ	W3, #0

0x461be4 STR	X23, [SP, #856]

0x461be8 MOVZ	W2, #0

0x461bec STR	X24, [SP, #864]

0x461bf0 STR	X11, [SP, #848]

0x461bf4 BL	410c40

0x461bf8 ORR	X0, XZR, X27

0x461bfc BL	52b3a0

0x461c00 LDR	X24, [SP, #832]

0x461c04 CMP	X24, #1

0x461c08 B.GT	461c9c

(906) 0x461c0c ORR	X0, XZR, X23

(906) 0x461c10 BL	52b3a0

(906) 0x461c14 LDR	X0, [SP, #520]

(906) 0x461c18 BL	52b3a0

(906) 0x461c1c LDR	X0, [SP, #528]

(906) 0x461c20 BL	52b3a0

(906) 0x461c24 CBZ	X26, 461c30

(906) 0x461c28 STR	X25, [X20, #88]

(906) 0x461c2c STR	X26, [X19, #24]

(906) 0x461c30 LDR	X19, [SP, #704]

(906) 0x461c34 CBNZ	X19, 461cc0

(906) 0x461c38 LDR	X3, [SP, #832]

(906) 0x461c3c CMP	X3, #1

(906) 0x461c40 B.LE	461c4c

(906) 0x461c44 ORR	X0, XZR, X20

(906) 0x461c48 BL	4e6448

(906) 0x461c4c LDR	X4, [SP, #1200]

(906) 0x461c50 MOVZ	X0, #0

(906) 0x461c54 LDR	D15, [SP, #96]

(906) 0x461c58 STR	X20, [X4]

(906) 0x461c5c LDP	X29, X30, [SP]

(906) 0x461c60 LDP	X19, X20, [SP, #16]

(906) 0x461c64 LDP	X21, X22, [SP, #32]

(906) 0x461c68 LDP	X23, X24, [SP, #48]

(906) 0x461c6c LDP	X25, X26, [SP, #64]

(906) 0x461c70 LDP	X27, X28, [SP, #80]

(906) 0x461c74 ADD	SP, SP, #1184

(906) 0x461c78 RET

(906) 0x461c7c LDR	X17, [SP, #832]

(906) 0x461c80 CMP	X17, #1

(906) 0x461c84 B.LE	461fe4

(906) 0x461c88 LDR	X30, [SP, #328]

(906) 0x461c8c MOVZ	X26, #0

(906) 0x461c90 MOVZ	X23, #0

(906) 0x461c94 MOVZ	X25, #0

(906) 0x461c98 SUB	X28, X30, #1

(906) 0x461c9c LDR	X27, [SP, #520]

(906) 0x461ca0 ADD	X28, X27, W28,UXTW #3

(906) 0x461ca4 ORR	X21, XZR, X27

  (907) 0x461ca8 LDR	X0, [X21]

  (907) 0x461cac BL	52b3a0

  (907) 0x461cb0 STR	XZR, [X21], #8

  (907) 0x461cb4 CMP	X21, X28

  (907) 0x461cb8 B.NE	461ca8

(906) 0x461cbc B	461c0c

(906) 0x461cc0 LDR	X26, [SP, #312]

(906) 0x461cc4 ADRP	X23,

(906) 0x461cc8 MOVZ	W3, #0

(906) 0x461ccc ADD	X0, X23, #3588

(906) 0x461cd0 MOVZ	W2, #0

(906) 0x461cd4 LDR	X25, [SP, #320]

(906) 0x461cd8 LDR	X1, [SP, #296]

(906) 0x461cdc STR	X26, [SP, #856]

(906) 0x461ce0 STR	X25, [SP, #848]

(906) 0x461ce4 BL	410c40

(906) 0x461ce8 B	461c38

  (909) 0x461cec ADD	X30, X30, #1

  (909) 0x461cf0 CMP	X30, X6

  (909) 0x461cf4 B.LT	461b4c

(908) 0x461cf8 ADD	X1, X1, #1

(908) 0x461cfc CMP	X1, X28

(908) 0x461d00 B.NE	461b3c

0x461d04 B	461b8c

0x461d08 LDR	X1, [SP, #728]

0x461d0c FMOV	D0, D15

0x461d10 BL	44e72c

0x461d14 LDP	X28, X10, [X19]

0x461d18 ADD	X23, X28, X24

0x461d1c STR	X10, [SP, #120]

0x461d20 B	46187c

0x461d24 MOVZ	X1, #112

0x461d28 MOVZ	X0, #1

0x461d2c STR	X6, [SP, #120]

0x461d30 STR	X7, [SP, #136]

0x461d34 BL	52b308

0x461d38 ORR	X6, XZR, X0

0x461d3c MOVZ	X1, #8

0x461d40 ORR	X0, XZR, X24

0x461d44 STR	X6, [SP, #368]

0x461d48 BL	52b308

0x461d4c ORR	X23, XZR, X0

0x461d50 MOVZ	X1, #8

0x461d54 ORR	X0, XZR, X24

0x461d58 STR	X23, [SP, #304]

0x461d5c BL	52b308

0x461d60 ORR	X18, XZR, X0

0x461d64 MOVZ	X1, #8

0x461d68 ORR	X0, XZR, X24

0x461d6c STR	X18, [SP, #336]

0x461d70 BL	52b308

0x461d74 LDR	X28, [SP, #192]

0x461d78 ORR	X24, XZR, X0

0x461d7c MOVZ	X1, #8

0x461d80 ADD	X0, X28, #1

0x461d84 BL	52b308

0x461d88 STP	XZR, X0, [SP, #456]

0x461d8c LDR	X12, [SP, #120]

0x461d90 LDR	X4, [SP, #136]

0x461d94 CBNZ	X28, 462180

0x461d98 STR	XZR, [SP, #376]

0x461d9c LDR	X14, [SP, #152]

0x461da0 LDR	X15, [SP, #200]

0x461da4 LDR	X0, [X15, X14,LSL #3]

0x461da8 CBNZ	X0, 462160

0x461dac LDR	X19, [SP, #296]

0x461db0 ADRP	X1,

0x461db4 MOVZ	W3, #0

0x461db8 ADD	X0, X1, #2792

0x461dbc MOVZ	W2, #0

0x461dc0 STR	X12, [SP, #120]

0x461dc4 LDR	X8, [SP, #192]

0x461dc8 ADRP	X21,

0x461dcc STR	X4, [SP, #136]

0x461dd0 LDR	X20, [SP, #464]

0x461dd4 ORR	X1, XZR, X19

0x461dd8 STR	X8, [SP, #848]

0x461ddc STR	X20, [SP, #856]

0x461de0 BL	410c40

0x461de4 LDR	X2, [SP, #200]

0x461de8 ORR	X1, XZR, X19

0x461dec ADD	X0, X21, #2656

0x461df0 MOVZ	W3, #0

0x461df4 LDR	X9, [SP, #152]

0x461df8 LDR	X7, [SP, #376]

0x461dfc STR	X2, [SP, #856]

0x461e00 MOVZ	W2, #0

0x461e04 STR	X9, [SP, #848]

0x461e08 STR	X7, [SP, #864]

0x461e0c BL	410c40

0x461e10 LDR	X17, [SP, #328]

0x461e14 LDR	X6, [SP, #120]

0x461e18 LDR	X7, [SP, #136]

0x461e1c CMP	X17, #2

0x461e20 B.NE	45ee28

0x461e24 MOVZ	X16, #0

0x461e28 STR	XZR, [SP, #224]

0x461e2c B	45f6e0

0x461e30 MOVZ	X1, #8

0x461e34 ORR	X0, XZR, X24

0x461e38 BL	52b308

0x461e3c STR	X0, [SP, #184]

0x461e40 MOVZ	X7, #0

0x461e44 LDR	X13, [SP, #120]

0x461e48 CBNZ	X28, 462148

0x461e4c MOVZ	X1, #8

0x461e50 ORR	X0, XZR, X24

0x461e54 STR	X13, [SP, #120]

0x461e58 LDR	X28, [SP, #184]

0x461e5c STR	X7, [X28, #8]

0x461e60 BL	52b308

0x461e64 LDR	X8, [SP, #328]

0x461e68 ORR	X21, XZR, X0

0x461e6c MOVZ	X1, #8

0x461e70 STR	X21, [SP, #520]

0x461e74 ADD	X0, X8, #1

0x461e78 BL	52b308

0x461e7c LDR	X9, [SP, #496]

0x461e80 MOVZ	X7, #0

0x461e84 STR	X0, [SP, #528]

0x461e88 STR	X9, [SP, #472]

0x461e8c STP	XZR, X9, [X0]

0x461e90 LDR	X30, [SP, #264]

0x461e94 LDR	X4, [SP, #136]

0x461e98 LDR	X6, [SP, #120]

0x461e9c ADD	X17, X30, #8

0x461ea0 STR	X4, [X21]

0x461ea4 LDP	X5, X16, [X17]

0x461ea8 CMP	X5, X16

0x461eac B.LT	45ed1c

0x461eb0 LDR	X3, [SP, #128]

0x461eb4 STR	X3, [SP, #624]

0x461eb8 B	45edfc

(905) 0x461ebc LDR	X0, [SP, #224]

(905) 0x461ec0 BL	52b3a0

(905) 0x461ec4 MOVZ	X1, #8

(905) 0x461ec8 MOVZ	X0, #0

(905) 0x461ecc BL	52b308

(905) 0x461ed0 STR	X0, [SP, #224]

(905) 0x461ed4 B	4605dc

(905) 0x461ed8 MOVZ	X1, #8

(905) 0x461edc ORR	X0, XZR, X22

(905) 0x461ee0 BL	52b308

(905) 0x461ee4 LDR	X24, [SP, #560]

(905) 0x461ee8 ORR	X14, XZR, X0

(905) 0x461eec MOVZ	X1, #8

(905) 0x461ef0 ORR	X0, XZR, X22

(905) 0x461ef4 STR	X14, [X24, X23,LSL #3]

(905) 0x461ef8 BL	52b308

(905) 0x461efc ORR	X1, XZR, X0

(905) 0x461f00 LDR	X2, [SP, #384]

(905) 0x461f04 MOVZ	X0, #11

(905) 0x461f08 STR	X1, [X21, X19,LSL #3]

(905) 0x461f0c LDR	X3, [X24, X23,UXTW #3]

(905) 0x461f10 LDR	X1, [SP, #368]

(905) 0x461f14 BL	4e46a4

(905) 0x461f18 BL	4e4eac

(905) 0x461f1c LDR	X2, [SP, #504]

(905) 0x461f20 CMP	X22, X2

(905) 0x461f24 B.GT	461fa0

(905) 0x461f28 STR	X22, [SP, #504]

(905) 0x461f2c B	45f3ec

(958) 0x461f30 STR	X10, [X4, X3,LSL #3]

(958) 0x461f34 SUB	X3, X3, #1

(958) 0x461f38 STR	XZR, [X2, X10,LSL #3]

(958) 0x461f3c STR	XZR, [X14, X10,LSL #3]

(958) 0x461f40 STR	X11, [X22, X10,LSL #3]

(958) 0x461f44 STR	X11, [X15, X10,LSL #3]

(958) 0x461f48 B	45dea4

(958) 0x461f4c STR	X7, [X4, X3,LSL #3]

(958) 0x461f50 SUB	X3, X3, #1

(958) 0x461f54 STR	XZR, [X2, X7,LSL #3]

(958) 0x461f58 STR	XZR, [X14, X7,LSL #3]

(958) 0x461f5c STR	X9, [X22, X7,LSL #3]

(958) 0x461f60 STR	X9, [X15, X7,LSL #3]

(958) 0x461f64 B	45de7c

(958) 0x461f68 STR	X0, [X4, X3,LSL #3]

(958) 0x461f6c SUB	X3, X3, #1

(958) 0x461f70 STR	XZR, [X2, X0,LSL #3]

(958) 0x461f74 STR	XZR, [X14, X0,LSL #3]

(958) 0x461f78 STR	X8, [X22, X0,LSL #3]

(958) 0x461f7c STR	X8, [X15, X0,LSL #3]

(958) 0x461f80 B	45de54

(958) 0x461f84 STR	X0, [X4, X3,LSL #3]

(958) 0x461f88 SUB	X3, X3, #1

(958) 0x461f8c STR	XZR, [X2, X0,LSL #3]

(958) 0x461f90 STR	XZR, [X14, X0,LSL #3]

(958) 0x461f94 STR	X30, [X22, X0,LSL #3]

(958) 0x461f98 STR	X30, [X15, X0,LSL #3]

(958) 0x461f9c B	45de2c

(905) 0x461fa0 LDR	X0, [SP, #224]

(905) 0x461fa4 BL	52b3a0

(905) 0x461fa8 MOVZ	X1, #8

(905) 0x461fac ORR	X0, XZR, X22

(905) 0x461fb0 BL	52b308

(905) 0x461fb4 STR	X0, [SP, #224]

(905) 0x461fb8 STR	X22, [SP, #504]

(905) 0x461fbc B	45f3ec

0x461fc0 LDR	X5, [SP, #248]

0x461fc4 LDR	X28, [SP, #360]

0x461fc8 STR	X1, [X5, X0,LSL #3]

0x461fcc STR	X0, [X28, X1,LSL #3]

0x461fd0 ADD	X1, X1, #1

0x461fd4 STR	XZR, [X22, X0,LSL #3]

0x461fd8 STR	X9, [X2, X0,LSL #3]

0x461fdc STR	XZR, [X14, X0,LSL #3]

0x461fe0 B	45ddf0

(906) 0x461fe4 MOVZ	X0, #0

(906) 0x461fe8 BL	52b3a0

(906) 0x461fec LDR	X0, [SP, #520]

(906) 0x461ff0 BL	52b3a0

(906) 0x461ff4 LDR	X0, [SP, #528]

(906) 0x461ff8 BL	52b3a0

(906) 0x461ffc B	461c30

0x462000 LDR	X21, [SP, #216]

0x462004 LDR	X1, [SP, #256]

0x462008 B	45f840

(905) 0x46200c LDR	X22, [SP, #368]

(905) 0x462010 LDR	X28, [SP, #712]

(905) 0x462014 LDR	X4, [SP, #304]

(905) 0x462018 ADD	X7, X22, #40

(905) 0x46201c LDR	X8, [SP, #720]

(905) 0x462020 STR	X28, [X22, #16]

(905) 0x462024 LDR	X6, [X4, X23,LSL #3]

(905) 0x462028 STP	X24, X8, [X7]

(905) 0x46202c LDR	X0, [SP, #152]

(905) 0x462030 STR	X6, [X22, #24]

(905) 0x462034 LDR	X13, [SP, #400]

(905) 0x462038 STP	X13, X0, [X22]

(905) 0x46203c LDR	X10, [SP, #336]

(905) 0x462040 LDR	X12, [X10, X23,LSL #3]

(905) 0x462044 STR	X12, [X22, #56]

(905) 0x462048 B	4605b0

0x46204c ORR	X21, XZR, X20

0x462050 ORR	X20, XZR, X24

0x462054 LDR	X28, [SP, #168]

0x462058 MOVZ	X24, #16

0x46205c ADD	X11, X24, W19,UXTW #3

0x462060 STR	X11, [SP, #632]

0x462064 LDR	X24, [SP, #288]

0x462068 B	45ec88

0x46206c MOVZ	X1, #8

0x462070 STR	X8, [SP, #136]

0x462074 MOVZ	X22, #0

0x462078 BL	52b308

0x46207c ORR	X4, XZR, X0

0x462080 MOVZ	X1, #8

0x462084 MOVZ	X0, #11

0x462088 STR	X4, [SP, #280]

0x46208c BL	52b308

0x462090 LDR	X5, [SP, #136]

0x462094 STR	XZR, [SP, #248]

0x462098 STR	X0, [SP, #264]

0x46209c B	45dab0

0x4620a0 LDR	X17, [SP, #432]

0x4620a4 CMP	X17, #1

0x4620a8 B.GT	45eb28

0x4620ac MOVZ	X1, #1

0x4620b0 MOVZ	X20, #0

0x4620b4 STR	XZR, [SP, #152]

0x4620b8 STR	XZR, [SP, #176]

0x4620bc STR	X1, [SP, #552]

0x4620c0 B	45dcac

0x4620c4 STP	XZR, XZR, [SP, #440]

0x4620c8 B	45da18

0x4620cc LDR	X16, [X24, #8]

0x4620d0 ORR	X19, XZR, X21

0x4620d4 STR	X23, [SP, #192]

0x4620d8 LDR	X17, [X24, #48]

0x4620dc STR	XZR, [SP, #1192]

0x4620e0 STR	X16, [SP, #448]

0x4620e4 STR	X17, [SP, #440]

0x4620e8 B	45da24

0x4620ec MOVZ	X1, #8

0x4620f0 STR	X6, [SP, #136]

0x4620f4 BL	52b308

0x4620f8 LDR	X18, [SP, #176]

0x4620fc ORR	X20, XZR, X0

0x462100 LDR	X15, [SP, #152]

0x462104 LDR	X6, [SP, #136]

0x462108 ADD	X28, X18, #1

0x46210c CMP	X15, #0

0x462110 STR	X28, [SP, #552]

0x462114 B.GT	45db68

0x462118 LDR	X16, [SP, #832]

0x46211c CMP	X16, #1

0x462120 B.LE	45dcac

0x462124 B	45dbe4

0x462128 LDR	X27, [SP, #680]

0x46212c ORR	X0, XZR, X27

0x462130 BL	4e6448

0x462134 LDR	X1, [X27, #112]

0x462138 LDR	X18, [SP, #120]

0x46213c STR	X1, [SP, #344]

0x462140 CBZ	X23, 45e360

0x462144 B	4620cc

0x462148 ORR	X0, XZR, X28

0x46214c MOVZ	X1, #8

0x462150 BL	52b308

0x462154 LDR	X13, [SP, #120]

0x462158 ORR	X7, XZR, X0

0x46215c B	461e4c

0x462160 MOVZ	X1, #8

0x462164 STR	X12, [SP, #120]

0x462168 STR	X4, [SP, #136]

0x46216c BL	52b308

0x462170 LDR	X12, [SP, #120]

0x462174 STR	X0, [SP, #376]

0x462178 LDR	X4, [SP, #136]

0x46217c B	461dac

0x462180 LDR	X0, [SP, #192]

0x462184 MOVZ	X1, #8

0x462188 BL	52b308

0x46218c LDR	X12, [SP, #120]

0x462190 STR	X0, [SP, #456]

0x462194 LDR	X4, [SP, #136]

0x462198 B	461d98

0x46219c MOVZ	X0, #0

0x4621a0 MOVZ	X26, #0

0x4621a4 MOVN	X7, #0

0x4621a8 B	461ad0

0x4621ac LDR	X0, [SP, #360]

0x4621b0 BL	52b3a0

0x4621b4 LDR	X2, [SP, #136]

0x4621b8 B	460cdc

0x4621bc MOVZ	X25, #0

0x4621c0 STR	XZR, [SP, #136]

0x4621c4 B	461758

0x4621c8 LDR	X0, [SP, #360]

0x4621cc BL	52b3a0

0x4621d0 LDR	X1, [SP, #136]

0x4621d4 B	45fa54

(905) 0x4621d8 LDR	X1, [SP, #344]

(905) 0x4621dc ORR	X3, XZR, X27

(905) 0x4621e0 MOVZ	X0, #11

(905) 0x4621e4 LDR	X2, [SP, #376]

(905) 0x4621e8 BL	4e46a4

(905) 0x4621ec BL	4e4eac

(905) 0x4621f0 LDR	X12, [SP, #544]

(905) 0x4621f4 TBNZ	X12, #63, 462200

(905) 0x4621f8 STR	XZR, [SP, #544]

(905) 0x4621fc B	45f3d4

(905) 0x462200 LDR	X0, [SP, #384]

(905) 0x462204 BL	52b3a0

(905) 0x462208 MOVZ	X1, #8

(905) 0x46220c MOVZ	X0, #0

(905) 0x462210 BL	52b308

(905) 0x462214 STR	X0, [SP, #384]

(905) 0x462218 STR	XZR, [SP, #544]

(905) 0x46221c B	45f3d4

0x462220 LDR	X11, [SP, #280]

0x462224 LDR	X12, [SP, #248]

0x462228 STR	X0, [X11, X3,LSL #3]

0x46222c SUB	X3, X3, #1

0x462230 STR	XZR, [X2, X0,LSL #3]

0x462234 STR	XZR, [X14, X0,LSL #3]

0x462238 STR	X9, [X22, X0,LSL #3]

0x46223c STR	X9, [X12, X0,LSL #3]

0x462240 B	45ddf0

0x462244 LDR	X16, [SP, #280]

0x462248 LDR	X17, [SP, #248]

0x46224c STR	X0, [X16, X3,LSL #3]

0x462250 SUB	X3, X3, #1

0x462254 STR	XZR, [X2, X0,LSL #3]

0x462258 STR	XZR, [X14, X0,LSL #3]

0x46225c STR	X15, [X22, X0,LSL #3]

0x462260 STR	X15, [X17, X0,LSL #3]

0x462264 ADD	X0, X0, #1

0x462268 B	45ddc4

0x46226c LDR	X30, [SP, #248]

0x462270 LDR	X8, [SP, #360]

0x462274 STR	X1, [X30, X0,LSL #3]

0x462278 STR	X0, [X8, X1,LSL #3]

0x46227c ADD	X1, X1, #1

0x462280 STR	XZR, [X22, X0,LSL #3]

0x462284 STR	X15, [X2, X0,LSL #3]

0x462288 STR	XZR, [X14, X0,LSL #3]

0x46228c ADD	X0, X0, #1

0x462290 B	45ddc4

0x462294 MOVZ	X1, #8

0x462298 STR	X12, [SP, #136]

0x46229c BL	52b308

0x4622a0 ORR	X27, XZR, X0

0x4622a4 MOVZ	X1, #8

0x4622a8 MOVZ	X0, #11

0x4622ac STR	X27, [SP, #280]

0x4622b0 BL	52b308

0x4622b4 LDR	X15, [SP, #136]

0x4622b8 STR	X0, [SP, #264]

0x4622bc B	45e400

0x4622c0 LDR	X0, [SP, #192]

0x4622c4 MOVZ	X1, #8

0x4622c8 STR	X6, [SP, #136]

0x4622cc BL	52b308

0x4622d0 LDR	X8, [SP, #832]

0x4622d4 STR	X0, [SP, #424]

0x4622d8 LDR	X6, [SP, #136]

0x4622dc CMP	X8, #1

0x4622e0 B.GT	45db08

0x4622e4 B	45eb28

0x4622e8 MOVZ	X24, #2

0x4622ec MOVZ	X27, #16

0x4622f0 STR	X24, [SP, #328]

0x4622f4 STR	X27, [SP, #632]

0x4622f8 B	45ec88

0x4622fc LDR	X11, [X21, X1,LSL #3]

0x462300 MOVN	X7, #0

0x462304 LDR	X12, [X19, X0,LSL #3]

0x462308 CMP	X11, X12

0x46230c B.EQ	462508

0x462310 LDR	X3, [SP, #272]

0x462314 STR	X7, [X3, X1,LSL #3]

0x462318 ADD	X1, X1, #1

0x46231c LDR	X13, [SP, #192]

0x462320 CMP	X13, X0

0x462324 B.LE	45e240

0x462328 LDR	X5, [X21, X1,LSL #3]

0x46232c MOVN	X2, #0

0x462330 LDR	X24, [X19, X0,LSL #3]

0x462334 CMP	X5, X24

0x462338 B.NE	462344

0x46233c ORR	X2, XZR, X0

0x462340 ADD	X0, X0, #1

0x462344 LDR	X14, [SP, #272]

0x462348 STR	X2, [X14, X1,LSL #3]

0x46234c ADD	X1, X1, #1

0x462350 CMP	X23, X1

0x462354 B.EQ	45e27c

0x462358 LDR	X28, [SP, #192]

0x46235c B	462368

0x462360 LDR	X28, [SP, #192]

0x462364 LDR	X14, [SP, #272]

(953) 0x462368 CMP	X28, X0

(953) 0x46236c B.LE	45e240

(953) 0x462370 LDR	X18, [X21, X1,LSL #3]

(953) 0x462374 MOVN	X16, #0

(953) 0x462378 LDR	X15, [X19, X0,LSL #3]

(953) 0x46237c CMP	X18, X15

(953) 0x462380 B.NE	46238c

(953) 0x462384 ORR	X16, XZR, X0

(953) 0x462388 ADD	X0, X0, #1

(953) 0x46238c STR	X16, [X14, X1,LSL #3]

(953) 0x462390 ADD	X1, X1, #1

(953) 0x462394 ORR	X17, XZR, X1

(953) 0x462398 CMP	X28, X0

(953) 0x46239c B.LE	45e240

(953) 0x4623a0 LDR	X30, [X21, X1,LSL #3]

(953) 0x4623a4 MOVN	X1, #0

(953) 0x4623a8 LDR	X9, [X19, X0,LSL #3]

(953) 0x4623ac CMP	X30, X9

(953) 0x4623b0 B.NE	4623bc

(953) 0x4623b4 ORR	X1, XZR, X0

(953) 0x4623b8 ADD	X0, X0, #1

(953) 0x4623bc STR	X1, [X14, X17,LSL #3]

(953) 0x4623c0 ADD	X1, X17, #1

(953) 0x4623c4 CMP	X28, X0

(953) 0x4623c8 B.LE	45e240

(953) 0x4623cc LDR	X10, [X21, X1,LSL #3]

(953) 0x4623d0 MOVN	X4, #0

(953) 0x4623d4 LDR	X8, [X19, X0,LSL #3]

(953) 0x4623d8 CMP	X10, X8

(953) 0x4623dc B.NE	4623e8

(953) 0x4623e0 ORR	X4, XZR, X0

(953) 0x4623e4 ADD	X0, X0, #1

(953) 0x4623e8 STR	X4, [X14, X1,LSL #3]

(953) 0x4623ec ADD	X1, X17, #2

(953) 0x4623f0 CMP	X28, X0

(953) 0x4623f4 B.LE	45e240

(953) 0x4623f8 LDR	X11, [X21, X1,LSL #3]

(953) 0x4623fc MOVN	X7, #0

(953) 0x462400 LDR	X12, [X19, X0,LSL #3]

(953) 0x462404 CMP	X11, X12

(953) 0x462408 B.NE	462414

(953) 0x46240c ORR	X7, XZR, X0

(953) 0x462410 ADD	X0, X0, #1

(953) 0x462414 STR	X7, [X14, X1,LSL #3]

(953) 0x462418 ADD	X1, X17, #3

(953) 0x46241c CMP	X28, X0

(953) 0x462420 B.LE	45e240

(953) 0x462424 LDR	X3, [X21, X1,LSL #3]

(953) 0x462428 MOVN	X5, #0

(953) 0x46242c LDR	X13, [X19, X0,LSL #3]

(953) 0x462430 CMP	X3, X13

(953) 0x462434 B.NE	462440

(953) 0x462438 ORR	X5, XZR, X0

(953) 0x46243c ADD	X0, X0, #1

(953) 0x462440 STR	X5, [X14, X1,LSL #3]

(953) 0x462444 ADD	X1, X17, #4

(953) 0x462448 CMP	X28, X0

(953) 0x46244c B.LE	45e240

(953) 0x462450 LDR	X24, [X21, X1,LSL #3]

(953) 0x462454 MOVN	X18, #0

(953) 0x462458 LDR	X2, [X19, X0,LSL #3]

(953) 0x46245c CMP	X24, X2

(953) 0x462460 B.NE	46246c

(953) 0x462464 ORR	X18, XZR, X0

(953) 0x462468 ADD	X0, X0, #1

(953) 0x46246c STR	X18, [X14, X1,LSL #3]

(953) 0x462470 ADD	X1, X17, #5

(953) 0x462474 CMP	X28, X0

(953) 0x462478 B.LE	45e240

(953) 0x46247c LDR	X15, [X21, X1,LSL #3]

(953) 0x462480 MOVN	X30, #0

(953) 0x462484 LDR	X16, [X19, X0,LSL #3]

(953) 0x462488 CMP	X15, X16

(953) 0x46248c B.NE	462498

(953) 0x462490 ORR	X30, XZR, X0

(953) 0x462494 ADD	X0, X0, #1

(953) 0x462498 STR	X30, [X14, X1,LSL #3]

(953) 0x46249c ADD	X1, X17, #6

(953) 0x4624a0 CMP	X28, X0

(953) 0x4624a4 B.LE	45e240

(953) 0x4624a8 LDR	X9, [X21, X1,LSL #3]

(953) 0x4624ac MOVN	X8, #0

(953) 0x4624b0 LDR	X10, [X19, X0,LSL #3]

(953) 0x4624b4 CMP	X9, X10

(953) 0x4624b8 B.EQ	462514

(953) 0x4624bc STR	X8, [X14, X1,LSL #3]

(953) 0x4624c0 ADD	X1, X17, #7

(953) 0x4624c4 CMP	X23, X1

(953) 0x4624c8 B.NE	462368

0x4624cc B	45e27c

0x4624d0 LDR	X1, [SP, #248]

0x4624d4 MOVZ	X0, #1

0x4624d8 LDR	X28, [SP, #360]

0x4624dc STR	XZR, [X1]

0x4624e0 ORR	X1, XZR, X12

0x4624e4 STR	XZR, [X28]

0x4624e8 STR	XZR, [X22]

0x4624ec STR	X12, [X2]

0x4624f0 STR	XZR, [X14]

0x4624f4 B	45dd94

0x4624f8 LDR	X18, [SP, #432]

0x4624fc CMP	X18, #1

0x462500 B.GT	45dc20

0x462504 B	45dcac

0x462508 ORR	X7, XZR, X0

0x46250c ADD	X0, X0, #1

0x462510 B	462310

(953) 0x462514 ORR	X8, XZR, X0

(953) 0x462518 ADD	X0, X0, #1

(953) 0x46251c B	4624bc

0x462520 UBFM	X27, X19, #61, #31

0x462524 ORR	X21, XZR, X23

0x462528 STR	X19, [SP, #328]

0x46252c STR	X27, [SP, #632]

0x462530 B	45ec88

0x462534 ORR	X26, XZR, X9

0x462538 STR	X9, [X18]

0x46253c B	461940

Coverage (%)	Name	Source Location	Module
►100.00+	hypre_BoomerAMGSetup	par_amg_setup.c:737	exec
○	hypre_PCGSetup	pcg.c:234	exec
○	main	amg.c:398	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	amg.c:253	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_0

Source file and lines	par_multi_interp.c:41-2061
Module	exec

The function is defined in /home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:41-71,83-108,114-131,146-150,185-186,194,202-208,216-223,229-241,252-261,267-272,278-333,340,346-351,381-469,479-518,525-536,544-557,568-576,583-636,643-685,691-706,717-759,768-891,1140-1161,1167,1177-1184,1304-1369,1562-1566,1575,1669-1705,1711-1737,1884-1915,1921-1938,1944-1997,2007-2032,2038-2043,2061.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 290.00 to 23.25 cycles (12.47x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is not vectorized. Only 52% of vector register length is used (average across all VPU instructions). By fully vectorizing your function, you can lower the cost of an iteration from 290.00 to 230.17 cycles (1.26x speedup).

Details

0% of VPU instructions are used in vector version (process two or more data elements in vector registers):

0% of VPU loads are used in vector version.
0% of VPU stores are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
1% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 290.00 to 57.50 cycles (5.04x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 4032 bytes. The binary function is storing 3280 bytes.

General properties

nb instructions	1676
loop length	6704
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

209.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	139.50	139.50	106.33	106.33	106.33	106.33	106.33	106.33	1.50	1.50	1.50	1.50	290.00	290.00	290.00	191.00	191.00
cycles	139.50	139.50	106.33	106.33	106.33	106.33	106.33	106.33	1.50	1.50	1.50	1.50	290.00	290.00	290.00	191.00	191.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	209.50
Overall L1	290.00

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	1%

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	1%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 290.00 cycles. At this rate:

14% of peak load performance is reached (13.90 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
23% of peak store performance is reached (11.31 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 45d860

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
SUB SP, SP, #1184	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X6, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X8, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X29, X30, [SP]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ADD X29, SP, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STR X0, [SP, #680]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #56	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STR D15, [SP, #96]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
FMOV D15, D0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
LDP X22, X24, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
MOVZ X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X4, [SP, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X3, [SP, #688]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X3, X20, [X2, #56]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
STR X5, [SP, #584]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X7, [SP, #728]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [X20]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X4, [SP, #616]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X5, [SP, #488]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X7, [SP, #400]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X9, X10, [X22]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
STR X9, [SP, #600]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X10, [SP, #608]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X11, X12, [X3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
STR X12, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X11, [SP, #480]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X13, [X20, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [X22, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X19, [X2, #88]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X13, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X2, [X2, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X14, [SP, #592]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X23, [X24, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X21, [X8, #88]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X2, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X26, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X0, [SP, #640]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52df20 <hypre_NumThreads>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X0, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X15, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X15, [SP, #648]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #656]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X1, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45d97c <hypre_BoomerAMGBuildMultipass+0x11c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [SP, #640]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X28, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X26, [SP, #400]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X1, SP, #832	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X18, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X0, XZR, X26	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52d1e0 <hypre_MPI_Comm_size>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X1, SP, #824	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X26	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52d210 <hypre_MPI_Comm_rank>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #688]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [SP, #824]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X6]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X8, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X3, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
STR X4, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B.NE 45d9cc <hypre_BoomerAMGBuildMultipass+0x16c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [SP, #688]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X5, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X7, [SP, #840]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADRP X9, <5619cc>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LDR X4, [SP, #400]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X10, X9, #2304	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, SP, #840	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X8, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X2, XZR, X10	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X10, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52d8c8 <hypre_MPI_Bcast>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X18, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X11, 45e34c <hypre_BoomerAMGBuildMultipass+0xaec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X12, [SP, #1192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X12, 45e35c <hypre_BoomerAMGBuildMultipass+0xafc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X23, 4620c4 <hypre_BoomerAMGBuildMultipass+0x4864>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X24, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X24, [X24, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X2, [SP, #448]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X24, [SP, #440]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X13, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [SP, #392]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBZ X13, 45da2c <hypre_BoomerAMGBuildMultipass+0x1cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X20, [X20, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X20, [SP, #392]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X0, [X22, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X18, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 45e384 <hypre_BoomerAMGBuildMultipass+0xb24>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X30, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X1, SP, #848	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X26, SP, #848	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADRP X28, 45da48 <hypre_BoomerAMGBuildMultipass+0x1e8>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X28, #1348	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP XZR, XZR, [X26, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X30, XZR, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
BL 410c40 <@plt_start@+0x480>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #872]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X3, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X0, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUBS X0, X3, X6	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
STR X6, [SP, #704]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B.NE 46206c <hypre_BoomerAMGBuildMultipass+0x480c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X8, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X22, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X5, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X18, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X20, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X0, [SP, #760]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X28, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X28, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X0, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X0, X6, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
CBNZ X0, 45eb40 <hypre_BoomerAMGBuildMultipass+0x12e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X0, 45eaf8 <hypre_BoomerAMGBuildMultipass+0x1298>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CMP X16, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 4620a0 <hypre_BoomerAMGBuildMultipass+0x4840>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X25, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X25, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X9, X25, #24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP X4, X5, [X3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
ORR X7, XZR, X25	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X11, X7, #40	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X12, [X7, #56]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X4, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
UBFM X24, X4, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X5, [SP, #712]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X10, X25, [X9]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
STR X10, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X2, X13, [X11]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
STR X12, [SP, #664]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X0, [X10, X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X2, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X13, [SP, #720]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 4620ec <hypre_BoomerAMGBuildMultipass+0x488c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X27, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X14, X2, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X20, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X14, [SP, #552]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CMP X27, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45dbe4 <hypre_BoomerAMGBuildMultipass+0x384>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X27, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X26, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X1, X17, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X3, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X30, X1, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X15, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X15, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 4624f8 <hypre_BoomerAMGBuildMultipass+0x4c98>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X1, X3, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
ORR X2, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 4e46a4 <hypre_ParCSRCommHandleCreate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
BL 4e4eac <hypre_ParCSRCommHandleDestroy>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X28, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45dcac <hypre_BoomerAMGBuildMultipass+0x44c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X16, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X1, X16, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X17, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45dc80 <hypre_BoomerAMGBuildMultipass+0x420>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X26, [SP, #584]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X5, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X24, X1, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X1, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X1, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45dcac <hypre_BoomerAMGBuildMultipass+0x44c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X2, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [SP, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 4e46a4 <hypre_ParCSRCommHandleCreate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
BL 4e4eac <hypre_ParCSRCommHandleDestroy>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X15, SP, #848	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADRP X27, 45dcb0 <hypre_BoomerAMGBuildMultipass+0x450>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X28, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X27, #552	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X18, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STP XZR, XZR, [X15, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X28, X18, [X15]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
LDR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 410c40 <@plt_start@+0x480>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [SP, #872]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X3, [SP, #496]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X28, 45ea90 <hypre_BoomerAMGBuildMultipass+0x1230>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X26, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X24, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #536]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X16, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X30, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X8, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X30]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUB X27, X17, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X8, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45df60 <hypre_BoomerAMGBuildMultipass+0x700>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ANDS X7, X8, #4160	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
ORR X3, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X10, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X13, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X14, X9, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X2, X10, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B.EQ 45de00 <hypre_BoomerAMGBuildMultipass+0x5a0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X7, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45ddc4 <hypre_BoomerAMGBuildMultipass+0x564>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X7, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45dd94 <hypre_BoomerAMGBuildMultipass+0x534>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X11]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X12, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4624d0 <hypre_BoomerAMGBuildMultipass+0x4c70>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMN X12, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 45dd7c <hypre_BoomerAMGBuildMultipass+0x51c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X3, X27, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [X0, X27,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [X2]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X13, [X22]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X13, [X5]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X15, [X18, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X15, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 46226c <hypre_BoomerAMGBuildMultipass+0x4a0c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMN X15, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 462244 <hypre_BoomerAMGBuildMultipass+0x49e4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X2, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X13, [X22, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X13, [X4, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X7, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X9, [X7, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X9, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 461fc0 <hypre_BoomerAMGBuildMultipass+0x4760>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMN X9, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 462220 <hypre_BoomerAMGBuildMultipass+0x49c0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X10, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X2, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X13, [X22, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X13, [X10, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X18, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45df60 <hypre_BoomerAMGBuildMultipass+0x700>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X15, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X16, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 45deb4 <hypre_BoomerAMGBuildMultipass+0x654>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X10, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X13, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X12, X2, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X14, X12, X13,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X13, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45dfd8 <hypre_BoomerAMGBuildMultipass+0x778>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X18, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X13, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X13, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45e004 <hypre_BoomerAMGBuildMultipass+0x7a4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X3, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X2, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 4e46a4 <hypre_ParCSRCommHandleCreate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
BL 4e4eac <hypre_ParCSRCommHandleDestroy>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X0, [SP, #552]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR XZR, [SP, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #672]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X0, [SP, #496]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X0, 45eae4 <hypre_BoomerAMGBuildMultipass+0x1284>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [SP, #672]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X28, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X2]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CMP X28, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45e0b8 <hypre_BoomerAMGBuildMultipass+0x858>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #664]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X18, X28, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X7, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X5, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
UBFM X15, X18, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X17, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X16, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X30, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X4, X8, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X9, [SP, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [SP, #536]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X14, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X24, [SP, #1192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X24, 45eb54 <hypre_BoomerAMGBuildMultipass+0x12f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X23, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
STR X0, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B.LE 45e27c <hypre_BoomerAMGBuildMultipass+0xa1c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ANDS X14, X23, #4224	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOVZ X1, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B.EQ 462360 <hypre_BoomerAMGBuildMultipass+0x4b00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 46231c <hypre_BoomerAMGBuildMultipass+0x4abc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45e234 <hypre_BoomerAMGBuildMultipass+0x9d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45e200 <hypre_BoomerAMGBuildMultipass+0x9a0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45e1cc <hypre_BoomerAMGBuildMultipass+0x96c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45e198 <hypre_BoomerAMGBuildMultipass+0x938>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #6	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45e164 <hypre_BoomerAMGBuildMultipass+0x904>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X28, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45e240 <hypre_BoomerAMGBuildMultipass+0x9e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [X19]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X18, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X15, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X30, [X21]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X30, X17	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
CSEL X9, X18, X15, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CSEL X0, X0, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X10]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X8, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X8, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45e240 <hypre_BoomerAMGBuildMultipass+0x9e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [X21, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X12, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X11, [X19, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X4, X11	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 45e18c <hypre_BoomerAMGBuildMultipass+0x92c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X12, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X3, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X12, [X3, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X7, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X7, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45e240 <hypre_BoomerAMGBuildMultipass+0x9e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X13, [X21, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X5, [X19, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X13, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 45e1c0 <hypre_BoomerAMGBuildMultipass+0x960>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X2, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X24, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X2, [X24, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X14, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X14, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45e240 <hypre_BoomerAMGBuildMultipass+0x9e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [X21, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X15, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X18, [X19, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X28, X18	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 45e1f4 <hypre_BoomerAMGBuildMultipass+0x994>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X15, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X16, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X15, [X16, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X17, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X17, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45e240 <hypre_BoomerAMGBuildMultipass+0x9e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X30, [X21, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X10, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X9, [X19, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X30, X9	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 45e228 <hypre_BoomerAMGBuildMultipass+0x9c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X10, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X8, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X10, [X8, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X4, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X4, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 4622fc <hypre_BoomerAMGBuildMultipass+0x4a9c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X21, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X19, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X21, [X0, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CMP X23, X19	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45e27c <hypre_BoomerAMGBuildMultipass+0xa1c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB X23, X23, X19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, X19,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W1, #255	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
UBFM X14, X23, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X28, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CSEL X2, X14, X28, #12	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 410950 <@plt_start@+0x190>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STP XZR, XZR, [X17]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
TBNZ X27, #63, 45eb64 <hypre_BoomerAMGBuildMultipass+0x1304>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X28, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X4, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X13, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X7, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
UBFM X8, X27, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP X15, X16, [SP, #480]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
MOVZ X23, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X12, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X30, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X9, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [SP, #392]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X19, [SP, #680]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [X19, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X14, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBZ X14, 462128 <hypre_BoomerAMGBuildMultipass+0x48c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBNZ X23, 4620cc <hypre_BoomerAMGBuildMultipass+0x486c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP XZR, XZR, [SP, #440]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X19, XZR, X21	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [X22, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X18, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #392]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #1192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBZ X0, 45da3c <hypre_BoomerAMGBuildMultipass+0x1dc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X24, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X1, SP, #848	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X10, SP, #848	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADRP X11, <20045d39c>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STR X0, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X11, #1348	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP XZR, XZR, [X10, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X9, X24, [X10]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
BL 410c40 <@plt_start@+0x480>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X13, [SP, #872]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X2, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X14, X24, X13	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X13, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUBS X0, X14, X2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
STR X2, [SP, #704]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B.NE 462294 <hypre_BoomerAMGBuildMultipass+0x4a34>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X12, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X15, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X0, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X15, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X22, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 45dab0 <hypre_BoomerAMGBuildMultipass+0x250>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 45dfd8 <hypre_BoomerAMGBuildMultipass+0x778>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 45e0b8 <hypre_BoomerAMGBuildMultipass+0x858>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X13, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X4, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUB X24, X13, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X12, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X30, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X12, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X23, [X30, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X9, X4, X14,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X14, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45e548 <hypre_BoomerAMGBuildMultipass+0xce8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X11, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45e574 <hypre_BoomerAMGBuildMultipass+0xd14>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X3, XZR, X26	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X2, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 4e46a4 <hypre_ParCSRCommHandleCreate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
BL 4e4eac <hypre_ParCSRCommHandleDestroy>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X19, <560574>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X1, SP, #808	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X13, X19, #768	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X3, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X2, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X4, XZR, X13	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, SP, #816	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X24, [SP, #816]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [SP, #400]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X13, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52daf0 <hypre_MPI_Allreduce>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X24, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X12, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X15, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [SP, #808]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X9, X24, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X21, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X10, X15, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X10, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBZ X14, 4622e8 <hypre_BoomerAMGBuildMultipass+0x4a88>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X24, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X11, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X27, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X20, XZR, X21	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X30, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X28, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X21, [SP, #392]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X28, XZR, X12	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X27, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X0, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X26, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X4, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X4, [SP, #536]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X24, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [SP, #496]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45dcfc <hypre_BoomerAMGBuildMultipass+0x49c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45e028 <hypre_BoomerAMGBuildMultipass+0x7c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X26, [SP, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X26, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 4622c0 <hypre_BoomerAMGBuildMultipass+0x4a60>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X30, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [SP, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CMP X30, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 45db08 <hypre_BoomerAMGBuildMultipass+0x2a8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X20, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #552]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45dcac <hypre_BoomerAMGBuildMultipass+0x44c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45daec <hypre_BoomerAMGBuildMultipass+0x28c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP XZR, XZR, [X17]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
TBZ X27, #63, 45e288 <hypre_BoomerAMGBuildMultipass+0xa28>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X28, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X23, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X24, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45e4d0 <hypre_BoomerAMGBuildMultipass+0xc70>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X27, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X23, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X20, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X19, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X21, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 45ec78 <hypre_BoomerAMGBuildMultipass+0x1418>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X21, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X20, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X24, #10	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X23, #80	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X24, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X23, [SP, #632]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X0, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X21, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X19, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X20, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X15, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X15, [X19, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X0, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X12, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X12, [SP, #408]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X18, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #416]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X18, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 461e30 <hypre_BoomerAMGBuildMultipass+0x45d0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X30, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X7, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #472]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #520]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #528]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X17, X30, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP X5, X16, [X17]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
CMP X5, X16	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 461eb0 <hypre_BoomerAMGBuildMultipass+0x4650>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X4, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP X14, X15, [SP, #480]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDR X27, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X23, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X18, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X13, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X28, [SP, #392]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [SP, #536]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X30, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X11, X30, X4	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X11, [SP, #624]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X27, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X27, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 461d24 <hypre_BoomerAMGBuildMultipass+0x44c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X24, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #304]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #336]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP XZR, XZR, [SP, #456]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
CMP X17, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 461e24 <hypre_BoomerAMGBuildMultipass+0x45c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X5, <200457e28>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ X3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR D31, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
MOVZ X19, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X23, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X24, [SP, #560]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X24, X5, #1580	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X25, [SP, #568]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X25, XZR, X22	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVN X22, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X27, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
DUP V0.2D, V31.D[0]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
STR X6, [SP, #736]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #464]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X30, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X21, [SP, #520]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X11, X30, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X6, X27, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X3, [SP, #384]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X20, [SP, #528]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X27, X18, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #504]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #544]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X22, [SP, #576]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X7, [SP, #696]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X11, [SP, #744]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X6, [SP, #752]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR Q0, [SP, #768]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STR X24, [SP, #784]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X16, [SP, #384]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X22, XZR, X25	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X24, [SP, #560]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X25, [SP, #568]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [SP, #696]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #736]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X16, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ X28, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X7, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #672]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #648]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #656]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #640]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X21, [SP, #624]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X21	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X27, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X21	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X27, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X20, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X27, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X20, 460b30 <hypre_BoomerAMGBuildMultipass+0x32d0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X14, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45f8d8 <hypre_BoomerAMGBuildMultipass+0x2078>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X30, [SP, #760]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X23, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X7, X30, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X16, X7, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
UBFM X9, X16, #3, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X2, X23, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X8, X9, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ANDS X15, X8, #4160	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
SUB X3, X17, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B.EQ 462000 <hypre_BoomerAMGBuildMultipass+0x47a0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X15, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45f804 <hypre_BoomerAMGBuildMultipass+0x1fa4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X15, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45f7d8 <hypre_BoomerAMGBuildMultipass+0x1f78>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X0, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X18, [X3, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X13, [X4, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X12, X13, X18	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X12, [X4, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X10, [X2, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X11, [X5, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X1, X11, X10	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X1, [X5, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X20, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X21, [X3, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X30, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X19, [X20, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X14, X19, X21	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X14, [X20, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X17, [X2, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X16, [X30, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X9, X16, X17	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X30, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X15, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [X3, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X13, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X23, [X15, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X18, X23, X8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X18, [X15, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [X2, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X13, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X10, X12, X4	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X10, [X13, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X0, X7	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45f8d8 <hypre_BoomerAMGBuildMultipass+0x2078>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X21, XZR, X13	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X19, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X0, <2004578dc>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #112	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X7, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X27, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X23, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X19, [SP, #880]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X21, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X7, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X23, [SP, #888]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X21, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X6, [SP, #872]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410c40 <@plt_start@+0x480>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [SP, #1184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X18, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X2, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP X1, X4, [X3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
SUB X13, X4, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CBZ X12, 460bc4 <hypre_BoomerAMGBuildMultipass+0x3364>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X20, <20045a940>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X18, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X20, #256	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X9, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X27, [SP, #936]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X5, [SP, #952]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X7, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X9, [SP, #928]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X23, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X28, [SP, #960]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X7, [SP, #944]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X16, [SP, #440]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X23, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X12, [SP, #448]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X18, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X11, [SP, #584]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X16, [SP, #904]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X17, [SP, #592]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X12, [SP, #920]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X15, [SP, #600]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X11, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X30, [SP, #608]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X17, [SP, #880]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X10, [SP, #616]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X15, [SP, #888]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [SP, #1192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X30, [SP, #896]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X10, [SP, #912]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X6, [SP, #968]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X4, [SP, #872]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X8, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X13, [SP, #1096]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X17, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X8, [SP, #976]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X10, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X17, [SP, #1056]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X23, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X4, [SP, #1048]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X30, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X10, [SP, #1088]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X20, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X23, [SP, #1024]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X16, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X30, [SP, #1072]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X13, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X20, [SP, #1016]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X21, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X16, [SP, #1080]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X11, [SP, #408]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X13, [SP, #984]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #416]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X21, [SP, #1000]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X19, [SP, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X11, [SP, #1032]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X14, [SP, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X18, [SP, #1040]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X15, [SP, #536]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X19, [SP, #992]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X14, [SP, #1008]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X15, [SP, #1064]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410c40 <@plt_start@+0x480>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X2, X1, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
CBNZ X2, 4621c8 <hypre_BoomerAMGBuildMultipass+0x4968>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X1, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X0, [SP, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X19, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X19, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X9, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X3, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45fa94 <hypre_BoomerAMGBuildMultipass+0x2234>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X21, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X21, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X21, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X7, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X7, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4621bc <hypre_BoomerAMGBuildMultipass+0x495c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X5, <200458aa4>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ X23, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X6, X5, #2848	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X21, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X14, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X19, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X17, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X13, X8, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X11, X14, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X26, X13, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X26, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X15, X17, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X20, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X18, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X11, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X15, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X4, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X9, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45fca0 <hypre_BoomerAMGBuildMultipass+0x2440>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 45edf0 <hypre_BoomerAMGBuildMultipass+0x1590>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X20, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X19, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X28, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 45f760 <hypre_BoomerAMGBuildMultipass+0x1f00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X10, <20045cbc8>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X10, #608	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X18, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X7, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X27, [SP, #936]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X19, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X6, [SP, #952]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X21, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X7, [SP, #928]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X20, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X28, [SP, #960]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X11, [SP, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X21, [SP, #944]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X8, [SP, #440]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X20, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X15, [SP, #448]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X11, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [SP, #584]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X8, [SP, #904]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X14, [SP, #592]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X15, [SP, #920]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X30, [SP, #600]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X5, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X16, [SP, #608]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X14, [SP, #880]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X9, [SP, #616]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X30, [SP, #888]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X17, [SP, #1192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X16, [SP, #896]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X9, [SP, #912]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X19, [SP, #968]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X17, [SP, #872]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X23, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X13, [SP, #1096]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X14, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X23, [SP, #976]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X9, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X14, [SP, #1056]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X20, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X17, [SP, #1048]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X16, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X9, [SP, #1088]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X10, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X20, [SP, #1024]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X8, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X16, [SP, #1072]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X10, [SP, #1016]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X13, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X8, [SP, #1080]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [SP, #408]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X18, [SP, #984]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X11, [SP, #416]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X13, [SP, #1000]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [SP, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X5, [SP, #1032]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X12, [SP, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X11, [SP, #1040]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X30, [SP, #536]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X4, [SP, #992]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X12, [SP, #1008]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X30, [SP, #1064]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410c40 <@plt_start@+0x480>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X0, X2, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
CBNZ X0, 4621ac <hypre_BoomerAMGBuildMultipass+0x494c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X2, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X0, [SP, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X21, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X21, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X21, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X15, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X3, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 460d1c <hypre_BoomerAMGBuildMultipass+0x34bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X19, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X15, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X19, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X7, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X7, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4621bc <hypre_BoomerAMGBuildMultipass+0x495c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X18, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X6, <20045ad2c>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ X23, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X4, X6, #3784	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X21, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X12, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X19, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X17, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X13, X18, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X4, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X10, X12, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X26, X13, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X26, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X14, X17, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X20, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X11, X5, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X10, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X14, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X11, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X15, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 460f28 <hypre_BoomerAMGBuildMultipass+0x36c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X25, XZR, X26	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X26, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #304]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #336]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X25	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #408]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #416]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #456]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #464]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X22	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X26	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #536]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X22, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X22, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 46180c <hypre_BoomerAMGBuildMultipass+0x3fac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #368]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X20, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X5, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X21, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X25, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X24, X20, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X18, [SP, #680]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X23, X21, X20,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X7, [X21, X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X25, X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X1, [X18, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X18, #104]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [SP, #400]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [SP, #688]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X2, [SP, #840]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 4f7720 <hypre_ParCSRMatrixCreate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X15, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
FCMP D15, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
ORR X20, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP X4, X19, [X0, #56]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
STP X25, X15, [X4]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STR X27, [X4, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X27, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X28, [X19, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X13, [SP, #728]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STP X21, X27, [X19]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
CCMP X13, #0, #0, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	1	scal (50.0%)
STR XZR, [X0, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B.NE 461d08 <hypre_BoomerAMGBuildMultipass+0x44a8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X24, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X24, 461c7c <hypre_BoomerAMGBuildMultipass+0x441c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [SP, #472]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X16, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 461898 <hypre_BoomerAMGBuildMultipass+0x4038>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #472]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X27, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADRP X12, <2004568a8>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X12, #3456	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X27, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X8, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410c40 <@plt_start@+0x480>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X24, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 46219c <hypre_BoomerAMGBuildMultipass+0x493c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X5, X24, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X9, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X6, X5, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X26, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
UBFM X1, X6, #3, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X14, X1, X9	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ANDS X22, X14, #4224	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
ADD X3, X2, X24,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B.EQ 4619f8 <hypre_BoomerAMGBuildMultipass+0x4198>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, X9	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4619d4 <hypre_BoomerAMGBuildMultipass+0x4174>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4619b8 <hypre_BoomerAMGBuildMultipass+0x4158>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, #3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 46199c <hypre_BoomerAMGBuildMultipass+0x413c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, #4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 461980 <hypre_BoomerAMGBuildMultipass+0x4120>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, #5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 461964 <hypre_BoomerAMGBuildMultipass+0x4104>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, #6	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 461948 <hypre_BoomerAMGBuildMultipass+0x40e8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X21, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X18, X27, X21,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X11, [X18]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X11, 462534 <hypre_BoomerAMGBuildMultipass+0x4cd4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X4, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X15, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X13, X27, X15,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X10, [X13]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X10, 461960 <hypre_BoomerAMGBuildMultipass+0x4100>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X26, X26, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X13]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X17, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X23, X27, X17,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X25, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X25, 46197c <hypre_BoomerAMGBuildMultipass+0x411c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X26, X26, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X30, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X28, X27, X30,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X16, [X28]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X16, 461998 <hypre_BoomerAMGBuildMultipass+0x4138>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X26, X26, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X28]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X12, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X8, X27, X12,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X7, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X7, 4619b4 <hypre_BoomerAMGBuildMultipass+0x4154>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X26, X26, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X5, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X6, X27, X5,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X1, [X6]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X1, 4619d0 <hypre_BoomerAMGBuildMultipass+0x4170>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X26, X26, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X6]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X2, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X14, X27, X2,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X22, [X14]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X22, 4619ec <hypre_BoomerAMGBuildMultipass+0x418c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X26, X26, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X14]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X0, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 461ac8 <hypre_BoomerAMGBuildMultipass+0x4268>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X26	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X7, X26, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X7, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X21, [SP, #528]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X25, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X3, [SP, #632]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X9, X21, X3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDUR X0, [X9, #504]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X11, <200456afc>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X23, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X11, #3308	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X21, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X23, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUB X28, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X4, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410c40 <@plt_start@+0x480>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X13, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X5, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X15, X21, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X10, [SP, #520]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X2, XZR, X13	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X25	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52ba28 <hypre_qsort0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X22, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X9, SP, #848	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADRP X2, <20045cba4>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X0, X2, #3792	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X14, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X18, [SP, #528]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X1, XZR, X22	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X23, X14, [X9, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X18, X25, [X9]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STR X26, [SP, #880]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410c40 <@plt_start@+0x480>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X0, <200456bd4>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X1, XZR, X22	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #2928	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X23, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X24, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X11, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410c40 <@plt_start@+0x480>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X24, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X24, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 461c9c <hypre_BoomerAMGBuildMultipass+0x443c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 461b8c <hypre_BoomerAMGBuildMultipass+0x432c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #728]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
FMOV D0, D15	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
BL 44e72c <hypre_BoomerAMGInterpTruncation>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X28, X10, [X19]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
ADD X23, X28, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X10, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 46187c <hypre_BoomerAMGBuildMultipass+0x401c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #112	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X7, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X6, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #368]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X23, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X23, [SP, #304]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X18, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X18, [SP, #336]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X24, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X28, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP XZR, X0, [SP, #456]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
LDR X12, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X28, 462180 <hypre_BoomerAMGBuildMultipass+0x4920>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR XZR, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X14, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X15, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X15, X14,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X0, 462160 <hypre_BoomerAMGBuildMultipass+0x4900>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X1, <200456db0>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X1, #2792	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X12, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X8, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X21, <200456dc8>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STR X4, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X20, [SP, #464]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X1, XZR, X19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X8, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X20, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410c40 <@plt_start@+0x480>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X1, XZR, X19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X21, #2656	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X9, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X2, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X7, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410c40 <@plt_start@+0x480>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X17, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 45ee28 <hypre_BoomerAMGBuildMultipass+0x15c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X16, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45f6e0 <hypre_BoomerAMGBuildMultipass+0x1e80>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X0, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ X7, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X13, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X28, 462148 <hypre_BoomerAMGBuildMultipass+0x48e8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X13, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X28, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X7, [X28, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X21, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X21, [SP, #520]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X8, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [SP, #496]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X7, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X0, [SP, #528]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X9, [SP, #472]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP XZR, X9, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
LDR X30, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X17, X30, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X4, [X21]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X5, X16, [X17]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
CMP X5, X16	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 45ed1c <hypre_BoomerAMGBuildMultipass+0x14bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X3, [SP, #624]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45edfc <hypre_BoomerAMGBuildMultipass+0x159c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X28, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X1, [X5, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [X28, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [X22, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X9, [X2, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45ddf0 <hypre_BoomerAMGBuildMultipass+0x590>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X21, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X1, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 45f840 <hypre_BoomerAMGBuildMultipass+0x1fe0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X21, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X20, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X28, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X24, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X11, X24, W19,UXTW #3	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
STR X11, [SP, #632]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X24, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 45ec88 <hypre_BoomerAMGBuildMultipass+0x1428>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X8, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ X22, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X4, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X4, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45dab0 <hypre_BoomerAMGBuildMultipass+0x250>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [SP, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X17, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 45eb28 <hypre_BoomerAMGBuildMultipass+0x12c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X20, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X1, [SP, #552]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45dcac <hypre_BoomerAMGBuildMultipass+0x44c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP XZR, XZR, [SP, #440]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
B 45da18 <hypre_BoomerAMGBuildMultipass+0x1b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [X24, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X19, XZR, X21	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X23, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X17, [X24, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [SP, #1192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X16, [SP, #448]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X17, [SP, #440]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45da24 <hypre_BoomerAMGBuildMultipass+0x1c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X18, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X20, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X15, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X28, X18, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X15, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
STR X28, [SP, #552]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B.GT 45db68 <hypre_BoomerAMGBuildMultipass+0x308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X16, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45dcac <hypre_BoomerAMGBuildMultipass+0x44c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 45dbe4 <hypre_BoomerAMGBuildMultipass+0x384>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X27, [SP, #680]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X0, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 4e6448 <hypre_MatvecCommPkgCreate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [X27, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X18, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X1, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBZ X23, 45e360 <hypre_BoomerAMGBuildMultipass+0xb00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4620cc <hypre_BoomerAMGBuildMultipass+0x486c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X28	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X13, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X7, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 461e4c <hypre_BoomerAMGBuildMultipass+0x45ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X12, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X4, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X12, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 461dac <hypre_BoomerAMGBuildMultipass+0x454c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X12, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #456]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 461d98 <hypre_BoomerAMGBuildMultipass+0x4538>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X0, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X26, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVN X7, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 461ad0 <hypre_BoomerAMGBuildMultipass+0x4270>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 460cdc <hypre_BoomerAMGBuildMultipass+0x347c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X25, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 461758 <hypre_BoomerAMGBuildMultipass+0x3ef8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 45fa54 <hypre_BoomerAMGBuildMultipass+0x21f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [X11, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUB X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [X2, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X9, [X22, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X9, [X12, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45ddf0 <hypre_BoomerAMGBuildMultipass+0x590>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [X16, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUB X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [X2, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X15, [X22, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X15, [X17, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 45ddc4 <hypre_BoomerAMGBuildMultipass+0x564>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X30, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X1, [X30, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [X8, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [X22, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X15, [X2, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 45ddc4 <hypre_BoomerAMGBuildMultipass+0x564>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X12, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X27, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X27, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X15, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45e400 <hypre_BoomerAMGBuildMultipass+0xba0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X8, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 45db08 <hypre_BoomerAMGBuildMultipass+0x2a8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 45eb28 <hypre_BoomerAMGBuildMultipass+0x12c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X24, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X27, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X24, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X27, [SP, #632]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45ec88 <hypre_BoomerAMGBuildMultipass+0x1428>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [X21, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X7, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X12, [X19, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X11, X12	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 462508 <hypre_BoomerAMGBuildMultipass+0x4ca8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X7, [X3, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X13, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X13, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45e240 <hypre_BoomerAMGBuildMultipass+0x9e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [X21, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X24, [X19, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X5, X24	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 462344 <hypre_BoomerAMGBuildMultipass+0x4ae4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X2, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X14, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X2, [X14, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X23, X1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45e27c <hypre_BoomerAMGBuildMultipass+0xa1c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 462368 <hypre_BoomerAMGBuildMultipass+0x4b08>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 45e27c <hypre_BoomerAMGBuildMultipass+0xa1c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X28, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X1]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X1, XZR, X12	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [X28]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X22]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X12, [X2]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45dd94 <hypre_BoomerAMGBuildMultipass+0x534>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X18, [SP, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X18, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 45dc20 <hypre_BoomerAMGBuildMultipass+0x3c0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 45dcac <hypre_BoomerAMGBuildMultipass+0x44c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X7, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 462310 <hypre_BoomerAMGBuildMultipass+0x4ab0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X27, X19, #61, #31	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X21, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X19, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X27, [SP, #632]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45ec88 <hypre_BoomerAMGBuildMultipass+0x1428>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X26, XZR, X9	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X18]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 461940 <hypre_BoomerAMGBuildMultipass+0x40e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_0

Source file and lines	par_multi_interp.c:41-2061
Module	exec

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

0% of VPU instructions are used in vector version (process two or more data elements in vector registers):

0% of VPU loads are used in vector version.
0% of VPU stores are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
1% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 290.00 to 57.50 cycles (5.04x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 4032 bytes. The binary function is storing 3280 bytes.

General properties

nb instructions	1676
loop length	6704
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

209.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	139.50	139.50	106.33	106.33	106.33	106.33	106.33	106.33	1.50	1.50	1.50	1.50	290.00	290.00	290.00	191.00	191.00
cycles	139.50	139.50	106.33	106.33	106.33	106.33	106.33	106.33	1.50	1.50	1.50	1.50	290.00	290.00	290.00	191.00	191.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	209.50
Overall L1	290.00

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	1%

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	1%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 290.00 cycles. At this rate:

14% of peak load performance is reached (13.90 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
23% of peak store performance is reached (11.31 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 45d860

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
SUB SP, SP, #1184	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X6, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X8, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X29, X30, [SP]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ADD X29, SP, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STR X0, [SP, #680]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #56	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STR D15, [SP, #96]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
FMOV D15, D0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
LDP X22, X24, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
MOVZ X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X4, [SP, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X3, [SP, #688]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X3, X20, [X2, #56]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
STR X5, [SP, #584]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X7, [SP, #728]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [X20]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X4, [SP, #616]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X5, [SP, #488]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X7, [SP, #400]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X9, X10, [X22]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
STR X9, [SP, #600]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X10, [SP, #608]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X11, X12, [X3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
STR X12, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X11, [SP, #480]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X13, [X20, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [X22, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X19, [X2, #88]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X13, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X2, [X2, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X14, [SP, #592]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X23, [X24, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X21, [X8, #88]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X2, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X26, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X0, [SP, #640]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52df20 <hypre_NumThreads>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X0, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X15, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X15, [SP, #648]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #656]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X1, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45d97c <hypre_BoomerAMGBuildMultipass+0x11c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [SP, #640]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X28, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X26, [SP, #400]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X1, SP, #832	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X18, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X0, XZR, X26	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52d1e0 <hypre_MPI_Comm_size>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X1, SP, #824	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X26	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52d210 <hypre_MPI_Comm_rank>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #688]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [SP, #824]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X6]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X8, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X3, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
STR X4, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B.NE 45d9cc <hypre_BoomerAMGBuildMultipass+0x16c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [SP, #688]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [X5, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X7, [SP, #840]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADRP X9, <5619cc>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LDR X4, [SP, #400]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X10, X9, #2304	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, SP, #840	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X8, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X2, XZR, X10	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X10, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52d8c8 <hypre_MPI_Bcast>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X18, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X11, 45e34c <hypre_BoomerAMGBuildMultipass+0xaec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X12, [SP, #1192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X12, 45e35c <hypre_BoomerAMGBuildMultipass+0xafc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBZ X23, 4620c4 <hypre_BoomerAMGBuildMultipass+0x4864>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X24, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X24, [X24, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X2, [SP, #448]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X24, [SP, #440]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X13, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [SP, #392]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBZ X13, 45da2c <hypre_BoomerAMGBuildMultipass+0x1cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X20, [X20, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X20, [SP, #392]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X0, [X22, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X18, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 45e384 <hypre_BoomerAMGBuildMultipass+0xb24>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X30, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X1, SP, #848	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X26, SP, #848	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADRP X28, 45da48 <hypre_BoomerAMGBuildMultipass+0x1e8>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X28, #1348	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP XZR, XZR, [X26, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X30, XZR, [X26]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
BL 410c40 <@plt_start@+0x480>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #872]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X3, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X0, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUBS X0, X3, X6	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
STR X6, [SP, #704]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B.NE 46206c <hypre_BoomerAMGBuildMultipass+0x480c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X8, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X22, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X5, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X18, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X20, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X0, [SP, #760]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X28, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X28, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X0, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X0, X6, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
CBNZ X0, 45eb40 <hypre_BoomerAMGBuildMultipass+0x12e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X0, 45eaf8 <hypre_BoomerAMGBuildMultipass+0x1298>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CMP X16, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 4620a0 <hypre_BoomerAMGBuildMultipass+0x4840>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X25, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X25, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X9, X25, #24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP X4, X5, [X3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
ORR X7, XZR, X25	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X11, X7, #40	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X12, [X7, #56]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X4, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
UBFM X24, X4, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X5, [SP, #712]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X10, X25, [X9]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
STR X10, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X2, X13, [X11]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
STR X12, [SP, #664]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X0, [X10, X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X2, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X13, [SP, #720]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X0, 4620ec <hypre_BoomerAMGBuildMultipass+0x488c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X27, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X14, X2, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X20, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X14, [SP, #552]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CMP X27, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45dbe4 <hypre_BoomerAMGBuildMultipass+0x384>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X27, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X26, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X1, X17, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X3, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X30, X1, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X15, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X15, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 4624f8 <hypre_BoomerAMGBuildMultipass+0x4c98>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X1, X3, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
ORR X2, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 4e46a4 <hypre_ParCSRCommHandleCreate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
BL 4e4eac <hypre_ParCSRCommHandleDestroy>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X28, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45dcac <hypre_BoomerAMGBuildMultipass+0x44c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X16, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X1, X16, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X17, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45dc80 <hypre_BoomerAMGBuildMultipass+0x420>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X26, [SP, #584]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X5, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X24, X1, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X1, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X1, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45dcac <hypre_BoomerAMGBuildMultipass+0x44c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X2, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X3, [SP, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 4e46a4 <hypre_ParCSRCommHandleCreate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
BL 4e4eac <hypre_ParCSRCommHandleDestroy>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X15, SP, #848	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADRP X27, 45dcb0 <hypre_BoomerAMGBuildMultipass+0x450>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X28, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X27, #552	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X18, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STP XZR, XZR, [X15, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X28, X18, [X15]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
LDR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 410c40 <@plt_start@+0x480>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [SP, #872]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X3, [SP, #496]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBNZ X28, 45ea90 <hypre_BoomerAMGBuildMultipass+0x1230>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X26, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X24, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #536]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X16, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X30, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X8, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X30]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUB X27, X17, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X8, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45df60 <hypre_BoomerAMGBuildMultipass+0x700>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ANDS X7, X8, #4160	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
ORR X3, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X10, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X13, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X14, X9, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X2, X10, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B.EQ 45de00 <hypre_BoomerAMGBuildMultipass+0x5a0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X7, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45ddc4 <hypre_BoomerAMGBuildMultipass+0x564>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X7, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45dd94 <hypre_BoomerAMGBuildMultipass+0x534>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X11]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X12, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4624d0 <hypre_BoomerAMGBuildMultipass+0x4c70>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMN X12, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 45dd7c <hypre_BoomerAMGBuildMultipass+0x51c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X3, X27, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [X0, X27,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [X2]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X13, [X22]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X13, [X5]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X15, [X18, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X15, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 46226c <hypre_BoomerAMGBuildMultipass+0x4a0c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMN X15, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 462244 <hypre_BoomerAMGBuildMultipass+0x49e4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X2, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X13, [X22, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X13, [X4, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X7, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X9, [X7, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X9, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 461fc0 <hypre_BoomerAMGBuildMultipass+0x4760>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMN X9, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 462220 <hypre_BoomerAMGBuildMultipass+0x49c0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X10, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X2, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X13, [X22, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X13, [X10, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X18, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45df60 <hypre_BoomerAMGBuildMultipass+0x700>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X15, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X16, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 45deb4 <hypre_BoomerAMGBuildMultipass+0x654>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X10, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X13, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X12, X2, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X14, X12, X13,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X13, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45dfd8 <hypre_BoomerAMGBuildMultipass+0x778>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X18, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X13, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X13, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45e004 <hypre_BoomerAMGBuildMultipass+0x7a4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X3, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X2, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 4e46a4 <hypre_ParCSRCommHandleCreate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
BL 4e4eac <hypre_ParCSRCommHandleDestroy>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X0, [SP, #552]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR XZR, [SP, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #672]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X0, [SP, #496]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X0, 45eae4 <hypre_BoomerAMGBuildMultipass+0x1284>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [SP, #672]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X28, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X2]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CMP X28, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45e0b8 <hypre_BoomerAMGBuildMultipass+0x858>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #664]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X18, X28, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X7, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X5, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
UBFM X15, X18, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X17, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X16, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X30, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X4, X8, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X9, [SP, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [SP, #536]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X14, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X24, [SP, #1192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X24, 45eb54 <hypre_BoomerAMGBuildMultipass+0x12f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X23, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
STR X0, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B.LE 45e27c <hypre_BoomerAMGBuildMultipass+0xa1c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ANDS X14, X23, #4224	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOVZ X1, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B.EQ 462360 <hypre_BoomerAMGBuildMultipass+0x4b00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 46231c <hypre_BoomerAMGBuildMultipass+0x4abc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45e234 <hypre_BoomerAMGBuildMultipass+0x9d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45e200 <hypre_BoomerAMGBuildMultipass+0x9a0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45e1cc <hypre_BoomerAMGBuildMultipass+0x96c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45e198 <hypre_BoomerAMGBuildMultipass+0x938>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X14, #6	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45e164 <hypre_BoomerAMGBuildMultipass+0x904>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X28, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45e240 <hypre_BoomerAMGBuildMultipass+0x9e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [X19]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X18, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X15, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X30, [X21]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X30, X17	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
CSEL X9, X18, X15, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CSEL X0, X0, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X10]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X8, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X8, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45e240 <hypre_BoomerAMGBuildMultipass+0x9e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [X21, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X12, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X11, [X19, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X4, X11	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 45e18c <hypre_BoomerAMGBuildMultipass+0x92c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X12, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X3, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X12, [X3, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X7, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X7, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45e240 <hypre_BoomerAMGBuildMultipass+0x9e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X13, [X21, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X5, [X19, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X13, X5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 45e1c0 <hypre_BoomerAMGBuildMultipass+0x960>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X2, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X24, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X2, [X24, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X14, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X14, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45e240 <hypre_BoomerAMGBuildMultipass+0x9e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [X21, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X15, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X18, [X19, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X28, X18	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 45e1f4 <hypre_BoomerAMGBuildMultipass+0x994>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X15, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X16, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X15, [X16, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X17, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X17, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45e240 <hypre_BoomerAMGBuildMultipass+0x9e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X30, [X21, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X10, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X9, [X19, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X30, X9	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 45e228 <hypre_BoomerAMGBuildMultipass+0x9c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X10, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X8, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X10, [X8, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X4, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X4, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 4622fc <hypre_BoomerAMGBuildMultipass+0x4a9c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X21, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X19, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X21, [X0, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CMP X23, X19	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45e27c <hypre_BoomerAMGBuildMultipass+0xa1c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB X23, X23, X19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, X19,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W1, #255	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
UBFM X14, X23, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X28, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CSEL X2, X14, X28, #12	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 410950 <@plt_start@+0x190>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STP XZR, XZR, [X17]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
TBNZ X27, #63, 45eb64 <hypre_BoomerAMGBuildMultipass+0x1304>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X28, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X4, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X13, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X7, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
UBFM X8, X27, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP X15, X16, [SP, #480]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
MOVZ X23, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X12, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X30, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X9, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [SP, #392]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X19, [SP, #680]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [X19, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X14, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBZ X14, 462128 <hypre_BoomerAMGBuildMultipass+0x48c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CBNZ X23, 4620cc <hypre_BoomerAMGBuildMultipass+0x486c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP XZR, XZR, [SP, #440]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X19, XZR, X21	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [X22, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X18, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #392]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #1192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBZ X0, 45da3c <hypre_BoomerAMGBuildMultipass+0x1dc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X24, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X1, SP, #848	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X10, SP, #848	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADRP X11, <20045d39c>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STR X0, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X11, #1348	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP XZR, XZR, [X10, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X9, X24, [X10]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
BL 410c40 <@plt_start@+0x480>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X13, [SP, #872]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X2, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X14, X24, X13	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X13, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUBS X0, X14, X2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
STR X2, [SP, #704]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B.NE 462294 <hypre_BoomerAMGBuildMultipass+0x4a34>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X12, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X15, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X0, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X15, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X22, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 45dab0 <hypre_BoomerAMGBuildMultipass+0x250>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 45dfd8 <hypre_BoomerAMGBuildMultipass+0x778>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 45e0b8 <hypre_BoomerAMGBuildMultipass+0x858>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X13, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X4, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUB X24, X13, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X12, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X30, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X12, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X23, [X30, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X9, X4, X14,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X14, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45e548 <hypre_BoomerAMGBuildMultipass+0xce8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X11, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45e574 <hypre_BoomerAMGBuildMultipass+0xd14>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X3, XZR, X26	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X2, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 4e46a4 <hypre_ParCSRCommHandleCreate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
BL 4e4eac <hypre_ParCSRCommHandleDestroy>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X19, <560574>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X1, SP, #808	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X13, X19, #768	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X3, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X2, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X4, XZR, X13	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, SP, #816	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X24, [SP, #816]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [SP, #400]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X13, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52daf0 <hypre_MPI_Allreduce>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X24, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X12, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X15, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [SP, #808]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X9, X24, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X21, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X10, X15, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X10, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBZ X14, 4622e8 <hypre_BoomerAMGBuildMultipass+0x4a88>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X24, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X11, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X27, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X20, XZR, X21	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X30, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X28, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X21, [SP, #392]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X28, XZR, X12	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X27, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X0, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X26, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X4, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X4, [SP, #536]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X24, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [SP, #496]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45dcfc <hypre_BoomerAMGBuildMultipass+0x49c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45e028 <hypre_BoomerAMGBuildMultipass+0x7c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X26, [SP, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X26, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 4622c0 <hypre_BoomerAMGBuildMultipass+0x4a60>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X30, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [SP, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CMP X30, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 45db08 <hypre_BoomerAMGBuildMultipass+0x2a8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X20, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #552]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45dcac <hypre_BoomerAMGBuildMultipass+0x44c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45daec <hypre_BoomerAMGBuildMultipass+0x28c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP XZR, XZR, [X17]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
TBZ X27, #63, 45e288 <hypre_BoomerAMGBuildMultipass+0xa28>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X28, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X23, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X24, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45e4d0 <hypre_BoomerAMGBuildMultipass+0xc70>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X27, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X23, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X20, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X19, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X21, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 45ec78 <hypre_BoomerAMGBuildMultipass+0x1418>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X21, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X20, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X24, #10	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X23, #80	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X24, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X23, [SP, #632]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X0, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X21, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X19, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X20, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X15, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X15, [X19, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X0, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X12, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X12, [SP, #408]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X18, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #416]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X18, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 461e30 <hypre_BoomerAMGBuildMultipass+0x45d0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X30, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X7, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #472]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #520]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #528]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X17, X30, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP X5, X16, [X17]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
CMP X5, X16	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GE 461eb0 <hypre_BoomerAMGBuildMultipass+0x4650>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X4, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP X14, X15, [SP, #480]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDR X27, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X23, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X18, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X13, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X28, [SP, #392]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [SP, #536]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X30, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X11, X30, X4	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X11, [SP, #624]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X27, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X27, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 461d24 <hypre_BoomerAMGBuildMultipass+0x44c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X24, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #304]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #336]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP XZR, XZR, [SP, #456]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
CMP X17, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 461e24 <hypre_BoomerAMGBuildMultipass+0x45c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X5, <200457e28>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ X3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR D31, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
MOVZ X19, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X23, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X24, [SP, #560]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X24, X5, #1580	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X25, [SP, #568]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X25, XZR, X22	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVN X22, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X27, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
DUP V0.2D, V31.D[0]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
STR X6, [SP, #736]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #464]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X30, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X21, [SP, #520]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X11, X30, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X6, X27, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X3, [SP, #384]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X20, [SP, #528]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X27, X18, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #504]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #544]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X22, [SP, #576]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X7, [SP, #696]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X11, [SP, #744]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X6, [SP, #752]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR Q0, [SP, #768]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STR X24, [SP, #784]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X16, [SP, #384]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X22, XZR, X25	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X24, [SP, #560]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X25, [SP, #568]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [SP, #696]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #736]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X16, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ X28, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X7, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #672]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #648]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #656]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #640]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X21, [SP, #624]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X21	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X27, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X21	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X27, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X20, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X27, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X20, 460b30 <hypre_BoomerAMGBuildMultipass+0x32d0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X14, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45f8d8 <hypre_BoomerAMGBuildMultipass+0x2078>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X30, [SP, #760]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X23, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X7, X30, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X16, X7, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
UBFM X9, X16, #3, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X2, X23, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X8, X9, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ANDS X15, X8, #4160	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
SUB X3, X17, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B.EQ 462000 <hypre_BoomerAMGBuildMultipass+0x47a0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X15, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45f804 <hypre_BoomerAMGBuildMultipass+0x1fa4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X15, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45f7d8 <hypre_BoomerAMGBuildMultipass+0x1f78>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X0, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X18, [X3, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X5, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X13, [X4, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X12, X13, X18	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X12, [X4, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X10, [X2, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X11, [X5, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X1, X11, X10	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X1, [X5, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X20, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X21, [X3, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X30, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X19, [X20, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X14, X19, X21	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X14, [X20, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X17, [X2, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X16, [X30, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X9, X16, X17	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X30, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X15, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [X3, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X13, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X23, [X15, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X18, X23, X8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X18, [X15, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [X2, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X13, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X10, X12, X4	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X10, [X13, X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X0, X7	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45f8d8 <hypre_BoomerAMGBuildMultipass+0x2078>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X21, XZR, X13	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X19, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X0, <2004578dc>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #112	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X7, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X27, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X23, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X19, [SP, #880]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X21, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X7, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X23, [SP, #888]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X21, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X6, [SP, #872]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410c40 <@plt_start@+0x480>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [SP, #1184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X18, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X3, X2, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP X1, X4, [X3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
SUB X13, X4, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CBZ X12, 460bc4 <hypre_BoomerAMGBuildMultipass+0x3364>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X20, <20045a940>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X18, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X20, #256	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X9, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X27, [SP, #936]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X5, [SP, #952]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X7, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X9, [SP, #928]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X23, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X28, [SP, #960]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X7, [SP, #944]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X16, [SP, #440]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X23, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X12, [SP, #448]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X18, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X11, [SP, #584]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X16, [SP, #904]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X17, [SP, #592]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X12, [SP, #920]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X15, [SP, #600]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X11, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X30, [SP, #608]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X17, [SP, #880]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X10, [SP, #616]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X15, [SP, #888]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [SP, #1192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X30, [SP, #896]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X10, [SP, #912]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X6, [SP, #968]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X4, [SP, #872]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X8, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X13, [SP, #1096]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X17, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X8, [SP, #976]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X10, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X17, [SP, #1056]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X23, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X4, [SP, #1048]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X30, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X10, [SP, #1088]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X20, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X23, [SP, #1024]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X16, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X30, [SP, #1072]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X13, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X20, [SP, #1016]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X21, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X16, [SP, #1080]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X11, [SP, #408]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X13, [SP, #984]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #416]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X21, [SP, #1000]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X19, [SP, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X11, [SP, #1032]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X14, [SP, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X18, [SP, #1040]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X15, [SP, #536]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X19, [SP, #992]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X14, [SP, #1008]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X15, [SP, #1064]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410c40 <@plt_start@+0x480>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X2, X1, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
CBNZ X2, 4621c8 <hypre_BoomerAMGBuildMultipass+0x4968>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X1, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X0, [SP, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X19, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X19, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X9, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X3, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45fa94 <hypre_BoomerAMGBuildMultipass+0x2234>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X21, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X21, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X21, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X7, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X7, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4621bc <hypre_BoomerAMGBuildMultipass+0x495c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X5, <200458aa4>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ X23, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X6, X5, #2848	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X21, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X14, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X19, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X17, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X13, X8, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X11, X14, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X26, X13, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X26, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X15, X17, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X20, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X4, X18, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X11, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X15, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X4, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X9, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45fca0 <hypre_BoomerAMGBuildMultipass+0x2440>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 45edf0 <hypre_BoomerAMGBuildMultipass+0x1590>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X20, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X0, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X19, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X28, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 45f760 <hypre_BoomerAMGBuildMultipass+0x1f00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X10, <20045cbc8>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X10, #608	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X18, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X7, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X27, [SP, #936]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X19, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X6, [SP, #952]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X21, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X7, [SP, #928]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X20, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X28, [SP, #960]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X11, [SP, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X21, [SP, #944]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X8, [SP, #440]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X20, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X15, [SP, #448]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X11, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [SP, #584]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X8, [SP, #904]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X14, [SP, #592]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X15, [SP, #920]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X30, [SP, #600]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X5, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X16, [SP, #608]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X14, [SP, #880]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X9, [SP, #616]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X30, [SP, #888]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X17, [SP, #1192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X16, [SP, #896]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X9, [SP, #912]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X19, [SP, #968]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X17, [SP, #872]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X23, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X13, [SP, #1096]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X14, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X23, [SP, #976]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X9, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X14, [SP, #1056]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X20, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X17, [SP, #1048]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X16, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X9, [SP, #1088]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X10, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X20, [SP, #1024]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X8, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X16, [SP, #1072]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X18, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X10, [SP, #1016]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X13, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X8, [SP, #1080]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [SP, #408]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X18, [SP, #984]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X11, [SP, #416]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X13, [SP, #1000]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [SP, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X5, [SP, #1032]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X12, [SP, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X11, [SP, #1040]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X30, [SP, #536]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X4, [SP, #992]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X12, [SP, #1008]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X30, [SP, #1064]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410c40 <@plt_start@+0x480>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X0, X2, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
CBNZ X0, 4621ac <hypre_BoomerAMGBuildMultipass+0x494c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X2, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X0, [SP, #512]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X21, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X21, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X21, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X15, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X3, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 460d1c <hypre_BoomerAMGBuildMultipass+0x34bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X19, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X15, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X19, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X7, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X7, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4621bc <hypre_BoomerAMGBuildMultipass+0x495c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X18, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X6, <20045ad2c>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ X23, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X4, X6, #3784	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X21, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X12, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X19, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X17, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X13, X18, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X4, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X10, X12, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X26, X13, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X26, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X14, X17, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X20, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X11, X5, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X10, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X14, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X11, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X15, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 460f28 <hypre_BoomerAMGBuildMultipass+0x36c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X25, XZR, X26	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X26, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [SP, #352]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #304]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #336]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X25	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #408]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #416]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #456]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #464]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X22	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X26	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #536]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X22, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X22, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 46180c <hypre_BoomerAMGBuildMultipass+0x3fac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #368]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X20, [SP, #312]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X5, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X21, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X25, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X24, X20, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X18, [SP, #680]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X23, X21, X20,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X7, [X21, X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X25, X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X1, [X18, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X18, #104]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [SP, #400]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [SP, #688]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X2, [SP, #840]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 4f7720 <hypre_ParCSRMatrixCreate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X15, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
FCMP D15, #0	1	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
ORR X20, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP X4, X19, [X0, #56]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
STP X25, X15, [X4]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STR X27, [X4, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X27, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X28, [X19, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X13, [SP, #728]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STP X21, X27, [X19]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
CCMP X13, #0, #0, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	1	scal (50.0%)
STR XZR, [X0, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B.NE 461d08 <hypre_BoomerAMGBuildMultipass+0x44a8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X24, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X24, 461c7c <hypre_BoomerAMGBuildMultipass+0x441c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [SP, #472]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X16, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 461898 <hypre_BoomerAMGBuildMultipass+0x4038>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #472]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X27, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADRP X12, <2004568a8>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X12, #3456	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X27, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X8, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410c40 <@plt_start@+0x480>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X24, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 46219c <hypre_BoomerAMGBuildMultipass+0x493c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X5, X24, #61, #60	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X9, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X6, X5, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X26, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
UBFM X1, X6, #3, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X14, X1, X9	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ANDS X22, X14, #4224	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
ADD X3, X2, X24,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B.EQ 4619f8 <hypre_BoomerAMGBuildMultipass+0x4198>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, X9	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4619d4 <hypre_BoomerAMGBuildMultipass+0x4174>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 4619b8 <hypre_BoomerAMGBuildMultipass+0x4158>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, #3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 46199c <hypre_BoomerAMGBuildMultipass+0x413c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, #4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 461980 <hypre_BoomerAMGBuildMultipass+0x4120>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, #5	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 461964 <hypre_BoomerAMGBuildMultipass+0x4104>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, #6	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 461948 <hypre_BoomerAMGBuildMultipass+0x40e8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X21, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X18, X27, X21,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X11, [X18]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X11, 462534 <hypre_BoomerAMGBuildMultipass+0x4cd4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X4, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X15, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X13, X27, X15,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X10, [X13]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X10, 461960 <hypre_BoomerAMGBuildMultipass+0x4100>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X26, X26, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X13]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X17, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X23, X27, X17,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X25, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X25, 46197c <hypre_BoomerAMGBuildMultipass+0x411c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X26, X26, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X30, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X28, X27, X30,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X16, [X28]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X16, 461998 <hypre_BoomerAMGBuildMultipass+0x4138>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X26, X26, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X28]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X12, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X8, X27, X12,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X7, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X7, 4619b4 <hypre_BoomerAMGBuildMultipass+0x4154>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X26, X26, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X5, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X6, X27, X5,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X1, [X6]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X1, 4619d0 <hypre_BoomerAMGBuildMultipass+0x4170>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X26, X26, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X6]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X2, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X14, X27, X2,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X22, [X14]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X22, 4619ec <hypre_BoomerAMGBuildMultipass+0x418c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X26, X26, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X14]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X0, X3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 461ac8 <hypre_BoomerAMGBuildMultipass+0x4268>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X26	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X7, X26, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X7, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X21, [SP, #528]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X25, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X3, [SP, #632]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X9, X21, X3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDUR X0, [X9, #504]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X11, <200456afc>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X23, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X11, #3308	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X21, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X1, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X23, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUB X28, X4, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X4, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410c40 <@plt_start@+0x480>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X13, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X5, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X15, X21, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X10, [SP, #520]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X2, XZR, X13	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X25	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52ba28 <hypre_qsort0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X22, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X9, SP, #848	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADRP X2, <20045cba4>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X0, X2, #3792	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X14, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X18, [SP, #528]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X1, XZR, X22	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X23, X14, [X9, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X18, X25, [X9]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STR X26, [SP, #880]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410c40 <@plt_start@+0x480>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X0, <200456bd4>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X1, XZR, X22	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #2928	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X23, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X24, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X11, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410c40 <@plt_start@+0x480>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X24, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X24, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 461c9c <hypre_BoomerAMGBuildMultipass+0x443c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 461b8c <hypre_BoomerAMGBuildMultipass+0x432c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #728]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
FMOV D0, D15	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
BL 44e72c <hypre_BoomerAMGInterpTruncation>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X28, X10, [X19]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
ADD X23, X28, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X10, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 46187c <hypre_BoomerAMGBuildMultipass+0x401c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #112	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X7, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X6, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #368]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X23, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X23, [SP, #304]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X18, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X18, [SP, #336]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X24, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X28, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP XZR, X0, [SP, #456]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
LDR X12, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X28, 462180 <hypre_BoomerAMGBuildMultipass+0x4920>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR XZR, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X14, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X15, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X15, X14,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X0, 462160 <hypre_BoomerAMGBuildMultipass+0x4900>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X1, <200456db0>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X1, #2792	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X12, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X8, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X21, <200456dc8>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STR X4, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X20, [SP, #464]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X1, XZR, X19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X8, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X20, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410c40 <@plt_start@+0x480>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X1, XZR, X19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X21, #2656	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W3, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X9, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X2, [SP, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ W2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [SP, #848]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X7, [SP, #864]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 410c40 <@plt_start@+0x480>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X7, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X17, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 45ee28 <hypre_BoomerAMGBuildMultipass+0x15c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X16, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #224]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45f6e0 <hypre_BoomerAMGBuildMultipass+0x1e80>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X0, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ X7, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X13, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X28, 462148 <hypre_BoomerAMGBuildMultipass+0x48e8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X0, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X13, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X28, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X7, [X28, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X21, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X21, [SP, #520]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X8, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [SP, #496]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X7, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X0, [SP, #528]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X9, [SP, #472]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP XZR, X9, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
LDR X30, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X17, X30, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X4, [X21]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X5, X16, [X17]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
CMP X5, X16	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LT 45ed1c <hypre_BoomerAMGBuildMultipass+0x14bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X3, [SP, #624]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45edfc <hypre_BoomerAMGBuildMultipass+0x159c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X28, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X1, [X5, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [X28, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [X22, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X9, [X2, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45ddf0 <hypre_BoomerAMGBuildMultipass+0x590>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X21, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X1, [SP, #256]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 45f840 <hypre_BoomerAMGBuildMultipass+0x1fe0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X21, XZR, X20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X20, XZR, X24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X28, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X24, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X11, X24, W19,UXTW #3	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
STR X11, [SP, #632]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X24, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 45ec88 <hypre_BoomerAMGBuildMultipass+0x1428>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X8, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ X22, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X4, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X4, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45dab0 <hypre_BoomerAMGBuildMultipass+0x250>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [SP, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X17, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 45eb28 <hypre_BoomerAMGBuildMultipass+0x12c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X20, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X1, [SP, #552]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45dcac <hypre_BoomerAMGBuildMultipass+0x44c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP XZR, XZR, [SP, #440]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
B 45da18 <hypre_BoomerAMGBuildMultipass+0x1b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [X24, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X19, XZR, X21	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X23, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X17, [X24, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [SP, #1192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X16, [SP, #448]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X17, [SP, #440]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45da24 <hypre_BoomerAMGBuildMultipass+0x1c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X18, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X20, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X15, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X28, X18, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X15, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
STR X28, [SP, #552]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B.GT 45db68 <hypre_BoomerAMGBuildMultipass+0x308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X16, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45dcac <hypre_BoomerAMGBuildMultipass+0x44c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 45dbe4 <hypre_BoomerAMGBuildMultipass+0x384>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X27, [SP, #680]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X0, XZR, X27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 4e6448 <hypre_MatvecCommPkgCreate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [X27, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X18, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X1, [SP, #344]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBZ X23, 45e360 <hypre_BoomerAMGBuildMultipass+0xb00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4620cc <hypre_BoomerAMGBuildMultipass+0x486c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X28	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X13, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X7, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 461e4c <hypre_BoomerAMGBuildMultipass+0x45ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X12, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X4, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X12, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 461dac <hypre_BoomerAMGBuildMultipass+0x454c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X12, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #456]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X4, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 461d98 <hypre_BoomerAMGBuildMultipass+0x4538>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X0, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X26, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVN X7, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 461ad0 <hypre_BoomerAMGBuildMultipass+0x4270>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 460cdc <hypre_BoomerAMGBuildMultipass+0x347c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X25, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 461758 <hypre_BoomerAMGBuildMultipass+0x3ef8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 52b3a0 <hypre_Free>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 45fa54 <hypre_BoomerAMGBuildMultipass+0x21f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [X11, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUB X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [X2, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X9, [X22, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X9, [X12, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45ddf0 <hypre_BoomerAMGBuildMultipass+0x590>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [X16, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUB X3, X3, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [X2, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X15, [X22, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X15, [X17, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 45ddc4 <hypre_BoomerAMGBuildMultipass+0x564>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X30, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X1, [X30, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X0, [X8, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [X22, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X15, [X2, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 45ddc4 <hypre_BoomerAMGBuildMultipass+0x564>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X12, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X27, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X0, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X27, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X15, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45e400 <hypre_BoomerAMGBuildMultipass+0xba0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X1, #8	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
BL 52b308 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [SP, #832]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [SP, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X8, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 45db08 <hypre_BoomerAMGBuildMultipass+0x2a8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 45eb28 <hypre_BoomerAMGBuildMultipass+0x12c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X24, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ X27, #16	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X24, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X27, [SP, #632]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45ec88 <hypre_BoomerAMGBuildMultipass+0x1428>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [X21, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X7, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X12, [X19, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X11, X12	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 462508 <hypre_BoomerAMGBuildMultipass+0x4ca8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X7, [X3, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X13, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X13, X0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.LE 45e240 <hypre_BoomerAMGBuildMultipass+0x9e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [X21, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVN X2, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X24, [X19, X0,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X5, X24	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.NE 462344 <hypre_BoomerAMGBuildMultipass+0x4ae4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X2, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X14, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X2, [X14, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X1, X1, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP X23, X1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 45e27c <hypre_BoomerAMGBuildMultipass+0xa1c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 462368 <hypre_BoomerAMGBuildMultipass+0x4b08>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X28, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X14, [SP, #272]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 45e27c <hypre_BoomerAMGBuildMultipass+0xa1c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [SP, #248]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X28, [SP, #360]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X1]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X1, XZR, X12	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR XZR, [X28]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X22]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X12, [X2]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR XZR, [X14]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45dd94 <hypre_BoomerAMGBuildMultipass+0x534>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X18, [SP, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X18, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.GT 45dc20 <hypre_BoomerAMGBuildMultipass+0x3c0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 45dcac <hypre_BoomerAMGBuildMultipass+0x44c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X7, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD X0, X0, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
B 462310 <hypre_BoomerAMGBuildMultipass+0x4ab0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X27, X19, #61, #31	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X21, XZR, X23	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X19, [SP, #328]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X27, [SP, #632]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 45ec88 <hypre_BoomerAMGBuildMultipass+0x1428>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X26, XZR, X9	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STR X9, [X18]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
B 461940 <hypre_BoomerAMGBuildMultipass+0x40e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A

Name	Coverage (%)	Time (s)
▼hypre_BoomerAMGBuildMultipass–	0.30	0.05
○Loop 958 - par_multi_interp.c:385-410 - exec	0.01	0.16
○Loop 925 - par_multi_interp.c:1158-1161 - exec	0.01	0.14
▼Loop 903 - par_multi_interp.c:646-661 - exec–	0.01	0.07
○Loop 939 - par_multi_interp.c:651-655 - exec	0.09	1.09
○Loop 938 - par_multi_interp.c:657-661 - exec	0.00	0.00
▼Loop 902 - par_multi_interp.c:488-514 - exec–	0.01	0.06
○Loop 952 - par_multi_interp.c:491-498 - exec	0.10	1.16
○Loop 951 - par_multi_interp.c:501-508 - exec	0.00	0.00
▼Loop 954 - par_multi_interp.c:440-457 - exec–	0.00	0.00
○Loop 955 - par_multi_interp.c:442-454 - exec	0.00	0.00
▼Loop 908 - par_multi_interp.c:1982-1989 - exec–	0.00	0.00
○Loop 909 - par_multi_interp.c:1984-1989 - exec	0.00	0.00
○Loop 910 - par_multi_interp.c:1962-1968 - exec	0.00	0.00
▼Loop 900 - par_multi_interp.c:307-311 - exec–	0.00	0.00
○Loop 960 - par_multi_interp.c:310-311 - exec	0.00	0.00
○Loop 953 - par_multi_interp.c:466-469 - exec	0.00	0.00
▼Loop 906 - par_multi_interp.c:130-2061 - exec–	0.00	0.00
○Loop 907 - par_multi_interp.c:2016-2017 - exec	0.00	0.00
▼Loop 918 - par_multi_interp.c:1310-1566 - exec–	0.00	0.00
▼Loop 919 - par_multi_interp.c:1324-1338 - exec–	0.00	0.00
▼Loop 920 - par_multi_interp.c:1326-1338 - exec–	0.00	0.00
○Loop 922 - par_multi_interp.c:1337-1338 - exec	0.00	0.00
○Loop 921 - par_multi_interp.c:1337-1338 - exec	0.00	0.00
○Loop 924 - par_multi_interp.c:1333-1334 - exec	0.00	0.00
○Loop 923 - par_multi_interp.c:1333-1334 - exec	0.00	0.00
▼Loop 940 - par_multi_interp.c:548-600 - exec–	0.00	0.00
▼Loop 941 - par_multi_interp.c:590-594 - exec–	0.00	0.00
○Loop 942 - par_multi_interp.c:593-594 - exec	0.00	0.00
○Loop 961 - par_multi_interp.c:205-208 - exec	0.00	0.00
▼Loop 949 - par_multi_interp.c:526-530 - exec–	0.00	0.00
○Loop 950 - par_multi_interp.c:529-530 - exec	0.00	0.00
▼Loop 956 - par_multi_interp.c:415-423 - exec–	0.00	0.00
○Loop 957 - par_multi_interp.c:418-423 - exec	0.00	0.00
▼Loop 905 - par_multi_interp.c:693-891 - exec–	0.00	0.00
▼Loop 933 - par_multi_interp.c:733-759 - exec–	0.00	0.00
▼Loop 934 - par_multi_interp.c:735-759 - exec–	0.00	0.00
○Loop 935 - par_multi_interp.c:749-759 - exec	0.00	0.00
○Loop 937 - par_multi_interp.c:742-745 - exec	0.00	0.00
○Loop 936 - par_multi_interp.c:742-745 - exec	0.00	0.00
▼Loop 930 - par_multi_interp.c:773-784 - exec–	0.00	0.00
○Loop 931 - par_multi_interp.c:775-780 - exec	0.00	0.00
▼Loop 904 - par_multi_interp.c:823-860 - exec–	0.00	0.00
▼Loop 927 - par_multi_interp.c:825-860 - exec–	0.00	0.00
▼Loop 928 - par_multi_interp.c:829-856 - exec–	0.00	0.00
○Loop 929 - par_multi_interp.c:839-850 - exec	0.00	0.00
○Loop 932 - par_multi_interp.c:703-717 - exec	0.00	0.00
○Loop 926 - par_multi_interp.c:872-879 - exec	0.00	0.00
▼Loop 911 - par_multi_interp.c:1674-1888 - exec–	0.00	0.00
▼Loop 912 - par_multi_interp.c:1688-1705 - exec–	0.00	0.00
▼Loop 913 - par_multi_interp.c:1690-1705 - exec–	0.00	0.00
○Loop 914 - par_multi_interp.c:1703-1705 - exec	0.00	0.00
○Loop 917 - par_multi_interp.c:1697-1699 - exec	0.00	0.00
○Loop 916 - par_multi_interp.c:1697-1699 - exec	0.00	0.00
○Loop 915 - par_multi_interp.c:1703-1705 - exec	0.00	0.00
▼Loop 901 - par_multi_interp.c:323-327 - exec–	0.00	0.00
○Loop 959 - par_multi_interp.c:326-327 - exec	0.00	0.00
▼Loop 943 - par_multi_interp.c:548-600 - exec–	0.00	0.00
▼Loop 946 - par_multi_interp.c:550-576 - exec–	0.05	0.63
○Loop 948 - par_multi_interp.c:554-557 - exec	0.02	0.24
○Loop 947 - par_multi_interp.c:568-571 - exec	0.00	0.00
▼Loop 944 - par_multi_interp.c:590-594 - exec–	0.00	0.00
○Loop 945 - par_multi_interp.c:593-594 - exec	0.00	0.00

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code