| Function: hypre_BoomerAMGBuildMultipass | Module: exec | Source: par_multi_interp.c:41-2060 [...] | Coverage (incl. loops): 0.25% | (excl. loops): 0.00% |
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| Function: hypre_BoomerAMGBuildMultipass | Module: exec | Source: par_multi_interp.c:41-2060 [...] | Coverage (incl. loops): 0.25% | (excl. loops): 0.00% |
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/home/hbollore/qaas/qaas-runs/174-161-6712/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 41 - 2060 |
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41: { |
42: #ifdef HYPRE_PROFILE |
43: hypre_profile_times[HYPRE_TIMER_ID_MULTIPASS_INTERP] -= hypre_MPI_Wtime(); |
44: #endif |
45: |
46: MPI_Comm comm = hypre_ParCSRMatrixComm(A); |
47: hypre_ParCSRCommPkg *comm_pkg = hypre_ParCSRMatrixCommPkg(S); |
48: hypre_ParCSRCommHandle *comm_handle; |
49: hypre_ParCSRCommPkg *tmp_comm_pkg; |
50: |
51: hypre_CSRMatrix *A_diag = hypre_ParCSRMatrixDiag(A); |
52: HYPRE_Real *A_diag_data = hypre_CSRMatrixData(A_diag); |
53: HYPRE_Int *A_diag_i = hypre_CSRMatrixI(A_diag); |
54: HYPRE_Int *A_diag_j = hypre_CSRMatrixJ(A_diag); |
55: |
56: hypre_CSRMatrix *A_offd = hypre_ParCSRMatrixOffd(A); |
57: HYPRE_Real *A_offd_data = NULL; |
58: HYPRE_Int *A_offd_i = hypre_CSRMatrixI(A_offd); |
59: HYPRE_Int *A_offd_j = NULL; |
60: HYPRE_Int *col_map_offd_A = hypre_ParCSRMatrixColMapOffd(A); |
61: HYPRE_Int num_cols_offd_A = hypre_CSRMatrixNumCols(A_offd); |
62: |
63: hypre_CSRMatrix *S_diag = hypre_ParCSRMatrixDiag(S); |
64: HYPRE_Int *S_diag_i = hypre_CSRMatrixI(S_diag); |
65: HYPRE_Int *S_diag_j = hypre_CSRMatrixJ(S_diag); |
66: |
67: hypre_CSRMatrix *S_offd = hypre_ParCSRMatrixOffd(S); |
68: HYPRE_Int *S_offd_i = hypre_CSRMatrixI(S_offd); |
69: HYPRE_Int *S_offd_j = NULL; |
70: HYPRE_Int *col_map_offd_S = hypre_ParCSRMatrixColMapOffd(S); |
71: HYPRE_Int num_cols_offd_S = hypre_CSRMatrixNumCols(S_offd); |
[...] |
83: HYPRE_Real *P_offd_data = NULL; |
84: HYPRE_Int *P_offd_i; /*at first counter of nonzero cols for each row, |
85: finally will be pointer to start of row */ |
86: HYPRE_Int *P_offd_j = NULL; |
87: |
88: HYPRE_Int num_sends = 0; |
[...] |
99: HYPRE_Int *Pext_start = NULL; |
100: HYPRE_Int *P_ncols = NULL; |
101: |
102: HYPRE_Int *CF_marker_offd = NULL; |
103: HYPRE_Int *dof_func_offd = NULL; |
104: HYPRE_Int *P_marker; |
105: HYPRE_Int *P_marker_offd = NULL; |
106: HYPRE_Int *C_array; |
107: HYPRE_Int *C_array_offd = NULL; |
108: HYPRE_Int *pass_array = NULL; /* contains points ordered according to pass */ |
109: HYPRE_Int *pass_pointer = NULL; /* pass_pointer[j] contains pointer to first |
110: point of pass j contained in pass_array */ |
111: HYPRE_Int *P_diag_start; |
112: HYPRE_Int *P_offd_start = NULL; |
113: HYPRE_Int **P_diag_pass; |
114: HYPRE_Int **P_offd_pass = NULL; |
115: HYPRE_Int **Pext_pass = NULL; |
116: HYPRE_Int **new_elmts = NULL; /* new neighbors generated in each pass */ |
117: HYPRE_Int *new_counter = NULL; /* contains no. of new neighbors for |
118: each pass */ |
119: HYPRE_Int *loc = NULL; /* contains locations for new neighbor |
120: connections in int_o_buffer to avoid searching */ |
121: HYPRE_Int *Pext_i = NULL; /*contains P_diag_i and P_offd_i info for nonzero |
122: cols of off proc neighbors */ |
123: HYPRE_Int *Pext_send_buffer = NULL; /* used to collect global nonzero |
124: col ids in P_diag for send_map_elmts */ |
125: |
126: HYPRE_Int *map_S_to_new = NULL; |
127: /*HYPRE_Int *map_A_to_new = NULL;*/ |
128: HYPRE_Int *map_A_to_S = NULL; |
129: HYPRE_Int *new_col_map_offd = NULL; |
130: HYPRE_Int *col_map_offd_P = NULL; |
131: HYPRE_Int *permute = NULL; |
[...] |
141: HYPRE_Int n_coarse = 0; |
142: HYPRE_Int n_coarse_offd = 0; |
143: HYPRE_Int n_SF = 0; |
144: HYPRE_Int n_SF_offd = 0; |
145: |
146: HYPRE_Int *fine_to_coarse = NULL; |
147: HYPRE_Int *fine_to_coarse_offd = NULL; |
148: |
149: HYPRE_Int *assigned = NULL; |
150: HYPRE_Int *assigned_offd = NULL; |
151: |
152: HYPRE_Real *Pext_send_data = NULL; |
153: HYPRE_Real *Pext_data = NULL; |
[...] |
184: HYPRE_Int P_offd_size = 0; |
185: HYPRE_Int local_index = -1; |
186: HYPRE_Int new_num_cols_offd = 0; |
[...] |
194: HYPRE_Int * max_num_threads = hypre_CTAlloc(HYPRE_Int, 1); |
[...] |
202: max_num_threads[0] = hypre_NumThreads(); |
203: cnt_nz_per_thread = hypre_CTAlloc(HYPRE_Int, max_num_threads[0]); |
204: cnt_nz_offd_per_thread = hypre_CTAlloc(HYPRE_Int, max_num_threads[0]); |
205: for(i=0; i < max_num_threads[0]; i++) |
206: { |
207: cnt_nz_offd_per_thread[i] = 0; |
208: cnt_nz_per_thread[i] = 0; |
[...] |
216: hypre_MPI_Comm_size(comm,&num_procs); |
217: hypre_MPI_Comm_rank(comm,&my_id); |
218: |
219: #ifdef HYPRE_NO_GLOBAL_PARTITION |
220: my_first_cpt = num_cpts_global[0]; |
221: /* total_global_cpts = 0; */ |
222: if (my_id == (num_procs -1)) total_global_cpts = num_cpts_global[1]; |
223: hypre_MPI_Bcast(&total_global_cpts, 1, HYPRE_MPI_INT, num_procs-1, comm); |
[...] |
229: if (!comm_pkg) |
230: { |
231: comm_pkg = hypre_ParCSRMatrixCommPkg(A); |
232: if (!comm_pkg) |
233: { |
234: hypre_MatvecCommPkgCreate(A); |
235: |
236: comm_pkg = hypre_ParCSRMatrixCommPkg(A); |
237: } |
238: col_offd_S_to_A = NULL; |
239: } |
240: |
241: if (col_offd_S_to_A) |
[...] |
252: if (num_cols_offd_A) |
253: { |
254: A_offd_data = hypre_CSRMatrixData(A_offd); |
255: A_offd_j = hypre_CSRMatrixJ(A_offd); |
256: } |
257: |
258: if (num_cols_offd) |
259: S_offd_j = hypre_CSRMatrixJ(S_offd); |
260: |
261: n_fine = hypre_CSRMatrixNumRows(A_diag); |
[...] |
267: if (n_fine) fine_to_coarse = hypre_CTAlloc(HYPRE_Int, n_fine); |
268: |
269: n_coarse = 0; |
270: n_SF = 0; |
271: #ifdef HYPRE_USING_OPENMP |
272: #pragma omp parallel for private(i) reduction(+:n_coarse,n_SF ) HYPRE_SMP_SCHEDULE |
[...] |
278: pass_array_size = n_fine-n_coarse-n_SF; |
279: if (pass_array_size) pass_array = hypre_CTAlloc(HYPRE_Int, pass_array_size); |
280: pass_pointer = hypre_CTAlloc(HYPRE_Int, max_num_passes+1); |
281: if (n_fine) assigned = hypre_CTAlloc(HYPRE_Int, n_fine); |
282: P_diag_i = hypre_CTAlloc(HYPRE_Int, n_fine+1); |
283: P_offd_i = hypre_CTAlloc(HYPRE_Int, n_fine+1); |
284: if (n_coarse) C_array = hypre_CTAlloc(HYPRE_Int, n_coarse); |
285: |
286: if (num_cols_offd) |
287: { |
288: CF_marker_offd = hypre_CTAlloc(HYPRE_Int, num_cols_offd); |
289: if (num_functions > 1) dof_func_offd = hypre_CTAlloc(HYPRE_Int, num_cols_offd); |
290: } |
291: |
292: if (num_procs > 1) |
293: { |
294: num_sends = hypre_ParCSRCommPkgNumSends(comm_pkg); |
295: send_procs = hypre_ParCSRCommPkgSendProcs(comm_pkg); |
296: send_map_start = hypre_ParCSRCommPkgSendMapStarts(comm_pkg); |
297: send_map_elmt = hypre_ParCSRCommPkgSendMapElmts(comm_pkg); |
298: num_recvs = hypre_ParCSRCommPkgNumRecvs(comm_pkg); |
299: recv_procs = hypre_ParCSRCommPkgRecvProcs(comm_pkg); |
300: recv_vec_start = hypre_ParCSRCommPkgRecvVecStarts(comm_pkg); |
301: if (send_map_start[num_sends]) |
302: int_buf_data = hypre_CTAlloc(HYPRE_Int, send_map_start[num_sends]); |
303: } |
304: |
305: |
306: index = 0; |
307: for (i=0; i < num_sends; i++) |
308: { |
309: start = send_map_start[i]; |
310: for (j = start; j < send_map_start[i+1]; j++) |
311: int_buf_data[index++] = CF_marker[send_map_elmt[j]]; |
312: } |
313: if (num_procs > 1) |
314: { |
315: comm_handle = hypre_ParCSRCommHandleCreate(11, comm_pkg, int_buf_data, |
316: CF_marker_offd); |
317: hypre_ParCSRCommHandleDestroy(comm_handle); |
318: } |
319: |
320: if (num_functions > 1) |
321: { |
322: index = 0; |
323: for (i=0; i < num_sends; i++) |
324: { |
325: start = send_map_start[i]; |
326: for (j = start; j < send_map_start[i+1]; j++) |
327: int_buf_data[index++] = dof_func[send_map_elmt[j]]; |
328: } |
329: if (num_procs > 1) |
330: { |
331: comm_handle = hypre_ParCSRCommHandleCreate(11, comm_pkg, int_buf_data, |
332: dof_func_offd); |
333: hypre_ParCSRCommHandleDestroy(comm_handle); |
334: } |
335: } |
336: |
337: n_coarse_offd = 0; |
338: n_SF_offd = 0; |
339: #ifdef HYPRE_USING_OPENMP |
340: #pragma omp parallel for private(i) reduction(+:n_coarse_offd,n_SF_offd) HYPRE_SMP_SCHEDULE |
[...] |
346: if (num_cols_offd) |
347: { |
348: assigned_offd = hypre_CTAlloc(HYPRE_Int, num_cols_offd); |
349: map_S_to_new = hypre_CTAlloc(HYPRE_Int, num_cols_offd); |
350: fine_to_coarse_offd = hypre_CTAlloc(HYPRE_Int, num_cols_offd); |
351: new_col_map_offd = hypre_CTAlloc(HYPRE_Int, n_coarse_offd); |
[...] |
382: p_cnt = pass_array_size-1; |
383: P_diag_i[0] = 0; |
384: P_offd_i[0] = 0; |
385: for (i = 0; i < n_fine; i++) |
386: { |
387: if (CF_marker[i] == 1) |
388: { |
389: fine_to_coarse[i] = cnt; /* this C point is assigned index |
390: coarse_counter on coarse grid, |
391: and in column of P */ |
392: C_array[cnt++] = i; |
393: assigned[i] = 0; |
394: P_diag_i[i+1] = 1; /* one element in row i1 of P */ |
395: P_offd_i[i+1] = 0; |
396: } |
397: else if (CF_marker[i] == -1) |
398: { |
399: pass_array[p_cnt--] = i; |
400: P_diag_i[i+1] = 0; |
[...] |
415: for (i=0; i < num_sends; i++) |
416: { |
417: start = send_map_start[i]; |
418: for (j = start; j < send_map_start[i+1]; j++) |
419: { |
420: int_buf_data[index] = fine_to_coarse[send_map_elmt[j]]; |
421: if (int_buf_data[index] > -1) |
422: int_buf_data[index] += my_first_cpt; |
423: index++; |
424: } |
425: } |
426: if (num_procs > 1) |
427: { |
428: comm_handle = hypre_ParCSRCommHandleCreate(11, comm_pkg, int_buf_data, |
429: fine_to_coarse_offd); |
430: hypre_ParCSRCommHandleDestroy(comm_handle); |
431: } |
432: |
433: new_recv_vec_start = hypre_CTAlloc(HYPRE_Int,num_recvs+1); |
434: |
435: if (n_coarse_offd) |
436: C_array_offd = hypre_CTAlloc(HYPRE_Int,n_coarse_offd); |
437: |
438: cnt = 0; |
439: new_recv_vec_start[0] = 0; |
440: for (j = 0; j < num_recvs; j++) |
441: { |
442: for (i = recv_vec_start[j]; i < recv_vec_start[j+1]; i++) |
443: { |
444: if (CF_marker_offd[i] == 1) |
445: { |
446: map_S_to_new[i] = cnt; |
447: C_array_offd[cnt] = i; |
448: new_col_map_offd[cnt++] = fine_to_coarse_offd[i]; |
449: assigned_offd[i] = 0; |
450: } |
451: else |
452: { |
453: assigned_offd[i] = -1; |
454: map_S_to_new[i] = -1; |
455: } |
456: } |
457: new_recv_vec_start[j+1] = cnt; |
458: } |
459: |
460: cnt = 0; |
461: hypre_TFree(fine_to_coarse_offd); |
462: |
463: if (col_offd_S_to_A) |
464: { |
465: map_A_to_S = hypre_CTAlloc(HYPRE_Int,num_cols_offd_A); |
466: for (i=0; i < num_cols_offd_A; i++) |
467: { |
468: if (cnt < num_cols_offd && col_map_offd_A[i] == col_map_offd[cnt]) |
[...] |
479: pass_pointer[0] = 0; |
480: pass_pointer[1] = 0; |
481: total_nz = n_coarse; /* accumulates total number of nonzeros in P_diag */ |
482: total_nz_offd = 0; /* accumulates total number of nonzeros in P_offd */ |
[...] |
488: for (i = pass_array_size-1; i > cnt-1; i--) |
489: { |
490: i1 = pass_array[i]; |
491: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
492: { |
493: j1 = S_diag_j[j]; |
494: if (CF_marker[j1] == 1) |
495: { |
496: P_diag_i[i1+1]++; |
497: cnt_nz++; |
498: assigned[i1] = 1; |
499: } |
500: } |
501: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
502: { |
503: j1 = S_offd_j[j]; |
504: if (CF_marker_offd[j1] == 1) |
505: { |
506: P_offd_i[i1+1]++; |
507: cnt_nz_offd++; |
508: assigned[i1] = 1; |
509: } |
510: } |
511: if (assigned[i1] == 1) |
512: { |
513: pass_array[i++] = pass_array[cnt]; |
514: pass_array[cnt++] = i1; |
515: } |
516: } |
517: |
518: pass_pointer[2] = cnt; |
[...] |
526: for (i=0; i < num_sends; i++) |
527: { |
528: start = send_map_start[i]; |
529: for (j = start; j < send_map_start[i+1]; j++) |
530: { int_buf_data[index++] = assigned[send_map_elmt[j]]; } |
531: } |
532: if (num_procs > 1) |
533: { |
534: comm_handle = hypre_ParCSRCommHandleCreate(11, comm_pkg, int_buf_data, |
535: assigned_offd); |
536: hypre_ParCSRCommHandleDestroy(comm_handle); |
[...] |
544: pass = 2; |
545: local_pass_array_size = pass_array_size - cnt; |
546: hypre_MPI_Allreduce(&local_pass_array_size, &global_pass_array_size, 1, HYPRE_MPI_INT, |
547: hypre_MPI_SUM, comm); |
548: while (global_pass_array_size && pass < max_num_passes) |
549: { |
550: for (i = pass_array_size-1; i > cnt-1; i--) |
551: { |
552: i1 = pass_array[i]; |
553: no_break = 1; |
554: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
555: { |
556: j1 = S_diag_j[j]; |
557: if (assigned[j1] == pass-1) |
[...] |
568: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
569: { |
570: j1 = S_offd_j[j]; |
571: if (assigned_offd[j1] == pass-1) |
[...] |
583: pass++; |
584: pass_pointer[pass] = cnt; |
585: |
586: local_pass_array_size = pass_array_size - cnt; |
587: hypre_MPI_Allreduce(&local_pass_array_size, &global_pass_array_size, 1, HYPRE_MPI_INT, |
588: hypre_MPI_SUM, comm); |
589: index = 0; |
590: for (i=0; i < num_sends; i++) |
591: { |
592: start = send_map_start[i]; |
593: for (j = start; j < send_map_start[i+1]; j++) |
594: { int_buf_data[index++] = assigned[send_map_elmt[j]]; } |
595: } |
596: if (num_procs > 1) |
597: { |
598: comm_handle = hypre_ParCSRCommHandleCreate(11, comm_pkg, int_buf_data, |
599: assigned_offd); |
600: hypre_ParCSRCommHandleDestroy(comm_handle); |
601: } |
602: } |
603: |
604: hypre_TFree(int_buf_data); |
605: |
606: num_passes = pass; |
607: |
608: P_diag_pass = hypre_CTAlloc(HYPRE_Int*,num_passes); /* P_diag_pass[i] will contain |
609: all column numbers for points of pass i */ |
610: |
611: P_diag_pass[1] = hypre_CTAlloc(HYPRE_Int,cnt_nz); |
612: |
613: P_diag_start = hypre_CTAlloc(HYPRE_Int, n_fine); /* P_diag_start[i] contains |
614: pointer to begin of column numbers in P_pass for point i, |
615: P_diag_i[i+1] contains number of columns for point i */ |
616: |
617: P_offd_start = hypre_CTAlloc(HYPRE_Int, n_fine); |
618: |
619: if (num_procs > 1) |
620: { |
621: P_offd_pass = hypre_CTAlloc(HYPRE_Int*,num_passes); |
622: |
623: if (cnt_nz_offd) |
624: P_offd_pass[1] = hypre_CTAlloc(HYPRE_Int,cnt_nz_offd); |
625: else |
626: P_offd_pass[1] = NULL; |
627: |
628: new_elmts = hypre_CTAlloc(HYPRE_Int*,num_passes); |
629: |
630: new_counter = hypre_CTAlloc(HYPRE_Int, num_passes+1); |
631: |
632: new_counter[0] = 0; |
633: new_counter[1] = n_coarse_offd; |
634: new_num_cols_offd = n_coarse_offd; |
635: |
636: new_elmts[0] = new_col_map_offd; |
[...] |
646: for (i=pass_pointer[1]; i < pass_pointer[2]; i++) |
647: { |
648: i1 = pass_array[i]; |
649: P_diag_start[i1] = cnt_nz; |
650: P_offd_start[i1] = cnt_nz_offd; |
651: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
652: { |
653: j1 = S_diag_j[j]; |
654: if (CF_marker[j1] == 1) |
655: { P_diag_pass[1][cnt_nz++] = fine_to_coarse[j1]; } |
656: } |
657: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
658: { |
659: j1 = S_offd_j[j]; |
660: if (CF_marker_offd[j1] == 1) |
661: { P_offd_pass[1][cnt_nz_offd++] = map_S_to_new[j1]; } |
662: } |
663: } |
664: |
665: |
666: total_nz += cnt_nz; |
667: total_nz_offd += cnt_nz_offd; |
668: |
669: if (num_procs > 1) |
670: { |
671: tmp_comm_pkg = hypre_CTAlloc(hypre_ParCSRCommPkg,1); |
672: Pext_send_map_start = hypre_CTAlloc(HYPRE_Int*,num_passes); |
673: Pext_recv_vec_start = hypre_CTAlloc(HYPRE_Int*,num_passes); |
674: Pext_pass = hypre_CTAlloc(HYPRE_Int*,num_passes); |
675: Pext_i = hypre_CTAlloc(HYPRE_Int, num_cols_offd+1); |
676: if (num_cols_offd) Pext_start = hypre_CTAlloc(HYPRE_Int, num_cols_offd); |
677: if (send_map_start[num_sends]) |
678: P_ncols = hypre_CTAlloc(HYPRE_Int,send_map_start[num_sends]); |
679: #ifdef HYPRE_USING_OPENMP |
680: #pragma omp parallel for private(i) HYPRE_SMP_SCHEDULE |
681: #endif |
682: for (i=0; i < num_cols_offd+1; i++) |
683: { Pext_i[i] = 0; } |
684: #ifdef HYPRE_USING_OPENMP |
685: #pragma omp parallel for private(i) HYPRE_SMP_SCHEDULE |
[...] |
693: for (pass=2; pass < num_passes; pass++) |
694: { |
695: |
696: if (num_procs > 1) |
697: { |
698: Pext_send_map_start[pass] = hypre_CTAlloc(HYPRE_Int, num_sends+1); |
699: Pext_recv_vec_start[pass] = hypre_CTAlloc(HYPRE_Int, num_recvs+1); |
700: Pext_send_size = 0; |
701: Pext_send_map_start[pass][0] = 0; |
702: |
703: for (i=0; i < num_sends; i++) |
704: { |
705: #ifdef HYPRE_USING_OPENMP |
706: #pragma omp parallel for private(j,j1) reduction(+:Pext_send_size) HYPRE_SMP_SCHEDULE |
[...] |
717: Pext_send_map_start[pass][i+1] = Pext_send_size; |
718: } |
719: |
720: comm_handle = hypre_ParCSRCommHandleCreate (11, comm_pkg, |
721: P_ncols, &Pext_i[1]); |
722: hypre_ParCSRCommHandleDestroy(comm_handle); |
723: |
724: if (Pext_send_size > old_Pext_send_size) |
725: { |
726: hypre_TFree(Pext_send_buffer); |
727: Pext_send_buffer = hypre_CTAlloc(HYPRE_Int, Pext_send_size); |
728: } |
729: old_Pext_send_size = Pext_send_size; |
730: } |
731: |
732: cnt_offd = 0; |
733: for (i=0; i < num_sends; i++) |
734: { |
735: for (j=send_map_start[i]; j < send_map_start[i+1]; j++) |
736: { |
737: j1 = send_map_elmt[j]; |
738: if (assigned[j1] == pass-1) |
739: { |
740: j_start = P_diag_start[j1]; |
741: j_end = j_start+P_diag_i[j1+1]; |
742: for (k=j_start; k < j_end; k++) |
743: { |
744: Pext_send_buffer[cnt_offd++] = my_first_cpt |
745: +P_diag_pass[pass-1][k]; |
746: } |
747: j_start = P_offd_start[j1]; |
748: j_end = j_start+P_offd_i[j1+1]; |
749: for (k=j_start; k < j_end; k++) |
750: { |
751: k1 = P_offd_pass[pass-1][k]; |
752: k3 = 0; |
753: while (k3 < pass-1) |
754: { |
755: if (k1 < new_counter[k3+1]) |
756: { |
757: k2 = k1-new_counter[k3]; |
758: Pext_send_buffer[cnt_offd++] = new_elmts[k3][k2]; |
[...] |
768: if (num_procs > 1) |
769: { |
770: Pext_recv_size = 0; |
771: Pext_recv_vec_start[pass][0] = 0; |
772: cnt_offd = 0; |
773: for (i=0; i < num_recvs; i++) |
774: { |
775: for (j=recv_vec_start[i]; j<recv_vec_start[i+1]; j++) |
776: { |
777: if (assigned_offd[j] == pass-1) |
778: { |
779: Pext_start[j] = cnt_offd; |
780: cnt_offd += Pext_i[j+1]; |
781: } |
782: } |
783: Pext_recv_size = cnt_offd; |
784: Pext_recv_vec_start[pass][i+1] = Pext_recv_size; |
785: } |
786: |
787: hypre_ParCSRCommPkgComm(tmp_comm_pkg) = comm; |
788: hypre_ParCSRCommPkgNumSends(tmp_comm_pkg) = num_sends; |
789: hypre_ParCSRCommPkgSendProcs(tmp_comm_pkg) = send_procs; |
790: hypre_ParCSRCommPkgSendMapStarts(tmp_comm_pkg) = |
791: Pext_send_map_start[pass]; |
792: hypre_ParCSRCommPkgNumRecvs(tmp_comm_pkg) = num_recvs; |
793: hypre_ParCSRCommPkgRecvProcs(tmp_comm_pkg) = recv_procs; |
794: hypre_ParCSRCommPkgRecvVecStarts(tmp_comm_pkg) = |
795: Pext_recv_vec_start[pass]; |
796: |
797: if (Pext_recv_size) |
798: { |
799: Pext_pass[pass] = hypre_CTAlloc(HYPRE_Int, Pext_recv_size); |
800: new_elmts[pass-1] = hypre_CTAlloc(HYPRE_Int,Pext_recv_size); |
801: } |
802: else |
803: { |
804: Pext_pass[pass] = NULL; |
805: new_elmts[pass-1] = NULL; |
806: } |
807: |
808: comm_handle = hypre_ParCSRCommHandleCreate (11, tmp_comm_pkg, |
809: Pext_send_buffer, Pext_pass[pass]); |
810: hypre_ParCSRCommHandleDestroy(comm_handle); |
811: |
812: if (Pext_recv_size > old_Pext_recv_size) |
813: { |
814: hypre_TFree(loc); |
815: loc = hypre_CTAlloc(HYPRE_Int,Pext_recv_size); |
[...] |
823: for (i=0; i < num_recvs; i++) |
824: { |
825: for (j=recv_vec_start[i]; j < recv_vec_start[i+1]; j++) |
826: { |
827: if (assigned_offd[j] == pass-1) |
828: { |
829: for (j1 = cnt_offd; j1 < cnt_offd+Pext_i[j+1]; j1++) |
830: { |
831: k1 = Pext_pass[pass][j1]; |
832: k2 = k1 - my_first_cpt; |
833: if (k2 > -1 && k2 < n_coarse) |
834: { Pext_pass[pass][j1] = -k2-1; } |
835: else |
836: { |
837: not_found = 1; |
838: k3 = 0; |
839: while (k3 < pass-1 && not_found) |
840: { |
841: k2 = hypre_BinarySearch(new_elmts[k3], k1, |
842: (new_counter[k3+1]-new_counter[k3])); |
843: if (k2 > -1) |
844: { |
845: Pext_pass[pass][j1] = k2 + new_counter[k3]; |
[...] |
855: new_elmts[pass-1][cnt_new] = Pext_pass[pass][j1]; |
856: loc[cnt_new++] = j1; |
[...] |
865: if (cnt_new) |
866: { |
867: hypre_qsort2i(new_elmts[pass-1],loc,0,cnt_new-1); |
868: cnt = 0; |
869: local_index = new_counter[pass-1]; |
870: Pext_pass[pass][loc[0]] = local_index; |
871: |
872: for (i=1; i < cnt_new; i++) |
873: { |
874: if (new_elmts[pass-1][i] > new_elmts[pass-1][cnt]) |
875: { |
876: new_elmts[pass-1][++cnt] = new_elmts[pass-1][i]; |
877: local_index++; |
878: } |
879: Pext_pass[pass][loc[i]] = local_index; |
880: } |
881: new_counter[pass] = local_index+1; |
882: } |
883: else if (num_procs > 1) |
884: new_counter[pass] = new_counter[pass-1]; |
885: |
886: if (new_num_cols_offd < local_index+1) |
887: { new_num_cols_offd = local_index+1; } |
888: |
889: pass_length = pass_pointer[pass+1] - pass_pointer[pass]; |
890: #ifdef HYPRE_USING_OPENMP |
891: #pragma omp parallel private(i,my_thread_num,num_threads,thread_start,thread_stop,cnt_nz,cnt_nz_offd,i1,j,j1,j_start,j_end,k1,k,P_marker,P_marker_offd) |
[...] |
1140: hypre_TFree(loc); |
1141: hypre_TFree(P_ncols); |
1142: hypre_TFree(Pext_send_buffer); |
1143: hypre_TFree(new_recv_vec_start); |
1144: hypre_TFree(cnt_nz_per_thread); |
1145: hypre_TFree(cnt_nz_offd_per_thread); |
1146: hypre_TFree(max_num_threads); |
1147: |
1148: P_diag_j = hypre_CTAlloc(HYPRE_Int,total_nz); |
1149: P_diag_data = hypre_CTAlloc(HYPRE_Real,total_nz); |
1150: |
1151: |
1152: if (total_nz_offd) |
1153: { |
1154: P_offd_j = hypre_CTAlloc(HYPRE_Int,total_nz_offd); |
1155: P_offd_data = hypre_CTAlloc(HYPRE_Real,total_nz_offd); |
1156: } |
1157: |
1158: for (i=0; i < n_fine; i++) |
1159: { |
1160: P_diag_i[i+1] += P_diag_i[i]; |
1161: P_offd_i[i+1] += P_offd_i[i]; |
[...] |
1167: #pragma omp parallel for private(i,i1) HYPRE_SMP_SCHEDULE |
[...] |
1177: if (weight_option) /*if this is set, weights are separated into |
[...] |
1184: #pragma omp parallel private(thread_start,thread_stop,my_thread_num,num_threads,P_marker,P_marker_offd,i,i1,sum_C_pos,sum_C_neg,sum_N_pos,sum_N_neg,j_start,j_end,j,k1,cnt,j1,cnt_offd,diagonal,alfa,beta) |
[...] |
1304: if (n_coarse) hypre_TFree(C_array); |
1305: hypre_TFree(C_array_offd); |
1306: hypre_TFree(P_diag_pass[1]); |
1307: if (num_procs > 1) hypre_TFree(P_offd_pass[1]); |
1308: |
1309: |
1310: for (pass = 2; pass < num_passes; pass++) |
1311: { |
1312: |
1313: if (num_procs > 1) |
1314: { |
1315: Pext_send_size = Pext_send_map_start[pass][num_sends]; |
1316: if (Pext_send_size > old_Pext_send_size) |
1317: { |
1318: hypre_TFree(Pext_send_data); |
1319: Pext_send_data = hypre_CTAlloc(HYPRE_Real, Pext_send_size); |
1320: } |
1321: old_Pext_send_size = Pext_send_size; |
1322: |
1323: cnt_offd = 0; |
1324: for (i=0; i < num_sends; i++) |
1325: { |
1326: for (j=send_map_start[i]; j < send_map_start[i+1]; j++) |
1327: { |
1328: j1 = send_map_elmt[j]; |
1329: if (assigned[j1] == pass-1) |
1330: { |
1331: j_start = P_diag_i[j1]; |
1332: j_end = P_diag_i[j1+1]; |
1333: for (k=j_start; k < j_end; k++) |
1334: { Pext_send_data[cnt_offd++] = P_diag_data[k]; } |
1335: j_start = P_offd_i[j1]; |
1336: j_end = P_offd_i[j1+1]; |
1337: for (k=j_start; k < j_end; k++) |
1338: { Pext_send_data[cnt_offd++] = P_offd_data[k]; } |
1339: } |
1340: } |
1341: } |
1342: |
1343: hypre_ParCSRCommPkgNumSends(tmp_comm_pkg) = num_sends; |
1344: hypre_ParCSRCommPkgSendMapStarts(tmp_comm_pkg) = |
1345: Pext_send_map_start[pass]; |
1346: hypre_ParCSRCommPkgNumRecvs(tmp_comm_pkg) = num_recvs; |
1347: hypre_ParCSRCommPkgRecvVecStarts(tmp_comm_pkg) = |
1348: Pext_recv_vec_start[pass]; |
1349: |
1350: Pext_recv_size = Pext_recv_vec_start[pass][num_recvs]; |
1351: |
1352: if (Pext_recv_size > old_Pext_recv_size) |
1353: { |
1354: hypre_TFree(Pext_data); |
1355: Pext_data = hypre_CTAlloc(HYPRE_Real, Pext_recv_size); |
1356: } |
1357: old_Pext_recv_size = Pext_recv_size; |
1358: |
1359: comm_handle = hypre_ParCSRCommHandleCreate (1, tmp_comm_pkg, |
1360: Pext_send_data, Pext_data); |
1361: hypre_ParCSRCommHandleDestroy(comm_handle); |
1362: |
1363: hypre_TFree(Pext_send_map_start[pass]); |
1364: hypre_TFree(Pext_recv_vec_start[pass]); |
1365: } |
1366: |
1367: pass_length = pass_pointer[pass+1]-pass_pointer[pass]; |
1368: #ifdef HYPRE_USING_OPENMP |
1369: #pragma omp parallel private(thread_start,thread_stop,my_thread_num,num_threads,P_marker,P_marker_offd,i,i1,sum_C_neg,sum_C_pos,sum_N_neg,sum_N_pos,j_start,j_end,cnt,j,k1,cnt_offd,j1,k,alfa,beta,diagonal,C_array,C_array_offd) |
[...] |
1562: hypre_TFree(P_diag_pass[pass]); |
1563: if (num_procs > 1) |
1564: { |
1565: hypre_TFree(P_offd_pass[pass]); |
1566: hypre_TFree(Pext_pass[pass]); |
[...] |
1575: #pragma omp parallel private(thread_start,thread_stop,my_thread_num,num_threads,k,k1,i,i1,j,j1,sum_C,sum_N,j_start,j_end,cnt,tmp_marker,tmp_marker_offd,cnt_offd,diagonal,alfa) |
[...] |
1669: if (n_coarse) hypre_TFree(C_array); |
1670: hypre_TFree(C_array_offd); |
1671: hypre_TFree(P_diag_pass[1]); |
1672: if (num_procs > 1) hypre_TFree(P_offd_pass[1]); |
1673: |
1674: for (pass = 2; pass < num_passes; pass++) |
1675: { |
1676: |
1677: if (num_procs > 1) |
1678: { |
1679: Pext_send_size = Pext_send_map_start[pass][num_sends]; |
1680: if (Pext_send_size > old_Pext_send_size) |
1681: { |
1682: hypre_TFree(Pext_send_data); |
1683: Pext_send_data = hypre_CTAlloc(HYPRE_Real, Pext_send_size); |
1684: } |
1685: old_Pext_send_size = Pext_send_size; |
1686: |
1687: cnt_offd = 0; |
1688: for (i=0; i < num_sends; i++) |
1689: { |
1690: for (j=send_map_start[i]; j < send_map_start[i+1]; j++) |
1691: { |
1692: j1 = send_map_elmt[j]; |
1693: if (assigned[j1] == pass-1) |
1694: { |
1695: j_start = P_diag_i[j1]; |
1696: j_end = P_diag_i[j1+1]; |
1697: for (k=j_start; k < j_end; k++) |
1698: { |
1699: Pext_send_data[cnt_offd++] = P_diag_data[k]; |
1700: } |
1701: j_start = P_offd_i[j1]; |
1702: j_end = P_offd_i[j1+1]; |
1703: for (k=j_start; k < j_end; k++) |
1704: { |
1705: Pext_send_data[cnt_offd++] = P_offd_data[k]; |
[...] |
1711: hypre_ParCSRCommPkgNumSends(tmp_comm_pkg) = num_sends; |
1712: hypre_ParCSRCommPkgSendMapStarts(tmp_comm_pkg) = |
1713: Pext_send_map_start[pass]; |
1714: hypre_ParCSRCommPkgNumRecvs(tmp_comm_pkg) = num_recvs; |
1715: hypre_ParCSRCommPkgRecvVecStarts(tmp_comm_pkg) = |
1716: Pext_recv_vec_start[pass]; |
1717: |
1718: Pext_recv_size = Pext_recv_vec_start[pass][num_recvs]; |
1719: |
1720: if (Pext_recv_size > old_Pext_recv_size) |
1721: { |
1722: hypre_TFree(Pext_data); |
1723: Pext_data = hypre_CTAlloc(HYPRE_Real, Pext_recv_size); |
1724: } |
1725: old_Pext_recv_size = Pext_recv_size; |
1726: |
1727: comm_handle = hypre_ParCSRCommHandleCreate (1, tmp_comm_pkg, |
1728: Pext_send_data, Pext_data); |
1729: hypre_ParCSRCommHandleDestroy(comm_handle); |
1730: |
1731: hypre_TFree(Pext_send_map_start[pass]); |
1732: hypre_TFree(Pext_recv_vec_start[pass]); |
1733: } |
1734: |
1735: pass_length = pass_pointer[pass+1]-pass_pointer[pass]; |
1736: #ifdef HYPRE_USING_OPENMP |
1737: #pragma omp parallel private(thread_start,thread_stop,my_thread_num,num_threads,k,k1,i,i1,j,j1,sum_C,sum_N,j_start,j_end,cnt,tmp_marker,tmp_marker_offd,cnt_offd,diagonal,alfa,tmp_array,tmp_array_offd) |
[...] |
1884: hypre_TFree(P_diag_pass[pass]); |
1885: if (num_procs > 1) |
1886: { |
1887: hypre_TFree(P_offd_pass[pass]); |
1888: hypre_TFree(Pext_pass[pass]); |
1889: } |
1890: } |
1891: } |
1892: |
1893: hypre_TFree(CF_marker_offd); |
1894: hypre_TFree(Pext_send_map_start); |
1895: hypre_TFree(Pext_recv_vec_start); |
1896: hypre_TFree(dof_func_offd); |
1897: hypre_TFree(Pext_send_data); |
1898: hypre_TFree(Pext_data); |
1899: hypre_TFree(P_diag_pass); |
1900: hypre_TFree(P_offd_pass); |
1901: hypre_TFree(Pext_pass); |
1902: hypre_TFree(P_diag_start); |
1903: hypre_TFree(P_offd_start); |
1904: hypre_TFree(Pext_start); |
1905: hypre_TFree(Pext_i); |
1906: hypre_TFree(fine_to_coarse); |
1907: hypre_TFree(assigned); |
1908: hypre_TFree(assigned_offd); |
1909: hypre_TFree(pass_pointer); |
1910: hypre_TFree(pass_array); |
1911: hypre_TFree(map_S_to_new); |
1912: hypre_TFree(map_A_to_S); |
1913: if (num_procs > 1) hypre_TFree(tmp_comm_pkg); |
1914: |
1915: P = hypre_ParCSRMatrixCreate(comm, |
1916: hypre_ParCSRMatrixGlobalNumRows(A), |
1917: total_global_cpts, |
1918: hypre_ParCSRMatrixColStarts(A), |
1919: num_cpts_global, |
1920: 0, |
1921: P_diag_i[n_fine], |
1922: P_offd_i[n_fine]); |
1923: P_diag = hypre_ParCSRMatrixDiag(P); |
1924: hypre_CSRMatrixData(P_diag) = P_diag_data; |
1925: hypre_CSRMatrixI(P_diag) = P_diag_i; |
1926: hypre_CSRMatrixJ(P_diag) = P_diag_j; |
1927: P_offd = hypre_ParCSRMatrixOffd(P); |
1928: hypre_CSRMatrixData(P_offd) = P_offd_data; |
1929: hypre_CSRMatrixI(P_offd) = P_offd_i; |
1930: hypre_CSRMatrixJ(P_offd) = P_offd_j; |
1931: hypre_ParCSRMatrixOwnsRowStarts(P) = 0; |
1932: |
1933: /* Compress P, removing coefficients smaller than trunc_factor * Max |
1934: and/or keep yat most <P_max_elmts> per row absolutely maximal coefficients */ |
1935: |
1936: if (trunc_factor != 0.0 || P_max_elmts != 0) |
1937: { |
1938: hypre_BoomerAMGInterpTruncation(P, trunc_factor, P_max_elmts); |
1939: P_diag_data = hypre_CSRMatrixData(P_diag); |
1940: P_diag_i = hypre_CSRMatrixI(P_diag); |
1941: P_diag_j = hypre_CSRMatrixJ(P_diag); |
1942: P_offd_data = hypre_CSRMatrixData(P_offd); |
1943: P_offd_i = hypre_CSRMatrixI(P_offd); |
1944: P_offd_j = hypre_CSRMatrixJ(P_offd); |
1945: } |
1946: P_offd_size = P_offd_i[n_fine]; |
1947: |
1948: num_cols_offd_P = 0; |
1949: if (P_offd_size) |
1950: { |
1951: if (new_num_cols_offd > num_cols_offd) |
1952: { P_marker_offd = hypre_CTAlloc(HYPRE_Int,new_num_cols_offd); } |
1953: else |
1954: { P_marker_offd = hypre_CTAlloc(HYPRE_Int,num_cols_offd); } |
1955: #ifdef HYPRE_USING_OPENMP |
1956: #pragma omp parallel for private(i) HYPRE_SMP_SCHEDULE |
1957: #endif |
1958: for (i=0; i < new_num_cols_offd; i++) |
1959: { P_marker_offd[i] = 0; } |
1960: |
1961: num_cols_offd_P = 0; |
1962: for (i=0; i < P_offd_size; i++) |
1963: { |
1964: index = P_offd_j[i]; |
1965: if (!P_marker_offd[index]) |
1966: { |
1967: num_cols_offd_P++; |
1968: P_marker_offd[index] = 1; |
1969: } |
1970: } |
1971: |
1972: col_map_offd_P = hypre_CTAlloc(HYPRE_Int,num_cols_offd_P); |
1973: permute = hypre_CTAlloc(HYPRE_Int, new_counter[num_passes-1]); |
1974: |
1975: #ifdef HYPRE_USING_OPENMP |
1976: #pragma omp parallel for private(i) HYPRE_SMP_SCHEDULE |
[...] |
1982: for (i=0; i < num_passes-1; i++) |
1983: { |
1984: for (j=new_counter[i]; j < new_counter[i+1]; j++) |
1985: { |
1986: if (P_marker_offd[j]) |
1987: { |
1988: col_map_offd_P[cnt] = new_elmts[i][j-new_counter[i]]; |
1989: permute[j] = col_map_offd_P[cnt++]; |
1990: } |
1991: } |
1992: } |
1993: |
1994: hypre_qsort0(col_map_offd_P,0,num_cols_offd_P-1); |
1995: |
1996: #ifdef HYPRE_USING_OPENMP |
1997: #pragma omp parallel for private(i,k1) HYPRE_SMP_SCHEDULE |
[...] |
2007: #pragma omp parallel for private(i) HYPRE_SMP_SCHEDULE |
2008: #endif |
2009: for (i=0; i < P_offd_size; i++) |
2010: { P_offd_j[i] = permute[P_offd_j[i]]; } |
2011: |
2012: hypre_TFree(P_marker_offd); |
2013: } |
2014: if (num_procs > 1) |
2015: { |
2016: for (i=0; i < num_passes-1; i++) |
2017: hypre_TFree(new_elmts[i]); |
2018: } |
2019: hypre_TFree(permute); |
2020: hypre_TFree(new_elmts); |
2021: hypre_TFree(new_counter); |
2022: |
2023: if (num_cols_offd_P) |
2024: { |
2025: hypre_ParCSRMatrixColMapOffd(P) = col_map_offd_P; |
2026: hypre_CSRMatrixNumCols(P_offd) = num_cols_offd_P; |
2027: } |
2028: |
2029: if (n_SF) |
2030: { |
2031: #ifdef HYPRE_USING_OPENMP |
2032: #pragma omp parallel for private(i) HYPRE_SMP_SCHEDULE |
[...] |
2038: if (num_procs > 1) |
2039: { |
2040: hypre_MatvecCommPkgCreate(P); |
2041: } |
2042: |
2043: *P_ptr = P; |
[...] |
2060: return(0); |
0x4312a0 STR D8, [SP, #400]! |
0x4312a4 STP X29, X30, [SP, #16] |
0x4312a8 STP X28, X27, [SP, #32] |
0x4312ac STP X26, X25, [SP, #48] |
0x4312b0 STP X24, X23, [SP, #64] |
0x4312b4 STP X22, X21, [SP, #80] |
0x4312b8 STP X20, X19, [SP, #96] |
0x4312bc ADD X29, SP, #16 |
0x4312c0 SUB SP, SP, #1008 |
0x4312c4 LDP X21, X23, [X0, #56] |
0x4312c8 STUR X1, [X29, #504] |
0x4312cc LDR X10, [X0] |
0x4312d0 MOVZ W1, #8 |
0x4312d4 FMOV D8, D0 |
0x4312d8 LDR X24, [X0, #88] |
0x4312dc LDR X26, [X2, #88] |
0x4312e0 STP X7, X0, [SP, #304] |
0x4312e4 MOVZ W0, #1 |
0x4312e8 STR X3, [SP, #320] |
0x4312ec STUR XZR, [X29, #328] |
0x4312f0 STR XZR, [SP, #624] |
0x4312f4 STR XZR, [SP, #616] |
0x4312f8 STR XZR, [SP, #608] |
0x4312fc LDR X8, [X21, #48] |
0x431300 LDR X22, [X23, #24] |
0x431304 STR XZR, [SP, #600] |
0x431308 STUR X4, [X29, #480] |
0x43130c STR XZR, [SP, #480] |
0x431310 STP X8, X5, [X29, #976] |
0x431314 LDP X8, X9, [X21] |
0x431318 STP XZR, X9, [X29, #952] |
0x43131c STUR X8, [X29, #456] |
0x431320 LDR X8, [X23] |
0x431324 STP XZR, X8, [X29, #936] |
0x431328 LDP X8, X25, [X2, #56] |
0x43132c LDP X9, X8, [X8] |
0x431330 LDR X28, [X25, #24] |
0x431334 STP X8, X9, [X29, #920] |
0x431338 LDR X9, [X2, #112] |
0x43133c LDR X8, [X25] |
0x431340 STUR XZR, [X29, #392] |
0x431344 STUR XZR, [X29, #352] |
0x431348 STUR XZR, [X29, #336] |
0x43134c STP XZR, XZR, [X29, #808] |
0x431350 STP XZR, XZR, [X29, #792] |
0x431354 STUR XZR, [X29, #272] |
0x431358 STUR XZR, [X29, #256] |
0x43135c STR XZR, [SP, #760] |
0x431360 STR XZR, [SP, #752] |
0x431364 STR XZR, [SP, #736] |
0x431368 STR XZR, [SP, #720] |
0x43136c STR XZR, [SP, #712] |
0x431370 STR XZR, [SP, #704] |
0x431374 STR XZR, [SP, #696] |
0x431378 STR XZR, [SP, #688] |
0x43137c STR XZR, [SP, #680] |
0x431380 STR XZR, [SP, #672] |
0x431384 STR XZR, [SP, #664] |
0x431388 STR XZR, [SP, #592] |
0x43138c STR XZR, [SP, #584] |
0x431390 STR XZR, [SP, #576] |
0x431394 STR XZR, [SP, #568] |
0x431398 STP X9, X10, [SP, #368] |
0x43139c STUR X8, [X29, #400] |
0x4313a0 MOVN X8, #0 |
0x4313a4 STP X8, XZR, [SP, #488] |
0x4313a8 BL 4a90d0 |
0x4313ac ORR X19, XZR, X0 |
0x4313b0 STR X0, [SP, #456] |
0x4313b4 BL 4aae10 |
0x4313b8 MOVZ W1, #8 |
0x4313bc STR X0, [X19] |
0x4313c0 BL 4a90d0 |
0x4313c4 ORR X20, XZR, X0 |
0x4313c8 STR X0, [SP, #448] |
0x4313cc LDR X0, [X19] |
0x4313d0 MOVZ W1, #8 |
0x4313d4 BL 4a90d0 |
0x4313d8 STR XZR, [SP, #560] |
0x4313dc STR X0, [SP, #440] |
0x4313e0 LDR X8, [X19] |
0x4313e4 CMP X8, #1 |
0x4313e8 B.LT 431424 |
0x4313ec ORR X8, XZR, XZR |
0x4313f0 HINT #0 |
0x4313f4 HINT #0 |
0x4313f8 HINT #0 |
0x4313fc HINT #0 |
(692) 0x431400 STR XZR, [X0, X8,LSL #3] |
(692) 0x431404 LDR X8, [SP, #560] |
(692) 0x431408 STR XZR, [X20, X8,LSL #3] |
(692) 0x43140c LDR X8, [SP, #560] |
(692) 0x431410 ADD X8, X8, #1 |
(692) 0x431414 STR X8, [SP, #560] |
(692) 0x431418 LDR X9, [X19] |
(692) 0x43141c CMP X8, X9 |
(692) 0x431420 B.LT 431400 |
0x431424 LDR X19, [SP, #376] |
0x431428 ADD X1, SP, #528 |
0x43142c ORR X0, XZR, X19 |
0x431430 BL 4aa2b0 |
0x431434 ADD X1, SP, #536 |
0x431438 ORR X0, XZR, X19 |
0x43143c BL 4aa2e0 |
0x431440 LDR X9, [SP, #528] |
0x431444 LDR X8, [SP, #536] |
0x431448 SUB X3, X9, #1 |
0x43144c CMP X8, X3 |
0x431450 B.NE 431460 |
0x431454 LDR X8, [SP, #320] |
0x431458 LDR X8, [X8, #8] |
0x43145c STR X8, [SP, #520] |
0x431460 LDR X8, [SP, #320] |
0x431464 ADRP X2, |
0x431468 ADD X0, SP, #520 |
0x43146c MOVZ W1, #1 |
0x431470 LDR X27, [X8] |
0x431474 LDR X2, [X2, #3928] |
0x431478 LDR X4, [SP, #376] |
0x43147c BL 4aa8a0 |
0x431480 LDR X8, [SP, #368] |
0x431484 CBZ X8, 431558 |
0x431488 LDR X8, [X29, #104] |
0x43148c CMP X8, #0 |
0x431490 CSEL X8, X22, X28, #0 |
0x431494 CSEL X20, X24, X26, #0 |
0x431498 STUR X8, [X29, #384] |
0x43149c CBZ X22, 4314b0 |
0x4314a0 LDR X9, [X23, #48] |
0x4314a4 STUR X9, [X29, #440] |
0x4314a8 LDR X9, [X23, #8] |
0x4314ac STUR X9, [X29, #424] |
0x4314b0 CBZ X8, 4314bc |
0x4314b4 LDR X8, [X25, #8] |
0x4314b8 STUR X8, [X29, #392] |
0x4314bc LDR X0, [X21, #16] |
0x4314c0 STR X0, [SP, #632] |
0x4314c4 CBZ X0, 4314d4 |
0x4314c8 MOVZ W1, #8 |
0x4314cc BL 4a90d0 |
0x4314d0 STR X0, [SP, #592] |
0x4314d4 ADRP X0, |
0x4314d8 ADD X0, X0, #240 |
0x4314dc ADRP X2, 4334dc |
0x4314e0 ADD X2, X2, #3888 |
0x4314e4 ADD X3, SP, #632 |
0x4314e8 SUB X4, X29, #8 |
0x4314ec STR XZR, [SP, #624] |
0x4314f0 STR XZR, [SP, #608] |
0x4314f4 ADD X5, SP, #624 |
0x4314f8 ADD X6, SP, #608 |
0x4314fc MOVZ W1, #4 |
0x431500 BL 40f990 |
0x431504 LDR X9, [SP, #624] |
0x431508 LDR X10, [SP, #608] |
0x43150c LDR X8, [SP, #632] |
0x431510 ADD X9, X10, X9 |
0x431514 SUBS X28, X8, X9 |
0x431518 B.EQ 43152c |
0x43151c MOVZ W1, #8 |
0x431520 ORR X0, XZR, X28 |
0x431524 BL 4a90d0 |
0x431528 STR X0, [SP, #760] |
0x43152c MOVZ W0, #11 |
0x431530 MOVZ W1, #8 |
0x431534 BL 4a90d0 |
0x431538 STR X0, [SP, #752] |
0x43153c LDR X0, [SP, #632] |
0x431540 CBZ X0, 43159c |
0x431544 MOVZ W1, #8 |
0x431548 BL 4a90d0 |
0x43154c LDR X8, [SP, #632] |
0x431550 STR X0, [SP, #584] |
0x431554 B 4315a0 |
0x431558 LDR X8, [SP, #312] |
0x43155c LDR X8, [X8, #112] |
0x431560 STR X8, [SP, #368] |
0x431564 CBNZ X8, 43157c |
0x431568 LDR X19, [SP, #312] |
0x43156c ORR X0, XZR, X19 |
0x431570 BL 482410 |
0x431574 LDR X8, [X19, #112] |
0x431578 STR X8, [SP, #368] |
0x43157c ORR X8, XZR, XZR |
0x431580 STR XZR, [X29, #104] |
0x431584 CMP X8, #0 |
0x431588 CSEL X8, X22, X28, #0 |
0x43158c CSEL X20, X24, X26, #0 |
0x431590 STUR X8, [X29, #384] |
0x431594 CBNZ X22, 4314a0 |
0x431598 B 4314b0 |
0x43159c ORR X8, XZR, XZR |
0x4315a0 ADD X0, X8, #1 |
0x4315a4 MOVZ W1, #8 |
0x4315a8 BL 4a90d0 |
0x4315ac LDR X8, [SP, #632] |
0x4315b0 STUR X0, [X29, #368] |
0x4315b4 MOVZ W1, #8 |
0x4315b8 ADD X0, X8, #1 |
0x4315bc BL 4a90d0 |
0x4315c0 STUR X0, [X29, #344] |
0x4315c4 LDR X0, [SP, #624] |
0x4315c8 CBZ X0, 4315d8 |
0x4315cc MOVZ W1, #8 |
0x4315d0 BL 4a90d0 |
0x4315d4 STUR X0, [X29, #264] |
0x4315d8 LDUR X0, [X29, #384] |
0x4315dc CBZ X0, 431608 |
0x4315e0 MOVZ W1, #8 |
0x4315e4 BL 4a90d0 |
0x4315e8 LDUR X8, [X29, #480] |
0x4315ec STUR X0, [X29, #288] |
0x4315f0 CMP X8, #2 |
0x4315f4 B.LT 431608 |
0x4315f8 LDUR X0, [X29, #384] |
0x4315fc MOVZ W1, #8 |
0x431600 BL 4a90d0 |
0x431604 STUR X0, [X29, #280] |
0x431608 LDR X8, [SP, #528] |
0x43160c CMP X8, #1 |
0x431610 B.LE 431668 |
0x431614 LDR X11, [SP, #368] |
0x431618 LDP X8, X9, [X11, #8] |
0x43161c STR X9, [SP, #336] |
0x431620 LDP X9, X10, [X11, #24] |
0x431624 STUR X10, [X29, #312] |
0x431628 LDR X10, [X11, #40] |
0x43162c STP X9, X8, [X29, #832] |
0x431630 LDR X0, [X9, X8,LSL #3] |
0x431634 STR X10, [SP, #408] |
0x431638 LDP X8, X10, [X11, #48] |
0x43163c STR X8, [SP, #328] |
0x431640 STR X10, [SP, #416] |
0x431644 CBZ X0, 431684 |
0x431648 MOVZ W1, #8 |
0x43164c BL 4a90d0 |
0x431650 ORR X25, XZR, X0 |
0x431654 LDUR X13, [X29, #328] |
0x431658 STR XZR, [SP, #560] |
0x43165c CMP X13, #1 |
0x431660 B.GE 431698 |
0x431664 B 4316fc |
0x431668 STR XZR, [SP, #408] |
0x43166c ORR X25, XZR, XZR |
0x431670 LDUR X13, [X29, #328] |
0x431674 STR XZR, [SP, #560] |
0x431678 CMP X13, #1 |
0x43167c B.GE 431698 |
0x431680 B 4316fc |
0x431684 ORR X25, XZR, XZR |
0x431688 LDUR X13, [X29, #328] |
0x43168c STR XZR, [SP, #560] |
0x431690 CMP X13, #1 |
0x431694 B.LT 4316fc |
0x431698 LDP X11, X8, [X29, #824] |
0x43169c LDUR X9, [X29, #504] |
0x4316a0 ORR X10, XZR, XZR |
0x4316a4 ORR X12, XZR, XZR |
0x4316a8 B 4316b8 |
(690) 0x4316ac STR X12, [SP, #560] |
(690) 0x4316b0 CMP X12, X13 |
(690) 0x4316b4 B.GE 4316fc |
(690) 0x4316b8 LDR X14, [X8, X12,LSL #3] |
(690) 0x4316bc ADD X12, X12, #1 |
(690) 0x4316c0 LDR X15, [X8, X12,LSL #3] |
(690) 0x4316c4 CMP X14, X15 |
(690) 0x4316c8 B.GE 4316ac |
(691) 0x4316cc LDR X12, [X11, X14,LSL #3] |
(691) 0x4316d0 ADD X14, X14, #1 |
(691) 0x4316d4 LDR X12, [X9, X12,LSL #3] |
(691) 0x4316d8 STR X12, [X25, X10,LSL #3] |
(691) 0x4316dc ADD X10, X10, #1 |
(691) 0x4316e0 LDR X12, [SP, #560] |
(691) 0x4316e4 ADD X12, X12, #1 |
(691) 0x4316e8 LDR X13, [X8, X12,LSL #3] |
(691) 0x4316ec CMP X14, X13 |
(691) 0x4316f0 B.LT 4316cc |
(690) 0x4316f4 LDUR X13, [X29, #328] |
(690) 0x4316f8 B 4316ac |
0x4316fc LDR X8, [SP, #528] |
0x431700 CMP X8, #1 |
0x431704 B.LE 431720 |
0x431708 LDUR X3, [X29, #288] |
0x43170c LDR X1, [SP, #368] |
0x431710 MOVZ W0, #11 |
0x431714 ORR X2, XZR, X25 |
0x431718 BL 481820 |
0x43171c BL 481c20 |
0x431720 LDUR X8, [X29, #480] |
0x431724 CMP X8, #2 |
0x431728 B.LT 4317d4 |
0x43172c LDUR X13, [X29, #328] |
0x431730 STR XZR, [SP, #560] |
0x431734 CMP X13, #1 |
0x431738 B.LT 4317b0 |
0x43173c LDP X11, X8, [X29, #824] |
0x431740 LDUR X9, [X29, #472] |
0x431744 ORR X10, XZR, XZR |
0x431748 ORR X12, XZR, XZR |
0x43174c B 43176c |
0x431750 HINT #0 |
0x431754 HINT #0 |
0x431758 HINT #0 |
0x43175c HINT #0 |
(688) 0x431760 STR X12, [SP, #560] |
(688) 0x431764 CMP X12, X13 |
(688) 0x431768 B.GE 4317b0 |
(688) 0x43176c LDR X14, [X8, X12,LSL #3] |
(688) 0x431770 ADD X12, X12, #1 |
(688) 0x431774 LDR X15, [X8, X12,LSL #3] |
(688) 0x431778 CMP X14, X15 |
(688) 0x43177c B.GE 431760 |
(689) 0x431780 LDR X12, [X11, X14,LSL #3] |
(689) 0x431784 ADD X14, X14, #1 |
(689) 0x431788 LDR X12, [X9, X12,LSL #3] |
(689) 0x43178c STR X12, [X25, X10,LSL #3] |
(689) 0x431790 ADD X10, X10, #1 |
(689) 0x431794 LDR X12, [SP, #560] |
(689) 0x431798 ADD X12, X12, #1 |
(689) 0x43179c LDR X13, [X8, X12,LSL #3] |
(689) 0x4317a0 CMP X14, X13 |
(689) 0x4317a4 B.LT 431780 |
(688) 0x4317a8 LDUR X13, [X29, #328] |
(688) 0x4317ac B 431760 |
0x4317b0 LDR X8, [SP, #528] |
0x4317b4 CMP X8, #1 |
0x4317b8 B.LE 4317d4 |
0x4317bc LDUR X3, [X29, #280] |
0x4317c0 LDR X1, [SP, #368] |
0x4317c4 MOVZ W0, #11 |
0x4317c8 ORR X2, XZR, X25 |
0x4317cc BL 481820 |
0x4317d0 BL 481c20 |
0x4317d4 ADRP X0, |
0x4317d8 ADD X0, X0, #336 |
0x4317dc ADRP X2, 4347dc |
0x4317e0 ADD X2, X2, #272 |
0x4317e4 SUB X3, X29, #128 |
0x4317e8 SUB X4, X29, #224 |
0x4317ec STR XZR, [SP, #616] |
0x4317f0 STR XZR, [SP, #600] |
0x4317f4 ADD X5, SP, #616 |
0x4317f8 ADD X6, SP, #600 |
0x4317fc MOVZ W1, #4 |
0x431800 BL 40f990 |
0x431804 LDUR X0, [X29, #384] |
0x431808 CBZ X0, 43184c |
0x43180c MOVZ W1, #8 |
0x431810 BL 4a90d0 |
0x431814 STR X0, [SP, #576] |
0x431818 LDUR X0, [X29, #384] |
0x43181c MOVZ W1, #8 |
0x431820 BL 4a90d0 |
0x431824 STR X0, [SP, #688] |
0x431828 LDUR X0, [X29, #384] |
0x43182c MOVZ W1, #8 |
0x431830 BL 4a90d0 |
0x431834 ORR X19, XZR, X0 |
0x431838 LDR X0, [SP, #616] |
0x43183c MOVZ W1, #8 |
0x431840 BL 4a90d0 |
0x431844 ORR X26, XZR, X0 |
0x431848 B 431854 |
0x43184c ORR X19, XZR, XZR |
0x431850 ORR X26, XZR, XZR |
0x431854 SUB X8, X28, #1 |
0x431858 LDUR X9, [X29, #344] |
0x43185c STR X8, [SP, #432] |
0x431860 LDUR X8, [X29, #368] |
0x431864 STR XZR, [X8], #8 |
0x431868 STR XZR, [X9], #8 |
0x43186c STR XZR, [SP, #560] |
0x431870 LDR X10, [SP, #632] |
0x431874 CMP X10, #1 |
0x431878 B.LT 431938 |
0x43187c LDUR X10, [X29, #504] |
0x431880 LDR X11, [SP, #760] |
0x431884 LDR X12, [SP, #584] |
0x431888 MOVN X15, #0 |
0x43188c MOVZ W16, #1 |
0x431890 ORR X13, XZR, XZR |
0x431894 ORR X0, XZR, XZR |
0x431898 LDR X14, [SP, #592] |
0x43189c LDR X18, [SP, #432] |
0x4318a0 LDUR X17, [X29, #264] |
0x4318a4 B 4318e8 |
(687) 0x4318a8 STR X0, [X11, X18,LSL #3] |
(687) 0x4318ac SUB X18, X18, #1 |
(687) 0x4318b0 LDR X0, [SP, #560] |
(687) 0x4318b4 STR XZR, [X8, X0,LSL #3] |
(687) 0x4318b8 LDR X0, [SP, #560] |
(687) 0x4318bc STR XZR, [X9, X0,LSL #3] |
(687) 0x4318c0 LDR X0, [SP, #560] |
(687) 0x4318c4 STR X15, [X12, X0,LSL #3] |
(687) 0x4318c8 LDR X0, [SP, #560] |
(687) 0x4318cc STR X15, [X14, X0,LSL #3] |
(687) 0x4318d0 LDR X0, [SP, #560] |
(687) 0x4318d4 LDR X1, [SP, #632] |
(687) 0x4318d8 ADD X0, X0, #1 |
(687) 0x4318dc STR X0, [SP, #560] |
(687) 0x4318e0 CMP X0, X1 |
(687) 0x4318e4 B.GE 431938 |
(687) 0x4318e8 LDR X1, [X10, X0,LSL #3] |
(687) 0x4318ec CMN X1, #1 |
(687) 0x4318f0 B.EQ 4318a8 |
(687) 0x4318f4 CMP X1, #1 |
(687) 0x4318f8 B.NE 4318b4 |
(687) 0x4318fc STR X13, [X14, X0,LSL #3] |
(687) 0x431900 LDR X0, [SP, #560] |
(687) 0x431904 STR X0, [X17, X13,LSL #3] |
(687) 0x431908 STR XZR, [X12, X0,LSL #3] |
(687) 0x43190c ADD X13, X13, #1 |
(687) 0x431910 LDR X0, [SP, #560] |
(687) 0x431914 STR X16, [X8, X0,LSL #3] |
(687) 0x431918 LDR X0, [SP, #560] |
(687) 0x43191c STR XZR, [X9, X0,LSL #3] |
(687) 0x431920 LDR X0, [SP, #560] |
(687) 0x431924 LDR X1, [SP, #632] |
(687) 0x431928 ADD X0, X0, #1 |
(687) 0x43192c STR X0, [SP, #560] |
(687) 0x431930 CMP X0, X1 |
(687) 0x431934 B.LT 4318e8 |
0x431938 LDUR X13, [X29, #328] |
0x43193c STR XZR, [SP, #560] |
0x431940 CMP X13, #1 |
0x431944 B.LT 4319bc |
0x431948 LDP X11, X9, [X29, #824] |
0x43194c LDR X10, [SP, #592] |
0x431950 ORR X8, XZR, XZR |
0x431954 ORR X12, XZR, XZR |
0x431958 B 43196c |
0x43195c HINT #0 |
(685) 0x431960 STR X12, [SP, #560] |
(685) 0x431964 CMP X12, X13 |
(685) 0x431968 B.GE 4319bc |
(685) 0x43196c LDR X14, [X9, X12,LSL #3] |
(685) 0x431970 ADD X12, X12, #1 |
(685) 0x431974 LDR X15, [X9, X12,LSL #3] |
(685) 0x431978 CMP X14, X15 |
(685) 0x43197c B.GE 431960 |
(686) 0x431980 LDR X12, [X11, X14,LSL #3] |
(686) 0x431984 ADD X14, X14, #1 |
(686) 0x431988 LDR X12, [X10, X12,LSL #3] |
(686) 0x43198c CMP X12, #0 |
(686) 0x431990 CSEL X13, XZR, X27, #11 |
(686) 0x431994 ADD X12, X13, X12 |
(686) 0x431998 STR X12, [X25, X8,LSL #3] |
(686) 0x43199c ADD X8, X8, #1 |
(686) 0x4319a0 LDR X12, [SP, #560] |
(686) 0x4319a4 ADD X12, X12, #1 |
(686) 0x4319a8 LDR X13, [X9, X12,LSL #3] |
(686) 0x4319ac CMP X14, X13 |
(686) 0x4319b0 B.LT 431980 |
(685) 0x4319b4 LDUR X13, [X29, #328] |
(685) 0x4319b8 B 431960 |
0x4319bc LDR X8, [SP, #528] |
0x4319c0 CMP X8, #1 |
0x4319c4 B.LE 4319e0 |
0x4319c8 LDR X1, [SP, #368] |
0x4319cc MOVZ W0, #11 |
0x4319d0 ORR X2, XZR, X25 |
0x4319d4 ORR X3, XZR, X19 |
0x4319d8 BL 481820 |
0x4319dc BL 481c20 |
0x4319e0 LDR X8, [SP, #408] |
0x4319e4 MOVZ W1, #8 |
0x4319e8 ADD X0, X8, #1 |
0x4319ec BL 4a90d0 |
0x4319f0 ORR X21, XZR, X0 |
0x4319f4 LDR X0, [SP, #616] |
0x4319f8 CBZ X0, 431a08 |
0x4319fc MOVZ W1, #8 |
0x431a00 BL 4a90d0 |
0x431a04 STUR X0, [X29, #256] |
0x431a08 LDR X8, [SP, #408] |
0x431a0c STR XZR, [X21] |
0x431a10 CMP X8, #1 |
0x431a14 B.LT 431ac0 |
0x431a18 LDUR X9, [X29, #288] |
0x431a1c MOVN X11, #0 |
0x431a20 ORR X8, XZR, XZR |
0x431a24 ORR X10, XZR, XZR |
0x431a28 B 431a3c |
(683) 0x431a2c LDR X12, [SP, #408] |
(683) 0x431a30 STR X10, [X21, X8,LSL #3] |
(683) 0x431a34 CMP X8, X12 |
(683) 0x431a38 B.EQ 431ac0 |
(683) 0x431a3c LDR X12, [SP, #416] |
(683) 0x431a40 LDR X15, [X12, X8,LSL #3] |
(683) 0x431a44 ADD X8, X8, #1 |
(683) 0x431a48 STR X15, [SP, #560] |
(683) 0x431a4c LDR X12, [X12, X8,LSL #3] |
(683) 0x431a50 CMP X15, X12 |
(683) 0x431a54 B.GE 431a2c |
(683) 0x431a58 LDR X12, [SP, #576] |
(683) 0x431a5c LDR X13, [SP, #688] |
(683) 0x431a60 LDUR X14, [X29, #256] |
(683) 0x431a64 B 431a90 |
(684) 0x431a68 STR X11, [X12, X15,LSL #3] |
(684) 0x431a6c LDR X15, [SP, #560] |
(684) 0x431a70 STR X11, [X13, X15,LSL #3] |
(684) 0x431a74 LDR X15, [SP, #560] |
(684) 0x431a78 LDR X16, [SP, #416] |
(684) 0x431a7c ADD X15, X15, #1 |
(684) 0x431a80 STR X15, [SP, #560] |
(684) 0x431a84 LDR X16, [X16, X8,LSL #3] |
(684) 0x431a88 CMP X15, X16 |
(684) 0x431a8c B.GE 431a2c |
(684) 0x431a90 LDR X16, [X9, X15,LSL #3] |
(684) 0x431a94 CMP X16, #1 |
(684) 0x431a98 B.NE 431a68 |
(684) 0x431a9c STR X10, [X13, X15,LSL #3] |
(684) 0x431aa0 LDR X15, [SP, #560] |
(684) 0x431aa4 STR X15, [X14, X10,LSL #3] |
(684) 0x431aa8 LDR X15, [X19, X15,LSL #3] |
(684) 0x431aac STR X15, [X26, X10,LSL #3] |
(684) 0x431ab0 ADD X10, X10, #1 |
(684) 0x431ab4 LDR X15, [SP, #560] |
(684) 0x431ab8 STR XZR, [X12, X15,LSL #3] |
(684) 0x431abc B 431a74 |
0x431ac0 ORR X0, XZR, X19 |
0x431ac4 BL 4a91d0 |
0x431ac8 LDR X8, [X29, #104] |
0x431acc CBZ X8, 431b54 |
0x431ad0 MOVZ W1, #8 |
0x431ad4 ORR X0, XZR, X22 |
0x431ad8 BL 4a90d0 |
0x431adc STR X0, [SP, #680] |
0x431ae0 STR XZR, [SP, #560] |
0x431ae4 CMP X22, #1 |
0x431ae8 B.LT 431b54 |
0x431aec ORR X8, XZR, XZR |
0x431af0 ORR X9, XZR, XZR |
0x431af4 B 431b2c |
0x431af8 HINT #0 |
0x431afc HINT #0 |
(681) 0x431b00 LDR X10, [X24, X9,LSL #3] |
(681) 0x431b04 LDR X11, [X20, X8,LSL #3] |
(681) 0x431b08 CMP X10, X11 |
(681) 0x431b0c CSINV X10, X8, XZR, #0 |
(681) 0x431b10 CSINC X8, X8, X8, #1 |
(681) 0x431b14 STR X10, [X0, X9,LSL #3] |
(681) 0x431b18 LDR X9, [SP, #560] |
(681) 0x431b1c ADD X9, X9, #1 |
(681) 0x431b20 STR X9, [SP, #560] |
(681) 0x431b24 CMP X9, X22 |
(681) 0x431b28 B.GE 431b54 |
(682) 0x431b2c LDUR X10, [X29, #384] |
(682) 0x431b30 CMP X8, X10 |
(682) 0x431b34 B.LT 431b00 |
(682) 0x431b38 MOVN X10, #0 |
(682) 0x431b3c STR X10, [X0, X9,LSL #3] |
(682) 0x431b40 LDR X9, [SP, #560] |
(682) 0x431b44 ADD X9, X9, #1 |
(682) 0x431b48 STR X9, [SP, #560] |
(682) 0x431b4c CMP X9, X22 |
(682) 0x431b50 B.LT 431b2c |
0x431b54 LDR X8, [SP, #752] |
0x431b58 LDR X18, [SP, #432] |
0x431b5c STP XZR, XZR, [X8] |
0x431b60 STR XZR, [SP, #512] |
0x431b64 STR X18, [SP, #560] |
0x431b68 LDR X9, [SP, #624] |
0x431b6c STR X9, [SP, #656] |
0x431b70 CMP X28, #1 |
0x431b74 B.LT 431cb0 |
0x431b78 LDR X9, [SP, #760] |
0x431b7c LDP X11, X10, [X29, #920] |
0x431b80 LDUR X12, [X29, #504] |
0x431b84 MOVZ W16, #1 |
0x431b88 ORR X19, XZR, XZR |
0x431b8c ORR X23, XZR, XZR |
0x431b90 ORR X20, XZR, XZR |
0x431b94 LDP X14, X13, [X29, #904] |
0x431b98 LDUR X15, [X29, #288] |
0x431b9c LDR X17, [SP, #584] |
0x431ba0 B 431bb4 |
(678) 0x431ba4 SUB X18, X0, #1 |
(678) 0x431ba8 STR X18, [SP, #560] |
(678) 0x431bac CMP X0, X23 |
(678) 0x431bb0 B.LE 431cbc |
(678) 0x431bb4 LDR X18, [X9, X18,LSL #3] |
(678) 0x431bb8 ADD X0, X18, #1 |
(678) 0x431bbc LDR X1, [X10, X18,LSL #3] |
(678) 0x431bc0 LDR X3, [X10, X0,LSL #3] |
(678) 0x431bc4 CMP X1, X3 |
(678) 0x431bc8 B.GE 431c20 |
(678) 0x431bcc LDUR X2, [X29, #368] |
(678) 0x431bd0 LDR X4, [SP, #584] |
(678) 0x431bd4 B 431bec |
0x431bd8 HINT #0 |
0x431bdc HINT #0 |
(680) 0x431be0 ADD X1, X1, #1 |
(680) 0x431be4 CMP X1, X3 |
(680) 0x431be8 B.GE 431c20 |
(680) 0x431bec LDR X5, [X11, X1,LSL #3] |
(680) 0x431bf0 LDR X5, [X12, X5,LSL #3] |
(680) 0x431bf4 CMP X5, #1 |
(680) 0x431bf8 B.NE 431be0 |
(680) 0x431bfc LDR X3, [X2, X0,LSL #3] |
(680) 0x431c00 ADD X20, X20, #1 |
(680) 0x431c04 ADD X3, X3, #1 |
(680) 0x431c08 STR X3, [X2, X0,LSL #3] |
(680) 0x431c0c STR X16, [X4, X18,LSL #3] |
(680) 0x431c10 LDR X3, [X10, X0,LSL #3] |
(680) 0x431c14 B 431be0 |
0x431c18 HINT #0 |
0x431c1c HINT #0 |
(678) 0x431c20 LDR X1, [X13, X18,LSL #3] |
(678) 0x431c24 LDR X4, [X13, X0,LSL #3] |
(678) 0x431c28 CMP X1, X4 |
(678) 0x431c2c B.GE 431c80 |
(678) 0x431c30 LDUR X2, [X29, #344] |
(678) 0x431c34 LDR X3, [SP, #584] |
(678) 0x431c38 B 431c4c |
0x431c3c HINT #0 |
(679) 0x431c40 ADD X1, X1, #1 |
(679) 0x431c44 CMP X1, X4 |
(679) 0x431c48 B.GE 431c80 |
(679) 0x431c4c LDR X5, [X14, X1,LSL #3] |
(679) 0x431c50 LDR X5, [X15, X5,LSL #3] |
(679) 0x431c54 CMP X5, #1 |
(679) 0x431c58 B.NE 431c40 |
(679) 0x431c5c LDR X4, [X2, X0,LSL #3] |
(679) 0x431c60 ADD X19, X19, #1 |
(679) 0x431c64 ADD X4, X4, #1 |
(679) 0x431c68 STR X4, [X2, X0,LSL #3] |
(679) 0x431c6c STR X16, [X3, X18,LSL #3] |
(679) 0x431c70 LDR X4, [X13, X0,LSL #3] |
(679) 0x431c74 B 431c40 |
0x431c78 HINT #0 |
0x431c7c HINT #0 |
(678) 0x431c80 LDR X1, [X17, X18,LSL #3] |
(678) 0x431c84 LDR X0, [SP, #560] |
(678) 0x431c88 CMP X1, #1 |
(678) 0x431c8c B.NE 431ba4 |
(678) 0x431c90 LDR X1, [X9, X23,LSL #3] |
(678) 0x431c94 ADD X2, X0, #1 |
(678) 0x431c98 STR X2, [SP, #560] |
(678) 0x431c9c STR X1, [X9, X0,LSL #3] |
(678) 0x431ca0 STR X18, [X9, X23,LSL #3] |
(678) 0x431ca4 ADD X23, X23, #1 |
(678) 0x431ca8 LDR X0, [SP, #560] |
(678) 0x431cac B 431ba4 |
0x431cb0 ORR X20, XZR, XZR |
0x431cb4 ORR X23, XZR, XZR |
0x431cb8 ORR X19, XZR, XZR |
0x431cbc LDUR X13, [X29, #328] |
0x431cc0 STR X23, [X8, #16] |
0x431cc4 STR XZR, [SP, #560] |
0x431cc8 CMP X13, #1 |
0x431ccc B.LT 431d34 |
0x431cd0 LDP X11, X8, [X29, #824] |
0x431cd4 LDR X9, [SP, #584] |
0x431cd8 ORR X10, XZR, XZR |
0x431cdc ORR X12, XZR, XZR |
0x431ce0 B 431cf0 |
(676) 0x431ce4 STR X12, [SP, #560] |
(676) 0x431ce8 CMP X12, X13 |
(676) 0x431cec B.GE 431d34 |
(676) 0x431cf0 LDR X14, [X8, X12,LSL #3] |
(676) 0x431cf4 ADD X12, X12, #1 |
(676) 0x431cf8 LDR X15, [X8, X12,LSL #3] |
(676) 0x431cfc CMP X14, X15 |
(676) 0x431d00 B.GE 431ce4 |
(677) 0x431d04 LDR X12, [X11, X14,LSL #3] |
(677) 0x431d08 ADD X14, X14, #1 |
(677) 0x431d0c LDR X12, [X9, X12,LSL #3] |
(677) 0x431d10 STR X12, [X25, X10,LSL #3] |
(677) 0x431d14 ADD X10, X10, #1 |
(677) 0x431d18 LDR X12, [SP, #560] |
(677) 0x431d1c ADD X12, X12, #1 |
(677) 0x431d20 LDR X13, [X8, X12,LSL #3] |
(677) 0x431d24 CMP X14, X13 |
(677) 0x431d28 B.LT 431d04 |
(676) 0x431d2c LDUR X13, [X29, #328] |
(676) 0x431d30 B 431ce4 |
0x431d34 LDR X8, [SP, #528] |
0x431d38 CMP X8, #1 |
0x431d3c B.LE 431d58 |
0x431d40 LDR X3, [SP, #576] |
0x431d44 LDR X1, [SP, #368] |
0x431d48 MOVZ W0, #11 |
0x431d4c ORR X2, XZR, X25 |
0x431d50 BL 481820 |
0x431d54 BL 481c20 |
0x431d58 MOVZ W8, #2 |
0x431d5c ADRP X3, |
0x431d60 ADRP X4, |
0x431d64 ADD X0, SP, #544 |
0x431d68 ADD X1, SP, #552 |
0x431d6c MOVZ W2, #1 |
0x431d70 STR X8, [SP, #648] |
0x431d74 SUB X8, X28, X23 |
0x431d78 STR X8, [SP, #544] |
0x431d7c LDR X3, [X3, #3928] |
0x431d80 LDR X4, [X4, #3784] |
0x431d84 LDR X5, [SP, #376] |
0x431d88 BL 4aaae0 |
0x431d8c LDR X8, [SP, #552] |
0x431d90 CBZ X8, 431f98 |
0x431d94 LDR X8, [SP, #648] |
0x431d98 CMP X8, #9 |
0x431d9c B.GT 431f98 |
0x431da0 ADRP X24, |
0x431da4 ADRP X22, |
0x431da8 LDR X24, [X24, #3928] |
0x431dac LDR X22, [X22, #3784] |
0x431db0 HINT #0 |
0x431db4 HINT #0 |
0x431db8 HINT #0 |
0x431dbc HINT #0 |
(670) 0x431dc0 LDR X16, [SP, #432] |
(670) 0x431dc4 STR X16, [SP, #560] |
(670) 0x431dc8 CMP X28, X23 |
(670) 0x431dcc B.LE 431ea0 |
(670) 0x431dd0 LDR X9, [SP, #760] |
(670) 0x431dd4 LDP X11, X10, [X29, #920] |
(670) 0x431dd8 LDR X12, [SP, #584] |
(670) 0x431ddc LDP X14, X13, [X29, #904] |
(670) 0x431de0 LDR X15, [SP, #576] |
(670) 0x431de4 B 431e1c |
(673) 0x431de8 LDR X8, [X9, X23,LSL #3] |
(673) 0x431dec ADD X18, X16, #1 |
(673) 0x431df0 STR X18, [SP, #560] |
(673) 0x431df4 STR X8, [X9, X16,LSL #3] |
(673) 0x431df8 STR X17, [X9, X23,LSL #3] |
(673) 0x431dfc ADD X23, X23, #1 |
(673) 0x431e00 LDR X8, [SP, #648] |
(673) 0x431e04 STR X8, [X12, X17,LSL #3] |
(673) 0x431e08 LDR X17, [SP, #560] |
(673) 0x431e0c SUB X16, X17, #1 |
(673) 0x431e10 STR X16, [SP, #560] |
(673) 0x431e14 CMP X17, X23 |
(673) 0x431e18 B.LE 431ea0 |
(673) 0x431e1c LDR X17, [X9, X16,LSL #3] |
(673) 0x431e20 ADD X18, X17, #1 |
(673) 0x431e24 LDR X2, [X10, X17,LSL #3] |
(673) 0x431e28 LDR X0, [X10, X18,LSL #3] |
(673) 0x431e2c SUBS X0, X0, X2 |
(673) 0x431e30 B.LE 431e58 |
(673) 0x431e34 SUB X1, X8, #1 |
(673) 0x431e38 ADD X2, X11, X2,LSL #3 |
(673) 0x431e3c HINT #0 |
(675) 0x431e40 LDR X3, [X2], #8 |
(675) 0x431e44 LDR X3, [X12, X3,LSL #3] |
(675) 0x431e48 CMP X3, X1 |
(675) 0x431e4c B.EQ 431de8 |
(675) 0x431e50 SUBS X0, X0, #1 |
(675) 0x431e54 B.NE 431e40 |
(673) 0x431e58 LDR X1, [X13, X17,LSL #3] |
(673) 0x431e5c LDR X18, [X13, X18,LSL #3] |
(673) 0x431e60 SUBS X18, X18, X1 |
(673) 0x431e64 B.LE 431e08 |
(673) 0x431e68 SUB X0, X8, #1 |
(673) 0x431e6c ADD X1, X14, X1,LSL #3 |
(673) 0x431e70 HINT #0 |
(673) 0x431e74 HINT #0 |
(673) 0x431e78 HINT #0 |
(673) 0x431e7c HINT #0 |
(674) 0x431e80 LDR X2, [X1], #8 |
(674) 0x431e84 LDR X2, [X15, X2,LSL #3] |
(674) 0x431e88 CMP X2, X0 |
(674) 0x431e8c B.EQ 431de8 |
(674) 0x431e90 SUBS X18, X18, #1 |
(674) 0x431e94 B.NE 431e80 |
(673) 0x431e98 B 431e08 |
0x431e9c HINT #0 |
(670) 0x431ea0 LDR X9, [SP, #752] |
(670) 0x431ea4 LDR X5, [SP, #376] |
(670) 0x431ea8 ADD X8, X8, #1 |
(670) 0x431eac ADD X0, SP, #544 |
(670) 0x431eb0 ADD X1, SP, #552 |
(670) 0x431eb4 MOVZ W2, #1 |
(670) 0x431eb8 ORR X3, XZR, X24 |
(670) 0x431ebc ORR X4, XZR, X22 |
(670) 0x431ec0 STR X8, [SP, #648] |
(670) 0x431ec4 STR X23, [X9, X8,LSL #3] |
(670) 0x431ec8 SUB X8, X28, X23 |
(670) 0x431ecc STR X8, [SP, #544] |
(670) 0x431ed0 BL 4aaae0 |
(670) 0x431ed4 LDUR X13, [X29, #328] |
(670) 0x431ed8 STR XZR, [SP, #560] |
(670) 0x431edc CMP X13, #1 |
(670) 0x431ee0 B.LT 431f60 |
(670) 0x431ee4 LDP X11, X8, [X29, #824] |
(670) 0x431ee8 LDR X9, [SP, #584] |
(670) 0x431eec ORR X10, XZR, XZR |
(670) 0x431ef0 ORR X12, XZR, XZR |
(670) 0x431ef4 B 431f0c |
0x431ef8 HINT #0 |
0x431efc HINT #0 |
(671) 0x431f00 STR X12, [SP, #560] |
(671) 0x431f04 CMP X12, X13 |
(671) 0x431f08 B.GE 431f60 |
(671) 0x431f0c LDR X14, [X8, X12,LSL #3] |
(671) 0x431f10 ADD X12, X12, #1 |
(671) 0x431f14 LDR X15, [X8, X12,LSL #3] |
(671) 0x431f18 CMP X14, X15 |
(671) 0x431f1c B.GE 431f00 |
(672) 0x431f20 LDR X12, [X11, X14,LSL #3] |
(672) 0x431f24 ADD X14, X14, #1 |
(672) 0x431f28 LDR X12, [X9, X12,LSL #3] |
(672) 0x431f2c STR X12, [X25, X10,LSL #3] |
(672) 0x431f30 ADD X10, X10, #1 |
(672) 0x431f34 LDR X12, [SP, #560] |
(672) 0x431f38 ADD X12, X12, #1 |
(672) 0x431f3c LDR X13, [X8, X12,LSL #3] |
(672) 0x431f40 CMP X14, X13 |
(672) 0x431f44 B.LT 431f20 |
(671) 0x431f48 LDUR X13, [X29, #328] |
(671) 0x431f4c B 431f00 |
0x431f50 HINT #0 |
0x431f54 HINT #0 |
0x431f58 HINT #0 |
0x431f5c HINT #0 |
(670) 0x431f60 LDR X8, [SP, #528] |
(670) 0x431f64 CMP X8, #1 |
(670) 0x431f68 B.LE 431f84 |
(670) 0x431f6c LDR X3, [SP, #576] |
(670) 0x431f70 LDR X1, [SP, #368] |
(670) 0x431f74 MOVZ W0, #11 |
(670) 0x431f78 ORR X2, XZR, X25 |
(670) 0x431f7c BL 481820 |
(670) 0x431f80 BL 481c20 |
(670) 0x431f84 LDR X8, [SP, #552] |
(670) 0x431f88 CBZ X8, 431f98 |
(670) 0x431f8c LDR X8, [SP, #648] |
(670) 0x431f90 CMP X8, #10 |
(670) 0x431f94 B.LT 431dc0 |
0x431f98 ORR X0, XZR, X25 |
0x431f9c BL 4a91d0 |
0x431fa0 LDR X22, [SP, #648] |
0x431fa4 MOVZ W1, #8 |
0x431fa8 STR X22, [SP, #640] |
0x431fac ORR X0, XZR, X22 |
0x431fb0 BL 4a90d0 |
0x431fb4 MOVZ W1, #8 |
0x431fb8 STR X0, [SP, #728] |
0x431fbc ORR X0, XZR, X20 |
0x431fc0 BL 4a90d0 |
0x431fc4 LDR X8, [SP, #728] |
0x431fc8 MOVZ W1, #8 |
0x431fcc STR X0, [X8, #8] |
0x431fd0 LDR X0, [SP, #632] |
0x431fd4 BL 4a90d0 |
0x431fd8 STR X0, [SP, #744] |
0x431fdc LDR X0, [SP, #632] |
0x431fe0 MOVZ W1, #8 |
0x431fe4 BL 4a90d0 |
0x431fe8 LDR X8, [SP, #528] |
0x431fec STR X0, [SP, #736] |
0x431ff0 CMP X8, #2 |
0x431ff4 B.LT 432024 |
0x431ff8 MOVZ W1, #8 |
0x431ffc ORR X0, XZR, X22 |
0x432000 BL 4a90d0 |
0x432004 STR X0, [SP, #720] |
0x432008 CBZ X19, 433d94 |
0x43200c MOVZ W1, #8 |
0x432010 ORR X0, XZR, X19 |
0x432014 BL 4a90d0 |
0x432018 ORR X8, XZR, X0 |
0x43201c LDR X0, [SP, #720] |
0x432020 B 433d98 |
0x432024 ORR X20, XZR, XZR |
0x432028 LDR X8, [SP, #752] |
0x43202c LDP X1, X9, [X8, #8] |
0x432030 STR X1, [SP, #560] |
0x432034 CMP X1, X9 |
0x432038 B.LT 433de4 |
(629) 0x43203c ORR X10, XZR, XZR |
(629) 0x432040 ORR X9, XZR, XZR |
(629) 0x432044 LDR X8, [SP, #656] |
(629) 0x432048 STR X21, [SP, #296] |
(629) 0x43204c ADD X8, X8, X10 |
(629) 0x432050 STR X8, [SP, #656] |
(629) 0x432054 LDR X8, [SP, #512] |
(629) 0x432058 ADD X8, X8, X9 |
(629) 0x43205c STR X8, [SP, #512] |
(629) 0x432060 LDR X8, [SP, #528] |
(629) 0x432064 CMP X8, #2 |
(629) 0x432068 B.LT 432974 |
(629) 0x43206c MOVZ W0, #1 |
(629) 0x432070 MOVZ W1, #112 |
(629) 0x432074 BL 4a90d0 |
(629) 0x432078 MOVZ W1, #8 |
(629) 0x43207c STR X0, [SP, #384] |
(629) 0x432080 ORR X0, XZR, X22 |
(629) 0x432084 BL 4a90d0 |
(629) 0x432088 MOVZ W1, #8 |
(629) 0x43208c ORR X19, XZR, X0 |
(629) 0x432090 ORR X0, XZR, X22 |
(629) 0x432094 BL 4a90d0 |
(629) 0x432098 MOVZ W1, #8 |
(629) 0x43209c STR X0, [SP, #400] |
(629) 0x4320a0 ORR X0, XZR, X22 |
(629) 0x4320a4 BL 4a90d0 |
(629) 0x4320a8 LDUR X8, [X29, #384] |
(629) 0x4320ac STR X0, [SP, #712] |
(629) 0x4320b0 MOVZ W1, #8 |
(629) 0x4320b4 ADD X0, X8, #1 |
(629) 0x4320b8 BL 4a90d0 |
(629) 0x4320bc STR X0, [SP, #696] |
(629) 0x4320c0 LDUR X0, [X29, #384] |
(629) 0x4320c4 CBZ X0, 4320d4 |
(629) 0x4320c8 MOVZ W1, #8 |
(629) 0x4320cc BL 4a90d0 |
(629) 0x4320d0 STUR X0, [X29, #304] |
(629) 0x4320d4 LDP X8, X9, [X29, #832] |
(629) 0x4320d8 LDR X0, [X8, X9,LSL #3] |
(629) 0x4320dc CBZ X0, 4320ec |
(629) 0x4320e0 MOVZ W1, #8 |
(629) 0x4320e4 BL 4a90d0 |
(629) 0x4320e8 STUR X0, [X29, #296] |
(629) 0x4320ec ADRP X0, |
(629) 0x4320f0 ADD X0, X0, #408 |
(629) 0x4320f4 ADRP X2, 4340f4 |
(629) 0x4320f8 ADD X2, X2, #704 |
(629) 0x4320fc SUB X3, X29, #128 |
(629) 0x432100 ADD X4, SP, #696 |
(629) 0x432104 MOVZ W1, #2 |
(629) 0x432108 BL 40f990 |
(629) 0x43210c ADRP X0, |
(629) 0x432110 ADD X0, X0, #480 |
(629) 0x432114 ADRP X2, 434114 |
(629) 0x432118 ADD X2, X2, #896 |
(629) 0x43211c SUB X3, X29, #192 |
(629) 0x432120 SUB X4, X29, #184 |
(629) 0x432124 SUB X5, X29, #216 |
(629) 0x432128 MOVZ W1, #3 |
(629) 0x43212c BL 40f990 |
(629) 0x432130 MOVZ W8, #2 |
(629) 0x432134 STR X20, [SP, #432] |
(629) 0x432138 STR X19, [SP, #392] |
(629) 0x43213c STR X8, [SP, #648] |
(629) 0x432140 CMP X22, #2 |
(629) 0x432144 B.GT 43298c |
(629) 0x432148 ORR X19, XZR, XZR |
(629) 0x43214c STR XZR, [SP, #424] |
(629) 0x432150 LDR X0, [SP, #424] |
(629) 0x432154 BL 4a91d0 |
(629) 0x432158 LDUR X0, [X29, #296] |
(629) 0x43215c BL 4a91d0 |
(629) 0x432160 STUR XZR, [X29, #296] |
(629) 0x432164 ORR X0, XZR, X19 |
(629) 0x432168 BL 4a91d0 |
(629) 0x43216c LDR X0, [SP, #296] |
(629) 0x432170 BL 4a91d0 |
(629) 0x432174 LDR X0, [SP, #448] |
(629) 0x432178 BL 4a91d0 |
(629) 0x43217c LDR X0, [SP, #440] |
(629) 0x432180 STR XZR, [SP, #448] |
(629) 0x432184 BL 4a91d0 |
(629) 0x432188 LDR X0, [SP, #456] |
(629) 0x43218c STR XZR, [SP, #440] |
(629) 0x432190 BL 4a91d0 |
(629) 0x432194 LDR X0, [SP, #656] |
(629) 0x432198 MOVZ W1, #8 |
(629) 0x43219c STR XZR, [SP, #456] |
(629) 0x4321a0 BL 4a90d0 |
(629) 0x4321a4 STUR X0, [X29, #360] |
(629) 0x4321a8 LDR X0, [SP, #656] |
(629) 0x4321ac MOVZ W1, #8 |
(629) 0x4321b0 BL 4a90d0 |
(629) 0x4321b4 STUR X0, [X29, #376] |
(629) 0x4321b8 LDR X0, [SP, #512] |
(629) 0x4321bc CBZ X0, 4321dc |
(629) 0x4321c0 MOVZ W1, #8 |
(629) 0x4321c4 BL 4a90d0 |
(629) 0x4321c8 STUR X0, [X29, #336] |
(629) 0x4321cc LDR X0, [SP, #512] |
(629) 0x4321d0 MOVZ W1, #8 |
(629) 0x4321d4 BL 4a90d0 |
(629) 0x4321d8 STUR X0, [X29, #352] |
(629) 0x4321dc LDR X25, [X29, #96] |
(629) 0x4321e0 LDR X8, [SP, #632] |
(629) 0x4321e4 STR XZR, [SP, #560] |
(629) 0x4321e8 CMP X8, #1 |
(629) 0x4321ec B.LT 43223c |
(629) 0x4321f0 LDUR X8, [X29, #368] |
(629) 0x4321f4 LDUR X9, [X29, #344] |
(629) 0x4321f8 ORR X10, XZR, XZR |
(629) 0x4321fc HINT #0 |
(655) 0x432200 ADD X10, X8, X10,LSL #3 |
(655) 0x432204 LDP X11, X12, [X10] |
(655) 0x432208 ADD X11, X12, X11 |
(655) 0x43220c STR X11, [X10, #8] |
(655) 0x432210 LDR X10, [SP, #560] |
(655) 0x432214 ADD X10, X9, X10,LSL #3 |
(655) 0x432218 LDP X11, X12, [X10] |
(655) 0x43221c ADD X11, X12, X11 |
(655) 0x432220 STR X11, [X10, #8] |
(655) 0x432224 LDR X10, [SP, #560] |
(655) 0x432228 LDR X11, [SP, #632] |
(655) 0x43222c ADD X10, X10, #1 |
(655) 0x432230 STR X10, [SP, #560] |
(655) 0x432234 CMP X10, X11 |
(655) 0x432238 B.LT 432200 |
(629) 0x43223c SUB X21, X29, #136 |
(629) 0x432240 ADRP X0, |
(629) 0x432244 ADD X0, X0, #744 |
(629) 0x432248 ADRP X2, 435248 |
(629) 0x43224c ADD X2, X2, #16 |
(629) 0x432250 ADD X3, SP, #624 |
(629) 0x432254 STR X21, [SP] |
(629) 0x432258 SUB X4, X29, #248 |
(629) 0x43225c SUB X5, X29, #152 |
(629) 0x432260 SUB X6, X29, #144 |
(629) 0x432264 ADD X7, SP, #592 |
(629) 0x432268 MOVZ W1, #6 |
(629) 0x43226c SUB X20, X29, #248 |
(629) 0x432270 SUB X22, X29, #152 |
(629) 0x432274 SUB X19, X29, #144 |
(629) 0x432278 ADD X24, SP, #592 |
(629) 0x43227c BL 40f990 |
(629) 0x432280 LDR X8, [SP, #752] |
(629) 0x432284 SUB X10, X29, #160 |
(629) 0x432288 LDP X8, X9, [X8, #8] |
(629) 0x43228c SUB X8, X9, X8 |
(629) 0x432290 SUB X9, X29, #176 |
(629) 0x432294 STR X8, [SP, #464] |
(629) 0x432298 ADD X8, SP, #688 |
(629) 0x43229c CBZ X25, 43322c |
(629) 0x4322a0 STP X9, X8, [SP, #200] |
(629) 0x4322a4 SUB X8, X29, #72 |
(629) 0x4322a8 SUB X11, X29, #232 |
(629) 0x4322ac SUB X9, X29, #88 |
(629) 0x4322b0 ADRP X0, |
(629) 0x4322b4 ADD X0, X0, #768 |
(629) 0x4322b8 ADRP X2, 4352b8 |
(629) 0x4322bc ADD X2, X2, #400 |
(629) 0x4322c0 STP X21, X22, [SP, #80] |
(629) 0x4322c4 STP X8, X10, [SP, #184] |
(629) 0x4322c8 SUB X8, X29, #224 |
(629) 0x4322cc STR X9, [SP, #160] |
(629) 0x4322d0 ADD X9, X29, #104 |
(629) 0x4322d4 ADD X10, SP, #728 |
(629) 0x4322d8 ADD X3, SP, #632 |
(629) 0x4322dc SUB X4, X29, #128 |
(629) 0x4322e0 ADD X5, SP, #752 |
(629) 0x4322e4 STP X8, X11, [SP, #168] |
(629) 0x4322e8 ADD X8, SP, #680 |
(629) 0x4322ec ADD X6, SP, #464 |
(629) 0x4322f0 ADD X7, SP, #760 |
(629) 0x4322f4 MOVZ W1, #32 |
(629) 0x4322f8 STP X10, X20, [SP, #16] |
(629) 0x4322fc STP X9, X8, [SP, #144] |
(629) 0x432300 SUB X8, X29, #80 |
(629) 0x432304 SUB X9, X29, #256 |
(629) 0x432308 STP X9, X8, [SP, #128] |
(629) 0x43230c ADD X8, SP, #720 |
(629) 0x432310 SUB X9, X29, #168 |
(629) 0x432314 STP X9, X8, [SP, #112] |
(629) 0x432318 ADD X8, SP, #736 |
(629) 0x43231c SUB X9, X29, #40 |
(629) 0x432320 STP X24, X8, [SP, #96] |
(629) 0x432324 SUB X8, X29, #48 |
(629) 0x432328 STP X9, X8, [SP, #64] |
(629) 0x43232c SUB X8, X29, #32 |
(629) 0x432330 SUB X9, X29, #8 |
(629) 0x432334 STP X9, X8, [SP, #48] |
(629) 0x432338 SUB X8, X29, #64 |
(629) 0x43233c SUB X9, X29, #56 |
(629) 0x432340 STP X9, X8, [SP, #32] |
(629) 0x432344 ADD X8, SP, #744 |
(629) 0x432348 STP X8, X19, [SP] |
(629) 0x43234c BL 40f990 |
(629) 0x432350 LDR X8, [SP, #624] |
(629) 0x432354 CBZ X8, 432364 |
(629) 0x432358 LDUR X0, [X29, #264] |
(629) 0x43235c BL 4a91d0 |
(629) 0x432360 STUR XZR, [X29, #264] |
(629) 0x432364 LDUR X0, [X29, #256] |
(629) 0x432368 BL 4a91d0 |
(629) 0x43236c LDR X8, [SP, #728] |
(629) 0x432370 STUR XZR, [X29, #256] |
(629) 0x432374 LDR X0, [X8, #8] |
(629) 0x432378 BL 4a91d0 |
(629) 0x43237c LDR X8, [SP, #728] |
(629) 0x432380 LDR X19, [SP, #392] |
(629) 0x432384 STR XZR, [X8, #8] |
(629) 0x432388 LDR X8, [SP, #528] |
(629) 0x43238c CMP X8, #2 |
(629) 0x432390 B.LT 4323a8 |
(629) 0x432394 LDR X8, [SP, #720] |
(629) 0x432398 LDR X0, [X8, #8] |
(629) 0x43239c BL 4a91d0 |
(629) 0x4323a0 LDR X8, [SP, #720] |
(629) 0x4323a4 STR XZR, [X8, #8] |
(629) 0x4323a8 MOVZ W8, #2 |
(629) 0x4323ac STR X8, [SP, #648] |
(629) 0x4323b0 LDR X8, [SP, #640] |
(629) 0x4323b4 CMP X8, #2 |
(629) 0x4323b8 B.LE 4338f4 |
(629) 0x4323bc MOVZ W8, #2 |
(629) 0x4323c0 SUB X21, X29, #232 |
(629) 0x4323c4 ADRP X20, 4353c4 |
(629) 0x4323c8 ADD X20, X20, #2432 |
(629) 0x4323cc ORR X26, XZR, XZR |
(629) 0x4323d0 ORR X27, XZR, XZR |
(629) 0x4323d4 ORR X24, XZR, XZR |
(629) 0x4323d8 B 4323f4 |
0x4323dc HINT #0 |
(646) 0x4323e0 LDR X9, [SP, #640] |
(646) 0x4323e4 ADD X8, X8, #1 |
(646) 0x4323e8 STR X8, [SP, #648] |
(646) 0x4323ec CMP X8, X9 |
(646) 0x4323f0 B.GE 4338f8 |
(646) 0x4323f4 LDR X9, [SP, #528] |
(646) 0x4323f8 CMP X9, #2 |
(646) 0x4323fc B.LT 4327bc |
(646) 0x432400 LDR X10, [X19, X8,LSL #3] |
(646) 0x432404 LDUR X9, [X29, #328] |
(646) 0x432408 LDR X10, [X10, X9,LSL #3] |
(646) 0x43240c STR X10, [SP, #504] |
(646) 0x432410 CMP X10, X27 |
(646) 0x432414 B.LE 43244c |
(646) 0x432418 ORR X0, XZR, X24 |
(646) 0x43241c BL 4a91d0 |
(646) 0x432420 LDR X0, [SP, #504] |
(646) 0x432424 MOVZ W1, #8 |
(646) 0x432428 BL 4a90d0 |
(646) 0x43242c LDR X27, [SP, #504] |
(646) 0x432430 LDUR X9, [X29, #328] |
(646) 0x432434 LDR X8, [SP, #648] |
(646) 0x432438 ORR X24, XZR, X0 |
(646) 0x43243c STR XZR, [SP, #560] |
(646) 0x432440 CMP X9, #1 |
(646) 0x432444 B.GE 43245c |
(646) 0x432448 B 432720 |
(646) 0x43244c ORR X27, XZR, X10 |
(646) 0x432450 STR XZR, [SP, #560] |
(646) 0x432454 CMP X9, #1 |
(646) 0x432458 B.LT 432720 |
(646) 0x43245c LDP X12, X11, [X29, #824] |
(646) 0x432460 LDR X13, [SP, #584] |
(646) 0x432464 ORR X5, XZR, XZR |
(646) 0x432468 ORR X10, XZR, XZR |
(646) 0x43246c SUB X14, X8, #1 |
(646) 0x432470 ADD X15, X24, #16 |
(646) 0x432474 B 43248c |
0x432478 HINT #0 |
0x43247c HINT #0 |
(647) 0x432480 STR X10, [SP, #560] |
(647) 0x432484 CMP X10, X9 |
(647) 0x432488 B.EQ 432720 |
(647) 0x43248c LDR X16, [X11, X10,LSL #3] |
(647) 0x432490 ADD X10, X10, #1 |
(647) 0x432494 LDR X17, [X11, X10,LSL #3] |
(647) 0x432498 CMP X16, X17 |
(647) 0x43249c B.GE 432480 |
(647) 0x4324a0 LDP X18, X0, [X29, #880] |
(647) 0x4324a4 LDP X1, X2, [X29, #856] |
(647) 0x4324a8 ADD X3, X0, #16 |
(647) 0x4324ac ADD X4, X2, #16 |
(647) 0x4324b0 B 4324cc |
0x4324b4 HINT #0 |
0x4324b8 HINT #0 |
0x4324bc HINT #0 |
(648) 0x4324c0 ADD X16, X16, #1 |
(648) 0x4324c4 CMP X16, X17 |
(648) 0x4324c8 B.EQ 432480 |
(648) 0x4324cc LDR X6, [X12, X16,LSL #3] |
(648) 0x4324d0 LDR X7, [X13, X6,LSL #3] |
(648) 0x4324d4 CMP X7, X14 |
(648) 0x4324d8 B.NE 4324c0 |
(648) 0x4324dc ADD X7, X6, #1 |
(648) 0x4324e0 LDR X28, [X18, X6,LSL #3] |
(648) 0x4324e4 LDR X21, [X18, X7,LSL #3] |
(648) 0x4324e8 SUBS X30, X21, X28 |
(648) 0x4324ec B.LE 4325f4 |
(648) 0x4324f0 CMP X30, #4 |
(648) 0x4324f4 B.CC 43254c |
(648) 0x4324f8 ADD X19, X24, X5,LSL #3 |
(648) 0x4324fc ADD X22, X0, X28,LSL #3 |
(648) 0x432500 SUB X19, X19, X22 |
(648) 0x432504 CMP X19, #32 |
(648) 0x432508 B.CC 43254c |
(648) 0x43250c UBFM X23, X5, #61, #60 |
(648) 0x432510 UBFM X22, X28, #61, #60 |
(648) 0x432514 AND X19, X30, #8062 |
(648) 0x432518 ADD X5, X5, X19 |
(648) 0x43251c ADD X28, X28, X19 |
(648) 0x432520 ADD X22, X3, X22 |
(648) 0x432524 ADD X25, X15, X23 |
(648) 0x432528 ORR X23, XZR, X19 |
(654) 0x43252c LDP Q0, Q1, [X22, #2032] |
(654) 0x432530 ADD X22, X22, #32 |
(654) 0x432534 SUBS X23, X23, #4 |
(654) 0x432538 STP Q0, Q1, [X25, #2032] |
(654) 0x43253c ADD X25, X25, #32 |
(654) 0x432540 B.NE 43252c |
(648) 0x432544 CMP X30, X19 |
(648) 0x432548 B.EQ 4325f4 |
(648) 0x43254c SUB W19, W21, W28 |
(648) 0x432550 ANDS X22, X19, #4160 |
(648) 0x432554 B.EQ 432590 |
(648) 0x432558 ORR X30, XZR, X28 |
(648) 0x43255c HINT #0 |
(653) 0x432560 LDR D0, [X0, X30,LSL #3] |
(653) 0x432564 ADD X23, X5, #1 |
(653) 0x432568 ADD X30, X30, #1 |
(653) 0x43256c SUBS X22, X22, #1 |
(653) 0x432570 STR D0, [X24, X5,LSL #3] |
(653) 0x432574 ORR X5, XZR, X23 |
(653) 0x432578 B.NE 432560 |
(648) 0x43257c SUB X19, X28, X21 |
(648) 0x432580 ORR X5, XZR, X23 |
(648) 0x432584 CMN X19, #4 |
(648) 0x432588 B.LS 4325a4 |
(648) 0x43258c B 4325f4 |
(648) 0x432590 ORR X23, XZR, X5 |
(648) 0x432594 ORR X30, XZR, X28 |
(648) 0x432598 SUB X19, X28, X21 |
(648) 0x43259c CMN X19, #4 |
(648) 0x4325a0 B.HI 4325f4 |
(648) 0x4325a4 SUB X21, X21, X30 |
(648) 0x4325a8 ADD X28, X3, X30,LSL #3 |
(648) 0x4325ac ADD X30, X15, X23,LSL #3 |
(648) 0x4325b0 ORR X5, XZR, X23 |
(648) 0x4325b4 HINT #0 |
(648) 0x4325b8 HINT #0 |
(648) 0x4325bc HINT #0 |
(652) 0x4325c0 LDUR D0, [X28, #496] |
(652) 0x4325c4 ADD X5, X5, #4 |
(652) 0x4325c8 SUBS X21, X21, #4 |
(652) 0x4325cc STUR D0, [X30, #496] |
(652) 0x4325d0 LDUR D0, [X28, #504] |
(652) 0x4325d4 STUR D0, [X30, #504] |
(652) 0x4325d8 LDR D0, [X28] |
(652) 0x4325dc STR D0, [X30] |
(652) 0x4325e0 LDR D0, [X28, #8] |
(652) 0x4325e4 ADD X28, X28, #32 |
(652) 0x4325e8 STR D0, [X30, #8] |
(652) 0x4325ec ADD X30, X30, #32 |
(652) 0x4325f0 B.NE 4325c0 |
(648) 0x4325f4 LDR X21, [X1, X6,LSL #3] |
(648) 0x4325f8 LDR X6, [X1, X7,LSL #3] |
(648) 0x4325fc SUBS X7, X6, X21 |
(648) 0x432600 B.LE 4324c0 |
(648) 0x432604 CMP X7, #4 |
(648) 0x432608 B.CC 432660 |
(648) 0x43260c ADD X19, X24, X5,LSL #3 |
(648) 0x432610 ADD X22, X2, X21,LSL #3 |
(648) 0x432614 SUB X19, X19, X22 |
(648) 0x432618 CMP X19, #32 |
(648) 0x43261c B.CC 432660 |
(648) 0x432620 UBFM X19, X5, #61, #60 |
(648) 0x432624 UBFM X22, X21, #61, #60 |
(648) 0x432628 AND X23, X7, #8062 |
(648) 0x43262c ADD X5, X5, X23 |
(648) 0x432630 ADD X21, X21, X23 |
(648) 0x432634 ADD X22, X4, X22 |
(648) 0x432638 ADD X25, X15, X19 |
(648) 0x43263c ORR X19, XZR, X23 |
(651) 0x432640 LDP Q0, Q1, [X22, #2032] |
(651) 0x432644 ADD X22, X22, #32 |
(651) 0x432648 SUBS X19, X19, #4 |
(651) 0x43264c STP Q0, Q1, [X25, #2032] |
(651) 0x432650 ADD X25, X25, #32 |
(651) 0x432654 B.NE 432640 |
(648) 0x432658 CMP X7, X23 |
(648) 0x43265c B.EQ 4324c0 |
(648) 0x432660 SUB W7, W6, W21 |
(648) 0x432664 ANDS X22, X7, #4160 |
(648) 0x432668 B.EQ 4326b0 |
(648) 0x43266c ORR X23, XZR, X21 |
(648) 0x432670 HINT #0 |
(648) 0x432674 HINT #0 |
(648) 0x432678 HINT #0 |
(648) 0x43267c HINT #0 |
(650) 0x432680 LDR D0, [X2, X23,LSL #3] |
(650) 0x432684 ADD X7, X5, #1 |
(650) 0x432688 ADD X23, X23, #1 |
(650) 0x43268c SUBS X22, X22, #1 |
(650) 0x432690 STR D0, [X24, X5,LSL #3] |
(650) 0x432694 ORR X5, XZR, X7 |
(650) 0x432698 B.NE 432680 |
(648) 0x43269c SUB X19, X21, X6 |
(648) 0x4326a0 ORR X5, XZR, X7 |
(648) 0x4326a4 CMN X19, #4 |
(648) 0x4326a8 B.HI 4324c0 |
(648) 0x4326ac B 4326c4 |
(648) 0x4326b0 ORR X7, XZR, X5 |
(648) 0x4326b4 ORR X23, XZR, X21 |
(648) 0x4326b8 SUB X19, X21, X6 |
(648) 0x4326bc CMN X19, #4 |
(648) 0x4326c0 B.HI 4324c0 |
(648) 0x4326c4 SUB X6, X6, X23 |
(648) 0x4326c8 ADD X21, X4, X23,LSL #3 |
(648) 0x4326cc ADD X23, X15, X7,LSL #3 |
(648) 0x4326d0 ORR X5, XZR, X7 |
(648) 0x4326d4 HINT #0 |
(648) 0x4326d8 HINT #0 |
(648) 0x4326dc HINT #0 |
(649) 0x4326e0 LDUR D0, [X21, #496] |
(649) 0x4326e4 ADD X5, X5, #4 |
(649) 0x4326e8 SUBS X6, X6, #4 |
(649) 0x4326ec STUR D0, [X23, #496] |
(649) 0x4326f0 LDUR D0, [X21, #504] |
(649) 0x4326f4 STUR D0, [X23, #504] |
(649) 0x4326f8 LDR D0, [X21] |
(649) 0x4326fc STR D0, [X23] |
(649) 0x432700 LDR D0, [X21, #8] |
(649) 0x432704 ADD X21, X21, #32 |
(649) 0x432708 STR D0, [X23, #8] |
(649) 0x43270c ADD X23, X23, #32 |
(649) 0x432710 B.NE 4326e0 |
(648) 0x432714 B 4324c0 |
0x432718 HINT #0 |
0x43271c HINT #0 |
(646) 0x432720 LDR X10, [SP, #384] |
(646) 0x432724 LDR X3, [SP, #568] |
(646) 0x432728 STR X9, [X10, #8] |
(646) 0x43272c LDP X9, X11, [SP, #392] |
(646) 0x432730 LDR X9, [X9, X8,LSL #3] |
(646) 0x432734 STR X9, [X10, #24] |
(646) 0x432738 LDR X9, [SP, #408] |
(646) 0x43273c LDR X8, [X11, X8,LSL #3] |
(646) 0x432740 STR X9, [X10, #40] |
(646) 0x432744 LDR X21, [X8, X9,LSL #3] |
(646) 0x432748 STR X8, [X10, #56] |
(646) 0x43274c CMP X21, X26 |
(646) 0x432750 B.LE 432774 |
(646) 0x432754 ORR X0, XZR, X3 |
(646) 0x432758 BL 4a91d0 |
(646) 0x43275c MOVZ W1, #8 |
(646) 0x432760 STR XZR, [SP, #568] |
(646) 0x432764 ORR X0, XZR, X21 |
(646) 0x432768 BL 4a90d0 |
(646) 0x43276c ORR X3, XZR, X0 |
(646) 0x432770 STR X0, [SP, #568] |
(646) 0x432774 LDR X1, [SP, #384] |
(646) 0x432778 MOVZ W0, #1 |
(646) 0x43277c ORR X2, XZR, X24 |
(646) 0x432780 BL 481820 |
(646) 0x432784 BL 481c20 |
(646) 0x432788 LDR X8, [SP, #648] |
(646) 0x43278c LDR X19, [SP, #392] |
(646) 0x432790 LDR X0, [X19, X8,LSL #3] |
(646) 0x432794 BL 4a91d0 |
(646) 0x432798 LDR X8, [SP, #648] |
(646) 0x43279c LDR X22, [SP, #400] |
(646) 0x4327a0 STR XZR, [X19, X8,LSL #3] |
(646) 0x4327a4 LDR X0, [X22, X8,LSL #3] |
(646) 0x4327a8 BL 4a91d0 |
(646) 0x4327ac LDR X8, [SP, #648] |
(646) 0x4327b0 ORR X26, XZR, X21 |
(646) 0x4327b4 SUB X21, X29, #232 |
(646) 0x4327b8 STR XZR, [X22, X8,LSL #3] |
(646) 0x4327bc LDR X9, [SP, #752] |
(646) 0x4327c0 ADD X3, SP, #632 |
(646) 0x4327c4 SUB X4, X29, #128 |
(646) 0x4327c8 ADD X5, SP, #624 |
(646) 0x4327cc ADD X6, SP, #480 |
(646) 0x4327d0 ADD X7, SP, #616 |
(646) 0x4327d4 ADRP X0, |
(646) 0x4327d8 ADD X0, X0, #792 |
(646) 0x4327dc ORR X2, XZR, X20 |
(646) 0x4327e0 MOVZ W1, #42 |
(646) 0x4327e4 ADD X8, X9, X8,LSL #3 |
(646) 0x4327e8 LDP X8, X9, [X8] |
(646) 0x4327ec SUB X8, X9, X8 |
(646) 0x4327f0 STR X8, [SP, #464] |
(646) 0x4327f4 SUB X8, X29, #224 |
(646) 0x4327f8 STP X8, X21, [SP, #280] |
(646) 0x4327fc ADD X8, SP, #568 |
(646) 0x432800 STR X8, [SP, #272] |
(646) 0x432804 SUB X8, X29, #72 |
(646) 0x432808 STR X8, [SP, #264] |
(646) 0x43280c ADD X8, SP, #712 |
(646) 0x432810 STR X8, [SP, #256] |
(646) 0x432814 ADD X8, SP, #696 |
(646) 0x432818 STR X8, [SP, #248] |
(646) 0x43281c SUB X8, X29, #208 |
(646) 0x432820 STR X8, [SP, #240] |
(646) 0x432824 SUB X8, X29, #88 |
(646) 0x432828 STR X8, [SP, #232] |
(646) 0x43282c ADD X8, SP, #680 |
(646) 0x432830 STR X8, [SP, #224] |
(646) 0x432834 ADD X8, X29, #104 |
(646) 0x432838 STR X8, [SP, #216] |
(646) 0x43283c SUB X8, X29, #80 |
(646) 0x432840 STR X8, [SP, #208] |
(646) 0x432844 SUB X8, X29, #40 |
(646) 0x432848 STR X8, [SP, #200] |
(646) 0x43284c SUB X8, X29, #32 |
(646) 0x432850 STR X8, [SP, #192] |
(646) 0x432854 SUB X8, X29, #8 |
(646) 0x432858 STR X8, [SP, #184] |
(646) 0x43285c SUB X8, X29, #48 |
(646) 0x432860 STR X8, [SP, #176] |
(646) 0x432864 SUB X8, X29, #64 |
(646) 0x432868 STR X8, [SP, #168] |
(646) 0x43286c SUB X8, X29, #56 |
(646) 0x432870 STR X8, [SP, #160] |
(646) 0x432874 ADD X8, SP, #576 |
(646) 0x432878 STR X8, [SP, #152] |
(646) 0x43287c SUB X8, X29, #120 |
(646) 0x432880 STR X8, [SP, #144] |
(646) 0x432884 SUB X8, X29, #112 |
(646) 0x432888 STR X8, [SP, #136] |
(646) 0x43288c ADD X8, SP, #584 |
(646) 0x432890 STR X8, [SP, #128] |
(646) 0x432894 SUB X8, X29, #104 |
(646) 0x432898 STR X8, [SP, #120] |
(646) 0x43289c SUB X8, X29, #96 |
(646) 0x4328a0 STR X8, [SP, #112] |
(646) 0x4328a4 SUB X8, X29, #176 |
(646) 0x4328a8 STR X8, [SP, #104] |
(646) 0x4328ac SUB X8, X29, #160 |
(646) 0x4328b0 STR X8, [SP, #96] |
(646) 0x4328b4 ADD X8, SP, #720 |
(646) 0x4328b8 STR X8, [SP, #88] |
(646) 0x4328bc SUB X8, X29, #168 |
(646) 0x4328c0 STR X8, [SP, #80] |
(646) 0x4328c4 ADD X8, SP, #736 |
(646) 0x4328c8 STR X8, [SP, #72] |
(646) 0x4328cc SUB X8, X29, #152 |
(646) 0x4328d0 STR X8, [SP, #64] |
(646) 0x4328d4 SUB X8, X29, #136 |
(646) 0x4328d8 STR X8, [SP, #56] |
(646) 0x4328dc ADD X8, SP, #728 |
(646) 0x4328e0 STR X8, [SP, #48] |
(646) 0x4328e4 SUB X8, X29, #144 |
(646) 0x4328e8 STR X8, [SP, #40] |
(646) 0x4328ec ADD X8, SP, #744 |
(646) 0x4328f0 STR X8, [SP, #32] |
(646) 0x4328f4 ADD X8, SP, #760 |
(646) 0x4328f8 STR X8, [SP, #24] |
(646) 0x4328fc ADD X8, SP, #464 |
(646) 0x432900 STR X8, [SP, #16] |
(646) 0x432904 ADD X8, SP, #648 |
(646) 0x432908 STR X8, [SP, #8] |
(646) 0x43290c ADD X8, SP, #752 |
(646) 0x432910 STR X8, [SP] |
(646) 0x432914 BL 40f990 |
(646) 0x432918 LDR X8, [SP, #728] |
(646) 0x43291c LDR X9, [SP, #648] |
(646) 0x432920 LDR X0, [X8, X9,LSL #3] |
(646) 0x432924 BL 4a91d0 |
(646) 0x432928 LDR X9, [SP, #728] |
(646) 0x43292c LDR X8, [SP, #648] |
(646) 0x432930 STR XZR, [X9, X8,LSL #3] |
(646) 0x432934 LDR X9, [SP, #528] |
(646) 0x432938 CMP X9, #2 |
(646) 0x43293c B.LT 4323e0 |
(646) 0x432940 LDR X9, [SP, #720] |
(646) 0x432944 LDR X0, [X9, X8,LSL #3] |
(646) 0x432948 BL 4a91d0 |
(646) 0x43294c LDR X8, [SP, #720] |
(646) 0x432950 LDR X9, [SP, #648] |
(646) 0x432954 STR XZR, [X8, X9,LSL #3] |
(646) 0x432958 LDR X8, [SP, #712] |
(646) 0x43295c LDR X0, [X8, X9,LSL #3] |
(646) 0x432960 BL 4a91d0 |
(646) 0x432964 LDR X9, [SP, #712] |
(646) 0x432968 LDR X8, [SP, #648] |
(646) 0x43296c STR XZR, [X9, X8,LSL #3] |
(646) 0x432970 B 4323e0 |
(629) 0x432974 MOVZ W8, #2 |
(629) 0x432978 STR X20, [SP, #432] |
(629) 0x43297c STP XZR, XZR, [SP, #392] |
(629) 0x432980 STR X8, [SP, #648] |
(629) 0x432984 CMP X22, #2 |
(629) 0x432988 B.LE 432148 |
(629) 0x43298c LDR X22, [SP, #416] |
(629) 0x432990 SUB X23, X20, #8 |
(629) 0x432994 SUB X28, X29, #168 |
(629) 0x432998 ADRP X26, |
(629) 0x43299c ADD X26, X26, #576 |
(629) 0x4329a0 ADRP X21, 4349a0 |
(629) 0x4329a4 ADD X21, X21, #1136 |
(629) 0x4329a8 STP XZR, XZR, [SP, #352] |
(629) 0x4329ac STR XZR, [SP, #424] |
(629) 0x4329b0 ORR X19, XZR, XZR |
(629) 0x4329b4 STR X23, [SP, #344] |
(629) 0x4329b8 B 432adc |
0x4329bc HINT #0 |
(656) 0x4329c0 LDR X8, [SP, #752] |
(656) 0x4329c4 LDR X9, [SP, #648] |
(656) 0x4329c8 ADD X3, SP, #464 |
(656) 0x4329cc ADD X4, SP, #752 |
(656) 0x4329d0 ADD X5, SP, #648 |
(656) 0x4329d4 ADD X6, SP, #624 |
(656) 0x4329d8 ADD X7, SP, #480 |
(656) 0x4329dc ADRP X0, |
(656) 0x4329e0 ADD X0, X0, #672 |
(656) 0x4329e4 MOVZ W1, #29 |
(656) 0x4329e8 ADRP X2, 4349e8 |
(656) 0x4329ec ADD X2, X2, #1616 |
(656) 0x4329f0 ADD X8, X8, X9,LSL #3 |
(656) 0x4329f4 LDP X8, X9, [X8] |
(656) 0x4329f8 SUB X8, X9, X8 |
(656) 0x4329fc STR X8, [SP, #464] |
(656) 0x432a00 ADD X8, SP, #528 |
(656) 0x432a04 STR X8, [SP, #184] |
(656) 0x432a08 ADD X8, SP, #512 |
(656) 0x432a0c STR X8, [SP, #176] |
(656) 0x432a10 ADD X8, SP, #656 |
(656) 0x432a14 STR X8, [SP, #168] |
(656) 0x432a18 ADD X8, SP, #448 |
(656) 0x432a1c STR X8, [SP, #160] |
(656) 0x432a20 ADD X8, SP, #440 |
(656) 0x432a24 STR X8, [SP, #152] |
(656) 0x432a28 ADD X8, SP, #456 |
(656) 0x432a2c STR X8, [SP, #144] |
(656) 0x432a30 ADD X8, SP, #712 |
(656) 0x432a34 STR X8, [SP, #136] |
(656) 0x432a38 ADD X8, SP, #696 |
(656) 0x432a3c STR X8, [SP, #128] |
(656) 0x432a40 SUB X8, X29, #208 |
(656) 0x432a44 STR X8, [SP, #120] |
(656) 0x432a48 ADD X8, SP, #576 |
(656) 0x432a4c STR X8, [SP, #112] |
(656) 0x432a50 SUB X8, X29, #120 |
(656) 0x432a54 STR X8, [SP, #104] |
(656) 0x432a58 SUB X8, X29, #112 |
(656) 0x432a5c STR X8, [SP, #96] |
(656) 0x432a60 ADD X8, SP, #720 |
(656) 0x432a64 STP X28, X8, [SP, #80] |
(656) 0x432a68 ADD X8, SP, #728 |
(656) 0x432a6c STP X10, X8, [SP, #64] |
(656) 0x432a70 ADD X8, SP, #584 |
(656) 0x432a74 STR X8, [SP, #56] |
(656) 0x432a78 SUB X8, X29, #104 |
(656) 0x432a7c STR X8, [SP, #48] |
(656) 0x432a80 SUB X8, X29, #96 |
(656) 0x432a84 STR X8, [SP, #40] |
(656) 0x432a88 ADD X8, SP, #736 |
(656) 0x432a8c STR X8, [SP, #32] |
(656) 0x432a90 ADD X8, SP, #744 |
(656) 0x432a94 STR X8, [SP, #24] |
(656) 0x432a98 ADD X8, SP, #760 |
(656) 0x432a9c STR X8, [SP, #16] |
(656) 0x432aa0 ADD X8, SP, #616 |
(656) 0x432aa4 STR X8, [SP, #8] |
(656) 0x432aa8 ADD X8, SP, #488 |
(656) 0x432aac STR X8, [SP] |
(656) 0x432ab0 BL 40f990 |
(656) 0x432ab4 LDR X8, [SP, #648] |
(656) 0x432ab8 LDR X9, [SP, #640] |
(656) 0x432abc ADRP X26, |
(656) 0x432ac0 ADD X26, X26, #576 |
(656) 0x432ac4 ADRP X21, 434ac4 |
(656) 0x432ac8 ADD X21, X21, #1136 |
(656) 0x432acc ADD X8, X8, #1 |
(656) 0x432ad0 STR X8, [SP, #648] |
(656) 0x432ad4 CMP X8, X9 |
(656) 0x432ad8 B.GE 432150 |
(656) 0x432adc LDR X8, [SP, #528] |
(656) 0x432ae0 CMP X8, #1 |
(656) 0x432ae4 B.LE 432bf8 |
(656) 0x432ae8 LDUR X8, [X29, #328] |
(656) 0x432aec MOVZ W1, #8 |
(656) 0x432af0 ADD X0, X8, #1 |
(656) 0x432af4 BL 4a90d0 |
(656) 0x432af8 LDR X8, [SP, #648] |
(656) 0x432afc LDR X28, [SP, #392] |
(656) 0x432b00 MOVZ W1, #8 |
(656) 0x432b04 SUB X25, X29, #216 |
(656) 0x432b08 SUB X24, X29, #168 |
(656) 0x432b0c STR X0, [X28, X8,LSL #3] |
(656) 0x432b10 LDR X8, [SP, #408] |
(656) 0x432b14 ADD X0, X8, #1 |
(656) 0x432b18 BL 4a90d0 |
(656) 0x432b1c LDR X8, [SP, #648] |
(656) 0x432b20 LDR X9, [SP, #400] |
(656) 0x432b24 STR XZR, [SP, #504] |
(656) 0x432b28 STR X0, [X9, X8,LSL #3] |
(656) 0x432b2c LDR X8, [X28, X8,LSL #3] |
(656) 0x432b30 STR XZR, [X8] |
(656) 0x432b34 STR XZR, [SP, #560] |
(656) 0x432b38 LDUR X8, [X29, #328] |
(656) 0x432b3c CMP X8, #1 |
(656) 0x432b40 B.LT 432ba8 |
(669) 0x432b44 ADD X8, SP, #504 |
(669) 0x432b48 SUB X3, X29, #192 |
(669) 0x432b4c ADD X4, SP, #560 |
(669) 0x432b50 SUB X5, X29, #200 |
(669) 0x432b54 ADD X6, SP, #584 |
(669) 0x432b58 ADD X7, SP, #648 |
(669) 0x432b5c ORR X0, XZR, X26 |
(669) 0x432b60 ORR X2, XZR, X21 |
(669) 0x432b64 STP X24, X8, [SP, #16] |
(669) 0x432b68 SUB X8, X29, #144 |
(669) 0x432b6c MOVZ W1, #9 |
(669) 0x432b70 STP X25, X8, [SP] |
(669) 0x432b74 BL 40f990 |
(669) 0x432b78 LDR X9, [SP, #648] |
(669) 0x432b7c LDR X10, [SP, #560] |
(669) 0x432b80 LDR X8, [SP, #504] |
(669) 0x432b84 LDR X9, [X28, X9,LSL #3] |
(669) 0x432b88 ADD X9, X9, X10,LSL #3 |
(669) 0x432b8c STR X8, [X9, #8] |
(669) 0x432b90 LDR X8, [SP, #560] |
(669) 0x432b94 LDUR X9, [X29, #328] |
(669) 0x432b98 ADD X8, X8, #1 |
(669) 0x432b9c STR X8, [SP, #560] |
(669) 0x432ba0 CMP X8, X9 |
(669) 0x432ba4 B.LT 432b44 |
(656) 0x432ba8 LDR X8, [SP, #696] |
(656) 0x432bac LDUR X2, [X29, #296] |
(656) 0x432bb0 LDR X1, [SP, #368] |
(656) 0x432bb4 MOVZ W0, #11 |
(656) 0x432bb8 ADD X3, X8, #8 |
(656) 0x432bbc BL 481820 |
(656) 0x432bc0 BL 481c20 |
(656) 0x432bc4 LDR X8, [SP, #504] |
(656) 0x432bc8 LDR X9, [SP, #352] |
(656) 0x432bcc CMP X8, X9 |
(656) 0x432bd0 B.LE 432bf0 |
(656) 0x432bd4 ORR X0, XZR, X19 |
(656) 0x432bd8 BL 4a91d0 |
(656) 0x432bdc LDR X0, [SP, #504] |
(656) 0x432be0 MOVZ W1, #8 |
(656) 0x432be4 BL 4a90d0 |
(656) 0x432be8 LDR X8, [SP, #504] |
(656) 0x432bec ORR X19, XZR, X0 |
(656) 0x432bf0 SUB X28, X29, #168 |
(656) 0x432bf4 STR X8, [SP, #352] |
(656) 0x432bf8 LDUR X13, [X29, #328] |
(656) 0x432bfc STR XZR, [SP, #560] |
(656) 0x432c00 CMP X13, #1 |
(656) 0x432c04 B.LT 432d84 |
(656) 0x432c08 LDP X9, X8, [X29, #824] |
(656) 0x432c0c LDR X10, [SP, #584] |
(656) 0x432c10 ORR X11, XZR, XZR |
(656) 0x432c14 ORR X0, XZR, XZR |
(656) 0x432c18 B 432c30 |
0x432c1c HINT #0 |
(664) 0x432c20 LDUR X13, [X29, #328] |
(664) 0x432c24 STR X0, [SP, #560] |
(664) 0x432c28 CMP X0, X13 |
(664) 0x432c2c B.GE 432d84 |
(664) 0x432c30 LDR X12, [X8, X0,LSL #3] |
(664) 0x432c34 ADD X0, X0, #1 |
(664) 0x432c38 LDR X14, [X8, X0,LSL #3] |
(664) 0x432c3c CMP X12, X14 |
(664) 0x432c40 B.GE 432c24 |
(664) 0x432c44 LDR X15, [SP, #728] |
(664) 0x432c48 LDR X18, [SP, #720] |
(664) 0x432c4c LDR X13, [SP, #744] |
(664) 0x432c50 SUB X15, X15, #8 |
(664) 0x432c54 LDUR X14, [X29, #368] |
(664) 0x432c58 LDR X16, [SP, #736] |
(664) 0x432c5c LDUR X17, [X29, #344] |
(664) 0x432c60 SUB X18, X18, #8 |
(664) 0x432c64 B 432c84 |
(665) 0x432c68 ORR X11, XZR, X2 |
(665) 0x432c6c LDR X0, [SP, #560] |
(665) 0x432c70 ADD X12, X12, #1 |
(665) 0x432c74 ADD X0, X0, #1 |
(665) 0x432c78 LDR X1, [X8, X0,LSL #3] |
(665) 0x432c7c CMP X12, X1 |
(665) 0x432c80 B.GE 432c20 |
(665) 0x432c84 LDR X0, [X9, X12,LSL #3] |
(665) 0x432c88 LDR X2, [SP, #648] |
(665) 0x432c8c LDR X1, [X10, X0,LSL #3] |
(665) 0x432c90 SUB X2, X2, #1 |
(665) 0x432c94 CMP X1, X2 |
(665) 0x432c98 B.NE 432c6c |
(665) 0x432c9c ADD X1, X0, #1 |
(665) 0x432ca0 LDR X2, [X14, X1,LSL #3] |
(665) 0x432ca4 CMP X2, #1 |
(665) 0x432ca8 B.LT 432cf8 |
(665) 0x432cac LDR X3, [X13, X0,LSL #3] |
(665) 0x432cb0 ADD X4, X2, X3 |
(665) 0x432cb4 HINT #0 |
(665) 0x432cb8 HINT #0 |
(665) 0x432cbc HINT #0 |
(668) 0x432cc0 LDR X2, [SP, #648] |
(668) 0x432cc4 LDR X2, [X15, X2,LSL #3] |
(668) 0x432cc8 LDR X2, [X2, X3,LSL #3] |
(668) 0x432ccc ADD X3, X3, #1 |
(668) 0x432cd0 ADD X5, X2, X27 |
(668) 0x432cd4 ADD X2, X11, #1 |
(668) 0x432cd8 STR X5, [X19, X11,LSL #3] |
(668) 0x432cdc ORR X11, XZR, X2 |
(668) 0x432ce0 CMP X3, X4 |
(668) 0x432ce4 B.LT 432cc0 |
(665) 0x432ce8 LDR X11, [X17, X1,LSL #3] |
(665) 0x432cec CMP X11, #1 |
(665) 0x432cf0 B.GE 432d08 |
(665) 0x432cf4 B 432c68 |
(665) 0x432cf8 ORR X2, XZR, X11 |
(665) 0x432cfc LDR X11, [X17, X1,LSL #3] |
(665) 0x432d00 CMP X11, #1 |
(665) 0x432d04 B.LT 432c68 |
(665) 0x432d08 LDR X0, [X16, X0,LSL #3] |
(665) 0x432d0c ADD X1, X11, X0 |
(665) 0x432d10 ORR X11, XZR, X2 |
(665) 0x432d14 B 432d44 |
0x432d18 HINT #0 |
0x432d1c HINT #0 |
(666) 0x432d20 LDUR X3, [X4, #496] |
(666) 0x432d24 SUB X2, X2, X3 |
(666) 0x432d28 LDR X3, [X5] |
(666) 0x432d2c LDR X2, [X3, X2,LSL #3] |
(666) 0x432d30 STR X2, [X19, X11,LSL #3] |
(666) 0x432d34 ADD X11, X11, #1 |
(666) 0x432d38 ADD X0, X0, #1 |
(666) 0x432d3c CMP X0, X1 |
(666) 0x432d40 B.GE 432c6c |
(666) 0x432d44 LDR X3, [SP, #648] |
(666) 0x432d48 LDR X4, [SP, #704] |
(666) 0x432d4c ORR X5, XZR, X23 |
(666) 0x432d50 LDR X2, [X18, X3,LSL #3] |
(666) 0x432d54 CMP X3, #1 |
(666) 0x432d58 ADD X4, X4, #8 |
(666) 0x432d5c CSINC X3, X3, XZR, #12 |
(666) 0x432d60 SUB X3, X3, #1 |
(666) 0x432d64 LDR X2, [X2, X0,LSL #3] |
(667) 0x432d68 CBZ X3, 432d38 |
(667) 0x432d6c LDR X6, [X4], #8 |
(667) 0x432d70 ADD X5, X5, #8 |
(667) 0x432d74 SUB X3, X3, #1 |
(667) 0x432d78 CMP X2, X6 |
(667) 0x432d7c B.GE 432d68 |
(666) 0x432d80 B 432d20 |
(656) 0x432d84 LDR X8, [SP, #528] |
(656) 0x432d88 CMP X8, #1 |
(656) 0x432d8c B.LE 432f10 |
(656) 0x432d90 LDR X8, [SP, #648] |
(656) 0x432d94 LDR X9, [SP, #400] |
(656) 0x432d98 LDR X8, [X9, X8,LSL #3] |
(656) 0x432d9c STR XZR, [X8] |
(656) 0x432da0 LDR X8, [SP, #408] |
(656) 0x432da4 STR XZR, [SP, #560] |
(656) 0x432da8 CMP X8, #1 |
(656) 0x432dac B.LT 432e44 |
(656) 0x432db0 LDR X8, [SP, #576] |
(656) 0x432db4 ORR X24, XZR, XZR |
(656) 0x432db8 ORR X9, XZR, XZR |
(656) 0x432dbc B 432de4 |
(662) 0x432dc0 LDR X9, [SP, #648] |
(662) 0x432dc4 LDP X11, X10, [SP, #400] |
(662) 0x432dc8 LDR X9, [X11, X9,LSL #3] |
(662) 0x432dcc STR X24, [X9, X13,LSL #3] |
(662) 0x432dd0 LDR X9, [SP, #560] |
(662) 0x432dd4 ADD X9, X9, #1 |
(662) 0x432dd8 STR X9, [SP, #560] |
(662) 0x432ddc CMP X9, X10 |
(662) 0x432de0 B.GE 432e48 |
(662) 0x432de4 ADD X13, X9, #1 |
(662) 0x432de8 LDR X10, [X22, X9,LSL #3] |
(662) 0x432dec LDR X11, [X22, X13,LSL #3] |
(662) 0x432df0 CMP X10, X11 |
(662) 0x432df4 B.GE 432dc0 |
(662) 0x432df8 LDR X12, [SP, #696] |
(662) 0x432dfc LDUR X11, [X29, #304] |
(662) 0x432e00 ADD X12, X12, #8 |
(662) 0x432e04 B 432e1c |
(663) 0x432e08 ADD X13, X9, #1 |
(663) 0x432e0c ADD X10, X10, #1 |
(663) 0x432e10 LDR X14, [X22, X13,LSL #3] |
(663) 0x432e14 CMP X10, X14 |
(663) 0x432e18 B.GE 432dc0 |
(663) 0x432e1c LDR X14, [SP, #648] |
(663) 0x432e20 LDR X13, [X8, X10,LSL #3] |
(663) 0x432e24 SUB X14, X14, #1 |
(663) 0x432e28 CMP X13, X14 |
(663) 0x432e2c B.NE 432e08 |
(663) 0x432e30 STR X24, [X11, X10,LSL #3] |
(663) 0x432e34 LDR X9, [X12, X10,LSL #3] |
(663) 0x432e38 ADD X24, X9, X24 |
(663) 0x432e3c LDR X9, [SP, #560] |
(663) 0x432e40 B 432e08 |
(656) 0x432e44 ORR X24, XZR, XZR |
(656) 0x432e48 LDUR X8, [X29, #328] |
(656) 0x432e4c LDP X9, X10, [SP, #376] |
(656) 0x432e50 LDR X11, [SP, #408] |
(656) 0x432e54 STP X9, X8, [X10] |
(656) 0x432e58 LDR X8, [SP, #336] |
(656) 0x432e5c LDR X9, [SP, #392] |
(656) 0x432e60 STR X8, [X10, #16] |
(656) 0x432e64 LDR X8, [SP, #648] |
(656) 0x432e68 LDR X9, [X9, X8,LSL #3] |
(656) 0x432e6c STR X9, [X10, #24] |
(656) 0x432e70 LDR X9, [SP, #328] |
(656) 0x432e74 STP X11, X9, [X10, #40] |
(656) 0x432e78 LDR X9, [SP, #400] |
(656) 0x432e7c LDR X9, [X9, X8,LSL #3] |
(656) 0x432e80 STR X9, [X10, #56] |
(656) 0x432e84 CBZ X24, 432eb4 |
(656) 0x432e88 MOVZ W1, #8 |
(656) 0x432e8c ORR X0, XZR, X24 |
(656) 0x432e90 BL 4a90d0 |
(656) 0x432e94 LDR X8, [SP, #712] |
(656) 0x432e98 LDR X9, [SP, #648] |
(656) 0x432e9c MOVZ W1, #8 |
(656) 0x432ea0 STR X0, [X8, X9,LSL #3] |
(656) 0x432ea4 ORR X0, XZR, X24 |
(656) 0x432ea8 BL 4a90d0 |
(656) 0x432eac LDR X8, [SP, #648] |
(656) 0x432eb0 B 432ec0 |
(656) 0x432eb4 LDR X9, [SP, #712] |
(656) 0x432eb8 ORR X0, XZR, XZR |
(656) 0x432ebc STR XZR, [X9, X8,LSL #3] |
(656) 0x432ec0 ADD X8, X20, X8,LSL #3 |
(656) 0x432ec4 LDR X9, [SP, #648] |
(656) 0x432ec8 LDR X1, [SP, #384] |
(656) 0x432ecc ORR X2, XZR, X19 |
(656) 0x432ed0 STUR X0, [X8, #504] |
(656) 0x432ed4 MOVZ W0, #11 |
(656) 0x432ed8 LDR X8, [SP, #712] |
(656) 0x432edc LDR X3, [X8, X9,LSL #3] |
(656) 0x432ee0 BL 481820 |
(656) 0x432ee4 BL 481c20 |
(656) 0x432ee8 LDR X8, [SP, #360] |
(656) 0x432eec CMP X24, X8 |
(656) 0x432ef0 B.LE 432f0c |
(656) 0x432ef4 LDR X0, [SP, #424] |
(656) 0x432ef8 BL 4a91d0 |
(656) 0x432efc MOVZ W1, #8 |
(656) 0x432f00 ORR X0, XZR, X24 |
(656) 0x432f04 BL 4a90d0 |
(656) 0x432f08 STR X0, [SP, #424] |
(656) 0x432f0c STR X24, [SP, #360] |
(656) 0x432f10 LDR X8, [SP, #408] |
(656) 0x432f14 STR XZR, [SP, #560] |
(656) 0x432f18 CMP X8, #1 |
(656) 0x432f1c B.LT 4331c8 |
(656) 0x432f20 LDR X28, [X22, XZR,LSL #3] |
(656) 0x432f24 ORR X25, XZR, XZR |
(656) 0x432f28 ORR X21, XZR, XZR |
(656) 0x432f2c ORR X8, XZR, XZR |
(656) 0x432f30 ADD X9, X8, #1 |
(656) 0x432f34 LDR X10, [X22, X9,LSL #3] |
(656) 0x432f38 CMP X28, X10 |
(656) 0x432f3c B.LT 432f60 |
(656) 0x432f40 B 4330e0 |
(658) 0x432f44 LDR X28, [X22, X8,LSL #3] |
(658) 0x432f48 ADD X9, X8, #1 |
(658) 0x432f4c LDR X10, [X22, X9,LSL #3] |
(658) 0x432f50 CMP X28, X10 |
(658) 0x432f54 B.GE 4330e0 |
(657) 0x432f58 HINT #0 |
(657) 0x432f5c HINT #0 |
(657) 0x432f60 LDR X9, [SP, #576] |
(657) 0x432f64 LDR X10, [SP, #648] |
(657) 0x432f68 LDR X9, [X9, X28,LSL #3] |
(657) 0x432f6c SUB X10, X10, #1 |
(657) 0x432f70 CMP X9, X10 |
(657) 0x432f74 B.NE 4330ac |
(657) 0x432f78 LDR X9, [SP, #696] |
(657) 0x432f7c ADD X9, X9, X28,LSL #3 |
(657) 0x432f80 LDR X9, [X9, #8] |
(657) 0x432f84 CMP X9, #1 |
(657) 0x432f88 B.LT 4330c4 |
(657) 0x432f8c ORR X22, XZR, X21 |
(657) 0x432f90 B 432fc4 |
0x432f94 HINT #0 |
0x432f98 HINT #0 |
0x432f9c HINT #0 |
(660) 0x432fa0 ORN X8, XZR, X10 |
(660) 0x432fa4 STR X8, [X9, X22,LSL #3] |
(660) 0x432fa8 LDR X8, [SP, #696] |
(660) 0x432fac ADD X22, X22, #1 |
(660) 0x432fb0 ADD X8, X8, X28,LSL #3 |
(660) 0x432fb4 LDR X8, [X8, #8] |
(660) 0x432fb8 ADD X9, X8, X21 |
(660) 0x432fbc CMP X22, X9 |
(660) 0x432fc0 B.GE 4330a0 |
(660) 0x432fc4 LDR X9, [SP, #712] |
(660) 0x432fc8 LDR X8, [SP, #648] |
(660) 0x432fcc LDR X9, [X9, X8,LSL #3] |
(660) 0x432fd0 LDR X24, [X9, X22,LSL #3] |
(660) 0x432fd4 SUBS X10, X24, X27 |
(660) 0x432fd8 B.MI 432fe8 |
(660) 0x432fdc LDR X11, [SP, #624] |
(660) 0x432fe0 CMP X10, X11 |
(660) 0x432fe4 B.LT 432fa0 |
(660) 0x432fe8 ORR X26, XZR, X27 |
(660) 0x432fec CMP X8, #2 |
(660) 0x432ff0 B.LT 433040 |
(660) 0x432ff4 LDR X23, [SP, #704] |
(660) 0x432ff8 MOVZ W27, #1 |
(660) 0x432ffc HINT #0 |
(661) 0x433000 LDP X9, X8, [X23] |
(661) 0x433004 LDR X0, [X20] |
(661) 0x433008 ORR X1, XZR, X24 |
(661) 0x43300c SUB X2, X8, X9 |
(661) 0x433010 BL 4a8360 |
(661) 0x433014 TBZ X0, #63, 43306c |
(661) 0x433018 LDR X8, [SP, #648] |
(661) 0x43301c SUB X9, X8, #1 |
(661) 0x433020 TBZ X0, #63, 433044 |
(661) 0x433024 ADD X23, X23, #8 |
(661) 0x433028 ADD X10, X27, #1 |
(661) 0x43302c ADD X20, X20, #8 |
(661) 0x433030 CMP X27, X9 |
(661) 0x433034 ORR X27, XZR, X10 |
(661) 0x433038 B.LT 433000 |
(660) 0x43303c B 433044 |
(660) 0x433040 SUB X9, X8, #1 |
(660) 0x433044 LDR X10, [SP, #712] |
(660) 0x433048 LDR X20, [SP, #432] |
(660) 0x43304c LDR X8, [X10, X8,LSL #3] |
(660) 0x433050 LDR X9, [X20, X9,LSL #3] |
(660) 0x433054 LDR X8, [X8, X22,LSL #3] |
(660) 0x433058 STR X8, [X9, X25,LSL #3] |
(660) 0x43305c LDR X8, [SP, #424] |
(660) 0x433060 STR X22, [X8, X25,LSL #3] |
(660) 0x433064 ADD X25, X25, #1 |
(660) 0x433068 B 433088 |
(660) 0x43306c LDR X9, [SP, #712] |
(660) 0x433070 LDR X10, [SP, #648] |
(660) 0x433074 LDR X8, [X23] |
(660) 0x433078 ADD X8, X8, X0 |
(660) 0x43307c LDR X9, [X9, X10,LSL #3] |
(660) 0x433080 LDR X20, [SP, #432] |
(660) 0x433084 STR X8, [X9, X22,LSL #3] |
(660) 0x433088 ORR X27, XZR, X26 |
(660) 0x43308c B 432fa8 |
0x433090 HINT #0 |
0x433094 HINT #0 |
0x433098 HINT #0 |
0x43309c HINT #0 |
(657) 0x4330a0 LDR X8, [SP, #560] |
(657) 0x4330a4 LDR X22, [SP, #416] |
(657) 0x4330a8 ORR X21, XZR, X9 |
(657) 0x4330ac ADD X28, X28, #1 |
(657) 0x4330b0 ADD X9, X8, #1 |
(657) 0x4330b4 LDR X10, [X22, X9,LSL #3] |
(657) 0x4330b8 CMP X28, X10 |
(657) 0x4330bc B.LT 432f60 |
(657) 0x4330c0 B 4330e0 |
(657) 0x4330c4 ADD X21, X9, X21 |
(657) 0x4330c8 ADD X28, X28, #1 |
(657) 0x4330cc ADD X9, X8, #1 |
(657) 0x4330d0 LDR X10, [X22, X9,LSL #3] |
(657) 0x4330d4 CMP X28, X10 |
(657) 0x4330d8 B.LT 432f60 |
(657) 0x4330dc HINT #0 |
(658) 0x4330e0 LDR X10, [SP, #408] |
(658) 0x4330e4 STR X9, [SP, #560] |
(658) 0x4330e8 ORR X8, XZR, X9 |
(658) 0x4330ec CMP X9, X10 |
(658) 0x4330f0 B.LT 432f44 |
(656) 0x4330f4 LDR X23, [SP, #344] |
(656) 0x4330f8 SUB X28, X29, #168 |
(656) 0x4330fc CBZ X25, 4331c8 |
(656) 0x433100 LDR X8, [SP, #648] |
(656) 0x433104 LDR X24, [SP, #424] |
(656) 0x433108 SUB X3, X25, #1 |
(656) 0x43310c ORR X2, XZR, XZR |
(656) 0x433110 ADD X8, X20, X8,LSL #3 |
(656) 0x433114 ORR X1, XZR, X24 |
(656) 0x433118 LDUR X0, [X8, #504] |
(656) 0x43311c BL 4a9aa0 |
(656) 0x433120 LDR X8, [SP, #704] |
(656) 0x433124 LDR X9, [SP, #648] |
(656) 0x433128 ADD X10, X8, X9,LSL #3 |
(656) 0x43312c UBFM X11, X9, #61, #60 |
(656) 0x433130 LDR X9, [SP, #712] |
(656) 0x433134 LDUR X10, [X10, #504] |
(656) 0x433138 LDR X11, [X9, X11] |
(656) 0x43313c STR X10, [SP, #488] |
(656) 0x433140 LDR X12, [X24] |
(656) 0x433144 STR X10, [X11, X12,LSL #3] |
(656) 0x433148 MOVZ W10, #1 |
(656) 0x43314c STR X10, [SP, #560] |
(656) 0x433150 CMP X25, #2 |
(656) 0x433154 B.LT 433200 |
(656) 0x433158 MOVZ W11, #1 |
(656) 0x43315c ORR X10, XZR, XZR |
(656) 0x433160 B 4331a4 |
(659) 0x433164 ADD X10, X10, #1 |
(659) 0x433168 STR X14, [X13, X10,LSL #3] |
(659) 0x43316c LDR X11, [SP, #488] |
(659) 0x433170 LDR X12, [SP, #648] |
(659) 0x433174 ADD X13, X11, #1 |
(659) 0x433178 LDR X11, [SP, #560] |
(659) 0x43317c STR X13, [SP, #488] |
(659) 0x433180 LDR X14, [SP, #424] |
(659) 0x433184 LDR X12, [X9, X12,LSL #3] |
(659) 0x433188 LDR X11, [X14, X11,LSL #3] |
(659) 0x43318c STR X13, [X12, X11,LSL #3] |
(659) 0x433190 LDR X11, [SP, #560] |
(659) 0x433194 ADD X11, X11, #1 |
(659) 0x433198 STR X11, [SP, #560] |
(659) 0x43319c CMP X11, X25 |
(659) 0x4331a0 B.GE 433200 |
(659) 0x4331a4 LDR X12, [SP, #648] |
(659) 0x4331a8 ADD X13, X20, X12,LSL #3 |
(659) 0x4331ac LDUR X13, [X13, #504] |
(659) 0x4331b0 LDR X14, [X13, X11,LSL #3] |
(659) 0x4331b4 LDR X15, [X13, X10,LSL #3] |
(659) 0x4331b8 CMP X14, X15 |
(659) 0x4331bc B.GT 433164 |
(659) 0x4331c0 LDR X13, [SP, #488] |
(659) 0x4331c4 B 433180 |
(656) 0x4331c8 LDR X8, [SP, #528] |
(656) 0x4331cc CMP X8, #1 |
(656) 0x4331d0 B.LE 4331e8 |
(656) 0x4331d4 LDR X8, [SP, #704] |
(656) 0x4331d8 LDR X9, [SP, #648] |
(656) 0x4331dc ADD X8, X8, X9,LSL #3 |
(656) 0x4331e0 LDUR X9, [X8, #504] |
(656) 0x4331e4 STR X9, [X8] |
(656) 0x4331e8 LDP X9, X8, [SP, #480] |
(656) 0x4331ec SUB X10, X29, #144 |
(656) 0x4331f0 CMP X9, X8 |
(656) 0x4331f4 B.GT 4329c0 |
(656) 0x4331f8 B 433220 |
0x4331fc HINT #0 |
(656) 0x433200 LDR X9, [SP, #488] |
(656) 0x433204 LDR X10, [SP, #648] |
(656) 0x433208 ADD X9, X9, #1 |
(656) 0x43320c STR X9, [X8, X10,LSL #3] |
(656) 0x433210 LDP X9, X8, [SP, #480] |
(656) 0x433214 SUB X10, X29, #144 |
(656) 0x433218 CMP X9, X8 |
(656) 0x43321c B.GT 4329c0 |
(656) 0x433220 ADD X8, X8, #1 |
(656) 0x433224 STR X8, [SP, #480] |
(656) 0x433228 B 4329c0 |
(629) 0x43322c STP X9, X8, [SP, #200] |
(629) 0x433230 SUB X8, X29, #72 |
(629) 0x433234 SUB X11, X29, #232 |
(629) 0x433238 SUB X9, X29, #88 |
(629) 0x43323c ADRP X0, |
(629) 0x433240 ADD X0, X0, #816 |
(629) 0x433244 ADRP X2, 436244 |
(629) 0x433248 ADD X2, X2, #1040 |
(629) 0x43324c STP X21, X22, [SP, #80] |
(629) 0x433250 STP X8, X10, [SP, #184] |
(629) 0x433254 SUB X8, X29, #224 |
(629) 0x433258 STR X9, [SP, #160] |
(629) 0x43325c ADD X9, X29, #104 |
(629) 0x433260 ADD X10, SP, #728 |
(629) 0x433264 ADD X3, SP, #632 |
(629) 0x433268 SUB X4, X29, #128 |
(629) 0x43326c ADD X5, SP, #752 |
(629) 0x433270 STP X8, X11, [SP, #168] |
(629) 0x433274 ADD X8, SP, #680 |
(629) 0x433278 ADD X6, SP, #464 |
(629) 0x43327c ADD X7, SP, #760 |
(629) 0x433280 MOVZ W1, #32 |
(629) 0x433284 STP X10, X20, [SP, #16] |
(629) 0x433288 STP X9, X8, [SP, #144] |
(629) 0x43328c SUB X8, X29, #80 |
(629) 0x433290 SUB X9, X29, #256 |
(629) 0x433294 STP X9, X8, [SP, #128] |
(629) 0x433298 ADD X8, SP, #720 |
(629) 0x43329c SUB X9, X29, #168 |
(629) 0x4332a0 STP X9, X8, [SP, #112] |
(629) 0x4332a4 ADD X8, SP, #736 |
(629) 0x4332a8 SUB X9, X29, #40 |
(629) 0x4332ac STP X24, X8, [SP, #96] |
(629) 0x4332b0 SUB X8, X29, #48 |
(629) 0x4332b4 STP X9, X8, [SP, #64] |
(629) 0x4332b8 SUB X8, X29, #32 |
(629) 0x4332bc SUB X9, X29, #8 |
(629) 0x4332c0 STP X9, X8, [SP, #48] |
(629) 0x4332c4 SUB X8, X29, #64 |
(629) 0x4332c8 SUB X9, X29, #56 |
(629) 0x4332cc STP X9, X8, [SP, #32] |
(629) 0x4332d0 ADD X8, SP, #744 |
(629) 0x4332d4 STP X8, X19, [SP] |
(629) 0x4332d8 BL 40f990 |
(629) 0x4332dc LDR X8, [SP, #624] |
(629) 0x4332e0 CBZ X8, 4332f0 |
(629) 0x4332e4 LDUR X0, [X29, #264] |
(629) 0x4332e8 BL 4a91d0 |
(629) 0x4332ec STUR XZR, [X29, #264] |
(629) 0x4332f0 LDUR X0, [X29, #256] |
(629) 0x4332f4 BL 4a91d0 |
(629) 0x4332f8 LDR X8, [SP, #728] |
(629) 0x4332fc STUR XZR, [X29, #256] |
(629) 0x433300 LDR X0, [X8, #8] |
(629) 0x433304 BL 4a91d0 |
(629) 0x433308 LDR X8, [SP, #728] |
(629) 0x43330c LDR X19, [SP, #392] |
(629) 0x433310 STR XZR, [X8, #8] |
(629) 0x433314 LDR X8, [SP, #528] |
(629) 0x433318 CMP X8, #2 |
(629) 0x43331c B.LT 433334 |
(629) 0x433320 LDR X8, [SP, #720] |
(629) 0x433324 LDR X0, [X8, #8] |
(629) 0x433328 BL 4a91d0 |
(629) 0x43332c LDR X8, [SP, #720] |
(629) 0x433330 STR XZR, [X8, #8] |
(629) 0x433334 MOVZ W8, #2 |
(629) 0x433338 STR X8, [SP, #648] |
(629) 0x43333c LDR X8, [SP, #640] |
(629) 0x433340 CMP X8, #2 |
(629) 0x433344 B.LE 4338f4 |
(629) 0x433348 MOVZ W8, #2 |
(629) 0x43334c SUB X21, X29, #232 |
(629) 0x433350 ADRP X20, 436350 |
(629) 0x433354 ADD X20, X20, #2864 |
(629) 0x433358 ORR X26, XZR, XZR |
(629) 0x43335c ORR X27, XZR, XZR |
(629) 0x433360 ORR X24, XZR, XZR |
(629) 0x433364 B 43337c |
(637) 0x433368 LDR X9, [SP, #640] |
(637) 0x43336c ADD X8, X8, #1 |
(637) 0x433370 STR X8, [SP, #648] |
(637) 0x433374 CMP X8, X9 |
(637) 0x433378 B.GE 4338f8 |
(637) 0x43337c LDR X9, [SP, #528] |
(637) 0x433380 CMP X9, #2 |
(637) 0x433384 B.LT 43373c |
(637) 0x433388 LDR X10, [X19, X8,LSL #3] |
(637) 0x43338c LDUR X9, [X29, #328] |
(637) 0x433390 LDR X10, [X10, X9,LSL #3] |
(637) 0x433394 STR X10, [SP, #504] |
(637) 0x433398 CMP X10, X27 |
(637) 0x43339c B.LE 4333e0 |
(637) 0x4333a0 ORR X0, XZR, X24 |
(637) 0x4333a4 BL 4a91d0 |
(637) 0x4333a8 LDR X0, [SP, #504] |
(637) 0x4333ac MOVZ W1, #8 |
(637) 0x4333b0 BL 4a90d0 |
(637) 0x4333b4 LDR X27, [SP, #504] |
(637) 0x4333b8 LDUR X9, [X29, #328] |
(637) 0x4333bc LDR X8, [SP, #648] |
(637) 0x4333c0 ORR X24, XZR, X0 |
(637) 0x4333c4 STR XZR, [SP, #560] |
(637) 0x4333c8 CMP X9, #1 |
(637) 0x4333cc B.GE 4333f0 |
(637) 0x4333d0 B 4336a0 |
0x4333d4 HINT #0 |
0x4333d8 HINT #0 |
0x4333dc HINT #0 |
(637) 0x4333e0 ORR X27, XZR, X10 |
(637) 0x4333e4 STR XZR, [SP, #560] |
(637) 0x4333e8 CMP X9, #1 |
(637) 0x4333ec B.LT 4336a0 |
(637) 0x4333f0 LDP X12, X11, [X29, #824] |
(637) 0x4333f4 LDR X13, [SP, #584] |
(637) 0x4333f8 ORR X5, XZR, XZR |
(637) 0x4333fc ORR X10, XZR, XZR |
(637) 0x433400 SUB X14, X8, #1 |
(637) 0x433404 ADD X15, X24, #16 |
(637) 0x433408 B 433418 |
(638) 0x43340c STR X10, [SP, #560] |
(638) 0x433410 CMP X10, X9 |
(638) 0x433414 B.EQ 4336a0 |
(638) 0x433418 LDR X16, [X11, X10,LSL #3] |
(638) 0x43341c ADD X10, X10, #1 |
(638) 0x433420 LDR X17, [X11, X10,LSL #3] |
(638) 0x433424 CMP X16, X17 |
(638) 0x433428 B.GE 43340c |
(638) 0x43342c LDP X18, X0, [X29, #880] |
(638) 0x433430 LDP X1, X2, [X29, #856] |
(638) 0x433434 ADD X3, X0, #16 |
(638) 0x433438 ADD X4, X2, #16 |
(638) 0x43343c B 43344c |
(639) 0x433440 ADD X16, X16, #1 |
(639) 0x433444 CMP X16, X17 |
(639) 0x433448 B.EQ 43340c |
(639) 0x43344c LDR X6, [X12, X16,LSL #3] |
(639) 0x433450 LDR X7, [X13, X6,LSL #3] |
(639) 0x433454 CMP X7, X14 |
(639) 0x433458 B.NE 433440 |
(639) 0x43345c ADD X7, X6, #1 |
(639) 0x433460 LDR X28, [X18, X6,LSL #3] |
(639) 0x433464 LDR X21, [X18, X7,LSL #3] |
(639) 0x433468 SUBS X30, X21, X28 |
(639) 0x43346c B.LE 433574 |
(639) 0x433470 CMP X30, #4 |
(639) 0x433474 B.CC 4334cc |
(639) 0x433478 ADD X19, X24, X5,LSL #3 |
(639) 0x43347c ADD X22, X0, X28,LSL #3 |
(639) 0x433480 SUB X19, X19, X22 |
(639) 0x433484 CMP X19, #32 |
(639) 0x433488 B.CC 4334cc |
(639) 0x43348c UBFM X23, X5, #61, #60 |
(639) 0x433490 UBFM X22, X28, #61, #60 |
(639) 0x433494 AND X19, X30, #8062 |
(639) 0x433498 ADD X5, X5, X19 |
(639) 0x43349c ADD X28, X28, X19 |
(639) 0x4334a0 ADD X22, X3, X22 |
(639) 0x4334a4 ADD X25, X15, X23 |
(639) 0x4334a8 ORR X23, XZR, X19 |
(645) 0x4334ac LDP Q0, Q1, [X22, #2032] |
(645) 0x4334b0 ADD X22, X22, #32 |
(645) 0x4334b4 SUBS X23, X23, #4 |
(645) 0x4334b8 STP Q0, Q1, [X25, #2032] |
(645) 0x4334bc ADD X25, X25, #32 |
(645) 0x4334c0 B.NE 4334ac |
(639) 0x4334c4 CMP X30, X19 |
(639) 0x4334c8 B.EQ 433574 |
(639) 0x4334cc SUB W19, W21, W28 |
(639) 0x4334d0 ANDS X22, X19, #4160 |
(639) 0x4334d4 B.EQ 433510 |
(639) 0x4334d8 ORR X30, XZR, X28 |
(639) 0x4334dc HINT #0 |
(644) 0x4334e0 LDR D0, [X0, X30,LSL #3] |
(644) 0x4334e4 ADD X23, X5, #1 |
(644) 0x4334e8 ADD X30, X30, #1 |
(644) 0x4334ec SUBS X22, X22, #1 |
(644) 0x4334f0 STR D0, [X24, X5,LSL #3] |
(644) 0x4334f4 ORR X5, XZR, X23 |
(644) 0x4334f8 B.NE 4334e0 |
(639) 0x4334fc SUB X19, X28, X21 |
(639) 0x433500 ORR X5, XZR, X23 |
(639) 0x433504 CMN X19, #4 |
(639) 0x433508 B.LS 433524 |
(639) 0x43350c B 433574 |
(639) 0x433510 ORR X23, XZR, X5 |
(639) 0x433514 ORR X30, XZR, X28 |
(639) 0x433518 SUB X19, X28, X21 |
(639) 0x43351c CMN X19, #4 |
(639) 0x433520 B.HI 433574 |
(639) 0x433524 SUB X21, X21, X30 |
(639) 0x433528 ADD X28, X3, X30,LSL #3 |
(639) 0x43352c ADD X30, X15, X23,LSL #3 |
(639) 0x433530 ORR X5, XZR, X23 |
(639) 0x433534 HINT #0 |
(639) 0x433538 HINT #0 |
(639) 0x43353c HINT #0 |
(643) 0x433540 LDUR D0, [X28, #496] |
(643) 0x433544 ADD X5, X5, #4 |
(643) 0x433548 SUBS X21, X21, #4 |
(643) 0x43354c STUR D0, [X30, #496] |
(643) 0x433550 LDUR D0, [X28, #504] |
(643) 0x433554 STUR D0, [X30, #504] |
(643) 0x433558 LDR D0, [X28] |
(643) 0x43355c STR D0, [X30] |
(643) 0x433560 LDR D0, [X28, #8] |
(643) 0x433564 ADD X28, X28, #32 |
(643) 0x433568 STR D0, [X30, #8] |
(643) 0x43356c ADD X30, X30, #32 |
(643) 0x433570 B.NE 433540 |
(639) 0x433574 LDR X21, [X1, X6,LSL #3] |
(639) 0x433578 LDR X6, [X1, X7,LSL #3] |
(639) 0x43357c SUBS X7, X6, X21 |
(639) 0x433580 B.LE 433440 |
(639) 0x433584 CMP X7, #4 |
(639) 0x433588 B.CC 4335e0 |
(639) 0x43358c ADD X19, X24, X5,LSL #3 |
(639) 0x433590 ADD X22, X2, X21,LSL #3 |
(639) 0x433594 SUB X19, X19, X22 |
(639) 0x433598 CMP X19, #32 |
(639) 0x43359c B.CC 4335e0 |
(639) 0x4335a0 UBFM X19, X5, #61, #60 |
(639) 0x4335a4 UBFM X22, X21, #61, #60 |
(639) 0x4335a8 AND X23, X7, #8062 |
(639) 0x4335ac ADD X5, X5, X23 |
(639) 0x4335b0 ADD X21, X21, X23 |
(639) 0x4335b4 ADD X22, X4, X22 |
(639) 0x4335b8 ADD X25, X15, X19 |
(639) 0x4335bc ORR X19, XZR, X23 |
(642) 0x4335c0 LDP Q0, Q1, [X22, #2032] |
(642) 0x4335c4 ADD X22, X22, #32 |
(642) 0x4335c8 SUBS X19, X19, #4 |
(642) 0x4335cc STP Q0, Q1, [X25, #2032] |
(642) 0x4335d0 ADD X25, X25, #32 |
(642) 0x4335d4 B.NE 4335c0 |
(639) 0x4335d8 CMP X7, X23 |
(639) 0x4335dc B.EQ 433440 |
(639) 0x4335e0 SUB W7, W6, W21 |
(639) 0x4335e4 ANDS X22, X7, #4160 |
(639) 0x4335e8 B.EQ 433630 |
(639) 0x4335ec ORR X23, XZR, X21 |
(639) 0x4335f0 HINT #0 |
(639) 0x4335f4 HINT #0 |
(639) 0x4335f8 HINT #0 |
(639) 0x4335fc HINT #0 |
(641) 0x433600 LDR D0, [X2, X23,LSL #3] |
(641) 0x433604 ADD X7, X5, #1 |
(641) 0x433608 ADD X23, X23, #1 |
(641) 0x43360c SUBS X22, X22, #1 |
(641) 0x433610 STR D0, [X24, X5,LSL #3] |
(641) 0x433614 ORR X5, XZR, X7 |
(641) 0x433618 B.NE 433600 |
(639) 0x43361c SUB X19, X21, X6 |
(639) 0x433620 ORR X5, XZR, X7 |
(639) 0x433624 CMN X19, #4 |
(639) 0x433628 B.HI 433440 |
(639) 0x43362c B 433644 |
(639) 0x433630 ORR X7, XZR, X5 |
(639) 0x433634 ORR X23, XZR, X21 |
(639) 0x433638 SUB X19, X21, X6 |
(639) 0x43363c CMN X19, #4 |
(639) 0x433640 B.HI 433440 |
(639) 0x433644 SUB X6, X6, X23 |
(639) 0x433648 ADD X21, X4, X23,LSL #3 |
(639) 0x43364c ADD X23, X15, X7,LSL #3 |
(639) 0x433650 ORR X5, XZR, X7 |
(639) 0x433654 HINT #0 |
(639) 0x433658 HINT #0 |
(639) 0x43365c HINT #0 |
(640) 0x433660 LDUR D0, [X21, #496] |
(640) 0x433664 ADD X5, X5, #4 |
(640) 0x433668 SUBS X6, X6, #4 |
(640) 0x43366c STUR D0, [X23, #496] |
(640) 0x433670 LDUR D0, [X21, #504] |
(640) 0x433674 STUR D0, [X23, #504] |
(640) 0x433678 LDR D0, [X21] |
(640) 0x43367c STR D0, [X23] |
(640) 0x433680 LDR D0, [X21, #8] |
(640) 0x433684 ADD X21, X21, #32 |
(640) 0x433688 STR D0, [X23, #8] |
(640) 0x43368c ADD X23, X23, #32 |
(640) 0x433690 B.NE 433660 |
(639) 0x433694 B 433440 |
0x433698 HINT #0 |
0x43369c HINT #0 |
(637) 0x4336a0 LDR X10, [SP, #384] |
(637) 0x4336a4 LDR X3, [SP, #568] |
(637) 0x4336a8 STR X9, [X10, #8] |
(637) 0x4336ac LDP X9, X11, [SP, #392] |
(637) 0x4336b0 LDR X9, [X9, X8,LSL #3] |
(637) 0x4336b4 STR X9, [X10, #24] |
(637) 0x4336b8 LDR X9, [SP, #408] |
(637) 0x4336bc LDR X8, [X11, X8,LSL #3] |
(637) 0x4336c0 STR X9, [X10, #40] |
(637) 0x4336c4 LDR X21, [X8, X9,LSL #3] |
(637) 0x4336c8 STR X8, [X10, #56] |
(637) 0x4336cc CMP X21, X26 |
(637) 0x4336d0 B.LE 4336f4 |
(637) 0x4336d4 ORR X0, XZR, X3 |
(637) 0x4336d8 BL 4a91d0 |
(637) 0x4336dc MOVZ W1, #8 |
(637) 0x4336e0 STR XZR, [SP, #568] |
(637) 0x4336e4 ORR X0, XZR, X21 |
(637) 0x4336e8 BL 4a90d0 |
(637) 0x4336ec ORR X3, XZR, X0 |
(637) 0x4336f0 STR X0, [SP, #568] |
(637) 0x4336f4 LDR X1, [SP, #384] |
(637) 0x4336f8 MOVZ W0, #1 |
(637) 0x4336fc ORR X2, XZR, X24 |
(637) 0x433700 BL 481820 |
(637) 0x433704 BL 481c20 |
(637) 0x433708 LDR X8, [SP, #648] |
(637) 0x43370c LDR X19, [SP, #392] |
(637) 0x433710 LDR X0, [X19, X8,LSL #3] |
(637) 0x433714 BL 4a91d0 |
(637) 0x433718 LDR X8, [SP, #648] |
(637) 0x43371c LDR X22, [SP, #400] |
(637) 0x433720 STR XZR, [X19, X8,LSL #3] |
(637) 0x433724 LDR X0, [X22, X8,LSL #3] |
(637) 0x433728 BL 4a91d0 |
(637) 0x43372c LDR X8, [SP, #648] |
(637) 0x433730 ORR X26, XZR, X21 |
(637) 0x433734 SUB X21, X29, #232 |
(637) 0x433738 STR XZR, [X22, X8,LSL #3] |
(637) 0x43373c LDR X9, [SP, #752] |
(637) 0x433740 ADD X3, SP, #632 |
(637) 0x433744 SUB X4, X29, #128 |
(637) 0x433748 ADD X5, SP, #624 |
(637) 0x43374c ADD X6, SP, #480 |
(637) 0x433750 ADD X7, SP, #616 |
(637) 0x433754 ADRP X0, |
(637) 0x433758 ADD X0, X0, #840 |
(637) 0x43375c ORR X2, XZR, X20 |
(637) 0x433760 MOVZ W1, #42 |
(637) 0x433764 ADD X8, X9, X8,LSL #3 |
(637) 0x433768 LDP X8, X9, [X8] |
(637) 0x43376c SUB X8, X9, X8 |
(637) 0x433770 STR X8, [SP, #464] |
(637) 0x433774 SUB X8, X29, #224 |
(637) 0x433778 STP X8, X21, [SP, #280] |
(637) 0x43377c ADD X8, SP, #568 |
(637) 0x433780 STR X8, [SP, #272] |
(637) 0x433784 SUB X8, X29, #72 |
(637) 0x433788 STR X8, [SP, #264] |
(637) 0x43378c ADD X8, SP, #712 |
(637) 0x433790 STR X8, [SP, #256] |
(637) 0x433794 ADD X8, SP, #696 |
(637) 0x433798 STR X8, [SP, #248] |
(637) 0x43379c SUB X8, X29, #208 |
(637) 0x4337a0 STR X8, [SP, #240] |
(637) 0x4337a4 SUB X8, X29, #88 |
(637) 0x4337a8 STR X8, [SP, #232] |
(637) 0x4337ac ADD X8, SP, #680 |
(637) 0x4337b0 STR X8, [SP, #224] |
(637) 0x4337b4 ADD X8, X29, #104 |
(637) 0x4337b8 STR X8, [SP, #216] |
(637) 0x4337bc SUB X8, X29, #80 |
(637) 0x4337c0 STR X8, [SP, #208] |
(637) 0x4337c4 SUB X8, X29, #40 |
(637) 0x4337c8 STR X8, [SP, #200] |
(637) 0x4337cc SUB X8, X29, #32 |
(637) 0x4337d0 STR X8, [SP, #192] |
(637) 0x4337d4 SUB X8, X29, #8 |
(637) 0x4337d8 STR X8, [SP, #184] |
(637) 0x4337dc SUB X8, X29, #48 |
(637) 0x4337e0 STR X8, [SP, #176] |
(637) 0x4337e4 SUB X8, X29, #64 |
(637) 0x4337e8 STR X8, [SP, #168] |
(637) 0x4337ec SUB X8, X29, #56 |
(637) 0x4337f0 STR X8, [SP, #160] |
(637) 0x4337f4 ADD X8, SP, #576 |
(637) 0x4337f8 STR X8, [SP, #152] |
(637) 0x4337fc SUB X8, X29, #120 |
(637) 0x433800 STR X8, [SP, #144] |
(637) 0x433804 SUB X8, X29, #112 |
(637) 0x433808 STR X8, [SP, #136] |
(637) 0x43380c ADD X8, SP, #584 |
(637) 0x433810 STR X8, [SP, #128] |
(637) 0x433814 SUB X8, X29, #104 |
(637) 0x433818 STR X8, [SP, #120] |
(637) 0x43381c SUB X8, X29, #96 |
(637) 0x433820 STR X8, [SP, #112] |
(637) 0x433824 SUB X8, X29, #176 |
(637) 0x433828 STR X8, [SP, #104] |
(637) 0x43382c SUB X8, X29, #160 |
(637) 0x433830 STR X8, [SP, #96] |
(637) 0x433834 ADD X8, SP, #720 |
(637) 0x433838 STR X8, [SP, #88] |
(637) 0x43383c SUB X8, X29, #168 |
(637) 0x433840 STR X8, [SP, #80] |
(637) 0x433844 ADD X8, SP, #736 |
(637) 0x433848 STR X8, [SP, #72] |
(637) 0x43384c SUB X8, X29, #152 |
(637) 0x433850 STR X8, [SP, #64] |
(637) 0x433854 SUB X8, X29, #136 |
(637) 0x433858 STR X8, [SP, #56] |
(637) 0x43385c ADD X8, SP, #728 |
(637) 0x433860 STR X8, [SP, #48] |
(637) 0x433864 SUB X8, X29, #144 |
(637) 0x433868 STR X8, [SP, #40] |
(637) 0x43386c ADD X8, SP, #744 |
(637) 0x433870 STR X8, [SP, #32] |
(637) 0x433874 ADD X8, SP, #760 |
(637) 0x433878 STR X8, [SP, #24] |
(637) 0x43387c ADD X8, SP, #464 |
(637) 0x433880 STR X8, [SP, #16] |
(637) 0x433884 ADD X8, SP, #648 |
(637) 0x433888 STR X8, [SP, #8] |
(637) 0x43388c ADD X8, SP, #752 |
(637) 0x433890 STR X8, [SP] |
(637) 0x433894 BL 40f990 |
(637) 0x433898 LDR X8, [SP, #728] |
(637) 0x43389c LDR X9, [SP, #648] |
(637) 0x4338a0 LDR X0, [X8, X9,LSL #3] |
(637) 0x4338a4 BL 4a91d0 |
(637) 0x4338a8 LDR X9, [SP, #728] |
(637) 0x4338ac LDR X8, [SP, #648] |
(637) 0x4338b0 STR XZR, [X9, X8,LSL #3] |
(637) 0x4338b4 LDR X9, [SP, #528] |
(637) 0x4338b8 CMP X9, #2 |
(637) 0x4338bc B.LT 433368 |
(637) 0x4338c0 LDR X9, [SP, #720] |
(637) 0x4338c4 LDR X0, [X9, X8,LSL #3] |
(637) 0x4338c8 BL 4a91d0 |
(637) 0x4338cc LDR X8, [SP, #720] |
(637) 0x4338d0 LDR X9, [SP, #648] |
(637) 0x4338d4 STR XZR, [X8, X9,LSL #3] |
(637) 0x4338d8 LDR X8, [SP, #712] |
(637) 0x4338dc LDR X0, [X8, X9,LSL #3] |
(637) 0x4338e0 BL 4a91d0 |
(637) 0x4338e4 LDR X9, [SP, #712] |
(637) 0x4338e8 LDR X8, [SP, #648] |
(637) 0x4338ec STR XZR, [X9, X8,LSL #3] |
(637) 0x4338f0 B 433368 |
(629) 0x4338f4 ORR X24, XZR, XZR |
(629) 0x4338f8 LDUR X0, [X29, #288] |
(629) 0x4338fc BL 4a91d0 |
(629) 0x433900 STUR XZR, [X29, #288] |
(629) 0x433904 ORR X0, XZR, X19 |
(629) 0x433908 BL 4a91d0 |
(629) 0x43390c LDR X0, [SP, #400] |
(629) 0x433910 BL 4a91d0 |
(629) 0x433914 LDUR X0, [X29, #280] |
(629) 0x433918 BL 4a91d0 |
(629) 0x43391c STUR XZR, [X29, #280] |
(629) 0x433920 ORR X0, XZR, X24 |
(629) 0x433924 BL 4a91d0 |
(629) 0x433928 LDR X0, [SP, #568] |
(629) 0x43392c BL 4a91d0 |
(629) 0x433930 LDR X0, [SP, #728] |
(629) 0x433934 STR XZR, [SP, #568] |
(629) 0x433938 BL 4a91d0 |
(629) 0x43393c LDR X0, [SP, #720] |
(629) 0x433940 STR XZR, [SP, #728] |
(629) 0x433944 BL 4a91d0 |
(629) 0x433948 LDR X0, [SP, #712] |
(629) 0x43394c STR XZR, [SP, #720] |
(629) 0x433950 BL 4a91d0 |
(629) 0x433954 LDR X0, [SP, #744] |
(629) 0x433958 STR XZR, [SP, #712] |
(629) 0x43395c BL 4a91d0 |
(629) 0x433960 LDR X0, [SP, #736] |
(629) 0x433964 STR XZR, [SP, #744] |
(629) 0x433968 BL 4a91d0 |
(629) 0x43396c LDUR X0, [X29, #304] |
(629) 0x433970 STR XZR, [SP, #736] |
(629) 0x433974 BL 4a91d0 |
(629) 0x433978 LDR X0, [SP, #696] |
(629) 0x43397c STUR XZR, [X29, #304] |
(629) 0x433980 BL 4a91d0 |
(629) 0x433984 LDR X0, [SP, #592] |
(629) 0x433988 STR XZR, [SP, #696] |
(629) 0x43398c BL 4a91d0 |
(629) 0x433990 LDR X0, [SP, #584] |
(629) 0x433994 STR XZR, [SP, #592] |
(629) 0x433998 BL 4a91d0 |
(629) 0x43399c LDR X0, [SP, #576] |
(629) 0x4339a0 STR XZR, [SP, #584] |
(629) 0x4339a4 BL 4a91d0 |
(629) 0x4339a8 LDR X0, [SP, #752] |
(629) 0x4339ac STR XZR, [SP, #576] |
(629) 0x4339b0 BL 4a91d0 |
(629) 0x4339b4 LDR X0, [SP, #760] |
(629) 0x4339b8 STR XZR, [SP, #752] |
(629) 0x4339bc BL 4a91d0 |
(629) 0x4339c0 LDR X0, [SP, #688] |
(629) 0x4339c4 STR XZR, [SP, #760] |
(629) 0x4339c8 BL 4a91d0 |
(629) 0x4339cc LDR X0, [SP, #680] |
(629) 0x4339d0 STR XZR, [SP, #688] |
(629) 0x4339d4 BL 4a91d0 |
(629) 0x4339d8 LDR X8, [SP, #528] |
(629) 0x4339dc STR XZR, [SP, #680] |
(629) 0x4339e0 CMP X8, #2 |
(629) 0x4339e4 B.LT 4339f0 |
(629) 0x4339e8 LDR X0, [SP, #384] |
(629) 0x4339ec BL 4a91d0 |
(629) 0x4339f0 LDP X8, X4, [SP, #312] |
(629) 0x4339f4 LDR X9, [SP, #632] |
(629) 0x4339f8 LDR X2, [SP, #520] |
(629) 0x4339fc ORR X5, XZR, XZR |
(629) 0x433a00 LDR X0, [SP, #376] |
(629) 0x433a04 LDR X1, [X8, #8] |
(629) 0x433a08 LDR X3, [X8, #104] |
(629) 0x433a0c LDUR X8, [X29, #368] |
(629) 0x433a10 LDR X6, [X8, X9,LSL #3] |
(629) 0x433a14 LDUR X8, [X29, #344] |
(629) 0x433a18 LDR X7, [X8, X9,LSL #3] |
(629) 0x433a1c BL 48b0e0 |
(629) 0x433a20 LDP X8, X9, [X29, #880] |
(629) 0x433a24 LDP X20, X22, [X0, #56] |
(629) 0x433a28 LDR X1, [SP, #304] |
(629) 0x433a2c FCMP D8, #0 |
(629) 0x433a30 ORR X19, XZR, X0 |
(629) 0x433a34 LDR X23, [SP, #432] |
(629) 0x433a38 STR XZR, [X0, #136] |
(629) 0x433a3c STR X8, [X20] |
(629) 0x433a40 STR X9, [X20, #48] |
(629) 0x433a44 LDP X8, X9, [X29, #864] |
(629) 0x433a48 STR X8, [X22, #48] |
(629) 0x433a4c LDUR X8, [X29, #344] |
(629) 0x433a50 STR X9, [X20, #8] |
(629) 0x433a54 STR X8, [X22] |
(629) 0x433a58 LDUR X9, [X29, #336] |
(629) 0x433a5c STR X9, [X22, #8] |
(629) 0x433a60 B.NE 433a68 |
(629) 0x433a64 CBZ X1, 433a94 |
(629) 0x433a68 FMOV D0, D8 |
(629) 0x433a6c ORR X0, XZR, X19 |
(629) 0x433a70 BL 428f90 |
(629) 0x433a74 LDR X8, [X20, #48] |
(629) 0x433a78 STUR X8, [X29, #376] |
(629) 0x433a7c LDP X8, X9, [X20] |
(629) 0x433a80 STP X9, X8, [X29, #872] |
(629) 0x433a84 LDR X8, [X22, #48] |
(629) 0x433a88 STUR X8, [X29, #352] |
(629) 0x433a8c LDP X8, X9, [X22] |
(629) 0x433a90 STP X9, X8, [X29, #848] |
(629) 0x433a94 LDR X9, [SP, #632] |
(629) 0x433a98 LDR X21, [X8, X9,LSL #3] |
(629) 0x433a9c STR XZR, [SP, #472] |
(629) 0x433aa0 STR X21, [SP, #496] |
(629) 0x433aa4 CBZ X21, 433cac |
(629) 0x433aa8 LDR X8, [SP, #480] |
(629) 0x433aac LDUR X9, [X29, #384] |
(629) 0x433ab0 MOVZ W1, #8 |
(629) 0x433ab4 CMP X8, X9 |
(629) 0x433ab8 CSEL X0, X8, X9, #12 |
(629) 0x433abc BL 4a90d0 |
(629) 0x433ac0 STUR X0, [X29, #272] |
(629) 0x433ac4 ADRP X0, |
(629) 0x433ac8 ADD X0, X0, #912 |
(629) 0x433acc ADRP X2, 437acc |
(629) 0x433ad0 ADD X2, X2, #1472 |
(629) 0x433ad4 ADD X3, SP, #480 |
(629) 0x433ad8 SUB X4, X29, #240 |
(629) 0x433adc MOVZ W1, #2 |
(629) 0x433ae0 BL 40f990 |
(629) 0x433ae4 STR XZR, [SP, #472] |
(629) 0x433ae8 STR XZR, [SP, #560] |
(629) 0x433aec CMP X21, #1 |
(629) 0x433af0 B.LT 433b3c |
(629) 0x433af4 LDUR X8, [X29, #336] |
(629) 0x433af8 LDUR X9, [X29, #272] |
(629) 0x433afc MOVZ W11, #1 |
(629) 0x433b00 ORR X20, XZR, XZR |
(629) 0x433b04 ORR X10, XZR, XZR |
(629) 0x433b08 B 433b1c |
(636) 0x433b0c ADD X10, X10, #1 |
(636) 0x433b10 STR X10, [SP, #560] |
(636) 0x433b14 CMP X10, X21 |
(636) 0x433b18 B.GE 433b40 |
(636) 0x433b1c LDR X12, [X8, X10,LSL #3] |
(636) 0x433b20 LDR X13, [X9, X12,LSL #3] |
(636) 0x433b24 CBNZ X13, 433b0c |
(636) 0x433b28 ADD X20, X20, #1 |
(636) 0x433b2c STR X20, [SP, #472] |
(636) 0x433b30 STR X11, [X9, X12,LSL #3] |
(636) 0x433b34 LDR X10, [SP, #560] |
(636) 0x433b38 B 433b0c |
(629) 0x433b3c ORR X20, XZR, XZR |
(629) 0x433b40 MOVZ W1, #8 |
(629) 0x433b44 ORR X0, XZR, X20 |
(629) 0x433b48 BL 4a90d0 |
(629) 0x433b4c LDR X8, [SP, #704] |
(629) 0x433b50 LDR X9, [SP, #640] |
(629) 0x433b54 ORR X21, XZR, X0 |
(629) 0x433b58 STR X0, [SP, #672] |
(629) 0x433b5c MOVZ W1, #8 |
(629) 0x433b60 ADD X8, X8, X9,LSL #3 |
(629) 0x433b64 LDUR X0, [X8, #504] |
(629) 0x433b68 BL 4a90d0 |
(629) 0x433b6c STR X0, [SP, #664] |
(629) 0x433b70 ADRP X0, |
(629) 0x433b74 ADD X0, X0, #984 |
(629) 0x433b78 ADRP X2, 437b78 |
(629) 0x433b7c ADD X2, X2, #1664 |
(629) 0x433b80 ADD X3, SP, #704 |
(629) 0x433b84 ADD X4, SP, #640 |
(629) 0x433b88 ADD X5, SP, #664 |
(629) 0x433b8c MOVZ W1, #3 |
(629) 0x433b90 BL 40f990 |
(629) 0x433b94 LDR X12, [SP, #640] |
(629) 0x433b98 STR XZR, [SP, #560] |
(629) 0x433b9c CMP X12, #1 |
(629) 0x433ba0 B.LE 433c40 |
(629) 0x433ba4 LDR X9, [SP, #704] |
(629) 0x433ba8 LDUR X10, [X29, #272] |
(629) 0x433bac ORR X8, XZR, XZR |
(629) 0x433bb0 ORR X11, XZR, XZR |
(629) 0x433bb4 B 433bd8 |
0x433bb8 HINT #0 |
0x433bbc HINT #0 |
(634) 0x433bc0 LDR X12, [SP, #640] |
(634) 0x433bc4 SUB X13, X12, #1 |
(634) 0x433bc8 STR X14, [SP, #560] |
(634) 0x433bcc ORR X11, XZR, X14 |
(634) 0x433bd0 CMP X14, X13 |
(634) 0x433bd4 B.GE 433c40 |
(634) 0x433bd8 ADD X14, X11, #1 |
(634) 0x433bdc LDR X13, [X9, X11,LSL #3] |
(634) 0x433be0 LDR X15, [X9, X14,LSL #3] |
(634) 0x433be4 CMP X13, X15 |
(634) 0x433be8 B.GE 433bc4 |
(634) 0x433bec LDR X12, [SP, #664] |
(634) 0x433bf0 B 433c14 |
0x433bf4 HINT #0 |
0x433bf8 HINT #0 |
0x433bfc HINT #0 |
(635) 0x433c00 ADD X14, X11, #1 |
(635) 0x433c04 ADD X13, X13, #1 |
(635) 0x433c08 LDR X15, [X9, X14,LSL #3] |
(635) 0x433c0c CMP X13, X15 |
(635) 0x433c10 B.GE 433bc0 |
(635) 0x433c14 LDR X14, [X10, X13,LSL #3] |
(635) 0x433c18 CBZ X14, 433c00 |
(635) 0x433c1c LDR X14, [X23, X11,LSL #3] |
(635) 0x433c20 LDR X11, [X9, X11,LSL #3] |
(635) 0x433c24 SUB X11, X14, X11,LSL #3 |
(635) 0x433c28 LDR X11, [X11, X13,LSL #3] |
(635) 0x433c2c STR X11, [X21, X8,LSL #3] |
(635) 0x433c30 STR X11, [X12, X13,LSL #3] |
(635) 0x433c34 ADD X8, X8, #1 |
(635) 0x433c38 LDR X11, [SP, #560] |
(635) 0x433c3c B 433c00 |
(629) 0x433c40 SUB X2, X20, #1 |
(629) 0x433c44 ORR X0, XZR, X21 |
(629) 0x433c48 ORR X1, XZR, XZR |
(629) 0x433c4c BL 4a98b0 |
(629) 0x433c50 ADRP X0, |
(629) 0x433c54 ADD X0, X0, #1056 |
(629) 0x433c58 ADRP X2, 437c58 |
(629) 0x433c5c ADD X2, X2, #1872 |
(629) 0x433c60 ADD X3, SP, #704 |
(629) 0x433c64 ADD X4, SP, #640 |
(629) 0x433c68 ADD X5, SP, #664 |
(629) 0x433c6c ADD X6, SP, #672 |
(629) 0x433c70 ADD X7, SP, #472 |
(629) 0x433c74 MOVZ W1, #5 |
(629) 0x433c78 BL 40f990 |
(629) 0x433c7c ADRP X0, |
(629) 0x433c80 ADD X0, X0, #1128 |
(629) 0x433c84 ADRP X2, 437c84 |
(629) 0x433c88 ADD X2, X2, #2128 |
(629) 0x433c8c ADD X3, SP, #496 |
(629) 0x433c90 SUB X4, X29, #176 |
(629) 0x433c94 ADD X5, SP, #664 |
(629) 0x433c98 MOVZ W1, #3 |
(629) 0x433c9c BL 40f990 |
(629) 0x433ca0 LDUR X0, [X29, #272] |
(629) 0x433ca4 BL 4a91d0 |
(629) 0x433ca8 STUR XZR, [X29, #272] |
(629) 0x433cac LDR X8, [SP, #528] |
(629) 0x433cb0 CMP X8, #2 |
(629) 0x433cb4 B.LT 433cf4 |
(629) 0x433cb8 LDR X8, [SP, #640] |
(629) 0x433cbc STR XZR, [SP, #560] |
(629) 0x433cc0 CMP X8, #2 |
(629) 0x433cc4 B.LT 433cf4 |
(629) 0x433cc8 ORR X8, XZR, XZR |
(633) 0x433ccc LDR X0, [X23, X8,LSL #3] |
(633) 0x433cd0 BL 4a91d0 |
(633) 0x433cd4 LDR X8, [SP, #560] |
(633) 0x433cd8 LDR X9, [SP, #640] |
(633) 0x433cdc STR XZR, [X23, X8,LSL #3] |
(633) 0x433ce0 ADD X8, X8, #1 |
(633) 0x433ce4 SUB X9, X9, #1 |
(633) 0x433ce8 STR X8, [SP, #560] |
(633) 0x433cec CMP X8, X9 |
(633) 0x433cf0 B.LT 433ccc |
(629) 0x433cf4 LDR X0, [SP, #664] |
(629) 0x433cf8 BL 4a91d0 |
(629) 0x433cfc STR XZR, [SP, #664] |
(629) 0x433d00 ORR X0, XZR, X23 |
(629) 0x433d04 BL 4a91d0 |
(629) 0x433d08 LDR X0, [SP, #704] |
(629) 0x433d0c BL 4a91d0 |
(629) 0x433d10 LDR X8, [SP, #472] |
(629) 0x433d14 STR XZR, [SP, #704] |
(629) 0x433d18 CBZ X8, 433d28 |
(629) 0x433d1c LDR X9, [SP, #672] |
(629) 0x433d20 STR X8, [X22, #24] |
(629) 0x433d24 STR X9, [X19, #88] |
(629) 0x433d28 LDR X20, [X29, #112] |
(629) 0x433d2c LDR X8, [SP, #608] |
(629) 0x433d30 CBZ X8, 433d54 |
(629) 0x433d34 ADRP X0, |
(629) 0x433d38 ADD X0, X0, #1200 |
(629) 0x433d3c ADRP X2, 437d3c |
(629) 0x433d40 ADD X2, X2, #2400 |
(629) 0x433d44 ADD X3, SP, #632 |
(629) 0x433d48 SUB X4, X29, #8 |
(629) 0x433d4c MOVZ W1, #2 |
(629) 0x433d50 BL 40f990 |
(629) 0x433d54 LDR X8, [SP, #528] |
(629) 0x433d58 CMP X8, #2 |
(629) 0x433d5c B.LT 433d68 |
(629) 0x433d60 ORR X0, XZR, X19 |
(629) 0x433d64 BL 482410 |
(629) 0x433d68 STR X19, [X20] |
(629) 0x433d6c ORR X0, XZR, XZR |
(629) 0x433d70 ADD SP, SP, #1008 |
(629) 0x433d74 LDP X20, X19, [SP, #96] |
(629) 0x433d78 LDP X22, X21, [SP, #80] |
(629) 0x433d7c LDP X24, X23, [SP, #64] |
(629) 0x433d80 LDP X26, X25, [SP, #48] |
(629) 0x433d84 LDP X28, X27, [SP, #32] |
(629) 0x433d88 LDP X29, X30, [SP, #16] |
(629) 0x433d8c LDR D8, [SP], #112 |
(629) 0x433d90 RET |
(629) 0x433d94 ORR X8, XZR, XZR |
(629) 0x433d98 MOVZ W1, #8 |
(629) 0x433d9c STR X8, [X0, #8] |
(629) 0x433da0 ORR X0, XZR, X22 |
(629) 0x433da4 BL 4a90d0 |
(629) 0x433da8 ORR X20, XZR, X0 |
(629) 0x433dac ADD X0, X22, #1 |
(629) 0x433db0 MOVZ W1, #8 |
(629) 0x433db4 BL 4a90d0 |
(629) 0x433db8 STR XZR, [X0] |
(629) 0x433dbc STR X0, [SP, #704] |
(629) 0x433dc0 LDR X8, [SP, #616] |
(629) 0x433dc4 STR X26, [X20] |
(629) 0x433dc8 STR X8, [X0, #8] |
(629) 0x433dcc STR X8, [SP, #480] |
(629) 0x433dd0 LDR X8, [SP, #752] |
(629) 0x433dd4 LDP X1, X9, [X8, #8] |
(629) 0x433dd8 STR X1, [SP, #560] |
(629) 0x433ddc CMP X1, X9 |
(629) 0x433de0 B.GE 43203c |
(630) 0x433de4 LDR X11, [SP, #760] |
(630) 0x433de8 LDR X12, [SP, #744] |
(630) 0x433dec LDR X13, [SP, #736] |
(630) 0x433df0 ORR X9, XZR, XZR |
(630) 0x433df4 ORR X10, XZR, XZR |
(630) 0x433df8 LDP X15, X14, [X29, #920] |
(630) 0x433dfc LDUR X16, [X29, #504] |
(630) 0x433e00 LDP X18, X17, [X29, #904] |
(630) 0x433e04 LDUR X0, [X29, #288] |
(630) 0x433e08 B 433e24 |
(630) 0x433e0c LDR X1, [SP, #560] |
(630) 0x433e10 LDR X2, [X8, #16] |
(630) 0x433e14 ADD X1, X1, #1 |
(630) 0x433e18 STR X1, [SP, #560] |
(630) 0x433e1c CMP X1, X2 |
(630) 0x433e20 B.GE 432044 |
(630) 0x433e24 LDR X2, [X11, X1,LSL #3] |
(630) 0x433e28 STR X10, [X12, X2,LSL #3] |
(630) 0x433e2c STR X9, [X13, X2,LSL #3] |
(630) 0x433e30 ADD X1, X2, #1 |
(630) 0x433e34 LDR X3, [X14, X2,LSL #3] |
(630) 0x433e38 LDR X6, [X14, X1,LSL #3] |
(630) 0x433e3c CMP X3, X6 |
(630) 0x433e40 B.GE 433ea0 |
(630) 0x433e44 LDR X4, [SP, #592] |
(630) 0x433e48 LDR X5, [SP, #728] |
(630) 0x433e4c B 433e6c |
0x433e50 HINT #0 |
0x433e54 HINT #0 |
0x433e58 HINT #0 |
0x433e5c HINT #0 |
(632) 0x433e60 ADD X3, X3, #1 |
(632) 0x433e64 CMP X3, X6 |
(632) 0x433e68 B.GE 433ea0 |
(632) 0x433e6c LDR X7, [X15, X3,LSL #3] |
(632) 0x433e70 LDR X19, [X16, X7,LSL #3] |
(632) 0x433e74 CMP X19, #1 |
(632) 0x433e78 B.NE 433e60 |
(632) 0x433e7c LDR X6, [X4, X7,LSL #3] |
(632) 0x433e80 LDR X7, [X5, #8] |
(632) 0x433e84 STR X6, [X7, X10,LSL #3] |
(632) 0x433e88 ADD X10, X10, #1 |
(632) 0x433e8c LDR X6, [X14, X1,LSL #3] |
(632) 0x433e90 B 433e60 |
0x433e94 HINT #0 |
0x433e98 HINT #0 |
0x433e9c HINT #0 |
(630) 0x433ea0 LDR X2, [X17, X2,LSL #3] |
(630) 0x433ea4 LDR X5, [X17, X1,LSL #3] |
(630) 0x433ea8 CMP X2, X5 |
(630) 0x433eac B.GE 433e0c |
(631) 0x433eb0 LDR X3, [SP, #688] |
(631) 0x433eb4 LDR X4, [SP, #720] |
(631) 0x433eb8 B 433ecc |
0x433ebc HINT #0 |
(631) 0x433ec0 ADD X2, X2, #1 |
(631) 0x433ec4 CMP X2, X5 |
(631) 0x433ec8 B.GE 433e0c |
(631) 0x433ecc LDR X6, [X18, X2,LSL #3] |
(631) 0x433ed0 LDR X7, [X0, X6,LSL #3] |
(631) 0x433ed4 CMP X7, #1 |
(631) 0x433ed8 B.NE 433ec0 |
(631) 0x433edc LDR X5, [X3, X6,LSL #3] |
(631) 0x433ee0 LDR X6, [X4, #8] |
(631) 0x433ee4 STR X5, [X6, X9,LSL #3] |
(631) 0x433ee8 ADD X9, X9, #1 |
(631) 0x433eec LDR X5, [X17, X1,LSL #3] |
(631) 0x433ef0 B 433ec0 |
0x433ef4 HINT #0 |
0x433ef8 HINT #0 |
0x433efc HINT #0 |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ►100.00+ | hypre_BoomerAMGSetup | par_amg_setup.c:785 | exec |
| ○ | hypre_PCGSetup | pcg.c:234 | exec |
| ○ | main | amg.c:398 | exec |
| ○ | __libc_start_call_main | libc.so.6 | |
| ○ | __libc_start_main | libc.so.6 | |
| ○ | _start | exec |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0
| Source file and lines | par_multi_interp.c:41-2060 |
| Module | exec |
| nb instructions | 555 |
| loop length | 2220 |
| nb stack references | 0 |
| front end | 60.63 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | P16 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 48.00 | 48.00 | 34.00 | 34.00 | 34.00 | 34.00 | 34.00 | 34.00 | 0.50 | 0.50 | 0.50 | 0.50 | 77.00 | 77.00 | 77.00 | 55.50 | 55.50 |
| cycles | 48.00 | 48.00 | 34.00 | 34.00 | 34.00 | 34.00 | 34.00 | 34.00 | 0.50 | 0.50 | 0.50 | 0.50 | 77.00 | 77.00 | 77.00 | 55.50 | 55.50 |
| Cycles executing div or sqrt instructions | NA |
| Front-end | 60.63 |
| Overall L1 | 77.00 |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 0% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | P16 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| STR D8, [SP, #400]! | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 | scal (50.0%) |
| STP X29, X30, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STP X28, X27, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STP X26, X25, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STP X24, X23, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STP X22, X21, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STP X20, X19, [SP, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| ADD X29, SP, #16 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SUB SP, SP, #1008 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| LDP X21, X23, [X0, #56] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| STUR X1, [X29, #504] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X10, [X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| FMOV D8, D0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 | scal (50.0%) |
| LDR X24, [X0, #88] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X26, [X2, #88] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| STP X7, X0, [SP, #304] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| MOVZ W0, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X3, [SP, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STUR XZR, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #624] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #616] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #608] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X8, [X21, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X22, [X23, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR XZR, [SP, #600] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STUR X4, [X29, #480] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #480] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X8, X5, [X29, #976] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| LDP X8, X9, [X21] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| STP XZR, X9, [X29, #952] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STUR X8, [X29, #456] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X8, [X23] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STP XZR, X8, [X29, #936] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| LDP X8, X25, [X2, #56] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| LDP X9, X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| LDR X28, [X25, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| STP X8, X9, [X29, #920] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| LDR X9, [X2, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X25] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR XZR, [X29, #392] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STUR XZR, [X29, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STUR XZR, [X29, #336] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP XZR, XZR, [X29, #808] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STP XZR, XZR, [X29, #792] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STUR XZR, [X29, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STUR XZR, [X29, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #760] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #752] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #736] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #720] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #712] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #704] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #696] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #688] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #680] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #672] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #664] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #592] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #584] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #576] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #568] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X9, X10, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STUR X8, [X29, #400] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| MOVN X8, #0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STP X8, XZR, [SP, #488] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X19, XZR, X0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [SP, #456] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| BL 4aae10 <hypre_NumThreads> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [X19] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X20, XZR, X0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| STR X0, [SP, #448] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X0, [X19] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X0, [SP, #440] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X8, [X19] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LT 431424 <hypre_BoomerAMGBuildMultipass+0x184> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X8, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| LDR X19, [SP, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ADD X1, SP, #528 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X0, XZR, X19 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4aa2b0 <hypre_MPI_Comm_size> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ADD X1, SP, #536 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X0, XZR, X19 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4aa2e0 <hypre_MPI_Comm_rank> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X9, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [SP, #536] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| SUB X3, X9, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CMP X8, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.NE 431460 <hypre_BoomerAMGBuildMultipass+0x1c0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #520] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X8, [SP, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ADRP X2, <4ef464> | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X0, SP, #520 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOVZ W1, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| LDR X27, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| LDR X2, [X2, #3928] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X4, [SP, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| BL 4aa8a0 <hypre_MPI_Bcast> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBZ X8, 431558 <hypre_BoomerAMGBuildMultipass+0x2b8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [X29, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X8, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| CSEL X8, X22, X28, #0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CSEL X20, X24, X26, #0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| STUR X8, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CBZ X22, 4314b0 <hypre_BoomerAMGBuildMultipass+0x210> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X9, [X23, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X9, [X29, #440] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X9, [X23, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X9, [X29, #424] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CBZ X8, 4314bc <hypre_BoomerAMGBuildMultipass+0x21c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [X25, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X8, [X29, #392] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X0, [X21, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X0, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CBZ X0, 4314d4 <hypre_BoomerAMGBuildMultipass+0x234> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STR X0, [SP, #592] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| ADRP X0, <4ec4d4> | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X0, X0, #240 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ADRP X2, 4334dc <hypre_BoomerAMGBuildMultipass+0x223c> | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X2, X2, #3888 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ADD X3, SP, #632 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SUB X4, X29, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR XZR, [SP, #624] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #608] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| ADD X5, SP, #624 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ADD X6, SP, #608 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| MOVZ W1, #4 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 40f990 <@plt_start@+0x610> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X9, [SP, #624] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X10, [SP, #608] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| LDR X8, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ADD X9, X10, X9 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SUBS X28, X8, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.EQ 43152c <hypre_BoomerAMGBuildMultipass+0x28c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X0, XZR, X28 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STR X0, [SP, #760] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| MOVZ W0, #11 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STR X0, [SP, #752] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X0, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBZ X0, 43159c <hypre_BoomerAMGBuildMultipass+0x2fc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X0, [SP, #584] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| B 4315a0 <hypre_BoomerAMGBuildMultipass+0x300> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #312] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CBNZ X8, 43157c <hypre_BoomerAMGBuildMultipass+0x2dc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X19, [SP, #312] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ORR X0, XZR, X19 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 482410 <hypre_MatvecCommPkgCreate> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [X19, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| ORR X8, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR XZR, [X29, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X8, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| CSEL X8, X22, X28, #0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CSEL X20, X24, X26, #0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| STUR X8, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CBNZ X22, 4314a0 <hypre_BoomerAMGBuildMultipass+0x200> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| B 4314b0 <hypre_BoomerAMGBuildMultipass+0x210> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X8, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ADD X0, X8, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X0, [X29, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ADD X0, X8, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STUR X0, [X29, #344] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X0, [SP, #624] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBZ X0, 4315d8 <hypre_BoomerAMGBuildMultipass+0x338> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STUR X0, [X29, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDUR X0, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBZ X0, 431608 <hypre_BoomerAMGBuildMultipass+0x368> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X8, [X29, #480] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X0, [X29, #288] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X8, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LT 431608 <hypre_BoomerAMGBuildMultipass+0x368> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X0, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STUR X0, [X29, #280] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X8, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LE 431668 <hypre_BoomerAMGBuildMultipass+0x3c8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X11, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDP X8, X9, [X11, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| STR X9, [SP, #336] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDP X9, X10, [X11, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| STUR X10, [X29, #312] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X10, [X11, #40] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| STP X9, X8, [X29, #832] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| LDR X0, [X9, X8,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X10, [SP, #408] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDP X8, X10, [X11, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| STR X8, [SP, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X10, [SP, #416] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CBZ X0, 431684 <hypre_BoomerAMGBuildMultipass+0x3e4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X25, XZR, X0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| LDUR X13, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.GE 431698 <hypre_BoomerAMGBuildMultipass+0x3f8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| B 4316fc <hypre_BoomerAMGBuildMultipass+0x45c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STR XZR, [SP, #408] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| ORR X25, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| LDUR X13, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.GE 431698 <hypre_BoomerAMGBuildMultipass+0x3f8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| B 4316fc <hypre_BoomerAMGBuildMultipass+0x45c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X25, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| LDUR X13, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LT 4316fc <hypre_BoomerAMGBuildMultipass+0x45c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDP X11, X8, [X29, #824] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| LDUR X9, [X29, #504] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ORR X10, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ORR X12, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| B 4316b8 <hypre_BoomerAMGBuildMultipass+0x418> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LE 431720 <hypre_BoomerAMGBuildMultipass+0x480> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X3, [X29, #288] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X1, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ W0, #11 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X2, XZR, X25 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 481820 <hypre_ParCSRCommHandleCreate> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| BL 481c20 <hypre_ParCSRCommHandleDestroy> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X8, [X29, #480] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X8, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LT 4317d4 <hypre_BoomerAMGBuildMultipass+0x534> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X13, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LT 4317b0 <hypre_BoomerAMGBuildMultipass+0x510> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDP X11, X8, [X29, #824] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| LDUR X9, [X29, #472] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ORR X10, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ORR X12, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| B 43176c <hypre_BoomerAMGBuildMultipass+0x4cc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| LDR X8, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LE 4317d4 <hypre_BoomerAMGBuildMultipass+0x534> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X3, [X29, #280] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X1, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ W0, #11 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X2, XZR, X25 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 481820 <hypre_ParCSRCommHandleCreate> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| BL 481c20 <hypre_ParCSRCommHandleDestroy> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ADRP X0, <4ec7d4> | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X0, X0, #336 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ADRP X2, 4347dc <hypre_BoomerAMGBuildMultipass.omp_outlined.10+0x18c> | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X2, X2, #272 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SUB X3, X29, #128 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SUB X4, X29, #224 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR XZR, [SP, #616] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #600] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| ADD X5, SP, #616 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ADD X6, SP, #600 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| MOVZ W1, #4 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 40f990 <@plt_start@+0x610> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X0, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBZ X0, 43184c <hypre_BoomerAMGBuildMultipass+0x5ac> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STR X0, [SP, #576] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDUR X0, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STR X0, [SP, #688] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDUR X0, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X19, XZR, X0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| LDR X0, [SP, #616] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X26, XZR, X0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| B 431854 <hypre_BoomerAMGBuildMultipass+0x5b4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X19, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X26, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| SUB X8, X28, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| LDUR X9, [X29, #344] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #432] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDUR X8, [X29, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR XZR, [X8], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [X9], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X10, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| CMP X10, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LT 431938 <hypre_BoomerAMGBuildMultipass+0x698> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X10, [X29, #504] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| LDR X11, [SP, #760] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X12, [SP, #584] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| MOVN X15, #0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| MOVZ W16, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (25.0%) |
| ORR X13, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ORR X0, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| LDR X14, [SP, #592] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| LDR X18, [SP, #432] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| LDUR X17, [X29, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| B 4318e8 <hypre_BoomerAMGBuildMultipass+0x648> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X13, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LT 4319bc <hypre_BoomerAMGBuildMultipass+0x71c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDP X11, X9, [X29, #824] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| LDR X10, [SP, #592] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| ORR X8, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X12, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| B 43196c <hypre_BoomerAMGBuildMultipass+0x6cc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| HINT #0 | N/A | ||||||||||||||||||||
| LDR X8, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LE 4319e0 <hypre_BoomerAMGBuildMultipass+0x740> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X1, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ W0, #11 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X2, XZR, X25 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X3, XZR, X19 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 481820 <hypre_ParCSRCommHandleCreate> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| BL 481c20 <hypre_ParCSRCommHandleDestroy> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #408] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ADD X0, X8, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X21, XZR, X0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| LDR X0, [SP, #616] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBZ X0, 431a08 <hypre_BoomerAMGBuildMultipass+0x768> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STUR X0, [X29, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X8, [SP, #408] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR XZR, [X21] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LT 431ac0 <hypre_BoomerAMGBuildMultipass+0x820> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X9, [X29, #288] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVN X11, #0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X8, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X10, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| B 431a3c <hypre_BoomerAMGBuildMultipass+0x79c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X0, XZR, X19 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a91d0 <hypre_Free> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [X29, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBZ X8, 431b54 <hypre_BoomerAMGBuildMultipass+0x8b4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X0, XZR, X22 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STR X0, [SP, #680] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X22, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LT 431b54 <hypre_BoomerAMGBuildMultipass+0x8b4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X8, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X9, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| B 431b2c <hypre_BoomerAMGBuildMultipass+0x88c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| LDR X8, [SP, #752] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X18, [SP, #432] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| STP XZR, XZR, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STR XZR, [SP, #512] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X18, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X9, [SP, #624] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X9, [SP, #656] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X28, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LT 431cb0 <hypre_BoomerAMGBuildMultipass+0xa10> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X9, [SP, #760] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDP X11, X10, [X29, #920] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| LDUR X12, [X29, #504] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| MOVZ W16, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (25.0%) |
| ORR X19, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X23, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X20, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| LDP X14, X13, [X29, #904] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| LDUR X15, [X29, #288] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| LDR X17, [SP, #584] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| B 431bb4 <hypre_BoomerAMGBuildMultipass+0x914> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| ORR X20, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ORR X23, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X19, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| LDUR X13, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| STR X23, [X8, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LT 431d34 <hypre_BoomerAMGBuildMultipass+0xa94> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDP X11, X8, [X29, #824] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| LDR X9, [SP, #584] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ORR X10, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ORR X12, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| B 431cf0 <hypre_BoomerAMGBuildMultipass+0xa50> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LE 431d58 <hypre_BoomerAMGBuildMultipass+0xab8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X3, [SP, #576] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X1, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ W0, #11 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X2, XZR, X25 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 481820 <hypre_ParCSRCommHandleCreate> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| BL 481c20 <hypre_ParCSRCommHandleDestroy> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W8, #2 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ADRP X3, <4efd5c> | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADRP X4, <4efd60> | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X0, SP, #544 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ADD X1, SP, #552 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOVZ W2, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X8, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| SUB X8, X28, X23 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X8, [SP, #544] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X3, [X3, #3928] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X4, [X4, #3784] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X5, [SP, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| BL 4aaae0 <hypre_MPI_Allreduce> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #552] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBZ X8, 431f98 <hypre_BoomerAMGBuildMultipass+0xcf8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X8, #9 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.GT 431f98 <hypre_BoomerAMGBuildMultipass+0xcf8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ADRP X24, <4efda0> | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADRP X22, <4efda4> | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LDR X24, [X24, #3928] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X22, [X22, #3784] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| ORR X0, XZR, X25 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a91d0 <hypre_Free> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X22, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X22, [SP, #640] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| ORR X0, XZR, X22 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [SP, #728] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| ORR X0, XZR, X20 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #728] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [X8, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X0, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STR X0, [SP, #744] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X0, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X0, [SP, #736] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X8, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LT 432024 <hypre_BoomerAMGBuildMultipass+0xd84> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X0, XZR, X22 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STR X0, [SP, #720] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CBZ X19, 433d94 <hypre_BoomerAMGBuildMultipass+0x2af4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X0, XZR, X19 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X8, XZR, X0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| LDR X0, [SP, #720] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| B 433d98 <hypre_BoomerAMGBuildMultipass+0x2af8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X20, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| LDR X8, [SP, #752] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDP X1, X9, [X8, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| STR X1, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X1, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| B.LT 433de4 <hypre_BoomerAMGBuildMultipass+0x2b44> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A |
The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0
| Source file and lines | par_multi_interp.c:41-2060 |
| Module | exec |
| nb instructions | 555 |
| loop length | 2220 |
| nb stack references | 0 |
| front end | 60.63 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | P16 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 48.00 | 48.00 | 34.00 | 34.00 | 34.00 | 34.00 | 34.00 | 34.00 | 0.50 | 0.50 | 0.50 | 0.50 | 77.00 | 77.00 | 77.00 | 55.50 | 55.50 |
| cycles | 48.00 | 48.00 | 34.00 | 34.00 | 34.00 | 34.00 | 34.00 | 34.00 | 0.50 | 0.50 | 0.50 | 0.50 | 77.00 | 77.00 | 77.00 | 55.50 | 55.50 |
| Cycles executing div or sqrt instructions | NA |
| Front-end | 60.63 |
| Overall L1 | 77.00 |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 0% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | P16 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| STR D8, [SP, #400]! | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 | scal (50.0%) |
| STP X29, X30, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STP X28, X27, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STP X26, X25, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STP X24, X23, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STP X22, X21, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STP X20, X19, [SP, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| ADD X29, SP, #16 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SUB SP, SP, #1008 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| LDP X21, X23, [X0, #56] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| STUR X1, [X29, #504] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X10, [X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| FMOV D8, D0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 | scal (50.0%) |
| LDR X24, [X0, #88] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X26, [X2, #88] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| STP X7, X0, [SP, #304] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| MOVZ W0, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X3, [SP, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STUR XZR, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #624] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #616] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #608] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X8, [X21, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X22, [X23, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR XZR, [SP, #600] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STUR X4, [X29, #480] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #480] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X8, X5, [X29, #976] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| LDP X8, X9, [X21] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| STP XZR, X9, [X29, #952] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STUR X8, [X29, #456] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X8, [X23] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STP XZR, X8, [X29, #936] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| LDP X8, X25, [X2, #56] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| LDP X9, X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| LDR X28, [X25, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| STP X8, X9, [X29, #920] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| LDR X9, [X2, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X25] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR XZR, [X29, #392] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STUR XZR, [X29, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STUR XZR, [X29, #336] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP XZR, XZR, [X29, #808] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STP XZR, XZR, [X29, #792] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STUR XZR, [X29, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STUR XZR, [X29, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #760] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #752] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #736] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #720] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #712] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #704] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #696] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #688] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #680] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #672] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #664] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #592] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #584] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #576] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #568] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X9, X10, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STUR X8, [X29, #400] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| MOVN X8, #0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STP X8, XZR, [SP, #488] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X19, XZR, X0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [SP, #456] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| BL 4aae10 <hypre_NumThreads> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [X19] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X20, XZR, X0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| STR X0, [SP, #448] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X0, [X19] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X0, [SP, #440] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X8, [X19] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LT 431424 <hypre_BoomerAMGBuildMultipass+0x184> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X8, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| LDR X19, [SP, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ADD X1, SP, #528 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X0, XZR, X19 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4aa2b0 <hypre_MPI_Comm_size> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ADD X1, SP, #536 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X0, XZR, X19 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4aa2e0 <hypre_MPI_Comm_rank> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X9, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [SP, #536] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| SUB X3, X9, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CMP X8, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.NE 431460 <hypre_BoomerAMGBuildMultipass+0x1c0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #520] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X8, [SP, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ADRP X2, <4ef464> | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X0, SP, #520 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOVZ W1, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| LDR X27, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| LDR X2, [X2, #3928] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X4, [SP, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| BL 4aa8a0 <hypre_MPI_Bcast> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBZ X8, 431558 <hypre_BoomerAMGBuildMultipass+0x2b8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [X29, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X8, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| CSEL X8, X22, X28, #0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CSEL X20, X24, X26, #0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| STUR X8, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CBZ X22, 4314b0 <hypre_BoomerAMGBuildMultipass+0x210> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X9, [X23, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X9, [X29, #440] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X9, [X23, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X9, [X29, #424] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CBZ X8, 4314bc <hypre_BoomerAMGBuildMultipass+0x21c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [X25, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X8, [X29, #392] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X0, [X21, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X0, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CBZ X0, 4314d4 <hypre_BoomerAMGBuildMultipass+0x234> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STR X0, [SP, #592] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| ADRP X0, <4ec4d4> | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X0, X0, #240 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ADRP X2, 4334dc <hypre_BoomerAMGBuildMultipass+0x223c> | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X2, X2, #3888 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ADD X3, SP, #632 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SUB X4, X29, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR XZR, [SP, #624] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #608] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| ADD X5, SP, #624 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ADD X6, SP, #608 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| MOVZ W1, #4 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 40f990 <@plt_start@+0x610> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X9, [SP, #624] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X10, [SP, #608] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| LDR X8, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ADD X9, X10, X9 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SUBS X28, X8, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.EQ 43152c <hypre_BoomerAMGBuildMultipass+0x28c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X0, XZR, X28 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STR X0, [SP, #760] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| MOVZ W0, #11 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STR X0, [SP, #752] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X0, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBZ X0, 43159c <hypre_BoomerAMGBuildMultipass+0x2fc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X0, [SP, #584] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| B 4315a0 <hypre_BoomerAMGBuildMultipass+0x300> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #312] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CBNZ X8, 43157c <hypre_BoomerAMGBuildMultipass+0x2dc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X19, [SP, #312] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ORR X0, XZR, X19 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 482410 <hypre_MatvecCommPkgCreate> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [X19, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| ORR X8, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR XZR, [X29, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X8, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| CSEL X8, X22, X28, #0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CSEL X20, X24, X26, #0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| STUR X8, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CBNZ X22, 4314a0 <hypre_BoomerAMGBuildMultipass+0x200> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| B 4314b0 <hypre_BoomerAMGBuildMultipass+0x210> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X8, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ADD X0, X8, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X0, [X29, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ADD X0, X8, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STUR X0, [X29, #344] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X0, [SP, #624] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBZ X0, 4315d8 <hypre_BoomerAMGBuildMultipass+0x338> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STUR X0, [X29, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDUR X0, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBZ X0, 431608 <hypre_BoomerAMGBuildMultipass+0x368> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X8, [X29, #480] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X0, [X29, #288] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X8, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LT 431608 <hypre_BoomerAMGBuildMultipass+0x368> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X0, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STUR X0, [X29, #280] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X8, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LE 431668 <hypre_BoomerAMGBuildMultipass+0x3c8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X11, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDP X8, X9, [X11, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| STR X9, [SP, #336] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDP X9, X10, [X11, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| STUR X10, [X29, #312] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X10, [X11, #40] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| STP X9, X8, [X29, #832] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| LDR X0, [X9, X8,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X10, [SP, #408] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDP X8, X10, [X11, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| STR X8, [SP, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X10, [SP, #416] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CBZ X0, 431684 <hypre_BoomerAMGBuildMultipass+0x3e4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X25, XZR, X0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| LDUR X13, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.GE 431698 <hypre_BoomerAMGBuildMultipass+0x3f8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| B 4316fc <hypre_BoomerAMGBuildMultipass+0x45c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STR XZR, [SP, #408] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| ORR X25, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| LDUR X13, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.GE 431698 <hypre_BoomerAMGBuildMultipass+0x3f8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| B 4316fc <hypre_BoomerAMGBuildMultipass+0x45c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X25, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| LDUR X13, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LT 4316fc <hypre_BoomerAMGBuildMultipass+0x45c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDP X11, X8, [X29, #824] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| LDUR X9, [X29, #504] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ORR X10, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ORR X12, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| B 4316b8 <hypre_BoomerAMGBuildMultipass+0x418> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LE 431720 <hypre_BoomerAMGBuildMultipass+0x480> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X3, [X29, #288] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X1, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ W0, #11 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X2, XZR, X25 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 481820 <hypre_ParCSRCommHandleCreate> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| BL 481c20 <hypre_ParCSRCommHandleDestroy> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X8, [X29, #480] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X8, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LT 4317d4 <hypre_BoomerAMGBuildMultipass+0x534> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X13, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LT 4317b0 <hypre_BoomerAMGBuildMultipass+0x510> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDP X11, X8, [X29, #824] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| LDUR X9, [X29, #472] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ORR X10, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ORR X12, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| B 43176c <hypre_BoomerAMGBuildMultipass+0x4cc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| LDR X8, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LE 4317d4 <hypre_BoomerAMGBuildMultipass+0x534> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X3, [X29, #280] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X1, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ W0, #11 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X2, XZR, X25 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 481820 <hypre_ParCSRCommHandleCreate> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| BL 481c20 <hypre_ParCSRCommHandleDestroy> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ADRP X0, <4ec7d4> | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X0, X0, #336 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ADRP X2, 4347dc <hypre_BoomerAMGBuildMultipass.omp_outlined.10+0x18c> | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X2, X2, #272 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SUB X3, X29, #128 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SUB X4, X29, #224 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR XZR, [SP, #616] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #600] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| ADD X5, SP, #616 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ADD X6, SP, #600 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| MOVZ W1, #4 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 40f990 <@plt_start@+0x610> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X0, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBZ X0, 43184c <hypre_BoomerAMGBuildMultipass+0x5ac> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STR X0, [SP, #576] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDUR X0, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STR X0, [SP, #688] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDUR X0, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X19, XZR, X0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| LDR X0, [SP, #616] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X26, XZR, X0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| B 431854 <hypre_BoomerAMGBuildMultipass+0x5b4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X19, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X26, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| SUB X8, X28, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| LDUR X9, [X29, #344] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #432] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDUR X8, [X29, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR XZR, [X8], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [X9], #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X10, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| CMP X10, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LT 431938 <hypre_BoomerAMGBuildMultipass+0x698> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X10, [X29, #504] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| LDR X11, [SP, #760] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X12, [SP, #584] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| MOVN X15, #0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| MOVZ W16, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (25.0%) |
| ORR X13, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ORR X0, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| LDR X14, [SP, #592] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| LDR X18, [SP, #432] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| LDUR X17, [X29, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| B 4318e8 <hypre_BoomerAMGBuildMultipass+0x648> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X13, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LT 4319bc <hypre_BoomerAMGBuildMultipass+0x71c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDP X11, X9, [X29, #824] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| LDR X10, [SP, #592] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| ORR X8, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X12, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| B 43196c <hypre_BoomerAMGBuildMultipass+0x6cc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| HINT #0 | N/A | ||||||||||||||||||||
| LDR X8, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LE 4319e0 <hypre_BoomerAMGBuildMultipass+0x740> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X1, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ W0, #11 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X2, XZR, X25 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X3, XZR, X19 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 481820 <hypre_ParCSRCommHandleCreate> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| BL 481c20 <hypre_ParCSRCommHandleDestroy> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #408] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ADD X0, X8, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X21, XZR, X0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| LDR X0, [SP, #616] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBZ X0, 431a08 <hypre_BoomerAMGBuildMultipass+0x768> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STUR X0, [X29, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X8, [SP, #408] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR XZR, [X21] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LT 431ac0 <hypre_BoomerAMGBuildMultipass+0x820> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X9, [X29, #288] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVN X11, #0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X8, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X10, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| B 431a3c <hypre_BoomerAMGBuildMultipass+0x79c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X0, XZR, X19 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a91d0 <hypre_Free> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [X29, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBZ X8, 431b54 <hypre_BoomerAMGBuildMultipass+0x8b4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X0, XZR, X22 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STR X0, [SP, #680] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X22, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LT 431b54 <hypre_BoomerAMGBuildMultipass+0x8b4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X8, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X9, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| B 431b2c <hypre_BoomerAMGBuildMultipass+0x88c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| LDR X8, [SP, #752] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X18, [SP, #432] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| STP XZR, XZR, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (100.0%) |
| STR XZR, [SP, #512] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X18, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X9, [SP, #624] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X9, [SP, #656] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X28, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LT 431cb0 <hypre_BoomerAMGBuildMultipass+0xa10> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X9, [SP, #760] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDP X11, X10, [X29, #920] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| LDUR X12, [X29, #504] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| MOVZ W16, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (25.0%) |
| ORR X19, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X23, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X20, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| LDP X14, X13, [X29, #904] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | scal (100.0%) |
| LDUR X15, [X29, #288] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| LDR X17, [SP, #584] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| B 431bb4 <hypre_BoomerAMGBuildMultipass+0x914> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| ORR X20, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ORR X23, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X19, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| LDUR X13, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| STR X23, [X8, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LT 431d34 <hypre_BoomerAMGBuildMultipass+0xa94> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDP X11, X8, [X29, #824] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| LDR X9, [SP, #584] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ORR X10, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| ORR X12, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| B 431cf0 <hypre_BoomerAMGBuildMultipass+0xa50> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LE 431d58 <hypre_BoomerAMGBuildMultipass+0xab8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X3, [SP, #576] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X1, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ W0, #11 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X2, XZR, X25 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 481820 <hypre_ParCSRCommHandleCreate> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| BL 481c20 <hypre_ParCSRCommHandleDestroy> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W8, #2 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ADRP X3, <4efd5c> | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADRP X4, <4efd60> | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X0, SP, #544 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ADD X1, SP, #552 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOVZ W2, #1 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X8, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| SUB X8, X28, X23 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X8, [SP, #544] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X3, [X3, #3928] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X4, [X4, #3784] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X5, [SP, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (50.0%) |
| BL 4aaae0 <hypre_MPI_Allreduce> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #552] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBZ X8, 431f98 <hypre_BoomerAMGBuildMultipass+0xcf8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X8, #9 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.GT 431f98 <hypre_BoomerAMGBuildMultipass+0xcf8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ADRP X24, <4efda0> | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADRP X22, <4efda4> | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LDR X24, [X24, #3928] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X22, [X22, #3784] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| ORR X0, XZR, X25 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a91d0 <hypre_Free> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X22, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X22, [SP, #640] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| ORR X0, XZR, X22 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [SP, #728] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| ORR X0, XZR, X20 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #728] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| STR X0, [X8, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X0, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STR X0, [SP, #744] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X0, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X0, [SP, #736] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X8, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (50.0%) |
| B.LT 432024 <hypre_BoomerAMGBuildMultipass+0xd84> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X0, XZR, X22 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STR X0, [SP, #720] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CBZ X19, 433d94 <hypre_BoomerAMGBuildMultipass+0x2af4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ORR X0, XZR, X19 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| BL 4a90d0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X8, XZR, X0 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| LDR X0, [SP, #720] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| B 433d98 <hypre_BoomerAMGBuildMultipass+0x2af8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X20, XZR, XZR | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (50.0%) |
| LDR X8, [SP, #752] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDP X1, X9, [X8, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.50 | N/A |
| STR X1, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| CMP X1, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| B.LT 433de4 <hypre_BoomerAMGBuildMultipass+0x2b44> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||||
| HINT #0 | N/A |
| Name | Coverage (%) | Time (s) |
|---|---|---|
| ▼hypre_BoomerAMGBuildMultipass– | 0.25 | 0.05 |
| ○Loop 687 - par_multi_interp.c:385-400 - exec | 0.02 | 0.25 |
| ▼Loop 678 - par_multi_interp.c:488-514 - exec– | 0.01 | 0.17 |
| ○Loop 680 - par_multi_interp.c:491-498 - exec | 0.07 | 1.12 |
| ○Loop 679 - par_multi_interp.c:501-508 - exec | 0.00 | 0.00 |
| ▼Loop 685 - par_multi_interp.c:415-423 - exec– | 0.00 | 0.00 |
| ○Loop 686 - par_multi_interp.c:418-423 - exec | 0.00 | 0.00 |
| ▼Loop 690 - par_multi_interp.c:307-311 - exec– | 0.00 | 0.00 |
| ○Loop 691 - par_multi_interp.c:310-311 - exec | 0.00 | 0.00 |
| ▼Loop 681 - par_multi_interp.c:466-468 - exec– | 0.00 | 0.00 |
| ○Loop 682 - par_multi_interp.c:466-468 - exec | 0.00 | 0.00 |
| ▼Loop 631 - par_multi_interp.c:433-2060 - exec– | 0.00 | 0.00 |
| ▼Loop 630 - par_multi_interp.c:433-2060 - exec– | 0.00 | 0.03 |
| ○Loop 632 - par_multi_interp.c:651-655 - exec | 0.07 | 1.12 |
| ▼Loop 629 - par_multi_interp.c:433-2060 - exec– | 0.00 | 0.00 |
| ○Loop 655 - par_multi_interp.c:1158-1161 - exec | 0.01 | 0.15 |
| ▼Loop 634 - par_multi_interp.c:1982-1989 - exec– | 0.00 | 0.00 |
| ○Loop 635 - par_multi_interp.c:1984-1989 - exec | 0.00 | 0.00 |
| ▼Loop 646 - par_multi_interp.c:1310-1566 - exec– | 0.00 | 0.00 |
| ▼Loop 647 - par_multi_interp.c:1324-1338 - exec– | 0.00 | 0.00 |
| ▼Loop 648 - par_multi_interp.c:1326-1338 - exec– | 0.00 | 0.00 |
| ○Loop 653 - par_multi_interp.c:1333-1334 - exec | 0.00 | 0.00 |
| ○Loop 654 - par_multi_interp.c:1334-1334 - exec | 0.00 | 0.00 |
| ○Loop 652 - par_multi_interp.c:1333-1334 - exec | 0.00 | 0.00 |
| ○Loop 649 - par_multi_interp.c:1337-1338 - exec | 0.00 | 0.00 |
| ○Loop 651 - par_multi_interp.c:1338-1338 - exec | 0.00 | 0.00 |
| ○Loop 650 - par_multi_interp.c:1337-1338 - exec | 0.00 | 0.00 |
| ▼Loop 637 - par_multi_interp.c:1674-1888 - exec– | 0.00 | 0.00 |
| ▼Loop 638 - par_multi_interp.c:1688-1705 - exec– | 0.00 | 0.00 |
| ▼Loop 639 - par_multi_interp.c:1690-1705 - exec– | 0.00 | 0.00 |
| ○Loop 641 - par_multi_interp.c:1703-1705 - exec | 0.00 | 0.00 |
| ○Loop 644 - par_multi_interp.c:1697-1699 - exec | 0.00 | 0.00 |
| ○Loop 642 - par_multi_interp.c:1705-1705 - exec | 0.00 | 0.00 |
| ○Loop 645 - par_multi_interp.c:1699-1699 - exec | 0.00 | 0.00 |
| ○Loop 643 - par_multi_interp.c:1697-1699 - exec | 0.00 | 0.00 |
| ○Loop 640 - par_multi_interp.c:1703-1705 - exec | 0.00 | 0.00 |
| ○Loop 636 - par_multi_interp.c:1962-1968 - exec | 0.00 | 0.00 |
| ○Loop 633 - par_multi_interp.c:2016-2017 - exec | 0.00 | 0.00 |
| ▼Loop 656 - par_multi_interp.c:433-891 - exec– | 0.00 | 0.00 |
| ▼Loop 657 - par_multi_interp.c:823-856 - exec– | 0.00 | 0.00 |
| ▼Loop 660 - par_multi_interp.c:829-856 - exec– | 0.00 | 0.00 |
| ○Loop 661 - par_multi_interp.c:839-843 - exec | 0.00 | 0.00 |
| ○Loop 658 - par_multi_interp.c:823-825 - exec | 0.00 | 0.00 |
| ○Loop 659 - par_multi_interp.c:872-879 - exec | 0.00 | 0.00 |
| ○Loop 669 - par_multi_interp.c:703-717 - exec | 0.00 | 0.00 |
| ▼Loop 664 - par_multi_interp.c:733-758 - exec– | 0.00 | 0.00 |
| ▼Loop 665 - par_multi_interp.c:735-758 - exec– | 0.00 | 0.00 |
| ○Loop 668 - par_multi_interp.c:742-745 - exec | 0.00 | 0.00 |
| ▼Loop 666 - par_multi_interp.c:749-758 - exec– | 0.00 | 0.00 |
| ○Loop 667 - par_multi_interp.c:753-755 - exec | 0.00 | 0.00 |
| ▼Loop 662 - par_multi_interp.c:773-784 - exec– | 0.00 | 0.00 |
| ○Loop 663 - par_multi_interp.c:775-780 - exec | 0.00 | 0.00 |
| ▼Loop 688 - par_multi_interp.c:323-327 - exec– | 0.00 | 0.00 |
| ○Loop 689 - par_multi_interp.c:326-327 - exec | 0.00 | 0.00 |
| ▼Loop 670 - par_multi_interp.c:548-600 - exec– | 0.00 | 0.00 |
| ▼Loop 673 - par_multi_interp.c:550-571 - exec– | 0.02 | 0.28 |
| ○Loop 675 - par_multi_interp.c:554-557 - exec | 0.05 | 0.67 |
| ○Loop 674 - par_multi_interp.c:568-571 - exec | 0.00 | 0.00 |
| ▼Loop 671 - par_multi_interp.c:590-594 - exec– | 0.00 | 0.00 |
| ○Loop 672 - par_multi_interp.c:593-594 - exec | 0.00 | 0.00 |
| ○Loop 692 - par_multi_interp.c:205-208 - exec | 0.00 | 0.00 |
| ▼Loop 676 - par_multi_interp.c:526-530 - exec– | 0.00 | 0.00 |
| ○Loop 677 - par_multi_interp.c:529-530 - exec | 0.00 | 0.00 |
| ▼Loop 683 - par_multi_interp.c:440-457 - exec– | 0.00 | 0.00 |
| ○Loop 684 - par_multi_interp.c:442-454 - exec | 0.00 | 0.00 |