	*************************************************
	*                                               *
	*          ONE-View report generation           *
	*                                               *
	*************************************************

[MAQAO] Info: Experiment configuration summary is available adding -dbg=1 in command line

* [MAQAO] Warning: Experiment directory /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/run/oneview_runs/compilers/armclang_4/oneview_results_1781886151 already exists and is reused.
           It can be replaced using --replace in the command line.
[MAQAO] Info: 
[MAQAO] Info: START THE APPLICATION PROFILING
[MAQAO] Info: -> RUNNING THE PROFILER...
[MAQAO] Info:   LPROF has already been run
[MAQAO] Info: STOP THE APPLICATION PROFILING
[MAQAO] Info: 
[MAQAO] Info: START FUNCTIONS AND LOOPS ANALYSIS ...
[MAQAO] Info: STOP FUNCTIONS AND LOOPS ANALYSIS ...
[MAQAO] Info: 
[MAQAO] Info: START THE REPORT GENERATION
[MAQAO] Info: -> ONE-VIEW EXPERIMENT DIRECTORY: /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/run/oneview_runs/compilers/armclang_4/oneview_results_1781886151


+===================================================================================================================+
+                                                   1  -  GLOBAL                                                    +
+===================================================================================================================+


+-------------------------------------------------------------------------------------------------------------------+
+                                            1.1  -  Experiment Summary                                             +
+-------------------------------------------------------------------------------------------------------------------+

  Application:			/home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/run/binaries/armclang_4/exec
  Timestamp:			2026-06-19 16:22:31
  Universal Timestamp:		1781886151
  Experiment Type:		MPI; OpenMP; Throughput; 
  Machine:			ip-172-31-38-240.ec2.internal
  Architecture:			aarch64
  Micro Architecture:		ARM_NEOVERSE_V1
  OS Version:			Linux 6.1.170-213.321.amzn2023.aarch64 #1 SMP Thu May 14 12:18:13 UTC 2026
  Compilation Options:		
		exec: Arm Toolchain for Linux 22.1.0 clang version 22.1.0 (https://github.com/arm/arm-toolchain.git c95792353373404441df364b5a762338e5642230) /opt/arm/arm-toolchain-for-linux/bin/clang-22 -frtlib-add-rpath -fveclib=ArmPL -mllvm -gvn-add-phi-translation=1 -mllvm -store-to-load-forwarding-conflict-detection=0 -I /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/utilities -I /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/parcsr_mv -I /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/parcsr_ls -I /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/IJ_mv -I /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/krylov -I /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/seq_mv -I /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG -O3 -Wno-error=implicit-function-declaration -O3 -mcpu=neoverse-v1+nosve+nosve2 -I /opt/arm/arm-performance-libraries/lib/pkgconfig/../../include -L/opt/arm/arm-performance-libraries/lib/pkgconfig/../../lib -larmpl -lastring -lamath -lm -ffast-math -g -fno-omit-frame-pointer -fcf-protection=none -no-pie -grecord-command-line -fopenmp=libomp -D TIMER_USE_MPI -D HYPRE_USING_OPENMP -D HYPRE_HOPSCOTCH -D HYPRE_USING_PERSISTENT_COMM -D HYPRE_BIGINT -MD -MT CMakeFiles/parcsr_ls.dir/AMG/parcsr_ls/ams.c.o -MF CMakeFiles/parcsr_ls.dir/AMG/parcsr_ls/ams.c.o.d -o CMakeFiles/parcsr_ls.dir/AMG/parcsr_ls/ams.c.o -c /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/parcsr_ls/ams.c -I /home/eoseret/tools/mpi/openmpi-armclang-22.1/include 
  Number of processes observed:	1
  Number of threads observed:	64
  MAQAO version:		2026.0.0
  MAQAO build:			Build information not available




+-------------------------------------------------------------------------------------------------------------------+
+                                              1.2  -  Global Metrics                                               +
+-------------------------------------------------------------------------------------------------------------------+

  Total Time:				50.35 s
  Max (Thread Active Time):		47.95 s
  Average Active Time:			34.48 s
  Activity Ratio:			68.6 %
  Average number of active threads:	43.830
  Affinity Stability:			96.0 %
  Time spent in analyzed loops:		61.6 %
  Time spent in analyzed innermost loops: 56.5 %
  Time spent in user code:		61.7 %
  Compilation Options Score:		100
  Array Access Efficiency:		51.4 %

   Potential Speedups
  ----------------------------------------------------
  Perfect Flow Complexity:		1.00
  Perfect OpenMP/MPI/Pthread/TBB:	1.10
  Perfect OpenMP/MPI/Pthread/TBB + Load Distribution:	1.55
  If No Scalar Integer:
      Potential Speedup:		1.03
      Nb Loops to get 80%:		11
  If FP Vectorized:
      Potential Speedup:		1.30
      Nb Loops to get 80%:		3
  If Fully Vectorized:
      Potential Speedup:		1.75
      Nb Loops to get 80%:		16
  If Only FP Arithmetic:
      Potential Speedup:		1.06
      Nb Loops to get 80%:		24




+-------------------------------------------------------------------------------------------------------------------+
+                                            1.3  -  Potential Speedups                                             +
+-------------------------------------------------------------------------------------------------------------------+

  If No Scalar Integer:
      Number of loops   | 1      | 10     | 20     | 29     | 40     | 
      Cumulated Speedup | 1.0074 | 1.0210 | 1.0260 | 1.0270 | 1.0270 | 
  Top 5 loops:
    exec - 2740:	1.0074
    exec - 2945:	1.0095
    exec - 3416:	1.0116
    exec - 760:	1.0134
    exec - 3716:	1.0152

  If FP Vectorized:
      Number of loops   | 1      | 10     | 20     | 29     | 40     | 
      Cumulated Speedup | 1.1491 | 1.2834 | 1.3001 | 1.3022 | 1.3025 | 
  Top 5 loops:
    exec - 2744:	1.1491
    exec - 3659:	1.1966
    exec - 3679:	1.242
    exec - 2746:	1.2532
    exec - 3748:	1.2615

  If Fully Vectorized:
      Number of loops   | 1      | 10     | 20     | 29     | 40     | 
      Cumulated Speedup | 1.2644 | 1.5564 | 1.6301 | 1.6751 | 1.7077 | 
  Top 5 loops:
    exec - 2744:	1.2644
    exec - 3659:	1.3599
    exec - 3679:	1.4576
    exec - 2746:	1.4793
    exec - 2740:	1.4994

  If Only FP Arithmetic:
      Number of loops   | 1      | 10     | 20     | 29     | 40     | 
      Cumulated Speedup | 1.0074 | 1.0333 | 1.0473 | 1.0542 | 1.0590 | 
  Top 5 loops:
    exec - 2740:	1.0074
    exec - 2237:	1.0117
    exec - 760:	1.0151
    exec - 3416:	1.0185
    exec - 2945:	1.0215



+===================================================================================================================+
+                                                   2  -  SUMMARY                                                   +
+===================================================================================================================+


+-------------------------------------------------------------------------------------------------------------------+
+                                            2.1  -  EXPERIMENT QUALITY                                             +
+-------------------------------------------------------------------------------------------------------------------+

  [4 / 4] Application profile is long enough (47.95 s)
To have good quality measurements, it is advised that the application profiling time is greater than 10 seconds.

  [3 / 3] Most of time spent in analyzed modules comes from functions with source/debug info
-g option gives access to debugging informations, such are source locations.

  [2.9980380128092 / 3] Architecture specific option -mcpu is used


  [3 / 3] Most of time spent in analyzed modules comes from functions with compilation options informations and
-fno-omit-frame-pointer is present
-fno-omit-frame-pointer improves the accuracy of callchains found during the application profiling.

  [3 / 3] Optimization level option is correctly used


  [3 / 3] Host configuration allows retrieval of all necessary metrics.


  [2 / 2] Application is correctly profiled ("Others" category represents 0.00 % of the execution time)
To have a representative profiling, it is advised that the category "Others" represents less than 20% of the
execution time in order to analyze as much as possible of the user code

  [1 / 1] Lstopo present. The Topology lstopo report will be generated.



+-------------------------------------------------------------------------------------------------------------------+
+                                               2.2  -  CODE QUALITY                                                +
+-------------------------------------------------------------------------------------------------------------------+

  [4 / 4] Enough time of the experiment time spent in analyzed loops (61.64%)
If the time spent in analyzed loops is less than 30%, standard loop optimizations will have a limited impact on
application performances.

  [2 / 4] A significant amount of threads are idle (31.52%)
On average, more than 10% of observed threads are idle. Such threads are probably IO/sync waiting. Some hints: use
faster filesystems to read/write data, improve parallel load balancing and/or scheduling.

  [2 / 4] CPU activity is below 90% (68.58%)
CPU cores are idle more than 10% of time. Threads supposed to run on these cores are probably IO/sync waiting. Some
hints: use faster filesystems to read/write data, improve parallel load balancing and/or scheduling.

  [4 / 4] Loop profile is not flat
At least one loop coverage is greater than 4% (28.84%), representing an hotspot for the application

  [4 / 4] Enough time of the experiment time spent in analyzed innermost loops (56.53%)
If the time spent in analyzed innermost loops is less than 15%, standard innermost loop optimizations such as
vectorisation will have a limited impact on application performances.

  [4 / 4] Affinity is good (96.04%)
Threads are not migrating to CPU cores: probably successfully pinned

  [3 / 3] Less than 10% (0.00%) is spend in BLAS1 operations
It could be more efficient to inline by hand BLAS1 operations

  [0 / 3] Too many functions do not use all threads
Functions running on a reduced number of threads (typically sequential code) cover at least 10% of application
walltime (24.35%). Check both "Max Inclusive Time Over Threads" and "Nb Threads" in Functions or Loops tabs and
consider parallelizing sequential regions or improving parallelization of regions running on a reduced number of
threads

  [3 / 3] Cumulative Outermost/In between loops coverage (5.10%) lower than cumulative innermost loop coverage (56.53%)
Having cumulative Outermost/In between loops coverage greater than cumulative innermost loop coverage will make loop
optimization more complex

  [2 / 2] Less than 10% (0.00%) is spend in BLAS2 operations
BLAS2 calls usually could make a poor cache usage and could benefit from inlining.

  [2 / 2] Less than 10% (0.00%) is spend in Libm/SVML (special functions)



+-------------------------------------------------------------------------------------------------------------------+
+                                              2.3  -  LOOPS OVERVIEW                                               +
+-------------------------------------------------------------------------------------------------------------------+

  Top 5 loops:
   + exec - 2744:
     analysis: Execution Time: 28 % - Vectorization Ratio: 16.67 % - Vector Length Use: 29.17 %
     Data Access Issues: 8
        [4] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 2 issues ( = data accesses) costing 2
            point each.
        [4] [SA] Presence of indirect accesses - Use array restructuring or gather instructions to lower the cost.
            There are 1 issues ( = indirect data accesses) costing 4 point each.
     Vectorization Roadblocks: 8
        [4] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 2 issues ( = data accesses) costing 2
            point each.
        [4] [SA] Presence of indirect accesses - Use array restructuring or gather instructions to lower the cost.
            There are 1 issues ( = indirect data accesses) costing 4 point each.

   + exec - 3659:
     analysis: Execution Time: 7 % - Vectorization Ratio: 16.67 % - Vector Length Use: 29.17 %
     Data Access Issues: 8
        [4] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 2 issues ( = data accesses) costing 2
            point each.
        [4] [SA] Presence of indirect accesses - Use array restructuring or gather instructions to lower the cost.
            There are 1 issues ( = indirect data accesses) costing 4 point each.
     Vectorization Roadblocks: 8
        [4] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 2 issues ( = data accesses) costing 2
            point each.
        [4] [SA] Presence of indirect accesses - Use array restructuring or gather instructions to lower the cost.
            There are 1 issues ( = indirect data accesses) costing 4 point each.

   + exec - 3679:
     analysis: Execution Time: 6 % - Vectorization Ratio: 16.67 % - Vector Length Use: 29.17 %
     Data Access Issues: 8
        [4] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 2 issues ( = data accesses) costing 2
            point each.
        [4] [SA] Presence of indirect accesses - Use array restructuring or gather instructions to lower the cost.
            There are 1 issues ( = indirect data accesses) costing 4 point each.
     Vectorization Roadblocks: 8
        [4] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 2 issues ( = data accesses) costing 2
            point each.
        [4] [SA] Presence of indirect accesses - Use array restructuring or gather instructions to lower the cost.
            There are 1 issues ( = indirect data accesses) costing 4 point each.

   + exec - 2746:
     analysis: Execution Time: 1 % - Vectorization Ratio: 0.00 % - Vector Length Use: 25.00 %
     Data Access Issues: 8
        [4] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 2 issues ( = data accesses) costing 2
            point each.
        [4] [SA] Presence of indirect accesses - Use array restructuring or gather instructions to lower the cost.
            There are 1 issues ( = indirect data accesses) costing 4 point each.
     Vectorization Roadblocks: 8
        [4] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 2 issues ( = data accesses) costing 2
            point each.
        [4] [SA] Presence of indirect accesses - Use array restructuring or gather instructions to lower the cost.
            There are 1 issues ( = indirect data accesses) costing 4 point each.

   + exec - 2740:
     analysis: Execution Time: 1 % - Vectorization Ratio: 0.00 % - Vector Length Use: 25.00 %
     Loop Computation Issues: 10
        [4] [SA] Presence of expensive FP instructions - Perform hoisting, change algorithm, use SVML or proper
            numerical library or perform value profiling (count the number of distinct input values). There are 1
            issues (= instructions) costing 4 points each.
        [4] [SA] Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA - Reorganize
            arithmetic expressions to exhibit potential for FMA. This issue costs 4 points.
        [2] [SA] Presence of a large number of scalar integer instructions - Simplify loop structure, perform loop
            splitting or perform unroll and jam. This issue costs 2 points.
     Control Flow Issues: 2
        [2] [SA] Non innermost loop (Outermost) - Collapse loop with innermost ones. This issue costs 2 points.
     Vectorization Roadblocks: 1002
        [1000] [SA] Too many paths (at least 1000 paths) - Simplify control structure. There are at least 1000 issues (
            = paths) costing 1 point.
        [2] [SA] Non innermost loop (Outermost) - Collapse loop with innermost ones. This issue costs 2 points.



+===================================================================================================================+
+                                                 3  -  APPLICATION                                                 +
+===================================================================================================================+


+-------------------------------------------------------------------------------------------------------------------+
+                                              3.1  -  Categorization                                               +
+-------------------------------------------------------------------------------------------------------------------+

   Category | IO     | Exe    | Others  | TBB   | String | Pthread | MPI   | OMP   | System | Memory | Math  |
  ----------+--------+--------+---------+-------+--------+---------+-------+-------+--------+--------+-------+
   Time (%) | 0.00   | 61.66  | 0.00    | 0.00  | 0.00   | 0.00    | 0.00  | 10.58 | 27.73  | 0.03   | 0.00  |




+-------------------------------------------------------------------------------------------------------------------+
+                                         3.2  -  Function Based Profiling                                          +
+-------------------------------------------------------------------------------------------------------------------+

   Buckets                   | Nb Functions              | Coverage                  | Cumulated Coverage        |
  ---------------------------+---------------------------+---------------------------+---------------------------+
   > 8%                      | 3                         | 63.24                     | 63.24                     |
   4% to 8%                  | 2                         | 13.41                     | 76.66                     |
   2% to 4%                  | 1                         | 3.77                      | 80.42                     |
   1% to 2%                  | 6                         | 6.90                      | 87.33                     |
   0.5% to 1%                | 8                         | 5.60                      | 92.93                     |
   0.25% to 0.5%             | 8                         | 2.85                      | 95.78                     |
   0.125% to 0.25%           | 11                        | 2.21                      | 97.99                     |
   < 0.125%                  | 160                       | 2.01                      | 100.00                    |




+-------------------------------------------------------------------------------------------------------------------+
+                                           3.3  -  Loop Based Profiling                                            +
+-------------------------------------------------------------------------------------------------------------------+

   Buckets                   | Nb Loops                  | Coverage                  | Cumulated Coverage        |
  ---------------------------+---------------------------+---------------------------+---------------------------+
   > 8%                      | 1                         | 28.84                     | 28.84                     |
   4% to 8%                  | 2                         | 14.46                     | 43.30                     |
   2% to 4%                  | 0                         | 0.00                      | 43.30                     |
   1% to 2%                  | 3                         | 3.54                      | 46.85                     |
   0.5% to 1%                | 6                         | 3.87                      | 50.72                     |
   0.25% to 0.5%             | 10                        | 3.39                      | 54.11                     |
   0.125% to 0.25%           | 7                         | 1.18                      | 55.28                     |
   < 0.125%                  | 74                        | 1.25                      | 56.53                     |


+===================================================================================================================+
+                                                  4  -  FUNCTIONS                                                  +
+===================================================================================================================+


+-------------------------------------------------------------------------------------------------------------------+
+                                             4.1  -  Top 10 Functions                                              +
+-------------------------------------------------------------------------------------------------------------------+

   Function                                               | Module               | Coverage (%)  | Time (s)      |
  --------------------------------------------------------+----------------------+---------------+---------------+
   hypre_ParCSRRelaxThreads.omp_outlined.27               | exec                 | 32.33         | 11.15         |
   hypre_CSRMatrixMatvecOutOfPlace.omp_outlined.14        | exec                 | 16.13         | 5.56          |
   down_read_trylock                                      | kernel               | 14.78         | 5.10          |
   kmp_flag_64<false, true>::wait(kmp_info*, int, void*)  | libomp.so            | 7.44          | 2.57          |
   up_read                                                | kernel               | 5.98          | 2.06          |
   rmqueue_pcplist                                        | kernel               | 3.77          | 1.30          |
   hypre_BoomerAMGCreate2ndS.omp_outlined.15              | exec                 | 1.38          | 0.48          |
   arch_local_irq_enable                                  | kernel               | 1.18          | 0.41          |
   hypre_BoomerAMGBuildMultipass.omp_outlined.19          | exec                 | 1.14          | 0.39          |
   hypre_SeqVectorAxpy.omp_outlined                       | exec                 | 1.12          | 0.39          |


+===================================================================================================================+
+                                                    5  -  LOOPS                                                    +
+===================================================================================================================+


+-------------------------------------------------------------------------------------------------------------------+
+                                               5.1  -  Top 10 Loops                                                +
+-------------------------------------------------------------------------------------------------------------------+

   Loop Id        | Module               | Source Location                                       | Coverage (%)  |
  ----------------+----------------------+-------------------------------------------------------+---------------+
   2744           | exec                 | ams.c:3672-3675                                       | 28.84         |
   3659           | exec                 | csr_matvec.c:310-312                                  | 7.66          |
   3679           | exec                 | csr_matvec.c:259-261                                  | 6.80          |
   2746           | exec                 | ams.c:3672-3675                                       | 1.34          |
   2740           | exec                 | ams.c:3664-3664,ams.c:3671-3672,ams.c:3677-3677,am... | 1.21          |
   3748           | exec                 | vector.c:451-452                                      | 1.12          |
   2738           | exec                 | ams.c:3657-3659                                       | 1.08          |
   2739           | exec                 | ams.c:3664-3669                                       | 0.94          |
   245            | exec                 | par_coarsen.c:2361-2369                               | 0.62          |
   3751           | exec                 | vector.c:485-486                                      | 0.61          |





+===================================================================================================================+
+                                                     6  -  CQA                                                     +
+===================================================================================================================+


+-------------------------------------------------------------------------------------------------------------------+
+                                                   6.1  -  Loops                                                   +
+-------------------------------------------------------------------------------------------------------------------+





      6.1.1  -  Loop 2744 from exec
  =========================================================================================================

The loop is defined in /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/parcsr_ls/ams.c:3672-3675.

The related source loop is unrolled by 3 (including vectorization).

      6.1.1.1  -  Path 1
  ---------------------------------------------------------------------------------------------------------

6% of peak computational performance is used (2.00 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.1.1.1  -  Unrolling/vectorization cost
  ---------------------------------------------------------------------------------------------------------

This loop is peel/tail of a unrolled/vectorized loop. If its cost is not negligible compared to the main (unrolled/vectorized) loop, unrolling/vectorization is counterproductive due to low trip count.

Details
The more iterations the main loop is processing, the higher the trip count must be to amortize peel/tail overhead.

Workaround
 - recompile with -fprofile-instr-generate, execute ,merge raw profiles with 'llvm-profdata merge -o default.profdata default.profraw' and recompile with -fprofile-instr-use (profile-guided optimization)
 - hardcode most frequent values of loop bounds by adding specialized paths.:
  *  For instance, replace for (i=0; i<n; i++) foo(i) with:
switch (n) {
  case (4): for (i=0; i<4; i++) foo(i); break;
  case (6): for (i=0; i<6; i++) foo(i); break;
  default : for (i=0; i<n; i++) foo(i); break;
}



      6.1.1.1.2  -  Vectorization
  ---------------------------------------------------------------------------------------------------------

Your loop is not vectorized.
Only 29% of vector register length is used (average across all VPU instructions).


Details
16% of VPU instructions are used in vector version (process two or more data elements in vector registers):
 - 33% of VPU loads are used in vector version.
 - 0% of VPU addition or subtraction instructions are used in vector version.
 - 0% of VPU fused multiply-add instructions are used in vector version.





      6.1.1.1.3  -  FMA
  ---------------------------------------------------------------------------------------------------------

Detected 2 FMA (fused multiply-add) operations.




      6.1.1.1.4  -  Slow data structures access
  ---------------------------------------------------------------------------------------------------------

Detected data structures (typically arrays) that cannot be efficiently read/written

Details
 - Constant non-unit stride: 2 occurrence(s)
 - Irregular (variable stride) or indirect: 1 occurrence(s)
Non-unit stride (uncontiguous) accesses are not efficiently using data caches


Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)
 - Try to remove indirect accesses. If applicable, precompute elements out of the innermost loop.



      6.1.1.1.5  -  Matching between your loop (in the source code) and the binary loop
  ---------------------------------------------------------------------------------------------------------

The binary loop is composed of 4 FP arithmetical operations:
 - 2: addition or subtraction (all inside FMA instructions)
 - 2: multiply (all inside FMA instructions)
The binary loop does not load or store any data.







      6.1.2  -  Loop 3659 from exec
  =========================================================================================================

The loop is defined in /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:310-312.

The related source loop is unrolled by 3 (including vectorization).

      6.1.2.1  -  Path 1
  ---------------------------------------------------------------------------------------------------------

6% of peak computational performance is used (2.00 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.2.1.1  -  Unrolling/vectorization cost
  ---------------------------------------------------------------------------------------------------------

This loop is peel/tail of a unrolled/vectorized loop. If its cost is not negligible compared to the main (unrolled/vectorized) loop, unrolling/vectorization is counterproductive due to low trip count.

Details
The more iterations the main loop is processing, the higher the trip count must be to amortize peel/tail overhead.

Workaround
 - recompile with -fprofile-instr-generate, execute ,merge raw profiles with 'llvm-profdata merge -o default.profdata default.profraw' and recompile with -fprofile-instr-use (profile-guided optimization)
 - hardcode most frequent values of loop bounds by adding specialized paths.:
  *  For instance, replace for (i=0; i<n; i++) foo(i) with:
switch (n) {
  case (4): for (i=0; i<4; i++) foo(i); break;
  case (6): for (i=0; i<6; i++) foo(i); break;
  default : for (i=0; i<n; i++) foo(i); break;
}



      6.1.2.1.2  -  Vectorization
  ---------------------------------------------------------------------------------------------------------

Your loop is not vectorized.
Only 29% of vector register length is used (average across all VPU instructions).


Details
16% of VPU instructions are used in vector version (process two or more data elements in vector registers):
 - 33% of VPU loads are used in vector version.
 - 0% of VPU addition or subtraction instructions are used in vector version.
 - 0% of VPU fused multiply-add instructions are used in vector version.





      6.1.2.1.3  -  FMA
  ---------------------------------------------------------------------------------------------------------

Detected 2 FMA (fused multiply-add) operations.




      6.1.2.1.4  -  Slow data structures access
  ---------------------------------------------------------------------------------------------------------

Detected data structures (typically arrays) that cannot be efficiently read/written

Details
 - Constant non-unit stride: 2 occurrence(s)
 - Irregular (variable stride) or indirect: 1 occurrence(s)
Non-unit stride (uncontiguous) accesses are not efficiently using data caches


Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)
 - Try to remove indirect accesses. If applicable, precompute elements out of the innermost loop.



      6.1.2.1.5  -  Matching between your loop (in the source code) and the binary loop
  ---------------------------------------------------------------------------------------------------------

The binary loop is composed of 4 FP arithmetical operations:
 - 2: addition or subtraction (all inside FMA instructions)
 - 2: multiply (all inside FMA instructions)
The binary loop does not load or store any data.







      6.1.3  -  Loop 3679 from exec
  =========================================================================================================

The loop is defined in /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:259-261.

The related source loop is unrolled by 4 (including vectorization).

      6.1.3.1  -  Path 1
  ---------------------------------------------------------------------------------------------------------

6% of peak computational performance is used (2.00 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.3.1.1  -  Unrolling/vectorization cost
  ---------------------------------------------------------------------------------------------------------

This loop is peel/tail of a unrolled/vectorized loop. If its cost is not negligible compared to the main (unrolled/vectorized) loop, unrolling/vectorization is counterproductive due to low trip count.

Details
The more iterations the main loop is processing, the higher the trip count must be to amortize peel/tail overhead.

Workaround
 - recompile with -fprofile-instr-generate, execute ,merge raw profiles with 'llvm-profdata merge -o default.profdata default.profraw' and recompile with -fprofile-instr-use (profile-guided optimization)
 - hardcode most frequent values of loop bounds by adding specialized paths.:
  *  For instance, replace for (i=0; i<n; i++) foo(i) with:
switch (n) {
  case (4): for (i=0; i<4; i++) foo(i); break;
  case (6): for (i=0; i<6; i++) foo(i); break;
  default : for (i=0; i<n; i++) foo(i); break;
}



      6.1.3.1.2  -  Vectorization
  ---------------------------------------------------------------------------------------------------------

Your loop is not vectorized.
Only 29% of vector register length is used (average across all VPU instructions).


Details
16% of VPU instructions are used in vector version (process two or more data elements in vector registers):
 - 33% of VPU loads are used in vector version.
 - 0% of VPU addition or subtraction instructions are used in vector version.
 - 0% of VPU fused multiply-add instructions are used in vector version.





      6.1.3.1.3  -  FMA
  ---------------------------------------------------------------------------------------------------------

Detected 2 FMA (fused multiply-add) operations.




      6.1.3.1.4  -  Slow data structures access
  ---------------------------------------------------------------------------------------------------------

Detected data structures (typically arrays) that cannot be efficiently read/written

Details
 - Constant non-unit stride: 2 occurrence(s)
 - Irregular (variable stride) or indirect: 1 occurrence(s)
Non-unit stride (uncontiguous) accesses are not efficiently using data caches


Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)
 - Try to remove indirect accesses. If applicable, precompute elements out of the innermost loop.



      6.1.3.1.5  -  Matching between your loop (in the source code) and the binary loop
  ---------------------------------------------------------------------------------------------------------

The binary loop is composed of 4 FP arithmetical operations:
 - 2: addition or subtraction (all inside FMA instructions)
 - 2: multiply (all inside FMA instructions)
The binary loop does not load or store any data.







      6.1.4  -  Loop 2746 from exec
  =========================================================================================================

The loop is defined in /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/parcsr_ls/ams.c:3672-3675.

The related source loop is unrolled by 3 (including vectorization).

      6.1.4.1  -  Path 1
  ---------------------------------------------------------------------------------------------------------

3% of peak computational performance is used (1.00 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.4.1.1  -  Unrolling/vectorization cost
  ---------------------------------------------------------------------------------------------------------

This loop is peel/tail of a unrolled/vectorized loop. If its cost is not negligible compared to the main (unrolled/vectorized) loop, unrolling/vectorization is counterproductive due to low trip count.

Details
The more iterations the main loop is processing, the higher the trip count must be to amortize peel/tail overhead.

Workaround
 - recompile with -fprofile-instr-generate, execute ,merge raw profiles with 'llvm-profdata merge -o default.profdata default.profraw' and recompile with -fprofile-instr-use (profile-guided optimization)
 - hardcode most frequent values of loop bounds by adding specialized paths.:
  *  For instance, replace for (i=0; i<n; i++) foo(i) with:
switch (n) {
  case (4): for (i=0; i<4; i++) foo(i); break;
  case (6): for (i=0; i<6; i++) foo(i); break;
  default : for (i=0; i<n; i++) foo(i); break;
}



      6.1.4.1.2  -  Vectorization
  ---------------------------------------------------------------------------------------------------------

Your loop is not vectorized.
4 data elements could be processed at once in vector registers.


Details
All VPU instructions are used in scalar version (process only one data element in vector registers).





      6.1.4.1.3  -  FMA
  ---------------------------------------------------------------------------------------------------------

Detected 1 FMA (fused multiply-add) operations.




      6.1.4.1.4  -  Slow data structures access
  ---------------------------------------------------------------------------------------------------------

Detected data structures (typically arrays) that cannot be efficiently read/written

Details
 - Constant non-unit stride: 2 occurrence(s)
 - Irregular (variable stride) or indirect: 1 occurrence(s)
Non-unit stride (uncontiguous) accesses are not efficiently using data caches


Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)
 - Try to remove indirect accesses. If applicable, precompute elements out of the innermost loop.



      6.1.4.1.5  -  Matching between your loop (in the source code) and the binary loop
  ---------------------------------------------------------------------------------------------------------

The binary loop is composed of 2 FP arithmetical operations:
 - 1: addition or subtraction (all inside FMA instructions)
 - 1: multiply (all inside FMA instructions)
The binary loop does not load or store any data.







      6.1.5  -  Loop 2740 from exec
  =========================================================================================================

The loop is defined in /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/parcsr_ls/ams.c:3664-3682.

Analyzed code is defined in /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/parcsr_ls/ams.c:3664,3671-3672,3677,3682.

Warnings:
 - Non-innermost loop: analyzing only self part (ignoring child loops).
 - Ignoring paths for analysis
 - Failed to get the number of paths
 - RecMII not computed since number of paths is unknown or > max_paths
 - Streams not analyzed since number of paths is unknown or > max_paths


      6.1.5.1  -  Path 1
  ---------------------------------------------------------------------------------------------------------

Warnings:
The number of fused uops of the instruction [HINT	#0] is unknown
1% of peak computational performance is used (0.49 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.5.1.1  -  Code clean check
  ---------------------------------------------------------------------------------------------------------

Detected a slowdown caused by scalar integer instructions (typically used for address computation).
By removing them, you can lower the cost of an iteration from 10.25 to 4.00 cycles (2.56x speedup).

Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)



      6.1.5.1.2  -  Vectorization
  ---------------------------------------------------------------------------------------------------------

Your loop is not vectorized.
4 data elements could be processed at once in vector registers.
By vectorizing your loop, you can lower the cost of an iteration from 10.25 to 2.56 cycles (4.00x speedup).

Details
All VPU instructions are used in scalar version (process only one data element in vector registers).
Since your execution units are vector units, only a vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)





      6.1.5.1.3  -  FMA
  ---------------------------------------------------------------------------------------------------------

Presence of both ADD/SUB and MUL operations.

Workaround
Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible.
For instance a + b*c is a valid FMA (MUL then ADD).
However (a+b)* c cannot be translated into an FMA (ADD then MUL).




      6.1.5.1.4  -  Matching between your loop (in the source code) and the binary loop
  ---------------------------------------------------------------------------------------------------------

The binary loop is composed of 5 FP arithmetical operations:
 - 3: addition or subtraction
 - 1: multiply
 - 1: divide
The binary loop does not load or store any data.







      6.1.6  -  Loop 3748 from exec
  =========================================================================================================

The loop is defined in /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/seq_mv/vector.c:451-452.

The related source loop is unrolled by 2 (including vectorization).

      6.1.6.1  -  Path 1
  ---------------------------------------------------------------------------------------------------------

21% of peak computational performance is used (6.86 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.6.1.1  -  Vectorization
  ---------------------------------------------------------------------------------------------------------

Your loop is partially vectorized.
Only 70% of vector register length is used (average across all VPU instructions).


Details
83% of VPU instructions are used in vector version (process two or more data elements in vector registers):
 - 0% of VPU addition or subtraction instructions are used in vector version.





      6.1.6.1.2  -  FMA
  ---------------------------------------------------------------------------------------------------------

Detected 4 FMA (fused multiply-add) operations.




      6.1.6.1.3  -  Slow data structures access
  ---------------------------------------------------------------------------------------------------------

Detected data structures (typically arrays) that cannot be efficiently read/written

Details
 - Constant non-unit stride: 2 occurrence(s)
Non-unit stride (uncontiguous) accesses are not efficiently using data caches


Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)



      6.1.6.1.4  -  Matching between your loop (in the source code) and the binary loop
  ---------------------------------------------------------------------------------------------------------

The binary loop is composed of 8 FP arithmetical operations:
 - 4: addition or subtraction (all inside FMA instructions)
 - 4: multiply (all inside FMA instructions)
The binary loop does not load or store any data.







      6.1.7  -  Loop 2738 from exec
  =========================================================================================================

The loop is defined in /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/parcsr_ls/ams.c:3657-3659.

The related source loop is multi-versionned.

      6.1.7.1  -  Path 1
  ---------------------------------------------------------------------------------------------------------

0% of peak computational performance is used (0.00 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.7.1.1  -  Vectorization
  ---------------------------------------------------------------------------------------------------------

Your loop is partially vectorized.
Only 75% of vector register length is used (average across all VPU instructions).
By fully vectorizing your loop, you can lower the cost of an iteration from 1.00 to 0.87 cycles (1.14x speedup).

Details
66% of VPU instructions are used in vector version (process two or more data elements in vector registers):
 - 0% of VPU addition or subtraction instructions are used in vector version.
Since your execution units are vector units, only a fully vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)




No data for this section



      6.1.7.1.2  -  Slow data structures access
  ---------------------------------------------------------------------------------------------------------

Detected data structures (typically arrays) that cannot be efficiently read/written

Details
 - Constant non-unit stride: 2 occurrence(s)
Non-unit stride (uncontiguous) accesses are not efficiently using data caches


Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)



      6.1.7.1.3  -  Matching between your loop (in the source code) and the binary loop
  ---------------------------------------------------------------------------------------------------------

The binary loop does not contain any FP arithmetical operations.
The binary loop does not load or store any data.


      6.1.7.1.4  -  Unroll opportunity
  ---------------------------------------------------------------------------------------------------------

Loop body is too small to efficiently use resources.

Workaround
Unroll your loop if trip count is significantly higher than target unroll factor. This can be done manually. Or with the unroll (resp. unroll_and_jam) directive on top of the inner (resp. surrounding) loop. You can enforce an unroll factor: #pragma unroll_and_jam N, unroll_and_jam(N), unroll N or unroll(N)







      6.1.8  -  Loop 2739 from exec
  =========================================================================================================

The loop is defined in /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/parcsr_ls/ams.c:3664-3669.

The related source loop is not unrolled or unrolled with no peel/tail loop.

      6.1.8.1  -  Path 1
  ---------------------------------------------------------------------------------------------------------

0% of peak computational performance is used (0.00 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.8.1.1  -  Vectorization
  ---------------------------------------------------------------------------------------------------------

Your loop is not vectorized.
4 data elements could be processed at once in vector registers.
By vectorizing your loop, you can lower the cost of an iteration from 2.00 to 0.50 cycles (4.00x speedup).

Details
All VPU instructions are used in scalar version (process only one data element in vector registers).
Since your execution units are vector units, only a vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)




No data for this section



      6.1.8.1.2  -  Slow data structures access
  ---------------------------------------------------------------------------------------------------------

Detected data structures (typically arrays) that cannot be efficiently read/written

Details
 - Constant unknown stride: 1 occurrence(s)
 - Irregular (variable stride) or indirect: 2 occurrence(s)
Non-unit stride (uncontiguous) accesses are not efficiently using data caches


Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)
 - Try to remove indirect accesses. If applicable, precompute elements out of the innermost loop.



      6.1.8.1.3  -  Matching between your loop (in the source code) and the binary loop
  ---------------------------------------------------------------------------------------------------------

The binary loop does not contain any FP arithmetical operations.
The binary loop does not load or store any data.







      6.1.9  -  Loop 245 from exec
  =========================================================================================================

The loop is defined in /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/parcsr_ls/par_coarsen.c:2361-2369.

The related source loop is not unrolled or unrolled with no peel/tail loop.
Warnings:
 - Ignoring paths for analysis
 - Failed to get the number of paths
 - RecMII not computed since number of paths is unknown or > max_paths
 - Streams not analyzed since number of paths is unknown or > max_paths


      6.1.9.1  -  Path 1
  ---------------------------------------------------------------------------------------------------------

0% of peak computational performance is used (0.00 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.9.1.1  -  Vectorization
  ---------------------------------------------------------------------------------------------------------

Your loop is not vectorized.
4 data elements could be processed at once in vector registers.
By vectorizing your loop, you can lower the cost of an iteration from 3.00 to 0.75 cycles (4.00x speedup).

Details
All VPU instructions are used in scalar version (process only one data element in vector registers).
Since your execution units are vector units, only a vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)




No data for this section



      6.1.9.1.2  -  Matching between your loop (in the source code) and the binary loop
  ---------------------------------------------------------------------------------------------------------

The binary loop does not contain any FP arithmetical operations.
The binary loop does not load or store any data.







      6.1.10  -  Loop 3751 from exec
  =========================================================================================================

The loop is defined in /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/seq_mv/vector.c:485-486.

The related source loop is unrolled by 2 (including vectorization).

      6.1.10.1  -  Path 1
  ---------------------------------------------------------------------------------------------------------

12% of peak computational performance is used (4.00 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.10.1.1  -  Vectorization
  ---------------------------------------------------------------------------------------------------------

Your loop is partially vectorized.
Only 65% of vector register length is used (average across all VPU instructions).
By fully vectorizing your loop, you can lower the cost of an iteration from 2.00 to 1.56 cycles (1.28x speedup).

Details
80% of VPU instructions are used in vector version (process two or more data elements in vector registers):
 - 0% of VPU addition or subtraction instructions are used in vector version.
Since your execution units are vector units, only a fully vectorized loop can use their full power.





      6.1.10.1.2  -  FMA
  ---------------------------------------------------------------------------------------------------------

Detected 4 FMA (fused multiply-add) operations.




      6.1.10.1.3  -  Slow data structures access
  ---------------------------------------------------------------------------------------------------------

Detected data structures (typically arrays) that cannot be efficiently read/written

Details
 - Constant non-unit stride: 2 occurrence(s)
Non-unit stride (uncontiguous) accesses are not efficiently using data caches


Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)



      6.1.10.1.4  -  Matching between your loop (in the source code) and the binary loop
  ---------------------------------------------------------------------------------------------------------

The binary loop is composed of 8 FP arithmetical operations:
 - 4: addition or subtraction (all inside FMA instructions)
 - 4: multiply (all inside FMA instructions)
The binary loop does not load or store any data.





[MAQAO] Info: STOP THE REPORT GENERATION
[MAQAO] Info: 
[MAQAO] Info: If your application produces files, they can be found in directory "/home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/run/oneview_runs/compilers/armclang_4/oneview_run_1781886151"
[MAQAO] Info: 
