OV - exec - Loop 947

	Loop Id: 947	Module: exec	Source: par_lr_interp.c:1555-1680 [...]	Coverage: 0.04%

0x456c94 STR	X2, [SP, #216]

0x456c98 LDR	X2, [SP, #208]

0x456c9c LDR	X25, [SP, #232]

0x456ca0 B	456cc0

  (946) 0x456ca4 LDR	D7, [X6, X23,LSL #3]

  (946) 0x456ca8 LDR	D22, [X11, X1,LSL #3]

  (946) 0x456cac FADD	D29, D7, D22

  (946) 0x456cb0 STR	D29, [X6, X23,LSL #3]

  (946) 0x456cb4 ADD	X1, X1, #1

  (946) 0x456cb8 CMP	X1, X14

  (946) 0x456cbc B.EQ	456d20

  (948) 0x456cc0 LDR	X3, [X15, X1,LSL #3]

  (948) 0x456cc4 LDR	X23, [X19, X3,LSL #3]

  (948) 0x456cc8 UBFM	X13, X3, #61, #60

  (948) 0x456ccc CMP	X0, X23

  (948) 0x456cd0 B.LE	456ca4

  (948) 0x456cd4 CMP	X23, X5

  (948) 0x456cd8 B.EQ	4570d8

  (948) 0x456cdc LDR	X10, [X20, X3,LSL #3]

  (948) 0x456ce0 CMN	X10, #3

  (948) 0x456ce4 B.EQ	456cb4

  (948) 0x456ce8 LDR	X16, [SP, #160]

  (948) 0x456cec CMP	X16, #1

  (948) 0x456cf0 B.EQ	456d04

  (948) 0x456cf4 LDR	X17, [X2, X3,LSL #3]

  (948) 0x456cf8 LDR	X3, [X2, X21,LSL #3]

  (948) 0x456cfc CMP	X3, X17

  (948) 0x456d00 B.NE	456cb4

  (948) 0x456d04 LDR	D0, [X11, X1,LSL #3]

  (948) 0x456d08 ADD	X1, X1, #1

  (948) 0x456d0c FADD	D1, D1, D0

  (948) 0x456d10 CMP	X1, X14

  (948) 0x456d14 B.NE	456cc0

    (949) 0x456d18 HINT	#0

    (949) 0x456d1c HINT	#0

    (949) 0x456d20 LDR	X2, [SP, #216]

  (951) 0x456d24 LDR	X14, [SP, #176]

  (951) 0x456d28 CMP	X14, #1

  (951) 0x456d2c B.GT	4572a0

0x4570d8 LDR	X10, [SP, #200]

0x4570dc ADD	X23, X13, #8

0x4570e0 FMOV	D2, D8

0x4570e4 STR	X23, [SP, #280]

0x4570e8 LDR	X13, [X10, X3,LSL #3]

0x4570ec LDR	X16, [X10, X23]

0x4570f0 LDR	D3, [X11, X13,LSL #3]

0x4570f4 ADD	X13, X13, #1

0x4570f8 ORR	X10, XZR, X13

0x4570fc FCMPE	D3, #0

0x457100 FCSEL	D7, D6, D5, #4

0x457104 CMP	X13, X16

0x457108 B.GE	457260

0x45710c SUB	X17, X16, X13

0x457110 ANDS	X23, X17, #4160

0x457114 B.EQ	4571a8

0x457118 CMP	X23, #1

0x45711c B.EQ	457178

0x457120 CMP	X23, #2

0x457124 B.EQ	457150

0x457128 LDR	X10, [X15, X13,LSL #3]

0x45712c LDR	X17, [X19, X10,LSL #3]

0x457130 CMP	X0, X17

0x457134 CCMP	X10, X21, #4, #12

0x457138 B.NE	45714c

0x45713c LDR	D16, [X11, X13,LSL #3]

0x457140 FMUL	D4, D16, D7

0x457144 FCMPE	D4, #0

0x457148 B.MI	458268

0x45714c ADD	X10, X13, #1

0x457150 LDR	X17, [X15, X10,LSL #3]

0x457154 LDR	X23, [X19, X17,LSL #3]

0x457158 CMP	X0, X23

0x45715c CCMP	X17, X21, #4, #12

0x457160 B.NE	457174

0x457164 LDR	D17, [X11, X10,LSL #3]

0x457168 FMUL	D18, D17, D7

0x45716c FCMPE	D18, #0

0x457170 B.MI	458050

0x457174 ADD	X10, X10, #1

0x457178 LDR	X17, [X15, X10,LSL #3]

0x45717c LDR	X23, [X19, X17,LSL #3]

0x457180 CMP	X0, X23

0x457184 CCMP	X17, X21, #4, #12

0x457188 B.NE	45719c

0x45718c LDR	D19, [X11, X10,LSL #3]

0x457190 FMUL	D20, D19, D7

0x457194 FCMPE	D20, #0

0x457198 B.MI	457f4c

0x45719c ADD	X10, X10, #1

0x4571a0 CMP	X10, X16

0x4571a4 B.EQ	457260

0x4571a8 ORR	X23, XZR, X9

0x4571ac STR	X1, [SP, #288]

  (967) 0x4571b0 LDR	X9, [X15, X10,LSL #3]

  (967) 0x4571b4 LDR	X1, [X19, X9,LSL #3]

  (967) 0x4571b8 CMP	X0, X1

  (967) 0x4571bc CCMP	X9, X21, #4, #12

  (967) 0x4571c0 B.NE	4571d4

  (967) 0x4571c4 LDR	D21, [X11, X10,LSL #3]

  (967) 0x4571c8 FMUL	D22, D21, D7

  (967) 0x4571cc FCMPE	D22, #0

  (967) 0x4571d0 B.MI	457488

  (967) 0x4571d4 ADD	X9, X10, #1

  (967) 0x4571d8 LDR	X10, [X15, X9,LSL #3]

  (967) 0x4571dc LDR	X17, [X19, X10,LSL #3]

  (967) 0x4571e0 CMP	X0, X17

  (967) 0x4571e4 CCMP	X10, X21, #4, #12

  (967) 0x4571e8 B.NE	4571fc

  (967) 0x4571ec LDR	D23, [X11, X9,LSL #3]

  (967) 0x4571f0 FMUL	D24, D23, D7

  (967) 0x4571f4 FCMPE	D24, #0

  (967) 0x4571f8 B.MI	457498

  (967) 0x4571fc ADD	X17, X9, #1

  (967) 0x457200 LDR	X10, [X15, X17,LSL #3]

  (967) 0x457204 LDR	X1, [X19, X10,LSL #3]

  (967) 0x457208 CMP	X0, X1

  (967) 0x45720c CCMP	X10, X21, #4, #12

  (967) 0x457210 B.NE	457224

  (967) 0x457214 LDR	D25, [X11, X17,LSL #3]

  (967) 0x457218 FMUL	D26, D25, D7

  (967) 0x45721c FCMPE	D26, #0

  (967) 0x457220 B.MI	457490

  (967) 0x457224 ADD	X17, X9, #2

  (967) 0x457228 LDR	X10, [X15, X17,LSL #3]

  (967) 0x45722c LDR	X1, [X19, X10,LSL #3]

  (967) 0x457230 CMP	X0, X1

  (967) 0x457234 CCMP	X10, X21, #4, #12

  (967) 0x457238 B.NE	45724c

  (967) 0x45723c LDR	D27, [X11, X17,LSL #3]

  (967) 0x457240 FMUL	D28, D27, D7

  (967) 0x457244 FCMPE	D28, #0

  (967) 0x457248 B.MI	457480

  (967) 0x45724c ADD	X10, X9, #3

  (967) 0x457250 CMP	X10, X16

  (967) 0x457254 B.NE	4571b0

0x457258 LDR	X1, [SP, #288]

0x45725c ORR	X9, XZR, X23

0x457260 LDR	X23, [SP, #176]

0x457264 CMP	X23, #1

0x457268 B.GT	457838

0x45726c FCMP	D2, #0

0x457270 LDR	D21, [X11, X1,LSL #3]

0x457274 B.NE	457b04

0x457278 FADD	D1, D1, D21

0x45727c B	456cb4

  (950) 0x457280 LDR	X10, [SP, #200]

  (950) 0x457284 LDR	X25, [X10, X21,LSL #3]

  (950) 0x457288 LDR	X14, [X10, X8]

  (950) 0x45728c ADD	X1, X25, #1

  (950) 0x457290 LDR	D1, [X11, X25,LSL #3]

  (950) 0x457294 CMP	X14, X1

  (950) 0x457298 B.GT	456c94

  (950) 0x45729c HINT	#0

  (950) 0x4572a0 LDR	X23, [SP, #320]

  (950) 0x4572a4 LDR	X1, [X23, X21,LSL #3]

  (950) 0x4572a8 LDR	X10, [X23, X8]

  (950) 0x4572ac CMP	X10, X1

  (950) 0x4572b0 B.LE	456d30

  (950) 0x45736c LDR	X14, [SP, #144]

  (950) 0x457370 LDR	X10, [X14, X21,LSL #3]

  (950) 0x457374 LDR	X14, [X14, X8]

  (950) 0x457378 CMP	X10, X14

  (950) 0x45737c B.GE	457280

  (951) 0x457380 STR	X22, [SP, #176]

  (951) 0x457384 STR	X11, [SP, #216]

  (951) 0x457388 STR	X4, [SP, #280]

  (951) 0x45738c LDP	X23, X16, [SP, #184]

  (951) 0x457390 LDR	X22, [SP, #224]

  (951) 0x457394 LDR	X17, [SP, #248]

  (951) 0x457398 LDR	X11, [SP, #256]

  (951) 0x45739c LDR	X4, [SP, #312]

  (951) 0x4573a0 B	4573d4

    (952) 0x4573a4 LDR	X25, [X26, X1,LSL #3]

    (952) 0x4573a8 CMP	X7, X25

    (952) 0x4573ac B.LE	4573c8

    (952) 0x4573b0 STR	X9, [X26, X13]

    (952) 0x4573b4 STR	X1, [X11, X9,LSL #3]

    (952) 0x4573b8 STR	D8, [X30, X9,LSL #3]

    (952) 0x4573bc ADD	X9, X9, #1

    (952) 0x4573c0 LDR	X1, [SP, #144]

    (952) 0x4573c4 LDR	X14, [X1, X8]

    (952) 0x4573c8 ADD	X10, X10, #1

    (952) 0x4573cc CMP	X14, X10

    (952) 0x4573d0 B.LE	4574a0

    (952) 0x4573d4 LDR	X1, [X23, X10,LSL #3]

    (952) 0x4573d8 CBZ	X16, 4573e0

    (952) 0x4573dc LDR	X1, [X16, X1,LSL #3]

    (952) 0x4573e0 UBFM	X13, X1, #61, #60

    (952) 0x4573e4 LDR	X3, [X24, X1,LSL #3]

    (952) 0x4573e8 TBZ	X3, #63, 4573a4

    (952) 0x4573ec CMN	X3, #3

    (952) 0x4573f0 B.EQ	4573c8

    (952) 0x4573f4 ADD	X25, X13, #8

    (952) 0x4573f8 STR	X5, [X26, X13]

    (952) 0x4573fc LDR	X3, [X4, X13]

    (952) 0x457400 ADD	X14, X4, X25

    (952) 0x457404 LDR	X13, [X4, X25]

    (952) 0x457408 CMP	X3, X13

    (952) 0x45740c B.LT	457444

    (952) 0x457410 B	4573c0

      (953) 0x457414 LDR	X1, [X19, X25,LSL #3]

      (953) 0x457418 CMP	X0, X1

      (953) 0x45741c B.LE	457438

      (953) 0x457420 STR	X2, [X19, X25,LSL #3]

      (953) 0x457424 LDR	X13, [X18, X25,LSL #3]

      (953) 0x457428 STR	X13, [X28, X2,LSL #3]

      (953) 0x45742c LDR	X13, [X14]

      (953) 0x457430 STR	D8, [X6, X2,LSL #3]

      (953) 0x457434 ADD	X2, X2, #1

      (953) 0x457438 ADD	X3, X3, #1

      (953) 0x45743c CMP	X3, X13

      (953) 0x457440 B.GE	4573c0

      (953) 0x457444 LDR	X1, [X17, X3,LSL #3]

      (953) 0x457448 CMP	X12, X1

      (953) 0x45744c SUB	X25, X1, X12

      (953) 0x457450 CCMP	X22, X1, #4, #13

      (953) 0x457454 B.GT	457414

      (953) 0x457458 ORN	X1, XZR, X1

      (953) 0x45745c LDR	X25, [X26, X1,LSL #3]

      (953) 0x457460 CMP	X7, X25

      (953) 0x457464 B.LE	457438

      (953) 0x457468 STR	X9, [X26, X1,LSL #3]

      (953) 0x45746c STR	X1, [X11, X9,LSL #3]

      (953) 0x457470 STR	D8, [X30, X9,LSL #3]

      (953) 0x457474 ADD	X9, X9, #1

      (953) 0x457478 LDR	X13, [X14]

      (953) 0x45747c B	457438

  (967) 0x457480 FADD	D2, D2, D27

  (967) 0x457484 B	45724c

  (967) 0x457488 FADD	D2, D2, D21

  (967) 0x45748c B	4571d4

  (967) 0x457490 FADD	D2, D2, D25

  (967) 0x457494 B	457224

  (967) 0x457498 FADD	D2, D2, D23

  (967) 0x45749c B	4571fc

  (951) 0x4574a0 LDR	X16, [SP, #168]

  (951) 0x4574a4 LDR	X13, [SP, #200]

  (951) 0x4574a8 LDR	X11, [SP, #216]

  (951) 0x4574ac LDR	X17, [X16]

  (951) 0x4574b0 LDR	X10, [X13, X21,LSL #3]

  (951) 0x4574b4 LDR	X14, [X13, X8]

  (951) 0x4574b8 LDR	X22, [SP, #176]

  (951) 0x4574bc ADD	X1, X10, #1

  (951) 0x4574c0 STR	X17, [SP, #176]

  (951) 0x4574c4 LDR	D1, [X11, X10,LSL #3]

  (951) 0x4574c8 LDR	X4, [SP, #280]

  (951) 0x4574cc CMP	X14, X1

  (951) 0x4574d0 B.GT	456c94

  (951) 0x4574d4 B	456d24

0x457838 LDR	X23, [SP, #280]

0x45783c LDR	X17, [SP, #320]

0x457840 LDR	X23, [X17, X23]

0x457844 LDR	X10, [X17, X3,LSL #3]

0x457848 STR	X23, [SP, #288]

0x45784c CMP	X10, X23

0x457850 B.GE	45726c

0x457854 SUB	X17, X23, X10

0x457858 ANDS	X23, X17, #4224

0x45785c B.EQ	457978

0x457860 CMP	X23, #1

0x457864 B.EQ	457958

0x457868 CMP	X23, #2

0x45786c B.EQ	457944

0x457870 CMP	X23, #3

0x457874 B.EQ	45791c

0x457878 CMP	X23, #4

0x45787c B.EQ	4578f4

0x457880 CMP	X23, #5

0x457884 B.EQ	4578cc

0x457888 CMP	X23, #6

0x45788c B.EQ	4578b8

0x457890 LDR	X17, [X25, X10,LSL #3]

0x457894 LDR	X23, [X26, X17,LSL #3]

0x457898 CMP	X7, X23

0x45789c B.GT	4578b4

0x4578a0 LDR	X17, [SP, #240]

0x4578a4 LDR	D29, [X17, X10,LSL #3]

0x4578a8 FMUL	D30, D29, D7

0x4578ac FCMPE	D30, #0

0x4578b0 B.MI	4585f4

0x4578b4 ADD	X10, X10, #1

0x4578b8 LDR	X23, [X25, X10,LSL #3]

0x4578bc LDR	X17, [X26, X23,LSL #3]

0x4578c0 CMP	X7, X17

0x4578c4 B.LE	458428

0x4578c8 ADD	X10, X10, #1

0x4578cc LDR	X17, [X25, X10,LSL #3]

0x4578d0 LDR	X23, [X26, X17,LSL #3]

0x4578d4 CMP	X7, X23

0x4578d8 B.GT	4578f0

0x4578dc LDR	X17, [SP, #240]

0x4578e0 LDR	D3, [X17, X10,LSL #3]

0x4578e4 FMUL	D16, D3, D7

0x4578e8 FCMPE	D16, #0

0x4578ec B.MI	458508

0x4578f0 ADD	X10, X10, #1

0x4578f4 LDR	X23, [X25, X10,LSL #3]

0x4578f8 LDR	X17, [X26, X23,LSL #3]

0x4578fc CMP	X7, X17

0x457900 B.GT	457918

0x457904 LDR	X23, [SP, #240]

0x457908 LDR	D17, [X23, X10,LSL #3]

0x45790c FMUL	D4, D17, D7

0x457910 FCMPE	D4, #0

0x457914 B.MI	4584b8

0x457918 ADD	X10, X10, #1

0x45791c LDR	X17, [X25, X10,LSL #3]

0x457920 LDR	X23, [X26, X17,LSL #3]

0x457924 CMP	X7, X23

0x457928 B.GT	457940

0x45792c LDR	X17, [SP, #240]

0x457930 LDR	D18, [X17, X10,LSL #3]

0x457934 FMUL	D19, D18, D7

0x457938 FCMPE	D19, #0

0x45793c B.MI	458440

0x457940 ADD	X10, X10, #1

0x457944 LDR	X23, [X25, X10,LSL #3]

0x457948 LDR	X17, [X26, X23,LSL #3]

0x45794c CMP	X7, X17

0x457950 B.LE	45805c

0x457954 ADD	X10, X10, #1

0x457958 LDR	X17, [X25, X10,LSL #3]

0x45795c LDR	X23, [X26, X17,LSL #3]

0x457960 CMP	X7, X23

0x457964 B.LE	458000

0x457968 LDR	X23, [SP, #288]

0x45796c ADD	X10, X10, #1

0x457970 CMP	X10, X23

0x457974 B.EQ	45726c

0x457978 LDR	X17, [SP, #240]

0x45797c STR	X9, [SP, #296]

  (966) 0x457980 LDR	X9, [X25, X10,LSL #3]

  (966) 0x457984 LDR	X23, [X26, X9,LSL #3]

  (966) 0x457988 CMP	X7, X23

  (966) 0x45798c B.GT	4579a0

  (966) 0x457990 LDR	D24, [X17, X10,LSL #3]

  (966) 0x457994 FMUL	D25, D24, D7

  (966) 0x457998 FCMPE	D25, #0

  (966) 0x45799c B.MI	458240

  (966) 0x4579a0 ADD	X9, X10, #1

  (966) 0x4579a4 LDR	X10, [X25, X9,LSL #3]

  (966) 0x4579a8 LDR	X23, [X26, X10,LSL #3]

  (966) 0x4579ac CMP	X7, X23

  (966) 0x4579b0 B.GT	4579c4

  (966) 0x4579b4 LDR	D26, [X17, X9,LSL #3]

  (966) 0x4579b8 FMUL	D27, D26, D7

  (966) 0x4579bc FCMPE	D27, #0

  (966) 0x4579c0 B.MI	458250

  (966) 0x4579c4 ADD	X10, X9, #1

  (966) 0x4579c8 LDR	X23, [X25, X10,LSL #3]

  (966) 0x4579cc LDR	X23, [X26, X23,LSL #3]

  (966) 0x4579d0 CMP	X7, X23

  (966) 0x4579d4 B.GT	4579e8

  (966) 0x4579d8 LDR	D28, [X17, X10,LSL #3]

  (966) 0x4579dc FMUL	D29, D28, D7

  (966) 0x4579e0 FCMPE	D29, #0

  (966) 0x4579e4 B.MI	458260

  (966) 0x4579e8 ADD	X10, X9, #2

  (966) 0x4579ec LDR	X23, [X25, X10,LSL #3]

  (966) 0x4579f0 LDR	X23, [X26, X23,LSL #3]

  (966) 0x4579f4 CMP	X7, X23

  (966) 0x4579f8 B.GT	457a0c

  (966) 0x4579fc LDR	D30, [X17, X10,LSL #3]

  (966) 0x457a00 FMUL	D31, D30, D7

  (966) 0x457a04 FCMPE	D31, #0

  (966) 0x457a08 B.MI	458230

  (966) 0x457a0c ADD	X10, X9, #3

  (966) 0x457a10 LDR	X23, [X25, X10,LSL #3]

  (966) 0x457a14 LDR	X23, [X26, X23,LSL #3]

  (966) 0x457a18 CMP	X7, X23

  (966) 0x457a1c B.GT	457a30

  (966) 0x457a20 LDR	D0, [X17, X10,LSL #3]

  (966) 0x457a24 FMUL	D3, D0, D7

  (966) 0x457a28 FCMPE	D3, #0

  (966) 0x457a2c B.MI	458258

  (966) 0x457a30 ADD	X10, X9, #4

  (966) 0x457a34 LDR	X23, [X25, X10,LSL #3]

  (966) 0x457a38 LDR	X23, [X26, X23,LSL #3]

  (966) 0x457a3c CMP	X7, X23

  (966) 0x457a40 B.GT	457a54

  (966) 0x457a44 LDR	D16, [X17, X10,LSL #3]

  (966) 0x457a48 FMUL	D17, D16, D7

  (966) 0x457a4c FCMPE	D17, #0

  (966) 0x457a50 B.MI	458248

  (966) 0x457a54 ADD	X10, X9, #5

  (966) 0x457a58 LDR	X23, [X25, X10,LSL #3]

  (966) 0x457a5c LDR	X23, [X26, X23,LSL #3]

  (966) 0x457a60 CMP	X7, X23

  (966) 0x457a64 B.GT	457a78

  (966) 0x457a68 LDR	D18, [X17, X10,LSL #3]

  (966) 0x457a6c FMUL	D4, D18, D7

  (966) 0x457a70 FCMPE	D4, #0

  (966) 0x457a74 B.MI	458228

  (966) 0x457a78 ADD	X10, X9, #6

  (966) 0x457a7c LDR	X23, [X25, X10,LSL #3]

  (966) 0x457a80 LDR	X23, [X26, X23,LSL #3]

  (966) 0x457a84 CMP	X7, X23

  (966) 0x457a88 B.GT	457a9c

  (966) 0x457a8c LDR	D19, [X17, X10,LSL #3]

  (966) 0x457a90 FMUL	D20, D19, D7

  (966) 0x457a94 FCMPE	D20, #0

  (966) 0x457a98 B.MI	458238

  (966) 0x457a9c ADD	X10, X9, #7

  (966) 0x457aa0 LDR	X9, [SP, #288]

  (966) 0x457aa4 CMP	X10, X9

  (966) 0x457aa8 B.NE	457980

0x457aac LDR	X9, [SP, #296]

0x457ab0 B	45726c

0x457b04 FDIV	D22, D21, D2

0x457b08 CMP	X13, X16

0x457b0c B.GE	457c70

0x457b10 SUB	X17, X16, X13

0x457b14 ANDS	X23, X17, #4160

0x457b18 B.EQ	457bb8

0x457b1c CMP	X23, #1

0x457b20 B.EQ	457b84

0x457b24 CMP	X23, #2

0x457b28 B.EQ	457b58

0x457b2c LDR	X10, [X15, X13,LSL #3]

0x457b30 LDR	X17, [X19, X10,LSL #3]

0x457b34 CMP	X0, X17

0x457b38 B.GT	457b4c

0x457b3c LDR	D23, [X11, X13,LSL #3]

0x457b40 FMUL	D2, D23, D7

0x457b44 FCMPE	D2, #0

0x457b48 B.MI	4585d4

0x457b4c CMP	X10, X21

0x457b50 B.EQ	458510

0x457b54 ADD	X13, X13, #1

0x457b58 LDR	X23, [X15, X13,LSL #3]

0x457b5c LDR	X10, [X19, X23,LSL #3]

0x457b60 CMP	X0, X10

0x457b64 B.GT	457b78

0x457b68 LDR	D28, [X11, X13,LSL #3]

0x457b6c FMUL	D29, D28, D7

0x457b70 FCMPE	D29, #0

0x457b74 B.MI	4584f8

0x457b78 CMP	X23, X21

0x457b7c B.EQ	458414

0x457b80 ADD	X13, X13, #1

0x457b84 LDR	X23, [X15, X13,LSL #3]

0x457b88 LDR	X17, [X19, X23,LSL #3]

0x457b8c CMP	X0, X17

0x457b90 B.GT	457ba4

0x457b94 LDR	D16, [X11, X13,LSL #3]

0x457b98 FMUL	D17, D16, D7

0x457b9c FCMPE	D17, #0

0x457ba0 B.MI	458490

0x457ba4 CMP	X23, X21

0x457ba8 B.EQ	458370

0x457bac ADD	X13, X13, #1

0x457bb0 CMP	X13, X16

0x457bb4 B.EQ	457c70

  (965) 0x457bb8 LDR	X10, [X15, X13,LSL #3]

  (965) 0x457bbc LDR	X23, [X19, X10,LSL #3]

  (965) 0x457bc0 CMP	X0, X23

  (965) 0x457bc4 B.GT	457bd8

  (965) 0x457bc8 LDR	D21, [X11, X13,LSL #3]

  (965) 0x457bcc FMUL	D23, D21, D7

  (965) 0x457bd0 FCMPE	D23, #0

  (965) 0x457bd4 B.MI	45811c

  (965) 0x457bd8 CMP	X10, X21

  (965) 0x457bdc B.EQ	458290

  (965) 0x457be0 ADD	X10, X13, #1

  (965) 0x457be4 LDR	X13, [X15, X10,LSL #3]

  (965) 0x457be8 LDR	X17, [X19, X13,LSL #3]

  (965) 0x457bec CMP	X0, X17

  (965) 0x457bf0 B.GT	457c04

  (965) 0x457bf4 LDR	D27, [X11, X10,LSL #3]

  (965) 0x457bf8 FMUL	D28, D27, D7

  (965) 0x457bfc FCMPE	D28, #0

  (965) 0x457c00 B.MI	45810c

  (965) 0x457c04 CMP	X13, X21

  (965) 0x457c08 B.EQ	458274

  (965) 0x457c0c ADD	X17, X10, #1

  (965) 0x457c10 LDR	X13, [X15, X17,LSL #3]

  (965) 0x457c14 LDR	X23, [X19, X13,LSL #3]

  (965) 0x457c18 CMP	X0, X23

  (965) 0x457c1c B.GT	457c30

  (965) 0x457c20 LDR	D3, [X11, X17,LSL #3]

  (965) 0x457c24 FMUL	D16, D3, D7

  (965) 0x457c28 FCMPE	D16, #0

  (965) 0x457c2c B.MI	4580fc

  (965) 0x457c30 CMP	X13, X21

  (965) 0x457c34 B.EQ	4582ac

  (965) 0x457c38 ADD	X17, X10, #2

  (965) 0x457c3c LDR	X13, [X15, X17,LSL #3]

  (965) 0x457c40 LDR	X23, [X19, X13,LSL #3]

  (965) 0x457c44 CMP	X0, X23

  (965) 0x457c48 B.GT	457c5c

  (965) 0x457c4c LDR	D20, [X11, X17,LSL #3]

  (965) 0x457c50 FMUL	D21, D20, D7

  (965) 0x457c54 FCMPE	D21, #0

  (965) 0x457c58 B.MI	4580ec

  (965) 0x457c5c CMP	X13, X21

  (965) 0x457c60 B.EQ	4582c8

  (965) 0x457c64 ADD	X13, X10, #3

  (965) 0x457c68 CMP	X13, X16

  (965) 0x457c6c B.NE	457bb8

0x457c70 LDR	X16, [SP, #176]

0x457c74 CMP	X16, #1

0x457c78 B.LE	456cb4

0x457c7c LDR	X17, [SP, #280]

0x457c80 LDR	X10, [SP, #320]

0x457c84 LDR	X3, [X10, X3,LSL #3]

0x457c88 LDR	X23, [X10, X17]

0x457c8c CMP	X3, X23

0x457c90 B.GE	456cb4

0x457c94 SUB	X13, X23, X3

0x457c98 ANDS	X16, X13, #4224

0x457c9c B.EQ	457ddc

0x457ca0 CMP	X16, #1

0x457ca4 B.EQ	457dac

0x457ca8 CMP	X16, #2

0x457cac B.EQ	457d98

0x457cb0 CMP	X16, #3

0x457cb4 B.EQ	457d70

0x457cb8 CMP	X16, #4

0x457cbc B.EQ	457d48

0x457cc0 CMP	X16, #5

0x457cc4 B.EQ	457d20

0x457cc8 CMP	X16, #6

0x457ccc B.EQ	457cf8

0x457cd0 LDR	X17, [X25, X3,LSL #3]

0x457cd4 LDR	X10, [X26, X17,LSL #3]

0x457cd8 CMP	X7, X10

0x457cdc B.GT	457cf4

0x457ce0 LDR	X13, [SP, #240]

0x457ce4 LDR	D26, [X13, X3,LSL #3]

0x457ce8 FMUL	D27, D26, D7

0x457cec FCMPE	D27, #0

0x457cf0 B.MI	458658

0x457cf4 ADD	X3, X3, #1

0x457cf8 LDR	X16, [X25, X3,LSL #3]

0x457cfc LDR	X17, [X26, X16,LSL #3]

0x457d00 CMP	X7, X17

0x457d04 B.GT	457d1c

0x457d08 LDR	X10, [SP, #240]

0x457d0c LDR	D30, [X10, X3,LSL #3]

0x457d10 FMUL	D31, D30, D7

0x457d14 FCMPE	D31, #0

0x457d18 B.MI	45863c

0x457d1c ADD	X3, X3, #1

0x457d20 LDR	X13, [X25, X3,LSL #3]

0x457d24 LDR	X17, [X26, X13,LSL #3]

0x457d28 CMP	X7, X17

0x457d2c B.GT	457d44

0x457d30 LDR	X16, [SP, #240]

0x457d34 LDR	D16, [X16, X3,LSL #3]

0x457d38 FMUL	D17, D16, D7

0x457d3c FCMPE	D17, #0

0x457d40 B.MI	45862c

0x457d44 ADD	X3, X3, #1

0x457d48 LDR	X10, [X25, X3,LSL #3]

0x457d4c LDR	X13, [X26, X10,LSL #3]

0x457d50 CMP	X7, X13

0x457d54 B.GT	457d6c

0x457d58 LDR	X17, [SP, #240]

0x457d5c LDR	D4, [X17, X3,LSL #3]

0x457d60 FMUL	D20, D4, D7

0x457d64 FCMPE	D20, #0

0x457d68 B.MI	45861c

0x457d6c ADD	X3, X3, #1

0x457d70 LDR	X16, [X25, X3,LSL #3]

0x457d74 LDR	X10, [X26, X16,LSL #3]

0x457d78 CMP	X7, X10

0x457d7c B.GT	457d94

0x457d80 LDR	X13, [SP, #240]

0x457d84 LDR	D24, [X13, X3,LSL #3]

0x457d88 FMUL	D2, D24, D7

0x457d8c FCMPE	D2, #0

0x457d90 B.MI	458608

0x457d94 ADD	X3, X3, #1

0x457d98 LDR	X17, [X25, X3,LSL #3]

0x457d9c LDR	X10, [X26, X17,LSL #3]

0x457da0 CMP	X7, X10

0x457da4 B.LE	4584a0

0x457da8 ADD	X3, X3, #1

0x457dac LDR	X13, [X25, X3,LSL #3]

0x457db0 LDR	X17, [X26, X13,LSL #3]

0x457db4 CMP	X7, X17

0x457db8 B.GT	457dd0

0x457dbc LDR	X10, [SP, #240]

0x457dc0 LDR	D31, [X10, X3,LSL #3]

0x457dc4 FMUL	D0, D31, D7

0x457dc8 FCMPE	D0, #0

0x457dcc B.MI	4585ac

0x457dd0 ADD	X3, X3, #1

0x457dd4 CMP	X3, X23

0x457dd8 B.EQ	456cb4

0x457ddc LDR	X13, [SP, #240]

  (964) 0x457de0 LDR	X16, [X25, X3,LSL #3]

  (964) 0x457de4 LDR	X17, [X26, X16,LSL #3]

  (964) 0x457de8 CMP	X7, X17

  (964) 0x457dec B.GT	457e00

  (964) 0x457df0 LDR	D17, [X13, X3,LSL #3]

  (964) 0x457df4 FMUL	D18, D17, D7

  (964) 0x457df8 FCMPE	D18, #0

  (964) 0x457dfc B.MI	45859c

  (964) 0x457e00 ADD	X3, X3, #1

  (964) 0x457e04 LDR	X10, [X25, X3,LSL #3]

  (964) 0x457e08 LDR	X16, [X26, X10,LSL #3]

  (964) 0x457e0c CMP	X7, X16

  (964) 0x457e10 B.GT	457e24

  (964) 0x457e14 LDR	D20, [X13, X3,LSL #3]

  (964) 0x457e18 FMUL	D21, D20, D7

  (964) 0x457e1c FCMPE	D21, #0

  (964) 0x457e20 B.MI	458544

  (964) 0x457e24 ADD	X17, X3, #1

  (964) 0x457e28 LDR	X10, [X25, X17,LSL #3]

  (964) 0x457e2c LDR	X16, [X26, X10,LSL #3]

  (964) 0x457e30 CMP	X7, X16

  (964) 0x457e34 B.GT	457e48

  (964) 0x457e38 LDR	D2, [X13, X17,LSL #3]

  (964) 0x457e3c FMUL	D25, D2, D7

  (964) 0x457e40 FCMPE	D25, #0

  (964) 0x457e44 B.MI	45857c

  (964) 0x457e48 ADD	X17, X3, #2

  (964) 0x457e4c LDR	X10, [X25, X17,LSL #3]

  (964) 0x457e50 LDR	X16, [X26, X10,LSL #3]

  (964) 0x457e54 CMP	X7, X16

  (964) 0x457e58 B.GT	457e6c

  (964) 0x457e5c LDR	D28, [X13, X17,LSL #3]

  (964) 0x457e60 FMUL	D29, D28, D7

  (964) 0x457e64 FCMPE	D29, #0

  (964) 0x457e68 B.MI	458534

  (964) 0x457e6c ADD	X17, X3, #3

  (964) 0x457e70 LDR	X10, [X25, X17,LSL #3]

  (964) 0x457e74 LDR	X16, [X26, X10,LSL #3]

  (964) 0x457e78 CMP	X7, X16

  (964) 0x457e7c B.GT	457e90

  (964) 0x457e80 LDR	D0, [X13, X17,LSL #3]

  (964) 0x457e84 FMUL	D3, D0, D7

  (964) 0x457e88 FCMPE	D3, #0

  (964) 0x457e8c B.MI	45858c

  (964) 0x457e90 ADD	X17, X3, #4

  (964) 0x457e94 LDR	X10, [X25, X17,LSL #3]

  (964) 0x457e98 LDR	X16, [X26, X10,LSL #3]

  (964) 0x457e9c CMP	X7, X16

  (964) 0x457ea0 B.GT	457eb4

  (964) 0x457ea4 LDR	D18, [X13, X17,LSL #3]

  (964) 0x457ea8 FMUL	D19, D18, D7

  (964) 0x457eac FCMPE	D19, #0

  (964) 0x457eb0 B.MI	45856c

  (964) 0x457eb4 ADD	X17, X3, #5

  (964) 0x457eb8 LDR	X10, [X25, X17,LSL #3]

  (964) 0x457ebc LDR	X16, [X26, X10,LSL #3]

  (964) 0x457ec0 CMP	X7, X16

  (964) 0x457ec4 B.GT	457ed8

  (964) 0x457ec8 LDR	D21, [X13, X17,LSL #3]

  (964) 0x457ecc FMUL	D23, D21, D7

  (964) 0x457ed0 FCMPE	D23, #0

  (964) 0x457ed4 B.MI	458524

  (964) 0x457ed8 ADD	X17, X3, #6

  (964) 0x457edc LDR	X10, [X25, X17,LSL #3]

  (964) 0x457ee0 LDR	X16, [X26, X10,LSL #3]

  (964) 0x457ee4 CMP	X7, X16

  (964) 0x457ee8 B.GT	457efc

  (964) 0x457eec LDR	D25, [X13, X17,LSL #3]

  (964) 0x457ef0 FMUL	D26, D25, D7

  (964) 0x457ef4 FCMPE	D26, #0

  (964) 0x457ef8 B.MI	458554

  (964) 0x457efc ADD	X3, X3, #7

  (964) 0x457f00 CMP	X3, X23

  (964) 0x457f04 B.NE	457de0

0x457f08 B	456cb4

0x457f4c FADD	D2, D2, D19

0x457f50 B	45719c

0x458000 LDR	X17, [SP, #240]

0x458004 LDR	D22, [X17, X10,LSL #3]

0x458008 FMUL	D23, D22, D7

0x45800c FCMPE	D23, #0

0x458010 B.MI	458384

0x458014 B	457968

0x458050 FADD	D2, D2, D17

0x458054 ADD	X10, X10, #1

0x458058 B	457178

0x45805c LDR	X23, [SP, #240]

0x458060 LDR	D20, [X23, X10,LSL #3]

0x458064 FMUL	D21, D20, D7

0x458068 FCMPE	D21, #0

0x45806c B.MI	45838c

0x458070 B	457954

  (965) 0x4580ec LDR	D23, [X6, X23,LSL #3]

  (965) 0x4580f0 FMADD	D2, D22, D20, D23

  (965) 0x4580f4 STR	D2, [X6, X23,LSL #3]

  (965) 0x4580f8 B	457c5c

  (965) 0x4580fc LDR	D17, [X6, X23,LSL #3]

  (965) 0x458100 FMADD	D18, D22, D3, D17

  (965) 0x458104 STR	D18, [X6, X23,LSL #3]

  (965) 0x458108 B	457c30

  (965) 0x45810c LDR	D29, [X6, X17,LSL #3]

  (965) 0x458110 FMADD	D30, D22, D27, D29

  (965) 0x458114 STR	D30, [X6, X17,LSL #3]

  (965) 0x458118 B	457c04

  (965) 0x45811c LDR	D2, [X6, X23,LSL #3]

  (965) 0x458120 FMADD	D24, D22, D21, D2

  (965) 0x458124 STR	D24, [X6, X23,LSL #3]

  (965) 0x458128 B	457bd8

  (966) 0x458228 FADD	D2, D2, D18

  (966) 0x45822c B	457a78

  (966) 0x458230 FADD	D2, D2, D30

  (966) 0x458234 B	457a0c

  (966) 0x458238 FADD	D2, D2, D19

  (966) 0x45823c B	457a9c

  (966) 0x458240 FADD	D2, D2, D24

  (966) 0x458244 B	4579a0

  (966) 0x458248 FADD	D2, D2, D16

  (966) 0x45824c B	457a54

  (966) 0x458250 FADD	D2, D2, D26

  (966) 0x458254 B	4579c4

  (966) 0x458258 FADD	D2, D2, D0

  (966) 0x45825c B	457a30

  (966) 0x458260 FADD	D2, D2, D28

  (966) 0x458264 B	4579e8

0x458268 FADD	D2, D8, D16

0x45826c ADD	X10, X13, #1

0x458270 B	457150

  (965) 0x458274 LDR	D31, [X11, X10,LSL #3]

  (965) 0x458278 FMUL	D0, D31, D7

  (965) 0x45827c FCMPE	D0, #0

  (965) 0x458280 B.MI	458288

  (965) 0x458284 B	457c0c

  (965) 0x458288 FMADD	D1, D22, D31, D1

  (965) 0x45828c B	457c0c

  (965) 0x458290 LDR	D25, [X11, X13,LSL #3]

  (965) 0x458294 FMUL	D26, D25, D7

  (965) 0x458298 FCMPE	D26, #0

  (965) 0x45829c B.MI	4582a4

  (965) 0x4582a0 B	457be0

  (965) 0x4582a4 FMADD	D1, D22, D25, D1

  (965) 0x4582a8 B	457be0

  (965) 0x4582ac LDR	D19, [X11, X17,LSL #3]

  (965) 0x4582b0 FMUL	D4, D19, D7

  (965) 0x4582b4 FCMPE	D4, #0

  (965) 0x4582b8 B.MI	4582c0

  (965) 0x4582bc B	457c38

  (965) 0x4582c0 FMADD	D1, D22, D19, D1

  (965) 0x4582c4 B	457c38

  (965) 0x4582c8 LDR	D24, [X11, X17,LSL #3]

  (965) 0x4582cc FMUL	D25, D24, D7

  (965) 0x4582d0 FCMPE	D25, #0

  (965) 0x4582d4 B.MI	4582dc

  (965) 0x4582d8 B	457c64

  (965) 0x4582dc FMADD	D1, D22, D24, D1

  (965) 0x4582e0 B	457c64

0x458370 LDR	D19, [X11, X13,LSL #3]

0x458374 FMUL	D20, D19, D7

0x458378 FCMPE	D20, #0

0x45837c B.MI	4584f0

0x458380 B	457bac

0x458384 FADD	D2, D2, D22

0x458388 B	457968

0x45838c FADD	D2, D2, D20

0x458390 B	457954

0x458414 LDR	D0, [X11, X13,LSL #3]

0x458418 FMUL	D3, D0, D7

0x45841c FCMPE	D3, #0

0x458420 B.MI	458564

0x458424 B	457b80

0x458428 LDR	X23, [SP, #240]

0x45842c LDR	D31, [X23, X10,LSL #3]

0x458430 FMUL	D0, D31, D7

0x458434 FCMPE	D0, #0

0x458438 B.MI	4585bc

0x45843c B	4578c8

0x458440 FADD	D2, D2, D18

0x458444 ADD	X10, X10, #1

0x458448 B	457944

0x458490 LDR	D18, [X6, X17,LSL #3]

0x458494 FMADD	D4, D22, D16, D18

0x458498 STR	D4, [X6, X17,LSL #3]

0x45849c B	457ba4

0x4584a0 LDR	X16, [SP, #240]

0x4584a4 LDR	D27, [X16, X3,LSL #3]

0x4584a8 FMUL	D28, D27, D7

0x4584ac FCMPE	D28, #0

0x4584b0 B.MI	4585c4

0x4584b4 B	457da8

0x4584b8 FADD	D2, D2, D17

0x4584bc B	457918

0x4584f0 FMADD	D1, D22, D19, D1

0x4584f4 B	457bac

0x4584f8 LDR	D30, [X6, X10,LSL #3]

0x4584fc FMADD	D31, D22, D28, D30

0x458500 STR	D31, [X6, X10,LSL #3]

0x458504 B	457b78

0x458508 FADD	D2, D2, D3

0x45850c B	4578f0

0x458510 LDR	D26, [X11, X13,LSL #3]

0x458514 FMUL	D27, D26, D7

0x458518 FCMPE	D27, #0

0x45851c B.MI	458600

0x458520 B	457b54

  (964) 0x458524 LDR	D24, [X30, X16,LSL #3]

  (964) 0x458528 FMADD	D2, D22, D21, D24

  (964) 0x45852c STR	D2, [X30, X16,LSL #3]

  (964) 0x458530 B	457ed8

  (964) 0x458534 LDR	D30, [X30, X16,LSL #3]

  (964) 0x458538 FMADD	D31, D22, D28, D30

  (964) 0x45853c STR	D31, [X30, X16,LSL #3]

  (964) 0x458540 B	457e6c

  (964) 0x458544 LDR	D23, [X30, X16,LSL #3]

  (964) 0x458548 FMADD	D24, D22, D20, D23

  (964) 0x45854c STR	D24, [X30, X16,LSL #3]

  (964) 0x458550 B	457e24

  (964) 0x458554 LDR	D27, [X30, X16,LSL #3]

  (964) 0x458558 FMADD	D28, D22, D25, D27

  (964) 0x45855c STR	D28, [X30, X16,LSL #3]

  (964) 0x458560 B	457efc

0x458564 FMADD	D1, D22, D0, D1

0x458568 B	457b80

  (964) 0x45856c LDR	D4, [X30, X16,LSL #3]

  (964) 0x458570 FMADD	D20, D22, D18, D4

  (964) 0x458574 STR	D20, [X30, X16,LSL #3]

  (964) 0x458578 B	457eb4

  (964) 0x45857c LDR	D26, [X30, X16,LSL #3]

  (964) 0x458580 FMADD	D27, D22, D2, D26

  (964) 0x458584 STR	D27, [X30, X16,LSL #3]

  (964) 0x458588 B	457e48

  (964) 0x45858c LDR	D16, [X30, X16,LSL #3]

  (964) 0x458590 FMADD	D17, D22, D0, D16

  (964) 0x458594 STR	D17, [X30, X16,LSL #3]

  (964) 0x458598 B	457e90

  (964) 0x45859c LDR	D19, [X30, X17,LSL #3]

  (964) 0x4585a0 FMADD	D4, D22, D17, D19

  (964) 0x4585a4 STR	D4, [X30, X17,LSL #3]

  (964) 0x4585a8 B	457e00

0x4585ac LDR	D3, [X30, X17,LSL #3]

0x4585b0 FMADD	D16, D22, D31, D3

0x4585b4 STR	D16, [X30, X17,LSL #3]

0x4585b8 B	457dd0

0x4585bc FADD	D2, D2, D31

0x4585c0 B	4578c8

0x4585c4 LDR	D29, [X30, X10,LSL #3]

0x4585c8 FMADD	D30, D22, D27, D29

0x4585cc STR	D30, [X30, X10,LSL #3]

0x4585d0 B	457da8

0x4585d4 LDR	D24, [X6, X17,LSL #3]

0x4585d8 FMADD	D25, D22, D23, D24

0x4585dc STR	D25, [X6, X17,LSL #3]

0x4585e0 B	457b4c

0x4585f4 FADD	D2, D2, D29

0x4585f8 ADD	X10, X10, #1

0x4585fc B	4578b8

0x458600 FMADD	D1, D22, D26, D1

0x458604 B	457b54

0x458608 LDR	D25, [X30, X10,LSL #3]

0x45860c ADD	X3, X3, #1

0x458610 FMADD	D26, D22, D24, D25

0x458614 STR	D26, [X30, X10,LSL #3]

0x458618 B	457d98

0x45861c LDR	D21, [X30, X13,LSL #3]

0x458620 FMADD	D23, D22, D4, D21

0x458624 STR	D23, [X30, X13,LSL #3]

0x458628 B	457d6c

0x45862c LDR	D18, [X30, X17,LSL #3]

0x458630 FMADD	D19, D22, D16, D18

0x458634 STR	D19, [X30, X17,LSL #3]

0x458638 B	457d44

0x45863c LDR	D0, [X30, X17,LSL #3]

0x458640 FMADD	D3, D22, D30, D0

0x458644 STR	D3, [X30, X17,LSL #3]

0x458648 B	457d1c

0x458658 LDR	D28, [X30, X10,LSL #3]

0x45865c FMADD	D29, D22, D26, D28

0x458660 STR	D29, [X30, X10,LSL #3]

0x458664 B	457cf4

/home/hbollore/qaas-runs/171-233-5044/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c: 1555 - 1680

--------------------------------------------------------------------------------

1555:              for (jj=S_offd_i[i]; jj < S_offd_i[i+1]; jj++)

1556:              {

1557:                i1 = S_offd_j[jj];

1558:                if(col_offd_S_to_A)

1559:                  i1 = col_offd_S_to_A[i1];

1560:                if ( CF_marker_offd[i1] >= 0)

1561:                {

1562:                  if(P_marker_offd[i1] < jj_begin_row_offd)

1563:                  {

1564:                    P_marker_offd[i1] = jj_counter_offd;

1565:                    P_offd_j[jj_counter_offd] = i1;

1566:                    P_offd_data[jj_counter_offd] = zero;

1567:                    jj_counter_offd++;

1568:                  }

1569:                }

1570:                else if (CF_marker_offd[i1] != -3)

1571:                {

1572:                  P_marker_offd[i1] = strong_f_marker;

1573:                  for(kk = Sop_i[i1]; kk < Sop_i[i1+1]; kk++)

1574:                  {

1575:                    k1 = Sop_j[kk];

1576:                    /* Find local col number */

1577:                    if(k1 >= col_1 && k1 < col_n)

1578:                    {

1579:                      loc_col = k1-col_1;

1580:                      if(P_marker[loc_col] < jj_begin_row)

1581:                      {

1582:                        P_marker[loc_col] = jj_counter;

1583:                        P_diag_j[jj_counter] = fine_to_coarse[loc_col];

1584:                        P_diag_data[jj_counter] = zero;

1585:                        jj_counter++;

1586:                      }

1587:                    }

1588:                    else

1589:                    {

1590:                      loc_col = -k1 - 1;

1591:                      if(P_marker_offd[loc_col] < jj_begin_row_offd)

1592:                      {

1593:                        P_marker_offd[loc_col] = jj_counter_offd;

1594:                        P_offd_j[jj_counter_offd]=loc_col;

1595:                        P_offd_data[jj_counter_offd] = zero;

1596:                        jj_counter_offd++;

[...]

1607:            diagonal = A_diag_data[A_diag_i[i]];

1608:

1609:            for (jj = A_diag_i[i]+1; jj < A_diag_i[i+1]; jj++)

1610:            { /* i1 is a c-point and strongly influences i, accumulate

1611:               * a_(i,i1) into interpolation weight */

1612:              i1 = A_diag_j[jj];

1613:              if (P_marker[i1] >= jj_begin_row)

1614:              {

1615:                P_diag_data[P_marker[i1]] += A_diag_data[jj];

1616:              }

1617:              else if(P_marker[i1] == strong_f_marker)

1618:              {

1619:                sum = zero;

1620:                sgn = 1;

1621:                if(A_diag_data[A_diag_i[i1]] < 0) sgn = -1;

1622:                /* Loop over row of A for point i1 and calculate the sum

1623:                 * of the connections to c-points that strongly influence i. */

1624:                for(jj1 = A_diag_i[i1]+1; jj1 < A_diag_i[i1+1]; jj1++)

1625:                {

1626:                  i2 = A_diag_j[jj1];

1627:                  if((P_marker[i2] >= jj_begin_row || i2 == i) && (sgn*A_diag_data[jj1]) < 0)

1628:                    sum += A_diag_data[jj1];

1629:                }

1630:                if(num_procs > 1)

1631:                {

1632:                  for(jj1 = A_offd_i[i1]; jj1< A_offd_i[i1+1]; jj1++)

1633:                  {

1634:                    i2 = A_offd_j[jj1];

1635:                    if(P_marker_offd[i2] >= jj_begin_row_offd &&

1636:                       (sgn*A_offd_data[jj1]) < 0)

1637:                       sum += A_offd_data[jj1];

1638:                  }

1639:                }

1640:                if(sum != 0)

1641:                {

1642:                  distribute = A_diag_data[jj]/sum;

1643:                  /* Loop over row of A for point i1 and do the distribution */

1644:                  for(jj1 = A_diag_i[i1]+1; jj1 < A_diag_i[i1+1]; jj1++)

1645:                  {

1646:                    i2 = A_diag_j[jj1];

1647:                    if(P_marker[i2] >= jj_begin_row && (sgn*A_diag_data[jj1]) < 0)

1648:                       P_diag_data[P_marker[i2]] +=

1649:                       distribute*A_diag_data[jj1];

1650:                        if(i2 == i && (sgn*A_diag_data[jj1]) < 0)

1651:                          diagonal += distribute*A_diag_data[jj1];

1652:                  }

1653:                  if(num_procs > 1)

1654:                  {

1655:                    for(jj1 = A_offd_i[i1]; jj1 < A_offd_i[i1+1]; jj1++)

1656:                    {

1657:                      i2 = A_offd_j[jj1];

1658:                      if(P_marker_offd[i2] >= jj_begin_row_offd &&

1659:                                 (sgn*A_offd_data[jj1]) < 0)

1660:                        P_offd_data[P_marker_offd[i2]] +=

[...]

1667:                  diagonal += A_diag_data[jj];

1668:                }

1669:              }

1670:              /* neighbor i1 weakly influences i, accumulate a_(i,i1) into

1671:               * diagonal */

1672:              else if (CF_marker[i1] != -3)

1673:              {

1674:                if(num_functions == 1 || dof_func[i] == dof_func[i1])

1675:                  diagonal += A_diag_data[jj];

1676:              }

1677:            }

1678:            if(num_procs > 1)

1679:            {

1680:              for(jj = A_offd_i[i]; jj < A_offd_i[i+1]; jj++)

Coverage (%)	Name	Source Location	Module

Path /

Metric	Value
CQA speedup if no scalar integer	3.62
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	4.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.11
Bottlenecks	P0, P1,
Function	hypre_BoomerAMGBuildExtPIInterp._omp_fn.0
Source	par_lr_interp.c:1609-1609,par_lr_interp.c:1619-1621,par_lr_interp.c:1624-1632,par_lr_interp.c:1635-1637,par_lr_interp.c:1640-1655,par_lr_interp.c:1658-1660,par_lr_interp.c:1667-1667,par_lr_interp.c:1675-1675
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	55.50
CQA cycles if no scalar integer	15.33
CQA cycles if FP arith vectorized	55.50
CQA cycles if fully vectorized	13.88
Front-end cycles	50.00
DIV/SQRT cycles	55.50
P0 cycles	55.50
P1 cycles	22.50
P2 cycles	22.50
P3 cycles	22.50
P4 cycles	22.50
P5 cycles	25.00
P6 cycles	20.00
P7 cycles	20.00
P8 cycles	20.00
P9 cycles	41.50
P10 cycles	41.17
P11 cycles	41.33
P12 cycles	2.50
P13 cycles	2.50
P14 cycles	1.75 - 3.50
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	400.00
Nb uops	400.00
Nb loads	NA
Nb stores	15.00
Nb stack references	0.00
FLOP/cycle	1.10
Nb FLOP add-sub	11.00
Nb FLOP mul	23.00
Nb FLOP fma	13.00
Nb FLOP div	1.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	17.87
Bytes prefetched	0.00
Bytes loaded	872.00
Bytes stored	120.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	25.00
Vector-efficiency ratio load	25.00
Vector-efficiency ratio store	25.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	25.00

Metric	Value
CQA speedup if no scalar integer	3.62
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	4.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.11
Bottlenecks	P0, P1,
Function	hypre_BoomerAMGBuildExtPIInterp._omp_fn.0
Source	par_lr_interp.c:1609-1609,par_lr_interp.c:1619-1621,par_lr_interp.c:1624-1632,par_lr_interp.c:1635-1637,par_lr_interp.c:1640-1655,par_lr_interp.c:1658-1660,par_lr_interp.c:1667-1667,par_lr_interp.c:1675-1675
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	55.50
CQA cycles if no scalar integer	15.33
CQA cycles if FP arith vectorized	55.50
CQA cycles if fully vectorized	13.88
Front-end cycles	50.00
DIV/SQRT cycles	55.50
P0 cycles	55.50
P1 cycles	22.50
P2 cycles	22.50
P3 cycles	22.50
P4 cycles	22.50
P5 cycles	25.00
P6 cycles	20.00
P7 cycles	20.00
P8 cycles	20.00
P9 cycles	41.50
P10 cycles	41.17
P11 cycles	41.33
P12 cycles	2.50
P13 cycles	2.50
P14 cycles	1.75 - 3.50
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	400.00
Nb uops	400.00
Nb loads	NA
Nb stores	15.00
Nb stack references	0.00
FLOP/cycle	1.10
Nb FLOP add-sub	11.00
Nb FLOP mul	23.00
Nb FLOP fma	13.00
Nb FLOP div	1.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	17.87
Bytes prefetched	0.00
Bytes loaded	872.00
Bytes stored	120.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	25.00
Vector-efficiency ratio load	25.00
Vector-efficiency ratio store	25.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	25.00

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	hypre_BoomerAMGBuildExtPIInterp._omp_fn.0
Source file and lines	par_lr_interp.c:1555-1680
Module	exec

The loop is defined in /home/hbollore/qaas-runs/171-233-5044/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1555-1596,1607-1660,1667-1680.

Analyzed code is defined in /home/hbollore/qaas-runs/171-233-5044/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1609,1619-1621,1624-1632,1635-1637,1640-1655,1658-1660,1667,1675.

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Failed to get the number of paths
RecMII not computed since number of paths is unknown or > max_paths

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 55.50 to 15.33 cycles (3.62x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your loop is not vectorized. 4 data elements could be processed at once in vector registers. By vectorizing your loop, you can lower the cost of an iteration from 55.50 to 13.87 cycles (4.00x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with fassociative-math (included in Ofast or ffast-math) to extend loop vectorization to FP reductions.
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

FMA

Detected 13 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible. For instance a + b*c is a valid FMA (MUL then ADD). However (a+b)* c cannot be translated into an FMA (ADD then MUL).

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 61 FP arithmetical operations:

24: addition or subtraction (13 inside FMA instructions)
36: multiply (13 inside FMA instructions)
1: divide

The binary loop is loading 872 bytes. The binary loop is storing 120 bytes.

Arithmetic intensity

Arithmetic intensity is 0.06 FP operations per loaded or stored byte.

General properties

nb instructions	400
loop length	1600
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

50.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	55.50	55.50	22.50	22.50	22.50	22.50	25.00	20.00	20.00	20.00	41.50	41.17	41.33	2.50	2.50
cycles	55.50	55.50	22.50	22.50	22.50	22.50	25.00	20.00	20.00	20.00	41.50	41.17	41.33	2.50	2.50

Execution ports to units layout:

P0:
P1:
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

1.75-3.50

Cycles summary

Front-end	50.00
Overall L1	55.50

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 55.50 cycles. At this rate:

16% of peak load performance is reached (15.71 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (2.16 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 45736c

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
STR X2, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X2, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X25, [SP, #232]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
B 456cc0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xe54>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X10, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X23, X13, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMOV D2, D8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
STR X23, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X13, [X10, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X16, [X10, X23]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D3, [X11, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
ADD X13, X13, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X10, XZR, X13	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FCMPE D3, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
FCSEL D7, D6, D5, #4	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
CMP X13, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GE 457260 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x13f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SUB X17, X16, X13	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ANDS X23, X17, #4160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 4571a8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x133c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X23, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457178 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x130c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X23, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457150 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x12e4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X10, [X15, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X17, [X19, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X0, X17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
CCMP X10, X21, #4, #12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B.NE 45714c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x12e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D16, [X11, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D4, D16, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D4, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 458268 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x23fc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X10, X13, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X17, [X15, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X23, [X19, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X0, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
CCMP X17, X21, #4, #12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B.NE 457174 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D17, [X11, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D18, D17, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D18, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 458050 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x21e4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X10, X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X17, [X15, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X23, [X19, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X0, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
CCMP X17, X21, #4, #12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B.NE 45719c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1330>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D19, [X11, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D20, D19, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D20, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 457f4c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x20e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X10, X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X10, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457260 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x13f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X23, XZR, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X1, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X1, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X9, XZR, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X23, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X23, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 457838 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x19cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FCMP D2, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
LDR D21, [X11, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
B.NE 457b04 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1c98>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FADD D1, D1, D21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
B 456cb4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xe48>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X23, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X17, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X23, [X17, X23]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X10, [X17, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X23, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CMP X10, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GE 45726c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1400>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SUB X17, X23, X10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ANDS X23, X17, #4224	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457978 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1b0c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X23, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457958 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1aec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X23, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457944 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ad8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X23, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 45791c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ab0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X23, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 4578f4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1a88>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X23, #5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 4578cc <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1a60>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X23, #6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 4578b8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1a4c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X17, [X25, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X23, [X26, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X7, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 4578b4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1a48>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X17, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D29, [X17, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D30, D29, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D30, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 4585f4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2788>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X10, X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X23, [X25, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X17, [X26, X23,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X7, X17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 458428 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x25bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X10, X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X17, [X25, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X23, [X26, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X7, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 4578f0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1a84>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X17, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D3, [X17, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D16, D3, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D16, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 458508 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x269c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X10, X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X23, [X25, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X17, [X26, X23,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X7, X17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 457918 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1aac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X23, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D17, [X23, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D4, D17, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D4, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 4584b8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x264c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X10, X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X17, [X25, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X23, [X26, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X7, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 457940 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ad4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X17, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D18, [X17, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D19, D18, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D19, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 458440 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x25d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X10, X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X23, [X25, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X17, [X26, X23,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X7, X17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 45805c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x21f0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X10, X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X17, [X25, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X23, [X26, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X7, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 458000 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2194>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X23, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X10, X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X10, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 45726c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1400>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X17, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X9, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X9, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
B 45726c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1400>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FDIV D22, D21, D2	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1.75-3.50
CMP X13, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GE 457c70 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1e04>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SUB X17, X16, X13	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ANDS X23, X17, #4160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457bb8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1d4c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X23, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457b84 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1d18>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X23, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457b58 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1cec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X10, [X15, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X17, [X19, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X0, X17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 457b4c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ce0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D23, [X11, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D2, D23, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D2, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 4585d4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2768>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X10, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 458510 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x26a4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X13, X13, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X23, [X15, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X10, [X19, X23,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X0, X10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 457b78 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1d0c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D28, [X11, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D29, D28, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D29, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 4584f8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x268c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X23, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 458414 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x25a8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X13, X13, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X23, [X15, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X17, [X19, X23,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X0, X17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 457ba4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1d38>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D16, [X11, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D17, D16, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D17, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 458490 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2624>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X23, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 458370 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2504>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X13, X13, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X13, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457c70 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1e04>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X16, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X16, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 456cb4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xe48>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X17, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X10, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X3, [X10, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X23, [X10, X17]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X3, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GE 456cb4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xe48>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SUB X13, X23, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ANDS X16, X13, #4224	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457ddc <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f70>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X16, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457dac <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f40>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X16, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457d98 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f2c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X16, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457d70 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f04>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X16, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457d48 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1edc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X16, #5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457d20 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1eb4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X16, #6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457cf8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1e8c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X17, [X25, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X10, [X26, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X7, X10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 457cf4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1e88>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X13, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D26, [X13, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D27, D26, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D27, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 458658 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x27ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X16, [X25, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X17, [X26, X16,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X7, X17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 457d1c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1eb0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X10, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D30, [X10, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D31, D30, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D31, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 45863c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x27d0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X13, [X25, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X17, [X26, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X7, X17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 457d44 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ed8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X16, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D16, [X16, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D17, D16, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D17, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 45862c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x27c0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X10, [X25, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X13, [X26, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X7, X13	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 457d6c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X17, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D4, [X17, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D20, D4, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D20, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 45861c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x27b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X16, [X25, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X10, [X26, X16,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X7, X10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 457d94 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f28>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X13, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D24, [X13, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D2, D24, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D2, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 458608 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x279c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X17, [X25, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X10, [X26, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X7, X10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 4584a0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2634>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X13, [X25, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X17, [X26, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X7, X17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 457dd0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f64>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X10, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D31, [X10, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D0, D31, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D0, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 4585ac <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2740>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X3, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 456cb4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xe48>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X13, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
B 456cb4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xe48>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FADD D2, D2, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
B 45719c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1330>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X17, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D22, [X17, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D23, D22, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D23, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 458384 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2518>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 457968 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1afc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FADD D2, D2, D17	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
ADD X10, X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 457178 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x130c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X23, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D20, [X23, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D21, D20, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D21, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 45838c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2520>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 457954 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ae8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FADD D2, D8, D16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
ADD X10, X13, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 457150 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x12e4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D19, [X11, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D20, D19, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D20, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 4584f0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2684>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 457bac <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1d40>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FADD D2, D2, D22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
B 457968 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1afc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FADD D2, D2, D20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
B 457954 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ae8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D0, [X11, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D3, D0, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D3, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 458564 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x26f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 457b80 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1d14>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X23, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D31, [X23, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D0, D31, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D0, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 4585bc <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2750>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 4578c8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1a5c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FADD D2, D2, D18	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
ADD X10, X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 457944 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ad8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D18, [X6, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMADD D4, D22, D16, D18	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
STR D4, [X6, X17,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
B 457ba4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1d38>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X16, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D27, [X16, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D28, D27, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D28, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 4585c4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2758>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 457da8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f3c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FADD D2, D2, D17	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
B 457918 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1aac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FMADD D1, D22, D19, D1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
B 457bac <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1d40>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D30, [X6, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMADD D31, D22, D28, D30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
STR D31, [X6, X10,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
B 457b78 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1d0c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FADD D2, D2, D3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
B 4578f0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1a84>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D26, [X11, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D27, D26, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D27, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 458600 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2794>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 457b54 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ce8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FMADD D1, D22, D0, D1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
B 457b80 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1d14>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D3, [X30, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMADD D16, D22, D31, D3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
STR D16, [X30, X17,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
B 457dd0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f64>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FADD D2, D2, D31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
B 4578c8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1a5c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D29, [X30, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMADD D30, D22, D27, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
STR D30, [X30, X10,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
B 457da8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f3c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D24, [X6, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMADD D25, D22, D23, D24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
STR D25, [X6, X17,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
B 457b4c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ce0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FADD D2, D2, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
ADD X10, X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 4578b8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1a4c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FMADD D1, D22, D26, D1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
B 457b54 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ce8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D25, [X30, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMADD D26, D22, D24, D25	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
STR D26, [X30, X10,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
B 457d98 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f2c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D21, [X30, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMADD D23, D22, D4, D21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
STR D23, [X30, X13,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
B 457d6c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D18, [X30, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMADD D19, D22, D16, D18	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
STR D19, [X30, X17,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
B 457d44 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ed8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D0, [X30, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMADD D3, D22, D30, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
STR D3, [X30, X17,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
B 457d1c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1eb0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D28, [X30, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMADD D29, D22, D26, D28	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
STR D29, [X30, X10,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
B 457cf4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1e88>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50

Function	hypre_BoomerAMGBuildExtPIInterp._omp_fn.0
Source file and lines	par_lr_interp.c:1555-1680
Module	exec

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Failed to get the number of paths
RecMII not computed since number of paths is unknown or > max_paths

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with fassociative-math (included in Ofast or ffast-math) to extend loop vectorization to FP reductions.
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

FMA

Detected 13 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 61 FP arithmetical operations:

24: addition or subtraction (13 inside FMA instructions)
36: multiply (13 inside FMA instructions)
1: divide

The binary loop is loading 872 bytes. The binary loop is storing 120 bytes.

Arithmetic intensity

Arithmetic intensity is 0.06 FP operations per loaded or stored byte.

General properties

nb instructions	400
loop length	1600
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

50.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	55.50	55.50	22.50	22.50	22.50	22.50	25.00	20.00	20.00	20.00	41.50	41.17	41.33	2.50	2.50
cycles	55.50	55.50	22.50	22.50	22.50	22.50	25.00	20.00	20.00	20.00	41.50	41.17	41.33	2.50	2.50

Execution ports to units layout:

P0:
P1:
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

1.75-3.50

Cycles summary

Front-end	50.00
Overall L1	55.50

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 55.50 cycles. At this rate:

16% of peak load performance is reached (15.71 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (2.16 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 45736c

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
STR X2, [SP, #216]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X2, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X25, [SP, #232]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
B 456cc0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xe54>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X10, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X23, X13, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMOV D2, D8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
STR X23, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X13, [X10, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X16, [X10, X23]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D3, [X11, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
ADD X13, X13, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X10, XZR, X13	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FCMPE D3, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
FCSEL D7, D6, D5, #4	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
CMP X13, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GE 457260 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x13f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SUB X17, X16, X13	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ANDS X23, X17, #4160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 4571a8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x133c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X23, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457178 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x130c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X23, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457150 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x12e4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X10, [X15, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X17, [X19, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X0, X17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
CCMP X10, X21, #4, #12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B.NE 45714c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x12e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D16, [X11, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D4, D16, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D4, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 458268 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x23fc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X10, X13, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X17, [X15, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X23, [X19, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X0, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
CCMP X17, X21, #4, #12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B.NE 457174 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D17, [X11, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D18, D17, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D18, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 458050 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x21e4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X10, X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X17, [X15, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X23, [X19, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X0, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
CCMP X17, X21, #4, #12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B.NE 45719c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1330>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D19, [X11, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D20, D19, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D20, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 457f4c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x20e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X10, X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X10, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457260 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x13f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X23, XZR, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X1, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X1, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X9, XZR, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X23, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X23, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 457838 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x19cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FCMP D2, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
LDR D21, [X11, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
B.NE 457b04 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1c98>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FADD D1, D1, D21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
B 456cb4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xe48>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X23, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X17, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X23, [X17, X23]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X10, [X17, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X23, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CMP X10, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GE 45726c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1400>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SUB X17, X23, X10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ANDS X23, X17, #4224	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457978 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1b0c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X23, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457958 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1aec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X23, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457944 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ad8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X23, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 45791c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ab0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X23, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 4578f4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1a88>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X23, #5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 4578cc <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1a60>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X23, #6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 4578b8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1a4c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X17, [X25, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X23, [X26, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X7, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 4578b4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1a48>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X17, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D29, [X17, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D30, D29, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D30, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 4585f4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2788>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X10, X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X23, [X25, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X17, [X26, X23,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X7, X17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 458428 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x25bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X10, X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X17, [X25, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X23, [X26, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X7, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 4578f0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1a84>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X17, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D3, [X17, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D16, D3, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D16, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 458508 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x269c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X10, X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X23, [X25, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X17, [X26, X23,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X7, X17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 457918 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1aac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X23, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D17, [X23, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D4, D17, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D4, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 4584b8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x264c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X10, X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X17, [X25, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X23, [X26, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X7, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 457940 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ad4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X17, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D18, [X17, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D19, D18, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D19, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 458440 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x25d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X10, X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X23, [X25, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X17, [X26, X23,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X7, X17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 45805c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x21f0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X10, X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X17, [X25, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X23, [X26, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X7, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 458000 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2194>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X23, [SP, #288]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X10, X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X10, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 45726c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1400>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X17, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X9, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X9, [SP, #296]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
B 45726c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1400>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FDIV D22, D21, D2	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1.75-3.50
CMP X13, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GE 457c70 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1e04>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SUB X17, X16, X13	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ANDS X23, X17, #4160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457bb8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1d4c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X23, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457b84 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1d18>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X23, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457b58 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1cec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X10, [X15, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X17, [X19, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X0, X17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 457b4c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ce0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D23, [X11, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D2, D23, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D2, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 4585d4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2768>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X10, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 458510 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x26a4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X13, X13, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X23, [X15, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X10, [X19, X23,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X0, X10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 457b78 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1d0c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D28, [X11, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D29, D28, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D29, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 4584f8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x268c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X23, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 458414 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x25a8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X13, X13, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X23, [X15, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X17, [X19, X23,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X0, X17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 457ba4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1d38>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D16, [X11, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D17, D16, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D17, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 458490 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2624>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X23, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 458370 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2504>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X13, X13, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X13, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457c70 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1e04>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X16, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X16, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 456cb4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xe48>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X17, [SP, #280]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X10, [SP, #320]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X3, [X10, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X23, [X10, X17]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X3, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GE 456cb4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xe48>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SUB X13, X23, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ANDS X16, X13, #4224	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457ddc <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f70>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X16, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457dac <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f40>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X16, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457d98 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f2c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X16, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457d70 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f04>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X16, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457d48 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1edc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X16, #5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457d20 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1eb4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X16, #6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 457cf8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1e8c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X17, [X25, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X10, [X26, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X7, X10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 457cf4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1e88>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X13, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D26, [X13, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D27, D26, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D27, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 458658 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x27ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X16, [X25, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X17, [X26, X16,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X7, X17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 457d1c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1eb0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X10, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D30, [X10, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D31, D30, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D31, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 45863c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x27d0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X13, [X25, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X17, [X26, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X7, X17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 457d44 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ed8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X16, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D16, [X16, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D17, D16, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D17, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 45862c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x27c0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X10, [X25, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X13, [X26, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X7, X13	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 457d6c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X17, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D4, [X17, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D20, D4, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D20, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 45861c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x27b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X16, [X25, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X10, [X26, X16,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X7, X10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 457d94 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f28>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X13, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D24, [X13, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D2, D24, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D2, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 458608 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x279c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X17, [X25, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X10, [X26, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X7, X10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.LE 4584a0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2634>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X13, [X25, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X17, [X26, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X7, X17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 457dd0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f64>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X10, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D31, [X10, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D0, D31, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D0, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 4585ac <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2740>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X3, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 456cb4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xe48>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X13, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
B 456cb4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xe48>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FADD D2, D2, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
B 45719c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1330>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X17, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D22, [X17, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D23, D22, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D23, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 458384 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2518>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 457968 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1afc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FADD D2, D2, D17	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
ADD X10, X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 457178 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x130c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X23, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D20, [X23, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D21, D20, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D21, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 45838c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2520>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 457954 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ae8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FADD D2, D8, D16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
ADD X10, X13, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 457150 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x12e4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D19, [X11, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D20, D19, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D20, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 4584f0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2684>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 457bac <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1d40>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FADD D2, D2, D22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
B 457968 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1afc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FADD D2, D2, D20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
B 457954 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ae8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D0, [X11, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D3, D0, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D3, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 458564 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x26f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 457b80 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1d14>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X23, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D31, [X23, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D0, D31, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D0, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 4585bc <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2750>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 4578c8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1a5c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FADD D2, D2, D18	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
ADD X10, X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 457944 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ad8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D18, [X6, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMADD D4, D22, D16, D18	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
STR D4, [X6, X17,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
B 457ba4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1d38>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X16, [SP, #240]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR D27, [X16, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D28, D27, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D28, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 4585c4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2758>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 457da8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f3c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FADD D2, D2, D17	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
B 457918 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1aac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FMADD D1, D22, D19, D1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
B 457bac <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1d40>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D30, [X6, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMADD D31, D22, D28, D30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
STR D31, [X6, X10,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
B 457b78 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1d0c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FADD D2, D2, D3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
B 4578f0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1a84>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D26, [X11, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D27, D26, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FCMPE D27, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.MI 458600 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2794>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 457b54 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ce8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FMADD D1, D22, D0, D1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
B 457b80 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1d14>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D3, [X30, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMADD D16, D22, D31, D3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
STR D16, [X30, X17,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
B 457dd0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f64>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FADD D2, D2, D31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
B 4578c8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1a5c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D29, [X30, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMADD D30, D22, D27, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
STR D30, [X30, X10,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
B 457da8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f3c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D24, [X6, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMADD D25, D22, D23, D24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
STR D25, [X6, X17,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
B 457b4c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ce0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FADD D2, D2, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
ADD X10, X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 4578b8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1a4c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FMADD D1, D22, D26, D1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
B 457b54 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ce8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D25, [X30, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
FMADD D26, D22, D24, D25	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
STR D26, [X30, X10,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
B 457d98 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f2c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D21, [X30, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMADD D23, D22, D4, D21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
STR D23, [X30, X13,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
B 457d6c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D18, [X30, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMADD D19, D22, D16, D18	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
STR D19, [X30, X17,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
B 457d44 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ed8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D0, [X30, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMADD D3, D22, D30, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
STR D3, [X30, X17,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
B 457d1c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1eb0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR D28, [X30, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMADD D29, D22, D26, D28	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
STR D29, [X30, X10,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
B 457cf4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1e88>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

FMA

Workaround

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

FMA

Workaround

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code