OV - exec - Function hypre_CSRMatrixMatvecOutOfPlace._omp

	Function: hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6	Module: exec	Source: csr_matvec.c:243-404 [...]	Coverage: 15.8%

/home/hbollore/qaas-runs/171-233-5044/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c: 243 - 404

--------------------------------------------------------------------------------

243: #pragma omp parallel private(i,jj,tempx)

244: #endif

245:       {

246:       HYPRE_Int iBegin = hypre_CSRMatrixGetLoadBalancedPartitionBegin(A);

247:       HYPRE_Int iEnd = hypre_CSRMatrixGetLoadBalancedPartitionEnd(A);

248:       hypre_assert(iBegin <= iEnd);

249:       hypre_assert(iBegin >= 0 && iBegin <= num_rows);

250:       hypre_assert(iEnd >= 0 && iEnd <= num_rows);

251:

252:       if (0 == temp)

253:       {

254:          if (1 == alpha) // JSP: a common path

255:          {

256:             for (i = iBegin; i < iEnd; i++)

257:             {

258:                tempx = 0.0;

259:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

260:                {

261:                   tempx += A_data[jj] * x_data[A_j[jj]];

262:                }

263:                y_data[i] = tempx;

264:             }

265:          } // y = A*x

266:          else if (-1 == alpha)

267:          {

268:             for (i = iBegin; i < iEnd; i++)

269:             {

270:                tempx = 0.0;

271:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

272:                {

273:                   tempx -= A_data[jj] * x_data[A_j[jj]];

274:                }

275:                y_data[i] = tempx;

276:             }

277:          } // y = -A*x

278:          else

279:          {

280:             for (i = iBegin; i < iEnd; i++)

281:             {

282:                tempx = 0.0;

283:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

284:                {

285:                   tempx += A_data[jj] * x_data[A_j[jj]];

286:                }

287:                y_data[i] = alpha*tempx;

288:             }

289:          } // y = alpha*A*x

290:       } // temp == 0

291:       else if (-1 == temp) // beta == -alpha

292:       {

293:          if (1 == alpha) // JSP: a common path

294:          {

295:             for (i = iBegin; i < iEnd; i++)

296:             {

297:                tempx = -b_data[i];

298:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

299:                {

300:                   tempx += A_data[jj] * x_data[A_j[jj]];

301:                }

302:                y_data[i] = tempx;

303:             }

304:          } // y = A*x - y

305:          else if (-1 == alpha) // JSP: a common path

306:          {

307:             for (i = iBegin; i < iEnd; i++)

308:             {

309:                tempx = b_data[i];

310:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

311:                {

312:                   tempx -= A_data[jj] * x_data[A_j[jj]];

313:                }

314:                y_data[i] = tempx;

315:             }

316:          } // y = -A*x + y

317:          else

318:          {

319:             for (i = iBegin; i < iEnd; i++)

320:             {

321:                tempx = -b_data[i];

322:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

323:                {

324:                   tempx += A_data[jj] * x_data[A_j[jj]];

325:                }

326:                y_data[i] = alpha*tempx;

327:             }

328:          } // y = alpha*(A*x - y)

329:       } // temp == -1

330:       else if (1 == temp)

331:       {

332:          if (1 == alpha) // JSP: a common path

333:          {

334:             for (i = iBegin; i < iEnd; i++)

335:             {

336:                tempx = b_data[i];

337:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

338:                {

339:                   tempx += A_data[jj] * x_data[A_j[jj]];

340:                }

341:                y_data[i] = tempx;

342:             }

343:          } // y = A*x + y

344:          else if (-1 == alpha)

345:          {

346:             for (i = iBegin; i < iEnd; i++)

347:             {

348:                tempx = -b_data[i];

349:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

350:                {

351:                   tempx -= A_data[jj] * x_data[A_j[jj]];

352:                }

353:                y_data[i] = tempx;

354:             }

355:          } // y = -A*x - y

356:          else

357:          {

358:             for (i = iBegin; i < iEnd; i++)

359:             {

360:                tempx = b_data[i];

361:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

362:                {

363:                   tempx += A_data[jj] * x_data[A_j[jj]];

364:                }

365:                y_data[i] = alpha*tempx;

[...]

371:          if (1 == alpha) // JSP: a common path

372:          {

373:             for (i = iBegin; i < iEnd; i++)

374:             {

375:                tempx = b_data[i]*temp;

376:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

377:                {

378:                   tempx += A_data[jj] * x_data[A_j[jj]];

379:                }

380:                y_data[i] = tempx;

381:             }

382:          } // y = A*x + temp*y

383:          else if (-1 == alpha)

384:          {

385:             for (i = iBegin; i < iEnd; i++)

386:             {

387:                tempx = -b_data[i]*temp;

388:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

389:                {

390:                   tempx -= A_data[jj] * x_data[A_j[jj]];

391:                }

392:                y_data[i] = tempx;

393:             }

394:          } // y = -A*x - temp*y

395:          else

396:          {

397:             for (i = iBegin; i < iEnd; i++)

398:             {

399:                tempx = b_data[i]*temp;

400:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

401:                {

402:                   tempx += A_data[jj] * x_data[A_j[jj]];

403:                }

404:                y_data[i] = alpha*tempx;

0x50af00 STP	X29, X30, [SP, #912]!

0x50af04 ORR	X1, XZR, X0

0x50af08 ADD	X29, SP, #0

0x50af0c STP	X21, X22, [SP, #32]

0x50af10 STP	X23, X24, [SP, #48]

0x50af14 LDP	X23, X21, [X0, #8]

0x50af18 STP	D8, D9, [SP, #96]

0x50af1c LDR	D9, [X0]

0x50af20 ORR	X0, XZR, X23

0x50af24 STP	X19, X20, [SP, #16]

0x50af28 LDR	D8, [X1, #72]

0x50af2c STP	X25, X26, [SP, #64]

0x50af30 LDP	X24, X20, [X1, #24]

0x50af34 LDP	X19, X26, [X1, #48]

0x50af38 LDR	X25, [X1, #64]

0x50af3c STR	X27, [SP, #80]

0x50af40 LDR	X27, [X1, #40]

0x50af44 BL	509ae0

0x50af48 ORR	X22, XZR, X0

0x50af4c ORR	X0, XZR, X23

0x50af50 BL	509b84

0x50af54 ORR	X23, XZR, X0

0x50af58 CMP	X22, X0

0x50af5c B.GT	50b75c

0x50af60 CMP	X22, #0

0x50af64 CCMP	X27, X22, #1, #10

0x50af68 B.LT	50b720

0x50af6c CMP	X23, #0

0x50af70 CCMP	X27, X23, #1, #10

0x50af74 B.LT	50b6e4

0x50af78 FCMP	D8, #0

0x50af7c B.EQ	50b170

0x50af80 FMOV	D0, #-1.0000000

0x50af84 FMOV	D1, #1.0000000

0x50af88 FCMP	D8, D0

0x50af8c B.NE	50b51c

0x50af90 FCMP	D9, D1

0x50af94 B.EQ	50b798

0x50af98 FCMP	D9, D0

0x50af9c B.EQ	50bcf0

0x50afa0 CMP	X22, X23

0x50afa4 B.GE	50b150

0x50afa8 ADD	X16, X24, #8

(3718) 0x50afac LDR	D19, [X26, X22,LSL #3]

(3718) 0x50afb0 LDR	X0, [X24, X22,LSL #3]

(3718) 0x50afb4 LDR	X17, [X16, X22,LSL #3]

(3718) 0x50afb8 FNEG	D0, D19

(3718) 0x50afbc CMP	X0, X17

(3718) 0x50afc0 B.GE	50b13c

(3718) 0x50afc4 SUB	X10, X17, X0

(3718) 0x50afc8 ANDS	X11, X10, #4224

(3718) 0x50afcc B.EQ	50b094

(3718) 0x50afd0 CMP	X11, #1

(3718) 0x50afd4 B.EQ	50b078

(3718) 0x50afd8 CMP	X11, #2

(3718) 0x50afdc B.EQ	50b064

(3718) 0x50afe0 CMP	X11, #3

(3718) 0x50afe4 B.EQ	50b050

(3718) 0x50afe8 CMP	X11, #4

(3718) 0x50afec B.EQ	50b03c

(3718) 0x50aff0 CMP	X11, #5

(3718) 0x50aff4 B.EQ	50b028

(3718) 0x50aff8 CMP	X11, #6

(3718) 0x50affc B.EQ	50b014

(3718) 0x50b000 LDR	X6, [X20, X0,LSL #3]

(3718) 0x50b004 LDR	D20, [X21, X0,LSL #3]

(3718) 0x50b008 ADD	X0, X0, #1

(3718) 0x50b00c LDR	D21, [X19, X6,LSL #3]

(3718) 0x50b010 FMADD	D0, D20, D21, D0

(3718) 0x50b014 LDR	X12, [X20, X0,LSL #3]

(3718) 0x50b018 LDR	D22, [X21, X0,LSL #3]

(3718) 0x50b01c ADD	X0, X0, #1

(3718) 0x50b020 LDR	D23, [X19, X12,LSL #3]

(3718) 0x50b024 FMADD	D0, D22, D23, D0

(3718) 0x50b028 LDR	X1, [X20, X0,LSL #3]

(3718) 0x50b02c LDR	D24, [X21, X0,LSL #3]

(3718) 0x50b030 ADD	X0, X0, #1

(3718) 0x50b034 LDR	D25, [X19, X1,LSL #3]

(3718) 0x50b038 FMADD	D0, D24, D25, D0

(3718) 0x50b03c LDR	X7, [X20, X0,LSL #3]

(3718) 0x50b040 LDR	D26, [X21, X0,LSL #3]

(3718) 0x50b044 ADD	X0, X0, #1

(3718) 0x50b048 LDR	D27, [X19, X7,LSL #3]

(3718) 0x50b04c FMADD	D0, D26, D27, D0

(3718) 0x50b050 LDR	X13, [X20, X0,LSL #3]

(3718) 0x50b054 LDR	D28, [X21, X0,LSL #3]

(3718) 0x50b058 ADD	X0, X0, #1

(3718) 0x50b05c LDR	D8, [X19, X13,LSL #3]

(3718) 0x50b060 FMADD	D0, D28, D8, D0

(3718) 0x50b064 LDR	X14, [X20, X0,LSL #3]

(3718) 0x50b068 LDR	D29, [X21, X0,LSL #3]

(3718) 0x50b06c ADD	X0, X0, #1

(3718) 0x50b070 LDR	D30, [X19, X14,LSL #3]

(3718) 0x50b074 FMADD	D0, D29, D30, D0

(3718) 0x50b078 LDR	X5, [X20, X0,LSL #3]

(3718) 0x50b07c LDR	D31, [X21, X0,LSL #3]

(3718) 0x50b080 ADD	X0, X0, #1

(3718) 0x50b084 LDR	D5, [X19, X5,LSL #3]

(3718) 0x50b088 FMADD	D0, D31, D5, D0

(3718) 0x50b08c CMP	X0, X17

(3718) 0x50b090 B.EQ	50b13c

  (3719) 0x50b094 LDR	X15, [X20, X0,LSL #3]

  (3719) 0x50b098 ADD	X18, X0, #1

  (3719) 0x50b09c ADD	X8, X0, #2

  (3719) 0x50b0a0 ADD	X30, X0, #3

  (3719) 0x50b0a4 ADD	X27, X0, #4

  (3719) 0x50b0a8 LDR	D6, [X21, X0,LSL #3]

  (3719) 0x50b0ac ADD	X2, X0, #5

  (3719) 0x50b0b0 ADD	X4, X0, #6

  (3719) 0x50b0b4 ADD	X3, X0, #7

  (3719) 0x50b0b8 ADD	X0, X0, #8

  (3719) 0x50b0bc LDR	X9, [X20, X18,LSL #3]

  (3719) 0x50b0c0 LDR	D3, [X19, X15,LSL #3]

  (3719) 0x50b0c4 LDR	D7, [X21, X18,LSL #3]

  (3719) 0x50b0c8 LDR	D16, [X19, X9,LSL #3]

  (3719) 0x50b0cc LDR	X10, [X20, X8,LSL #3]

  (3719) 0x50b0d0 FMADD	D17, D6, D3, D0

  (3719) 0x50b0d4 LDR	D4, [X21, X8,LSL #3]

  (3719) 0x50b0d8 LDR	X11, [X20, X30,LSL #3]

  (3719) 0x50b0dc FMADD	D18, D7, D16, D17

  (3719) 0x50b0e0 LDR	D19, [X19, X10,LSL #3]

  (3719) 0x50b0e4 LDR	D2, [X21, X30,LSL #3]

  (3719) 0x50b0e8 LDR	D1, [X19, X11,LSL #3]

  (3719) 0x50b0ec LDR	X6, [X20, X27,LSL #3]

  (3719) 0x50b0f0 FMADD	D20, D4, D19, D18

  (3719) 0x50b0f4 LDR	D21, [X21, X27,LSL #3]

  (3719) 0x50b0f8 LDR	X12, [X20, X2,LSL #3]

  (3719) 0x50b0fc FMADD	D22, D2, D1, D20

  (3719) 0x50b100 LDR	D23, [X19, X6,LSL #3]

  (3719) 0x50b104 LDR	D24, [X21, X2,LSL #3]

  (3719) 0x50b108 LDR	D25, [X19, X12,LSL #3]

  (3719) 0x50b10c LDR	X7, [X20, X4,LSL #3]

  (3719) 0x50b110 FMADD	D26, D21, D23, D22

  (3719) 0x50b114 LDR	D27, [X21, X4,LSL #3]

  (3719) 0x50b118 LDR	X1, [X20, X3,LSL #3]

  (3719) 0x50b11c FMADD	D28, D24, D25, D26

  (3719) 0x50b120 LDR	D8, [X19, X7,LSL #3]

  (3719) 0x50b124 LDR	D29, [X21, X3,LSL #3]

  (3719) 0x50b128 LDR	D30, [X19, X1,LSL #3]

  (3719) 0x50b12c FMADD	D31, D27, D8, D28

  (3719) 0x50b130 FMADD	D0, D29, D30, D31

  (3719) 0x50b134 CMP	X0, X17

  (3719) 0x50b138 B.NE	50b094

(3718) 0x50b13c FMUL	D5, D9, D0

(3718) 0x50b140 STR	D5, [X25, X22,LSL #3]

(3718) 0x50b144 ADD	X22, X22, #1

(3718) 0x50b148 CMP	X23, X22

(3718) 0x50b14c B.NE	50afac

(3695) 0x50b150 LDP	X19, X20, [SP, #16]

(3695) 0x50b154 LDP	X21, X22, [SP, #32]

(3695) 0x50b158 LDP	X23, X24, [SP, #48]

(3695) 0x50b15c LDP	X25, X26, [SP, #64]

(3695) 0x50b160 LDR	X27, [SP, #80]

(3695) 0x50b164 LDP	D8, D9, [SP, #96]

(3695) 0x50b168 LDP	X29, X30, [SP], #112

(3695) 0x50b16c RET

(3695) 0x50b170 FMOV	D6, #1.0000000

(3695) 0x50b174 FCMP	D9, D6

(3695) 0x50b178 B.NE	50b344

(3695) 0x50b17c CMP	X22, X23

(3695) 0x50b180 B.GE	50b150

(3695) 0x50b184 ADD	X26, X24, #8

  (3714) 0x50b188 LDR	X1, [X24, X22,LSL #3]

  (3714) 0x50b18c MOVI	D0, #0

  (3714) 0x50b190 LDR	X16, [X26, X22,LSL #3]

  (3714) 0x50b194 CMP	X16, X1

  (3714) 0x50b198 B.LE	50b314

  (3714) 0x50b19c SUB	X2, X16, X1

  (3714) 0x50b1a0 ANDS	X10, X2, #4224

  (3714) 0x50b1a4 B.EQ	50b26c

  (3714) 0x50b1a8 CMP	X10, #1

  (3714) 0x50b1ac B.EQ	50b250

  (3714) 0x50b1b0 CMP	X10, #2

  (3714) 0x50b1b4 B.EQ	50b23c

  (3714) 0x50b1b8 CMP	X10, #3

  (3714) 0x50b1bc B.EQ	50b228

  (3714) 0x50b1c0 CMP	X10, #4

  (3714) 0x50b1c4 B.EQ	50b214

  (3714) 0x50b1c8 CMP	X10, #5

  (3714) 0x50b1cc B.EQ	50b200

  (3714) 0x50b1d0 CMP	X10, #6

  (3714) 0x50b1d4 B.EQ	50b1ec

  (3714) 0x50b1d8 LDR	X8, [X20, X1,LSL #3]

  (3714) 0x50b1dc LDR	D16, [X21, X1,LSL #3]

  (3714) 0x50b1e0 ADD	X1, X1, #1

  (3714) 0x50b1e4 LDR	D17, [X19, X8,LSL #3]

  (3714) 0x50b1e8 FMADD	D0, D16, D17, D0

  (3714) 0x50b1ec LDR	X11, [X20, X1,LSL #3]

  (3714) 0x50b1f0 LDR	D18, [X21, X1,LSL #3]

  (3714) 0x50b1f4 ADD	X1, X1, #1

  (3714) 0x50b1f8 LDR	D3, [X19, X11,LSL #3]

  (3714) 0x50b1fc FMADD	D0, D18, D3, D0

  (3714) 0x50b200 LDR	X17, [X20, X1,LSL #3]

  (3714) 0x50b204 LDR	D19, [X21, X1,LSL #3]

  (3714) 0x50b208 ADD	X1, X1, #1

  (3714) 0x50b20c LDR	D20, [X19, X17,LSL #3]

  (3714) 0x50b210 FMADD	D0, D19, D20, D0

  (3714) 0x50b214 LDR	X0, [X20, X1,LSL #3]

  (3714) 0x50b218 LDR	D21, [X21, X1,LSL #3]

  (3714) 0x50b21c ADD	X1, X1, #1

  (3714) 0x50b220 LDR	D4, [X19, X0,LSL #3]

  (3714) 0x50b224 FMADD	D0, D21, D4, D0

  (3714) 0x50b228 LDR	X12, [X20, X1,LSL #3]

  (3714) 0x50b22c LDR	D22, [X21, X1,LSL #3]

  (3714) 0x50b230 ADD	X1, X1, #1

  (3714) 0x50b234 LDR	D23, [X19, X12,LSL #3]

  (3714) 0x50b238 FMADD	D0, D22, D23, D0

  (3714) 0x50b23c LDR	X7, [X20, X1,LSL #3]

  (3714) 0x50b240 LDR	D2, [X21, X1,LSL #3]

  (3714) 0x50b244 ADD	X1, X1, #1

  (3714) 0x50b248 LDR	D1, [X19, X7,LSL #3]

  (3714) 0x50b24c FMADD	D0, D2, D1, D0

  (3714) 0x50b250 LDR	X6, [X20, X1,LSL #3]

  (3714) 0x50b254 LDR	D24, [X21, X1,LSL #3]

  (3714) 0x50b258 ADD	X1, X1, #1

  (3714) 0x50b25c LDR	D9, [X19, X6,LSL #3]

  (3714) 0x50b260 FMADD	D0, D24, D9, D0

  (3714) 0x50b264 CMP	X16, X1

  (3714) 0x50b268 B.EQ	50b314

    (3715) 0x50b26c LDR	X13, [X20, X1,LSL #3]

    (3715) 0x50b270 ADD	X14, X1, #1

    (3715) 0x50b274 ADD	X18, X1, #2

    (3715) 0x50b278 ADD	X15, X1, #3

    (3715) 0x50b27c ADD	X30, X1, #4

    (3715) 0x50b280 LDR	D25, [X21, X1,LSL #3]

    (3715) 0x50b284 ADD	X5, X1, #5

    (3715) 0x50b288 ADD	X4, X1, #6

    (3715) 0x50b28c ADD	X3, X1, #7

    (3715) 0x50b290 ADD	X1, X1, #8

    (3715) 0x50b294 LDR	X9, [X20, X14,LSL #3]

    (3715) 0x50b298 LDR	D26, [X19, X13,LSL #3]

    (3715) 0x50b29c LDR	D27, [X21, X14,LSL #3]

    (3715) 0x50b2a0 LDR	D28, [X19, X9,LSL #3]

    (3715) 0x50b2a4 LDR	X27, [X20, X18,LSL #3]

    (3715) 0x50b2a8 FMADD	D8, D25, D26, D0

    (3715) 0x50b2ac LDR	D29, [X21, X18,LSL #3]

    (3715) 0x50b2b0 LDR	X2, [X20, X15,LSL #3]

    (3715) 0x50b2b4 FMADD	D30, D27, D28, D8

    (3715) 0x50b2b8 LDR	D31, [X19, X27,LSL #3]

    (3715) 0x50b2bc LDR	D5, [X21, X15,LSL #3]

    (3715) 0x50b2c0 LDR	D6, [X19, X2,LSL #3]

    (3715) 0x50b2c4 LDR	X10, [X20, X30,LSL #3]

    (3715) 0x50b2c8 FMADD	D7, D29, D31, D30

    (3715) 0x50b2cc LDR	D16, [X21, X30,LSL #3]

    (3715) 0x50b2d0 LDR	X8, [X20, X5,LSL #3]

    (3715) 0x50b2d4 FMADD	D17, D5, D6, D7

    (3715) 0x50b2d8 LDR	D18, [X19, X10,LSL #3]

    (3715) 0x50b2dc LDR	D3, [X21, X5,LSL #3]

    (3715) 0x50b2e0 LDR	D19, [X19, X8,LSL #3]

    (3715) 0x50b2e4 LDR	X11, [X20, X4,LSL #3]

    (3715) 0x50b2e8 FMADD	D20, D16, D18, D17

    (3715) 0x50b2ec LDR	D21, [X21, X4,LSL #3]

    (3715) 0x50b2f0 LDR	X17, [X20, X3,LSL #3]

    (3715) 0x50b2f4 FMADD	D4, D3, D19, D20

    (3715) 0x50b2f8 LDR	D22, [X19, X11,LSL #3]

    (3715) 0x50b2fc LDR	D23, [X21, X3,LSL #3]

    (3715) 0x50b300 LDR	D2, [X19, X17,LSL #3]

    (3715) 0x50b304 FMADD	D1, D21, D22, D4

    (3715) 0x50b308 FMADD	D0, D23, D2, D1

    (3715) 0x50b30c CMP	X16, X1

    (3715) 0x50b310 B.NE	50b26c

  (3714) 0x50b314 STR	D0, [X25, X22,LSL #3]

  (3714) 0x50b318 ADD	X22, X22, #1

  (3714) 0x50b31c CMP	X23, X22

  (3714) 0x50b320 B.NE	50b188

(3695) 0x50b324 LDP	X19, X20, [SP, #16]

(3695) 0x50b328 LDP	X21, X22, [SP, #32]

(3695) 0x50b32c LDP	X23, X24, [SP, #48]

(3695) 0x50b330 LDP	X25, X26, [SP, #64]

(3695) 0x50b334 LDR	X27, [SP, #80]

(3695) 0x50b338 LDP	D8, D9, [SP, #96]

(3695) 0x50b33c LDP	X29, X30, [SP], #112

(3695) 0x50b340 RET

(3695) 0x50b344 FMOV	D0, #-1.0000000

(3695) 0x50b348 FCMP	D9, D0

(3695) 0x50b34c B.NE	50bb24

(3695) 0x50b350 CMP	X22, X23

(3695) 0x50b354 B.GE	50b150

(3695) 0x50b358 ADD	X26, X24, #8

(3695) 0x50b35c HINT	#0

  (3700) 0x50b360 LDR	X1, [X24, X22,LSL #3]

  (3700) 0x50b364 MOVI	D0, #0

  (3700) 0x50b368 LDR	X16, [X26, X22,LSL #3]

  (3700) 0x50b36c CMP	X1, X16

  (3700) 0x50b370 B.GE	50b4ec

  (3700) 0x50b374 SUB	X14, X16, X1

  (3700) 0x50b378 ANDS	X15, X14, #4224

  (3700) 0x50b37c B.EQ	50b444

  (3700) 0x50b380 CMP	X15, #1

  (3700) 0x50b384 B.EQ	50b428

  (3700) 0x50b388 CMP	X15, #2

  (3700) 0x50b38c B.EQ	50b414

  (3700) 0x50b390 CMP	X15, #3

  (3700) 0x50b394 B.EQ	50b400

  (3700) 0x50b398 CMP	X15, #4

  (3700) 0x50b39c B.EQ	50b3ec

  (3700) 0x50b3a0 CMP	X15, #5

  (3700) 0x50b3a4 B.EQ	50b3d8

  (3700) 0x50b3a8 CMP	X15, #6

  (3700) 0x50b3ac B.EQ	50b3c4

  (3700) 0x50b3b0 LDR	X18, [X20, X1,LSL #3]

  (3700) 0x50b3b4 LDR	D9, [X21, X1,LSL #3]

  (3700) 0x50b3b8 ADD	X1, X1, #1

  (3700) 0x50b3bc LDR	D25, [X19, X18,LSL #3]

  (3700) 0x50b3c0 FMSUB	D0, D9, D25, D0

  (3700) 0x50b3c4 LDR	X30, [X20, X1,LSL #3]

  (3700) 0x50b3c8 LDR	D26, [X21, X1,LSL #3]

  (3700) 0x50b3cc ADD	X1, X1, #1

  (3700) 0x50b3d0 LDR	D27, [X19, X30,LSL #3]

  (3700) 0x50b3d4 FMSUB	D0, D26, D27, D0

  (3700) 0x50b3d8 LDR	X27, [X20, X1,LSL #3]

  (3700) 0x50b3dc LDR	D28, [X21, X1,LSL #3]

  (3700) 0x50b3e0 ADD	X1, X1, #1

  (3700) 0x50b3e4 LDR	D8, [X19, X27,LSL #3]

  (3700) 0x50b3e8 FMSUB	D0, D28, D8, D0

  (3700) 0x50b3ec LDR	X2, [X20, X1,LSL #3]

  (3700) 0x50b3f0 LDR	D29, [X21, X1,LSL #3]

  (3700) 0x50b3f4 ADD	X1, X1, #1

  (3700) 0x50b3f8 LDR	D30, [X19, X2,LSL #3]

  (3700) 0x50b3fc FMSUB	D0, D29, D30, D0

  (3700) 0x50b400 LDR	X10, [X20, X1,LSL #3]

  (3700) 0x50b404 LDR	D31, [X21, X1,LSL #3]

  (3700) 0x50b408 ADD	X1, X1, #1

  (3700) 0x50b40c LDR	D5, [X19, X10,LSL #3]

  (3700) 0x50b410 FMSUB	D0, D31, D5, D0

  (3700) 0x50b414 LDR	X8, [X20, X1,LSL #3]

  (3700) 0x50b418 LDR	D6, [X21, X1,LSL #3]

  (3700) 0x50b41c ADD	X1, X1, #1

  (3700) 0x50b420 LDR	D7, [X19, X8,LSL #3]

  (3700) 0x50b424 FMSUB	D0, D6, D7, D0

  (3700) 0x50b428 LDR	X11, [X20, X1,LSL #3]

  (3700) 0x50b42c LDR	D16, [X21, X1,LSL #3]

  (3700) 0x50b430 ADD	X1, X1, #1

  (3700) 0x50b434 LDR	D17, [X19, X11,LSL #3]

  (3700) 0x50b438 FMSUB	D0, D16, D17, D0

  (3700) 0x50b43c CMP	X1, X16

  (3700) 0x50b440 B.EQ	50b4ec

    (3713) 0x50b444 LDR	X17, [X20, X1,LSL #3]

    (3713) 0x50b448 ADD	X0, X1, #1

    (3713) 0x50b44c ADD	X7, X1, #2

    (3713) 0x50b450 ADD	X12, X1, #3

    (3713) 0x50b454 ADD	X6, X1, #4

    (3713) 0x50b458 LDR	D18, [X21, X1,LSL #3]

    (3713) 0x50b45c ADD	X5, X1, #5

    (3713) 0x50b460 ADD	X4, X1, #6

    (3713) 0x50b464 ADD	X3, X1, #7

    (3713) 0x50b468 ADD	X1, X1, #8

    (3713) 0x50b46c LDR	X9, [X20, X0,LSL #3]

    (3713) 0x50b470 LDR	D3, [X19, X17,LSL #3]

    (3713) 0x50b474 LDR	D19, [X21, X0,LSL #3]

    (3713) 0x50b478 LDR	D20, [X19, X9,LSL #3]

    (3713) 0x50b47c LDR	X13, [X20, X7,LSL #3]

    (3713) 0x50b480 FMSUB	D21, D18, D3, D0

    (3713) 0x50b484 LDR	D4, [X21, X7,LSL #3]

    (3713) 0x50b488 LDR	X14, [X20, X12,LSL #3]

    (3713) 0x50b48c FMSUB	D22, D19, D20, D21

    (3713) 0x50b490 LDR	D23, [X19, X13,LSL #3]

    (3713) 0x50b494 LDR	D2, [X21, X12,LSL #3]

    (3713) 0x50b498 LDR	D1, [X19, X14,LSL #3]

    (3713) 0x50b49c LDR	X15, [X20, X6,LSL #3]

    (3713) 0x50b4a0 FMSUB	D24, D4, D23, D22

    (3713) 0x50b4a4 LDR	D9, [X21, X6,LSL #3]

    (3713) 0x50b4a8 LDR	X18, [X20, X5,LSL #3]

    (3713) 0x50b4ac FMSUB	D25, D2, D1, D24

    (3713) 0x50b4b0 LDR	D26, [X19, X15,LSL #3]

    (3713) 0x50b4b4 LDR	D27, [X21, X5,LSL #3]

    (3713) 0x50b4b8 LDR	D28, [X19, X18,LSL #3]

    (3713) 0x50b4bc LDR	X30, [X20, X4,LSL #3]

    (3713) 0x50b4c0 FMSUB	D8, D9, D26, D25

    (3713) 0x50b4c4 LDR	D29, [X21, X4,LSL #3]

    (3713) 0x50b4c8 LDR	X27, [X20, X3,LSL #3]

    (3713) 0x50b4cc FMSUB	D30, D27, D28, D8

    (3713) 0x50b4d0 LDR	D31, [X19, X30,LSL #3]

    (3713) 0x50b4d4 LDR	D5, [X21, X3,LSL #3]

    (3713) 0x50b4d8 LDR	D6, [X19, X27,LSL #3]

    (3713) 0x50b4dc FMSUB	D7, D29, D31, D30

    (3713) 0x50b4e0 FMSUB	D0, D5, D6, D7

    (3713) 0x50b4e4 CMP	X1, X16

    (3713) 0x50b4e8 B.NE	50b444

  (3700) 0x50b4ec STR	D0, [X25, X22,LSL #3]

  (3700) 0x50b4f0 ADD	X22, X22, #1

  (3700) 0x50b4f4 CMP	X23, X22

  (3700) 0x50b4f8 B.NE	50b360

(3695) 0x50b4fc LDP	X19, X20, [SP, #16]

(3695) 0x50b500 LDP	X21, X22, [SP, #32]

(3695) 0x50b504 LDP	X23, X24, [SP, #48]

(3695) 0x50b508 LDP	X25, X26, [SP, #64]

(3695) 0x50b50c LDR	X27, [SP, #80]

(3695) 0x50b510 LDP	D8, D9, [SP, #96]

(3695) 0x50b514 LDP	X29, X30, [SP], #112

(3695) 0x50b518 RET

(3695) 0x50b51c FCMP	D8, D1

(3695) 0x50b520 B.NE	50b964

(3695) 0x50b524 FCMP	D9, D1

(3695) 0x50b528 B.EQ	50bea0

(3695) 0x50b52c FCMP	D9, D0

(3695) 0x50b530 B.NE	50c204

(3695) 0x50b534 CMP	X22, X23

(3695) 0x50b538 B.GE	50b150

(3695) 0x50b53c ADD	X16, X24, #8

  (3711) 0x50b540 LDR	D9, [X26, X22,LSL #3]

  (3711) 0x50b544 LDR	X0, [X24, X22,LSL #3]

  (3711) 0x50b548 LDR	X17, [X16, X22,LSL #3]

  (3711) 0x50b54c FNEG	D0, D9

  (3711) 0x50b550 CMP	X0, X17

  (3711) 0x50b554 B.GE	50b6d0

  (3711) 0x50b558 SUB	X7, X17, X0

  (3711) 0x50b55c ANDS	X6, X7, #4224

  (3711) 0x50b560 B.EQ	50b628

  (3711) 0x50b564 CMP	X6, #1

  (3711) 0x50b568 B.EQ	50b60c

  (3711) 0x50b56c CMP	X6, #2

  (3711) 0x50b570 B.EQ	50b5f8

  (3711) 0x50b574 CMP	X6, #3

  (3711) 0x50b578 B.EQ	50b5e4

  (3711) 0x50b57c CMP	X6, #4

  (3711) 0x50b580 B.EQ	50b5d0

  (3711) 0x50b584 CMP	X6, #5

  (3711) 0x50b588 B.EQ	50b5bc

  (3711) 0x50b58c CMP	X6, #6

  (3711) 0x50b590 B.EQ	50b5a8

  (3711) 0x50b594 LDR	X5, [X20, X0,LSL #3]

  (3711) 0x50b598 LDR	D19, [X21, X0,LSL #3]

  (3711) 0x50b59c ADD	X0, X0, #1

  (3711) 0x50b5a0 LDR	D20, [X19, X5,LSL #3]

  (3711) 0x50b5a4 FMSUB	D0, D19, D20, D0

  (3711) 0x50b5a8 LDR	X12, [X20, X0,LSL #3]

  (3711) 0x50b5ac LDR	D21, [X21, X0,LSL #3]

  (3711) 0x50b5b0 ADD	X0, X0, #1

  (3711) 0x50b5b4 LDR	D22, [X19, X12,LSL #3]

  (3711) 0x50b5b8 FMSUB	D0, D21, D22, D0

  (3711) 0x50b5bc LDR	X13, [X20, X0,LSL #3]

  (3711) 0x50b5c0 LDR	D23, [X21, X0,LSL #3]

  (3711) 0x50b5c4 ADD	X0, X0, #1

  (3711) 0x50b5c8 LDR	D24, [X19, X13,LSL #3]

  (3711) 0x50b5cc FMSUB	D0, D23, D24, D0

  (3711) 0x50b5d0 LDR	X14, [X20, X0,LSL #3]

  (3711) 0x50b5d4 LDR	D25, [X21, X0,LSL #3]

  (3711) 0x50b5d8 ADD	X0, X0, #1

  (3711) 0x50b5dc LDR	D26, [X19, X14,LSL #3]

  (3711) 0x50b5e0 FMSUB	D0, D25, D26, D0

  (3711) 0x50b5e4 LDR	X8, [X20, X0,LSL #3]

  (3711) 0x50b5e8 LDR	D27, [X21, X0,LSL #3]

  (3711) 0x50b5ec ADD	X0, X0, #1

  (3711) 0x50b5f0 LDR	D28, [X19, X8,LSL #3]

  (3711) 0x50b5f4 FMSUB	D0, D27, D28, D0

  (3711) 0x50b5f8 LDR	X15, [X20, X0,LSL #3]

  (3711) 0x50b5fc LDR	D8, [X21, X0,LSL #3]

  (3711) 0x50b600 ADD	X0, X0, #1

  (3711) 0x50b604 LDR	D29, [X19, X15,LSL #3]

  (3711) 0x50b608 FMSUB	D0, D8, D29, D0

  (3711) 0x50b60c LDR	X18, [X20, X0,LSL #3]

  (3711) 0x50b610 LDR	D30, [X21, X0,LSL #3]

  (3711) 0x50b614 ADD	X0, X0, #1

  (3711) 0x50b618 LDR	D31, [X19, X18,LSL #3]

  (3711) 0x50b61c FMSUB	D0, D30, D31, D0

  (3711) 0x50b620 CMP	X0, X17

  (3711) 0x50b624 B.EQ	50b6d0

    (3712) 0x50b628 LDR	X30, [X20, X0,LSL #3]

    (3712) 0x50b62c ADD	X27, X0, #1

    (3712) 0x50b630 ADD	X10, X0, #2

    (3712) 0x50b634 ADD	X2, X0, #3

    (3712) 0x50b638 ADD	X11, X0, #4

    (3712) 0x50b63c LDR	D5, [X21, X0,LSL #3]

    (3712) 0x50b640 ADD	X6, X0, #5

    (3712) 0x50b644 ADD	X4, X0, #6

    (3712) 0x50b648 ADD	X3, X0, #7

    (3712) 0x50b64c ADD	X0, X0, #8

    (3712) 0x50b650 LDR	X9, [X20, X27,LSL #3]

    (3712) 0x50b654 LDR	D3, [X19, X30,LSL #3]

    (3712) 0x50b658 LDR	D6, [X21, X27,LSL #3]

    (3712) 0x50b65c LDR	D7, [X19, X9,LSL #3]

    (3712) 0x50b660 LDR	X7, [X20, X10,LSL #3]

    (3712) 0x50b664 FMSUB	D16, D5, D3, D0

    (3712) 0x50b668 LDR	D4, [X21, X10,LSL #3]

    (3712) 0x50b66c LDR	X1, [X20, X2,LSL #3]

    (3712) 0x50b670 FMSUB	D17, D6, D7, D16

    (3712) 0x50b674 LDR	D18, [X19, X7,LSL #3]

    (3712) 0x50b678 LDR	D2, [X21, X2,LSL #3]

    (3712) 0x50b67c LDR	D1, [X19, X1,LSL #3]

    (3712) 0x50b680 LDR	X5, [X20, X11,LSL #3]

    (3712) 0x50b684 FMSUB	D9, D4, D18, D17

    (3712) 0x50b688 LDR	D19, [X21, X11,LSL #3]

    (3712) 0x50b68c LDR	X12, [X20, X6,LSL #3]

    (3712) 0x50b690 FMSUB	D20, D2, D1, D9

    (3712) 0x50b694 LDR	D21, [X19, X5,LSL #3]

    (3712) 0x50b698 LDR	D22, [X21, X6,LSL #3]

    (3712) 0x50b69c LDR	D23, [X19, X12,LSL #3]

    (3712) 0x50b6a0 LDR	X13, [X20, X4,LSL #3]

    (3712) 0x50b6a4 FMSUB	D24, D19, D21, D20

    (3712) 0x50b6a8 LDR	D25, [X21, X4,LSL #3]

    (3712) 0x50b6ac LDR	X14, [X20, X3,LSL #3]

    (3712) 0x50b6b0 FMSUB	D26, D22, D23, D24

    (3712) 0x50b6b4 LDR	D27, [X19, X13,LSL #3]

    (3712) 0x50b6b8 LDR	D28, [X21, X3,LSL #3]

    (3712) 0x50b6bc LDR	D8, [X19, X14,LSL #3]

    (3712) 0x50b6c0 FMSUB	D29, D25, D27, D26

    (3712) 0x50b6c4 FMSUB	D0, D28, D8, D29

    (3712) 0x50b6c8 CMP	X0, X17

    (3712) 0x50b6cc B.NE	50b628

  (3711) 0x50b6d0 STR	D0, [X25, X22,LSL #3]

  (3711) 0x50b6d4 ADD	X22, X22, #1

  (3711) 0x50b6d8 CMP	X23, X22

  (3711) 0x50b6dc B.NE	50b540

(3695) 0x50b6e0 B	50b150

0x50b6e4 ADRP	X11,

0x50b6e8 ADRP	X12,

0x50b6ec LDR	X13, [X11, #4064]

0x50b6f0 ADRP	X14,

0x50b6f4 ADD	X2, X12, #1680

0x50b6f8 ADD	X1, X14, #2624

0x50b6fc LDR	X0, [X13]

0x50b700 BL	516a84

0x50b704 ADRP	X15,

0x50b708 MOVZ	X3, #0

0x50b70c ADD	X0, X15, #1712

0x50b710 MOVZ	X2, #1

0x50b714 MOVZ	X1, #250

0x50b718 BL	51a420

0x50b71c B	50af78

0x50b720 ADRP	X6,

0x50b724 ADRP	X7,

0x50b728 LDR	X8, [X6, #4064]

0x50b72c ADRP	X9,

0x50b730 ADD	X2, X7, #1800

0x50b734 ADD	X1, X9, #2624

0x50b738 LDR	X0, [X8]

0x50b73c BL	516a84

0x50b740 ADRP	X10,

0x50b744 MOVZ	X3, #0

0x50b748 ADD	X0, X10, #1712

0x50b74c MOVZ	X2, #1

0x50b750 MOVZ	X1, #249

0x50b754 BL	51a420

0x50b758 B	50af6c

0x50b75c ADRP	X0,

0x50b760 ADRP	X4,

0x50b764 LDR	X3, [X0, #4064]

0x50b768 ADRP	X2,

0x50b76c ADD	X1, X4, #2624

0x50b770 ADD	X2, X2, #1240

0x50b774 LDR	X0, [X3]

0x50b778 BL	516a84

0x50b77c ADRP	X5,

0x50b780 MOVZ	X3, #0

0x50b784 ADD	X0, X5, #1712

0x50b788 MOVZ	X2, #1

0x50b78c MOVZ	X1, #248

0x50b790 BL	51a420

0x50b794 B	50af60

0x50b798 CMP	X22, X23

0x50b79c B.GE	50b150

0x50b7a0 ADD	X16, X24, #8

(3716) 0x50b7a4 LDR	D21, [X26, X22,LSL #3]

(3716) 0x50b7a8 LDR	X13, [X24, X22,LSL #3]

(3716) 0x50b7ac LDR	X17, [X16, X22,LSL #3]

(3716) 0x50b7b0 FNEG	D0, D21

(3716) 0x50b7b4 CMP	X13, X17

(3716) 0x50b7b8 B.GE	50b934

(3716) 0x50b7bc SUB	X8, X17, X13

(3716) 0x50b7c0 ANDS	X27, X8, #4224

(3716) 0x50b7c4 B.EQ	50b88c

(3716) 0x50b7c8 CMP	X27, #1

(3716) 0x50b7cc B.EQ	50b870

(3716) 0x50b7d0 CMP	X27, #2

(3716) 0x50b7d4 B.EQ	50b85c

(3716) 0x50b7d8 CMP	X27, #3

(3716) 0x50b7dc B.EQ	50b848

(3716) 0x50b7e0 CMP	X27, #4

(3716) 0x50b7e4 B.EQ	50b834

(3716) 0x50b7e8 CMP	X27, #5

(3716) 0x50b7ec B.EQ	50b820

(3716) 0x50b7f0 CMP	X27, #6

(3716) 0x50b7f4 B.EQ	50b80c

(3716) 0x50b7f8 LDR	X2, [X20, X13,LSL #3]

(3716) 0x50b7fc LDR	D22, [X21, X13,LSL #3]

(3716) 0x50b800 ADD	X13, X13, #1

(3716) 0x50b804 LDR	D23, [X19, X2,LSL #3]

(3716) 0x50b808 FMADD	D0, D22, D23, D0

(3716) 0x50b80c LDR	X0, [X20, X13,LSL #3]

(3716) 0x50b810 LDR	D24, [X21, X13,LSL #3]

(3716) 0x50b814 ADD	X13, X13, #1

(3716) 0x50b818 LDR	D25, [X19, X0,LSL #3]

(3716) 0x50b81c FMADD	D0, D24, D25, D0

(3716) 0x50b820 LDR	X10, [X20, X13,LSL #3]

(3716) 0x50b824 LDR	D26, [X21, X13,LSL #3]

(3716) 0x50b828 ADD	X13, X13, #1

(3716) 0x50b82c LDR	D27, [X19, X10,LSL #3]

(3716) 0x50b830 FMADD	D0, D26, D27, D0

(3716) 0x50b834 LDR	X11, [X20, X13,LSL #3]

(3716) 0x50b838 LDR	D28, [X21, X13,LSL #3]

(3716) 0x50b83c ADD	X13, X13, #1

(3716) 0x50b840 LDR	D8, [X19, X11,LSL #3]

(3716) 0x50b844 FMADD	D0, D28, D8, D0

(3716) 0x50b848 LDR	X12, [X20, X13,LSL #3]

(3716) 0x50b84c LDR	D29, [X21, X13,LSL #3]

(3716) 0x50b850 ADD	X13, X13, #1

(3716) 0x50b854 LDR	D30, [X19, X12,LSL #3]

(3716) 0x50b858 FMADD	D0, D29, D30, D0

(3716) 0x50b85c LDR	X7, [X20, X13,LSL #3]

(3716) 0x50b860 LDR	D31, [X21, X13,LSL #3]

(3716) 0x50b864 ADD	X13, X13, #1

(3716) 0x50b868 LDR	D5, [X19, X7,LSL #3]

(3716) 0x50b86c FMADD	D0, D31, D5, D0

(3716) 0x50b870 LDR	X6, [X20, X13,LSL #3]

(3716) 0x50b874 LDR	D9, [X21, X13,LSL #3]

(3716) 0x50b878 ADD	X13, X13, #1

(3716) 0x50b87c LDR	D6, [X19, X6,LSL #3]

(3716) 0x50b880 FMADD	D0, D9, D6, D0

(3716) 0x50b884 CMP	X13, X17

(3716) 0x50b888 B.EQ	50b934

  (3717) 0x50b88c LDR	X14, [X20, X13,LSL #3]

  (3717) 0x50b890 ADD	X1, X13, #1

  (3717) 0x50b894 ADD	X18, X13, #2

  (3717) 0x50b898 ADD	X15, X13, #3

  (3717) 0x50b89c ADD	X30, X13, #4

  (3717) 0x50b8a0 LDR	D7, [X21, X13,LSL #3]

  (3717) 0x50b8a4 ADD	X5, X13, #5

  (3717) 0x50b8a8 ADD	X4, X13, #6

  (3717) 0x50b8ac ADD	X3, X13, #7

  (3717) 0x50b8b0 ADD	X13, X13, #8

  (3717) 0x50b8b4 LDR	X9, [X20, X1,LSL #3]

  (3717) 0x50b8b8 LDR	D3, [X19, X14,LSL #3]

  (3717) 0x50b8bc LDR	D16, [X21, X1,LSL #3]

  (3717) 0x50b8c0 LDR	D17, [X19, X9,LSL #3]

  (3717) 0x50b8c4 LDR	X8, [X20, X18,LSL #3]

  (3717) 0x50b8c8 FMADD	D18, D7, D3, D0

  (3717) 0x50b8cc LDR	D4, [X21, X18,LSL #3]

  (3717) 0x50b8d0 LDR	X27, [X20, X15,LSL #3]

  (3717) 0x50b8d4 FMADD	D19, D16, D17, D18

  (3717) 0x50b8d8 LDR	D20, [X19, X8,LSL #3]

  (3717) 0x50b8dc LDR	D2, [X21, X15,LSL #3]

  (3717) 0x50b8e0 LDR	D1, [X19, X27,LSL #3]

  (3717) 0x50b8e4 LDR	X2, [X20, X30,LSL #3]

  (3717) 0x50b8e8 FMADD	D21, D4, D20, D19

  (3717) 0x50b8ec LDR	D22, [X21, X30,LSL #3]

  (3717) 0x50b8f0 LDR	X0, [X20, X5,LSL #3]

  (3717) 0x50b8f4 FMADD	D23, D2, D1, D21

  (3717) 0x50b8f8 LDR	D24, [X19, X2,LSL #3]

  (3717) 0x50b8fc LDR	D25, [X21, X5,LSL #3]

  (3717) 0x50b900 LDR	D26, [X19, X0,LSL #3]

  (3717) 0x50b904 LDR	X10, [X20, X4,LSL #3]

  (3717) 0x50b908 FMADD	D27, D22, D24, D23

  (3717) 0x50b90c LDR	D28, [X21, X4,LSL #3]

  (3717) 0x50b910 LDR	X11, [X20, X3,LSL #3]

  (3717) 0x50b914 FMADD	D8, D25, D26, D27

  (3717) 0x50b918 LDR	D29, [X19, X10,LSL #3]

  (3717) 0x50b91c LDR	D30, [X21, X3,LSL #3]

  (3717) 0x50b920 LDR	D31, [X19, X11,LSL #3]

  (3717) 0x50b924 FMADD	D5, D28, D29, D8

  (3717) 0x50b928 FMADD	D0, D30, D31, D5

  (3717) 0x50b92c CMP	X13, X17

  (3717) 0x50b930 B.NE	50b88c

(3716) 0x50b934 STR	D0, [X25, X22,LSL #3]

(3716) 0x50b938 ADD	X22, X22, #1

(3716) 0x50b93c CMP	X23, X22

(3716) 0x50b940 B.NE	50b7a4

0x50b944 LDP	X19, X20, [SP, #16]

0x50b948 LDP	X21, X22, [SP, #32]

0x50b94c LDP	X23, X24, [SP, #48]

0x50b950 LDP	X25, X26, [SP, #64]

0x50b954 LDR	X27, [SP, #80]

0x50b958 LDP	D8, D9, [SP, #96]

0x50b95c LDP	X29, X30, [SP], #112

0x50b960 RET

(3695) 0x50b964 FCMP	D9, D1

(3695) 0x50b968 B.EQ	50c04c

(3695) 0x50b96c FCMP	D9, D0

(3695) 0x50b970 B.NE	50c3b4

(3695) 0x50b974 CMP	X22, X23

(3695) 0x50b978 B.GE	50b150

(3695) 0x50b97c ADD	X16, X24, #8

  (3705) 0x50b980 LDR	D9, [X26, X22,LSL #3]

  (3705) 0x50b984 LDR	X0, [X24, X22,LSL #3]

  (3705) 0x50b988 LDR	X17, [X16, X22,LSL #3]

  (3705) 0x50b98c FNMUL	D0, D9, D8

  (3705) 0x50b990 CMP	X0, X17

  (3705) 0x50b994 B.GE	50bb10

  (3705) 0x50b998 SUB	X4, X17, X0

  (3705) 0x50b99c ANDS	X5, X4, #4224

  (3705) 0x50b9a0 B.EQ	50ba68

  (3705) 0x50b9a4 CMP	X5, #1

  (3705) 0x50b9a8 B.EQ	50ba4c

  (3705) 0x50b9ac CMP	X5, #2

  (3705) 0x50b9b0 B.EQ	50ba38

  (3705) 0x50b9b4 CMP	X5, #3

  (3705) 0x50b9b8 B.EQ	50ba24

  (3705) 0x50b9bc CMP	X5, #4

  (3705) 0x50b9c0 B.EQ	50ba10

  (3705) 0x50b9c4 CMP	X5, #5

  (3705) 0x50b9c8 B.EQ	50b9fc

  (3705) 0x50b9cc CMP	X5, #6

  (3705) 0x50b9d0 B.EQ	50b9e8

  (3705) 0x50b9d4 LDR	X6, [X20, X0,LSL #3]

  (3705) 0x50b9d8 LDR	D26, [X21, X0,LSL #3]

  (3705) 0x50b9dc ADD	X0, X0, #1

  (3705) 0x50b9e0 LDR	D27, [X19, X6,LSL #3]

  (3705) 0x50b9e4 FMSUB	D0, D26, D27, D0

  (3705) 0x50b9e8 LDR	X10, [X20, X0,LSL #3]

  (3705) 0x50b9ec LDR	D28, [X21, X0,LSL #3]

  (3705) 0x50b9f0 ADD	X0, X0, #1

  (3705) 0x50b9f4 LDR	D29, [X19, X10,LSL #3]

  (3705) 0x50b9f8 FMSUB	D0, D28, D29, D0

  (3705) 0x50b9fc LDR	X11, [X20, X0,LSL #3]

  (3705) 0x50ba00 LDR	D30, [X21, X0,LSL #3]

  (3705) 0x50ba04 ADD	X0, X0, #1

  (3705) 0x50ba08 LDR	D31, [X19, X11,LSL #3]

  (3705) 0x50ba0c FMSUB	D0, D30, D31, D0

  (3705) 0x50ba10 LDR	X7, [X20, X0,LSL #3]

  (3705) 0x50ba14 LDR	D3, [X21, X0,LSL #3]

  (3705) 0x50ba18 ADD	X0, X0, #1

  (3705) 0x50ba1c LDR	D2, [X19, X7,LSL #3]

  (3705) 0x50ba20 FMSUB	D0, D3, D2, D0

  (3705) 0x50ba24 LDR	X8, [X20, X0,LSL #3]

  (3705) 0x50ba28 LDR	D5, [X21, X0,LSL #3]

  (3705) 0x50ba2c ADD	X0, X0, #1

  (3705) 0x50ba30 LDR	D1, [X19, X8,LSL #3]

  (3705) 0x50ba34 FMSUB	D0, D5, D1, D0

  (3705) 0x50ba38 LDR	X12, [X20, X0,LSL #3]

  (3705) 0x50ba3c LDR	D4, [X21, X0,LSL #3]

  (3705) 0x50ba40 ADD	X0, X0, #1

  (3705) 0x50ba44 LDR	D6, [X19, X12,LSL #3]

  (3705) 0x50ba48 FMSUB	D0, D4, D6, D0

  (3705) 0x50ba4c LDR	X13, [X20, X0,LSL #3]

  (3705) 0x50ba50 LDR	D7, [X21, X0,LSL #3]

  (3705) 0x50ba54 ADD	X0, X0, #1

  (3705) 0x50ba58 LDR	D16, [X19, X13,LSL #3]

  (3705) 0x50ba5c FMSUB	D0, D7, D16, D0

  (3705) 0x50ba60 CMP	X0, X17

  (3705) 0x50ba64 B.EQ	50bb10

    (3706) 0x50ba68 LDR	X14, [X20, X0,LSL #3]

    (3706) 0x50ba6c ADD	X15, X0, #1

    (3706) 0x50ba70 ADD	X30, X0, #2

    (3706) 0x50ba74 ADD	X18, X0, #3

    (3706) 0x50ba78 ADD	X27, X0, #4

    (3706) 0x50ba7c LDR	D17, [X21, X0,LSL #3]

    (3706) 0x50ba80 ADD	X2, X0, #5

    (3706) 0x50ba84 ADD	X4, X0, #6

    (3706) 0x50ba88 ADD	X3, X0, #7

    (3706) 0x50ba8c ADD	X0, X0, #8

    (3706) 0x50ba90 LDR	X9, [X20, X15,LSL #3]

    (3706) 0x50ba94 LDR	D18, [X19, X14,LSL #3]

    (3706) 0x50ba98 LDR	D19, [X21, X15,LSL #3]

    (3706) 0x50ba9c LDR	D20, [X19, X9,LSL #3]

    (3706) 0x50baa0 LDR	X5, [X20, X30,LSL #3]

    (3706) 0x50baa4 FMSUB	D21, D17, D18, D0

    (3706) 0x50baa8 LDR	D22, [X21, X30,LSL #3]

    (3706) 0x50baac LDR	X1, [X20, X18,LSL #3]

    (3706) 0x50bab0 FMSUB	D23, D19, D20, D21

    (3706) 0x50bab4 LDR	D24, [X19, X5,LSL #3]

    (3706) 0x50bab8 LDR	D25, [X21, X18,LSL #3]

    (3706) 0x50babc LDR	D9, [X19, X1,LSL #3]

    (3706) 0x50bac0 LDR	X6, [X20, X27,LSL #3]

    (3706) 0x50bac4 FMSUB	D26, D22, D24, D23

    (3706) 0x50bac8 LDR	D27, [X21, X27,LSL #3]

    (3706) 0x50bacc LDR	X10, [X20, X2,LSL #3]

    (3706) 0x50bad0 FMSUB	D28, D25, D9, D26

    (3706) 0x50bad4 LDR	D29, [X19, X6,LSL #3]

    (3706) 0x50bad8 LDR	D30, [X21, X2,LSL #3]

    (3706) 0x50badc LDR	D31, [X19, X10,LSL #3]

    (3706) 0x50bae0 LDR	X11, [X20, X4,LSL #3]

    (3706) 0x50bae4 FMSUB	D3, D27, D29, D28

    (3706) 0x50bae8 LDR	D5, [X21, X4,LSL #3]

    (3706) 0x50baec LDR	X7, [X20, X3,LSL #3]

    (3706) 0x50baf0 FMSUB	D4, D30, D31, D3

    (3706) 0x50baf4 LDR	D6, [X19, X11,LSL #3]

    (3706) 0x50baf8 LDR	D2, [X21, X3,LSL #3]

    (3706) 0x50bafc LDR	D1, [X19, X7,LSL #3]

    (3706) 0x50bb00 FMSUB	D7, D5, D6, D4

    (3706) 0x50bb04 FMSUB	D0, D2, D1, D7

    (3706) 0x50bb08 CMP	X0, X17

    (3706) 0x50bb0c B.NE	50ba68

  (3705) 0x50bb10 STR	D0, [X25, X22,LSL #3]

  (3705) 0x50bb14 ADD	X22, X22, #1

  (3705) 0x50bb18 CMP	X23, X22

  (3705) 0x50bb1c B.NE	50b980

(3695) 0x50bb20 B	50b150

(3695) 0x50bb24 CMP	X22, X23

(3695) 0x50bb28 B.GE	50b150

(3695) 0x50bb2c ADD	X26, X24, #8

  (3696) 0x50bb30 LDR	X1, [X24, X22,LSL #3]

  (3696) 0x50bb34 MOVI	D25, #0

  (3696) 0x50bb38 LDR	X16, [X26, X22,LSL #3]

  (3696) 0x50bb3c CMP	X1, X16

  (3696) 0x50bb40 B.GE	50bcbc

  (3696) 0x50bb44 SUB	X17, X16, X1

  (3696) 0x50bb48 ANDS	X12, X17, #4224

  (3696) 0x50bb4c B.EQ	50bc14

  (3696) 0x50bb50 CMP	X12, #1

  (3696) 0x50bb54 B.EQ	50bbf8

  (3696) 0x50bb58 CMP	X12, #2

  (3696) 0x50bb5c B.EQ	50bbe4

  (3696) 0x50bb60 CMP	X12, #3

  (3696) 0x50bb64 B.EQ	50bbd0

  (3696) 0x50bb68 CMP	X12, #4

  (3696) 0x50bb6c B.EQ	50bbbc

  (3696) 0x50bb70 CMP	X12, #5

  (3696) 0x50bb74 B.EQ	50bba8

  (3696) 0x50bb78 CMP	X12, #6

  (3696) 0x50bb7c B.EQ	50bb94

  (3696) 0x50bb80 LDR	X7, [X20, X1,LSL #3]

  (3696) 0x50bb84 LDR	D7, [X21, X1,LSL #3]

  (3696) 0x50bb88 ADD	X1, X1, #1

  (3696) 0x50bb8c LDR	D3, [X19, X7,LSL #3]

  (3696) 0x50bb90 FMADD	D25, D7, D3, D25

  (3696) 0x50bb94 LDR	X6, [X20, X1,LSL #3]

  (3696) 0x50bb98 LDR	D16, [X21, X1,LSL #3]

  (3696) 0x50bb9c ADD	X1, X1, #1

  (3696) 0x50bba0 LDR	D17, [X19, X6,LSL #3]

  (3696) 0x50bba4 FMADD	D25, D16, D17, D25

  (3696) 0x50bba8 LDR	X13, [X20, X1,LSL #3]

  (3696) 0x50bbac LDR	D18, [X21, X1,LSL #3]

  (3696) 0x50bbb0 ADD	X1, X1, #1

  (3696) 0x50bbb4 LDR	D4, [X19, X13,LSL #3]

  (3696) 0x50bbb8 FMADD	D25, D18, D4, D25

  (3696) 0x50bbbc LDR	X14, [X20, X1,LSL #3]

  (3696) 0x50bbc0 LDR	D19, [X21, X1,LSL #3]

  (3696) 0x50bbc4 ADD	X1, X1, #1

  (3696) 0x50bbc8 LDR	D20, [X19, X14,LSL #3]

  (3696) 0x50bbcc FMADD	D25, D19, D20, D25

  (3696) 0x50bbd0 LDR	X15, [X20, X1,LSL #3]

  (3696) 0x50bbd4 LDR	D2, [X21, X1,LSL #3]

  (3696) 0x50bbd8 ADD	X1, X1, #1

  (3696) 0x50bbdc LDR	D1, [X19, X15,LSL #3]

  (3696) 0x50bbe0 FMADD	D25, D2, D1, D25

  (3696) 0x50bbe4 LDR	X18, [X20, X1,LSL #3]

  (3696) 0x50bbe8 LDR	D21, [X21, X1,LSL #3]

  (3696) 0x50bbec ADD	X1, X1, #1

  (3696) 0x50bbf0 LDR	D22, [X19, X18,LSL #3]

  (3696) 0x50bbf4 FMADD	D25, D21, D22, D25

  (3696) 0x50bbf8 LDR	X30, [X20, X1,LSL #3]

  (3696) 0x50bbfc LDR	D23, [X21, X1,LSL #3]

  (3696) 0x50bc00 ADD	X1, X1, #1

  (3696) 0x50bc04 LDR	D24, [X19, X30,LSL #3]

  (3696) 0x50bc08 FMADD	D25, D23, D24, D25

  (3696) 0x50bc0c CMP	X1, X16

  (3696) 0x50bc10 B.EQ	50bcbc

    (3699) 0x50bc14 LDR	X27, [X20, X1,LSL #3]

    (3699) 0x50bc18 ADD	X2, X1, #1

    (3699) 0x50bc1c ADD	X8, X1, #2

    (3699) 0x50bc20 ADD	X10, X1, #3

    (3699) 0x50bc24 ADD	X11, X1, #4

    (3699) 0x50bc28 LDR	D26, [X21, X1,LSL #3]

    (3699) 0x50bc2c ADD	X5, X1, #5

    (3699) 0x50bc30 ADD	X4, X1, #6

    (3699) 0x50bc34 ADD	X3, X1, #7

    (3699) 0x50bc38 ADD	X1, X1, #8

    (3699) 0x50bc3c LDR	X9, [X20, X2,LSL #3]

    (3699) 0x50bc40 LDR	D27, [X19, X27,LSL #3]

    (3699) 0x50bc44 LDR	D28, [X21, X2,LSL #3]

    (3699) 0x50bc48 LDR	D8, [X19, X9,LSL #3]

    (3699) 0x50bc4c LDR	X17, [X20, X8,LSL #3]

    (3699) 0x50bc50 FMADD	D29, D26, D27, D25

    (3699) 0x50bc54 LDR	D30, [X21, X8,LSL #3]

    (3699) 0x50bc58 LDR	X0, [X20, X10,LSL #3]

    (3699) 0x50bc5c FMADD	D31, D28, D8, D29

    (3699) 0x50bc60 LDR	D5, [X19, X17,LSL #3]

    (3699) 0x50bc64 LDR	D6, [X21, X10,LSL #3]

    (3699) 0x50bc68 LDR	D7, [X19, X0,LSL #3]

    (3699) 0x50bc6c LDR	X12, [X20, X11,LSL #3]

    (3699) 0x50bc70 FMADD	D0, D30, D5, D31

    (3699) 0x50bc74 LDR	D16, [X21, X11,LSL #3]

    (3699) 0x50bc78 LDR	X7, [X20, X5,LSL #3]

    (3699) 0x50bc7c FMADD	D17, D6, D7, D0

    (3699) 0x50bc80 LDR	D3, [X19, X12,LSL #3]

    (3699) 0x50bc84 LDR	D18, [X21, X5,LSL #3]

    (3699) 0x50bc88 LDR	D19, [X19, X7,LSL #3]

    (3699) 0x50bc8c LDR	X6, [X20, X4,LSL #3]

    (3699) 0x50bc90 FMADD	D20, D16, D3, D17

    (3699) 0x50bc94 LDR	D4, [X21, X4,LSL #3]

    (3699) 0x50bc98 LDR	X13, [X20, X3,LSL #3]

    (3699) 0x50bc9c FMADD	D21, D18, D19, D20

    (3699) 0x50bca0 LDR	D22, [X19, X6,LSL #3]

    (3699) 0x50bca4 LDR	D2, [X21, X3,LSL #3]

    (3699) 0x50bca8 LDR	D1, [X19, X13,LSL #3]

    (3699) 0x50bcac FMADD	D23, D4, D22, D21

    (3699) 0x50bcb0 FMADD	D25, D2, D1, D23

    (3699) 0x50bcb4 CMP	X1, X16

    (3699) 0x50bcb8 B.NE	50bc14

  (3696) 0x50bcbc FMUL	D24, D9, D25

  (3696) 0x50bcc0 STR	D24, [X25, X22,LSL #3]

  (3696) 0x50bcc4 ADD	X22, X22, #1

  (3696) 0x50bcc8 CMP	X23, X22

  (3696) 0x50bccc B.NE	50bb30

(3695) 0x50bcd0 LDP	X19, X20, [SP, #16]

(3695) 0x50bcd4 LDP	X21, X22, [SP, #32]

(3695) 0x50bcd8 LDP	X23, X24, [SP, #48]

(3695) 0x50bcdc LDP	X25, X26, [SP, #64]

(3695) 0x50bce0 LDR	X27, [SP, #80]

(3695) 0x50bce4 LDP	D8, D9, [SP, #96]

(3695) 0x50bce8 LDP	X29, X30, [SP], #112

(3695) 0x50bcec RET

(3695) 0x50bcf0 CMP	X22, X23

(3695) 0x50bcf4 B.GE	50b150

(3695) 0x50bcf8 ADD	X16, X24, #8

(3695) 0x50bcfc HINT	#0

  (3697) 0x50bd00 LDR	X0, [X24, X22,LSL #3]

  (3697) 0x50bd04 LDR	X17, [X16, X22,LSL #3]

  (3697) 0x50bd08 LDR	D0, [X26, X22,LSL #3]

  (3697) 0x50bd0c CMP	X0, X17

  (3697) 0x50bd10 B.GE	50be8c

  (3697) 0x50bd14 SUB	X13, X17, X0

  (3697) 0x50bd18 ANDS	X14, X13, #4224

  (3697) 0x50bd1c B.EQ	50bde4

  (3697) 0x50bd20 CMP	X14, #1

  (3697) 0x50bd24 B.EQ	50bdc8

  (3697) 0x50bd28 CMP	X14, #2

  (3697) 0x50bd2c B.EQ	50bdb4

  (3697) 0x50bd30 CMP	X14, #3

  (3697) 0x50bd34 B.EQ	50bda0

  (3697) 0x50bd38 CMP	X14, #4

  (3697) 0x50bd3c B.EQ	50bd8c

  (3697) 0x50bd40 CMP	X14, #5

  (3697) 0x50bd44 B.EQ	50bd78

  (3697) 0x50bd48 CMP	X14, #6

  (3697) 0x50bd4c B.EQ	50bd64

  (3697) 0x50bd50 LDR	X5, [X20, X0,LSL #3]

  (3697) 0x50bd54 LDR	D9, [X21, X0,LSL #3]

  (3697) 0x50bd58 ADD	X0, X0, #1

  (3697) 0x50bd5c LDR	D6, [X19, X5,LSL #3]

  (3697) 0x50bd60 FMSUB	D0, D9, D6, D0

  (3697) 0x50bd64 LDR	X15, [X20, X0,LSL #3]

  (3697) 0x50bd68 LDR	D3, [X21, X0,LSL #3]

  (3697) 0x50bd6c ADD	X0, X0, #1

  (3697) 0x50bd70 LDR	D7, [X19, X15,LSL #3]

  (3697) 0x50bd74 FMSUB	D0, D3, D7, D0

  (3697) 0x50bd78 LDR	X18, [X20, X0,LSL #3]

  (3697) 0x50bd7c LDR	D16, [X21, X0,LSL #3]

  (3697) 0x50bd80 ADD	X0, X0, #1

  (3697) 0x50bd84 LDR	D17, [X19, X18,LSL #3]

  (3697) 0x50bd88 FMSUB	D0, D16, D17, D0

  (3697) 0x50bd8c LDR	X30, [X20, X0,LSL #3]

  (3697) 0x50bd90 LDR	D4, [X21, X0,LSL #3]

  (3697) 0x50bd94 ADD	X0, X0, #1

  (3697) 0x50bd98 LDR	D18, [X19, X30,LSL #3]

  (3697) 0x50bd9c FMSUB	D0, D4, D18, D0

  (3697) 0x50bda0 LDR	X8, [X20, X0,LSL #3]

  (3697) 0x50bda4 LDR	D19, [X21, X0,LSL #3]

  (3697) 0x50bda8 ADD	X0, X0, #1

  (3697) 0x50bdac LDR	D2, [X19, X8,LSL #3]

  (3697) 0x50bdb0 FMSUB	D0, D19, D2, D0

  (3697) 0x50bdb4 LDR	X27, [X20, X0,LSL #3]

  (3697) 0x50bdb8 LDR	D20, [X21, X0,LSL #3]

  (3697) 0x50bdbc ADD	X0, X0, #1

  (3697) 0x50bdc0 LDR	D1, [X19, X27,LSL #3]

  (3697) 0x50bdc4 FMSUB	D0, D20, D1, D0

  (3697) 0x50bdc8 LDR	X2, [X20, X0,LSL #3]

  (3697) 0x50bdcc LDR	D21, [X21, X0,LSL #3]

  (3697) 0x50bdd0 ADD	X0, X0, #1

  (3697) 0x50bdd4 LDR	D22, [X19, X2,LSL #3]

  (3697) 0x50bdd8 FMSUB	D0, D21, D22, D0

  (3697) 0x50bddc CMP	X0, X17

  (3697) 0x50bde0 B.EQ	50be8c

    (3698) 0x50bde4 LDR	X10, [X20, X0,LSL #3]

    (3698) 0x50bde8 ADD	X11, X0, #1

    (3698) 0x50bdec ADD	X7, X0, #2

    (3698) 0x50bdf0 ADD	X12, X0, #3

    (3698) 0x50bdf4 ADD	X6, X0, #4

    (3698) 0x50bdf8 LDR	D23, [X21, X0,LSL #3]

    (3698) 0x50bdfc ADD	X13, X0, #5

    (3698) 0x50be00 ADD	X4, X0, #6

    (3698) 0x50be04 ADD	X3, X0, #7

    (3698) 0x50be08 ADD	X0, X0, #8

    (3698) 0x50be0c LDR	X9, [X20, X11,LSL #3]

    (3698) 0x50be10 LDR	D24, [X19, X10,LSL #3]

    (3698) 0x50be14 LDR	D25, [X21, X11,LSL #3]

    (3698) 0x50be18 LDR	D26, [X19, X9,LSL #3]

    (3698) 0x50be1c LDR	X14, [X20, X7,LSL #3]

    (3698) 0x50be20 FMSUB	D27, D23, D24, D0

    (3698) 0x50be24 LDR	D28, [X21, X7,LSL #3]

    (3698) 0x50be28 LDR	X1, [X20, X12,LSL #3]

    (3698) 0x50be2c FMSUB	D8, D25, D26, D27

    (3698) 0x50be30 LDR	D29, [X19, X14,LSL #3]

    (3698) 0x50be34 LDR	D30, [X21, X12,LSL #3]

    (3698) 0x50be38 LDR	D31, [X19, X1,LSL #3]

    (3698) 0x50be3c LDR	X5, [X20, X6,LSL #3]

    (3698) 0x50be40 FMSUB	D5, D28, D29, D8

    (3698) 0x50be44 LDR	D9, [X21, X6,LSL #3]

    (3698) 0x50be48 LDR	X15, [X20, X13,LSL #3]

    (3698) 0x50be4c FMSUB	D6, D30, D31, D5

    (3698) 0x50be50 LDR	D3, [X19, X5,LSL #3]

    (3698) 0x50be54 LDR	D7, [X21, X13,LSL #3]

    (3698) 0x50be58 LDR	D16, [X19, X15,LSL #3]

    (3698) 0x50be5c LDR	X18, [X20, X4,LSL #3]

    (3698) 0x50be60 FMSUB	D17, D9, D3, D6

    (3698) 0x50be64 LDR	D4, [X21, X4,LSL #3]

    (3698) 0x50be68 LDR	X30, [X20, X3,LSL #3]

    (3698) 0x50be6c FMSUB	D18, D7, D16, D17

    (3698) 0x50be70 LDR	D19, [X19, X18,LSL #3]

    (3698) 0x50be74 LDR	D2, [X21, X3,LSL #3]

    (3698) 0x50be78 LDR	D20, [X19, X30,LSL #3]

    (3698) 0x50be7c FMSUB	D1, D4, D19, D18

    (3698) 0x50be80 FMSUB	D0, D2, D20, D1

    (3698) 0x50be84 CMP	X0, X17

    (3698) 0x50be88 B.NE	50bde4

  (3697) 0x50be8c STR	D0, [X25, X22,LSL #3]

  (3697) 0x50be90 ADD	X22, X22, #1

  (3697) 0x50be94 CMP	X23, X22

  (3697) 0x50be98 B.NE	50bd00

(3695) 0x50be9c B	50b150

(3695) 0x50bea0 CMP	X22, X23

(3695) 0x50bea4 B.GE	50b150

(3695) 0x50bea8 ADD	X16, X24, #8

  (3707) 0x50beac LDR	X0, [X24, X22,LSL #3]

  (3707) 0x50beb0 LDR	X17, [X16, X22,LSL #3]

  (3707) 0x50beb4 LDR	D0, [X26, X22,LSL #3]

  (3707) 0x50beb8 CMP	X0, X17

  (3707) 0x50bebc B.GE	50c038

  (3707) 0x50bec0 SUB	X8, X17, X0

  (3707) 0x50bec4 ANDS	X15, X8, #4224

  (3707) 0x50bec8 B.EQ	50bf90

  (3707) 0x50becc CMP	X15, #1

  (3707) 0x50bed0 B.EQ	50bf74

  (3707) 0x50bed4 CMP	X15, #2

  (3707) 0x50bed8 B.EQ	50bf60

  (3707) 0x50bedc CMP	X15, #3

  (3707) 0x50bee0 B.EQ	50bf4c

  (3707) 0x50bee4 CMP	X15, #4

  (3707) 0x50bee8 B.EQ	50bf38

  (3707) 0x50beec CMP	X15, #5

  (3707) 0x50bef0 B.EQ	50bf24

  (3707) 0x50bef4 CMP	X15, #6

  (3707) 0x50bef8 B.EQ	50bf10

  (3707) 0x50befc LDR	X18, [X20, X0,LSL #3]

  (3707) 0x50bf00 LDR	D30, [X21, X0,LSL #3]

  (3707) 0x50bf04 ADD	X0, X0, #1

  (3707) 0x50bf08 LDR	D31, [X19, X18,LSL #3]

  (3707) 0x50bf0c FMADD	D0, D30, D31, D0

  (3707) 0x50bf10 LDR	X30, [X20, X0,LSL #3]

  (3707) 0x50bf14 LDR	D5, [X21, X0,LSL #3]

  (3707) 0x50bf18 ADD	X0, X0, #1

  (3707) 0x50bf1c LDR	D3, [X19, X30,LSL #3]

  (3707) 0x50bf20 FMADD	D0, D5, D3, D0

  (3707) 0x50bf24 LDR	X27, [X20, X0,LSL #3]

  (3707) 0x50bf28 LDR	D6, [X21, X0,LSL #3]

  (3707) 0x50bf2c ADD	X0, X0, #1

  (3707) 0x50bf30 LDR	D7, [X19, X27,LSL #3]

  (3707) 0x50bf34 FMADD	D0, D6, D7, D0

  (3707) 0x50bf38 LDR	X2, [X20, X0,LSL #3]

  (3707) 0x50bf3c LDR	D16, [X21, X0,LSL #3]

  (3707) 0x50bf40 ADD	X0, X0, #1

  (3707) 0x50bf44 LDR	D4, [X19, X2,LSL #3]

  (3707) 0x50bf48 FMADD	D0, D16, D4, D0

  (3707) 0x50bf4c LDR	X10, [X20, X0,LSL #3]

  (3707) 0x50bf50 LDR	D17, [X21, X0,LSL #3]

  (3707) 0x50bf54 ADD	X0, X0, #1

  (3707) 0x50bf58 LDR	D18, [X19, X10,LSL #3]

  (3707) 0x50bf5c FMADD	D0, D17, D18, D0

  (3707) 0x50bf60 LDR	X11, [X20, X0,LSL #3]

  (3707) 0x50bf64 LDR	D2, [X21, X0,LSL #3]

  (3707) 0x50bf68 ADD	X0, X0, #1

  (3707) 0x50bf6c LDR	D1, [X19, X11,LSL #3]

  (3707) 0x50bf70 FMADD	D0, D2, D1, D0

  (3707) 0x50bf74 LDR	X6, [X20, X0,LSL #3]

  (3707) 0x50bf78 LDR	D9, [X21, X0,LSL #3]

  (3707) 0x50bf7c ADD	X0, X0, #1

  (3707) 0x50bf80 LDR	D19, [X19, X6,LSL #3]

  (3707) 0x50bf84 FMADD	D0, D9, D19, D0

  (3707) 0x50bf88 CMP	X0, X17

  (3707) 0x50bf8c B.EQ	50c038

    (3708) 0x50bf90 LDR	X12, [X20, X0,LSL #3]

    (3708) 0x50bf94 ADD	X1, X0, #1

    (3708) 0x50bf98 ADD	X13, X0, #2

    (3708) 0x50bf9c ADD	X7, X0, #3

    (3708) 0x50bfa0 ADD	X14, X0, #4

    (3708) 0x50bfa4 LDR	D20, [X21, X0,LSL #3]

    (3708) 0x50bfa8 ADD	X5, X0, #5

    (3708) 0x50bfac ADD	X4, X0, #6

    (3708) 0x50bfb0 ADD	X3, X0, #7

    (3708) 0x50bfb4 ADD	X0, X0, #8

    (3708) 0x50bfb8 LDR	X9, [X20, X1,LSL #3]

    (3708) 0x50bfbc LDR	D21, [X19, X12,LSL #3]

    (3708) 0x50bfc0 LDR	D22, [X21, X1,LSL #3]

    (3708) 0x50bfc4 LDR	D23, [X19, X9,LSL #3]

    (3708) 0x50bfc8 LDR	X8, [X20, X13,LSL #3]

    (3708) 0x50bfcc FMADD	D24, D20, D21, D0

    (3708) 0x50bfd0 LDR	D25, [X21, X13,LSL #3]

    (3708) 0x50bfd4 LDR	X15, [X20, X7,LSL #3]

    (3708) 0x50bfd8 FMADD	D26, D22, D23, D24

    (3708) 0x50bfdc LDR	D27, [X19, X8,LSL #3]

    (3708) 0x50bfe0 LDR	D28, [X21, X7,LSL #3]

    (3708) 0x50bfe4 LDR	D8, [X19, X15,LSL #3]

    (3708) 0x50bfe8 LDR	X18, [X20, X14,LSL #3]

    (3708) 0x50bfec FMADD	D29, D25, D27, D26

    (3708) 0x50bff0 LDR	D30, [X21, X14,LSL #3]

    (3708) 0x50bff4 LDR	X30, [X20, X5,LSL #3]

    (3708) 0x50bff8 FMADD	D31, D28, D8, D29

    (3708) 0x50bffc LDR	D5, [X19, X18,LSL #3]

    (3708) 0x50c000 LDR	D3, [X21, X5,LSL #3]

    (3708) 0x50c004 LDR	D6, [X19, X30,LSL #3]

    (3708) 0x50c008 LDR	X27, [X20, X4,LSL #3]

    (3708) 0x50c00c FMADD	D7, D30, D5, D31

    (3708) 0x50c010 LDR	D16, [X21, X4,LSL #3]

    (3708) 0x50c014 LDR	X2, [X20, X3,LSL #3]

    (3708) 0x50c018 FMADD	D4, D3, D6, D7

    (3708) 0x50c01c LDR	D17, [X19, X27,LSL #3]

    (3708) 0x50c020 LDR	D18, [X21, X3,LSL #3]

    (3708) 0x50c024 LDR	D2, [X19, X2,LSL #3]

    (3708) 0x50c028 FMADD	D1, D16, D17, D4

    (3708) 0x50c02c FMADD	D0, D18, D2, D1

    (3708) 0x50c030 CMP	X0, X17

    (3708) 0x50c034 B.NE	50bf90

  (3707) 0x50c038 STR	D0, [X25, X22,LSL #3]

  (3707) 0x50c03c ADD	X22, X22, #1

  (3707) 0x50c040 CMP	X23, X22

  (3707) 0x50c044 B.NE	50beac

(3695) 0x50c048 B	50b150

(3695) 0x50c04c CMP	X22, X23

(3695) 0x50c050 B.GE	50b150

(3695) 0x50c054 ADD	X16, X24, #8

(3695) 0x50c058 HINT	#0

(3695) 0x50c05c HINT	#0

  (3701) 0x50c060 LDR	D16, [X26, X22,LSL #3]

  (3701) 0x50c064 LDR	X0, [X24, X22,LSL #3]

  (3701) 0x50c068 LDR	X17, [X16, X22,LSL #3]

  (3701) 0x50c06c FMUL	D0, D8, D16

  (3701) 0x50c070 CMP	X0, X17

  (3701) 0x50c074 B.GE	50c1f0

  (3701) 0x50c078 SUB	X8, X17, X0

  (3701) 0x50c07c ANDS	X12, X8, #4224

  (3701) 0x50c080 B.EQ	50c148

  (3701) 0x50c084 CMP	X12, #1

  (3701) 0x50c088 B.EQ	50c12c

  (3701) 0x50c08c CMP	X12, #2

  (3701) 0x50c090 B.EQ	50c118

  (3701) 0x50c094 CMP	X12, #3

  (3701) 0x50c098 B.EQ	50c104

  (3701) 0x50c09c CMP	X12, #4

  (3701) 0x50c0a0 B.EQ	50c0f0

  (3701) 0x50c0a4 CMP	X12, #5

  (3701) 0x50c0a8 B.EQ	50c0dc

  (3701) 0x50c0ac CMP	X12, #6

  (3701) 0x50c0b0 B.EQ	50c0c8

  (3701) 0x50c0b4 LDR	X13, [X20, X0,LSL #3]

  (3701) 0x50c0b8 LDR	D17, [X21, X0,LSL #3]

  (3701) 0x50c0bc ADD	X0, X0, #1

  (3701) 0x50c0c0 LDR	D18, [X19, X13,LSL #3]

  (3701) 0x50c0c4 FMADD	D0, D17, D18, D0

  (3701) 0x50c0c8 LDR	X14, [X20, X0,LSL #3]

  (3701) 0x50c0cc LDR	D19, [X21, X0,LSL #3]

  (3701) 0x50c0d0 ADD	X0, X0, #1

  (3701) 0x50c0d4 LDR	D20, [X19, X14,LSL #3]

  (3701) 0x50c0d8 FMADD	D0, D19, D20, D0

  (3701) 0x50c0dc LDR	X15, [X20, X0,LSL #3]

  (3701) 0x50c0e0 LDR	D21, [X21, X0,LSL #3]

  (3701) 0x50c0e4 ADD	X0, X0, #1

  (3701) 0x50c0e8 LDR	D22, [X19, X15,LSL #3]

  (3701) 0x50c0ec FMADD	D0, D21, D22, D0

  (3701) 0x50c0f0 LDR	X18, [X20, X0,LSL #3]

  (3701) 0x50c0f4 LDR	D23, [X21, X0,LSL #3]

  (3701) 0x50c0f8 ADD	X0, X0, #1

  (3701) 0x50c0fc LDR	D24, [X19, X18,LSL #3]

  (3701) 0x50c100 FMADD	D0, D23, D24, D0

  (3701) 0x50c104 LDR	X30, [X20, X0,LSL #3]

  (3701) 0x50c108 LDR	D25, [X21, X0,LSL #3]

  (3701) 0x50c10c ADD	X0, X0, #1

  (3701) 0x50c110 LDR	D9, [X19, X30,LSL #3]

  (3701) 0x50c114 FMADD	D0, D25, D9, D0

  (3701) 0x50c118 LDR	X27, [X20, X0,LSL #3]

  (3701) 0x50c11c LDR	D26, [X21, X0,LSL #3]

  (3701) 0x50c120 ADD	X0, X0, #1

  (3701) 0x50c124 LDR	D27, [X19, X27,LSL #3]

  (3701) 0x50c128 FMADD	D0, D26, D27, D0

  (3701) 0x50c12c LDR	X2, [X20, X0,LSL #3]

  (3701) 0x50c130 LDR	D28, [X21, X0,LSL #3]

  (3701) 0x50c134 ADD	X0, X0, #1

  (3701) 0x50c138 LDR	D29, [X19, X2,LSL #3]

  (3701) 0x50c13c FMADD	D0, D28, D29, D0

  (3701) 0x50c140 CMP	X0, X17

  (3701) 0x50c144 B.EQ	50c1f0

    (3702) 0x50c148 LDR	X10, [X20, X0,LSL #3]

    (3702) 0x50c14c ADD	X1, X0, #1

    (3702) 0x50c150 ADD	X7, X0, #2

    (3702) 0x50c154 ADD	X11, X0, #3

    (3702) 0x50c158 ADD	X6, X0, #4

    (3702) 0x50c15c LDR	D30, [X21, X0,LSL #3]

    (3702) 0x50c160 ADD	X5, X0, #5

    (3702) 0x50c164 ADD	X4, X0, #6

    (3702) 0x50c168 ADD	X3, X0, #7

    (3702) 0x50c16c ADD	X0, X0, #8

    (3702) 0x50c170 LDR	X9, [X20, X1,LSL #3]

    (3702) 0x50c174 LDR	D31, [X19, X10,LSL #3]

    (3702) 0x50c178 LDR	D3, [X21, X1,LSL #3]

    (3702) 0x50c17c LDR	D5, [X19, X9,LSL #3]

    (3702) 0x50c180 LDR	X8, [X20, X7,LSL #3]

    (3702) 0x50c184 FMADD	D6, D30, D31, D0

    (3702) 0x50c188 LDR	D4, [X21, X7,LSL #3]

    (3702) 0x50c18c LDR	X12, [X20, X11,LSL #3]

    (3702) 0x50c190 FMADD	D7, D3, D5, D6

    (3702) 0x50c194 LDR	D16, [X19, X8,LSL #3]

    (3702) 0x50c198 LDR	D2, [X21, X11,LSL #3]

    (3702) 0x50c19c LDR	D1, [X19, X12,LSL #3]

    (3702) 0x50c1a0 LDR	X13, [X20, X6,LSL #3]

    (3702) 0x50c1a4 FMADD	D17, D4, D16, D7

    (3702) 0x50c1a8 LDR	D18, [X21, X6,LSL #3]

    (3702) 0x50c1ac LDR	X14, [X20, X5,LSL #3]

    (3702) 0x50c1b0 FMADD	D19, D2, D1, D17

    (3702) 0x50c1b4 LDR	D20, [X19, X13,LSL #3]

    (3702) 0x50c1b8 LDR	D21, [X21, X5,LSL #3]

    (3702) 0x50c1bc LDR	D22, [X19, X14,LSL #3]

    (3702) 0x50c1c0 LDR	X15, [X20, X4,LSL #3]

    (3702) 0x50c1c4 FMADD	D23, D18, D20, D19

    (3702) 0x50c1c8 LDR	D24, [X21, X4,LSL #3]

    (3702) 0x50c1cc LDR	X18, [X20, X3,LSL #3]

    (3702) 0x50c1d0 FMADD	D25, D21, D22, D23

    (3702) 0x50c1d4 LDR	D9, [X19, X15,LSL #3]

    (3702) 0x50c1d8 LDR	D26, [X21, X3,LSL #3]

    (3702) 0x50c1dc LDR	D27, [X19, X18,LSL #3]

    (3702) 0x50c1e0 FMADD	D28, D24, D9, D25

    (3702) 0x50c1e4 FMADD	D0, D26, D27, D28

    (3702) 0x50c1e8 CMP	X0, X17

    (3702) 0x50c1ec B.NE	50c148

  (3701) 0x50c1f0 STR	D0, [X25, X22,LSL #3]

  (3701) 0x50c1f4 ADD	X22, X22, #1

  (3701) 0x50c1f8 CMP	X23, X22

  (3701) 0x50c1fc B.NE	50c060

(3695) 0x50c200 B	50b150

(3695) 0x50c204 CMP	X22, X23

(3695) 0x50c208 B.GE	50b150

(3695) 0x50c20c ADD	X16, X24, #8

  (3709) 0x50c210 LDR	X0, [X24, X22,LSL #3]

  (3709) 0x50c214 LDR	X17, [X16, X22,LSL #3]

  (3709) 0x50c218 LDR	D0, [X26, X22,LSL #3]

  (3709) 0x50c21c CMP	X0, X17

  (3709) 0x50c220 B.GE	50c39c

  (3709) 0x50c224 SUB	X30, X17, X0

  (3709) 0x50c228 ANDS	X27, X30, #4224

  (3709) 0x50c22c B.EQ	50c2f4

  (3709) 0x50c230 CMP	X27, #1

  (3709) 0x50c234 B.EQ	50c2d8

  (3709) 0x50c238 CMP	X27, #2

  (3709) 0x50c23c B.EQ	50c2c4

  (3709) 0x50c240 CMP	X27, #3

  (3709) 0x50c244 B.EQ	50c2b0

  (3709) 0x50c248 CMP	X27, #4

  (3709) 0x50c24c B.EQ	50c29c

  (3709) 0x50c250 CMP	X27, #5

  (3709) 0x50c254 B.EQ	50c288

  (3709) 0x50c258 CMP	X27, #6

  (3709) 0x50c25c B.EQ	50c274

  (3709) 0x50c260 LDR	X2, [X20, X0,LSL #3]

  (3709) 0x50c264 LDR	D8, [X21, X0,LSL #3]

  (3709) 0x50c268 ADD	X0, X0, #1

  (3709) 0x50c26c LDR	D29, [X19, X2,LSL #3]

  (3709) 0x50c270 FMADD	D0, D8, D29, D0

  (3709) 0x50c274 LDR	X10, [X20, X0,LSL #3]

  (3709) 0x50c278 LDR	D30, [X21, X0,LSL #3]

  (3709) 0x50c27c ADD	X0, X0, #1

  (3709) 0x50c280 LDR	D31, [X19, X10,LSL #3]

  (3709) 0x50c284 FMADD	D0, D30, D31, D0

  (3709) 0x50c288 LDR	X1, [X20, X0,LSL #3]

  (3709) 0x50c28c LDR	D3, [X21, X0,LSL #3]

  (3709) 0x50c290 ADD	X0, X0, #1

  (3709) 0x50c294 LDR	D5, [X19, X1,LSL #3]

  (3709) 0x50c298 FMADD	D0, D3, D5, D0

  (3709) 0x50c29c LDR	X11, [X20, X0,LSL #3]

  (3709) 0x50c2a0 LDR	D6, [X21, X0,LSL #3]

  (3709) 0x50c2a4 ADD	X0, X0, #1

  (3709) 0x50c2a8 LDR	D4, [X19, X11,LSL #3]

  (3709) 0x50c2ac FMADD	D0, D6, D4, D0

  (3709) 0x50c2b0 LDR	X7, [X20, X0,LSL #3]

  (3709) 0x50c2b4 LDR	D7, [X21, X0,LSL #3]

  (3709) 0x50c2b8 ADD	X0, X0, #1

  (3709) 0x50c2bc LDR	D16, [X19, X7,LSL #3]

  (3709) 0x50c2c0 FMADD	D0, D7, D16, D0

  (3709) 0x50c2c4 LDR	X6, [X20, X0,LSL #3]

  (3709) 0x50c2c8 LDR	D2, [X21, X0,LSL #3]

  (3709) 0x50c2cc ADD	X0, X0, #1

  (3709) 0x50c2d0 LDR	D1, [X19, X6,LSL #3]

  (3709) 0x50c2d4 FMADD	D0, D2, D1, D0

  (3709) 0x50c2d8 LDR	X5, [X20, X0,LSL #3]

  (3709) 0x50c2dc LDR	D17, [X21, X0,LSL #3]

  (3709) 0x50c2e0 ADD	X0, X0, #1

  (3709) 0x50c2e4 LDR	D18, [X19, X5,LSL #3]

  (3709) 0x50c2e8 FMADD	D0, D17, D18, D0

  (3709) 0x50c2ec CMP	X0, X17

  (3709) 0x50c2f0 B.EQ	50c39c

    (3710) 0x50c2f4 LDR	X12, [X20, X0,LSL #3]

    (3710) 0x50c2f8 ADD	X13, X0, #1

    (3710) 0x50c2fc ADD	X8, X0, #2

    (3710) 0x50c300 ADD	X14, X0, #3

    (3710) 0x50c304 ADD	X15, X0, #4

    (3710) 0x50c308 LDR	D19, [X21, X0,LSL #3]

    (3710) 0x50c30c ADD	X18, X0, #5

    (3710) 0x50c310 ADD	X4, X0, #6

    (3710) 0x50c314 ADD	X3, X0, #7

    (3710) 0x50c318 ADD	X0, X0, #8

    (3710) 0x50c31c LDR	X9, [X20, X13,LSL #3]

    (3710) 0x50c320 LDR	D20, [X19, X12,LSL #3]

    (3710) 0x50c324 LDR	D21, [X21, X13,LSL #3]

    (3710) 0x50c328 LDR	D22, [X19, X9,LSL #3]

    (3710) 0x50c32c LDR	X30, [X20, X8,LSL #3]

    (3710) 0x50c330 FMADD	D23, D19, D20, D0

    (3710) 0x50c334 LDR	D24, [X21, X8,LSL #3]

    (3710) 0x50c338 LDR	X27, [X20, X14,LSL #3]

    (3710) 0x50c33c FMADD	D25, D21, D22, D23

    (3710) 0x50c340 LDR	D26, [X19, X30,LSL #3]

    (3710) 0x50c344 LDR	D27, [X21, X14,LSL #3]

    (3710) 0x50c348 LDR	D28, [X19, X27,LSL #3]

    (3710) 0x50c34c LDR	X2, [X20, X15,LSL #3]

    (3710) 0x50c350 FMADD	D8, D24, D26, D25

    (3710) 0x50c354 LDR	D29, [X21, X15,LSL #3]

    (3710) 0x50c358 LDR	X10, [X20, X18,LSL #3]

    (3710) 0x50c35c FMADD	D30, D27, D28, D8

    (3710) 0x50c360 LDR	D31, [X19, X2,LSL #3]

    (3710) 0x50c364 LDR	D3, [X21, X18,LSL #3]

    (3710) 0x50c368 LDR	D5, [X19, X10,LSL #3]

    (3710) 0x50c36c LDR	X11, [X20, X4,LSL #3]

    (3710) 0x50c370 FMADD	D6, D29, D31, D30

    (3710) 0x50c374 LDR	D4, [X21, X4,LSL #3]

    (3710) 0x50c378 LDR	X1, [X20, X3,LSL #3]

    (3710) 0x50c37c FMADD	D7, D3, D5, D6

    (3710) 0x50c380 LDR	D16, [X19, X11,LSL #3]

    (3710) 0x50c384 LDR	D2, [X21, X3,LSL #3]

    (3710) 0x50c388 LDR	D1, [X19, X1,LSL #3]

    (3710) 0x50c38c FMADD	D17, D4, D16, D7

    (3710) 0x50c390 FMADD	D0, D2, D1, D17

    (3710) 0x50c394 CMP	X0, X17

    (3710) 0x50c398 B.NE	50c2f4

  (3709) 0x50c39c FMUL	D18, D9, D0

  (3709) 0x50c3a0 STR	D18, [X25, X22,LSL #3]

  (3709) 0x50c3a4 ADD	X22, X22, #1

  (3709) 0x50c3a8 CMP	X23, X22

  (3709) 0x50c3ac B.NE	50c210

(3695) 0x50c3b0 B	50b150

(3695) 0x50c3b4 CMP	X22, X23

(3695) 0x50c3b8 B.GE	50b150

(3695) 0x50c3bc ADD	X16, X24, #8

  (3703) 0x50c3c0 LDR	D2, [X26, X22,LSL #3]

  (3703) 0x50c3c4 LDR	X0, [X24, X22,LSL #3]

  (3703) 0x50c3c8 LDR	X17, [X16, X22,LSL #3]

  (3703) 0x50c3cc FMUL	D25, D8, D2

  (3703) 0x50c3d0 CMP	X0, X17

  (3703) 0x50c3d4 B.GE	50c550

  (3703) 0x50c3d8 SUB	X18, X17, X0

  (3703) 0x50c3dc ANDS	X30, X18, #4224

  (3703) 0x50c3e0 B.EQ	50c4a8

  (3703) 0x50c3e4 CMP	X30, #1

  (3703) 0x50c3e8 B.EQ	50c48c

  (3703) 0x50c3ec CMP	X30, #2

  (3703) 0x50c3f0 B.EQ	50c478

  (3703) 0x50c3f4 CMP	X30, #3

  (3703) 0x50c3f8 B.EQ	50c464

  (3703) 0x50c3fc CMP	X30, #4

  (3703) 0x50c400 B.EQ	50c450

  (3703) 0x50c404 CMP	X30, #5

  (3703) 0x50c408 B.EQ	50c43c

  (3703) 0x50c40c CMP	X30, #6

  (3703) 0x50c410 B.EQ	50c428

  (3703) 0x50c414 LDR	X1, [X20, X0,LSL #3]

  (3703) 0x50c418 LDR	D3, [X21, X0,LSL #3]

  (3703) 0x50c41c ADD	X0, X0, #1

  (3703) 0x50c420 LDR	D4, [X19, X1,LSL #3]

  (3703) 0x50c424 FMADD	D25, D3, D4, D25

  (3703) 0x50c428 LDR	X27, [X20, X0,LSL #3]

  (3703) 0x50c42c LDR	D5, [X21, X0,LSL #3]

  (3703) 0x50c430 ADD	X0, X0, #1

  (3703) 0x50c434 LDR	D6, [X19, X27,LSL #3]

  (3703) 0x50c438 FMADD	D25, D5, D6, D25

  (3703) 0x50c43c LDR	X2, [X20, X0,LSL #3]

  (3703) 0x50c440 LDR	D7, [X21, X0,LSL #3]

  (3703) 0x50c444 ADD	X0, X0, #1

  (3703) 0x50c448 LDR	D16, [X19, X2,LSL #3]

  (3703) 0x50c44c FMADD	D25, D7, D16, D25

  (3703) 0x50c450 LDR	X3, [X20, X0,LSL #3]

  (3703) 0x50c454 LDR	D17, [X21, X0,LSL #3]

  (3703) 0x50c458 ADD	X0, X0, #1

  (3703) 0x50c45c LDR	D18, [X19, X3,LSL #3]

  (3703) 0x50c460 FMADD	D25, D17, D18, D25

  (3703) 0x50c464 LDR	X4, [X20, X0,LSL #3]

  (3703) 0x50c468 LDR	D19, [X21, X0,LSL #3]

  (3703) 0x50c46c ADD	X0, X0, #1

  (3703) 0x50c470 LDR	D20, [X19, X4,LSL #3]

  (3703) 0x50c474 FMADD	D25, D19, D20, D25

  (3703) 0x50c478 LDR	X5, [X20, X0,LSL #3]

  (3703) 0x50c47c LDR	D21, [X21, X0,LSL #3]

  (3703) 0x50c480 ADD	X0, X0, #1

  (3703) 0x50c484 LDR	D22, [X19, X5,LSL #3]

  (3703) 0x50c488 FMADD	D25, D21, D22, D25

  (3703) 0x50c48c LDR	X6, [X20, X0,LSL #3]

  (3703) 0x50c490 LDR	D23, [X21, X0,LSL #3]

  (3703) 0x50c494 ADD	X0, X0, #1

  (3703) 0x50c498 LDR	D24, [X19, X6,LSL #3]

  (3703) 0x50c49c FMADD	D25, D23, D24, D25

  (3703) 0x50c4a0 CMP	X0, X17

  (3703) 0x50c4a4 B.EQ	50c550

    (3704) 0x50c4a8 LDR	X10, [X20, X0,LSL #3]

    (3704) 0x50c4ac ADD	X11, X0, #1

    (3704) 0x50c4b0 ADD	X8, X0, #2

    (3704) 0x50c4b4 ADD	X7, X0, #3

    (3704) 0x50c4b8 ADD	X12, X0, #4

    (3704) 0x50c4bc LDR	D26, [X21, X0,LSL #3]

    (3704) 0x50c4c0 ADD	X13, X0, #5

    (3704) 0x50c4c4 ADD	X14, X0, #6

    (3704) 0x50c4c8 ADD	X15, X0, #7

    (3704) 0x50c4cc ADD	X0, X0, #8

    (3704) 0x50c4d0 LDR	X9, [X20, X11,LSL #3]

    (3704) 0x50c4d4 LDR	D27, [X19, X10,LSL #3]

    (3704) 0x50c4d8 LDR	D28, [X21, X11,LSL #3]

    (3704) 0x50c4dc LDR	D29, [X19, X9,LSL #3]

    (3704) 0x50c4e0 LDR	X18, [X20, X8,LSL #3]

    (3704) 0x50c4e4 FMADD	D30, D26, D27, D25

    (3704) 0x50c4e8 LDR	D31, [X21, X8,LSL #3]

    (3704) 0x50c4ec LDR	X30, [X20, X7,LSL #3]

    (3704) 0x50c4f0 FMADD	D0, D28, D29, D30

    (3704) 0x50c4f4 LDR	D3, [X19, X18,LSL #3]

    (3704) 0x50c4f8 LDR	D2, [X21, X7,LSL #3]

    (3704) 0x50c4fc LDR	D1, [X19, X30,LSL #3]

    (3704) 0x50c500 LDR	X27, [X20, X12,LSL #3]

    (3704) 0x50c504 FMADD	D5, D31, D3, D0

    (3704) 0x50c508 LDR	D4, [X21, X12,LSL #3]

    (3704) 0x50c50c LDR	X1, [X20, X13,LSL #3]

    (3704) 0x50c510 FMADD	D6, D2, D1, D5

    (3704) 0x50c514 LDR	D7, [X19, X27,LSL #3]

    (3704) 0x50c518 LDR	D16, [X21, X13,LSL #3]

    (3704) 0x50c51c LDR	D17, [X19, X1,LSL #3]

    (3704) 0x50c520 LDR	X2, [X20, X14,LSL #3]

    (3704) 0x50c524 FMADD	D18, D4, D7, D6

    (3704) 0x50c528 LDR	D19, [X21, X14,LSL #3]

    (3704) 0x50c52c LDR	X3, [X20, X15,LSL #3]

    (3704) 0x50c530 FMADD	D20, D16, D17, D18

    (3704) 0x50c534 LDR	D21, [X19, X2,LSL #3]

    (3704) 0x50c538 LDR	D22, [X21, X15,LSL #3]

    (3704) 0x50c53c LDR	D23, [X19, X3,LSL #3]

    (3704) 0x50c540 FMADD	D24, D19, D21, D20

    (3704) 0x50c544 FMADD	D25, D22, D23, D24

    (3704) 0x50c548 CMP	X0, X17

    (3704) 0x50c54c B.NE	50c4a8

  (3703) 0x50c550 FMUL	D25, D9, D25

  (3703) 0x50c554 STR	D25, [X25, X22,LSL #3]

  (3703) 0x50c558 ADD	X22, X22, #1

  (3703) 0x50c55c CMP	X23, X22

  (3703) 0x50c560 B.NE	50c3c0

(3695) 0x50c564 B	50b150

Coverage (%)	Name	Source Location	Module

Path /

Average path: Display a virtual path defined by average values of all real paths

Source file and lines	csr_matvec.c:243-404
Module	exec

The function is defined in /home/hbollore/qaas-runs/171-233-5044/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:243-365,371-404.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 13.50 to 2.17 cycles (6.23x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is not vectorized. Only 26% of vector register length is used (average across all VPU instructions). By fully vectorizing your function, you can lower the cost of an iteration from 13.50 to 3.37 cycles (4.00x speedup).

Details

6% of VPU instructions are used in vector version (process two or more data elements in vector registers):

33% of VPU loads are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 13.50 to 4.00 cycles (3.37x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 232 bytes. The binary function is storing 104 bytes.

General properties

nb instructions	99
loop length	396
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

12.38 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	10.50	10.50	13.50	13.50	13.50	13.50	4.00	1.00	1.00	1.00	9.17	8.83	9.00	3.00	3.00
cycles	10.50	10.50	13.50	13.50	13.50	13.50	4.00	1.00	1.00	1.00	9.17	8.83	9.00	3.00	3.00

Execution ports to units layout:

P0:
P1:
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	12.38
Overall L1	13.50

Vectorization ratios

all	6%
load	33%
store	100%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 13.50 cycles. At this rate:

17% of peak load performance is reached (17.19 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
16% of peak store performance is reached (7.70 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 50af00

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
STP X29, X30, [SP, #912]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X1, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDP X23, X21, [X0, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
STP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDR D9, [X0]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
ORR X0, XZR, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR D8, [X1, #72]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDP X24, X20, [X1, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X19, X26, [X1, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDR X25, [X1, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X27, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X27, [X1, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 509ae0 <hypre_CSRMatrixGetLoadBalancedPartitionBegin>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X22, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 509b84 <hypre_CSRMatrixGetLoadBalancedPartitionEnd>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X23, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X22, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 50b75c <hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6+0x85c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X22, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
CCMP X27, X22, #1, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B.LT 50b720 <hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6+0x820>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X23, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
CCMP X27, X23, #1, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B.LT 50b6e4 <hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6+0x7e4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FCMP D8, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.EQ 50b170 <hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6+0x270>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FMOV D0, #-1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMOV D1, #1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FCMP D8, D0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.NE 50b51c <hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6+0x61c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FCMP D9, D1	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.EQ 50b798 <hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6+0x898>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FCMP D9, D0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.EQ 50bcf0 <hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6+0xdf0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X22, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GE 50b150 <hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6+0x250>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X16, X24, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADRP X11, <54f6e4>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADRP X12, <5206e8>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X13, [X11, #4064]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADRP X14, <51f6f0>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X2, X12, #1680	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X14, #2624	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X0, [X13]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 516a84 <hypre_fprintf>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X15, <520704>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X3, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, X15, #1712	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X1, #250	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 51a420 <hypre_error_handler>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 50af78 <hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6+0x78>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X6, <54f720>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADRP X7, <520724>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X8, [X6, #4064]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADRP X9, <51f72c>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X2, X7, #1800	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X9, #2624	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X0, [X8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 516a84 <hypre_fprintf>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X10, <520740>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X3, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, X10, #1712	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X1, #249	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 51a420 <hypre_error_handler>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 50af6c <hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6+0x6c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X0, <54f75c>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADRP X4, <51f760>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X3, [X0, #4064]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADRP X2, <520768>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X4, #2624	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X2, X2, #1240	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X0, [X3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 516a84 <hypre_fprintf>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X5, <52077c>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X3, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, X5, #1712	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X1, #248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 51a420 <hypre_error_handler>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 50af60 <hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6+0x60>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X22, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GE 50b150 <hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6+0x250>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X16, X24, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDR X27, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP X29, X30, [SP], #112	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50

Source file and lines	csr_matvec.c:243-404
Module	exec

The function is defined in /home/hbollore/qaas-runs/171-233-5044/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:243-365,371-404.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 13.50 to 2.17 cycles (6.23x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

6% of VPU instructions are used in vector version (process two or more data elements in vector registers):

33% of VPU loads are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 13.50 to 4.00 cycles (3.37x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 232 bytes. The binary function is storing 104 bytes.

General properties

nb instructions	99
loop length	396
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

12.38 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	10.50	10.50	13.50	13.50	13.50	13.50	4.00	1.00	1.00	1.00	9.17	8.83	9.00	3.00	3.00
cycles	10.50	10.50	13.50	13.50	13.50	13.50	4.00	1.00	1.00	1.00	9.17	8.83	9.00	3.00	3.00

Execution ports to units layout:

P0:
P1:
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	12.38
Overall L1	13.50

Vectorization ratios

all	6%
load	33%
store	100%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 13.50 cycles. At this rate:

17% of peak load performance is reached (17.19 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
16% of peak store performance is reached (7.70 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 50af00

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
STP X29, X30, [SP, #912]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X1, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDP X23, X21, [X0, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
STP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
LDR D9, [X0]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
ORR X0, XZR, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR D8, [X1, #72]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDP X24, X20, [X1, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X19, X26, [X1, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDR X25, [X1, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X27, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X27, [X1, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 509ae0 <hypre_CSRMatrixGetLoadBalancedPartitionBegin>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X22, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X0, XZR, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 509b84 <hypre_CSRMatrixGetLoadBalancedPartitionEnd>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X23, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X22, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 50b75c <hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6+0x85c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X22, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
CCMP X27, X22, #1, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B.LT 50b720 <hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6+0x820>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X23, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
CCMP X27, X23, #1, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B.LT 50b6e4 <hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6+0x7e4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FCMP D8, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.EQ 50b170 <hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6+0x270>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FMOV D0, #-1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMOV D1, #1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FCMP D8, D0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.NE 50b51c <hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6+0x61c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FCMP D9, D1	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.EQ 50b798 <hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6+0x898>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FCMP D9, D0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.EQ 50bcf0 <hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6+0xdf0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X22, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GE 50b150 <hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6+0x250>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X16, X24, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADRP X11, <54f6e4>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADRP X12, <5206e8>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X13, [X11, #4064]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADRP X14, <51f6f0>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X2, X12, #1680	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X14, #2624	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X0, [X13]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 516a84 <hypre_fprintf>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X15, <520704>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X3, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, X15, #1712	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X1, #250	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 51a420 <hypre_error_handler>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 50af78 <hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6+0x78>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X6, <54f720>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADRP X7, <520724>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X8, [X6, #4064]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADRP X9, <51f72c>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X2, X7, #1800	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X9, #2624	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X0, [X8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 516a84 <hypre_fprintf>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X10, <520740>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X3, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, X10, #1712	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X1, #249	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 51a420 <hypre_error_handler>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 50af6c <hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6+0x6c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X0, <54f75c>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADRP X4, <51f760>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X3, [X0, #4064]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADRP X2, <520768>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X4, #2624	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X2, X2, #1240	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X0, [X3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 516a84 <hypre_fprintf>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADRP X5, <52077c>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X3, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, X5, #1712	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X1, #248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 51a420 <hypre_error_handler>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 50af60 <hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6+0x60>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X22, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GE 50b150 <hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6+0x250>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X16, X24, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDR X27, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP X29, X30, [SP], #112	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50

Name	Coverage (%)	Time (s)
▼hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6–	15.8	5.99
▼Loop 3695 - csr_matvec.c:243-404 - exec–	0	0
▼Loop 3697 - csr_matvec.c:307-314 - exec–	1.04	0.34
○Loop 3698 - csr_matvec.c:310-312 - exec	6.88	2.27
▼Loop 3714 - csr_matvec.c:256-263 - exec–	0.94	0.31
○Loop 3715 - csr_matvec.c:259-261 - exec	6.13	2.02
▼Loop 3707 - csr_matvec.c:334-341 - exec–	0.8	0.27
○Loop 3708 - csr_matvec.c:337-339 - exec	0	0.01
▼Loop 3709 - csr_matvec.c:358-365 - exec–	0	0
○Loop 3710 - csr_matvec.c:361-363 - exec	0	0
▼Loop 3701 - csr_matvec.c:373-380 - exec–	0	0
○Loop 3702 - csr_matvec.c:376-378 - exec	0	0
▼Loop 3705 - csr_matvec.c:385-392 - exec–	0	0
○Loop 3706 - csr_matvec.c:388-390 - exec	0	0
▼Loop 3700 - csr_matvec.c:268-275 - exec–	0	0
○Loop 3713 - csr_matvec.c:271-273 - exec	0	0
▼Loop 3711 - csr_matvec.c:346-353 - exec–	0	0
○Loop 3712 - csr_matvec.c:349-351 - exec	0	0
▼Loop 3703 - csr_matvec.c:397-404 - exec–	0	0
○Loop 3704 - csr_matvec.c:400-402 - exec	0	0
▼Loop 3696 - csr_matvec.c:280-287 - exec–	0	0
○Loop 3699 - csr_matvec.c:283-285 - exec	0	0
▼Loop 3716 - csr_matvec.c:295-302 - exec–	0	0
○Loop 3717 - csr_matvec.c:298-300 - exec	0	0
▼Loop 3718 - csr_matvec.c:319-326 - exec–	0	0
○Loop 3719 - csr_matvec.c:322-324 - exec	0	0

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Cycles and memory resources usage

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code