OV - exec - Function hypre_BoomerAMGCoarsenPMIS._omp

	Function: hypre_BoomerAMGCoarsenPMIS._omp_fn.8	Module: exec	Source: par_coarsen.c:2516-2576	Coverage: 0.06%

/home/hbollore/qaas-runs/171-233-5044/intel/AMG/build/AMG/AMG/parcsr_ls/par_coarsen.c: 2516 - 2576

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2516: #pragma omp parallel private(ig,i)

2517: #endif

2518:      {

2519:         HYPRE_Int private_graph_size_cnt = 0;

2520:         HYPRE_Int private_graph_offd_size_cnt = 0;

2521:

2522:         HYPRE_Int ig_begin, ig_end;

2523:         hypre_GetSimpleThreadPartition(&ig_begin, &ig_end, graph_size);

2524:

2525:         HYPRE_Int ig_offd_begin, ig_offd_end;

2526:         hypre_GetSimpleThreadPartition(&ig_offd_begin, &ig_offd_end, graph_offd_size);

2527:

2528:         for (ig = ig_begin; ig < ig_end; ig++)

2529:         {

2530:            i = graph_array[ig];

2531:

2532:            if (CF_marker[i]!=0) /* C or F point */

2533:            {

2534:               /* the independent set subroutine needs measure 0 for

2535:                  removed nodes */

2536:               measure_array[i] = 0;

2537:            }

2538:            else

2539:            {

2540:               private_graph_size_cnt++;

2541:            }

2542:         }

2543:

2544:         for (ig = ig_offd_begin; ig < ig_offd_end; ig++)

2545:         {

2546:            i = graph_array_offd[ig];

2547:

2548:            if (CF_marker_offd[i]!=0) /* C of F point */

2549:            {

2550:               /* the independent set subroutine needs measure 0 for

2551:                  removed nodes */

2552:               measure_array[i + num_variables] = 0;

2553:            }

2554:            else

2555:            {

2556:               private_graph_offd_size_cnt++;

2557:            }

2558:         }

2559:

2560:         hypre_prefix_sum_pair(&private_graph_size_cnt, &graph_size, &private_graph_offd_size_cnt, &graph_offd_size, prefix_sum_workspace);

2561:

2562:         for (ig = ig_begin; ig < ig_end; ig++)

2563:         {

2564:            i = graph_array[ig];

2565:            if (CF_marker[i]==0)

2566:            {

2567:               graph_array2[private_graph_size_cnt++] = i;

2568:            }

2569:         }

2570:

2571:         for (ig = ig_offd_begin; ig < ig_offd_end; ig++)

2572:         {

2573:            i = graph_array_offd[ig];

2574:            if (CF_marker_offd[i]==0)

2575:            {

2576:               graph_array_offd2[private_graph_offd_size_cnt++] = i;

0x4219c8 ADRP	X2,

0x4219cc STP	X29, X30, [SP, #864]!

0x4219d0 ADD	X29, SP, #0

0x4219d4 ADD	X1, SP, #128

0x4219d8 LDR	X3, [X2, #3848]

0x4219dc STP	X19, X20, [SP, #16]

0x4219e0 STP	X21, X22, [SP, #32]

0x4219e4 STP	X23, X24, [SP, #48]

0x4219e8 ORR	X24, XZR, X0

0x4219ec ADD	X0, SP, #120

0x4219f0 STP	X25, X26, [SP, #64]

0x4219f4 STP	X27, X28, [SP, #80]

0x4219f8 LDR	X4, [X3]

0x4219fc STR	X4, [SP, #152]

0x421a00 MOVZ	X4, #0

0x421a04 LDR	X4, [X24, #48]

0x421a08 STP	XZR, XZR, [SP, #104]

0x421a0c LDP	X27, X20, [X24]

0x421a10 LDP	X19, X25, [X24, #16]

0x421a14 LDP	X26, X22, [X24, #32]

0x421a18 LDP	X28, X23, [X24, #64]

0x421a1c LDR	X2, [X4]

0x421a20 LDR	X21, [X24, #80]

0x421a24 BL	5195a0

0x421a28 LDR	X5, [X24, #56]

0x421a2c ADD	X1, SP, #144

0x421a30 ADD	X0, SP, #136

0x421a34 LDR	X2, [X5]

0x421a38 BL	5195a0

0x421a3c LDP	X1, X0, [SP, #120]

0x421a40 CMP	X1, X0

0x421a44 B.GE	421bf0

0x421a48 ADD	X1, X26, X1,LSL #3

0x421a4c MOVZ	W4, #0

0x421a50 LDR	X3, [SP, #104]

0x421a54 ADD	X6, X26, X0,LSL #3

0x421a58 SUB	X7, X6, X1

0x421a5c SUB	X8, X7, #8

0x421a60 UBFM	X9, X8, #3, #63

0x421a64 ADD	X10, X9, #1

0x421a68 ANDS	X11, X10, #4224

0x421a6c B.EQ	421b54

0x421a70 CMP	X11, #1

0x421a74 B.EQ	421b30

0x421a78 CMP	X11, #2

0x421a7c B.EQ	421b18

0x421a80 CMP	X11, #3

0x421a84 B.EQ	421b00

0x421a88 CMP	X11, #4

0x421a8c B.EQ	421ae8

0x421a90 CMP	X11, #5

0x421a94 B.EQ	421ad0

0x421a98 CMP	X11, #6

0x421a9c B.EQ	421ab8

0x421aa0 LDR	X12, [X1]

0x421aa4 UBFM	X13, X12, #61, #60

0x421aa8 LDR	X14, [X20, X13]

0x421aac CBZ	X14, 4223d8

0x421ab0 ADD	X1, X1, #8

0x421ab4 STR	XZR, [X25, X13]

0x421ab8 LDR	X15, [X1]

0x421abc UBFM	X16, X15, #61, #60

0x421ac0 LDR	X17, [X20, X16]

0x421ac4 CBZ	X17, 4223ac

0x421ac8 ADD	X1, X1, #8

0x421acc STR	XZR, [X25, X16]

0x421ad0 LDR	X18, [X1]

0x421ad4 UBFM	X30, X18, #61, #60

0x421ad8 LDR	X2, [X20, X30]

0x421adc CBZ	X2, 422360

0x421ae0 ADD	X1, X1, #8

0x421ae4 STR	XZR, [X25, X30]

0x421ae8 LDR	X5, [X1]

0x421aec UBFM	X0, X5, #61, #60

0x421af0 LDR	X7, [X20, X0]

0x421af4 CBZ	X7, 422350

0x421af8 ADD	X1, X1, #8

0x421afc STR	XZR, [X25, X0]

0x421b00 LDR	X8, [X1]

0x421b04 UBFM	X9, X8, #61, #60

0x421b08 LDR	X10, [X20, X9]

0x421b0c CBZ	X10, 422320

0x421b10 ADD	X1, X1, #8

0x421b14 STR	XZR, [X25, X9]

0x421b18 LDR	X11, [X1]

0x421b1c UBFM	X12, X11, #61, #60

0x421b20 LDR	X13, [X20, X12]

0x421b24 CBZ	X13, 4222d8

0x421b28 ADD	X1, X1, #8

0x421b2c STR	XZR, [X25, X12]

0x421b30 LDR	X14, [X1]

0x421b34 UBFM	X15, X14, #61, #60

0x421b38 LDR	X16, [X20, X15]

0x421b3c CBNZ	X16, 4222c0

0x421b40 ADD	X3, X3, #1

0x421b44 MOVZ	W4, #1

0x421b48 ADD	X1, X1, #8

0x421b4c CMP	X6, X1

0x421b50 B.EQ	421be8

(179) 0x421b54 LDR	X17, [X1]

(179) 0x421b58 LDR	X18, [X20, X17,LSL #3]

(179) 0x421b5c CBNZ	X18, 42221c

(179) 0x421b60 LDR	X30, [X1, #8]

(179) 0x421b64 ADD	X3, X3, #1

(179) 0x421b68 MOVZ	W4, #1

(179) 0x421b6c ADD	X1, X1, #8

(179) 0x421b70 LDR	X2, [X20, X30,LSL #3]

(179) 0x421b74 CBZ	X2, 422230

(179) 0x421b78 LDR	X5, [X1, #8]

(179) 0x421b7c STR	XZR, [X25, X30,LSL #3]

(179) 0x421b80 LDR	X0, [X20, X5,LSL #3]

(179) 0x421b84 CBZ	X0, 422244

(179) 0x421b88 LDR	X7, [X1, #16]

(179) 0x421b8c STR	XZR, [X25, X5,LSL #3]

(179) 0x421b90 LDR	X8, [X20, X7,LSL #3]

(179) 0x421b94 CBZ	X8, 422258

(179) 0x421b98 LDR	X9, [X1, #24]

(179) 0x421b9c STR	XZR, [X25, X7,LSL #3]

(179) 0x421ba0 LDR	X10, [X20, X9,LSL #3]

(179) 0x421ba4 CBZ	X10, 42226c

(179) 0x421ba8 LDR	X11, [X1, #32]

(179) 0x421bac STR	XZR, [X25, X9,LSL #3]

(179) 0x421bb0 LDR	X12, [X20, X11,LSL #3]

(179) 0x421bb4 CBZ	X12, 422280

(179) 0x421bb8 LDR	X13, [X1, #40]

(179) 0x421bbc STR	XZR, [X25, X11,LSL #3]

(179) 0x421bc0 LDR	X14, [X20, X13,LSL #3]

(179) 0x421bc4 CBZ	X14, 422294

(179) 0x421bc8 LDR	X15, [X1, #48]

(179) 0x421bcc STR	XZR, [X25, X13,LSL #3]

(179) 0x421bd0 LDR	X16, [X20, X15,LSL #3]

(179) 0x421bd4 CBZ	X16, 4222a8

(179) 0x421bd8 STR	XZR, [X25, X15,LSL #3]

(179) 0x421bdc ADD	X1, X1, #56

(179) 0x421be0 CMP	X6, X1

(179) 0x421be4 B.NE	421b54

0x421be8 CBZ	W4, 421bf0

0x421bec STR	X3, [SP, #104]

0x421bf0 LDP	X6, X17, [SP, #136]

0x421bf4 CMP	X6, X17

0x421bf8 B.GE	421dbc

0x421bfc ADD	X4, X22, X6,LSL #3

0x421c00 MOVZ	W2, #0

0x421c04 ADD	X18, X22, X17,LSL #3

0x421c08 SUB	X30, X18, X4

0x421c0c SUB	X5, X30, #8

0x421c10 UBFM	X0, X5, #3, #63

0x421c14 ADD	X7, X0, #1

0x421c18 LDR	X0, [SP, #112]

0x421c1c ANDS	X8, X7, #4224

0x421c20 B.EQ	421d04

0x421c24 CMP	X8, #1

0x421c28 B.EQ	421ce4

0x421c2c CMP	X8, #2

0x421c30 B.EQ	421ccc

0x421c34 CMP	X8, #3

0x421c38 B.EQ	421cb4

0x421c3c CMP	X8, #4

0x421c40 B.EQ	421c9c

0x421c44 CMP	X8, #5

0x421c48 B.EQ	421c84

0x421c4c CMP	X8, #6

0x421c50 B.EQ	421c6c

0x421c54 LDR	X9, [X4]

0x421c58 LDR	X10, [X19, X9,LSL #3]

0x421c5c CBZ	X10, 4223e8

0x421c60 ADD	X11, X27, X9

0x421c64 ADD	X4, X4, #8

0x421c68 STR	XZR, [X25, X11,LSL #3]

0x421c6c LDR	X12, [X4]

0x421c70 LDR	X13, [X19, X12,LSL #3]

0x421c74 CBZ	X13, 4223c8

0x421c78 ADD	X14, X27, X12

0x421c7c ADD	X4, X4, #8

0x421c80 STR	XZR, [X25, X14,LSL #3]

0x421c84 LDR	X15, [X4]

0x421c88 LDR	X16, [X19, X15,LSL #3]

0x421c8c CBZ	X16, 422370

0x421c90 ADD	X3, X27, X15

0x421c94 ADD	X4, X4, #8

0x421c98 STR	XZR, [X25, X3,LSL #3]

0x421c9c LDR	X1, [X4]

0x421ca0 LDR	X6, [X19, X1,LSL #3]

0x421ca4 CBZ	X6, 422340

0x421ca8 ADD	X17, X27, X1

0x421cac ADD	X4, X4, #8

0x421cb0 STR	XZR, [X25, X17,LSL #3]

0x421cb4 LDR	X30, [X4]

0x421cb8 LDR	X5, [X19, X30,LSL #3]

0x421cbc CBZ	X5, 422310

0x421cc0 ADD	X7, X27, X30

0x421cc4 ADD	X4, X4, #8

0x421cc8 STR	XZR, [X25, X7,LSL #3]

0x421ccc LDR	X8, [X4]

0x421cd0 LDR	X9, [X19, X8,LSL #3]

0x421cd4 CBZ	X9, 4222c8

0x421cd8 ADD	X10, X27, X8

0x421cdc ADD	X4, X4, #8

0x421ce0 STR	XZR, [X25, X10,LSL #3]

0x421ce4 LDR	X11, [X4]

0x421ce8 LDR	X12, [X19, X11,LSL #3]

0x421cec CBNZ	X12, 4222b4

0x421cf0 ADD	X0, X0, #1

0x421cf4 MOVZ	W2, #1

0x421cf8 ADD	X4, X4, #8

0x421cfc CMP	X18, X4

0x421d00 B.EQ	421db4

    (168) 0x421d04 LDR	X14, [X4]

    (168) 0x421d08 LDR	X15, [X19, X14,LSL #3]

    (168) 0x421d0c CBNZ	X15, 422180

    (168) 0x421d10 LDR	X3, [X4, #8]

    (168) 0x421d14 ADD	X0, X0, #1

    (168) 0x421d18 MOVZ	W2, #1

    (168) 0x421d1c ADD	X4, X4, #8

    (168) 0x421d20 LDR	X1, [X19, X3,LSL #3]

    (168) 0x421d24 CBZ	X1, 422198

    (175) 0x421d28 LDR	X17, [X4, #8]

    (175) 0x421d2c ADD	X6, X27, X3

    (175) 0x421d30 STR	XZR, [X25, X6,LSL #3]

    (175) 0x421d34 LDR	X30, [X19, X17,LSL #3]

    (175) 0x421d38 CBZ	X30, 4221ac

    (168) 0x421d3c LDR	X7, [X4, #16]

    (168) 0x421d40 ADD	X5, X27, X17

    (168) 0x421d44 STR	XZR, [X25, X5,LSL #3]

    (168) 0x421d48 LDR	X8, [X19, X7,LSL #3]

    (168) 0x421d4c CBZ	X8, 4221c0

        (173) 0x421d50 LDR	X10, [X4, #24]

        (173) 0x421d54 ADD	X9, X27, X7

        (173) 0x421d58 STR	XZR, [X25, X9,LSL #3]

        (173) 0x421d5c LDR	X11, [X19, X10,LSL #3]

        (173) 0x421d60 CBZ	X11, 4221d4

    (168) 0x421d64 LDR	X13, [X4, #32]

    (168) 0x421d68 ADD	X12, X27, X10

    (168) 0x421d6c STR	XZR, [X25, X12,LSL #3]

    (168) 0x421d70 LDR	X14, [X19, X13,LSL #3]

    (168) 0x421d74 CBZ	X14, 4221e8

            (171) 0x421d78 LDR	X16, [X4, #40]

            (171) 0x421d7c ADD	X15, X27, X13

            (171) 0x421d80 STR	XZR, [X25, X15,LSL #3]

            (171) 0x421d84 LDR	X3, [X19, X16,LSL #3]

            (171) 0x421d88 CBZ	X3, 4221fc

    (168) 0x421d8c LDR	X6, [X4, #48]

    (168) 0x421d90 ADD	X1, X27, X16

    (168) 0x421d94 STR	XZR, [X25, X1,LSL #3]

    (168) 0x421d98 LDR	X17, [X19, X6,LSL #3]

    (168) 0x421d9c CBZ	X17, 422210

                (169) 0x421da0 ADD	X30, X27, X6

                (169) 0x421da4 STR	XZR, [X25, X30,LSL #3]

    (168) 0x421da8 ADD	X4, X4, #56

    (168) 0x421dac CMP	X18, X4

    (168) 0x421db0 B.NE	421d04

(176) 0x421db4 CBZ	W2, 421dbc

(176) 0x421db8 STR	X0, [SP, #112]

(176) 0x421dbc ORR	X4, XZR, X28

(176) 0x421dc0 ADD	X2, SP, #112

(176) 0x421dc4 LDP	X1, X3, [X24, #48]

(176) 0x421dc8 ADD	X0, SP, #104

(176) 0x421dcc BL	51a784

(176) 0x421dd0 LDP	X24, X25, [SP, #120]

(176) 0x421dd4 CMP	X24, X25

(176) 0x421dd8 B.GE	421fa8

(176) 0x421ddc ADD	X0, X26, X24,LSL #3

(176) 0x421de0 MOVZ	W3, #0

(176) 0x421de4 LDR	X2, [SP, #104]

(176) 0x421de8 ADD	X26, X26, X25,LSL #3

(176) 0x421dec SUB	X27, X26, X0

(176) 0x421df0 SUB	X28, X27, #8

(176) 0x421df4 UBFM	X18, X28, #3, #63

(176) 0x421df8 ADD	X5, X18, #1

(176) 0x421dfc ANDS	X7, X5, #4224

(176) 0x421e00 B.EQ	421ed0

(176) 0x421e04 CMP	X7, #1

(176) 0x421e08 B.EQ	421eac

(176) 0x421e0c CMP	X7, #2

(176) 0x421e10 B.EQ	421e9c

(176) 0x421e14 CMP	X7, #3

(176) 0x421e18 B.EQ	421e8c

(176) 0x421e1c CMP	X7, #4

(176) 0x421e20 B.EQ	421e70

(176) 0x421e24 CMP	X7, #5

(176) 0x421e28 B.EQ	421e60

(176) 0x421e2c CMP	X7, #6

(176) 0x421e30 B.EQ	421e50

(176) 0x421e34 LDR	X8, [X0]

(176) 0x421e38 LDR	X9, [X20, X8,LSL #3]

(176) 0x421e3c CBNZ	X9, 421e4c

(176) 0x421e40 MOVZ	W3, #1

(176) 0x421e44 STR	X8, [X23, X2,LSL #3]

(176) 0x421e48 ADD	X2, X2, #1

(176) 0x421e4c ADD	X0, X0, #8

(176) 0x421e50 LDR	X10, [X0]

(176) 0x421e54 LDR	X11, [X20, X10,LSL #3]

(176) 0x421e58 CBZ	X11, 42239c

(176) 0x421e5c ADD	X0, X0, #8

(176) 0x421e60 LDR	X12, [X0]

(176) 0x421e64 LDR	X13, [X20, X12,LSL #3]

(176) 0x421e68 CBZ	X13, 422380

(176) 0x421e6c ADD	X0, X0, #8

(176) 0x421e70 LDR	X14, [X0]

(176) 0x421e74 LDR	X15, [X20, X14,LSL #3]

(176) 0x421e78 CBNZ	X15, 421e88

(176) 0x421e7c MOVZ	W3, #1

(176) 0x421e80 STR	X14, [X23, X2,LSL #3]

(176) 0x421e84 ADD	X2, X2, #1

(176) 0x421e88 ADD	X0, X0, #8

(176) 0x421e8c LDR	X16, [X0]

(176) 0x421e90 LDR	X1, [X20, X16,LSL #3]

(176) 0x421e94 CBZ	X1, 422330

(176) 0x421e98 ADD	X0, X0, #8

(176) 0x421e9c LDR	X6, [X0]

(176) 0x421ea0 LDR	X17, [X20, X6,LSL #3]

(176) 0x421ea4 CBZ	X17, 4222f4

(176) 0x421ea8 ADD	X0, X0, #8

(176) 0x421eac LDR	X30, [X0]

(176) 0x421eb0 LDR	X4, [X20, X30,LSL #3]

(176) 0x421eb4 CBNZ	X4, 421ec4

(176) 0x421eb8 MOVZ	W3, #1

(176) 0x421ebc STR	X30, [X23, X2,LSL #3]

(176) 0x421ec0 ADD	X2, X2, #1

(176) 0x421ec4 ADD	X0, X0, #8

(176) 0x421ec8 CMP	X26, X0

(176) 0x421ecc B.EQ	421fa0

  (178) 0x421ed0 LDR	X24, [X0]

  (178) 0x421ed4 LDR	X25, [X20, X24,LSL #3]

  (178) 0x421ed8 CBNZ	X25, 421ee8

  (178) 0x421edc MOVZ	W3, #1

  (178) 0x421ee0 STR	X24, [X23, X2,LSL #3]

  (178) 0x421ee4 ADD	X2, X2, #1

  (178) 0x421ee8 LDR	X27, [X0, #8]

  (178) 0x421eec ADD	X0, X0, #8

  (178) 0x421ef0 LDR	X28, [X20, X27,LSL #3]

  (178) 0x421ef4 CBNZ	X28, 421f04

  (178) 0x421ef8 MOVZ	W3, #1

  (178) 0x421efc STR	X27, [X23, X2,LSL #3]

  (178) 0x421f00 ADD	X2, X2, #1

  (178) 0x421f04 LDR	X18, [X0, #8]

  (178) 0x421f08 LDR	X5, [X20, X18,LSL #3]

  (178) 0x421f0c CBNZ	X5, 421f1c

  (178) 0x421f10 MOVZ	W3, #1

  (178) 0x421f14 STR	X18, [X23, X2,LSL #3]

  (178) 0x421f18 ADD	X2, X2, #1

  (178) 0x421f1c LDR	X7, [X0, #16]

  (178) 0x421f20 LDR	X8, [X20, X7,LSL #3]

  (178) 0x421f24 CBNZ	X8, 421f34

  (178) 0x421f28 MOVZ	W3, #1

  (178) 0x421f2c STR	X7, [X23, X2,LSL #3]

  (178) 0x421f30 ADD	X2, X2, #1

  (178) 0x421f34 LDR	X9, [X0, #24]

  (178) 0x421f38 LDR	X10, [X20, X9,LSL #3]

  (178) 0x421f3c CBNZ	X10, 421f4c

  (178) 0x421f40 MOVZ	W3, #1

  (178) 0x421f44 STR	X9, [X23, X2,LSL #3]

  (178) 0x421f48 ADD	X2, X2, #1

  (178) 0x421f4c LDR	X11, [X0, #32]

  (178) 0x421f50 LDR	X12, [X20, X11,LSL #3]

  (178) 0x421f54 CBNZ	X12, 421f64

  (178) 0x421f58 MOVZ	W3, #1

  (178) 0x421f5c STR	X11, [X23, X2,LSL #3]

  (178) 0x421f60 ADD	X2, X2, #1

  (178) 0x421f64 LDR	X13, [X0, #40]

  (178) 0x421f68 LDR	X14, [X20, X13,LSL #3]

  (178) 0x421f6c CBNZ	X14, 421f7c

  (178) 0x421f70 MOVZ	W3, #1

  (178) 0x421f74 STR	X13, [X23, X2,LSL #3]

  (178) 0x421f78 ADD	X2, X2, #1

  (178) 0x421f7c LDR	X15, [X0, #48]

  (178) 0x421f80 LDR	X16, [X20, X15,LSL #3]

  (178) 0x421f84 CBNZ	X16, 421f94

  (178) 0x421f88 MOVZ	W3, #1

  (178) 0x421f8c STR	X15, [X23, X2,LSL #3]

  (178) 0x421f90 ADD	X2, X2, #1

  (178) 0x421f94 ADD	X0, X0, #56

  (178) 0x421f98 CMP	X26, X0

  (178) 0x421f9c B.NE	421ed0

(176) 0x421fa0 CBZ	W3, 421fa8

(176) 0x421fa4 STR	X2, [SP, #104]

(176) 0x421fa8 LDP	X20, X23, [SP, #136]

(176) 0x421fac CMP	X20, X23

(176) 0x421fb0 B.GE	422148

(176) 0x421fb4 ADD	X3, X22, X20,LSL #3

(176) 0x421fb8 LDR	X2, [SP, #112]

(176) 0x421fbc ADD	X22, X22, X23,LSL #3

(176) 0x421fc0 SUB	X26, X22, X3

(176) 0x421fc4 SUB	X1, X26, #8

(176) 0x421fc8 UBFM	X6, X1, #3, #63

(176) 0x421fcc ADD	X17, X6, #1

(176) 0x421fd0 ANDS	X30, X17, #4224

(176) 0x421fd4 B.EQ	422098

(176) 0x421fd8 CMP	X30, #1

(176) 0x421fdc B.EQ	422078

(176) 0x421fe0 CMP	X30, #2

(176) 0x421fe4 B.EQ	422068

(176) 0x421fe8 CMP	X30, #3

(176) 0x421fec B.EQ	422058

(176) 0x421ff0 CMP	X30, #4

(176) 0x421ff4 B.EQ	422040

(176) 0x421ff8 CMP	X30, #5

(176) 0x421ffc B.EQ	422030

(176) 0x422000 CMP	X30, #6

(176) 0x422004 B.EQ	422020

(176) 0x422008 LDR	X24, [X3]

(176) 0x42200c LDR	X4, [X19, X24,LSL #3]

(176) 0x422010 CBNZ	X4, 42201c

(176) 0x422014 STR	X24, [X21, X2,LSL #3]

(176) 0x422018 ADD	X2, X2, #1

(176) 0x42201c ADD	X3, X3, #8

(176) 0x422020 LDR	X25, [X3]

(176) 0x422024 LDR	X27, [X19, X25,LSL #3]

(176) 0x422028 CBZ	X27, 4223bc

(176) 0x42202c ADD	X3, X3, #8

(176) 0x422030 LDR	X28, [X3]

(176) 0x422034 LDR	X18, [X19, X28,LSL #3]

(176) 0x422038 CBZ	X18, 422390

(176) 0x42203c ADD	X3, X3, #8

(176) 0x422040 LDR	X5, [X3]

(176) 0x422044 LDR	X7, [X19, X5,LSL #3]

(176) 0x422048 CBNZ	X7, 422054

(176) 0x42204c STR	X5, [X21, X2,LSL #3]

(176) 0x422050 ADD	X2, X2, #1

(176) 0x422054 ADD	X3, X3, #8

(176) 0x422058 LDR	X8, [X3]

(176) 0x42205c LDR	X9, [X19, X8,LSL #3]

(176) 0x422060 CBZ	X9, 422304

(176) 0x422064 ADD	X3, X3, #8

(176) 0x422068 LDR	X10, [X3]

(176) 0x42206c LDR	X11, [X19, X10,LSL #3]

(176) 0x422070 CBZ	X11, 4222e8

(176) 0x422074 ADD	X3, X3, #8

(176) 0x422078 LDR	X12, [X3]

(176) 0x42207c LDR	X13, [X19, X12,LSL #3]

(176) 0x422080 CBNZ	X13, 42208c

(176) 0x422084 STR	X12, [X21, X2,LSL #3]

(176) 0x422088 ADD	X2, X2, #1

(176) 0x42208c ADD	X3, X3, #8

(176) 0x422090 CMP	X3, X22

(176) 0x422094 B.EQ	422148

  (177) 0x422098 LDR	X14, [X3]

  (177) 0x42209c LDR	X15, [X19, X14,LSL #3]

  (177) 0x4220a0 CBNZ	X15, 4220ac

  (177) 0x4220a4 STR	X14, [X21, X2,LSL #3]

  (177) 0x4220a8 ADD	X2, X2, #1

  (177) 0x4220ac LDR	X16, [X3, #8]

  (177) 0x4220b0 ADD	X3, X3, #8

  (177) 0x4220b4 LDR	X0, [X19, X16,LSL #3]

  (177) 0x4220b8 CBNZ	X0, 4220c4

  (177) 0x4220bc STR	X16, [X21, X2,LSL #3]

  (177) 0x4220c0 ADD	X2, X2, #1

  (177) 0x4220c4 LDR	X20, [X3, #8]

  (177) 0x4220c8 LDR	X23, [X19, X20,LSL #3]

  (177) 0x4220cc CBNZ	X23, 4220d8

  (177) 0x4220d0 STR	X20, [X21, X2,LSL #3]

  (177) 0x4220d4 ADD	X2, X2, #1

  (177) 0x4220d8 LDR	X26, [X3, #16]

  (177) 0x4220dc LDR	X1, [X19, X26,LSL #3]

  (177) 0x4220e0 CBNZ	X1, 4220ec

  (177) 0x4220e4 STR	X26, [X21, X2,LSL #3]

  (177) 0x4220e8 ADD	X2, X2, #1

  (177) 0x4220ec LDR	X6, [X3, #24]

  (177) 0x4220f0 LDR	X17, [X19, X6,LSL #3]

  (177) 0x4220f4 CBNZ	X17, 422100

  (177) 0x4220f8 STR	X6, [X21, X2,LSL #3]

  (177) 0x4220fc ADD	X2, X2, #1

  (177) 0x422100 LDR	X30, [X3, #32]

  (177) 0x422104 LDR	X24, [X19, X30,LSL #3]

  (177) 0x422108 CBNZ	X24, 422114

  (177) 0x42210c STR	X30, [X21, X2,LSL #3]

  (177) 0x422110 ADD	X2, X2, #1

  (177) 0x422114 LDR	X25, [X3, #40]

  (177) 0x422118 LDR	X4, [X19, X25,LSL #3]

  (177) 0x42211c CBNZ	X4, 422128

  (177) 0x422120 STR	X25, [X21, X2,LSL #3]

  (177) 0x422124 ADD	X2, X2, #1

  (177) 0x422128 LDR	X27, [X3, #48]

  (177) 0x42212c LDR	X28, [X19, X27,LSL #3]

  (177) 0x422130 CBNZ	X28, 42213c

  (177) 0x422134 STR	X27, [X21, X2,LSL #3]

  (177) 0x422138 ADD	X2, X2, #1

  (177) 0x42213c ADD	X3, X3, #56

  (177) 0x422140 CMP	X3, X22

  (177) 0x422144 B.NE	422098

(176) 0x422148 ADRP	X19,

(176) 0x42214c LDR	X21, [X19, #3848]

(176) 0x422150 LDR	X2, [SP, #152]

(176) 0x422154 LDR	X1, [X21]

(176) 0x422158 SUBS	X2, X2, X1

(176) 0x42215c MOVZ	X1, #0

(176) 0x422160 B.NE	4223f8

(176) 0x422164 LDP	X19, X20, [SP, #16]

(176) 0x422168 LDP	X21, X22, [SP, #32]

(176) 0x42216c LDP	X23, X24, [SP, #48]

(176) 0x422170 LDP	X25, X26, [SP, #64]

(176) 0x422174 LDP	X27, X28, [SP, #80]

(176) 0x422178 LDP	X29, X30, [SP], #160

(176) 0x42217c RET

  (167) 0x422180 LDR	X3, [X4, #8]

  (167) 0x422184 ADD	X16, X27, X14

  (167) 0x422188 ADD	X4, X4, #8

  (167) 0x42218c STR	XZR, [X25, X16,LSL #3]

  (167) 0x422190 LDR	X1, [X19, X3,LSL #3]

  (167) 0x422194 CBNZ	X1, 421d28

    (168) 0x422198 LDR	X17, [X4, #8]

    (168) 0x42219c ADD	X0, X0, #1

    (168) 0x4221a0 MOVZ	W2, #1

    (168) 0x4221a4 LDR	X30, [X19, X17,LSL #3]

    (168) 0x4221a8 CBNZ	X30, 421d3c

      (174) 0x4221ac LDR	X7, [X4, #16]

      (174) 0x4221b0 ADD	X0, X0, #1

      (174) 0x4221b4 MOVZ	W2, #1

      (174) 0x4221b8 LDR	X8, [X19, X7,LSL #3]

      (174) 0x4221bc CBNZ	X8, 421d50

    (168) 0x4221c0 LDR	X10, [X4, #24]

    (168) 0x4221c4 ADD	X0, X0, #1

    (168) 0x4221c8 MOVZ	W2, #1

    (168) 0x4221cc LDR	X11, [X19, X10,LSL #3]

    (168) 0x4221d0 CBNZ	X11, 421d64

          (172) 0x4221d4 LDR	X13, [X4, #32]

          (172) 0x4221d8 ADD	X0, X0, #1

          (172) 0x4221dc MOVZ	W2, #1

          (172) 0x4221e0 LDR	X14, [X19, X13,LSL #3]

          (172) 0x4221e4 CBNZ	X14, 421d78

    (168) 0x4221e8 LDR	X16, [X4, #40]

    (168) 0x4221ec ADD	X0, X0, #1

    (168) 0x4221f0 MOVZ	W2, #1

    (168) 0x4221f4 LDR	X3, [X19, X16,LSL #3]

    (168) 0x4221f8 CBNZ	X3, 421d8c

              (170) 0x4221fc LDR	X6, [X4, #48]

              (170) 0x422200 ADD	X0, X0, #1

              (170) 0x422204 MOVZ	W2, #1

              (170) 0x422208 LDR	X17, [X19, X6,LSL #3]

              (170) 0x42220c CBNZ	X17, 421da0

    (168) 0x422210 ADD	X0, X0, #1

    (168) 0x422214 MOVZ	W2, #1

    (168) 0x422218 B	421da8

(179) 0x42221c LDR	X30, [X1, #8]

(179) 0x422220 ADD	X1, X1, #8

(179) 0x422224 STR	XZR, [X25, X17,LSL #3]

(179) 0x422228 LDR	X2, [X20, X30,LSL #3]

(179) 0x42222c CBNZ	X2, 421b78

(179) 0x422230 LDR	X5, [X1, #8]

(179) 0x422234 ADD	X3, X3, #1

(179) 0x422238 MOVZ	W4, #1

(179) 0x42223c LDR	X0, [X20, X5,LSL #3]

(179) 0x422240 CBNZ	X0, 421b88

(179) 0x422244 LDR	X7, [X1, #16]

(179) 0x422248 ADD	X3, X3, #1

(179) 0x42224c MOVZ	W4, #1

(179) 0x422250 LDR	X8, [X20, X7,LSL #3]

(179) 0x422254 CBNZ	X8, 421b98

(179) 0x422258 LDR	X9, [X1, #24]

(179) 0x42225c ADD	X3, X3, #1

(179) 0x422260 MOVZ	W4, #1

(179) 0x422264 LDR	X10, [X20, X9,LSL #3]

(179) 0x422268 CBNZ	X10, 421ba8

(179) 0x42226c LDR	X11, [X1, #32]

(179) 0x422270 ADD	X3, X3, #1

(179) 0x422274 MOVZ	W4, #1

(179) 0x422278 LDR	X12, [X20, X11,LSL #3]

(179) 0x42227c CBNZ	X12, 421bb8

(179) 0x422280 LDR	X13, [X1, #40]

(179) 0x422284 ADD	X3, X3, #1

(179) 0x422288 MOVZ	W4, #1

(179) 0x42228c LDR	X14, [X20, X13,LSL #3]

(179) 0x422290 CBNZ	X14, 421bc8

(179) 0x422294 LDR	X15, [X1, #48]

(179) 0x422298 ADD	X3, X3, #1

(179) 0x42229c MOVZ	W4, #1

(179) 0x4222a0 LDR	X16, [X20, X15,LSL #3]

(179) 0x4222a4 CBNZ	X16, 421bd8

(179) 0x4222a8 ADD	X3, X3, #1

(179) 0x4222ac MOVZ	W4, #1

(179) 0x4222b0 B	421bdc

0x4222b4 ADD	X13, X27, X11

0x4222b8 STR	XZR, [X25, X13,LSL #3]

0x4222bc B	421cf8

0x4222c0 STR	XZR, [X25, X15]

0x4222c4 B	421b48

0x4222c8 ADD	X0, X0, #1

0x4222cc MOVZ	W2, #1

0x4222d0 ADD	X4, X4, #8

0x4222d4 B	421ce4

0x4222d8 ADD	X3, X3, #1

0x4222dc MOVZ	W4, #1

0x4222e0 ADD	X1, X1, #8

0x4222e4 B	421b30

(176) 0x4222e8 STR	X10, [X21, X2,LSL #3]

(176) 0x4222ec ADD	X2, X2, #1

(176) 0x4222f0 B	422074

(176) 0x4222f4 MOVZ	W3, #1

(176) 0x4222f8 STR	X6, [X23, X2,LSL #3]

(176) 0x4222fc ADD	X2, X2, #1

(176) 0x422300 B	421ea8

(176) 0x422304 STR	X8, [X21, X2,LSL #3]

(176) 0x422308 ADD	X2, X2, #1

(176) 0x42230c B	422064

0x422310 ADD	X0, X0, #1

0x422314 MOVZ	W2, #1

0x422318 ADD	X4, X4, #8

0x42231c B	421ccc

0x422320 ADD	X3, X3, #1

0x422324 MOVZ	W4, #1

0x422328 ADD	X1, X1, #8

0x42232c B	421b18

(176) 0x422330 MOVZ	W3, #1

(176) 0x422334 STR	X16, [X23, X2,LSL #3]

(176) 0x422338 ADD	X2, X2, #1

(176) 0x42233c B	421e98

0x422340 ADD	X0, X0, #1

0x422344 MOVZ	W2, #1

0x422348 ADD	X4, X4, #8

0x42234c B	421cb4

0x422350 ADD	X3, X3, #1

0x422354 MOVZ	W4, #1

0x422358 ADD	X1, X1, #8

0x42235c B	421b00

0x422360 ADD	X3, X3, #1

0x422364 MOVZ	W4, #1

0x422368 ADD	X1, X1, #8

0x42236c B	421ae8

0x422370 ADD	X0, X0, #1

0x422374 MOVZ	W2, #1

0x422378 ADD	X4, X4, #8

0x42237c B	421c9c

(176) 0x422380 MOVZ	W3, #1

(176) 0x422384 STR	X12, [X23, X2,LSL #3]

(176) 0x422388 ADD	X2, X2, #1

(176) 0x42238c B	421e6c

(176) 0x422390 STR	X28, [X21, X2,LSL #3]

(176) 0x422394 ADD	X2, X2, #1

(176) 0x422398 B	42203c

(176) 0x42239c MOVZ	W3, #1

(176) 0x4223a0 STR	X10, [X23, X2,LSL #3]

(176) 0x4223a4 ADD	X2, X2, #1

(176) 0x4223a8 B	421e5c

0x4223ac ADD	X3, X3, #1

0x4223b0 MOVZ	W4, #1

0x4223b4 ADD	X1, X1, #8

0x4223b8 B	421ad0

(176) 0x4223bc STR	X25, [X21, X2,LSL #3]

(176) 0x4223c0 ADD	X2, X2, #1

(176) 0x4223c4 B	42202c

0x4223c8 ADD	X0, X0, #1

0x4223cc MOVZ	W2, #1

0x4223d0 ADD	X4, X4, #8

0x4223d4 B	421c84

0x4223d8 ADD	X3, X3, #1

0x4223dc MOVZ	W4, #1

0x4223e0 ADD	X1, X1, #8

0x4223e4 B	421ab8

0x4223e8 ADD	X0, X0, #1

0x4223ec MOVZ	W2, #1

0x4223f0 ADD	X4, X4, #8

0x4223f4 B	421c6c

0x4223f8 BL	40f2e0

0x4223fc HINT	#0

Coverage (%)	Name	Source Location	Module

Path /

Average path: Display a virtual path defined by average values of all real paths

Source file and lines	par_coarsen.c:2516-2576
Module	exec

The function is defined in /home/hbollore/qaas-runs/171-233-5044/intel/AMG/build/AMG/AMG/parcsr_ls/par_coarsen.c:2516-2576.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. 4 data elements could be processed at once in vector registers. By vectorizing your function, you can lower the cost of an iteration from 28.00 to 7.00 cycles (4.00x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 28.00 to 1.50 cycles (18.67x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 392 bytes. The binary function is storing 240 bytes.

General properties

nb instructions	225
loop length	900
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

28.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	25.00	25.00	28.00	28.00	28.00	28.00	0.00	0.00	0.00	0.00	22.17	21.83	22.00	11.50	11.50
cycles	25.00	25.00	28.00	28.00	28.00	28.00	0.00	0.00	0.00	0.00	22.17	21.83	22.00	11.50	11.50

Execution ports to units layout:

P0:
P1:
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	28.00
Overall L1	28.00

Vectorization ratios

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 28.00 cycles. At this rate:

14% of peak load performance is reached (14.00 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
17% of peak store performance is reached (8.57 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 4219c8

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
ADRP X2, <54f9c8>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X29, X30, [SP, #864]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, SP, #128	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X3, [X2, #3848]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X24, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, SP, #120	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X4, [X3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X4, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVZ X4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X4, [X24, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STP XZR, XZR, [SP, #104]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDP X27, X20, [X24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X19, X25, [X24, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X26, X22, [X24, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X28, X23, [X24, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDR X2, [X4]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X21, [X24, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 5195a0 <hypre_GetSimpleThreadPartition>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X5, [X24, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X1, SP, #144	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, SP, #136	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X2, [X5]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 5195a0 <hypre_GetSimpleThreadPartition>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDP X1, X0, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
CMP X1, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GE 421bf0 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x228>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X1, X26, X1,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X3, [SP, #104]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X6, X26, X0,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X7, X6, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X8, X7, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM X9, X8, #3, #63	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X10, X9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ANDS X11, X10, #4224	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421b54 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x18c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X11, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421b30 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x168>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X11, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421b18 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x150>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X11, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421b00 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x138>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X11, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421ae8 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x120>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X11, #5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421ad0 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x108>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X11, #6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421ab8 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0xf0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X12, [X1]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
UBFM X13, X12, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X14, [X20, X13]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X14, 4223d8 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0xa10>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [X25, X13]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X15, [X1]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
UBFM X16, X15, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X17, [X20, X16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X17, 4223ac <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x9e4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [X25, X16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X18, [X1]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
UBFM X30, X18, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X2, [X20, X30]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X2, 422360 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x998>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [X25, X30]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X5, [X1]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
UBFM X0, X5, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X7, [X20, X0]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X7, 422350 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x988>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [X25, X0]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X8, [X1]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
UBFM X9, X8, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X10, [X20, X9]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X10, 422320 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x958>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [X25, X9]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X11, [X1]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
UBFM X12, X11, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X13, [X20, X12]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X13, 4222d8 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x910>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [X25, X12]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X14, [X1]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
UBFM X15, X14, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X16, [X20, X15]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBNZ X16, 4222c0 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x8f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X6, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421be8 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x220>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CBZ W4, 421bf0 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x228>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STR X3, [SP, #104]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDP X6, X17, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
CMP X6, X17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GE 421dbc <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x3f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X4, X22, X6,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W2, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X18, X22, X17,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X30, X18, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X5, X30, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM X0, X5, #3, #63	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X7, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X0, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ANDS X8, X7, #4224	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421d04 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x33c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421ce4 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x31c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X8, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421ccc <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x304>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X8, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421cb4 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x2ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X8, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421c9c <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x2d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X8, #5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421c84 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x2bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X8, #6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421c6c <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x2a4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X9, [X4]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X10, [X19, X9,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X10, 4223e8 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0xa20>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X11, X27, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [X25, X11,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X12, [X4]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X13, [X19, X12,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X13, 4223c8 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0xa00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X14, X27, X12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [X25, X14,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X15, [X4]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X16, [X19, X15,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X16, 422370 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x9a8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X3, X27, X15	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [X25, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X1, [X4]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X6, [X19, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X6, 422340 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x978>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X17, X27, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [X25, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X30, [X4]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X5, [X19, X30,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X5, 422310 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x948>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X7, X27, X30	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [X25, X7,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X8, [X4]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X19, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X9, 4222c8 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x900>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X10, X27, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [X25, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X11, [X4]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X12, [X19, X11,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBNZ X12, 4222b4 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x8ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X18, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421db4 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x3ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X13, X27, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [X25, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 421cf8 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x330>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STR XZR, [X25, X15]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 421b48 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x180>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 421ce4 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x31c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 421b30 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x168>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 421ccc <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x304>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 421b18 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x150>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 421cb4 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x2ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 421b00 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x138>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 421ae8 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x120>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 421c9c <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x2d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 421ad0 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x108>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 421c84 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x2bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 421ab8 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0xf0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 421c6c <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x2a4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
BL 40f2e0 <@plt_start@+0xf0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0

Source file and lines	par_coarsen.c:2516-2576
Module	exec

The function is defined in /home/hbollore/qaas-runs/171-233-5044/intel/AMG/build/AMG/AMG/parcsr_ls/par_coarsen.c:2516-2576.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 28.00 to 1.50 cycles (18.67x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 392 bytes. The binary function is storing 240 bytes.

General properties

nb instructions	225
loop length	900
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

28.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	25.00	25.00	28.00	28.00	28.00	28.00	0.00	0.00	0.00	0.00	22.17	21.83	22.00	11.50	11.50
cycles	25.00	25.00	28.00	28.00	28.00	28.00	0.00	0.00	0.00	0.00	22.17	21.83	22.00	11.50	11.50

Execution ports to units layout:

P0:
P1:
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	28.00
Overall L1	28.00

Vectorization ratios

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 28.00 cycles. At this rate:

14% of peak load performance is reached (14.00 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
17% of peak store performance is reached (8.57 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 4219c8

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
ADRP X2, <54f9c8>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X29, X30, [SP, #864]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, SP, #128	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X3, [X2, #3848]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ORR X24, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, SP, #120	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X4, [X3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X4, [SP, #152]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVZ X4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X4, [X24, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STP XZR, XZR, [SP, #104]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDP X27, X20, [X24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X19, X25, [X24, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X26, X22, [X24, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X28, X23, [X24, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDR X2, [X4]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X21, [X24, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 5195a0 <hypre_GetSimpleThreadPartition>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X5, [X24, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X1, SP, #144	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X0, SP, #136	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X2, [X5]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
BL 5195a0 <hypre_GetSimpleThreadPartition>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDP X1, X0, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
CMP X1, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GE 421bf0 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x228>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X1, X26, X1,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X3, [SP, #104]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X6, X26, X0,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X7, X6, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X8, X7, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM X9, X8, #3, #63	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X10, X9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ANDS X11, X10, #4224	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421b54 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x18c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X11, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421b30 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x168>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X11, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421b18 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x150>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X11, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421b00 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x138>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X11, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421ae8 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x120>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X11, #5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421ad0 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x108>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X11, #6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421ab8 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0xf0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X12, [X1]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
UBFM X13, X12, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X14, [X20, X13]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X14, 4223d8 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0xa10>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [X25, X13]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X15, [X1]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
UBFM X16, X15, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X17, [X20, X16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X17, 4223ac <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x9e4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [X25, X16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X18, [X1]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
UBFM X30, X18, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X2, [X20, X30]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X2, 422360 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x998>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [X25, X30]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X5, [X1]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
UBFM X0, X5, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X7, [X20, X0]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X7, 422350 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x988>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [X25, X0]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X8, [X1]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
UBFM X9, X8, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X10, [X20, X9]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X10, 422320 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x958>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [X25, X9]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X11, [X1]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
UBFM X12, X11, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X13, [X20, X12]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X13, 4222d8 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x910>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [X25, X12]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X14, [X1]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
UBFM X15, X14, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X16, [X20, X15]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBNZ X16, 4222c0 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x8f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X6, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421be8 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x220>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CBZ W4, 421bf0 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x228>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STR X3, [SP, #104]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDP X6, X17, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
CMP X6, X17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GE 421dbc <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x3f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X4, X22, X6,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W2, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X18, X22, X17,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X30, X18, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X5, X30, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM X0, X5, #3, #63	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X7, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X0, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ANDS X8, X7, #4224	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421d04 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x33c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421ce4 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x31c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X8, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421ccc <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x304>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X8, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421cb4 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x2ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X8, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421c9c <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x2d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X8, #5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421c84 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x2bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CMP X8, #6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421c6c <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x2a4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X9, [X4]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X10, [X19, X9,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X10, 4223e8 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0xa20>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X11, X27, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [X25, X11,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X12, [X4]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X13, [X19, X12,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X13, 4223c8 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0xa00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X14, X27, X12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [X25, X14,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X15, [X4]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X16, [X19, X15,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X16, 422370 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x9a8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X3, X27, X15	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [X25, X3,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X1, [X4]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X6, [X19, X1,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X6, 422340 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x978>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X17, X27, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [X25, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X30, [X4]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X5, [X19, X30,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X5, 422310 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x948>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X7, X27, X30	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [X25, X7,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X8, [X4]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X19, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X9, 4222c8 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x900>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X10, X27, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [X25, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X11, [X4]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X12, [X19, X11,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBNZ X12, 4222b4 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x8ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X18, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.EQ 421db4 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x3ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X13, X27, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR XZR, [X25, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 421cf8 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x330>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STR XZR, [X25, X15]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 421b48 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x180>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 421ce4 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x31c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 421b30 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x168>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 421ccc <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x304>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 421b18 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x150>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 421cb4 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x2ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 421b00 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x138>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 421ae8 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x120>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 421c9c <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x2d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 421ad0 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x108>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 421c84 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x2bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 421ab8 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0xf0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 421c6c <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x2a4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
BL 40f2e0 <@plt_start@+0xf0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0

Name	Coverage (%)	Time (s)
▼hypre_BoomerAMGCoarsenPMIS._omp_fn.8–	0.06	0.02
○Loop 179 - par_coarsen.c:2528-2540 - exec	0.04	0.01
▼Loop 176 - par_coarsen.c:2516-2576 - exec–	0	0
○Loop 178 - par_coarsen.c:2562-2567 - exec	0.03	0.01
○Loop 177 - par_coarsen.c:2571-2576 - exec	0	0
▼Loop 167 - par_coarsen.c:2544-2556 - exec–	0	0
▼Loop 175 - par_coarsen.c:2546-2556 - exec–	0	0
▼Loop 174 - par_coarsen.c:2546-2556 - exec–	0	0
▼Loop 173 - par_coarsen.c:2546-2556 - exec–	0	0
▼Loop 172 - par_coarsen.c:2546-2556 - exec–	0	0
▼Loop 171 - par_coarsen.c:2546-2556 - exec–	0	0
▼Loop 170 - par_coarsen.c:2546-2556 - exec–	0	0
○Loop 169 - par_coarsen.c:2552-2552 - exec	0	0
○Loop 168 - par_coarsen.c:2544-2556 - exec	0	0

Report Configuration

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code