OV - exec - Loop 205

	Loop Id: 205	Module: exec	Source: amg.c:794-1367 [...]	Coverage: 0.33%

0x411184 LDR	X8, [SP, #24]    [17]

0x411188 ORR	X13, XZR, X14

0x41118c CMP	X14, X8

0x411190 B.EQ	411ea0

0x411194 LDR	X15, [SP, #32]    [16]

0x411198 ADD	X14, X13, #1

0x41119c B	4111b4

0x4111a0 LDR	X8, [SP, #40]    [17]

0x4111a4 LDUR	X3, [X29, #488]    [14]

0x4111a8 ORR	X15, XZR, X17

0x4111ac CMP	X17, X8

0x4111b0 B.GE	411184

0x4111b4 LDUR	X9, [X29, #416]    [12]

0x4111b8 UBFM	X8, X10, #61, #60

0x4111bc ORR	X16, XZR, XZR

0x4111c0 ADD	X17, X15, #1

0x4111c4 ADD	X18, X8, #8

0x4111c8 ADD	X0, X9, X8

0x4111cc UBFM	X8, X12, #61, #60

0x4111d0 ADD	X1, X8, #8

0x4111d4 B	411258

0x4111d8 LDR	X30, [X7]    [68]

0x4111dc ADD	X8, X30, #1

0x4111e0 STR	X8, [X7]    [18]

0x4111e4 LDUR	X3, [X29, #448]    [14]

0x4111e8 LDR	X8, [X28]    [11]

0x4111ec LDR	X11, [X2]    [92]

0x4111f0 ADD	X8, X8, X1

0x4111f4 LDR	X3, [X3]    [78]

0x4111f8 LDR	X9, [X8, X16]    [96]

0x4111fc LDR	X5, [X3, X25,LSL #3]    [106]

0x411200 ADD	X11, X11, X5

0x411204 ADD	X9, X9, X11

0x411208 LDR	X11, [X27]    [6]

0x41120c STR	X9, [X3, X25,LSL #3]    [106]

0x411210 LDUR	X9, [X29, #480]    [14]

0x411214 ORR	X3, XZR, X4

0x411218 ADD	X11, X11, X18

0x41121c LDR	X9, [X9]    [90]

0x411220 ADD	X9, X10, X9

0x411224 ADD	X10, X10, #1

0x411228 ADD	X9, X9, #1

0x41122c STR	X9, [X11, X16]    [4]

0x411230 LDR	X9, [X2]    [92]

0x411234 LDR	X8, [X8, X16]    [96]

0x411238 ADD	X8, X8, X9

0x41123c LDR	X9, [X21]    [74]

0x411240 ADD	X9, X9, X18

0x411244 STR	X8, [X9, X16]    [54]

0x411248 LDUR	X8, [X29, #432]    [14]

0x41124c ADD	X16, X16, #8

0x411250 CMP	X4, X8

0x411254 B.GE	4111a0

0x411258 ADD	X2, X0, X16

0x41125c ADD	X12, X12, #1

0x411260 LDR	X4, [X2]    [19]

0x411264 ADD	X8, X4, #1

0x411268 STR	X8, [X2]    [19]

0x41126c LDUR	X8, [X29, #464]    [13]

0x411270 LDR	X11, [X19]    [32]

0x411274 LDR	X8, [X8]    [72]

0x411278 MADD	X8, X11, X8, XZR

0x41127c CMP	X13, X8

0x411280 B.LE	4112cc

0x411284 ADD	X8, X4, #2

0x411288 STR	X8, [X2]    [19]

0x41128c LDUR	X8, [X29, #496]    [13]

0x411290 LDR	X9, [X20]    [98]

0x411294 LDR	X8, [X8]    [84]

0x411298 MADD	X8, X9, X8, XZR

0x41129c CMP	X15, X8

0x4112a0 B.LE	41132c

0x4112a4 ADD	X8, X4, #3

0x4112a8 STR	X8, [X2]    [19]

0x4112ac LDR	X8, [X23]    [107]

0x4112b0 LDR	X9, [X22]    [105]

0x4112b4 MADD	X8, X9, X8, XZR

0x4112b8 CMP	X3, X8

0x4112bc B.LE	4113a4

0x4112c0 ADD	X8, X4, #4

0x4112c4 STR	X8, [X2]    [19]

0x4112c8 B	4113bc

0x4112cc CBZ	X13, 4117a0

0x4112d0 LDR	X6, [X28]    [8]

0x4112d4 LDUR	X8, [X29, #496]    [13]

0x4112d8 ADD	X4, X6, X1

0x4112dc LDR	X7, [X4, X16]    [23]

0x4112e0 ADD	X5, X7, #1

0x4112e4 STR	X5, [X4, X16]    [23]

0x4112e8 LDR	X8, [X8]    [84]

0x4112ec LDR	X11, [X20]    [98]

0x4112f0 MADD	X8, X11, X8, XZR

0x4112f4 CMP	X15, X8

0x4112f8 B.LE	411370

0x4112fc ADD	X5, X7, #2

0x411300 STR	X5, [X4, X16]    [23]

0x411304 CBNZ	X3, 41154c

0x411308 LDR	X30, [X23]    [107]

0x41130c LDR	X11, [X22]    [105]

0x411310 MADD	X8, X11, X30, XZR

0x411314 TBNZ	X8, #63, 41154c

0x411318 MADD	X8, X30, X11, X30

0x41131c SUB	X8, X8, #1

0x411320 CMP	X3, X8

0x411324 B.GE	41156c

0x411328 B	411608

0x41132c CBZ	X15, 4113fc

0x411330 LDR	X8, [X28]    [8]

0x411334 ADD	X9, X1, X16

0x411338 ADD	X4, X8, X9

0x41133c LDR	X6, [X4]    [94]

0x411340 ADD	X5, X6, #1

0x411344 STR	X5, [X4]    [94]

0x411348 CBNZ	X3, 411580

0x41134c LDR	X11, [X23]    [107]

0x411350 LDR	X8, [X22]    [105]

0x411354 MADD	X9, X8, X11, XZR

0x411358 TBNZ	X9, #63, 411580

0x41135c MADD	X8, X11, X8, X11

0x411360 SUB	X8, X8, #1

0x411364 CMP	X3, X8

0x411368 B.LT	4113f4

0x41136c B	4115a0

0x411370 CBZ	X15, 411610

0x411374 ADD	X5, X7, #2

0x411378 STR	X5, [X4, X16]    [23]

0x41137c CBNZ	X3, 4115d8

0x411380 LDR	X30, [X23]    [107]

0x411384 LDR	X11, [X22]    [105]

0x411388 MADD	X8, X11, X30, XZR

0x41138c TBNZ	X8, #63, 4115d8

0x411390 MADD	X8, X30, X11, X30

0x411394 SUB	X8, X8, #1

0x411398 CMP	X3, X8

0x41139c B.GE	4115f8

0x4113a0 B	411608

0x4113a4 CBZ	X3, 4113bc

0x4113a8 LDR	X8, [X28]    [8]

0x4113ac ADD	X8, X8, X1

0x4113b0 LDR	X9, [X8, X16]    [77]

0x4113b4 ADD	X9, X9, #1

0x4113b8 STR	X9, [X8, X16]    [77]

0x4113bc LDR	X8, [X23]    [107]

0x4113c0 LDR	X9, [X22]    [105]

0x4113c4 ORR	X4, XZR, X2

0x4113c8 MADD	X8, X8, X9, X8

0x4113cc SUB	X8, X8, #1

0x4113d0 CMP	X3, X8

0x4113d4 B.LT	4113f0

0x4113d8 LDR	X9, [X24]    [101]

0x4113dc ADD	X8, X3, #1

0x4113e0 CMP	X8, X9

0x4113e4 B.GE	4113fc

0x4113e8 LDR	X8, [X28]    [8]

0x4113ec ADD	X4, X8, X12,LSL #3

0x4113f0 LDR	X5, [X4]    [79]

0x4113f4 ADD	X8, X5, #1

0x4113f8 STR	X8, [X4]    [80]

0x4113fc LDR	X5, [X23]    [107]

0x411400 LDR	X11, [X22]    [105]

0x411404 MADD	X8, X11, X5, XZR

0x411408 CMP	X3, X8

0x41140c ORR	X8, XZR, X2

0x411410 B.GT	411420

0x411414 CBZ	X3, 411434

0x411418 LDR	X8, [X28]    [8]

0x41141c ADD	X8, X8, X12,LSL #3

0x411420 LDR	X9, [X8]    [102]

0x411424 ADD	X9, X9, #1

0x411428 STR	X9, [X8]    [102]

0x41142c LDR	X5, [X23]    [107]

0x411430 LDR	X11, [X22]    [105]

0x411434 MADD	X8, X5, X11, X5

0x411438 ADD	X4, X3, #1

0x41143c CMP	X4, X8

0x411440 ORR	X8, XZR, X2

0x411444 B.LT	41145c

0x411448 LDR	X8, [X24]    [101]

0x41144c CMP	X4, X8

0x411450 B.GE	411468

0x411454 LDR	X8, [X28]    [8]

0x411458 ADD	X8, X8, X12,LSL #3

0x41145c LDR	X9, [X8]    [26]

0x411460 ADD	X9, X9, #1

0x411464 STR	X9, [X8]    [26]

0x411468 LDUR	X8, [X29, #496]    [13]

0x41146c LDR	X9, [X20]    [98]

0x411470 LDR	X8, [X8]    [84]

0x411474 MADD	X8, X8, X9, X8

0x411478 CMP	X17, X8

0x41147c B.GE	4114ac

0x411480 LDR	X8, [X2]    [19]

0x411484 ADD	X9, X8, #1

0x411488 STR	X9, [X2]    [19]

0x41148c LDR	X9, [X23]    [107]

0x411490 LDR	X11, [X22]    [105]

0x411494 MADD	X9, X11, X9, XZR

0x411498 CMP	X3, X9

0x41149c B.LE	4114fc

0x4114a0 ADD	X8, X8, #2

0x4114a4 STR	X8, [X2]    [19]

0x4114a8 B	411514

0x4114ac LDUR	X8, [X29, #440]    [13]

0x4114b0 LDR	X8, [X8]    [104]

0x4114b4 CMP	X17, X8

0x4114b8 B.GE	4117a0

0x4114bc LDR	X8, [X28]    [8]

0x4114c0 ADD	X9, X1, X16

0x4114c4 ADD	X6, X8, X9

0x4114c8 LDR	X4, [X6]    [3]

0x4114cc ADD	X7, X4, #1

0x4114d0 STR	X7, [X6]    [3]

0x4114d4 CBNZ	X3, 4115b4

0x4114d8 LDR	X11, [X23]    [107]

0x4114dc LDR	X8, [X22]    [105]

0x4114e0 MADD	X9, X8, X11, XZR

0x4114e4 TBNZ	X9, #63, 4115b4

0x4114e8 MADD	X8, X11, X8, X11

0x4114ec SUB	X8, X8, #1

0x4114f0 CMP	X3, X8

0x4114f4 B.LT	41172c

0x4114f8 B	41171c

0x4114fc CBZ	X3, 411514

0x411500 LDR	X8, [X28]    [8]

0x411504 ADD	X8, X8, X1

0x411508 LDR	X9, [X8, X16]    [77]

0x41150c ADD	X9, X9, #1

0x411510 STR	X9, [X8, X16]    [77]

0x411514 LDR	X8, [X23]    [107]

0x411518 LDR	X9, [X22]    [105]

0x41151c ORR	X6, XZR, X2

0x411520 MADD	X8, X8, X9, X8

0x411524 SUB	X8, X8, #1

0x411528 CMP	X3, X8

0x41152c B.LT	411544

0x411530 LDR	X8, [X24]    [101]

0x411534 CMP	X4, X8

0x411538 B.GE	4117a0

0x41153c LDR	X8, [X28]    [8]

0x411540 ADD	X6, X8, X12,LSL #3

0x411544 LDR	X7, [X6]    [85]

0x411548 B	41172c

0x41154c ADD	X5, X7, #3

0x411550 STR	X5, [X4, X16]    [23]

0x411554 LDR	X30, [X23]    [107]

0x411558 LDR	X11, [X22]    [105]

0x41155c MADD	X8, X30, X11, X30

0x411560 SUB	X8, X8, #1

0x411564 CMP	X3, X8

0x411568 B.LT	411608

0x41156c LDR	X11, [X24]    [101]

0x411570 ADD	X8, X3, #1

0x411574 CMP	X8, X11

0x411578 B.LT	411608

0x41157c B	411610

0x411580 ADD	X5, X6, #2

0x411584 STR	X5, [X4]    [94]

0x411588 LDR	X11, [X23]    [107]

0x41158c LDR	X8, [X22]    [105]

0x411590 MADD	X8, X11, X8, X11

0x411594 SUB	X8, X8, #1

0x411598 CMP	X3, X8

0x41159c B.LT	4113f4

0x4115a0 LDR	X8, [X24]    [101]

0x4115a4 SUB	X8, X8, #1

0x4115a8 CMP	X3, X8

0x4115ac B.LT	4113f4

0x4115b0 B	4113fc

0x4115b4 ADD	X7, X4, #2

0x4115b8 STR	X7, [X6]    [3]

0x4115bc LDR	X11, [X23]    [107]

0x4115c0 LDR	X8, [X22]    [105]

0x4115c4 MADD	X8, X11, X8, X11

0x4115c8 SUB	X8, X8, #1

0x4115cc CMP	X3, X8

0x4115d0 B.LT	41172c

0x4115d4 B	41171c

0x4115d8 ADD	X5, X7, #3

0x4115dc STR	X5, [X4, X16]    [23]

0x4115e0 LDR	X30, [X23]    [107]

0x4115e4 LDR	X11, [X22]    [105]

0x4115e8 MADD	X8, X30, X11, X30

0x4115ec SUB	X8, X8, #1

0x4115f0 CMP	X3, X8

0x4115f4 B.LT	411608

0x4115f8 LDR	X8, [X24]    [101]

0x4115fc SUB	X8, X8, #1

0x411600 CMP	X3, X8

0x411604 B.GE	411610

0x411608 ADD	X5, X5, #1

0x41160c STR	X5, [X4, X16]    [23]

0x411610 CBNZ	X3, 411624

0x411614 LDR	X7, [X23]    [107]

0x411618 LDR	X11, [X22]    [105]

0x41161c MADD	X8, X11, X7, XZR

0x411620 TBZ	X8, #63, 411634

0x411624 ADD	X5, X5, #1

0x411628 STR	X5, [X4, X16]    [23]

0x41162c LDR	X7, [X23]    [107]

0x411630 LDR	X11, [X22]    [105]

0x411634 MADD	X8, X7, X11, X7

0x411638 LDR	X11, [X24]    [101]

0x41163c ADD	X30, X3, #1

0x411640 CMP	X30, X8

0x411644 CCMP	X30, X11, #8, #10

0x411648 B.GE	411654

0x41164c ADD	X5, X5, #1

0x411650 STR	X5, [X4, X16]    [23]

0x411654 LDUR	X8, [X29, #496]    [13]

0x411658 LDR	X11, [X20]    [98]

0x41165c ADD	X6, X6, X12,LSL #3

0x411660 LDR	X8, [X8]    [84]

0x411664 MADD	X8, X8, X11, X8

0x411668 CMP	X17, X8

0x41166c B.GE	4116bc

0x411670 ADD	X7, X5, #1

0x411674 STR	X7, [X4, X16]    [23]

0x411678 CBNZ	X3, 41168c

0x41167c LDR	X11, [X23]    [107]

0x411680 LDR	X8, [X22]    [105]

0x411684 MADD	X9, X8, X11, XZR

0x411688 TBZ	X9, #63, 41169c

0x41168c ADD	X7, X5, #2

0x411690 STR	X7, [X4, X16]    [23]

0x411694 LDR	X11, [X23]    [107]

0x411698 LDR	X8, [X22]    [105]

0x41169c MADD	X8, X11, X8, X11

0x4116a0 SUB	X8, X8, #1

0x4116a4 CMP	X3, X8

0x4116a8 B.LT	41172c

0x4116ac LDR	X8, [X24]    [101]

0x4116b0 CMP	X30, X8

0x4116b4 B.GE	4117a0

0x4116b8 B	41172c

0x4116bc LDUR	X8, [X29, #440]    [13]

0x4116c0 LDR	X8, [X8]    [104]

0x4116c4 CMP	X17, X8

0x4116c8 B.GE	4117a0

0x4116cc ADD	X7, X5, #1

0x4116d0 STR	X7, [X4, X16]    [23]

0x4116d4 CBNZ	X3, 4116fc

0x4116d8 LDR	X30, [X23]    [107]

0x4116dc LDR	X11, [X22]    [105]

0x4116e0 MADD	X8, X11, X30, XZR

0x4116e4 TBNZ	X8, #63, 4116fc

0x4116e8 MADD	X8, X30, X11, X30

0x4116ec SUB	X8, X8, #1

0x4116f0 CMP	X3, X8

0x4116f4 B.LT	41172c

0x4116f8 B	41171c

0x4116fc ADD	X7, X5, #2

0x411700 STR	X7, [X4, X16]    [23]

0x411704 LDR	X30, [X23]    [107]

0x411708 LDR	X11, [X22]    [105]

0x41170c MADD	X8, X30, X11, X30

0x411710 SUB	X8, X8, #1

0x411714 CMP	X3, X8

0x411718 B.LT	41172c

0x41171c LDR	X8, [X24]    [101]

0x411720 SUB	X8, X8, #1

0x411724 CMP	X3, X8

0x411728 B.GE	4117a0

0x41172c ADD	X8, X7, #1

0x411730 STR	X8, [X6]    [86]

0x411734 LDUR	X8, [X29, #496]    [13]

0x411738 LDR	X9, [X20]    [98]

0x41173c LDR	X8, [X8]    [84]

0x411740 MADD	X8, X9, X8, XZR

0x411744 CMP	X15, X8

0x411748 B.GT	4117b8

0x41174c CBZ	X15, 41183c

0x411750 LDR	X8, [X28]    [56]

0x411754 ADD	X9, X1, X16

0x411758 ADD	X4, X8, X9

0x41175c LDR	X6, [X4]    [66]

0x411760 ADD	X5, X6, #1

0x411764 STR	X5, [X4]    [66]

0x411768 CBNZ	X3, 411aec

0x41176c LDR	X11, [X23]    [42]

0x411770 LDR	X8, [X22]    [35]

0x411774 MADD	X9, X8, X11, XZR

0x411778 TBNZ	X9, #63, 411aec

0x41177c MADD	X8, X11, X8, X11

0x411780 SUB	X8, X8, #1

0x411784 CMP	X3, X8

0x411788 B.LT	411834

0x41178c B	411b0c

0x4117a0 LDUR	X8, [X29, #496]    [15]

0x4117a4 LDR	X9, [X20]    [100]

0x4117a8 LDR	X8, [X8]    [88]

0x4117ac MADD	X8, X9, X8, XZR

0x4117b0 CMP	X15, X8

0x4117b4 B.LE	41174c

0x4117b8 LDR	X8, [X2]    [93]

0x4117bc ADD	X9, X8, #1

0x4117c0 STR	X9, [X2]    [93]

0x4117c4 LDR	X9, [X23]    [41]

0x4117c8 LDR	X11, [X22]    [34]

0x4117cc MADD	X9, X11, X9, XZR

0x4117d0 CMP	X3, X9

0x4117d4 B.LE	4117e4

0x4117d8 ADD	X8, X8, #2

0x4117dc STR	X8, [X2]    [93]

0x4117e0 B	4117fc

0x4117e4 CBZ	X3, 4117fc

0x4117e8 LDR	X8, [X28]    [55]

0x4117ec ADD	X8, X8, X1

0x4117f0 LDR	X9, [X8, X16]    [2]

0x4117f4 ADD	X9, X9, #1

0x4117f8 STR	X9, [X8, X16]    [2]

0x4117fc LDR	X8, [X23]    [41]

0x411800 LDR	X9, [X22]    [34]

0x411804 ORR	X4, XZR, X2

0x411808 MADD	X8, X8, X9, X8

0x41180c SUB	X8, X8, #1

0x411810 CMP	X3, X8

0x411814 B.LT	411830

0x411818 LDR	X9, [X24]    [103]

0x41181c ADD	X8, X3, #1

0x411820 CMP	X8, X9

0x411824 B.GE	41183c

0x411828 LDR	X8, [X28]    [55]

0x41182c ADD	X4, X8, X12,LSL #3

0x411830 LDR	X5, [X4]    [82]

0x411834 ADD	X8, X5, #1

0x411838 STR	X8, [X4]    [10]

0x41183c LDR	X5, [X23]    [43]

0x411840 LDR	X11, [X22]    [36]

0x411844 MADD	X8, X11, X5, XZR

0x411848 CMP	X3, X8

0x41184c ORR	X8, XZR, X2

0x411850 B.GT	411860

0x411854 CBZ	X3, 411874

0x411858 LDR	X8, [X28]    [57]

0x41185c ADD	X8, X8, X12,LSL #3

0x411860 LDR	X9, [X8]    [76]

0x411864 ADD	X9, X9, #1

0x411868 STR	X9, [X8]    [76]

0x41186c LDR	X5, [X23]    [43]

0x411870 LDR	X11, [X22]    [36]

0x411874 MADD	X8, X5, X11, X5

0x411878 ADD	X4, X3, #1

0x41187c CMP	X4, X8

0x411880 ORR	X8, XZR, X2

0x411884 B.LT	41189c

0x411888 LDR	X8, [X24]    [28]

0x41188c CMP	X4, X8

0x411890 B.GE	411920

0x411894 LDR	X8, [X28]    [57]

0x411898 ADD	X8, X8, X12,LSL #3

0x41189c LDR	X9, [X8]    [108]

0x4118a0 ADD	X9, X9, #1

0x4118a4 STR	X9, [X8]    [108]

0x4118a8 LDUR	X8, [X29, #496]    [61]

0x4118ac LDR	X9, [X20]    [21]

0x4118b0 LDR	X8, [X8]    [49]

0x4118b4 MADD	X8, X8, X9, X8

0x4118b8 CMP	X17, X8

0x4118bc B.LT	411938

0x4118c0 LDUR	X8, [X29, #440]    [63]

0x4118c4 LDR	X8, [X8]    [91]

0x4118c8 CMP	X17, X8

0x4118cc B.GE	4119b8

0x4118d0 LDR	X8, [X28]    [59]

0x4118d4 ADD	X9, X1, X16

0x4118d8 ADD	X5, X8, X9

0x4118dc LDR	X7, [X5]    [89]

0x4118e0 ADD	X6, X7, #1

0x4118e4 STR	X6, [X5]    [89]

0x4118e8 CBNZ	X3, 411b20

0x4118ec LDR	X11, [X23]    [46]

0x4118f0 LDR	X8, [X22]    [38]

0x4118f4 MADD	X9, X8, X11, XZR

0x4118f8 TBNZ	X9, #63, 411b20

0x4118fc MADD	X8, X11, X8, X11

0x411900 SUB	X8, X8, #1

0x411904 CMP	X3, X8

0x411908 B.LT	4119b0

0x41190c B	411b40

0x411920 LDUR	X8, [X29, #496]    [62]

0x411924 LDR	X9, [X20]    [22]

0x411928 LDR	X8, [X8]    [1]

0x41192c MADD	X8, X8, X9, X8

0x411930 CMP	X17, X8

0x411934 B.GE	4118c0

0x411938 LDR	X8, [X2]    [109]

0x41193c ADD	X9, X8, #1

0x411940 STR	X9, [X2]    [109]

0x411944 LDR	X9, [X23]    [45]

0x411948 LDR	X11, [X22]    [37]

0x41194c MADD	X9, X11, X9, XZR

0x411950 CMP	X3, X9

0x411954 B.LE	411964

0x411958 ADD	X8, X8, #2

0x41195c STR	X8, [X2]    [109]

0x411960 B	41197c

0x411964 CBZ	X3, 41197c

0x411968 LDR	X8, [X28]    [58]

0x41196c ADD	X8, X8, X1

0x411970 LDR	X9, [X8, X16]    [9]

0x411974 ADD	X9, X9, #1

0x411978 STR	X9, [X8, X16]    [9]

0x41197c LDR	X8, [X23]    [45]

0x411980 LDR	X9, [X22]    [37]

0x411984 ORR	X5, XZR, X2

0x411988 MADD	X8, X8, X9, X8

0x41198c SUB	X8, X8, #1

0x411990 CMP	X3, X8

0x411994 B.LT	4119ac

0x411998 LDR	X8, [X24]    [29]

0x41199c CMP	X4, X8

0x4119a0 B.GE	4119b8

0x4119a4 LDR	X8, [X28]    [58]

0x4119a8 ADD	X5, X8, X12,LSL #3

0x4119ac LDR	X6, [X5]    [5]

0x4119b0 ADD	X8, X6, #1

0x4119b4 STR	X8, [X5]    [53]

0x4119b8 LDUR	X8, [X29, #464]    [64]

0x4119bc LDR	X9, [X19]    [71]

0x4119c0 LDR	X8, [X8]    [99]

0x4119c4 MADD	X8, X8, X9, X8

0x4119c8 CMP	X14, X8

0x4119cc B.GE	411a20

0x4119d0 LDR	X8, [X2]    [110]

0x4119d4 ADD	X9, X8, #1

0x4119d8 STR	X9, [X2]    [110]

0x4119dc LDUR	X9, [X29, #496]    [64]

0x4119e0 LDR	X11, [X20]    [24]

0x4119e4 LDR	X9, [X9]    [7]

0x4119e8 MADD	X9, X11, X9, XZR

0x4119ec CMP	X15, X9

0x4119f0 B.LE	411aa8

0x4119f4 ADD	X9, X8, #2

0x4119f8 STR	X9, [X2]    [110]

0x4119fc LDR	X9, [X23]    [47]

0x411a00 LDR	X11, [X22]    [39]

0x411a04 MADD	X9, X11, X9, XZR

0x411a08 CMP	X3, X9

0x411a0c B.LE	411b54

0x411a10 ADD	X8, X8, #3

0x411a14 STR	X8, [X2]    [110]

0x411a18 B	411b6c

0x411a20 LDR	X8, [SP, #80]    [67]

0x411a24 LDR	X8, [X8]    [50]

0x411a28 CMP	X14, X8

0x411a2c B.GE	4111e4

0x411a30 LDR	X7, [X28]    [83]

0x411a34 LDUR	X8, [X29, #496]    [65]

0x411a38 ADD	X5, X7, X1

0x411a3c LDR	X30, [X5, X16]    [87]

0x411a40 ADD	X6, X30, #1

0x411a44 STR	X6, [X5, X16]    [87]

0x411a48 LDR	X8, [X8]    [81]

0x411a4c LDR	X9, [X20]    [25]

0x411a50 MADD	X8, X9, X8, XZR

0x411a54 CMP	X15, X8

0x411a58 B.LE	411ca8

0x411a5c ADD	X6, X30, #2

0x411a60 STR	X6, [X5, X16]    [87]

0x411a64 CBNZ	X3, 411a78

0x411a68 LDR	X11, [X23]    [48]

0x411a6c LDR	X8, [X22]    [40]

0x411a70 MADD	X9, X8, X11, XZR

0x411a74 TBZ	X9, #63, 411a88

0x411a78 ADD	X6, X30, #3

0x411a7c STR	X6, [X5, X16]    [87]

0x411a80 LDR	X11, [X23]    [48]

0x411a84 LDR	X8, [X22]    [40]

0x411a88 MADD	X8, X11, X8, X11

0x411a8c SUB	X8, X8, #1

0x411a90 CMP	X3, X8

0x411a94 B.LT	411d8c

0x411a98 LDR	X8, [X24]    [33]

0x411a9c CMP	X4, X8

0x411aa0 B.GE	411d94

0x411aa4 B	411d8c

0x411aa8 CBZ	X15, 411ba8

0x411aac LDR	X8, [X28]    [60]

0x411ab0 ADD	X9, X1, X16

0x411ab4 ADD	X5, X8, X9

0x411ab8 LDR	X7, [X5]    [69]

0x411abc ADD	X6, X7, #1

0x411ac0 STR	X6, [X5]    [69]

0x411ac4 CBNZ	X3, 411d28

0x411ac8 LDR	X11, [X23]    [47]

0x411acc LDR	X8, [X22]    [39]

0x411ad0 MADD	X9, X8, X11, XZR

0x411ad4 TBNZ	X9, #63, 411d28

0x411ad8 MADD	X8, X11, X8, X11

0x411adc SUB	X8, X8, #1

0x411ae0 CMP	X3, X8

0x411ae4 B.LT	411ba0

0x411ae8 B	411d48

0x411aec ADD	X5, X6, #2

0x411af0 STR	X5, [X4]    [66]

0x411af4 LDR	X11, [X23]    [42]

0x411af8 LDR	X8, [X22]    [35]

0x411afc MADD	X8, X11, X8, X11

0x411b00 SUB	X8, X8, #1

0x411b04 CMP	X3, X8

0x411b08 B.LT	411834

0x411b0c LDR	X8, [X24]    [27]

0x411b10 SUB	X8, X8, #1

0x411b14 CMP	X3, X8

0x411b18 B.LT	411834

0x411b1c B	41183c

0x411b20 ADD	X6, X7, #2

0x411b24 STR	X6, [X5]    [89]

0x411b28 LDR	X11, [X23]    [46]

0x411b2c LDR	X8, [X22]    [38]

0x411b30 MADD	X8, X11, X8, X11

0x411b34 SUB	X8, X8, #1

0x411b38 CMP	X3, X8

0x411b3c B.LT	4119b0

0x411b40 LDR	X8, [X24]    [30]

0x411b44 SUB	X8, X8, #1

0x411b48 CMP	X3, X8

0x411b4c B.LT	4119b0

0x411b50 B	4119b8

0x411b54 CBZ	X3, 411b6c

0x411b58 LDR	X8, [X28]    [60]

0x411b5c ADD	X8, X8, X1

0x411b60 LDR	X9, [X8, X16]    [44]

0x411b64 ADD	X9, X9, #1

0x411b68 STR	X9, [X8, X16]    [44]

0x411b6c LDR	X8, [X23]    [47]

0x411b70 LDR	X9, [X22]    [39]

0x411b74 ORR	X5, XZR, X2

0x411b78 MADD	X8, X8, X9, X8

0x411b7c SUB	X8, X8, #1

0x411b80 CMP	X3, X8

0x411b84 B.LT	411b9c

0x411b88 LDR	X8, [X24]    [31]

0x411b8c CMP	X4, X8

0x411b90 B.GE	411ba8

0x411b94 LDR	X8, [X28]    [60]

0x411b98 ADD	X5, X8, X12,LSL #3

0x411b9c LDR	X6, [X5]    [51]

0x411ba0 ADD	X8, X6, #1

0x411ba4 STR	X8, [X5]    [52]

0x411ba8 LDR	X5, [X23]    [47]

0x411bac LDR	X11, [X22]    [39]

0x411bb0 MADD	X8, X11, X5, XZR

0x411bb4 CMP	X3, X8

0x411bb8 ORR	X8, XZR, X2

0x411bbc B.GT	411bcc

0x411bc0 CBZ	X3, 411be0

0x411bc4 LDR	X8, [X28]    [60]

0x411bc8 ADD	X8, X8, X12,LSL #3

0x411bcc LDR	X9, [X8]    [95]

0x411bd0 ADD	X9, X9, #1

0x411bd4 STR	X9, [X8]    [95]

0x411bd8 LDR	X5, [X23]    [47]

0x411bdc LDR	X11, [X22]    [39]

0x411be0 MADD	X8, X5, X11, X5

0x411be4 CMP	X4, X8

0x411be8 ORR	X8, XZR, X2

0x411bec B.LT	411c04

0x411bf0 LDR	X8, [X24]    [31]

0x411bf4 CMP	X4, X8

0x411bf8 B.GE	411c10

0x411bfc LDR	X8, [X28]    [60]

0x411c00 ADD	X8, X8, X12,LSL #3

0x411c04 LDR	X9, [X8]    [20]

0x411c08 ADD	X9, X9, #1

0x411c0c STR	X9, [X8]    [20]

0x411c10 LDUR	X8, [X29, #496]    [64]

0x411c14 LDR	X9, [X20]    [24]

0x411c18 LDR	X8, [X8]    [7]

0x411c1c MADD	X8, X8, X9, X8

0x411c20 CMP	X17, X8

0x411c24 B.GE	411c60

0x411c28 LDR	X8, [X2]    [110]

0x411c2c ADD	X9, X8, #1

0x411c30 STR	X9, [X2]    [110]

0x411c34 LDR	X9, [X23]    [47]

0x411c38 LDR	X11, [X22]    [39]

0x411c3c MADD	X9, X11, X9, XZR

0x411c40 CMP	X3, X9

0x411c44 B.LE	411cdc

0x411c48 ADD	X8, X8, #2

0x411c4c STR	X8, [X2]    [110]

0x411c50 B	411cf4

0x411ca8 CBZ	X15, 411d94

0x411cac ADD	X6, X30, #2

0x411cb0 STR	X6, [X5, X16]    [87]

0x411cb4 CBNZ	X3, 411d5c

0x411cb8 LDR	X11, [X23]    [48]

0x411cbc LDR	X8, [X22]    [40]

0x411cc0 MADD	X9, X8, X11, XZR

0x411cc4 TBNZ	X9, #63, 411d5c

0x411cc8 MADD	X8, X11, X8, X11

0x411ccc SUB	X8, X8, #1

0x411cd0 CMP	X3, X8

0x411cd4 B.GE	411d7c

0x411cd8 B	411d8c

0x411cdc CBZ	X3, 411cf4

0x411ce0 LDR	X8, [X28]    [60]

0x411ce4 ADD	X8, X8, X1

0x411ce8 LDR	X9, [X8, X16]    [44]

0x411cec ADD	X9, X9, #1

0x411cf0 STR	X9, [X8, X16]    [44]

0x411cf4 LDR	X8, [X23]    [47]

0x411cf8 LDR	X9, [X22]    [39]

0x411cfc ORR	X7, XZR, X2

0x411d00 MADD	X8, X8, X9, X8

0x411d04 SUB	X8, X8, #1

0x411d08 CMP	X3, X8

0x411d0c B.LT	4111d8

0x411d10 LDR	X8, [X24]    [31]

0x411d14 CMP	X4, X8

0x411d18 B.GE	4111e4

0x411d1c LDR	X8, [X28]    [60]

0x411d20 ADD	X7, X8, X12,LSL #3

0x411d24 B	4111d8

0x411d28 ADD	X6, X7, #2

0x411d2c STR	X6, [X5]    [69]

0x411d30 LDR	X11, [X23]    [47]

0x411d34 LDR	X8, [X22]    [39]

0x411d38 MADD	X8, X11, X8, X11

0x411d3c SUB	X8, X8, #1

0x411d40 CMP	X3, X8

0x411d44 B.LT	411ba0

0x411d48 LDR	X8, [X24]    [31]

0x411d4c SUB	X8, X8, #1

0x411d50 CMP	X3, X8

0x411d54 B.LT	411ba0

0x411d58 B	411ba8

0x411d5c ADD	X6, X30, #3

0x411d60 STR	X6, [X5, X16]    [87]

0x411d64 LDR	X11, [X23]    [48]

0x411d68 LDR	X8, [X22]    [40]

0x411d6c MADD	X8, X11, X8, X11

0x411d70 SUB	X8, X8, #1

0x411d74 CMP	X3, X8

0x411d78 B.LT	411d8c

0x411d7c LDR	X8, [X24]    [33]

0x411d80 SUB	X8, X8, #1

0x411d84 CMP	X3, X8

0x411d88 B.GE	411d94

0x411d8c ADD	X6, X6, #1

0x411d90 STR	X6, [X5, X16]    [87]

0x411d94 CBNZ	X3, 411da8

0x411d98 LDR	X11, [X23]    [48]

0x411d9c LDR	X8, [X22]    [40]

0x411da0 MADD	X9, X8, X11, XZR

0x411da4 TBZ	X9, #63, 411db8

0x411da8 ADD	X6, X6, #1

0x411dac STR	X6, [X5, X16]    [87]

0x411db0 LDR	X11, [X23]    [48]

0x411db4 LDR	X8, [X22]    [40]

0x411db8 MADD	X8, X11, X8, X11

0x411dbc CMP	X4, X8

0x411dc0 B.LT	411dd0

0x411dc4 LDR	X8, [X24]    [33]

0x411dc8 CMP	X4, X8

0x411dcc B.GE	411dd8

0x411dd0 ADD	X6, X6, #1

0x411dd4 STR	X6, [X5, X16]    [87]

0x411dd8 LDUR	X8, [X29, #496]    [65]

0x411ddc LDR	X9, [X20]    [25]

0x411de0 ADD	X7, X7, X12,LSL #3

0x411de4 LDR	X8, [X8]    [81]

0x411de8 MADD	X8, X8, X9, X8

0x411dec CMP	X17, X8

0x411df0 B.GE	411e40

0x411df4 ADD	X30, X6, #1

0x411df8 STR	X30, [X5, X16]    [87]

0x411dfc CBNZ	X3, 411e10

0x411e00 LDR	X11, [X23]    [48]

0x411e04 LDR	X8, [X22]    [40]

0x411e08 MADD	X9, X8, X11, XZR

0x411e0c TBZ	X9, #63, 411e20

0x411e10 ADD	X30, X6, #2

0x411e14 STR	X30, [X5, X16]    [87]

0x411e18 LDR	X11, [X23]    [48]

0x411e1c LDR	X8, [X22]    [40]

0x411e20 MADD	X8, X11, X8, X11

0x411e24 SUB	X8, X8, #1

0x411e28 CMP	X3, X8

0x411e2c B.LT	4111dc

0x411e30 LDR	X8, [X24]    [33]

0x411e34 CMP	X4, X8

0x411e38 B.GE	4111e4

0x411e3c B	4111dc

0x411e40 LDUR	X8, [X29, #440]    [65]

0x411e44 LDR	X8, [X8]    [97]

0x411e48 CMP	X17, X8

0x411e4c B.GE	4111e4

0x411e50 ADD	X30, X6, #1

0x411e54 STR	X30, [X5, X16]    [87]

0x411e58 CBNZ	X3, 411e6c

0x411e5c LDR	X11, [X23]    [48]

0x411e60 LDR	X8, [X22]    [40]

0x411e64 MADD	X9, X8, X11, XZR

0x411e68 TBZ	X9, #63, 411e7c

0x411e6c ADD	X30, X6, #2

0x411e70 STR	X30, [X5, X16]    [87]

0x411e74 LDR	X11, [X23]    [75]

0x411e78 LDR	X8, [X22]    [73]

0x411e7c MADD	X8, X11, X8, X11

0x411e80 SUB	X8, X8, #1

0x411e84 CMP	X3, X8

0x411e88 B.LT	4111dc

0x411e8c LDR	X8, [X24]    [70]

0x411e90 SUB	X8, X8, #1

0x411e94 CMP	X3, X8

0x411e98 B.LT	4111dc

0x411e9c B	4111e4

/home/hbollore/qaas-runs/171-233-5044/intel/AMG/build/AMG/AMG/test/amg.c: 794 - 1367

--------------------------------------------------------------------------------

794:     for (iz = iz_start;  iz < iz_end; iz++)

795:     {

796:       for (iy = iy_start;  iy < iy_end; iy++)

797:       {

798:          for (ix = ix_start; ix < ix_end; ix++)

799:          {

800:             cnt++;

801:             o_cnt++;

802:             diag_i[cnt]++;

803:             if (iz > nz*pz)

804:             {

805:                diag_i[cnt]++;

806:                if (iy > ny*py)

807:                {

808:                   diag_i[cnt]++;

809:       	          if (ix > nx*px)

810:       	          {

811:       	             diag_i[cnt]++;

812:       	          }

813:       	          else

814:       	          {

815:       	             if (ix)

816:       		        offd_i[o_cnt]++;

817:       	          }

818:       	          if (ix < nx*(px+1)-1)

[...]

824:       	             if (ix+1 < nx_global)

825:       		        offd_i[o_cnt]++;

826:       	          }

827:                }

828:                else

829:                {

830:                   if (iy)

831:                   {

832:                      offd_i[o_cnt]++;

833:       	             if (ix > nx*px)

[...]

841:       	             if (ix < nx*(px+1)-1)

842:       	             {

843:       	                offd_i[o_cnt]++;

844:       	             }

845:       	             else if (ix < nx_global-1)

[...]

851:                if (ix > nx*px)

852:                   diag_i[cnt]++;

853:                else

854:                {

855:                   if (ix)

856:                   {

857:                      offd_i[o_cnt]++;

858:                   }

859:                }

860:                if (ix+1 < nx*(px+1))

861:                   diag_i[cnt]++;

862:                else

863:                {

864:                   if (ix+1 < nx_global)

865:                   {

866:                      offd_i[o_cnt]++;

867:                   }

868:                }

869:                if (iy+1 < ny*(py+1))

870:                {

871:                   diag_i[cnt]++;

872:       	          if (ix > nx*px)

873:       	          {

874:       	             diag_i[cnt]++;

875:       	          }

876:       	          else

877:       	          {

878:       	             if (ix)

879:       		        offd_i[o_cnt]++;

880:       	          }

881:       	          if (ix < nx*(px+1)-1)

[...]

887:       	             if (ix+1 < nx_global)

888:       		        offd_i[o_cnt]++;

889:       	          }

890:                }

891:                else

892:                {

893:                   if (iy+1 < ny_global)

894:                   {

895:                      offd_i[o_cnt]++;

896:       	             if (ix > nx*px)

[...]

904:       	             if (ix < nx*(px+1)-1)

[...]

917:                if (iz)

918: 	       {

919: 		  offd_i[o_cnt]++;

920:                   if (iy > ny*py)

921:                   {

922:                      offd_i[o_cnt]++;

923:       	             if (ix > nx*px)

[...]

932:       	             if (ix < nx*(px+1)-1)

[...]

938:       	                if (ix+1 < nx_global)

[...]

944:                      if (iy)

945:                      {

946:                         offd_i[o_cnt]++;

947:       	                if (ix > nx*px)

[...]

955:       	                if (ix < nx*(px+1)-1)

956:       	                {

957:       	                   offd_i[o_cnt]++;

958:       	                }

959:       	                else if (ix < nx_global-1)

[...]

965:                   if (ix > nx*px)

[...]

974:                   if (ix+1 < nx*(px+1))

[...]

983:                   if (iy+1 < ny*(py+1))

984:                   {

985:                      offd_i[o_cnt]++;

986:       	             if (ix > nx*px)

[...]

995:       	             if (ix < nx*(px+1)-1)

[...]

1007:                      if (iy+1 < ny_global)

1008:                      {

1009:                         offd_i[o_cnt]++;

1010:       	                if (ix > nx*px)

[...]

1018:       	                if (ix < nx*(px+1)-1)

[...]

1030:             if (iy > ny*py)

1031:             {

1032:                diag_i[cnt]++;

1033:    	       if (ix > nx*px)

1034:    	       {

1035:    	          diag_i[cnt]++;

1036:    	       }

1037:    	       else

1038:    	       {

1039:    	          if (ix)

1040:    		     offd_i[o_cnt]++;

1041:    	       }

1042:    	       if (ix < nx*(px+1)-1)

[...]

1048:    	          if (ix+1 < nx_global)

1049:    		     offd_i[o_cnt]++;

1050:    	       }

1051:             }

1052:             else

1053:             {

1054:                if (iy)

1055:                {

1056:                   offd_i[o_cnt]++;

1057:    	          if (ix > nx*px)

[...]

1065:    	          if (ix < nx*(px+1)-1)

1066:    	          {

1067:    	             offd_i[o_cnt]++;

1068:    	          }

1069:    	          else if (ix < nx_global-1)

[...]

1075:             if (ix > nx*px)

1076:                diag_i[cnt]++;

1077:             else

1078:             {

1079:                if (ix)

1080:                {

1081:                   offd_i[o_cnt]++;

1082:                }

1083:             }

1084:             if (ix+1 < nx*(px+1))

1085:                diag_i[cnt]++;

1086:             else

1087:             {

1088:                if (ix+1 < nx_global)

1089:                {

1090:                   offd_i[o_cnt]++;

1091:                }

1092:             }

1093:             if (iy+1 < ny*(py+1))

1094:             {

1095:                diag_i[cnt]++;

1096:    	       if (ix > nx*px)

1097:    	       {

1098:    	          diag_i[cnt]++;

1099:    	       }

1100:    	       else

1101:    	       {

1102:    	          if (ix)

1103:    		     offd_i[o_cnt]++;

1104:    	       }

1105:    	       if (ix < nx*(px+1)-1)

[...]

1111:    	          if (ix+1 < nx_global)

1112:    		     offd_i[o_cnt]++;

1113:    	       }

1114:             }

1115:             else

1116:             {

1117:                if (iy+1 < ny_global)

1118:                {

1119:                   offd_i[o_cnt]++;

1120:    	          if (ix > nx*px)

[...]

1128:    	          if (ix < nx*(px+1)-1)

1129:    	          {

1130:    	             offd_i[o_cnt]++;

1131:    	          }

1132:    	          else if (ix < nx_global-1)

[...]

1138:             if (iz+1 < nz*(pz+1))

1139:             {

1140:                diag_i[cnt]++;

1141:                if (iy > ny*py)

1142:                {

1143:                   diag_i[cnt]++;

1144:       	          if (ix > nx*px)

1145:       	          {

1146:       	             diag_i[cnt]++;

1147:       	          }

1148:       	          else

1149:       	          {

1150:       	             if (ix)

1151:       		        offd_i[o_cnt]++;

1152:       	          }

1153:       	          if (ix < nx*(px+1)-1)

[...]

1159:       	             if (ix+1 < nx_global)

1160:       		        offd_i[o_cnt]++;

1161:       	          }

1162:                }

1163:                else

1164:                {

1165:                   if (iy)

1166:                   {

1167:                      offd_i[o_cnt]++;

1168:       	             if (ix > nx*px)

[...]

1176:       	             if (ix < nx*(px+1)-1)

1177:       	             {

1178:       	                offd_i[o_cnt]++;

1179:       	             }

1180:       	             else if (ix < nx_global-1)

[...]

1186:                if (ix > nx*px)

1187:                   diag_i[cnt]++;

1188:                else

1189:                {

1190:                   if (ix)

1191:                   {

1192:                      offd_i[o_cnt]++;

1193:                   }

1194:                }

1195:                if (ix+1 < nx*(px+1))

1196:                   diag_i[cnt]++;

1197:                else

1198:                {

1199:                   if (ix+1 < nx_global)

1200:                   {

1201:                      offd_i[o_cnt]++;

1202:                   }

1203:                }

1204:                if (iy+1 < ny*(py+1))

1205:                {

1206:                   diag_i[cnt]++;

1207:       	          if (ix > nx*px)

1208:       	          {

1209:       	             diag_i[cnt]++;

1210:       	          }

1211:       	          else

1212:       	          {

1213:       	             if (ix)

1214:       		        offd_i[o_cnt]++;

1215:       	          }

1216:       	          if (ix < nx*(px+1)-1)

[...]

1222:       	             if (ix+1 < nx_global)

1223:       		        offd_i[o_cnt]++;

[...]

1252:                if (iz+1 < nz_global)

1253: 	       {

1254: 		  offd_i[o_cnt]++;

1255:                   if (iy > ny*py)

1256:                   {

1257:                      offd_i[o_cnt]++;

1258:       	             if (ix > nx*px)

[...]

1267:       	             if (ix < nx*(px+1)-1)

[...]

1279:                      if (iy)

1280:                      {

1281:                         offd_i[o_cnt]++;

1282:       	                if (ix > nx*px)

[...]

1290:       	                if (ix < nx*(px+1)-1)

1291:       	                {

1292:       	                   offd_i[o_cnt]++;

1293:       	                }

1294:       	                else if (ix < nx_global-1)

[...]

1300:                   if (ix > nx*px)

[...]

1309:                   if (ix+1 < nx*(px+1))

[...]

1318:                   if (iy+1 < ny*(py+1))

1319:                   {

1320:                      offd_i[o_cnt]++;

1321:       	             if (ix > nx*px)

[...]

1330:       	             if (ix < nx*(px+1)-1)

[...]

1342:                      if (iy+1 < ny_global)

1343:                      {

1344:                         offd_i[o_cnt]++;

1345:       	                if (ix > nx*px)

[...]

1365:             nnz[my_thread] += diag_i[cnt]+offd_i[o_cnt];

1366:             row_nums[cnt] = row_index+cnt;

1367:             num_cols[cnt] = diag_i[cnt]+offd_i[o_cnt];

Coverage (%)	Name	Source Location	Module

Path /

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	4.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.04
Bottlenecks	P10, P11, P12,
Function	.omp_outlined.
Source	amg.c:794-818,amg.c:824-833,amg.c:841-845,amg.c:851-881,amg.c:887-896,amg.c:904-904,amg.c:917-923,amg.c:932-932,amg.c:938-938,amg.c:944-947,amg.c:955-959,amg.c:965-965,amg.c:974-974,amg.c:983-986,amg.c:995-995,amg.c:1007-1010,amg.c:1018-1018,amg.c:1030-1042,amg.c:1048-1057,amg.c:1065-1069,amg.c:1075-1105,amg.c:1111-1120,amg.c:1128-1132,amg.c:1138-1153,amg.c:1159-1168,amg.c:1176-1180,amg.c:1186-1216,amg.c:1222-1223,amg.c:1252-1258,amg.c:1267-1267,amg.c:1279-1282,amg.c:1290-1294,amg.c:1300-1300,amg.c:1309-1309,amg.c:1318-1321,amg.c:1330-1330,amg.c:1342-1345,amg.c:1365-1367
Source loop unroll info	not unrolled or unrolled with no peel/tail loop
Source loop unroll confidence level	max
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	105.00
CQA cycles if no scalar integer	105.00
CQA cycles if FP arith vectorized	105.00
CQA cycles if fully vectorized	26.25
Front-end cycles	101.13
DIV/SQRT cycles	80.00
P0 cycles	80.00
P1 cycles	83.50
P2 cycles	83.50
P3 cycles	83.50
P4 cycles	83.50
P5 cycles	0.00
P6 cycles	0.00
P7 cycles	0.00
P8 cycles	0.00
P9 cycles	105.00
P10 cycles	105.00
P11 cycles	105.00
P12 cycles	35.00
P13 cycles	35.00
P14 cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	809.00
Nb uops	809.00
Nb loads	NA
Nb stores	70.00
Nb stack references	0.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	24.00
Bytes prefetched	0.00
Bytes loaded	1960.00
Bytes stored	560.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	NA
Vectorization ratio store	NA
Vectorization ratio mul	NA
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	25.00
Vector-efficiency ratio load	NA
Vector-efficiency ratio store	NA
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	25.00
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	25.00

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	4.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.04
Bottlenecks	P10, P11, P12,
Function	.omp_outlined.
Source	amg.c:794-818,amg.c:824-833,amg.c:841-845,amg.c:851-881,amg.c:887-896,amg.c:904-904,amg.c:917-923,amg.c:932-932,amg.c:938-938,amg.c:944-947,amg.c:955-959,amg.c:965-965,amg.c:974-974,amg.c:983-986,amg.c:995-995,amg.c:1007-1010,amg.c:1018-1018,amg.c:1030-1042,amg.c:1048-1057,amg.c:1065-1069,amg.c:1075-1105,amg.c:1111-1120,amg.c:1128-1132,amg.c:1138-1153,amg.c:1159-1168,amg.c:1176-1180,amg.c:1186-1216,amg.c:1222-1223,amg.c:1252-1258,amg.c:1267-1267,amg.c:1279-1282,amg.c:1290-1294,amg.c:1300-1300,amg.c:1309-1309,amg.c:1318-1321,amg.c:1330-1330,amg.c:1342-1345,amg.c:1365-1367
Source loop unroll info	not unrolled or unrolled with no peel/tail loop
Source loop unroll confidence level	max
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	105.00
CQA cycles if no scalar integer	105.00
CQA cycles if FP arith vectorized	105.00
CQA cycles if fully vectorized	26.25
Front-end cycles	101.13
DIV/SQRT cycles	80.00
P0 cycles	80.00
P1 cycles	83.50
P2 cycles	83.50
P3 cycles	83.50
P4 cycles	83.50
P5 cycles	0.00
P6 cycles	0.00
P7 cycles	0.00
P8 cycles	0.00
P9 cycles	105.00
P10 cycles	105.00
P11 cycles	105.00
P12 cycles	35.00
P13 cycles	35.00
P14 cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	809.00
Nb uops	809.00
Nb loads	NA
Nb stores	70.00
Nb stack references	0.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	24.00
Bytes prefetched	0.00
Bytes loaded	1960.00
Bytes stored	560.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	NA
Vectorization ratio store	NA
Vectorization ratio mul	NA
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	25.00
Vector-efficiency ratio load	NA
Vector-efficiency ratio store	NA
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	25.00
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	25.00

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	.omp_outlined.
Source file and lines	amg.c:794-1367
Module	exec

The loop is defined in /home/hbollore/qaas-runs/171-233-5044/intel/AMG/build/AMG/AMG/test/amg.c:794-818,824-833,841-845,851-881,887-896,904,917-923,932,938,944-947,955-959,965,974,983-986,995,1007-1010,1018,1030-1042,1048-1057,1065-1069,1075-1105,1111-1120,1128-1132,1138-1153,1159-1168,1176-1180,1186-1216,1222-1223,1252-1258,1267,1279-1282,1290-1294,1300,1309,1318-1321,1330,1342-1345,1365-1367.

The related source loop is not unrolled or unrolled with no peel/tail loop.
Warnings:

Ignoring paths for analysis
Failed to get the number of paths
RecMII not computed since number of paths is unknown or > max_paths

gain
potential
hint
expert

Vectorization

Your loop is not vectorized. 4 data elements could be processed at once in vector registers. By vectorizing your loop, you can lower the cost of an iteration from 105.00 to 26.25 cycles (4.00x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 1960 bytes. The binary loop is storing 560 bytes.

General properties

nb instructions	809
loop length	3236
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

101.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	80.00	80.00	83.50	83.50	83.50	83.50	0.00	0.00	0.00	0.00	105.00	105.00	105.00	35.00	35.00
cycles	80.00	80.00	83.50	83.50	83.50	83.50	0.00	0.00	0.00	0.00	105.00	105.00	105.00	35.00	35.00

Execution ports to units layout:

P0:
P1:
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	101.13
Overall L1	105.00

Vectorization ratios

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 105.00 cycles. At this rate:

19% of peak load performance is reached (18.67 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
11% of peak store performance is reached (5.33 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 4111e4

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P10	P11	P12	P13	P14	Latency	Recip. throughput
LDR X8, [SP, #24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X13, XZR, X14	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X14, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.EQ 411ea0 <.omp_outlined.+0xe80>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X15, [SP, #32]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X14, X13, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
B 4111b4 <.omp_outlined.+0x194>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [SP, #40]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDUR X3, [X29, #488]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X15, XZR, X17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X17, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 411184 <.omp_outlined.+0x164>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDUR X9, [X29, #416]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
UBFM X8, X10, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ORR X16, XZR, XZR	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X17, X15, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X18, X8, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X0, X9, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
UBFM X8, X12, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X1, X8, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
B 411258 <.omp_outlined.+0x238>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X30, [X7]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X30, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X7]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDUR X3, [X29, #448]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X2]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X8, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X3, [X3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X8, X16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X5, [X3, X25,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X11, X11, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X9, X9, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X11, [X27]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X9, [X3, X25,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDUR X9, [X29, #480]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X3, XZR, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X11, X11, X18	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X9, [X9]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X10, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X10, X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X9, X9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X11, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X9, [X2]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8, X16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X8, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X9, [X21]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X9, X18	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X9, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDUR X8, [X29, #432]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X16, X16, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X4, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4111a0 <.omp_outlined.+0x180>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X2, X0, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X12, X12, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X4, [X2]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDUR X8, [X29, #464]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X19]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X8, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X13, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LE 4112cc <.omp_outlined.+0x2ac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X8, X4, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDUR X8, [X29, #496]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X20]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X9, X8, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X15, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LE 41132c <.omp_outlined.+0x30c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X8, X4, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X8, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X9, X8, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LE 4113a4 <.omp_outlined.+0x384>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X8, X4, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 4113bc <.omp_outlined.+0x39c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X13, 4117a0 <.omp_outlined.+0x780>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X6, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDUR X8, [X29, #496]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X4, X6, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X7, [X4, X16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X5, X7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X5, [X4, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X20]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X8, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X15, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LE 411370 <.omp_outlined.+0x350>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X5, X7, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X5, [X4, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X3, 41154c <.omp_outlined.+0x52c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X30, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X30, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
TBNZ X8, #63, 41154c <.omp_outlined.+0x52c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
MADD X8, X30, X11, X30	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 41156c <.omp_outlined.+0x54c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 411608 <.omp_outlined.+0x5e8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X15, 4113fc <.omp_outlined.+0x3dc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X1, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X4, X8, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X6, [X4]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X5, X6, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X5, [X4]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X3, 411580 <.omp_outlined.+0x560>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X8, X11, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
TBNZ X9, #63, 411580 <.omp_outlined.+0x560>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 4113f4 <.omp_outlined.+0x3d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 4115a0 <.omp_outlined.+0x580>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X15, 411610 <.omp_outlined.+0x5f0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X5, X7, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X5, [X4, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X3, 4115d8 <.omp_outlined.+0x5b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X30, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X30, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
TBNZ X8, #63, 4115d8 <.omp_outlined.+0x5b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
MADD X8, X30, X11, X30	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4115f8 <.omp_outlined.+0x5d8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 411608 <.omp_outlined.+0x5e8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X3, 4113bc <.omp_outlined.+0x39c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X8, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X9, [X8, X16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X8, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X8, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X4, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
MADD X8, X8, X9, X8	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 4113f0 <.omp_outlined.+0x3d0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X9, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X8, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4113fc <.omp_outlined.+0x3dc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X4, X8, X12,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X5, [X4]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X5, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X4]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X5, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X5, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
ORR X8, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
B.GT 411420 <.omp_outlined.+0x400>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X3, 411434 <.omp_outlined.+0x414>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X8, X12,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X9, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X8]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X5, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X5, X11, X5	1	0	0	0	0	1	0	0	0	0	0	0	2	1
ADD X4, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X4, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
ORR X8, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
B.LT 41145c <.omp_outlined.+0x43c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X4, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 411468 <.omp_outlined.+0x448>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X8, X12,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X9, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X8]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDUR X8, [X29, #496]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X20]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X8, X9, X8	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X17, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4114ac <.omp_outlined.+0x48c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X2]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X9, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X11, X9, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X3, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LE 4114fc <.omp_outlined.+0x4dc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X8, X8, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 411514 <.omp_outlined.+0x4f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDUR X8, [X29, #440]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X17, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4117a0 <.omp_outlined.+0x780>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X1, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X6, X8, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X4, [X6]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X7, X4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X7, [X6]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X3, 4115b4 <.omp_outlined.+0x594>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X8, X11, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
TBNZ X9, #63, 4115b4 <.omp_outlined.+0x594>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 41172c <.omp_outlined.+0x70c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 41171c <.omp_outlined.+0x6fc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X3, 411514 <.omp_outlined.+0x4f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X8, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X9, [X8, X16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X8, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X8, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X6, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
MADD X8, X8, X9, X8	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411544 <.omp_outlined.+0x524>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X4, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4117a0 <.omp_outlined.+0x780>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X6, X8, X12,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X7, [X6]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
B 41172c <.omp_outlined.+0x70c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X5, X7, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X5, [X4, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X30, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X30, X11, X30	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411608 <.omp_outlined.+0x5e8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X11, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X8, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411608 <.omp_outlined.+0x5e8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 411610 <.omp_outlined.+0x5f0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X5, X6, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X5, [X4]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 4113f4 <.omp_outlined.+0x3d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 4113f4 <.omp_outlined.+0x3d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 4113fc <.omp_outlined.+0x3dc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X7, X4, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X7, [X6]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 41172c <.omp_outlined.+0x70c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 41171c <.omp_outlined.+0x6fc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X5, X7, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X5, [X4, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X30, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X30, X11, X30	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411608 <.omp_outlined.+0x5e8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 411610 <.omp_outlined.+0x5f0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X5, X5, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X5, [X4, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X3, 411624 <.omp_outlined.+0x604>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X7, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X7, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
TBZ X8, #63, 411634 <.omp_outlined.+0x614>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X5, X5, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X5, [X4, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X7, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X7, X11, X7	1	0	0	0	0	1	0	0	0	0	0	0	2	1
LDR X11, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X30, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X30, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
CCMP X30, X11, #8, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
B.GE 411654 <.omp_outlined.+0x634>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X5, X5, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X5, [X4, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDUR X8, [X29, #496]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X20]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X6, X6, X12,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X8, X11, X8	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X17, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4116bc <.omp_outlined.+0x69c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X7, X5, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X7, [X4, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X3, 41168c <.omp_outlined.+0x66c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X8, X11, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
TBZ X9, #63, 41169c <.omp_outlined.+0x67c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X7, X5, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X7, [X4, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 41172c <.omp_outlined.+0x70c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X30, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4117a0 <.omp_outlined.+0x780>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 41172c <.omp_outlined.+0x70c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDUR X8, [X29, #440]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X17, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4117a0 <.omp_outlined.+0x780>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X7, X5, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X7, [X4, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X3, 4116fc <.omp_outlined.+0x6dc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X30, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X30, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
TBNZ X8, #63, 4116fc <.omp_outlined.+0x6dc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
MADD X8, X30, X11, X30	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 41172c <.omp_outlined.+0x70c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 41171c <.omp_outlined.+0x6fc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X7, X5, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X7, [X4, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X30, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X30, X11, X30	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 41172c <.omp_outlined.+0x70c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4117a0 <.omp_outlined.+0x780>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X8, X7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X6]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDUR X8, [X29, #496]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X20]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X9, X8, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X15, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GT 4117b8 <.omp_outlined.+0x798>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X15, 41183c <.omp_outlined.+0x81c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X1, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X4, X8, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X6, [X4]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X5, X6, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X5, [X4]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X3, 411aec <.omp_outlined.+0xacc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X8, X11, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
TBNZ X9, #63, 411aec <.omp_outlined.+0xacc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411834 <.omp_outlined.+0x814>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 411b0c <.omp_outlined.+0xaec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDUR X8, [X29, #496]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X20]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X9, X8, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X15, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LE 41174c <.omp_outlined.+0x72c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X2]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X9, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X11, X9, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X3, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LE 4117e4 <.omp_outlined.+0x7c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X8, X8, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 4117fc <.omp_outlined.+0x7dc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X3, 4117fc <.omp_outlined.+0x7dc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X8, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X9, [X8, X16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X8, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X8, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X4, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
MADD X8, X8, X9, X8	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411830 <.omp_outlined.+0x810>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X9, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X8, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 41183c <.omp_outlined.+0x81c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X4, X8, X12,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X5, [X4]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X5, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X4]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X5, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X5, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
ORR X8, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
B.GT 411860 <.omp_outlined.+0x840>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X3, 411874 <.omp_outlined.+0x854>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X8, X12,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X9, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X8]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X5, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X5, X11, X5	1	0	0	0	0	1	0	0	0	0	0	0	2	1
ADD X4, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X4, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
ORR X8, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
B.LT 41189c <.omp_outlined.+0x87c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X4, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 411920 <.omp_outlined.+0x900>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X8, X12,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X9, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X8]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDUR X8, [X29, #496]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X20]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X8, X9, X8	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X17, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411938 <.omp_outlined.+0x918>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDUR X8, [X29, #440]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X17, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4119b8 <.omp_outlined.+0x998>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X1, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X5, X8, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X7, [X5]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X6, X7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X6, [X5]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X3, 411b20 <.omp_outlined.+0xb00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X8, X11, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
TBNZ X9, #63, 411b20 <.omp_outlined.+0xb00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 4119b0 <.omp_outlined.+0x990>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 411b40 <.omp_outlined.+0xb20>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDUR X8, [X29, #496]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X20]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X8, X9, X8	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X17, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4118c0 <.omp_outlined.+0x8a0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X2]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X9, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X11, X9, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X3, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LE 411964 <.omp_outlined.+0x944>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X8, X8, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 41197c <.omp_outlined.+0x95c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X3, 41197c <.omp_outlined.+0x95c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X8, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X9, [X8, X16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X8, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X8, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X5, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
MADD X8, X8, X9, X8	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 4119ac <.omp_outlined.+0x98c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X4, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4119b8 <.omp_outlined.+0x998>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X5, X8, X12,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X6, [X5]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X6, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X5]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDUR X8, [X29, #464]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X19]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X8, X9, X8	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X14, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 411a20 <.omp_outlined.+0xa00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X2]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDUR X9, [X29, #496]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X20]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X9]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X11, X9, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X15, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LE 411aa8 <.omp_outlined.+0xa88>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X9, X8, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X9, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X11, X9, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X3, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LE 411b54 <.omp_outlined.+0xb34>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X8, X8, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 411b6c <.omp_outlined.+0xb4c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [SP, #80]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X14, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4111e4 <.omp_outlined.+0x1c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X7, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDUR X8, [X29, #496]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X5, X7, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X30, [X5, X16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X6, X30, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X6, [X5, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X20]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X9, X8, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X15, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LE 411ca8 <.omp_outlined.+0xc88>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X6, X30, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X6, [X5, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X3, 411a78 <.omp_outlined.+0xa58>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X8, X11, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
TBZ X9, #63, 411a88 <.omp_outlined.+0xa68>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X6, X30, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X6, [X5, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411d8c <.omp_outlined.+0xd6c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X4, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 411d94 <.omp_outlined.+0xd74>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 411d8c <.omp_outlined.+0xd6c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X15, 411ba8 <.omp_outlined.+0xb88>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X1, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X5, X8, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X7, [X5]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X6, X7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X6, [X5]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X3, 411d28 <.omp_outlined.+0xd08>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X8, X11, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
TBNZ X9, #63, 411d28 <.omp_outlined.+0xd08>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411ba0 <.omp_outlined.+0xb80>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 411d48 <.omp_outlined.+0xd28>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X5, X6, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X5, [X4]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411834 <.omp_outlined.+0x814>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411834 <.omp_outlined.+0x814>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 41183c <.omp_outlined.+0x81c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X6, X7, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X6, [X5]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 4119b0 <.omp_outlined.+0x990>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 4119b0 <.omp_outlined.+0x990>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 4119b8 <.omp_outlined.+0x998>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X3, 411b6c <.omp_outlined.+0xb4c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X8, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X9, [X8, X16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X8, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X8, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X5, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
MADD X8, X8, X9, X8	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411b9c <.omp_outlined.+0xb7c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X4, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 411ba8 <.omp_outlined.+0xb88>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X5, X8, X12,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X6, [X5]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X6, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X5]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X5, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X5, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
ORR X8, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
B.GT 411bcc <.omp_outlined.+0xbac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X3, 411be0 <.omp_outlined.+0xbc0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X8, X12,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X9, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X8]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X5, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X5, X11, X5	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X4, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
ORR X8, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
B.LT 411c04 <.omp_outlined.+0xbe4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X4, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 411c10 <.omp_outlined.+0xbf0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X8, X12,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X9, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X8]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDUR X8, [X29, #496]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X20]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X8, X9, X8	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X17, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 411c60 <.omp_outlined.+0xc40>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X2]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X9, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X11, X9, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X3, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LE 411cdc <.omp_outlined.+0xcbc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X8, X8, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 411cf4 <.omp_outlined.+0xcd4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X15, 411d94 <.omp_outlined.+0xd74>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X6, X30, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X6, [X5, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X3, 411d5c <.omp_outlined.+0xd3c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X8, X11, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
TBNZ X9, #63, 411d5c <.omp_outlined.+0xd3c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 411d7c <.omp_outlined.+0xd5c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 411d8c <.omp_outlined.+0xd6c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X3, 411cf4 <.omp_outlined.+0xcd4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X8, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X9, [X8, X16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X8, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X8, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X7, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
MADD X8, X8, X9, X8	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 4111d8 <.omp_outlined.+0x1b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X4, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4111e4 <.omp_outlined.+0x1c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X7, X8, X12,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
B 4111d8 <.omp_outlined.+0x1b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X6, X7, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X6, [X5]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411ba0 <.omp_outlined.+0xb80>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411ba0 <.omp_outlined.+0xb80>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 411ba8 <.omp_outlined.+0xb88>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X6, X30, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X6, [X5, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411d8c <.omp_outlined.+0xd6c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 411d94 <.omp_outlined.+0xd74>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X6, X6, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X6, [X5, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X3, 411da8 <.omp_outlined.+0xd88>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X8, X11, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
TBZ X9, #63, 411db8 <.omp_outlined.+0xd98>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X6, X6, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X6, [X5, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X4, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411dd0 <.omp_outlined.+0xdb0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X4, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 411dd8 <.omp_outlined.+0xdb8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X6, X6, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X6, [X5, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDUR X8, [X29, #496]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X20]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X7, X7, X12,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X8, X9, X8	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X17, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 411e40 <.omp_outlined.+0xe20>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X30, X6, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X30, [X5, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X3, 411e10 <.omp_outlined.+0xdf0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X8, X11, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
TBZ X9, #63, 411e20 <.omp_outlined.+0xe00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X30, X6, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X30, [X5, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 4111dc <.omp_outlined.+0x1bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X4, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4111e4 <.omp_outlined.+0x1c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 4111dc <.omp_outlined.+0x1bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDUR X8, [X29, #440]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X17, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4111e4 <.omp_outlined.+0x1c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X30, X6, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X30, [X5, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X3, 411e6c <.omp_outlined.+0xe4c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X8, X11, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
TBZ X9, #63, 411e7c <.omp_outlined.+0xe5c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X30, X6, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X30, [X5, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 4111dc <.omp_outlined.+0x1bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 4111dc <.omp_outlined.+0x1bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 4111e4 <.omp_outlined.+0x1c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50

Function	.omp_outlined.
Source file and lines	amg.c:794-1367
Module	exec

Ignoring paths for analysis
Failed to get the number of paths
RecMII not computed since number of paths is unknown or > max_paths

gain
potential
hint
expert

Vectorization

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 1960 bytes. The binary loop is storing 560 bytes.

General properties

nb instructions	809
loop length	3236
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

101.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	80.00	80.00	83.50	83.50	83.50	83.50	0.00	0.00	0.00	0.00	105.00	105.00	105.00	35.00	35.00
cycles	80.00	80.00	83.50	83.50	83.50	83.50	0.00	0.00	0.00	0.00	105.00	105.00	105.00	35.00	35.00

Execution ports to units layout:

P0:
P1:
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	101.13
Overall L1	105.00

Vectorization ratios

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 105.00 cycles. At this rate:

19% of peak load performance is reached (18.67 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
11% of peak store performance is reached (5.33 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 4111e4

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P10	P11	P12	P13	P14	Latency	Recip. throughput
LDR X8, [SP, #24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X13, XZR, X14	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X14, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.EQ 411ea0 <.omp_outlined.+0xe80>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X15, [SP, #32]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X14, X13, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
B 4111b4 <.omp_outlined.+0x194>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [SP, #40]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDUR X3, [X29, #488]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X15, XZR, X17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X17, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 411184 <.omp_outlined.+0x164>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDUR X9, [X29, #416]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
UBFM X8, X10, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ORR X16, XZR, XZR	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X17, X15, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X18, X8, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X0, X9, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
UBFM X8, X12, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X1, X8, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
B 411258 <.omp_outlined.+0x238>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X30, [X7]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X30, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X7]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDUR X3, [X29, #448]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X2]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X8, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X3, [X3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X8, X16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X5, [X3, X25,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X11, X11, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X9, X9, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X11, [X27]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
STR X9, [X3, X25,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDUR X9, [X29, #480]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X3, XZR, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X11, X11, X18	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X9, [X9]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X10, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X10, X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X9, X9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X11, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X9, [X2]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8, X16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X8, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X9, [X21]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X9, X18	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X9, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDUR X8, [X29, #432]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X16, X16, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X4, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4111a0 <.omp_outlined.+0x180>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X2, X0, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X12, X12, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X4, [X2]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDUR X8, [X29, #464]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X19]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X8, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X13, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LE 4112cc <.omp_outlined.+0x2ac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X8, X4, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDUR X8, [X29, #496]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X20]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X9, X8, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X15, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LE 41132c <.omp_outlined.+0x30c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X8, X4, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X8, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X9, X8, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LE 4113a4 <.omp_outlined.+0x384>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X8, X4, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 4113bc <.omp_outlined.+0x39c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X13, 4117a0 <.omp_outlined.+0x780>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X6, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDUR X8, [X29, #496]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X4, X6, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X7, [X4, X16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X5, X7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X5, [X4, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X20]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X8, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X15, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LE 411370 <.omp_outlined.+0x350>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X5, X7, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X5, [X4, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X3, 41154c <.omp_outlined.+0x52c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X30, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X30, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
TBNZ X8, #63, 41154c <.omp_outlined.+0x52c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
MADD X8, X30, X11, X30	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 41156c <.omp_outlined.+0x54c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 411608 <.omp_outlined.+0x5e8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X15, 4113fc <.omp_outlined.+0x3dc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X1, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X4, X8, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X6, [X4]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X5, X6, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X5, [X4]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X3, 411580 <.omp_outlined.+0x560>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X8, X11, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
TBNZ X9, #63, 411580 <.omp_outlined.+0x560>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 4113f4 <.omp_outlined.+0x3d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 4115a0 <.omp_outlined.+0x580>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X15, 411610 <.omp_outlined.+0x5f0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X5, X7, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X5, [X4, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X3, 4115d8 <.omp_outlined.+0x5b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X30, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X30, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
TBNZ X8, #63, 4115d8 <.omp_outlined.+0x5b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
MADD X8, X30, X11, X30	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4115f8 <.omp_outlined.+0x5d8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 411608 <.omp_outlined.+0x5e8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X3, 4113bc <.omp_outlined.+0x39c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X8, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X9, [X8, X16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X8, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X8, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X4, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
MADD X8, X8, X9, X8	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 4113f0 <.omp_outlined.+0x3d0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X9, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X8, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4113fc <.omp_outlined.+0x3dc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X4, X8, X12,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X5, [X4]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X5, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X4]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X5, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X5, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
ORR X8, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
B.GT 411420 <.omp_outlined.+0x400>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X3, 411434 <.omp_outlined.+0x414>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X8, X12,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X9, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X8]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X5, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X5, X11, X5	1	0	0	0	0	1	0	0	0	0	0	0	2	1
ADD X4, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X4, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
ORR X8, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
B.LT 41145c <.omp_outlined.+0x43c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X4, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 411468 <.omp_outlined.+0x448>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X8, X12,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X9, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X8]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDUR X8, [X29, #496]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X20]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X8, X9, X8	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X17, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4114ac <.omp_outlined.+0x48c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X2]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X9, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X11, X9, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X3, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LE 4114fc <.omp_outlined.+0x4dc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X8, X8, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 411514 <.omp_outlined.+0x4f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDUR X8, [X29, #440]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X17, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4117a0 <.omp_outlined.+0x780>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X1, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X6, X8, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X4, [X6]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X7, X4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X7, [X6]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X3, 4115b4 <.omp_outlined.+0x594>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X8, X11, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
TBNZ X9, #63, 4115b4 <.omp_outlined.+0x594>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 41172c <.omp_outlined.+0x70c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 41171c <.omp_outlined.+0x6fc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X3, 411514 <.omp_outlined.+0x4f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X8, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X9, [X8, X16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X8, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X8, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X6, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
MADD X8, X8, X9, X8	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411544 <.omp_outlined.+0x524>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X4, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4117a0 <.omp_outlined.+0x780>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X6, X8, X12,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X7, [X6]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
B 41172c <.omp_outlined.+0x70c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X5, X7, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X5, [X4, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X30, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X30, X11, X30	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411608 <.omp_outlined.+0x5e8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X11, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X8, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411608 <.omp_outlined.+0x5e8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 411610 <.omp_outlined.+0x5f0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X5, X6, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X5, [X4]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 4113f4 <.omp_outlined.+0x3d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 4113f4 <.omp_outlined.+0x3d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 4113fc <.omp_outlined.+0x3dc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X7, X4, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X7, [X6]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 41172c <.omp_outlined.+0x70c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 41171c <.omp_outlined.+0x6fc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X5, X7, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X5, [X4, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X30, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X30, X11, X30	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411608 <.omp_outlined.+0x5e8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 411610 <.omp_outlined.+0x5f0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X5, X5, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X5, [X4, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X3, 411624 <.omp_outlined.+0x604>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X7, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X7, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
TBZ X8, #63, 411634 <.omp_outlined.+0x614>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X5, X5, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X5, [X4, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X7, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X7, X11, X7	1	0	0	0	0	1	0	0	0	0	0	0	2	1
LDR X11, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X30, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X30, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
CCMP X30, X11, #8, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
B.GE 411654 <.omp_outlined.+0x634>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X5, X5, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X5, [X4, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDUR X8, [X29, #496]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X20]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X6, X6, X12,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X8, X11, X8	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X17, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4116bc <.omp_outlined.+0x69c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X7, X5, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X7, [X4, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X3, 41168c <.omp_outlined.+0x66c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X8, X11, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
TBZ X9, #63, 41169c <.omp_outlined.+0x67c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X7, X5, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X7, [X4, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 41172c <.omp_outlined.+0x70c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X30, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4117a0 <.omp_outlined.+0x780>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 41172c <.omp_outlined.+0x70c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDUR X8, [X29, #440]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X17, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4117a0 <.omp_outlined.+0x780>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X7, X5, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X7, [X4, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X3, 4116fc <.omp_outlined.+0x6dc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X30, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X30, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
TBNZ X8, #63, 4116fc <.omp_outlined.+0x6dc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
MADD X8, X30, X11, X30	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 41172c <.omp_outlined.+0x70c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 41171c <.omp_outlined.+0x6fc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X7, X5, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X7, [X4, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X30, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X30, X11, X30	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 41172c <.omp_outlined.+0x70c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4117a0 <.omp_outlined.+0x780>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X8, X7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X6]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDUR X8, [X29, #496]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X20]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X9, X8, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X15, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GT 4117b8 <.omp_outlined.+0x798>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X15, 41183c <.omp_outlined.+0x81c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X1, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X4, X8, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X6, [X4]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X5, X6, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X5, [X4]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X3, 411aec <.omp_outlined.+0xacc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X8, X11, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
TBNZ X9, #63, 411aec <.omp_outlined.+0xacc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411834 <.omp_outlined.+0x814>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 411b0c <.omp_outlined.+0xaec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDUR X8, [X29, #496]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X20]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X9, X8, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X15, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LE 41174c <.omp_outlined.+0x72c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X2]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X9, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X11, X9, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X3, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LE 4117e4 <.omp_outlined.+0x7c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X8, X8, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 4117fc <.omp_outlined.+0x7dc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X3, 4117fc <.omp_outlined.+0x7dc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X8, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X9, [X8, X16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X8, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X8, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X4, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
MADD X8, X8, X9, X8	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411830 <.omp_outlined.+0x810>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X9, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X8, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 41183c <.omp_outlined.+0x81c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X4, X8, X12,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X5, [X4]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X5, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X4]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X5, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X5, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
ORR X8, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
B.GT 411860 <.omp_outlined.+0x840>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X3, 411874 <.omp_outlined.+0x854>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X8, X12,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X9, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X8]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X5, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X5, X11, X5	1	0	0	0	0	1	0	0	0	0	0	0	2	1
ADD X4, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X4, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
ORR X8, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
B.LT 41189c <.omp_outlined.+0x87c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X4, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 411920 <.omp_outlined.+0x900>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X8, X12,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X9, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X8]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDUR X8, [X29, #496]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X20]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X8, X9, X8	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X17, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411938 <.omp_outlined.+0x918>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDUR X8, [X29, #440]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X17, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4119b8 <.omp_outlined.+0x998>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X1, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X5, X8, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X7, [X5]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X6, X7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X6, [X5]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X3, 411b20 <.omp_outlined.+0xb00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X8, X11, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
TBNZ X9, #63, 411b20 <.omp_outlined.+0xb00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 4119b0 <.omp_outlined.+0x990>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 411b40 <.omp_outlined.+0xb20>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDUR X8, [X29, #496]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X20]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X8, X9, X8	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X17, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4118c0 <.omp_outlined.+0x8a0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X2]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X9, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X11, X9, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X3, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LE 411964 <.omp_outlined.+0x944>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X8, X8, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 41197c <.omp_outlined.+0x95c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X3, 41197c <.omp_outlined.+0x95c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X8, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X9, [X8, X16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X8, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X8, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X5, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
MADD X8, X8, X9, X8	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 4119ac <.omp_outlined.+0x98c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X4, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4119b8 <.omp_outlined.+0x998>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X5, X8, X12,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X6, [X5]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X6, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X5]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDUR X8, [X29, #464]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X19]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X8, X9, X8	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X14, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 411a20 <.omp_outlined.+0xa00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X2]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDUR X9, [X29, #496]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X20]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X9]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X11, X9, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X15, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LE 411aa8 <.omp_outlined.+0xa88>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X9, X8, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X9, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X11, X9, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X3, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LE 411b54 <.omp_outlined.+0xb34>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X8, X8, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 411b6c <.omp_outlined.+0xb4c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [SP, #80]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X14, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4111e4 <.omp_outlined.+0x1c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X7, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDUR X8, [X29, #496]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X5, X7, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X30, [X5, X16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X6, X30, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X6, [X5, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X20]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X9, X8, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X15, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LE 411ca8 <.omp_outlined.+0xc88>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X6, X30, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X6, [X5, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X3, 411a78 <.omp_outlined.+0xa58>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X8, X11, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
TBZ X9, #63, 411a88 <.omp_outlined.+0xa68>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X6, X30, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X6, [X5, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411d8c <.omp_outlined.+0xd6c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X4, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 411d94 <.omp_outlined.+0xd74>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 411d8c <.omp_outlined.+0xd6c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X15, 411ba8 <.omp_outlined.+0xb88>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X1, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X5, X8, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X7, [X5]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X6, X7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X6, [X5]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X3, 411d28 <.omp_outlined.+0xd08>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X8, X11, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
TBNZ X9, #63, 411d28 <.omp_outlined.+0xd08>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411ba0 <.omp_outlined.+0xb80>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 411d48 <.omp_outlined.+0xd28>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X5, X6, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X5, [X4]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411834 <.omp_outlined.+0x814>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411834 <.omp_outlined.+0x814>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 41183c <.omp_outlined.+0x81c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X6, X7, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X6, [X5]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 4119b0 <.omp_outlined.+0x990>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 4119b0 <.omp_outlined.+0x990>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 4119b8 <.omp_outlined.+0x998>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X3, 411b6c <.omp_outlined.+0xb4c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X8, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X9, [X8, X16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X8, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X8, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X5, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
MADD X8, X8, X9, X8	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411b9c <.omp_outlined.+0xb7c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X4, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 411ba8 <.omp_outlined.+0xb88>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X5, X8, X12,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X6, [X5]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X6, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X5]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X5, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X5, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
ORR X8, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
B.GT 411bcc <.omp_outlined.+0xbac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X3, 411be0 <.omp_outlined.+0xbc0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X8, X12,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X9, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X8]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X5, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X5, X11, X5	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X4, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
ORR X8, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
B.LT 411c04 <.omp_outlined.+0xbe4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X4, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 411c10 <.omp_outlined.+0xbf0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X8, X12,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X9, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X8]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDUR X8, [X29, #496]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X20]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X8, X9, X8	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X17, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 411c60 <.omp_outlined.+0xc40>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X2]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X9, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X11, X9, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X3, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LE 411cdc <.omp_outlined.+0xcbc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X8, X8, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X8, [X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 411cf4 <.omp_outlined.+0xcd4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X15, 411d94 <.omp_outlined.+0xd74>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X6, X30, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X6, [X5, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X3, 411d5c <.omp_outlined.+0xd3c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X8, X11, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
TBNZ X9, #63, 411d5c <.omp_outlined.+0xd3c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 411d7c <.omp_outlined.+0xd5c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 411d8c <.omp_outlined.+0xd6c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ X3, 411cf4 <.omp_outlined.+0xcd4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X8, X8, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X9, [X8, X16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X9, X9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X9, [X8, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X8, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X7, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
MADD X8, X8, X9, X8	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 4111d8 <.omp_outlined.+0x1b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X4, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4111e4 <.omp_outlined.+0x1c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X28]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X7, X8, X12,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
B 4111d8 <.omp_outlined.+0x1b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X6, X7, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X6, [X5]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411ba0 <.omp_outlined.+0xb80>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411ba0 <.omp_outlined.+0xb80>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 411ba8 <.omp_outlined.+0xb88>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X6, X30, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X6, [X5, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411d8c <.omp_outlined.+0xd6c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 411d94 <.omp_outlined.+0xd74>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X6, X6, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X6, [X5, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X3, 411da8 <.omp_outlined.+0xd88>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X8, X11, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
TBZ X9, #63, 411db8 <.omp_outlined.+0xd98>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X6, X6, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X6, [X5, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X4, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 411dd0 <.omp_outlined.+0xdb0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X4, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 411dd8 <.omp_outlined.+0xdb8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X6, X6, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X6, [X5, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDUR X8, [X29, #496]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X9, [X20]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X7, X7, X12,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X8, X9, X8	1	0	0	0	0	1	0	0	0	0	0	0	2	1
CMP X17, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 411e40 <.omp_outlined.+0xe20>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X30, X6, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X30, [X5, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X3, 411e10 <.omp_outlined.+0xdf0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X8, X11, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
TBZ X9, #63, 411e20 <.omp_outlined.+0xe00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X30, X6, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X30, [X5, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 4111dc <.omp_outlined.+0x1bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X4, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4111e4 <.omp_outlined.+0x1c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 4111dc <.omp_outlined.+0x1bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDUR X8, [X29, #440]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP X17, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GE 4111e4 <.omp_outlined.+0x1c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X30, X6, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X30, [X5, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CBNZ X3, 411e6c <.omp_outlined.+0xe4c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X9, X8, X11, XZR	1	0	0	0	0	1	0	0	0	0	0	0	2	1
TBZ X9, #63, 411e7c <.omp_outlined.+0xe5c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X30, X6, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR X30, [X5, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR X11, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X8, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
MADD X8, X11, X8, X11	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 4111dc <.omp_outlined.+0x1bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
LDR X8, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SUB X8, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP X3, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 4111dc <.omp_outlined.+0x1bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
B 4111e4 <.omp_outlined.+0x1c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50

Report Configuration

Vectorization

Details

Workaround

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Vectorization

Details

Workaround

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code