OV - exec - Loop 991

	Loop Id: 991	Module: exec	Source: par_multi_interp.c:917-1099 [...]	Coverage: 0.49%

0x445340 MOV	-0x38(%RBP),%R10

0x445344 INC	%R8

0x445347 MOV	-0xa8(%RBP),%RDX

0x44534e MOV	-0x50(%RBP),%RSI

0x445352 CMP	0x8(%RDX,%RSI,8),%R8

0x445357 JGE	445640

0x44535d MOV	-0x128(%RBP),%RDX

0x445364 MOV	(%RDX,%R8,8),%R14

0x445368 MOV	-0x118(%RBP),%RDX

0x44536f CMP	%R10,(%RDX,%R14,8)

0x445373 JNE	445344

0x445375 MOV	-0x58(%RBP),%RDX

0x445379 MOV	0x8(%RDX,%R14,8),%R10

0x44537e TEST	%R10,%R10

0x445381 JLE	4454d7

0x445387 MOV	-0x90(%RBP),%RDX

0x44538e MOV	%R14,-0x30(%RBP)

0x445392 MOV	(%RDX,%R14,8),%R11

0x445396 ADD	%R11,%R10

0x445399 MOV	-0x40(%RBP),%RDX

0x44539d MOV	-0x8(%RDX,%R12,8),%RSI

0x4453a2 LEA	0x1(%R11),%RDX

0x4453a6 CMP	%RDX,%R10

0x4453a9 CMOVLE	%RDX,%R10

0x4453ad MOV	%R10,%RDX

0x4453b0 SUB	%R11,%RDX

0x4453b3 CMP	$0x4,%RDX

0x4453b7 MOV	%RDX,-0xd0(%RBP)

0x4453be JAE	44540b

0x4453c0 MOV	-0xd0(%RBP),%R9

0x4453c7 MOV	%R9,%RDX

0x4453ca AND	$-0x4,%RDX

0x4453ce CMP	%R9,%RDX

0x4453d1 JAE	4454d3

0x4453d7 ADD	%RDX,%R11

0x4453da MOV	-0x30(%RBP),%R14

0x4453de JMP	4453ec

  (994) 0x4453e0 INC	%R11

  (994) 0x4453e3 CMP	%R11,%R10

  (994) 0x4453e6 JE	4454d7

  (994) 0x4453ec MOV	(%RSI,%R11,8),%RDX

  (994) 0x4453f0 CMP	%RDI,(%RBX,%RDX,8)

  (994) 0x4453f4 JE	4453e0

  (994) 0x4453f6 MOV	-0x40(%RBP),%R9

  (994) 0x4453fa MOV	(%R9,%R12,8),%R9

  (994) 0x4453fe MOV	%RDX,(%R9,%RAX,8)

  (994) 0x445402 INC	%RAX

  (994) 0x445405 MOV	%RDI,(%RBX,%RDX,8)

  (994) 0x445409 JMP	4453e0

0x44540b SHR	$0x2,%RDX

0x44540f LEA	0x18(%RSI,%R11,8),%R13

0x445414 JMP	445429

  (995) 0x445420 ADD	$0x20,%R13

  (995) 0x445424 DEC	%RDX

  (995) 0x445427 JE	4453c0

  (995) 0x445429 MOV	-0x18(%R13),%R14

  (995) 0x44542d CMP	%RDI,(%RBX,%R14,8)

  (995) 0x445431 JNE	445460

  (995) 0x445433 MOV	-0x10(%R13),%R14

  (995) 0x445437 CMP	%RDI,(%RBX,%R14,8)

  (995) 0x44543b JNE	44547d

  (995) 0x44543d MOV	-0x8(%R13),%R14

  (995) 0x445441 CMP	%RDI,(%RBX,%R14,8)

  (995) 0x445445 JNE	44549a

  (995) 0x445447 MOV	(%R13),%R14

  (995) 0x44544b CMP	%RDI,(%RBX,%R14,8)

  (995) 0x44544f JE	445420

  (995) 0x445451 JMP	4454bb

  (995) 0x445460 MOV	-0x40(%RBP),%R9

  (995) 0x445464 MOV	(%R9,%R12,8),%R9

  (995) 0x445468 MOV	%R14,(%R9,%RAX,8)

  (995) 0x44546c INC	%RAX

  (995) 0x44546f MOV	%RDI,(%RBX,%R14,8)

  (995) 0x445473 MOV	-0x10(%R13),%R14

  (995) 0x445477 CMP	%RDI,(%RBX,%R14,8)

  (995) 0x44547b JE	44543d

  (995) 0x44547d MOV	-0x40(%RBP),%R9

  (995) 0x445481 MOV	(%R9,%R12,8),%R9

  (995) 0x445485 MOV	%R14,(%R9,%RAX,8)

  (995) 0x445489 INC	%RAX

  (995) 0x44548c MOV	%RDI,(%RBX,%R14,8)

  (995) 0x445490 MOV	-0x8(%R13),%R14

  (995) 0x445494 CMP	%RDI,(%RBX,%R14,8)

  (995) 0x445498 JE	445447

  (995) 0x44549a MOV	-0x40(%RBP),%R9

  (995) 0x44549e MOV	(%R9,%R12,8),%R9

  (995) 0x4454a2 MOV	%R14,(%R9,%RAX,8)

  (995) 0x4454a6 INC	%RAX

  (995) 0x4454a9 MOV	%RDI,(%RBX,%R14,8)

  (995) 0x4454ad MOV	(%R13),%R14

  (995) 0x4454b1 CMP	%RDI,(%RBX,%R14,8)

  (995) 0x4454b5 JE	445420

  (995) 0x4454bb MOV	-0x40(%RBP),%R9

  (995) 0x4454bf MOV	(%R9,%R12,8),%R9

  (995) 0x4454c3 MOV	%R14,(%R9,%RAX,8)

  (995) 0x4454c7 INC	%RAX

  (995) 0x4454ca MOV	%RDI,(%RBX,%R14,8)

  (995) 0x4454ce JMP	445420

0x4454d3 MOV	-0x30(%RBP),%R14

0x4454d7 MOV	-0x60(%RBP),%RDX

0x4454db MOV	0x8(%RDX,%R14,8),%R10

0x4454e0 TEST	%R10,%R10

0x4454e3 JLE	445340

0x4454e9 MOV	-0x98(%RBP),%RDX

0x4454f0 MOV	(%RDX,%R14,8),%R9

0x4454f4 ADD	%R9,%R10

0x4454f7 MOV	-0x48(%RBP),%RDX

0x4454fb MOV	-0x8(%RDX,%R12,8),%RSI

0x445500 LEA	0x1(%R9),%RDX

0x445504 CMP	%RDX,%R10

0x445507 CMOVLE	%RDX,%R10

0x44550b MOV	%R10,%R11

0x44550e SUB	%R9,%R11

0x445511 CMP	$0x4,%R11

0x445515 MOV	%R11,-0x30(%RBP)

0x445519 JAE	44556b

0x44551b MOV	-0x30(%RBP),%RDX

0x44551f MOV	%RDX,%R11

0x445522 AND	$-0x4,%R11

0x445526 CMP	%RDX,%R11

0x445529 JAE	445340

0x44552f ADD	%R11,%R9

0x445532 JMP	44554c

  (992) 0x445540 INC	%R9

  (992) 0x445543 CMP	%R9,%R10

  (992) 0x445546 JE	445340

  (992) 0x44554c MOV	(%RSI,%R9,8),%RDX

  (992) 0x445550 CMP	%RDI,(%R15,%RDX,8)

  (992) 0x445554 JE	445540

  (992) 0x445556 MOV	-0x48(%RBP),%R11

  (992) 0x44555a MOV	(%R11,%R12,8),%R11

  (992) 0x44555e MOV	%RDX,(%R11,%RCX,8)

  (992) 0x445562 INC	%RCX

  (992) 0x445565 MOV	%RDI,(%R15,%RDX,8)

  (992) 0x445569 JMP	445540

0x44556b SHR	$0x2,%R11

0x44556f LEA	0x18(%RSI,%R9,8),%R14

0x445574 JMP	445589

  (993) 0x445580 ADD	$0x20,%R14

  (993) 0x445584 DEC	%R11

  (993) 0x445587 JE	44551b

  (993) 0x445589 MOV	-0x18(%R14),%R13

  (993) 0x44558d CMP	%RDI,(%R15,%R13,8)

  (993) 0x445591 JNE	4455c0

  (993) 0x445593 MOV	-0x10(%R14),%R13

  (993) 0x445597 CMP	%RDI,(%R15,%R13,8)

  (993) 0x44559b JNE	4455dd

  (993) 0x44559d MOV	-0x8(%R14),%R13

  (993) 0x4455a1 CMP	%RDI,(%R15,%R13,8)

  (993) 0x4455a5 JNE	4455fa

  (993) 0x4455a7 MOV	(%R14),%R13

  (993) 0x4455aa CMP	%RDI,(%R15,%R13,8)

  (993) 0x4455ae JE	445580

  (993) 0x4455b0 JMP	44561a

  (993) 0x4455c0 MOV	-0x48(%RBP),%RDX

  (993) 0x4455c4 MOV	(%RDX,%R12,8),%RDX

  (993) 0x4455c8 MOV	%R13,(%RDX,%RCX,8)

  (993) 0x4455cc INC	%RCX

  (993) 0x4455cf MOV	%RDI,(%R15,%R13,8)

  (993) 0x4455d3 MOV	-0x10(%R14),%R13

  (993) 0x4455d7 CMP	%RDI,(%R15,%R13,8)

  (993) 0x4455db JE	44559d

  (993) 0x4455dd MOV	-0x48(%RBP),%RDX

  (993) 0x4455e1 MOV	(%RDX,%R12,8),%RDX

  (993) 0x4455e5 MOV	%R13,(%RDX,%RCX,8)

  (993) 0x4455e9 INC	%RCX

  (993) 0x4455ec MOV	%RDI,(%R15,%R13,8)

  (993) 0x4455f0 MOV	-0x8(%R14),%R13

  (993) 0x4455f4 CMP	%RDI,(%R15,%R13,8)

  (993) 0x4455f8 JE	4455a7

  (993) 0x4455fa MOV	-0x48(%RBP),%RDX

  (993) 0x4455fe MOV	(%RDX,%R12,8),%RDX

  (993) 0x445602 MOV	%R13,(%RDX,%RCX,8)

  (993) 0x445606 INC	%RCX

  (993) 0x445609 MOV	%RDI,(%R15,%R13,8)

  (993) 0x44560d MOV	(%R14),%R13

  (993) 0x445610 CMP	%RDI,(%R15,%R13,8)

  (993) 0x445614 JE	445580

  (993) 0x44561a MOV	-0x48(%RBP),%RDX

  (993) 0x44561e MOV	(%RDX,%R12,8),%RDX

  (993) 0x445622 MOV	%R13,(%RDX,%RCX,8)

  (993) 0x445626 INC	%RCX

  (993) 0x445629 MOV	%RDI,(%R15,%R13,8)

  (993) 0x44562d JMP	445580

/home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 917 - 1099

--------------------------------------------------------------------------------

917:           for (i=0; i < n_coarse; i++)

[...]

1075:              for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++)

1076:              {

1077:                 j1 = S_diag_j[j];

1078:                 if (assigned[j1] == pass-1)

1079:                 {

1080:                    j_start = P_diag_start[j1];

1081:                    j_end = j_start+P_diag_i[j1+1];

1082:                    for (k=j_start; k < j_end; k++)

1083:                    {

1084:                       k1 = P_diag_pass[pass-1][k];

1085:                       if (P_marker[k1] != -i1-1)

1086:                       {

1087:                           P_diag_pass[pass][cnt_nz++] = k1;

1088:                           P_marker[k1] = -i1-1;

1089:                       }

1090:                    }

1091:                    j_start = P_offd_start[j1];

1092:                    j_end = j_start+P_offd_i[j1+1];

1093:                    for (k=j_start; k < j_end; k++)

1094:                    {

1095:                       k1 = P_offd_pass[pass-1][k];

1096:                       if (P_marker_offd[k1] != -i1-1)

1097:                       {

1098:                          P_offd_pass[pass][cnt_nz_offd++] = k1;

1099:                          P_marker_offd[k1] = -i1-1;

Coverage (%)	Name	Source Location	Module
►100.00+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so

Path /

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	8.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.46
Bottlenecks	micro-operation queue,
Function	hypre_BoomerAMGBuildMultipass.extracted.34
Source	par_multi_interp.c:917-917,par_multi_interp.c:1075-1084,par_multi_interp.c:1088-1088,par_multi_interp.c:1091-1095
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	11.67
CQA cycles if no scalar integer	11.67
CQA cycles if FP arith vectorized	11.67
CQA cycles if fully vectorized	1.46
Front-end cycles	11.67
P0 cycles	6.40
P1 cycles	6.40
P2 cycles	8.00
P3 cycles	8.00
P4 cycles	1.50
P5 cycles	6.40
P6 cycles	6.40
P7 cycles	1.50
P8 cycles	1.50
P9 cycles	1.50
P10 cycles	6.40
P11 cycles	8.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	68.00
Nb uops	68.00
Nb loads	24.00
Nb stores	3.00
Nb stack references	13.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	18.51
Bytes prefetched	0.00
Bytes loaded	192.00
Bytes stored	24.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	12.50
Vector-efficiency ratio load	12.50
Vector-efficiency ratio store	12.50
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	12.50
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	12.50

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	8.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.46
Bottlenecks	micro-operation queue,
Function	hypre_BoomerAMGBuildMultipass.extracted.34
Source	par_multi_interp.c:917-917,par_multi_interp.c:1075-1084,par_multi_interp.c:1088-1088,par_multi_interp.c:1091-1095
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	11.67
CQA cycles if no scalar integer	11.67
CQA cycles if FP arith vectorized	11.67
CQA cycles if fully vectorized	1.46
Front-end cycles	11.67
P0 cycles	6.40
P1 cycles	6.40
P2 cycles	8.00
P3 cycles	8.00
P4 cycles	1.50
P5 cycles	6.40
P6 cycles	6.40
P7 cycles	1.50
P8 cycles	1.50
P9 cycles	1.50
P10 cycles	6.40
P11 cycles	8.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	68.00
Nb uops	68.00
Nb loads	24.00
Nb stores	3.00
Nb stack references	13.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	18.51
Bytes prefetched	0.00
Bytes loaded	192.00
Bytes stored	24.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	12.50
Vector-efficiency ratio load	12.50
Vector-efficiency ratio store	12.50
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	12.50
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	12.50

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	hypre_BoomerAMGBuildMultipass.extracted.34
Source file and lines	par_multi_interp.c:917-1099
Module	exec

The loop is defined in /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:917,1075-1099.

Analyzed code is defined in /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:917,1075-1084,1088,1091-1095.

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Too many paths. If you really need to analyze all of the 2705 paths individually, rerun with max-paths=2705
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 2705 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Vectorization

Your loop is not vectorized. 8 data elements could be processed at once in vector registers. By vectorizing your loop, you can lower the cost of an iteration from 11.67 to 1.46 cycles (8.00x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with ffast-math (included in Ofast) to extend loop vectorization to FP reductions.
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This loop is probably writing/copying data or processing integer elements.

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 192 bytes. The binary loop is storing 24 bytes.

General properties

nb instructions	68
nb uops	68
loop length	279
used x86 registers	10
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	13

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	11.67 cycles
front end	11.67 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	6.40	6.40	8.00	8.00	1.50	6.40	6.40	1.50	1.50	1.50	6.40	8.00
cycles	6.40	6.40	8.00	8.00	1.50	6.40	6.40	1.50	1.50	1.50	6.40	8.00

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	11.67
Dispatch	8.00
Overall L1	11.67

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 11.67 cycles. At this rate:

8% of peak load performance is reached (16.46 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
1% of peak store performance is reached (2.06 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 11.67 to 8.00 cycles (1.46x speedup).

ASM code

In the binary file, the address of the loop is: 445352

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
MOV -0x38(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
INC %R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0xa8(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x50(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP 0x8(%RDX,%RSI,8),%R8	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JGE 445640 <hypre_BoomerAMGBuildMultipass.extracted.34+0xdc0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x128(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RDX,%R8,8),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x118(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %R10,(%RDX,%R14,8)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JNE 445344 <hypre_BoomerAMGBuildMultipass.extracted.34+0xac4>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x58(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x8(%RDX,%R14,8),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
TEST %R10,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JLE 4454d7 <hypre_BoomerAMGBuildMultipass.extracted.34+0xc57>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x90(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R14,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV (%RDX,%R14,8),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %R11,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV -0x40(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x8(%RDX,%R12,8),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA 0x1(%R11),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RDX,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
CMOVLE %RDX,%R10	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	scal (12.5%)
MOV %R10,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %R11,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CMP $0x4,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RDX,-0xd0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JAE 44540b <hypre_BoomerAMGBuildMultipass.extracted.34+0xb8b>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0xd0(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R9,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x4,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
CMP %R9,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JAE 4454d3 <hypre_BoomerAMGBuildMultipass.extracted.34+0xc53>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
ADD %RDX,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x30(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JMP 4453ec <hypre_BoomerAMGBuildMultipass.extracted.34+0xb6c>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
SHR $0x2,%RDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
LEA 0x18(%RSI,%R11,8),%R13	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
JMP 445429 <hypre_BoomerAMGBuildMultipass.extracted.34+0xba9>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
MOV -0x30(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x8(%RDX,%R14,8),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
TEST %R10,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JLE 445340 <hypre_BoomerAMGBuildMultipass.extracted.34+0xac0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x98(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RDX,%R14,8),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %R9,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV -0x48(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x8(%RDX,%R12,8),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA 0x1(%R9),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RDX,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
CMOVLE %RDX,%R10	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	scal (12.5%)
MOV %R10,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %R9,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CMP $0x4,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %R11,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JAE 44556b <hypre_BoomerAMGBuildMultipass.extracted.34+0xceb>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x30(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDX,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x4,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
CMP %RDX,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JAE 445340 <hypre_BoomerAMGBuildMultipass.extracted.34+0xac0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
ADD %R11,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JMP 44554c <hypre_BoomerAMGBuildMultipass.extracted.34+0xccc>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
SHR $0x2,%R11	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
LEA 0x18(%RSI,%R9,8),%R14	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
JMP 445589 <hypre_BoomerAMGBuildMultipass.extracted.34+0xd09>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A

Function	hypre_BoomerAMGBuildMultipass.extracted.34
Source file and lines	par_multi_interp.c:917-1099
Module	exec

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Too many paths. If you really need to analyze all of the 2705 paths individually, rerun with max-paths=2705
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Vectorization

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with ffast-math (included in Ofast) to extend loop vectorization to FP reductions.
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This loop is probably writing/copying data or processing integer elements.

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 192 bytes. The binary loop is storing 24 bytes.

General properties

nb instructions	68
nb uops	68
loop length	279
used x86 registers	10
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	13

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	11.67 cycles
front end	11.67 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	6.40	6.40	8.00	8.00	1.50	6.40	6.40	1.50	1.50	1.50	6.40	8.00
cycles	6.40	6.40	8.00	8.00	1.50	6.40	6.40	1.50	1.50	1.50	6.40	8.00

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	11.67
Dispatch	8.00
Overall L1	11.67

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 11.67 cycles. At this rate:

8% of peak load performance is reached (16.46 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
1% of peak store performance is reached (2.06 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the loop is: 445352

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
MOV -0x38(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
INC %R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0xa8(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x50(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP 0x8(%RDX,%RSI,8),%R8	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JGE 445640 <hypre_BoomerAMGBuildMultipass.extracted.34+0xdc0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x128(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RDX,%R8,8),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x118(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %R10,(%RDX,%R14,8)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JNE 445344 <hypre_BoomerAMGBuildMultipass.extracted.34+0xac4>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x58(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x8(%RDX,%R14,8),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
TEST %R10,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JLE 4454d7 <hypre_BoomerAMGBuildMultipass.extracted.34+0xc57>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x90(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R14,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV (%RDX,%R14,8),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %R11,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV -0x40(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x8(%RDX,%R12,8),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA 0x1(%R11),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RDX,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
CMOVLE %RDX,%R10	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	scal (12.5%)
MOV %R10,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %R11,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CMP $0x4,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RDX,-0xd0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JAE 44540b <hypre_BoomerAMGBuildMultipass.extracted.34+0xb8b>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0xd0(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R9,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x4,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
CMP %R9,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JAE 4454d3 <hypre_BoomerAMGBuildMultipass.extracted.34+0xc53>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
ADD %RDX,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x30(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JMP 4453ec <hypre_BoomerAMGBuildMultipass.extracted.34+0xb6c>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
SHR $0x2,%RDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
LEA 0x18(%RSI,%R11,8),%R13	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
JMP 445429 <hypre_BoomerAMGBuildMultipass.extracted.34+0xba9>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
MOV -0x30(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x8(%RDX,%R14,8),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
TEST %R10,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JLE 445340 <hypre_BoomerAMGBuildMultipass.extracted.34+0xac0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x98(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RDX,%R14,8),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %R9,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV -0x48(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x8(%RDX,%R12,8),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA 0x1(%R9),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RDX,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
CMOVLE %RDX,%R10	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	scal (12.5%)
MOV %R10,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %R9,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CMP $0x4,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %R11,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JAE 44556b <hypre_BoomerAMGBuildMultipass.extracted.34+0xceb>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x30(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDX,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x4,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
CMP %RDX,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JAE 445340 <hypre_BoomerAMGBuildMultipass.extracted.34+0xac0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
ADD %R11,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JMP 44554c <hypre_BoomerAMGBuildMultipass.extracted.34+0xccc>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
SHR $0x2,%R11	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
LEA 0x18(%RSI,%R9,8),%R14	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
JMP 445589 <hypre_BoomerAMGBuildMultipass.extracted.34+0xd09>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A

Report Configuration

Vectorization

Details

Workaround

Execution units bottlenecks

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Vectorization

Details

Workaround

Execution units bottlenecks

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code