OV - exec - Function hypre_CSRMatrixMatvecOutOfPlace.extracted

	Function: hypre_CSRMatrixMatvecOutOfPlace.extracted	Module: exec	Source: csr_matvec.c:243-404 [...]	Coverage (incl. loops): 21.17% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c: 243 - 404

--------------------------------------------------------------------------------

243: #pragma omp parallel private(i,jj,tempx)

244: #endif

245:       {

246:       HYPRE_Int iBegin = hypre_CSRMatrixGetLoadBalancedPartitionBegin(A);

247:       HYPRE_Int iEnd = hypre_CSRMatrixGetLoadBalancedPartitionEnd(A);

248:       hypre_assert(iBegin <= iEnd);

249:       hypre_assert(iBegin >= 0 && iBegin <= num_rows);

250:       hypre_assert(iEnd >= 0 && iEnd <= num_rows);

251:

252:       if (0 == temp)

253:       {

254:          if (1 == alpha) // JSP: a common path

255:          {

256:             for (i = iBegin; i < iEnd; i++)

257:             {

258:                tempx = 0.0;

259:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

260:                {

261:                   tempx += A_data[jj] * x_data[A_j[jj]];

262:                }

263:                y_data[i] = tempx;

264:             }

265:          } // y = A*x

266:          else if (-1 == alpha)

267:          {

268:             for (i = iBegin; i < iEnd; i++)

269:             {

270:                tempx = 0.0;

271:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

272:                {

273:                   tempx -= A_data[jj] * x_data[A_j[jj]];

274:                }

275:                y_data[i] = tempx;

276:             }

277:          } // y = -A*x

278:          else

279:          {

280:             for (i = iBegin; i < iEnd; i++)

281:             {

282:                tempx = 0.0;

283:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

284:                {

285:                   tempx += A_data[jj] * x_data[A_j[jj]];

286:                }

287:                y_data[i] = alpha*tempx;

288:             }

289:          } // y = alpha*A*x

290:       } // temp == 0

291:       else if (-1 == temp) // beta == -alpha

292:       {

293:          if (1 == alpha) // JSP: a common path

294:          {

295:             for (i = iBegin; i < iEnd; i++)

296:             {

297:                tempx = -b_data[i];

298:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

299:                {

300:                   tempx += A_data[jj] * x_data[A_j[jj]];

301:                }

302:                y_data[i] = tempx;

303:             }

304:          } // y = A*x - y

305:          else if (-1 == alpha) // JSP: a common path

306:          {

307:             for (i = iBegin; i < iEnd; i++)

308:             {

309:                tempx = b_data[i];

310:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

311:                {

312:                   tempx -= A_data[jj] * x_data[A_j[jj]];

313:                }

314:                y_data[i] = tempx;

315:             }

316:          } // y = -A*x + y

317:          else

318:          {

319:             for (i = iBegin; i < iEnd; i++)

320:             {

321:                tempx = -b_data[i];

322:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

323:                {

324:                   tempx += A_data[jj] * x_data[A_j[jj]];

325:                }

326:                y_data[i] = alpha*tempx;

327:             }

328:          } // y = alpha*(A*x - y)

329:       } // temp == -1

330:       else if (1 == temp)

331:       {

332:          if (1 == alpha) // JSP: a common path

333:          {

334:             for (i = iBegin; i < iEnd; i++)

335:             {

336:                tempx = b_data[i];

337:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

338:                {

339:                   tempx += A_data[jj] * x_data[A_j[jj]];

340:                }

341:                y_data[i] = tempx;

342:             }

343:          } // y = A*x + y

344:          else if (-1 == alpha)

345:          {

346:             for (i = iBegin; i < iEnd; i++)

347:             {

348:                tempx = -b_data[i];

349:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

350:                {

351:                   tempx -= A_data[jj] * x_data[A_j[jj]];

352:                }

353:                y_data[i] = tempx;

354:             }

355:          } // y = -A*x - y

356:          else

357:          {

358:             for (i = iBegin; i < iEnd; i++)

359:             {

360:                tempx = b_data[i];

361:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

362:                {

363:                   tempx += A_data[jj] * x_data[A_j[jj]];

364:                }

365:                y_data[i] = alpha*tempx;

[...]

371:          if (1 == alpha) // JSP: a common path

372:          {

373:             for (i = iBegin; i < iEnd; i++)

374:             {

375:                tempx = b_data[i]*temp;

376:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

377:                {

378:                   tempx += A_data[jj] * x_data[A_j[jj]];

379:                }

380:                y_data[i] = tempx;

381:             }

382:          } // y = A*x + temp*y

383:          else if (-1 == alpha)

384:          {

385:             for (i = iBegin; i < iEnd; i++)

386:             {

387:                tempx = -b_data[i]*temp;

388:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

389:                {

390:                   tempx -= A_data[jj] * x_data[A_j[jj]];

391:                }

392:                y_data[i] = tempx;

393:             }

394:          } // y = -A*x - temp*y

395:          else

396:          {

397:             for (i = iBegin; i < iEnd; i++)

398:             {

399:                tempx = b_data[i]*temp;

400:                for (jj = A_i[i]; jj < A_i[i+1]; jj++)

401:                {

402:                   tempx += A_data[jj] * x_data[A_j[jj]];

403:                }

404:                y_data[i] = alpha*tempx;

0x4de130 PUSH	%RBP

0x4de131 MOV	%RSP,%RBP

0x4de134 PUSH	%R15

0x4de136 PUSH	%R14

0x4de138 PUSH	%R13

0x4de13a PUSH	%R12

0x4de13c PUSH	%RBX

0x4de13d SUB	$0x18,%RSP

0x4de141 MOV	%R9,%RBX

0x4de144 MOV	%R8,%R14

0x4de147 MOV	%RCX,%R12

0x4de14a MOV	%RDX,-0x38(%RBP)

0x4de14e MOV	%RCX,%RDI

0x4de151 CALL	4dcbc0 <hypre_CSRMatrixGetLoadBalancedPartitionBegin>

0x4de156 MOV	%R12,%RDI

0x4de159 MOV	%RAX,%R12

0x4de15c CALL	4dcc40 <hypre_CSRMatrixGetLoadBalancedPartitionEnd>

0x4de161 MOV	%RAX,%R15

0x4de164 CMP	%RAX,%R12

0x4de167 JLE	4de197

0x4de169 MOV	0x59a50(%RIP),%RDI

0x4de170 MOV	$0x510823,%ESI

0x4de175 MOV	$0x512699,%EDX

0x4de17a XOR	%EAX,%EAX

0x4de17c CALL	4e7540 <hypre_fprintf>

0x4de181 MOV	$0x512fe1,%EDI

0x4de186 MOV	$0xf8,%ESI

0x4de18b MOV	$0x1,%EDX

0x4de190 XOR	%ECX,%ECX

0x4de192 CALL	4e9c60 <hypre_error_handler>

0x4de197 MOV	0x18(%RBP),%R13

0x4de19b TEST	%R12,%R12

0x4de19e JS	4de1a5

0x4de1a0 CMP	%R13,%R12

0x4de1a3 JLE	4de1d3

0x4de1a5 MOV	0x59a14(%RIP),%RDI

0x4de1ac MOV	$0x510823,%ESI

0x4de1b1 MOV	$0x51305f,%EDX

0x4de1b6 XOR	%EAX,%EAX

0x4de1b8 CALL	4e7540 <hypre_fprintf>

0x4de1bd MOV	$0x512fe1,%EDI

0x4de1c2 MOV	$0xf9,%ESI

0x4de1c7 MOV	$0x1,%EDX

0x4de1cc XOR	%ECX,%ECX

0x4de1ce CALL	4e9c60 <hypre_error_handler>

0x4de1d3 VMOVSD	0x38(%RBP),%XMM5

0x4de1d8 TEST	%R15,%R15

0x4de1db JS	4de1e2

0x4de1dd CMP	%R13,%R15

0x4de1e0 JLE	4de215

0x4de1e2 MOV	0x599d7(%RIP),%RDI

0x4de1e9 MOV	$0x510823,%ESI

0x4de1ee MOV	$0x513081,%EDX

0x4de1f3 XOR	%EAX,%EAX

0x4de1f5 CALL	4e7540 <hypre_fprintf>

0x4de1fa MOV	$0x512fe1,%EDI

0x4de1ff MOV	$0xfa,%ESI

0x4de204 MOV	$0x1,%EDX

0x4de209 XOR	%ECX,%ECX

0x4de20b CALL	4e9c60 <hypre_error_handler>

0x4de210 VMOVSD	0x38(%RBP),%XMM5

0x4de215 MOV	0x20(%RBP),%RCX

0x4de219 MOV	0x10(%RBP),%RDX

0x4de21d VMOVSD	-0x38(%RBP),%XMM0

0x4de222 VXORPD	%XMM1,%XMM1,%XMM1

0x4de226 VUCOMISD	%XMM1,%XMM5

0x4de22a MOV	%R12,-0x38(%RBP)

0x4de22e MOV	%RBX,-0x30(%RBP)

0x4de232 JNE	4de33c

0x4de238 VUCOMISD	0x20dd0(%RIP),%XMM0

0x4de240 JNE	4de45c

0x4de246 CMP	%R15,%R12

0x4de249 JGE	4dee9c

0x4de24f MOV	%R12,%RAX

0x4de252 NOT	%RAX

0x4de255 ADD	%RAX,%R15

0x4de258 XOR	%ESI,%ESI

0x4de25a JMP	4de279

0x4de25c NOPL	(%RAX)

(4312) 0x4de260 MOV	0x30(%RBP),%RAX

(4312) 0x4de264 VMOVSD	%XMM0,(%RAX,%RDI,8)

(4312) 0x4de269 LEA	0x1(%RSI),%RAX

(4312) 0x4de26d CMP	%R15,%RSI

(4312) 0x4de270 MOV	%RAX,%RSI

(4312) 0x4de273 JE	4dee9c

(4312) 0x4de279 LEA	(%R12,%RSI,1),%RDI

(4312) 0x4de27d MOV	(%RBX,%RDI,8),%R10

(4312) 0x4de281 MOV	0x8(%RBX,%RDI,8),%R8

(4312) 0x4de286 VXORPD	%XMM0,%XMM0,%XMM0

(4312) 0x4de28a MOV	%R8,%R11

(4312) 0x4de28d SUB	%R10,%R11

(4312) 0x4de290 JLE	4de260

(4312) 0x4de292 MOV	%R11,%R9

(4312) 0x4de295 AND	$-0x4,%R9

(4312) 0x4de299 JE	4de30e

(4312) 0x4de29b MOV	%R15,%RBX

(4312) 0x4de29e LEA	-0x1(%R9),%R15

(4312) 0x4de2a2 LEA	(%R14,%R10,8),%R13

(4312) 0x4de2a6 LEA	(%RDX,%R10,8),%RAX

(4312) 0x4de2aa VXORPD	%XMM0,%XMM0,%XMM0

(4312) 0x4de2ae XOR	%R12D,%R12D

(4312) 0x4de2b1 NOPW	%CS:(%RAX,%RAX,1)

  (4314) 0x4de2c0 VMOVUPD	(%RAX,%R12,8),%YMM1

  (4314) 0x4de2c6 KXNORW	%K0,%K0,%K1

  (4314) 0x4de2ca VXORPD	%XMM2,%XMM2,%XMM2

  (4314) 0x4de2ce VGATHERQPD	(%RCX,%YMM1,8),%YMM2{%K1}

  (4314) 0x4de2d5 VFMADD231PD	(%R13,%R12,8),%YMM2,%YMM0

  (4314) 0x4de2dc ADD	$0x4,%R12

  (4314) 0x4de2e0 CMP	%R15,%R12

  (4314) 0x4de2e3 JBE	4de2c0

(4312) 0x4de2e5 VEXTRACTF128	$0x1,%YMM0,%XMM1

(4312) 0x4de2eb VADDPD	%XMM1,%XMM0,%XMM0

(4312) 0x4de2ef VSHUFPD	$0x1,%XMM0,%XMM0,%XMM1

(4312) 0x4de2f4 VADDSD	%XMM1,%XMM0,%XMM0

(4312) 0x4de2f8 CMP	%R9,%R11

(4312) 0x4de2fb MOV	-0x38(%RBP),%R12

(4312) 0x4de2ff MOV	%RBX,%R15

(4312) 0x4de302 MOV	-0x30(%RBP),%RBX

(4312) 0x4de306 JE	4de260

(4312) 0x4de30c JMP	4de311

(4312) 0x4de30e XOR	%R9D,%R9D

(4312) 0x4de311 ADD	%R10,%R9

(4312) 0x4de314 NOPW	%CS:(%RAX,%RAX,1)

  (4313) 0x4de320 MOV	(%RDX,%R9,8),%RAX

  (4313) 0x4de324 VMOVSD	(%RCX,%RAX,8),%XMM1

  (4313) 0x4de329 VFMADD231SD	(%R14,%R9,8),%XMM1,%XMM0

  (4313) 0x4de32f INC	%R9

  (4313) 0x4de332 CMP	%R9,%R8

  (4313) 0x4de335 JNE	4de320

(4312) 0x4de337 JMP	4de260

0x4de33c VUCOMISD	0x21b44(%RIP),%XMM5

0x4de344 MOV	%R15,%RSI

0x4de347 JNE	4de55c

0x4de34d VUCOMISD	0x20cbb(%RIP),%XMM0

0x4de355 JNE	4de67c

0x4de35b CMP	%RSI,%R12

0x4de35e MOV	0x28(%RBP),%R15

0x4de362 JGE	4dee9c

0x4de368 MOV	%R12,%RAX

0x4de36b NOT	%RAX

0x4de36e ADD	%RAX,%RSI

0x4de371 XOR	%EDI,%EDI

0x4de373 VMOVDDUP	0x218c5(%RIP),%XMM0

0x4de37b JMP	4de39a

0x4de37d NOPL	(%RAX)

(4303) 0x4de380 MOV	0x30(%RBP),%RAX

(4303) 0x4de384 VMOVSD	%XMM1,(%RAX,%R8,8)

(4303) 0x4de38a LEA	0x1(%RDI),%RAX

(4303) 0x4de38e CMP	%RSI,%RDI

(4303) 0x4de391 MOV	%RAX,%RDI

(4303) 0x4de394 JE	4dee9c

(4303) 0x4de39a LEA	(%R12,%RDI,1),%R8

(4303) 0x4de39e VMOVSD	(%R15,%R8,8),%XMM1

(4303) 0x4de3a4 VXORPD	%XMM0,%XMM1,%XMM1

(4303) 0x4de3a8 MOV	(%RBX,%R8,8),%R11

(4303) 0x4de3ac MOV	0x8(%RBX,%R8,8),%R9

(4303) 0x4de3b1 MOV	%R9,%R13

(4303) 0x4de3b4 SUB	%R11,%R13

(4303) 0x4de3b7 JLE	4de380

(4303) 0x4de3b9 MOV	%R13,%R10

(4303) 0x4de3bc AND	$-0x4,%R10

(4303) 0x4de3c0 JE	4de435

(4303) 0x4de3c2 MOV	%RSI,%RBX

(4303) 0x4de3c5 LEA	-0x1(%R10),%R15

(4303) 0x4de3c9 LEA	(%R14,%R11,8),%RSI

(4303) 0x4de3cd LEA	(%RDX,%R11,8),%RAX

(4303) 0x4de3d1 VXORPD	%XMM2,%XMM2,%XMM2

(4303) 0x4de3d5 XOR	%R12D,%R12D

(4303) 0x4de3d8 NOPL	(%RAX,%RAX,1)

  (4305) 0x4de3e0 VMOVUPD	(%RAX,%R12,8),%YMM3

  (4305) 0x4de3e6 KXNORW	%K0,%K0,%K1

  (4305) 0x4de3ea VXORPD	%XMM4,%XMM4,%XMM4

  (4305) 0x4de3ee VGATHERQPD	(%RCX,%YMM3,8),%YMM4{%K1}

  (4305) 0x4de3f5 VFMADD231PD	(%RSI,%R12,8),%YMM4,%YMM2

  (4305) 0x4de3fb ADD	$0x4,%R12

  (4305) 0x4de3ff CMP	%R15,%R12

  (4305) 0x4de402 JBE	4de3e0

(4303) 0x4de404 VEXTRACTF128	$0x1,%YMM2,%XMM3

(4303) 0x4de40a VADDPD	%XMM3,%XMM2,%XMM2

(4303) 0x4de40e VSHUFPD	$0x1,%XMM2,%XMM2,%XMM3

(4303) 0x4de413 VADDSD	%XMM3,%XMM2,%XMM2

(4303) 0x4de417 VADDSD	%XMM2,%XMM1,%XMM1

(4303) 0x4de41b CMP	%R10,%R13

(4303) 0x4de41e MOV	-0x38(%RBP),%R12

(4303) 0x4de422 MOV	%RBX,%RSI

(4303) 0x4de425 MOV	-0x30(%RBP),%RBX

(4303) 0x4de429 MOV	0x28(%RBP),%R15

(4303) 0x4de42d JE	4de380

(4303) 0x4de433 JMP	4de438

(4303) 0x4de435 XOR	%R10D,%R10D

(4303) 0x4de438 ADD	%R11,%R10

(4303) 0x4de43b NOPL	(%RAX,%RAX,1)

  (4304) 0x4de440 MOV	(%RDX,%R10,8),%RAX

  (4304) 0x4de444 VMOVSD	(%RCX,%RAX,8),%XMM2

  (4304) 0x4de449 VFMADD231SD	(%R14,%R10,8),%XMM2,%XMM1

  (4304) 0x4de44f INC	%R10

  (4304) 0x4de452 CMP	%R10,%R9

  (4304) 0x4de455 JNE	4de440

(4303) 0x4de457 JMP	4de380

0x4de45c VUCOMISD	0x21a24(%RIP),%XMM0

0x4de464 JNE	4de78c

0x4de46a CMP	%R15,%R12

0x4de46d JGE	4dee9c

0x4de473 MOV	%R12,%RAX

0x4de476 NOT	%RAX

0x4de479 ADD	%RAX,%R15

0x4de47c XOR	%ESI,%ESI

0x4de47e JMP	4de499

(4309) 0x4de480 MOV	0x30(%RBP),%RAX

(4309) 0x4de484 VMOVSD	%XMM0,(%RAX,%RDI,8)

(4309) 0x4de489 LEA	0x1(%RSI),%RAX

(4309) 0x4de48d CMP	%R15,%RSI

(4309) 0x4de490 MOV	%RAX,%RSI

(4309) 0x4de493 JE	4dee9c

(4309) 0x4de499 LEA	(%R12,%RSI,1),%RDI

(4309) 0x4de49d MOV	(%RBX,%RDI,8),%R10

(4309) 0x4de4a1 MOV	0x8(%RBX,%RDI,8),%R8

(4309) 0x4de4a6 VXORPD	%XMM0,%XMM0,%XMM0

(4309) 0x4de4aa MOV	%R8,%R11

(4309) 0x4de4ad SUB	%R10,%R11

(4309) 0x4de4b0 JLE	4de480

(4309) 0x4de4b2 MOV	%R11,%R9

(4309) 0x4de4b5 AND	$-0x4,%R9

(4309) 0x4de4b9 JE	4de52e

(4309) 0x4de4bb MOV	%R15,%RBX

(4309) 0x4de4be LEA	-0x1(%R9),%R15

(4309) 0x4de4c2 LEA	(%R14,%R10,8),%R13

(4309) 0x4de4c6 LEA	(%RDX,%R10,8),%RAX

(4309) 0x4de4ca VXORPD	%XMM0,%XMM0,%XMM0

(4309) 0x4de4ce XOR	%R12D,%R12D

(4309) 0x4de4d1 NOPW	%CS:(%RAX,%RAX,1)

  (4311) 0x4de4e0 VMOVUPD	(%RAX,%R12,8),%YMM1

  (4311) 0x4de4e6 VXORPD	%XMM2,%XMM2,%XMM2

  (4311) 0x4de4ea KXNORW	%K0,%K0,%K1

  (4311) 0x4de4ee VGATHERQPD	(%RCX,%YMM1,8),%YMM2{%K1}

  (4311) 0x4de4f5 VFNMADD231PD	(%R13,%R12,8),%YMM2,%YMM0

  (4311) 0x4de4fc ADD	$0x4,%R12

  (4311) 0x4de500 CMP	%R15,%R12

  (4311) 0x4de503 JBE	4de4e0

(4309) 0x4de505 VEXTRACTF128	$0x1,%YMM0,%XMM1

(4309) 0x4de50b VADDPD	%XMM1,%XMM0,%XMM0

(4309) 0x4de50f VSHUFPD	$0x1,%XMM0,%XMM0,%XMM1

(4309) 0x4de514 VADDSD	%XMM1,%XMM0,%XMM0

(4309) 0x4de518 CMP	%R9,%R11

(4309) 0x4de51b MOV	-0x38(%RBP),%R12

(4309) 0x4de51f MOV	%RBX,%R15

(4309) 0x4de522 MOV	-0x30(%RBP),%RBX

(4309) 0x4de526 JE	4de480

(4309) 0x4de52c JMP	4de531

(4309) 0x4de52e XOR	%R9D,%R9D

(4309) 0x4de531 ADD	%R10,%R9

(4309) 0x4de534 NOPW	%CS:(%RAX,%RAX,1)

  (4310) 0x4de540 MOV	(%RDX,%R9,8),%RAX

  (4310) 0x4de544 VMOVSD	(%RCX,%RAX,8),%XMM1

  (4310) 0x4de549 VFNMADD231SD	(%R14,%R9,8),%XMM1,%XMM0

  (4310) 0x4de54f INC	%R9

  (4310) 0x4de552 CMP	%R9,%R8

  (4310) 0x4de555 JNE	4de540

(4309) 0x4de557 JMP	4de480

0x4de55c VUCOMISD	0x20aac(%RIP),%XMM5

0x4de564 JNE	4de88c

0x4de56a VUCOMISD	0x20a9e(%RIP),%XMM0

0x4de572 JNE	4de99c

0x4de578 CMP	%RSI,%R12

0x4de57b MOV	0x28(%RBP),%R15

0x4de57f JGE	4dee9c

0x4de585 MOV	%R12,%RAX

0x4de588 NOT	%RAX

0x4de58b ADD	%RAX,%RSI

0x4de58e XOR	%EDI,%EDI

0x4de590 MOV	%RSI,-0x30(%RBP)

0x4de594 JMP	4de5ba

0x4de596 NOPW	%CS:(%RAX,%RAX,1)

(4294) 0x4de5a0 MOV	0x30(%RBP),%RAX

(4294) 0x4de5a4 VMOVSD	%XMM0,(%RAX,%R8,8)

(4294) 0x4de5aa LEA	0x1(%RDI),%RAX

(4294) 0x4de5ae CMP	%RSI,%RDI

(4294) 0x4de5b1 MOV	%RAX,%RDI

(4294) 0x4de5b4 JE	4dee9c

(4294) 0x4de5ba LEA	(%R12,%RDI,1),%R8

(4294) 0x4de5be VMOVSD	(%R15,%R8,8),%XMM0

(4294) 0x4de5c4 MOV	(%RBX,%R8,8),%R11

(4294) 0x4de5c8 MOV	0x8(%RBX,%R8,8),%R9

(4294) 0x4de5cd MOV	%R9,%R13

(4294) 0x4de5d0 SUB	%R11,%R13

(4294) 0x4de5d3 JLE	4de5a0

(4294) 0x4de5d5 MOV	%R13,%R10

(4294) 0x4de5d8 AND	$-0x4,%R10

(4294) 0x4de5dc JE	4de652

(4294) 0x4de5de LEA	-0x1(%R10),%R15

(4294) 0x4de5e2 LEA	(%R14,%R11,8),%RSI

(4294) 0x4de5e6 LEA	(%RDX,%R11,8),%RAX

(4294) 0x4de5ea VXORPD	%XMM1,%XMM1,%XMM1

(4294) 0x4de5ee XOR	%R12D,%R12D

(4294) 0x4de5f1 NOPW	%CS:(%RAX,%RAX,1)

  (4296) 0x4de600 VMOVUPD	(%RAX,%R12,8),%YMM2

  (4296) 0x4de606 VXORPD	%XMM3,%XMM3,%XMM3

  (4296) 0x4de60a KXNORW	%K0,%K0,%K1

  (4296) 0x4de60e VGATHERQPD	(%RCX,%YMM2,8),%YMM3{%K1}

  (4296) 0x4de615 VFMADD231PD	(%RSI,%R12,8),%YMM3,%YMM1

  (4296) 0x4de61b ADD	$0x4,%R12

  (4296) 0x4de61f CMP	%R15,%R12

  (4296) 0x4de622 JBE	4de600

(4294) 0x4de624 VEXTRACTF128	$0x1,%YMM1,%XMM2

(4294) 0x4de62a VADDPD	%XMM2,%XMM1,%XMM1

(4294) 0x4de62e VSHUFPD	$0x1,%XMM1,%XMM1,%XMM2

(4294) 0x4de633 VADDSD	%XMM2,%XMM1,%XMM1

(4294) 0x4de637 VADDSD	%XMM1,%XMM0,%XMM0

(4294) 0x4de63b CMP	%R10,%R13

(4294) 0x4de63e MOV	-0x38(%RBP),%R12

(4294) 0x4de642 MOV	-0x30(%RBP),%RSI

(4294) 0x4de646 MOV	0x28(%RBP),%R15

(4294) 0x4de64a JE	4de5a0

(4294) 0x4de650 JMP	4de655

(4294) 0x4de652 XOR	%R10D,%R10D

(4294) 0x4de655 ADD	%R11,%R10

(4294) 0x4de658 NOPL	(%RAX,%RAX,1)

  (4295) 0x4de660 MOV	(%RDX,%R10,8),%RAX

  (4295) 0x4de664 VMOVSD	(%RCX,%RAX,8),%XMM1

  (4295) 0x4de669 VFMADD231SD	(%R14,%R10,8),%XMM1,%XMM0

  (4295) 0x4de66f INC	%R10

  (4295) 0x4de672 CMP	%R10,%R9

  (4295) 0x4de675 JNE	4de660

(4294) 0x4de677 JMP	4de5a0

0x4de67c VUCOMISD	0x21804(%RIP),%XMM0

0x4de684 MOV	0x28(%RBP),%R15

0x4de688 JNE	4deaac

0x4de68e CMP	%RSI,%R12

0x4de691 JGE	4dee9c

0x4de697 MOV	%R12,%RAX

0x4de69a NOT	%RAX

0x4de69d ADD	%RAX,%RSI

0x4de6a0 XOR	%EDI,%EDI

0x4de6a2 MOV	%RSI,-0x30(%RBP)

0x4de6a6 JMP	4de6ca

0x4de6a8 NOPL	(%RAX,%RAX,1)

(4300) 0x4de6b0 MOV	0x30(%RBP),%RAX

(4300) 0x4de6b4 VMOVSD	%XMM0,(%RAX,%R8,8)

(4300) 0x4de6ba LEA	0x1(%RDI),%RAX

(4300) 0x4de6be CMP	%RSI,%RDI

(4300) 0x4de6c1 MOV	%RAX,%RDI

(4300) 0x4de6c4 JE	4dee9c

(4300) 0x4de6ca LEA	(%R12,%RDI,1),%R8

(4300) 0x4de6ce VMOVSD	(%R15,%R8,8),%XMM0

(4300) 0x4de6d4 MOV	(%RBX,%R8,8),%R11

(4300) 0x4de6d8 MOV	0x8(%RBX,%R8,8),%R9

(4300) 0x4de6dd MOV	%R9,%R13

(4300) 0x4de6e0 SUB	%R11,%R13

(4300) 0x4de6e3 JLE	4de6b0

(4300) 0x4de6e5 MOV	%R13,%R10

(4300) 0x4de6e8 AND	$-0x4,%R10

(4300) 0x4de6ec JE	4de762

(4300) 0x4de6ee LEA	-0x1(%R10),%R15

(4300) 0x4de6f2 LEA	(%R14,%R11,8),%RSI

(4300) 0x4de6f6 LEA	(%RDX,%R11,8),%RAX

(4300) 0x4de6fa VXORPD	%XMM1,%XMM1,%XMM1

(4300) 0x4de6fe XOR	%R12D,%R12D

(4300) 0x4de701 NOPW	%CS:(%RAX,%RAX,1)

  (4302) 0x4de710 VMOVUPD	(%RAX,%R12,8),%YMM2

  (4302) 0x4de716 KXNORW	%K0,%K0,%K1

  (4302) 0x4de71a VXORPD	%XMM3,%XMM3,%XMM3

  (4302) 0x4de71e VGATHERQPD	(%RCX,%YMM2,8),%YMM3{%K1}

  (4302) 0x4de725 VFNMADD231PD	(%RSI,%R12,8),%YMM3,%YMM1

  (4302) 0x4de72b ADD	$0x4,%R12

  (4302) 0x4de72f CMP	%R15,%R12

  (4302) 0x4de732 JBE	4de710

(4300) 0x4de734 VEXTRACTF128	$0x1,%YMM1,%XMM2

(4300) 0x4de73a VADDPD	%XMM2,%XMM1,%XMM1

(4300) 0x4de73e VSHUFPD	$0x1,%XMM1,%XMM1,%XMM2

(4300) 0x4de743 VADDSD	%XMM2,%XMM1,%XMM1

(4300) 0x4de747 VADDSD	%XMM1,%XMM0,%XMM0

(4300) 0x4de74b CMP	%R10,%R13

(4300) 0x4de74e MOV	-0x38(%RBP),%R12

(4300) 0x4de752 MOV	-0x30(%RBP),%RSI

(4300) 0x4de756 MOV	0x28(%RBP),%R15

(4300) 0x4de75a JE	4de6b0

(4300) 0x4de760 JMP	4de765

(4300) 0x4de762 XOR	%R10D,%R10D

(4300) 0x4de765 ADD	%R11,%R10

(4300) 0x4de768 NOPL	(%RAX,%RAX,1)

  (4301) 0x4de770 MOV	(%RDX,%R10,8),%RAX

  (4301) 0x4de774 VMOVSD	(%RCX,%RAX,8),%XMM1

  (4301) 0x4de779 VFNMADD231SD	(%R14,%R10,8),%XMM1,%XMM0

  (4301) 0x4de77f INC	%R10

  (4301) 0x4de782 CMP	%R10,%R9

  (4301) 0x4de785 JNE	4de770

(4300) 0x4de787 JMP	4de6b0

0x4de78c CMP	%R15,%R12

0x4de78f JGE	4dee9c

0x4de795 MOV	%R12,%RAX

0x4de798 NOT	%RAX

0x4de79b ADD	%RAX,%R15

0x4de79e XOR	%ESI,%ESI

0x4de7a0 JMP	4de7cd

0x4de7a2 NOPW	%CS:(%RAX,%RAX,1)

(4306) 0x4de7b0 VMULSD	%XMM0,%XMM1,%XMM1

(4306) 0x4de7b4 MOV	0x30(%RBP),%RAX

(4306) 0x4de7b8 VMOVSD	%XMM1,(%RAX,%RDI,8)

(4306) 0x4de7bd LEA	0x1(%RSI),%RAX

(4306) 0x4de7c1 CMP	%R15,%RSI

(4306) 0x4de7c4 MOV	%RAX,%RSI

(4306) 0x4de7c7 JE	4dee9c

(4306) 0x4de7cd LEA	(%R12,%RSI,1),%RDI

(4306) 0x4de7d1 MOV	(%RBX,%RDI,8),%R10

(4306) 0x4de7d5 MOV	0x8(%RBX,%RDI,8),%R8

(4306) 0x4de7da VXORPD	%XMM1,%XMM1,%XMM1

(4306) 0x4de7de MOV	%R8,%R11

(4306) 0x4de7e1 SUB	%R10,%R11

(4306) 0x4de7e4 JLE	4de7b0

(4306) 0x4de7e6 MOV	%R11,%R9

(4306) 0x4de7e9 AND	$-0x4,%R9

(4306) 0x4de7ed JE	4de85e

(4306) 0x4de7ef MOV	%R15,%RBX

(4306) 0x4de7f2 LEA	-0x1(%R9),%R15

(4306) 0x4de7f6 LEA	(%R14,%R10,8),%R13

(4306) 0x4de7fa LEA	(%RDX,%R10,8),%RAX

(4306) 0x4de7fe VXORPD	%XMM1,%XMM1,%XMM1

(4306) 0x4de802 XOR	%R12D,%R12D

(4306) 0x4de805 NOPW	%CS:(%RAX,%RAX,1)

  (4308) 0x4de810 VMOVUPD	(%RAX,%R12,8),%YMM2

  (4308) 0x4de816 VXORPD	%XMM3,%XMM3,%XMM3

  (4308) 0x4de81a KXNORW	%K0,%K0,%K1

  (4308) 0x4de81e VGATHERQPD	(%RCX,%YMM2,8),%YMM3{%K1}

  (4308) 0x4de825 VFMADD231PD	(%R13,%R12,8),%YMM3,%YMM1

  (4308) 0x4de82c ADD	$0x4,%R12

  (4308) 0x4de830 CMP	%R15,%R12

  (4308) 0x4de833 JBE	4de810

(4306) 0x4de835 VEXTRACTF128	$0x1,%YMM1,%XMM2

(4306) 0x4de83b VADDPD	%XMM2,%XMM1,%XMM1

(4306) 0x4de83f VSHUFPD	$0x1,%XMM1,%XMM1,%XMM2

(4306) 0x4de844 VADDSD	%XMM2,%XMM1,%XMM1

(4306) 0x4de848 CMP	%R9,%R11

(4306) 0x4de84b MOV	-0x38(%RBP),%R12

(4306) 0x4de84f MOV	%RBX,%R15

(4306) 0x4de852 MOV	-0x30(%RBP),%RBX

(4306) 0x4de856 JE	4de7b0

(4306) 0x4de85c JMP	4de861

(4306) 0x4de85e XOR	%R9D,%R9D

(4306) 0x4de861 ADD	%R10,%R9

(4306) 0x4de864 NOPW	%CS:(%RAX,%RAX,1)

  (4307) 0x4de870 MOV	(%RDX,%R9,8),%RAX

  (4307) 0x4de874 VMOVSD	(%RCX,%RAX,8),%XMM2

  (4307) 0x4de879 VFMADD231SD	(%R14,%R9,8),%XMM2,%XMM1

  (4307) 0x4de87f INC	%R9

  (4307) 0x4de882 CMP	%R9,%R8

  (4307) 0x4de885 JNE	4de870

(4306) 0x4de887 JMP	4de7b0

0x4de88c VUCOMISD	0x2077c(%RIP),%XMM0

0x4de894 JNE	4debac

0x4de89a CMP	%RSI,%R12

0x4de89d MOV	0x28(%RBP),%R15

0x4de8a1 JGE	4dee9c

0x4de8a7 MOV	%R12,%RAX

0x4de8aa NOT	%RAX

0x4de8ad ADD	%RAX,%RSI

0x4de8b0 XOR	%EDI,%EDI

0x4de8b2 MOV	%RSI,-0x30(%RBP)

0x4de8b6 JMP	4de8da

0x4de8b8 NOPL	(%RAX,%RAX,1)

(4285) 0x4de8c0 MOV	0x30(%RBP),%RAX

(4285) 0x4de8c4 VMOVSD	%XMM0,(%RAX,%R8,8)

(4285) 0x4de8ca LEA	0x1(%RDI),%RAX

(4285) 0x4de8ce CMP	%RSI,%RDI

(4285) 0x4de8d1 MOV	%RAX,%RDI

(4285) 0x4de8d4 JE	4dee9c

(4285) 0x4de8da LEA	(%R12,%RDI,1),%R8

(4285) 0x4de8de VMULSD	(%R15,%R8,8),%XMM5,%XMM0

(4285) 0x4de8e4 MOV	(%RBX,%R8,8),%R11

(4285) 0x4de8e8 MOV	0x8(%RBX,%R8,8),%R9

(4285) 0x4de8ed MOV	%R9,%R13

(4285) 0x4de8f0 SUB	%R11,%R13

(4285) 0x4de8f3 JLE	4de8c0

(4285) 0x4de8f5 MOV	%R13,%R10

(4285) 0x4de8f8 AND	$-0x4,%R10

(4285) 0x4de8fc JE	4de972

(4285) 0x4de8fe LEA	-0x1(%R10),%R15

(4285) 0x4de902 LEA	(%R14,%R11,8),%RSI

(4285) 0x4de906 LEA	(%RDX,%R11,8),%RAX

(4285) 0x4de90a VXORPD	%XMM1,%XMM1,%XMM1

(4285) 0x4de90e XOR	%R12D,%R12D

(4285) 0x4de911 NOPW	%CS:(%RAX,%RAX,1)

  (4287) 0x4de920 VMOVUPD	(%RAX,%R12,8),%YMM2

  (4287) 0x4de926 KXNORW	%K0,%K0,%K1

  (4287) 0x4de92a VXORPD	%XMM3,%XMM3,%XMM3

  (4287) 0x4de92e VGATHERQPD	(%RCX,%YMM2,8),%YMM3{%K1}

  (4287) 0x4de935 VFMADD231PD	(%RSI,%R12,8),%YMM3,%YMM1

  (4287) 0x4de93b ADD	$0x4,%R12

  (4287) 0x4de93f CMP	%R15,%R12

  (4287) 0x4de942 JBE	4de920

(4285) 0x4de944 VEXTRACTF128	$0x1,%YMM1,%XMM2

(4285) 0x4de94a VADDPD	%XMM2,%XMM1,%XMM1

(4285) 0x4de94e VSHUFPD	$0x1,%XMM1,%XMM1,%XMM2

(4285) 0x4de953 VADDSD	%XMM2,%XMM1,%XMM1

(4285) 0x4de957 VADDSD	%XMM1,%XMM0,%XMM0

(4285) 0x4de95b CMP	%R10,%R13

(4285) 0x4de95e MOV	-0x38(%RBP),%R12

(4285) 0x4de962 MOV	-0x30(%RBP),%RSI

(4285) 0x4de966 MOV	0x28(%RBP),%R15

(4285) 0x4de96a JE	4de8c0

(4285) 0x4de970 JMP	4de975

(4285) 0x4de972 XOR	%R10D,%R10D

(4285) 0x4de975 ADD	%R11,%R10

(4285) 0x4de978 NOPL	(%RAX,%RAX,1)

  (4286) 0x4de980 MOV	(%RDX,%R10,8),%RAX

  (4286) 0x4de984 VMOVSD	(%RCX,%RAX,8),%XMM1

  (4286) 0x4de989 VFMADD231SD	(%R14,%R10,8),%XMM1,%XMM0

  (4286) 0x4de98f INC	%R10

  (4286) 0x4de992 CMP	%R10,%R9

  (4286) 0x4de995 JNE	4de980

(4285) 0x4de997 JMP	4de8c0

0x4de99c VUCOMISD	0x214e4(%RIP),%XMM0

0x4de9a4 MOV	0x28(%RBP),%R15

0x4de9a8 JNE	4decbc

0x4de9ae CMP	%RSI,%R12

0x4de9b1 JGE	4dee9c

0x4de9b7 MOV	%R12,%RAX

0x4de9ba NOT	%RAX

0x4de9bd ADD	%RAX,%RSI

0x4de9c0 XOR	%EDI,%EDI

0x4de9c2 VMOVDDUP	0x21276(%RIP),%XMM0

0x4de9ca MOV	%RSI,-0x30(%RBP)

0x4de9ce JMP	4de9ea

(4291) 0x4de9d0 MOV	0x30(%RBP),%RAX

(4291) 0x4de9d4 VMOVSD	%XMM1,(%RAX,%R8,8)

(4291) 0x4de9da LEA	0x1(%RDI),%RAX

(4291) 0x4de9de CMP	%RSI,%RDI

(4291) 0x4de9e1 MOV	%RAX,%RDI

(4291) 0x4de9e4 JE	4dee9c

(4291) 0x4de9ea LEA	(%R12,%RDI,1),%R8

(4291) 0x4de9ee VMOVSD	(%R15,%R8,8),%XMM1

(4291) 0x4de9f4 VXORPD	%XMM0,%XMM1,%XMM1

(4291) 0x4de9f8 MOV	(%RBX,%R8,8),%R11

(4291) 0x4de9fc MOV	0x8(%RBX,%R8,8),%R9

(4291) 0x4dea01 MOV	%R9,%R13

(4291) 0x4dea04 SUB	%R11,%R13

(4291) 0x4dea07 JLE	4de9d0

(4291) 0x4dea09 MOV	%R13,%R10

(4291) 0x4dea0c AND	$-0x4,%R10

(4291) 0x4dea10 JE	4dea82

(4291) 0x4dea12 LEA	-0x1(%R10),%R15

(4291) 0x4dea16 LEA	(%R14,%R11,8),%RSI

(4291) 0x4dea1a LEA	(%RDX,%R11,8),%RAX

(4291) 0x4dea1e VXORPD	%XMM2,%XMM2,%XMM2

(4291) 0x4dea22 XOR	%R12D,%R12D

(4291) 0x4dea25 NOPW	%CS:(%RAX,%RAX,1)

  (4293) 0x4dea30 VMOVUPD	(%RAX,%R12,8),%YMM3

  (4293) 0x4dea36 VXORPD	%XMM4,%XMM4,%XMM4

  (4293) 0x4dea3a KXNORW	%K0,%K0,%K1

  (4293) 0x4dea3e VGATHERQPD	(%RCX,%YMM3,8),%YMM4{%K1}

  (4293) 0x4dea45 VFNMADD231PD	(%RSI,%R12,8),%YMM4,%YMM2

  (4293) 0x4dea4b ADD	$0x4,%R12

  (4293) 0x4dea4f CMP	%R15,%R12

  (4293) 0x4dea52 JBE	4dea30

(4291) 0x4dea54 VEXTRACTF128	$0x1,%YMM2,%XMM3

(4291) 0x4dea5a VADDPD	%XMM3,%XMM2,%XMM2

(4291) 0x4dea5e VSHUFPD	$0x1,%XMM2,%XMM2,%XMM3

(4291) 0x4dea63 VADDSD	%XMM3,%XMM2,%XMM2

(4291) 0x4dea67 VADDSD	%XMM2,%XMM1,%XMM1

(4291) 0x4dea6b CMP	%R10,%R13

(4291) 0x4dea6e MOV	-0x38(%RBP),%R12

(4291) 0x4dea72 MOV	-0x30(%RBP),%RSI

(4291) 0x4dea76 MOV	0x28(%RBP),%R15

(4291) 0x4dea7a JE	4de9d0

(4291) 0x4dea80 JMP	4dea85

(4291) 0x4dea82 XOR	%R10D,%R10D

(4291) 0x4dea85 ADD	%R11,%R10

(4291) 0x4dea88 NOPL	(%RAX,%RAX,1)

  (4292) 0x4dea90 MOV	(%RDX,%R10,8),%RAX

  (4292) 0x4dea94 VMOVSD	(%RCX,%RAX,8),%XMM2

  (4292) 0x4dea99 VFNMADD231SD	(%R14,%R10,8),%XMM2,%XMM1

  (4292) 0x4dea9f INC	%R10

  (4292) 0x4deaa2 CMP	%R10,%R9

  (4292) 0x4deaa5 JNE	4dea90

(4291) 0x4deaa7 JMP	4de9d0

0x4deaac CMP	%RSI,%R12

0x4deaaf JGE	4dee9c

0x4deab5 MOV	%R12,%RAX

0x4deab8 NOT	%RAX

0x4deabb ADD	%RAX,%RSI

0x4deabe XOR	%EDI,%EDI

0x4deac0 VMOVDDUP	0x21178(%RIP),%XMM1

0x4deac8 MOV	%RSI,-0x30(%RBP)

0x4deacc JMP	4deaee

0x4deace XCHG	%AX,%AX

(4297) 0x4dead0 VMULSD	%XMM0,%XMM2,%XMM2

(4297) 0x4dead4 MOV	0x30(%RBP),%RAX

(4297) 0x4dead8 VMOVSD	%XMM2,(%RAX,%R8,8)

(4297) 0x4deade LEA	0x1(%RDI),%RAX

(4297) 0x4deae2 CMP	%RSI,%RDI

(4297) 0x4deae5 MOV	%RAX,%RDI

(4297) 0x4deae8 JE	4dee9c

(4297) 0x4deaee LEA	(%R12,%RDI,1),%R8

(4297) 0x4deaf2 VMOVSD	(%R15,%R8,8),%XMM2

(4297) 0x4deaf8 VXORPD	%XMM1,%XMM2,%XMM2

(4297) 0x4deafc MOV	(%RBX,%R8,8),%R11

(4297) 0x4deb00 MOV	0x8(%RBX,%R8,8),%R9

(4297) 0x4deb05 MOV	%R9,%R13

(4297) 0x4deb08 SUB	%R11,%R13

(4297) 0x4deb0b JLE	4dead0

(4297) 0x4deb0d MOV	%R13,%R10

(4297) 0x4deb10 AND	$-0x4,%R10

(4297) 0x4deb14 JE	4deb82

(4297) 0x4deb16 LEA	-0x1(%R10),%R15

(4297) 0x4deb1a LEA	(%R14,%R11,8),%RSI

(4297) 0x4deb1e LEA	(%RDX,%R11,8),%RAX

(4297) 0x4deb22 VXORPD	%XMM3,%XMM3,%XMM3

(4297) 0x4deb26 XOR	%R12D,%R12D

(4297) 0x4deb29 NOPL	(%RAX)

  (4299) 0x4deb30 VMOVUPD	(%RAX,%R12,8),%YMM4

  (4299) 0x4deb36 VXORPD	%XMM5,%XMM5,%XMM5

  (4299) 0x4deb3a KXNORW	%K0,%K0,%K1

  (4299) 0x4deb3e VGATHERQPD	(%RCX,%YMM4,8),%YMM5{%K1}

  (4299) 0x4deb45 VFMADD231PD	(%RSI,%R12,8),%YMM5,%YMM3

  (4299) 0x4deb4b ADD	$0x4,%R12

  (4299) 0x4deb4f CMP	%R15,%R12

  (4299) 0x4deb52 JBE	4deb30

(4297) 0x4deb54 VEXTRACTF128	$0x1,%YMM3,%XMM4

(4297) 0x4deb5a VADDPD	%XMM4,%XMM3,%XMM3

(4297) 0x4deb5e VSHUFPD	$0x1,%XMM3,%XMM3,%XMM4

(4297) 0x4deb63 VADDSD	%XMM4,%XMM3,%XMM3

(4297) 0x4deb67 VADDSD	%XMM3,%XMM2,%XMM2

(4297) 0x4deb6b CMP	%R10,%R13

(4297) 0x4deb6e MOV	-0x38(%RBP),%R12

(4297) 0x4deb72 MOV	-0x30(%RBP),%RSI

(4297) 0x4deb76 MOV	0x28(%RBP),%R15

(4297) 0x4deb7a JE	4dead0

(4297) 0x4deb80 JMP	4deb85

(4297) 0x4deb82 XOR	%R10D,%R10D

(4297) 0x4deb85 ADD	%R11,%R10

(4297) 0x4deb88 NOPL	(%RAX,%RAX,1)

  (4298) 0x4deb90 MOV	(%RDX,%R10,8),%RAX

  (4298) 0x4deb94 VMOVSD	(%RCX,%RAX,8),%XMM3

  (4298) 0x4deb99 VFMADD231SD	(%R14,%R10,8),%XMM3,%XMM2

  (4298) 0x4deb9f INC	%R10

  (4298) 0x4deba2 CMP	%R10,%R9

  (4298) 0x4deba5 JNE	4deb90

(4297) 0x4deba7 JMP	4dead0

0x4debac VUCOMISD	0x212d4(%RIP),%XMM0

0x4debb4 MOV	0x28(%RBP),%R11

0x4debb8 JNE	4dedac

0x4debbe CMP	%RSI,%R12

0x4debc1 JGE	4dee9c

0x4debc7 VXORPD	0x2106f(%RIP){1to2},%XMM5,%XMM0

0x4debd1 MOV	%R12,%RAX

0x4debd4 NOT	%RAX

0x4debd7 ADD	%RAX,%RSI

0x4debda XOR	%EDI,%EDI

0x4debdc JMP	4debf8

(4282) 0x4debde MOV	0x30(%RBP),%RAX

(4282) 0x4debe2 VMOVSD	%XMM1,(%RAX,%R8,8)

(4282) 0x4debe8 LEA	0x1(%RDI),%RAX

(4282) 0x4debec CMP	%RSI,%RDI

(4282) 0x4debef MOV	%RAX,%RDI

(4282) 0x4debf2 JE	4dee9c

(4282) 0x4debf8 LEA	(%R12,%RDI,1),%R8

(4282) 0x4debfc VMULSD	(%R11,%R8,8),%XMM0,%XMM1

(4282) 0x4dec02 MOV	(%RBX,%R8,8),%RAX

(4282) 0x4dec06 MOV	0x8(%RBX,%R8,8),%R9

(4282) 0x4dec0b MOV	%R9,%R13

(4282) 0x4dec0e SUB	%RAX,%R13

(4282) 0x4dec11 JLE	4debde

(4282) 0x4dec13 MOV	%R13,%R10

(4282) 0x4dec16 AND	$-0x4,%R10

(4282) 0x4dec1a JE	4dec95

(4282) 0x4dec1c MOV	%RSI,%RBX

(4282) 0x4dec1f LEA	-0x1(%R10),%R15

(4282) 0x4dec23 LEA	(%R14,%RAX,8),%RSI

(4282) 0x4dec27 MOV	%RAX,-0x38(%RBP)

(4282) 0x4dec2b LEA	(%RDX,%RAX,8),%RAX

(4282) 0x4dec2f VXORPD	%XMM2,%XMM2,%XMM2

(4282) 0x4dec33 XOR	%R11D,%R11D

(4282) 0x4dec36 NOPW	%CS:(%RAX,%RAX,1)

  (4284) 0x4dec40 VMOVUPD	(%RAX,%R11,8),%YMM3

  (4284) 0x4dec46 VXORPD	%XMM4,%XMM4,%XMM4

  (4284) 0x4dec4a KXNORW	%K0,%K0,%K1

  (4284) 0x4dec4e VGATHERQPD	(%RCX,%YMM3,8),%YMM4{%K1}

  (4284) 0x4dec55 VFNMADD231PD	(%RSI,%R11,8),%YMM4,%YMM2

  (4284) 0x4dec5b ADD	$0x4,%R11

  (4284) 0x4dec5f CMP	%R15,%R11

  (4284) 0x4dec62 JBE	4dec40

(4282) 0x4dec64 VEXTRACTF128	$0x1,%YMM2,%XMM3

(4282) 0x4dec6a VADDPD	%XMM3,%XMM2,%XMM2

(4282) 0x4dec6e VSHUFPD	$0x1,%XMM2,%XMM2,%XMM3

(4282) 0x4dec73 VADDSD	%XMM3,%XMM2,%XMM2

(4282) 0x4dec77 VADDSD	%XMM2,%XMM1,%XMM1

(4282) 0x4dec7b CMP	%R10,%R13

(4282) 0x4dec7e MOV	%RBX,%RSI

(4282) 0x4dec81 MOV	-0x30(%RBP),%RBX

(4282) 0x4dec85 MOV	0x28(%RBP),%R11

(4282) 0x4dec89 MOV	-0x38(%RBP),%RAX

(4282) 0x4dec8d JE	4debde

(4282) 0x4dec93 JMP	4dec98

(4282) 0x4dec95 XOR	%R10D,%R10D

(4282) 0x4dec98 ADD	%RAX,%R10

(4282) 0x4dec9b NOPL	(%RAX,%RAX,1)

  (4283) 0x4deca0 MOV	(%RDX,%R10,8),%RAX

  (4283) 0x4deca4 VMOVSD	(%RCX,%RAX,8),%XMM2

  (4283) 0x4deca9 VFNMADD231SD	(%R14,%R10,8),%XMM2,%XMM1

  (4283) 0x4decaf INC	%R10

  (4283) 0x4decb2 CMP	%R10,%R9

  (4283) 0x4decb5 JNE	4deca0

(4282) 0x4decb7 JMP	4debde

0x4decbc CMP	%RSI,%R12

0x4decbf JGE	4dee9c

0x4decc5 MOV	%R12,%RAX

0x4decc8 NOT	%RAX

0x4deccb ADD	%RAX,%RSI

0x4decce XOR	%EDI,%EDI

0x4decd0 MOV	%RSI,-0x30(%RBP)

0x4decd4 JMP	4decf4

(4288) 0x4decd6 VMULSD	%XMM0,%XMM1,%XMM1

(4288) 0x4decda MOV	0x30(%RBP),%RAX

(4288) 0x4decde VMOVSD	%XMM1,(%RAX,%R8,8)

(4288) 0x4dece4 LEA	0x1(%RDI),%RAX

(4288) 0x4dece8 CMP	%RSI,%RDI

(4288) 0x4deceb MOV	%RAX,%RDI

(4288) 0x4decee JE	4dee9c

(4288) 0x4decf4 LEA	(%R12,%RDI,1),%R8

(4288) 0x4decf8 VMOVSD	(%R15,%R8,8),%XMM1

(4288) 0x4decfe MOV	(%RBX,%R8,8),%R11

(4288) 0x4ded02 MOV	0x8(%RBX,%R8,8),%R9

(4288) 0x4ded07 MOV	%R9,%R13

(4288) 0x4ded0a SUB	%R11,%R13

(4288) 0x4ded0d JLE	4decd6

(4288) 0x4ded0f MOV	%R13,%R10

(4288) 0x4ded12 AND	$-0x4,%R10

(4288) 0x4ded16 JE	4ded82

(4288) 0x4ded18 LEA	-0x1(%R10),%R15

(4288) 0x4ded1c LEA	(%R14,%R11,8),%RSI

(4288) 0x4ded20 LEA	(%RDX,%R11,8),%RAX

(4288) 0x4ded24 VXORPD	%XMM2,%XMM2,%XMM2

(4288) 0x4ded28 XOR	%R12D,%R12D

(4288) 0x4ded2b NOPL	(%RAX,%RAX,1)

  (4290) 0x4ded30 VMOVUPD	(%RAX,%R12,8),%YMM3

  (4290) 0x4ded36 KXNORW	%K0,%K0,%K1

  (4290) 0x4ded3a VXORPD	%XMM4,%XMM4,%XMM4

  (4290) 0x4ded3e VGATHERQPD	(%RCX,%YMM3,8),%YMM4{%K1}

  (4290) 0x4ded45 VFMADD231PD	(%RSI,%R12,8),%YMM4,%YMM2

  (4290) 0x4ded4b ADD	$0x4,%R12

  (4290) 0x4ded4f CMP	%R15,%R12

  (4290) 0x4ded52 JBE	4ded30

(4288) 0x4ded54 VEXTRACTF128	$0x1,%YMM2,%XMM3

(4288) 0x4ded5a VADDPD	%XMM3,%XMM2,%XMM2

(4288) 0x4ded5e VSHUFPD	$0x1,%XMM2,%XMM2,%XMM3

(4288) 0x4ded63 VADDSD	%XMM3,%XMM2,%XMM2

(4288) 0x4ded67 VADDSD	%XMM2,%XMM1,%XMM1

(4288) 0x4ded6b CMP	%R10,%R13

(4288) 0x4ded6e MOV	-0x38(%RBP),%R12

(4288) 0x4ded72 MOV	-0x30(%RBP),%RSI

(4288) 0x4ded76 MOV	0x28(%RBP),%R15

(4288) 0x4ded7a JE	4decd6

(4288) 0x4ded80 JMP	4ded85

(4288) 0x4ded82 XOR	%R10D,%R10D

(4288) 0x4ded85 ADD	%R11,%R10

(4288) 0x4ded88 NOPL	(%RAX,%RAX,1)

  (4289) 0x4ded90 MOV	(%RDX,%R10,8),%RAX

  (4289) 0x4ded94 VMOVSD	(%RCX,%RAX,8),%XMM2

  (4289) 0x4ded99 VFMADD231SD	(%R14,%R10,8),%XMM2,%XMM1

  (4289) 0x4ded9f INC	%R10

  (4289) 0x4deda2 CMP	%R10,%R9

  (4289) 0x4deda5 JNE	4ded90

(4288) 0x4deda7 JMP	4decd6

0x4dedac CMP	%RSI,%R12

0x4dedaf JGE	4dee9c

0x4dedb5 MOV	%R12,%RAX

0x4dedb8 NOT	%RAX

0x4dedbb ADD	%RAX,%RSI

0x4dedbe XOR	%EDI,%EDI

0x4dedc0 JMP	4dede0

(4279) 0x4dedc2 VMULSD	%XMM0,%XMM1,%XMM1

(4279) 0x4dedc6 MOV	0x30(%RBP),%RAX

(4279) 0x4dedca VMOVSD	%XMM1,(%RAX,%R8,8)

(4279) 0x4dedd0 LEA	0x1(%RDI),%RAX

(4279) 0x4dedd4 CMP	%RSI,%RDI

(4279) 0x4dedd7 MOV	%RAX,%RDI

(4279) 0x4dedda JE	4dee9c

(4279) 0x4dede0 LEA	(%R12,%RDI,1),%R8

(4279) 0x4dede4 VMULSD	(%R11,%R8,8),%XMM5,%XMM1

(4279) 0x4dedea MOV	(%RBX,%R8,8),%RAX

(4279) 0x4dedee MOV	0x8(%RBX,%R8,8),%R9

(4279) 0x4dedf3 MOV	%R9,%R13

(4279) 0x4dedf6 SUB	%RAX,%R13

(4279) 0x4dedf9 JLE	4dedc2

(4279) 0x4dedfb MOV	%R13,%R10

(4279) 0x4dedfe AND	$-0x4,%R10

(4279) 0x4dee02 JE	4dee75

(4279) 0x4dee04 MOV	%RSI,%RBX

(4279) 0x4dee07 LEA	-0x1(%R10),%R15

(4279) 0x4dee0b LEA	(%R14,%RAX,8),%RSI

(4279) 0x4dee0f MOV	%RAX,-0x38(%RBP)

(4279) 0x4dee13 LEA	(%RDX,%RAX,8),%R11

(4279) 0x4dee17 VXORPD	%XMM2,%XMM2,%XMM2

(4279) 0x4dee1b XOR	%EAX,%EAX

(4279) 0x4dee1d NOPL	(%RAX)

  (4281) 0x4dee20 VMOVUPD	(%R11,%RAX,8),%YMM3

  (4281) 0x4dee26 VXORPD	%XMM4,%XMM4,%XMM4

  (4281) 0x4dee2a KXNORW	%K0,%K0,%K1

  (4281) 0x4dee2e VGATHERQPD	(%RCX,%YMM3,8),%YMM4{%K1}

  (4281) 0x4dee35 VFMADD231PD	(%RSI,%RAX,8),%YMM4,%YMM2

  (4281) 0x4dee3b ADD	$0x4,%RAX

  (4281) 0x4dee3f CMP	%R15,%RAX

  (4281) 0x4dee42 JBE	4dee20

(4279) 0x4dee44 VEXTRACTF128	$0x1,%YMM2,%XMM3

(4279) 0x4dee4a VADDPD	%XMM3,%XMM2,%XMM2

(4279) 0x4dee4e VSHUFPD	$0x1,%XMM2,%XMM2,%XMM3

(4279) 0x4dee53 VADDSD	%XMM3,%XMM2,%XMM2

(4279) 0x4dee57 VADDSD	%XMM2,%XMM1,%XMM1

(4279) 0x4dee5b CMP	%R10,%R13

(4279) 0x4dee5e MOV	%RBX,%RSI

(4279) 0x4dee61 MOV	-0x30(%RBP),%RBX

(4279) 0x4dee65 MOV	0x28(%RBP),%R11

(4279) 0x4dee69 MOV	-0x38(%RBP),%RAX

(4279) 0x4dee6d JE	4dedc2

(4279) 0x4dee73 JMP	4dee78

(4279) 0x4dee75 XOR	%R10D,%R10D

(4279) 0x4dee78 ADD	%RAX,%R10

(4279) 0x4dee7b NOPL	(%RAX,%RAX,1)

  (4280) 0x4dee80 MOV	(%RDX,%R10,8),%RAX

  (4280) 0x4dee84 VMOVSD	(%RCX,%RAX,8),%XMM2

  (4280) 0x4dee89 VFMADD231SD	(%R14,%R10,8),%XMM2,%XMM1

  (4280) 0x4dee8f INC	%R10

  (4280) 0x4dee92 CMP	%R10,%R9

  (4280) 0x4dee95 JNE	4dee80

(4279) 0x4dee97 JMP	4dedc2

0x4dee9c ADD	$0x18,%RSP

0x4deea0 POP	%RBX

0x4deea1 POP	%R12

0x4deea3 POP	%R13

0x4deea5 POP	%R14

0x4deea7 POP	%R15

0x4deea9 POP	%RBP

0x4deeaa VZEROUPPER

0x4deead RET

0x4deeae XCHG	%AX,%AX

Coverage (%)	Name	Source Location	Module
►100.00+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0

Source file and lines	csr_matvec.c:243-404
Module	exec

The function is defined in /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:243-365,371-404.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 37.67 to 19.50 cycles (1.93x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is probably not vectorized. Only 11% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 37.67 to 3.18 cycles (11.83x speedup).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

hypre_CSRMatrixGetLoadBalancedPartitionBegin: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:246
hypre_CSRMatrixGetLoadBalancedPartitionEnd: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:247
hypre_error_handler: 3 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:248
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:249
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:250
hypre_fprintf: 3 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:248
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:249
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:250

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

VUCOMISD: 10 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:252
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:291
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:291
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:266
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:330
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:330
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:305
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:283
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:344
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:383
VZEROUPPER: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:400

Type of elements and instruction set

11 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 232 bytes (29 double precision FP elements). The binary function is storing 72 bytes (9 double precision FP elements).

General properties

nb instructions	207
nb uops	226
loop length	822
used x86 registers	15
used mmx registers	0
used xmm registers	3
used ymm registers	0
used zmm registers	0
nb stack references	7

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	37.67 cycles
front end	37.67 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	20.00	19.07	12.00	12.00	11.50	18.93	20.00	11.50	11.50	11.50	19.00	12.00
cycles	20.00	19.07	12.00	12.00	11.50	18.93	20.00	11.50	11.50	11.50	19.00	12.00

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	37.67
Dispatch	20.00
Overall L1	37.67

Vectorization ratios

INT

all	1%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	1%

all	10%
load	5%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	15%

INT+FP

all	2%
load	3%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	4%

Vector efficiency ratios

INT

all	10%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
other	9%

all	13%
load	13%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	14%

INT+FP

all	11%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	10%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 37.67 cycles. At this rate:

3% of peak load performance is reached (6.16 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
1% of peak store performance is reached (1.91 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 37.67 to 20.00 cycles (1.88x speedup).

ASM code

In the binary file, the address of the function is: 4de130

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0x18,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R9,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R8,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RCX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RDX,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RCX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
CALL 4dcbc0 <hypre_CSRMatrixGetLoadBalancedPartitionBegin>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %R12,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
CALL 4dcc40 <hypre_CSRMatrixGetLoadBalancedPartitionEnd>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RAX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
CMP %RAX,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JLE 4de197 <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x67>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x59a50(%RIP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV $0x510823,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV $0x512699,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 4e7540 <hypre_fprintf>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV $0x512fe1,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV $0xf8,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV $0x1,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
CALL 4e9c60 <hypre_error_handler>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0x18(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
TEST %R12,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JS 4de1a5 <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x75>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %R13,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JLE 4de1d3 <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xa3>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x59a14(%RIP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV $0x510823,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV $0x51305f,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 4e7540 <hypre_fprintf>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV $0x512fe1,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV $0xf9,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV $0x1,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
CALL 4e9c60 <hypre_error_handler>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
VMOVSD 0x38(%RBP),%XMM5	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
TEST %R15,%R15	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JS 4de1e2 <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xb2>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %R13,%R15	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JLE 4de215 <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xe5>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x599d7(%RIP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV $0x510823,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV $0x513081,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 4e7540 <hypre_fprintf>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV $0x512fe1,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV $0xfa,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV $0x1,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
CALL 4e9c60 <hypre_error_handler>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
VMOVSD 0x38(%RBP),%XMM5	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x20(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x10(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD -0x38(%RBP),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VXORPD %XMM1,%XMM1,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VUCOMISD %XMM1,%XMM5	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
MOV %R12,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RBX,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JNE 4de33c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x20c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VUCOMISD 0x20dd0(%RIP),%XMM0	2	1	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	1	scal (12.5%)
JNE 4de45c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x32c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %R15,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 4dee9c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xd6c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R12,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOT %RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RAX,%R15	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
JMP 4de279 <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x149>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VUCOMISD 0x21b44(%RIP),%XMM5	2	1	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	1	scal (12.5%)
MOV %R15,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 4de55c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x42c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VUCOMISD 0x20cbb(%RIP),%XMM0	2	1	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	1	scal (12.5%)
JNE 4de67c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x54c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RSI,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV 0x28(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JGE 4dee9c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xd6c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R12,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOT %RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RAX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
VMOVDDUP 0x218c5(%RIP),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JMP 4de39a <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x26a>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VUCOMISD 0x21a24(%RIP),%XMM0	2	1	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	1	scal (12.5%)
JNE 4de78c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x65c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %R15,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 4dee9c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xd6c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R12,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOT %RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RAX,%R15	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
JMP 4de499 <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x369>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
VUCOMISD 0x20aac(%RIP),%XMM5	2	1	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	1	scal (12.5%)
JNE 4de88c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x75c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VUCOMISD 0x20a9e(%RIP),%XMM0	2	1	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	1	scal (12.5%)
JNE 4de99c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x86c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RSI,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV 0x28(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JGE 4dee9c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xd6c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R12,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOT %RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RAX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV %RSI,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 4de5ba <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x48a>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VUCOMISD 0x21804(%RIP),%XMM0	2	1	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	1	scal (12.5%)
MOV 0x28(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JNE 4deaac <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x97c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RSI,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 4dee9c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xd6c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R12,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOT %RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RAX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV %RSI,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 4de6ca <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x59a>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %R15,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 4dee9c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xd6c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R12,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOT %RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RAX,%R15	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
JMP 4de7cd <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x69d>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VUCOMISD 0x2077c(%RIP),%XMM0	2	1	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	1	scal (12.5%)
JNE 4debac <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xa7c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RSI,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV 0x28(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JGE 4dee9c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xd6c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R12,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOT %RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RAX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV %RSI,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 4de8da <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x7aa>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VUCOMISD 0x214e4(%RIP),%XMM0	2	1	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	1	scal (12.5%)
MOV 0x28(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JNE 4decbc <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xb8c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RSI,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 4dee9c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xd6c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R12,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOT %RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RAX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
VMOVDDUP 0x21276(%RIP),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %RSI,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 4de9ea <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x8ba>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
CMP %RSI,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 4dee9c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xd6c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R12,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOT %RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RAX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
VMOVDDUP 0x21178(%RIP),%XMM1	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %RSI,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 4deaee <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x9be>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VUCOMISD 0x212d4(%RIP),%XMM0	2	1	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	1	scal (12.5%)
MOV 0x28(%RBP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JNE 4dedac <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xc7c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RSI,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 4dee9c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xd6c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VXORPD 0x2106f(%RIP){1to2},%XMM5,%XMM0	1	0.33	0.33	0.33	0.33	0	0.33	0	0	0	0	0	0.33	0-1	0.33	vect (25.0%)
MOV %R12,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOT %RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RAX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
JMP 4debf8 <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xac8>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
CMP %RSI,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 4dee9c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xd6c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R12,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOT %RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RAX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV %RSI,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 4decf4 <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xbc4>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
CMP %RSI,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 4dee9c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xd6c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R12,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOT %RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RAX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
JMP 4dede0 <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xcb0>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
ADD $0x18,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0

Source file and lines	csr_matvec.c:243-404
Module	exec

The function is defined in /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:243-365,371-404.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

hypre_CSRMatrixGetLoadBalancedPartitionBegin: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:246
hypre_CSRMatrixGetLoadBalancedPartitionEnd: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:247
hypre_error_handler: 3 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:248
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:249
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:250
hypre_fprintf: 3 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:248
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:249
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:250

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

VUCOMISD: 10 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:252
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:291
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:291
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:266
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:330
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:330
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:305
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:283
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:344
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:383
VZEROUPPER: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c:400

Type of elements and instruction set

11 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).

Matching between your function (in the source code) and the binary function

General properties

nb instructions	207
nb uops	226
loop length	822
used x86 registers	15
used mmx registers	0
used xmm registers	3
used ymm registers	0
used zmm registers	0
nb stack references	7

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	37.67 cycles
front end	37.67 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	20.00	19.07	12.00	12.00	11.50	18.93	20.00	11.50	11.50	11.50	19.00	12.00
cycles	20.00	19.07	12.00	12.00	11.50	18.93	20.00	11.50	11.50	11.50	19.00	12.00

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	37.67
Dispatch	20.00
Overall L1	37.67

Vectorization ratios

INT

all	1%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	1%

all	10%
load	5%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	15%

INT+FP

all	2%
load	3%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	4%

Vector efficiency ratios

INT

all	10%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
other	9%

all	13%
load	13%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	14%

INT+FP

all	11%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	10%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 37.67 cycles. At this rate:

3% of peak load performance is reached (6.16 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
1% of peak store performance is reached (1.91 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 4de130

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0x18,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R9,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R8,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RCX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RDX,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RCX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
CALL 4dcbc0 <hypre_CSRMatrixGetLoadBalancedPartitionBegin>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %R12,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
CALL 4dcc40 <hypre_CSRMatrixGetLoadBalancedPartitionEnd>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RAX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
CMP %RAX,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JLE 4de197 <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x67>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x59a50(%RIP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV $0x510823,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV $0x512699,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 4e7540 <hypre_fprintf>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV $0x512fe1,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV $0xf8,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV $0x1,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
CALL 4e9c60 <hypre_error_handler>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0x18(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
TEST %R12,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JS 4de1a5 <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x75>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %R13,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JLE 4de1d3 <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xa3>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x59a14(%RIP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV $0x510823,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV $0x51305f,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 4e7540 <hypre_fprintf>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV $0x512fe1,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV $0xf9,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV $0x1,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
CALL 4e9c60 <hypre_error_handler>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
VMOVSD 0x38(%RBP),%XMM5	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
TEST %R15,%R15	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JS 4de1e2 <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xb2>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %R13,%R15	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JLE 4de215 <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xe5>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x599d7(%RIP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV $0x510823,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV $0x513081,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 4e7540 <hypre_fprintf>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV $0x512fe1,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV $0xfa,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV $0x1,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
CALL 4e9c60 <hypre_error_handler>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
VMOVSD 0x38(%RBP),%XMM5	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x20(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x10(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD -0x38(%RBP),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VXORPD %XMM1,%XMM1,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VUCOMISD %XMM1,%XMM5	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
MOV %R12,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RBX,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JNE 4de33c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x20c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VUCOMISD 0x20dd0(%RIP),%XMM0	2	1	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	1	scal (12.5%)
JNE 4de45c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x32c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %R15,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 4dee9c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xd6c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R12,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOT %RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RAX,%R15	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
JMP 4de279 <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x149>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VUCOMISD 0x21b44(%RIP),%XMM5	2	1	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	1	scal (12.5%)
MOV %R15,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 4de55c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x42c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VUCOMISD 0x20cbb(%RIP),%XMM0	2	1	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	1	scal (12.5%)
JNE 4de67c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x54c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RSI,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV 0x28(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JGE 4dee9c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xd6c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R12,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOT %RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RAX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
VMOVDDUP 0x218c5(%RIP),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JMP 4de39a <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x26a>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VUCOMISD 0x21a24(%RIP),%XMM0	2	1	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	1	scal (12.5%)
JNE 4de78c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x65c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %R15,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 4dee9c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xd6c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R12,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOT %RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RAX,%R15	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
JMP 4de499 <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x369>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
VUCOMISD 0x20aac(%RIP),%XMM5	2	1	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	1	scal (12.5%)
JNE 4de88c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x75c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VUCOMISD 0x20a9e(%RIP),%XMM0	2	1	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	1	scal (12.5%)
JNE 4de99c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x86c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RSI,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV 0x28(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JGE 4dee9c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xd6c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R12,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOT %RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RAX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV %RSI,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 4de5ba <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x48a>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VUCOMISD 0x21804(%RIP),%XMM0	2	1	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	1	scal (12.5%)
MOV 0x28(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JNE 4deaac <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x97c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RSI,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 4dee9c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xd6c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R12,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOT %RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RAX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV %RSI,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 4de6ca <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x59a>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %R15,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 4dee9c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xd6c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R12,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOT %RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RAX,%R15	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
JMP 4de7cd <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x69d>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VUCOMISD 0x2077c(%RIP),%XMM0	2	1	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	1	scal (12.5%)
JNE 4debac <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xa7c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RSI,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV 0x28(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JGE 4dee9c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xd6c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R12,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOT %RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RAX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV %RSI,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 4de8da <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x7aa>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VUCOMISD 0x214e4(%RIP),%XMM0	2	1	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	1	scal (12.5%)
MOV 0x28(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JNE 4decbc <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xb8c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RSI,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 4dee9c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xd6c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R12,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOT %RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RAX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
VMOVDDUP 0x21276(%RIP),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %RSI,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 4de9ea <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x8ba>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
CMP %RSI,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 4dee9c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xd6c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R12,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOT %RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RAX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
VMOVDDUP 0x21178(%RIP),%XMM1	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %RSI,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 4deaee <hypre_CSRMatrixMatvecOutOfPlace.extracted+0x9be>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VUCOMISD 0x212d4(%RIP),%XMM0	2	1	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	1	scal (12.5%)
MOV 0x28(%RBP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JNE 4dedac <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xc7c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RSI,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 4dee9c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xd6c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VXORPD 0x2106f(%RIP){1to2},%XMM5,%XMM0	1	0.33	0.33	0.33	0.33	0	0.33	0	0	0	0	0	0.33	0-1	0.33	vect (25.0%)
MOV %R12,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOT %RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RAX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
JMP 4debf8 <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xac8>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
CMP %RSI,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 4dee9c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xd6c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R12,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOT %RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RAX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV %RSI,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 4decf4 <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xbc4>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
CMP %RSI,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 4dee9c <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xd6c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R12,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOT %RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RAX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
JMP 4dede0 <hypre_CSRMatrixMatvecOutOfPlace.extracted+0xcb0>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
ADD $0x18,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

Name	Coverage (%)	Time (s)
▼hypre_CSRMatrixMatvecOutOfPlace.extracted–	21.17	11.40
▼Loop 4294 - csr_matvec.c:248-341 - exec–	0.86	0.37
○Loop 4295 - csr_matvec.c:337-339 - exec	0.65	0.28
○Loop 4296 - csr_matvec.c:337-339 - exec	0.17	0.07
▼Loop 4300 - csr_matvec.c:248-314 - exec–	0.32	0.14
○Loop 4302 - csr_matvec.c:310-312 - exec	8.80	3.78
○Loop 4301 - csr_matvec.c:310-312 - exec	1.20	0.52
▼Loop 4312 - csr_matvec.c:248-263 - exec–	0.23	0.10
○Loop 4314 - csr_matvec.c:259-261 - exec	7.90	3.39
○Loop 4313 - csr_matvec.c:259-261 - exec	1.05	0.45
▼Loop 4291 - csr_matvec.c:248-353 - exec–	0.00	0.00
○Loop 4292 - csr_matvec.c:349-351 - exec	0.00	0.00
○Loop 4293 - csr_matvec.c:349-351 - exec	0.00	0.00
▼Loop 4279 - csr_matvec.c:248-404 - exec–	0.00	0.00
○Loop 4280 - csr_matvec.c:400-402 - exec	0.00	0.00
○Loop 4281 - csr_matvec.c:400-402 - exec	0.00	0.00
▼Loop 4297 - csr_matvec.c:248-326 - exec–	0.00	0.00
○Loop 4298 - csr_matvec.c:322-324 - exec	0.00	0.00
○Loop 4299 - csr_matvec.c:322-324 - exec	0.00	0.00
▼Loop 4282 - csr_matvec.c:248-392 - exec–	0.00	0.00
○Loop 4284 - csr_matvec.c:388-390 - exec	0.00	0.00
○Loop 4283 - csr_matvec.c:388-390 - exec	0.00	0.00
▼Loop 4306 - csr_matvec.c:248-287 - exec–	0.00	0.00
○Loop 4308 - csr_matvec.c:283-285 - exec	0.00	0.00
○Loop 4307 - csr_matvec.c:283-285 - exec	0.00	0.00
▼Loop 4285 - csr_matvec.c:248-380 - exec–	0.00	0.00
○Loop 4286 - csr_matvec.c:376-378 - exec	0.00	0.00
○Loop 4287 - csr_matvec.c:376-378 - exec	0.00	0.00
▼Loop 4309 - csr_matvec.c:248-275 - exec–	0.00	0.00
○Loop 4310 - csr_matvec.c:271-273 - exec	0.00	0.00
○Loop 4311 - csr_matvec.c:271-273 - exec	0.00	0.00
▼Loop 4303 - csr_matvec.c:248-302 - exec–	0.00	0.00
○Loop 4305 - csr_matvec.c:298-300 - exec	0.00	0.00
○Loop 4304 - csr_matvec.c:298-300 - exec	0.00	0.00
▼Loop 4288 - csr_matvec.c:248-365 - exec–	0.00	0.00
○Loop 4290 - csr_matvec.c:361-363 - exec	0.00	0.00
○Loop 4289 - csr_matvec.c:361-363 - exec	0.00	0.00

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