OV - exec - Function hypre_BoomerAMGCreate2ndS.extracted.17

	Function: hypre_BoomerAMGCreate2ndS.extracted.17	Module: exec	Source: par_strength.c:1668-2230 [...]	Coverage (incl. loops): 1.57% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c: 1668 - 2230

--------------------------------------------------------------------------------

1668: #pragma omp parallel private(i1,i2,i3,jj1,jj2,index)

1669: #endif

1670:    {

1671:       HYPRE_Int my_thread_num = hypre_GetThreadNum();

1672:

1673:       HYPRE_Int i1_begin, i1_end;

1674:       hypre_GetSimpleThreadPartition(&i1_begin, &i1_end, num_cols_diag_S);

1675:

1676:       HYPRE_Int *C_temp_diag_j = NULL, *C_temp_offd_j = NULL;

1677:       HYPRE_Int *C_temp_diag_data = NULL, *C_temp_offd_data = NULL;

1678:

1679:       if (num_paths > 1)

1680:       {

1681:          C_temp_diag_j = C_temp_diag_j_array + num_coarse*my_thread_num;

1682:          C_temp_offd_j = C_temp_offd_j_array + num_cols_offd_C*my_thread_num;

1683:

1684:          C_temp_diag_data = C_temp_diag_data_array + num_coarse*my_thread_num;

1685:          C_temp_offd_data = C_temp_offd_data_array + num_cols_offd_C*my_thread_num;

1686:       }

1687:

1688:       HYPRE_Int *S_marker = NULL, *S_marker_offd = NULL;

1689:       if (num_coarse) S_marker = S_marker_array + num_coarse*my_thread_num;

1690:       if (num_cols_offd_C) S_marker_offd = S_marker_offd_array + num_cols_offd_C*my_thread_num;

1691:       for (i1 = 0; i1 < num_coarse; i1++)

1692:       {

1693:          S_marker[i1] = -1;

1694:       }

1695:       for (i1 = 0; i1 < num_cols_offd_C; i1++)

1696:       {

1697:          S_marker_offd[i1] = -1;

[...]

1705:       HYPRE_Int num_nonzeros_diag = 0;

1706:       HYPRE_Int num_nonzeros_offd = 0;

1707:

1708:       HYPRE_Int ic_begin = num_coarse_prefix_sum[my_thread_num];

1709:       HYPRE_Int ic_end = num_coarse_prefix_sum[my_thread_num + 1];

1710:       HYPRE_Int ic;

1711:

1712:       if (num_paths == 1)

1713:       {

1714:          for (ic = ic_begin; ic < ic_end; ic++)

[...]

1720:              HYPRE_Int i1 = coarse_to_fine[ic];

1721:

1722:              HYPRE_Int jj_row_begin_diag = num_nonzeros_diag;

1723:              HYPRE_Int jj_row_begin_offd = num_nonzeros_offd;

1724:

1725:              C_diag_i[ic] = num_nonzeros_diag;

1726:              if (num_cols_offd_C)

1727:              {

1728:                 C_offd_i[ic] = num_nonzeros_offd;

1729:              }

1730:

1731:              for (jj1 = S_diag_i[i1]; jj1 < S_diag_i[i1+1]; jj1++)

1732:              {

1733:                  i2 = S_diag_j[jj1];

1734:                  if (CF_marker[i2] > 0)

1735:                  {

1736:                     index = fine_to_coarse[i2];

1737:                     if (S_marker[index] < jj_row_begin_diag)

1738:                     {

1739:                        S_marker[index] = num_nonzeros_diag;

1740:                        num_nonzeros_diag++;

1741:                     }

1742:                  }

1743:                  for (jj2 = S_diag_i[i2]; jj2 < S_diag_i[i2+1]; jj2++)

1744:                  {

1745:                     i3 = S_diag_j[jj2];

1746:                     if (CF_marker[i3] > 0)

1747:                     {

1748:                        index = fine_to_coarse[i3];

1749:                        if (index != ic && S_marker[index] < jj_row_begin_diag)

1750:                        {

1751:                           S_marker[index] = num_nonzeros_diag;

1752:                           num_nonzeros_diag++;

1753:                        }

1754:                     }

1755:                  }

1756:                  for (jj2 = S_offd_i[i2]; jj2 < S_offd_i[i2+1]; jj2++)

1757:                  {

1758:                     i3 = S_offd_j[jj2];

1759:                     if (CF_marker_offd[i3] > 0)

1760:                     {

1761:                        index = map_S_to_C[i3];

1762:                        if (S_marker_offd[index] < jj_row_begin_offd)

1763:                        {

1764:                           S_marker_offd[index] = num_nonzeros_offd;

1765:                           num_nonzeros_offd++;

1766:                        }

1767:                     }

1768:                  }

1769:              }

1770:              for (jj1 = S_offd_i[i1]; jj1 < S_offd_i[i1+1]; jj1++)

1771:              {

1772:                  i2 = S_offd_j[jj1];

1773:                  if (CF_marker_offd[i2] > 0)

1774:                  {

1775:                     index = map_S_to_C[i2];

1776:                     if (S_marker_offd[index] < jj_row_begin_offd)

1777:                     {

1778:                        S_marker_offd[index] = num_nonzeros_offd;

1779:                        num_nonzeros_offd++;

1780:                     }

1781:                  }

1782:                  for (jj2 = S_ext_diag_i[i2]; jj2 < S_ext_diag_i[i2+1]; jj2++)

1783:                  {

1784:                     i3 = S_ext_diag_j[jj2];

1785:                     if (i3 != ic && S_marker[i3] < jj_row_begin_diag)

1786:                     {

1787:                        S_marker[i3] = num_nonzeros_diag;

1788:                        num_nonzeros_diag++;

1789:                     }

1790:                  }

1791:                  for (jj2 = S_ext_offd_i[i2]; jj2 < S_ext_offd_i[i2+1]; jj2++)

1792:                  {

1793:                     i3 = S_ext_offd_j[jj2];

1794:                     if (S_marker_offd[i3] < jj_row_begin_offd)

1795:                     {

1796:                        S_marker_offd[i3] = num_nonzeros_offd;

1797:                        num_nonzeros_offd++;

[...]

1806:          for (ic = ic_begin; ic < ic_end; ic++)

[...]

1812:              HYPRE_Int i1 = coarse_to_fine[ic];

1813:

1814:              HYPRE_Int jj_row_begin_diag = jj_count_diag;

1815:              HYPRE_Int jj_row_begin_offd = jj_count_offd;

1816:

1817:              C_diag_i[ic] = num_nonzeros_diag;

1818:              if (num_cols_offd_C)

1819:              {

1820:                 C_offd_i[ic] = num_nonzeros_offd;

1821:              }

1822:

1823:              for (jj1 = S_diag_i[i1]; jj1 < S_diag_i[i1+1]; jj1++)

1824:              {

1825:                  i2 = S_diag_j[jj1];

1826:                  if (CF_marker[i2] > 0)

1827:                  {

1828:                     index = fine_to_coarse[i2];

1829:                     if (S_marker[index] < jj_row_begin_diag)

1830:                     {

1831:                        S_marker[index] = jj_count_diag;

1832:                        C_temp_diag_data[jj_count_diag - jj_row_begin_diag] = 2;

1833:                        jj_count_diag++;

1834:                     }

1835:                     else

1836:                     {

1837:                        C_temp_diag_data[S_marker[index] - jj_row_begin_diag] += 2;

1838:                     }

1839:                  }

1840:                  for (jj2 = S_diag_i[i2]; jj2 < S_diag_i[i2+1]; jj2++)

1841:                  {

1842:                     i3 = S_diag_j[jj2];

1843:                     if (CF_marker[i3] > 0 && fine_to_coarse[i3] != ic)

1844:                     {

1845:                        index = fine_to_coarse[i3];

1846:                        if (S_marker[index] < jj_row_begin_diag)

1847:                        {

1848:                           S_marker[index] = jj_count_diag;

1849:                           C_temp_diag_data[jj_count_diag - jj_row_begin_diag] = 1;

1850:                           jj_count_diag++;

1851:                        }

1852:                        else

1853:                        {

1854:                           C_temp_diag_data[S_marker[index] - jj_row_begin_diag]++;

1855:                        }

1856:                     }

1857:                  }

1858:                  for (jj2 = S_offd_i[i2]; jj2 < S_offd_i[i2+1]; jj2++)

1859:                  {

1860:                     i3 = S_offd_j[jj2];

1861:                     if (CF_marker_offd[i3] > 0)

1862:                     {

1863:                        index = map_S_to_C[i3];

1864:                        if (S_marker_offd[index] < jj_row_begin_offd)

1865:                        {

1866:                           S_marker_offd[index] = jj_count_offd;

1867:                           C_temp_offd_data[jj_count_offd - jj_row_begin_offd] = 1;

1868:                           jj_count_offd++;

1869:                        }

1870:                        else

1871:                        {

1872:                           C_temp_offd_data[S_marker_offd[index] - jj_row_begin_offd]++;

1873:                        }

1874:                     }

1875:                  }

1876:              }

1877:              for (jj1 = S_offd_i[i1]; jj1 < S_offd_i[i1+1]; jj1++)

1878:              {

1879:                  i2 = S_offd_j[jj1];

1880:                  if (CF_marker_offd[i2] > 0)

1881:                  {

1882:                     index = map_S_to_C[i2];

1883:                     if (S_marker_offd[index] < jj_row_begin_offd)

1884:                     {

1885:                        S_marker_offd[index] = jj_count_offd;

1886:                        C_temp_offd_data[jj_count_offd - jj_row_begin_offd] = 2;

1887:                        jj_count_offd++;

1888:                     }

1889:                     else

1890:                     {

1891:                        C_temp_offd_data[S_marker_offd[index] - jj_row_begin_offd] += 2;

1892:                     }

1893:                  }

1894:                  for (jj2 = S_ext_diag_i[i2]; jj2 < S_ext_diag_i[i2+1]; jj2++)

1895:                  {

1896:                     i3 = S_ext_diag_j[jj2];

1897:                     if (i3 != ic)

1898:                     {

1899:                        if (S_marker[i3] < jj_row_begin_diag)

1900:                        {

1901:                           S_marker[i3] = jj_count_diag;

1902:                           C_temp_diag_data[jj_count_diag - jj_row_begin_diag] = 1;

1903:                           jj_count_diag++;

1904:                        }

1905:                        else

1906:                        {

1907:                           C_temp_diag_data[S_marker[i3] - jj_row_begin_diag]++;

1908:                        }

1909:                     }

1910:                  }

1911:                  for (jj2 = S_ext_offd_i[i2]; jj2 < S_ext_offd_i[i2+1]; jj2++)

1912:                  {

1913:                     i3 = S_ext_offd_j[jj2];

1914:                     if (S_marker_offd[i3] < jj_row_begin_offd)

1915:                     {

1916:                        S_marker_offd[i3] = jj_count_offd;

1917:                        C_temp_offd_data[jj_count_offd - jj_row_begin_offd] = 1;

1918:                        jj_count_offd++;

1919:                     }

1920:                     else

1921:                     {

1922:                        C_temp_offd_data[S_marker_offd[i3] - jj_row_begin_offd]++;

1923:                     }

1924:                  }

1925:              }

1926:

1927:              for (jj1 = jj_row_begin_diag; jj1 < jj_count_diag; jj1++)

1928:              {

1929:                  if (C_temp_diag_data[jj1 - jj_row_begin_diag] >= num_paths)

1930:                  {

1931:                     ++num_nonzeros_diag;

1932:                  }

1933:                  C_temp_diag_data[jj1 - jj_row_begin_diag] = 0;

1934:              }

1935:              for (jj1 = jj_row_begin_offd; jj1 < jj_count_offd; jj1++)

1936:              {

1937:                  if (C_temp_offd_data[jj1 - jj_row_begin_offd] >= num_paths)

1938:                  {

1939:                     ++num_nonzeros_offd;

1940:                  }

1941:                  C_temp_offd_data[jj1 - jj_row_begin_offd] = 0;

1942:              }

1943:          } /* for each row */

1944:       } /* num_paths > 1 */

1945:

1946:       hypre_prefix_sum_pair(

1947:          &num_nonzeros_diag, &C_diag_i[num_coarse],

1948:          &num_nonzeros_offd, &C_offd_i[num_coarse],

1949:          prefix_sum_workspace);

1950:

1951:       for (i1 = 0; i1 < num_coarse; i1++)

1952:       {

1953:          S_marker[i1] = -1;

1954:       }

1955:       for (i1 = 0; i1 < num_cols_offd_C; i1++)

1956:       {

1957:          S_marker_offd[i1] = -1;

1958:       }

1959:

1960: #ifdef HYPRE_USING_OPENMP

1961: #pragma omp barrier

1962: #pragma omp master

1963: #endif

1964:       {

1965:          if (C_diag_i[num_coarse])

1966:          {

1967:             C_diag_j = hypre_TAlloc(HYPRE_Int, C_diag_i[num_coarse]);

1968:          }

1969:          if (C_offd_i[num_coarse])

1970:          {

1971:             C_offd_j = hypre_TAlloc(HYPRE_Int, C_offd_i[num_coarse]);

[...]

1978:       for (ic = ic_begin; ic < ic_end - 1; ic++)

1979:       {

1980:          if (C_diag_i[ic+1] == C_diag_i[ic] && C_offd_i[ic+1] == C_offd_i[ic])

1981:             CF_marker[coarse_to_fine[ic]] = 2;

1982:

1983:          C_diag_i[ic] += num_nonzeros_diag;

1984:          C_offd_i[ic] += num_nonzeros_offd;

1985:       }

1986:       if (ic_begin < ic_end)

1987:       {

1988:          C_diag_i[ic] += num_nonzeros_diag;

1989:          C_offd_i[ic] += num_nonzeros_offd;

1990:

1991:          HYPRE_Int next_C_diag_i = prefix_sum_workspace[2*(my_thread_num + 1)];

1992:          HYPRE_Int next_C_offd_i = prefix_sum_workspace[2*(my_thread_num + 1) + 1];

1993:

1994:          if (next_C_diag_i == C_diag_i[ic] && next_C_offd_i == C_offd_i[ic])

1995:             CF_marker[coarse_to_fine[ic]] = 2;

1996:       }

1997:

1998:       if (num_paths == 1)

1999:       {

2000:          for (ic = ic_begin; ic < ic_end; ic++)

[...]

2006:              HYPRE_Int i1 = coarse_to_fine[ic];

2007:

2008:              HYPRE_Int jj_row_begin_diag = num_nonzeros_diag;

2009:              HYPRE_Int jj_row_begin_offd = num_nonzeros_offd;

2010:

2011:              for (jj1 = S_diag_i[i1]; jj1 < S_diag_i[i1+1]; jj1++)

2012:              {

2013:                  i2 = S_diag_j[jj1];

2014:                  if (CF_marker[i2] > 0)

2015:                  {

2016:                     index = fine_to_coarse[i2];

2017:                     if (S_marker[index] < jj_row_begin_diag)

2018:                     {

2019:                        S_marker[index] = num_nonzeros_diag;

2020:                        C_diag_j[num_nonzeros_diag] = index;

2021:                        num_nonzeros_diag++;

2022:                     }

2023:                  }

2024:                  for (jj2 = S_diag_i[i2]; jj2 < S_diag_i[i2+1]; jj2++)

2025:                  {

2026:                     i3 = S_diag_j[jj2];

2027:                     if (CF_marker[i3] > 0)

2028:                     {

2029:                        index = fine_to_coarse[i3];

2030:                        if (index != ic && S_marker[index] < jj_row_begin_diag)

2031:                        {

2032:                           S_marker[index] = num_nonzeros_diag;

2033:                           C_diag_j[num_nonzeros_diag] = index;

2034:                           num_nonzeros_diag++;

2035:                        }

2036:                     }

2037:                  }

2038:                  for (jj2 = S_offd_i[i2]; jj2 < S_offd_i[i2+1]; jj2++)

2039:                  {

2040:                     i3 = S_offd_j[jj2];

2041:                     if (CF_marker_offd[i3] > 0)

2042:                     {

2043:                        index = map_S_to_C[i3];

2044:                        if (S_marker_offd[index] < jj_row_begin_offd)

2045:                        {

2046:                           S_marker_offd[index] = num_nonzeros_offd;

2047:                           C_offd_j[num_nonzeros_offd] = index;

2048:                           num_nonzeros_offd++;

2049:                        }

2050:                     }

2051:                  }

2052:              }

2053:              for (jj1 = S_offd_i[i1]; jj1 < S_offd_i[i1+1]; jj1++)

2054:              {

2055:                  i2 = S_offd_j[jj1];

2056:                  if (CF_marker_offd[i2] > 0)

2057:                  {

2058:                     index = map_S_to_C[i2];

2059:                     if (S_marker_offd[index] < jj_row_begin_offd)

2060:                     {

2061:                        S_marker_offd[index] = num_nonzeros_offd;

2062:                        C_offd_j[num_nonzeros_offd] = index;

2063:                        num_nonzeros_offd++;

2064:                     }

2065:                  }

2066:                  for (jj2 = S_ext_diag_i[i2]; jj2 < S_ext_diag_i[i2+1]; jj2++)

2067:                  {

2068:                     i3 = S_ext_diag_j[jj2];

2069:                     if (i3 != ic && S_marker[i3] < jj_row_begin_diag)

2070:                     {

2071:                        S_marker[i3] = num_nonzeros_diag;

2072:                        C_diag_j[num_nonzeros_diag] = i3;

2073:                        num_nonzeros_diag++;

2074:                     }

2075:                  }

2076:                  for (jj2 = S_ext_offd_i[i2]; jj2 < S_ext_offd_i[i2+1]; jj2++)

2077:                  {

2078:                     i3 = S_ext_offd_j[jj2];

2079:                     if (S_marker_offd[i3] < jj_row_begin_offd)

2080:                     {

2081:                        S_marker_offd[i3] = num_nonzeros_offd;

2082:                        C_offd_j[num_nonzeros_offd] = i3;

2083:                        num_nonzeros_offd++;

[...]

2095:          for (ic = ic_begin; ic < ic_end; ic++)

[...]

2101:              HYPRE_Int i1 = coarse_to_fine[ic];

2102:

2103:              HYPRE_Int jj_row_begin_diag = jj_count_diag;

2104:              HYPRE_Int jj_row_begin_offd = jj_count_offd;

2105:

2106:              for (jj1 = S_diag_i[i1]; jj1 < S_diag_i[i1+1]; jj1++)

2107:              {

2108:                  i2 = S_diag_j[jj1];

2109:                  if (CF_marker[i2] > 0)

2110:                  {

2111:                     index = fine_to_coarse[i2];

2112:                     if (S_marker[index] < jj_row_begin_diag)

2113:                     {

2114:                        S_marker[index] = jj_count_diag;

2115:                        C_temp_diag_j[jj_count_diag - jj_row_begin_diag] = index;

2116:                        C_temp_diag_data[jj_count_diag - jj_row_begin_diag] = 2;

2117:                        jj_count_diag++;

2118:                     }

2119:                     else

2120:                     {

2121:                        C_temp_diag_data[S_marker[index] - jj_row_begin_diag] += 2;

2122:                     }

2123:                  }

2124:                  for (jj2 = S_diag_i[i2]; jj2 < S_diag_i[i2+1]; jj2++)

2125:                  {

2126:                     i3 = S_diag_j[jj2];

2127:                     if (CF_marker[i3] > 0 && fine_to_coarse[i3] != ic)

2128:                     {

2129:                        index = fine_to_coarse[i3];

2130:                        if (S_marker[index] < jj_row_begin_diag)

2131:                        {

2132:                           S_marker[index] = jj_count_diag;

2133:                           C_temp_diag_j[jj_count_diag - jj_row_begin_diag] = index;

2134:                           C_temp_diag_data[jj_count_diag - jj_row_begin_diag] = 1;

2135:                           jj_count_diag++;

2136:                        }

2137:                        else

2138:                        {

2139:                           C_temp_diag_data[S_marker[index] - jj_row_begin_diag]++;

2140:                        }

2141:                     }

2142:                  }

2143:                  for (jj2 = S_offd_i[i2]; jj2 < S_offd_i[i2+1]; jj2++)

2144:                  {

2145:                     i3 = S_offd_j[jj2];

2146:                     if (CF_marker_offd[i3] > 0)

2147:                     {

2148:                        index = map_S_to_C[i3];

2149:                        if (S_marker_offd[index] < jj_row_begin_offd)

2150:                        {

2151:                           S_marker_offd[index] = jj_count_offd;

2152:                           C_temp_offd_j[jj_count_offd - jj_row_begin_offd] = index;

2153:                           C_temp_offd_data[jj_count_offd - jj_row_begin_offd] = 1;

2154:                           jj_count_offd++;

2155:                        }

2156:                        else

2157:                        {

2158:                           C_temp_offd_data[S_marker_offd[index] - jj_row_begin_offd]++;

2159:                        }

2160:                     }

2161:                  }

2162:              }

2163:              for (jj1 = S_offd_i[i1]; jj1 < S_offd_i[i1+1]; jj1++)

2164:              {

2165:                  i2 = S_offd_j[jj1];

2166:                  if (CF_marker_offd[i2] > 0)

2167:                  {

2168:                     index = map_S_to_C[i2];

2169:                     if (S_marker_offd[index] < jj_row_begin_offd)

2170:                     {

2171:                        S_marker_offd[index] = jj_count_offd;

2172:                        C_temp_offd_j[jj_count_offd - jj_row_begin_offd] = index;

2173:                        C_temp_offd_data[jj_count_offd - jj_row_begin_offd] = 2;

2174:                        jj_count_offd++;

2175:                     }

2176:                     else

2177:                     {

2178:                        C_temp_offd_data[S_marker_offd[index] - jj_row_begin_offd] += 2;

2179:                     }

2180:                  }

2181:                  for (jj2 = S_ext_diag_i[i2]; jj2 < S_ext_diag_i[i2+1]; jj2++)

2182:                  {

2183:                     i3 = S_ext_diag_j[jj2];

2184:                     if (i3 != ic)

2185:                     {

2186:                        if (S_marker[i3] < jj_row_begin_diag)

2187:                        {

2188:                           S_marker[i3] = jj_count_diag;

2189:                           C_temp_diag_j[jj_count_diag - jj_row_begin_diag] = i3;

2190:                           C_temp_diag_data[jj_count_diag - jj_row_begin_diag] = 1;

2191:                           jj_count_diag++;

2192:                        }

2193:                        else

2194:                        {

2195:                           C_temp_diag_data[S_marker[i3] - jj_row_begin_diag]++;

2196:                        }

2197:                     }

2198:                  }

2199:                  for (jj2 = S_ext_offd_i[i2]; jj2 < S_ext_offd_i[i2+1]; jj2++)

2200:                  {

2201:                     i3 = S_ext_offd_j[jj2];

2202:                     if (S_marker_offd[i3] < jj_row_begin_offd)

2203:                     {

2204:                        S_marker_offd[i3] = jj_count_offd;

2205:                        C_temp_offd_j[jj_count_offd - jj_row_begin_offd] = i3;

2206:                        C_temp_offd_data[jj_count_offd - jj_row_begin_offd] = 1;

2207:                        jj_count_offd++;

2208:                     }

2209:                     else

2210:                     {

2211:                        C_temp_offd_data[S_marker_offd[i3] - jj_row_begin_offd]++;

2212:                     }

2213:                  }

2214:              }

2215:

2216:              for (jj1 = jj_row_begin_diag; jj1 < jj_count_diag; jj1++)

2217:              {

2218:                  if (C_temp_diag_data[jj1 - jj_row_begin_diag] >= num_paths)

2219:                  {

2220:                     C_diag_j[num_nonzeros_diag++] = C_temp_diag_j[jj1 - jj_row_begin_diag];

2221:                  }

2222:                  C_temp_diag_data[jj1 - jj_row_begin_diag] = 0;

2223:              }

2224:              for (jj1 = jj_row_begin_offd; jj1 < jj_count_offd; jj1++)

2225:              {

2226:                  if (C_temp_offd_data[jj1 - jj_row_begin_offd] >= num_paths)

2227:                  {

2228:                     C_offd_j[num_nonzeros_offd++] = C_temp_offd_j[jj1 - jj_row_begin_offd];

2229:                  }

2230:                  C_temp_offd_data[jj1 - jj_row_begin_offd] = 0;

0x48f050 PUSH	%RBP

0x48f051 MOV	%RSP,%RBP

0x48f054 PUSH	%R15

0x48f056 PUSH	%R14

0x48f058 PUSH	%R13

0x48f05a PUSH	%R12

0x48f05c PUSH	%RBX

0x48f05d SUB	$0xb8,%RSP

0x48f064 MOV	%R9,-0x70(%RBP)

0x48f068 MOV	%R8,-0x58(%RBP)

0x48f06c MOV	%RCX,%R15

0x48f06f MOV	%RDX,-0x50(%RBP)

0x48f073 MOV	%RDI,-0xb0(%RBP)

0x48f07a MOV	0x88(%RBP),%RBX

0x48f081 MOV	0x48(%RBP),%R14

0x48f085 MOV	0x20(%RBP),%R12

0x48f089 CALL	4e8ff0 <hypre_GetThreadNum>

0x48f08e MOV	%RAX,%R13

0x48f091 LEA	-0xd0(%RBP),%RDI

0x48f098 LEA	-0xd8(%RBP),%RSI

0x48f09f MOV	%R12,%RDX

0x48f0a2 CALL	4e9000 <hypre_GetSimpleThreadPartition>

0x48f0a7 MOV	%R15,%R10

0x48f0aa MOV	(%RBX),%RCX

0x48f0ad MOV	%RCX,%RDX

0x48f0b0 IMUL	%R13,%RDX

0x48f0b4 MOV	(%R14),%RAX

0x48f0b7 CMP	$0x1,%R15

0x48f0bb JLE	48f0f6

0x48f0bd MOV	0xd0(%RBP),%RDI

0x48f0c4 MOV	0xc8(%RBP),%R8

0x48f0cb MOV	0xc0(%RBP),%RSI

0x48f0d2 MOV	0xb8(%RBP),%R9

0x48f0d9 LEA	(%RSI,%RDX,8),%RSI

0x48f0dd MOV	%RSI,-0x78(%RBP)

0x48f0e1 MOV	%RAX,%RSI

0x48f0e4 IMUL	%R13,%RSI

0x48f0e8 LEA	(%R9,%RSI,8),%R9

0x48f0ec LEA	(%RDI,%RDX,8),%R11

0x48f0f0 LEA	(%R8,%RSI,8),%RDI

0x48f0f4 JMP	48f10b

0x48f0f6 MOV	%RAX,%RSI

0x48f0f9 IMUL	%R13,%RSI

0x48f0fd XOR	%EDI,%EDI

0x48f0ff MOV	%RDI,-0x78(%RBP)

0x48f103 XOR	%R9D,%R9D

0x48f106 XOR	%R11D,%R11D

0x48f109 XOR	%EDI,%EDI

0x48f10b MOV	0xa8(%RBP),%R8

0x48f112 LEA	(%R8,%RDX,8),%R8

0x48f116 TEST	%RAX,%RAX

0x48f119 MOV	0xb0(%RBP),%RDX

0x48f120 LEA	(%RDX,%RSI,8),%R14

0x48f124 CMOVE	%RAX,%R14

0x48f128 TEST	%RCX,%RCX

0x48f12b CMOVE	%RCX,%R8

0x48f12f MOV	0x48(%RBP),%RDX

0x48f133 JLE	48f153

0x48f135 XOR	%EAX,%EAX

0x48f137 NOPW	(%RAX,%RAX,1)

(2543) 0x48f140 MOVQ	$-0x1,(%R8,%RAX,8)

(2543) 0x48f148 INC	%RAX

(2543) 0x48f14b CMP	(%RBX),%RAX

(2543) 0x48f14e JL	48f140

0x48f150 MOV	(%RDX),%RAX

0x48f153 MOV	0x98(%RBP),%RCX

0x48f15a TEST	%RAX,%RAX

0x48f15d JLE	48f180

0x48f15f XOR	%EAX,%EAX

0x48f161 NOPW	%CS:(%RAX,%RAX,1)

(2542) 0x48f170 MOVQ	$-0x1,(%R14,%RAX,8)

(2542) 0x48f178 INC	%RAX

(2542) 0x48f17b CMP	(%RDX),%RAX

(2542) 0x48f17e JL	48f170

0x48f180 MOV	%R8,-0x48(%RBP)

0x48f184 MOV	%R9,-0x98(%RBP)

0x48f18b MOVQ	$0,-0x30(%RBP)

0x48f193 MOVQ	$0,-0x38(%RBP)

0x48f19b MOV	(%RCX,%R13,8),%RBX

0x48f19f MOV	%R13,-0xb8(%RBP)

0x48f1a6 MOV	0x8(%RCX,%R13,8),%RAX

0x48f1ab CMP	$0x1,%R10

0x48f1af MOV	%RBX,-0x88(%RBP)

0x48f1b6 MOV	%RAX,-0x80(%RBP)

0x48f1ba MOV	%R10,-0x68(%RBP)

0x48f1be MOV	%R11,-0x60(%RBP)

0x48f1c2 MOV	%RDI,-0x40(%RBP)

0x48f1c6 JNE	48f460

0x48f1cc CMP	%RAX,%RBX

0x48f1cf JGE	48fae7

0x48f1d5 XOR	%ECX,%ECX

0x48f1d7 MOV	%RBX,%RAX

0x48f1da XOR	%EDX,%EDX

0x48f1dc JMP	48f1f3

0x48f1de XCHG	%AX,%AX

(2535) 0x48f1e0 INC	%RAX

(2535) 0x48f1e3 MOV	%R8,%RCX

(2535) 0x48f1e6 MOV	%RSI,%RDX

(2535) 0x48f1e9 CMP	-0x80(%RBP),%RAX

(2535) 0x48f1ed JE	48fae7

(2535) 0x48f1f3 MOV	0xa0(%RBP),%RSI

(2535) 0x48f1fa MOV	(%RSI,%RAX,8),%RDI

(2535) 0x48f1fe MOV	0x28(%RBP),%RSI

(2535) 0x48f202 MOV	%RCX,(%RSI,%RAX,8)

(2535) 0x48f206 MOV	0x48(%RBP),%RSI

(2535) 0x48f20a CMPQ	$0,(%RSI)

(2535) 0x48f20e JE	48f218

(2535) 0x48f210 MOV	0x38(%RBP),%RSI

(2535) 0x48f214 MOV	%RDX,(%RSI,%RAX,8)

(2535) 0x48f218 MOV	-0x58(%RBP),%R10

(2535) 0x48f21c MOV	(%R10,%RDI,8),%R9

(2535) 0x48f220 MOV	%RDX,%RSI

(2535) 0x48f223 MOV	%RCX,%R8

(2535) 0x48f226 MOV	%RDI,-0x90(%RBP)

(2535) 0x48f22d CMP	0x8(%R10,%RDI,8),%R9

(2535) 0x48f232 MOV	-0x70(%RBP),%R12

(2535) 0x48f236 MOV	-0x48(%RBP),%R13

(2535) 0x48f23a JGE	48f360

(2535) 0x48f240 MOV	%RDX,%RSI

(2535) 0x48f243 MOV	%RCX,%R8

(2535) 0x48f246 JMP	48f270

0x48f248 NOPL	(%RAX,%RAX,1)

  (2539) 0x48f250 INC	%R9

  (2539) 0x48f253 MOV	-0x58(%RBP),%R10

  (2539) 0x48f257 MOV	-0x90(%RBP),%RDI

  (2539) 0x48f25e CMP	0x8(%R10,%RDI,8),%R9

  (2539) 0x48f263 MOV	-0x88(%RBP),%RBX

  (2539) 0x48f26a JGE	48f360

  (2539) 0x48f270 MOV	(%R12,%R9,8),%R10

  (2539) 0x48f274 MOV	-0x50(%RBP),%R11

  (2539) 0x48f278 CMPQ	$0,(%R11,%R10,8)

  (2539) 0x48f27d JLE	48f29a

  (2539) 0x48f27f MOV	0x78(%RBP),%RDI

  (2539) 0x48f283 MOV	(%RDI,%R10,8),%R11

  (2539) 0x48f287 CMP	%RCX,(%R13,%R11,8)

  (2539) 0x48f28c JGE	48f29a

  (2539) 0x48f28e MOV	%R8,(%R13,%R11,8)

  (2539) 0x48f293 INC	%R8

  (2539) 0x48f296 MOV	%R8,-0x30(%RBP)

  (2539) 0x48f29a MOV	-0x58(%RBP),%RBX

  (2539) 0x48f29e MOV	(%RBX,%R10,8),%R11

  (2539) 0x48f2a2 MOV	0x8(%RBX,%R10,8),%RBX

  (2539) 0x48f2a7 JMP	48f2b3

0x48f2a9 NOPL	(%RAX)

    (2541) 0x48f2b0 INC	%R11

    (2541) 0x48f2b3 CMP	%RBX,%R11

    (2541) 0x48f2b6 JGE	48f300

    (2541) 0x48f2b8 MOV	(%R12,%R11,8),%R15

    (2541) 0x48f2bc MOV	-0x50(%RBP),%RDI

    (2541) 0x48f2c0 CMPQ	$0,(%RDI,%R15,8)

    (2541) 0x48f2c5 JLE	48f2b0

    (2541) 0x48f2c7 MOV	0x78(%RBP),%RDI

    (2541) 0x48f2cb MOV	(%RDI,%R15,8),%R15

    (2541) 0x48f2cf CMP	%RAX,%R15

    (2541) 0x48f2d2 JE	48f2b0

    (2541) 0x48f2d4 CMP	%RCX,(%R13,%R15,8)

    (2541) 0x48f2d9 JGE	48f2b0

    (2541) 0x48f2db MOV	%R8,(%R13,%R15,8)

    (2541) 0x48f2e0 INC	%R8

    (2541) 0x48f2e3 MOV	%R8,-0x30(%RBP)

    (2541) 0x48f2e7 MOV	-0x58(%RBP),%RBX

    (2541) 0x48f2eb MOV	0x8(%RBX,%R10,8),%RBX

    (2541) 0x48f2f0 JMP	48f2b0

0x48f2f2 NOPW	%CS:(%RAX,%RAX,1)

  (2539) 0x48f300 MOV	0x10(%RBP),%RDI

  (2539) 0x48f304 MOV	(%RDI,%R10,8),%R11

  (2539) 0x48f308 MOV	0x8(%RDI,%R10,8),%RBX

  (2539) 0x48f30d JMP	48f313

0x48f30f NOP

    (2540) 0x48f310 INC	%R11

    (2540) 0x48f313 CMP	%RBX,%R11

    (2540) 0x48f316 JGE	48f250

    (2540) 0x48f31c MOV	0x18(%RBP),%RDI

    (2540) 0x48f320 MOV	(%RDI,%R11,8),%R15

    (2540) 0x48f324 MOV	0x70(%RBP),%RDI

    (2540) 0x48f328 CMPQ	$0,(%RDI,%R15,8)

    (2540) 0x48f32d JLE	48f310

    (2540) 0x48f32f MOV	0x80(%RBP),%RDI

    (2540) 0x48f336 MOV	(%RDI,%R15,8),%R15

    (2540) 0x48f33a CMP	%RDX,(%R14,%R15,8)

    (2540) 0x48f33e JGE	48f310

    (2540) 0x48f340 MOV	%RSI,(%R14,%R15,8)

    (2540) 0x48f344 INC	%RSI

    (2540) 0x48f347 MOV	%RSI,-0x38(%RBP)

    (2540) 0x48f34b MOV	0x10(%RBP),%RDI

    (2540) 0x48f34f MOV	0x8(%RDI,%R10,8),%RBX

    (2540) 0x48f354 JMP	48f310

0x48f356 NOPW	%CS:(%RAX,%RAX,1)

(2535) 0x48f360 MOV	0x10(%RBP),%RDI

(2535) 0x48f364 MOV	-0x90(%RBP),%R13

(2535) 0x48f36b MOV	(%RDI,%R13,8),%R9

(2535) 0x48f36f CMP	0x8(%RDI,%R13,8),%R9

(2535) 0x48f374 JL	48f399

(2535) 0x48f376 JMP	48f1e0

0x48f37b NOPL	(%RAX,%RAX,1)

  (2536) 0x48f380 INC	%R9

  (2536) 0x48f383 MOV	0x10(%RBP),%RDI

  (2536) 0x48f387 CMP	0x8(%RDI,%R13,8),%R9

  (2536) 0x48f38c MOV	-0x88(%RBP),%RBX

  (2536) 0x48f393 JGE	48f1e0

  (2536) 0x48f399 MOV	0x18(%RBP),%RDI

  (2536) 0x48f39d MOV	(%RDI,%R9,8),%R10

  (2536) 0x48f3a1 MOV	0x70(%RBP),%RDI

  (2536) 0x48f3a5 CMPQ	$0,(%RDI,%R10,8)

  (2536) 0x48f3aa JLE	48f3c8

  (2536) 0x48f3ac MOV	0x80(%RBP),%RDI

  (2536) 0x48f3b3 MOV	(%RDI,%R10,8),%R11

  (2536) 0x48f3b7 CMP	%RDX,(%R14,%R11,8)

  (2536) 0x48f3bb JGE	48f3c8

  (2536) 0x48f3bd MOV	%RSI,(%R14,%R11,8)

  (2536) 0x48f3c1 INC	%RSI

  (2536) 0x48f3c4 MOV	%RSI,-0x38(%RBP)

  (2536) 0x48f3c8 MOV	-0x48(%RBP),%R12

  (2536) 0x48f3cc MOV	0x50(%RBP),%RDI

  (2536) 0x48f3d0 MOV	(%RDI,%R10,8),%R11

  (2536) 0x48f3d4 MOV	0x8(%RDI,%R10,8),%RBX

  (2536) 0x48f3d9 JMP	48f3e3

0x48f3db NOPL	(%RAX,%RAX,1)

    (2538) 0x48f3e0 INC	%R11

    (2538) 0x48f3e3 CMP	%RBX,%R11

    (2538) 0x48f3e6 JGE	48f420

    (2538) 0x48f3e8 MOV	0x58(%RBP),%RDI

    (2538) 0x48f3ec MOV	(%RDI,%R11,8),%R15

    (2538) 0x48f3f0 CMP	%RAX,%R15

    (2538) 0x48f3f3 JE	48f3e0

    (2538) 0x48f3f5 CMP	%RCX,(%R12,%R15,8)

    (2538) 0x48f3f9 JGE	48f3e0

    (2538) 0x48f3fb MOV	%R8,(%R12,%R15,8)

    (2538) 0x48f3ff INC	%R8

    (2538) 0x48f402 MOV	%R8,-0x30(%RBP)

    (2538) 0x48f406 MOV	0x50(%RBP),%RDI

    (2538) 0x48f40a MOV	0x8(%RDI,%R10,8),%RBX

    (2538) 0x48f40f JMP	48f3e0

0x48f411 NOPW	%CS:(%RAX,%RAX,1)

  (2536) 0x48f420 MOV	0x60(%RBP),%RDI

  (2536) 0x48f424 MOV	(%RDI,%R10,8),%R11

  (2536) 0x48f428 MOV	0x8(%RDI,%R10,8),%RBX

  (2536) 0x48f42d JMP	48f433

0x48f42f NOP

    (2537) 0x48f430 INC	%R11

    (2537) 0x48f433 CMP	%RBX,%R11

    (2537) 0x48f436 JGE	48f380

    (2537) 0x48f43c MOV	0x68(%RBP),%RDI

    (2537) 0x48f440 MOV	(%RDI,%R11,8),%R15

    (2537) 0x48f444 CMP	%RDX,(%R14,%R15,8)

    (2537) 0x48f448 JGE	48f430

    (2537) 0x48f44a MOV	%RSI,(%R14,%R15,8)

    (2537) 0x48f44e INC	%RSI

    (2537) 0x48f451 MOV	%RSI,-0x38(%RBP)

    (2537) 0x48f455 MOV	0x60(%RBP),%RDI

    (2537) 0x48f459 MOV	0x8(%RDI,%R10,8),%RBX

    (2537) 0x48f45e JMP	48f430

0x48f460 CMP	%RAX,%RBX

0x48f463 JGE	48fae7

0x48f469 LEA	0x38(%R11),%RAX

0x48f46d MOV	%RAX,-0xc8(%RBP)

0x48f474 LEA	0x38(%RDI),%RAX

0x48f478 MOV	%RAX,-0xc0(%RBP)

0x48f47f XOR	%R12D,%R12D

0x48f482 MOV	%RBX,%R13

0x48f485 XOR	%R15D,%R15D

0x48f488 XOR	%ESI,%ESI

0x48f48a XOR	%EAX,%EAX

0x48f48c MOV	%RAX,-0xa8(%RBP)

0x48f493 JMP	48f4b4

0x48f495 NOPW	%CS:(%RAX,%RAX,1)

(2522) 0x48f4a0 MOV	-0x88(%RBP),%RBX

(2522) 0x48f4a7 INC	%R13

(2522) 0x48f4aa CMP	-0x80(%RBP),%R13

(2522) 0x48f4ae JE	48fae7

(2522) 0x48f4b4 MOV	%R15,%RAX

(2522) 0x48f4b7 MOV	%R12,%RBX

(2522) 0x48f4ba MOV	0xa0(%RBP),%RCX

(2522) 0x48f4c1 MOV	(%RCX,%R13,8),%RCX

(2522) 0x48f4c5 MOV	%RCX,-0x90(%RBP)

(2522) 0x48f4cc MOV	0x28(%RBP),%RDX

(2522) 0x48f4d0 MOV	%RSI,-0xa0(%RBP)

(2522) 0x48f4d7 MOV	%RSI,(%RDX,%R13,8)

(2522) 0x48f4db MOV	0x48(%RBP),%RDX

(2522) 0x48f4df CMPQ	$0,(%RDX)

(2522) 0x48f4e3 JE	48f4f4

(2522) 0x48f4e5 MOV	0x38(%RBP),%RDX

(2522) 0x48f4e9 MOV	-0xa8(%RBP),%RCX

(2522) 0x48f4f0 MOV	%RCX,(%RDX,%R13,8)

(2522) 0x48f4f4 MOV	-0x58(%RBP),%RSI

(2522) 0x48f4f8 MOV	-0x90(%RBP),%RCX

(2522) 0x48f4ff MOV	(%RSI,%RCX,8),%RDX

(2522) 0x48f503 MOV	%RAX,%R15

(2522) 0x48f506 MOV	%RBX,%R12

(2522) 0x48f509 CMP	0x8(%RSI,%RCX,8),%RDX

(2522) 0x48f50e JGE	48f670

(2522) 0x48f514 MOV	%RBX,%R12

(2522) 0x48f517 MOV	%RAX,%R15

(2522) 0x48f51a JMP	48f539

0x48f51c NOPL	(%RAX)

  (2532) 0x48f520 INC	%RDX

  (2532) 0x48f523 MOV	-0x58(%RBP),%RSI

  (2532) 0x48f527 MOV	-0x90(%RBP),%RCX

  (2532) 0x48f52e CMP	0x8(%RSI,%RCX,8),%RDX

  (2532) 0x48f533 JGE	48f670

  (2532) 0x48f539 MOV	-0x70(%RBP),%RSI

  (2532) 0x48f53d MOV	(%RSI,%RDX,8),%RSI

  (2532) 0x48f541 MOV	-0x50(%RBP),%RDI

  (2532) 0x48f545 CMPQ	$0,(%RDI,%RSI,8)

  (2532) 0x48f54a JLE	48f585

  (2532) 0x48f54c MOV	0x78(%RBP),%RDI

  (2532) 0x48f550 MOV	(%RDI,%RSI,8),%RDI

  (2532) 0x48f554 MOV	-0x48(%RBP),%R9

  (2532) 0x48f558 MOV	(%R9,%RDI,8),%R8

  (2532) 0x48f55c SUB	%RAX,%R8

  (2532) 0x48f55f JGE	48f580

  (2532) 0x48f561 MOV	%R15,(%R9,%RDI,8)

  (2532) 0x48f565 MOV	%R15,%RDI

  (2532) 0x48f568 SUB	%RAX,%RDI

  (2532) 0x48f56b MOVQ	$0x2,(%R11,%RDI,8)

  (2532) 0x48f573 INC	%R15

  (2532) 0x48f576 JMP	48f585

0x48f578 NOPL	(%RAX,%RAX,1)

  (2532) 0x48f580 ADDQ	$0x2,(%R11,%R8,8)

  (2532) 0x48f585 MOV	-0x58(%RBP),%R8

  (2532) 0x48f589 MOV	(%R8,%RSI,8),%RDI

  (2532) 0x48f58d JMP	48f5a7

    (2534) 0x48f58f INCQ	(%R11,%R9,8)

    (2534) 0x48f593 NOPW	%CS:(%RAX,%RAX,1)

    (2534) 0x48f5a0 INC	%RDI

    (2534) 0x48f5a3 MOV	-0x58(%RBP),%R8

    (2534) 0x48f5a7 CMP	0x8(%R8,%RSI,8),%RDI

    (2534) 0x48f5ac JGE	48f600

    (2534) 0x48f5ae MOV	-0x70(%RBP),%R8

    (2534) 0x48f5b2 MOV	(%R8,%RDI,8),%R8

    (2534) 0x48f5b6 MOV	-0x50(%RBP),%R9

    (2534) 0x48f5ba CMPQ	$0,(%R9,%R8,8)

    (2534) 0x48f5bf JLE	48f5a0

    (2534) 0x48f5c1 MOV	0x78(%RBP),%R9

    (2534) 0x48f5c5 MOV	(%R9,%R8,8),%R8

    (2534) 0x48f5c9 CMP	%R13,%R8

    (2534) 0x48f5cc JE	48f5a0

    (2534) 0x48f5ce MOV	-0x48(%RBP),%RCX

    (2534) 0x48f5d2 MOV	(%RCX,%R8,8),%R9

    (2534) 0x48f5d6 SUB	%RAX,%R9

    (2534) 0x48f5d9 JGE	48f58f

    (2534) 0x48f5db MOV	%R15,(%RCX,%R8,8)

    (2534) 0x48f5df MOV	%R15,%R8

    (2534) 0x48f5e2 SUB	%RAX,%R8

    (2534) 0x48f5e5 MOVQ	$0x1,(%R11,%R8,8)

    (2534) 0x48f5ed INC	%R15

    (2534) 0x48f5f0 JMP	48f5a0

0x48f5f2 NOPW	%CS:(%RAX,%RAX,1)

  (2532) 0x48f600 MOV	0x10(%RBP),%R8

  (2532) 0x48f604 MOV	(%R8,%RSI,8),%RDI

  (2532) 0x48f608 JMP	48f61f

0x48f60a NOPW	(%RAX,%RAX,1)

    (2533) 0x48f610 MOV	-0x40(%RBP),%R8

    (2533) 0x48f614 INCQ	(%R8,%R9,8)

    (2533) 0x48f618 INC	%RDI

    (2533) 0x48f61b MOV	0x10(%RBP),%R8

    (2533) 0x48f61f CMP	0x8(%R8,%RSI,8),%RDI

    (2533) 0x48f624 JGE	48f520

    (2533) 0x48f62a MOV	0x18(%RBP),%R8

    (2533) 0x48f62e MOV	(%R8,%RDI,8),%R8

    (2533) 0x48f632 MOV	0x70(%RBP),%R9

    (2533) 0x48f636 CMPQ	$0,(%R9,%R8,8)

    (2533) 0x48f63b JLE	48f618

    (2533) 0x48f63d MOV	0x80(%RBP),%R9

    (2533) 0x48f644 MOV	(%R9,%R8,8),%R8

    (2533) 0x48f648 MOV	(%R14,%R8,8),%R9

    (2533) 0x48f64c SUB	%RBX,%R9

    (2533) 0x48f64f JGE	48f610

    (2533) 0x48f651 MOV	%R12,(%R14,%R8,8)

    (2533) 0x48f655 MOV	%R12,%R8

    (2533) 0x48f658 SUB	%RBX,%R8

    (2533) 0x48f65b MOV	-0x40(%RBP),%R9

    (2533) 0x48f65f MOVQ	$0x1,(%R9,%R8,8)

    (2533) 0x48f667 INC	%R12

    (2533) 0x48f66a JMP	48f618

0x48f66c NOPL	(%RAX)

(2522) 0x48f670 MOV	0x10(%RBP),%RSI

(2522) 0x48f674 MOV	-0x90(%RBP),%RCX

(2522) 0x48f67b MOV	(%RSI,%RCX,8),%RDX

(2522) 0x48f67f JMP	48f69e

0x48f681 NOPW	%CS:(%RAX,%RAX,1)

  (2529) 0x48f690 INC	%RDX

  (2529) 0x48f693 MOV	0x10(%RBP),%RSI

  (2529) 0x48f697 MOV	-0x90(%RBP),%RCX

  (2529) 0x48f69e CMP	0x8(%RSI,%RCX,8),%RDX

  (2529) 0x48f6a3 JGE	48f7c0

  (2529) 0x48f6a9 MOV	0x18(%RBP),%RSI

  (2529) 0x48f6ad MOV	(%RSI,%RDX,8),%RSI

  (2529) 0x48f6b1 MOV	0x70(%RBP),%RDI

  (2529) 0x48f6b5 CMPQ	$0,(%RDI,%RSI,8)

  (2529) 0x48f6ba JLE	48f6f9

  (2529) 0x48f6bc MOV	0x80(%RBP),%RDI

  (2529) 0x48f6c3 MOV	(%RDI,%RSI,8),%RDI

  (2529) 0x48f6c7 MOV	(%R14,%RDI,8),%R8

  (2529) 0x48f6cb SUB	%RBX,%R8

  (2529) 0x48f6ce JGE	48f6f0

  (2529) 0x48f6d0 MOV	%R12,(%R14,%RDI,8)

  (2529) 0x48f6d4 MOV	%R12,%RDI

  (2529) 0x48f6d7 SUB	%RBX,%RDI

  (2529) 0x48f6da MOV	-0x40(%RBP),%R8

  (2529) 0x48f6de MOVQ	$0x2,(%R8,%RDI,8)

  (2529) 0x48f6e6 INC	%R12

  (2529) 0x48f6e9 JMP	48f6f9

0x48f6eb NOPL	(%RAX,%RAX,1)

  (2529) 0x48f6f0 MOV	-0x40(%RBP),%RDI

  (2529) 0x48f6f4 ADDQ	$0x2,(%RDI,%R8,8)

  (2529) 0x48f6f9 MOV	0x50(%RBP),%R8

  (2529) 0x48f6fd MOV	(%R8,%RSI,8),%RDI

  (2529) 0x48f701 JMP	48f71b

0x48f703 NOPW	%CS:(%RAX,%RAX,1)

    (2531) 0x48f710 INCQ	(%R11,%R9,8)

    (2531) 0x48f714 INC	%RDI

    (2531) 0x48f717 MOV	0x50(%RBP),%R8

    (2531) 0x48f71b CMP	0x8(%R8,%RSI,8),%RDI

    (2531) 0x48f720 JGE	48f760

    (2531) 0x48f722 MOV	0x58(%RBP),%R8

    (2531) 0x48f726 MOV	(%R8,%RDI,8),%R8

    (2531) 0x48f72a CMP	%R13,%R8

    (2531) 0x48f72d JE	48f714

    (2531) 0x48f72f MOV	-0x48(%RBP),%RCX

    (2531) 0x48f733 MOV	(%RCX,%R8,8),%R9

    (2531) 0x48f737 SUB	%RAX,%R9

    (2531) 0x48f73a JGE	48f710

    (2531) 0x48f73c MOV	%R15,(%RCX,%R8,8)

    (2531) 0x48f740 MOV	%R15,%R8

    (2531) 0x48f743 SUB	%RAX,%R8

    (2531) 0x48f746 MOVQ	$0x1,(%R11,%R8,8)

    (2531) 0x48f74e INC	%R15

    (2531) 0x48f751 JMP	48f714

0x48f753 NOPW	%CS:(%RAX,%RAX,1)

  (2529) 0x48f760 MOV	0x60(%RBP),%R8

  (2529) 0x48f764 MOV	(%R8,%RSI,8),%RDI

  (2529) 0x48f768 JMP	48f77f

0x48f76a NOPW	(%RAX,%RAX,1)

    (2530) 0x48f770 MOV	-0x40(%RBP),%R8

    (2530) 0x48f774 INCQ	(%R8,%R9,8)

    (2530) 0x48f778 INC	%RDI

    (2530) 0x48f77b MOV	0x60(%RBP),%R8

    (2530) 0x48f77f CMP	0x8(%R8,%RSI,8),%RDI

    (2530) 0x48f784 JGE	48f690

    (2530) 0x48f78a MOV	0x68(%RBP),%R8

    (2530) 0x48f78e MOV	(%R8,%RDI,8),%R8

    (2530) 0x48f792 MOV	(%R14,%R8,8),%R9

    (2530) 0x48f796 SUB	%RBX,%R9

    (2530) 0x48f799 JGE	48f770

    (2530) 0x48f79b MOV	%R12,(%R14,%R8,8)

    (2530) 0x48f79f MOV	%R12,%R8

    (2530) 0x48f7a2 SUB	%RBX,%R8

    (2530) 0x48f7a5 MOV	-0x40(%RBP),%R9

    (2530) 0x48f7a9 MOVQ	$0x1,(%R9,%R8,8)

    (2530) 0x48f7b1 INC	%R12

    (2530) 0x48f7b4 JMP	48f778

0x48f7b6 NOPW	%CS:(%RAX,%RAX,1)

(2522) 0x48f7c0 MOV	%R15,%RDX

(2522) 0x48f7c3 SUB	%RAX,%RDX

(2522) 0x48f7c6 JLE	48f8b0

(2522) 0x48f7cc CMP	$0xd,%RDX

(2522) 0x48f7d0 MOV	-0x40(%RBP),%RDI

(2522) 0x48f7d4 MOV	-0xa0(%RBP),%RSI

(2522) 0x48f7db JB	48f8c0

(2522) 0x48f7e1 MOV	%RDX,%RAX

(2522) 0x48f7e4 SHR	$0x3,%RAX

(2522) 0x48f7e8 MOV	-0xc8(%RBP),%RCX

(2522) 0x48f7ef JMP	48f80d

0x48f7f1 NOPW	%CS:(%RAX,%RAX,1)

  (2528) 0x48f800 ADD	$0x40,%RCX

  (2528) 0x48f804 DEC	%RAX

  (2528) 0x48f807 JE	48f900

  (2528) 0x48f80d CMP	%R10,-0x38(%RCX)

  (2528) 0x48f811 JGE	48f840

  (2528) 0x48f813 CMP	%R10,-0x30(%RCX)

  (2528) 0x48f817 JGE	48f84d

  (2528) 0x48f819 CMP	%R10,-0x28(%RCX)

  (2528) 0x48f81d JGE	48f85a

  (2528) 0x48f81f CMP	%R10,-0x20(%RCX)

  (2528) 0x48f823 JGE	48f867

  (2528) 0x48f825 CMP	%R10,-0x18(%RCX)

  (2528) 0x48f829 JGE	48f874

  (2528) 0x48f82b CMP	%R10,-0x10(%RCX)

  (2528) 0x48f82f JGE	48f881

  (2528) 0x48f831 CMP	%R10,-0x8(%RCX)

  (2528) 0x48f835 JGE	48f88e

  (2528) 0x48f837 CMP	%R10,(%RCX)

  (2528) 0x48f83a JL	48f800

  (2528) 0x48f83c JMP	48f89e

0x48f83e XCHG	%AX,%AX

  (2528) 0x48f840 INC	%RSI

  (2528) 0x48f843 MOV	%RSI,-0x30(%RBP)

  (2528) 0x48f847 CMP	%R10,-0x30(%RCX)

  (2528) 0x48f84b JL	48f819

  (2528) 0x48f84d INC	%RSI

  (2528) 0x48f850 MOV	%RSI,-0x30(%RBP)

  (2528) 0x48f854 CMP	%R10,-0x28(%RCX)

  (2528) 0x48f858 JL	48f81f

  (2528) 0x48f85a INC	%RSI

  (2528) 0x48f85d MOV	%RSI,-0x30(%RBP)

  (2528) 0x48f861 CMP	%R10,-0x20(%RCX)

  (2528) 0x48f865 JL	48f825

  (2528) 0x48f867 INC	%RSI

  (2528) 0x48f86a MOV	%RSI,-0x30(%RBP)

  (2528) 0x48f86e CMP	%R10,-0x18(%RCX)

  (2528) 0x48f872 JL	48f82b

  (2528) 0x48f874 INC	%RSI

  (2528) 0x48f877 MOV	%RSI,-0x30(%RBP)

  (2528) 0x48f87b CMP	%R10,-0x10(%RCX)

  (2528) 0x48f87f JL	48f831

  (2528) 0x48f881 INC	%RSI

  (2528) 0x48f884 MOV	%RSI,-0x30(%RBP)

  (2528) 0x48f888 CMP	%R10,-0x8(%RCX)

  (2528) 0x48f88c JL	48f837

  (2528) 0x48f88e INC	%RSI

  (2528) 0x48f891 MOV	%RSI,-0x30(%RBP)

  (2528) 0x48f895 CMP	%R10,(%RCX)

  (2528) 0x48f898 JL	48f800

  (2528) 0x48f89e INC	%RSI

  (2528) 0x48f8a1 MOV	%RSI,-0x30(%RBP)

  (2528) 0x48f8a5 JMP	48f800

0x48f8aa NOPW	(%RAX,%RAX,1)

(2522) 0x48f8b0 MOV	-0x40(%RBP),%RDI

(2522) 0x48f8b4 MOV	-0xa0(%RBP),%RSI

(2522) 0x48f8bb JMP	48f938

0x48f8bd NOPL	(%RAX)

(2522) 0x48f8c0 XOR	%EAX,%EAX

(2522) 0x48f8c2 JMP	48f8e3

0x48f8c4 NOPW	%CS:(%RAX,%RAX,1)

  (2526) 0x48f8d0 LEA	(%R11,%RAX,8),%RCX

  (2526) 0x48f8d4 MOVQ	$0,(%RCX)

  (2526) 0x48f8db INC	%RAX

  (2526) 0x48f8de CMP	%RAX,%RDX

  (2526) 0x48f8e1 JE	48f938

  (2526) 0x48f8e3 LEA	(%R11,%RAX,8),%RCX

  (2526) 0x48f8e7 MOV	(%RCX),%RCX

  (2526) 0x48f8ea CMP	%R10,%RCX

  (2526) 0x48f8ed JL	48f8d0

  (2526) 0x48f8ef INC	%RSI

  (2526) 0x48f8f2 MOV	%RSI,-0x30(%RBP)

  (2526) 0x48f8f6 JMP	48f8d0

0x48f8f8 NOPL	(%RAX,%RAX,1)

(2522) 0x48f900 MOV	%RDX,%RAX

(2522) 0x48f903 AND	$-0x8,%RAX

(2522) 0x48f907 CMP	%RDX,%RAX

(2522) 0x48f90a JB	48fa2c

(2522) 0x48f910 MOV	%RSI,-0xa0(%RBP)

(2522) 0x48f917 SAL	$0x3,%RDX

(2522) 0x48f91b MOV	%R11,%RDI

(2522) 0x48f91e XOR	%ESI,%ESI

(2522) 0x48f920 CALL	4f03c0 <_intel_fast_memset>

(2522) 0x48f925 MOV	-0xa0(%RBP),%RSI

(2522) 0x48f92c MOV	-0x60(%RBP),%R11

(2522) 0x48f930 MOV	-0x68(%RBP),%R10

(2522) 0x48f934 MOV	-0x40(%RBP),%RDI

(2522) 0x48f938 MOV	%R12,%RDX

(2522) 0x48f93b SUB	%RBX,%RDX

(2522) 0x48f93e JLE	48f4a0

(2522) 0x48f944 CMP	$0xd,%RDX

(2522) 0x48f948 MOV	-0x88(%RBP),%RBX

(2522) 0x48f94f JB	48fa40

(2522) 0x48f955 MOV	%RDX,%RAX

(2522) 0x48f958 SHR	$0x3,%RAX

(2522) 0x48f95c MOV	-0xc0(%RBP),%RCX

(2522) 0x48f963 MOV	-0xa8(%RBP),%R8

(2522) 0x48f96a JMP	48f97d

0x48f96c NOPL	(%RAX)

  (2525) 0x48f970 ADD	$0x40,%RCX

  (2525) 0x48f974 DEC	%RAX

  (2525) 0x48f977 JE	48fa90

  (2525) 0x48f97d CMP	%R10,-0x38(%RCX)

  (2525) 0x48f981 JGE	48f9b0

  (2525) 0x48f983 CMP	%R10,-0x30(%RCX)

  (2525) 0x48f987 JGE	48f9bd

  (2525) 0x48f989 CMP	%R10,-0x28(%RCX)

  (2525) 0x48f98d JGE	48f9ca

  (2525) 0x48f98f CMP	%R10,-0x20(%RCX)

  (2525) 0x48f993 JGE	48f9d7

  (2525) 0x48f995 CMP	%R10,-0x18(%RCX)

  (2525) 0x48f999 JGE	48f9e4

  (2525) 0x48f99b CMP	%R10,-0x10(%RCX)

  (2525) 0x48f99f JGE	48f9f1

  (2525) 0x48f9a1 CMP	%R10,-0x8(%RCX)

  (2525) 0x48f9a5 JGE	48f9fe

  (2525) 0x48f9a7 CMP	%R10,(%RCX)

  (2525) 0x48f9aa JL	48f970

  (2525) 0x48f9ac JMP	48fa0e

0x48f9ae XCHG	%AX,%AX

  (2525) 0x48f9b0 INC	%R8

  (2525) 0x48f9b3 MOV	%R8,-0x38(%RBP)

  (2525) 0x48f9b7 CMP	%R10,-0x30(%RCX)

  (2525) 0x48f9bb JL	48f989

  (2525) 0x48f9bd INC	%R8

  (2525) 0x48f9c0 MOV	%R8,-0x38(%RBP)

  (2525) 0x48f9c4 CMP	%R10,-0x28(%RCX)

  (2525) 0x48f9c8 JL	48f98f

  (2525) 0x48f9ca INC	%R8

  (2525) 0x48f9cd MOV	%R8,-0x38(%RBP)

  (2525) 0x48f9d1 CMP	%R10,-0x20(%RCX)

  (2525) 0x48f9d5 JL	48f995

  (2525) 0x48f9d7 INC	%R8

  (2525) 0x48f9da MOV	%R8,-0x38(%RBP)

  (2525) 0x48f9de CMP	%R10,-0x18(%RCX)

  (2525) 0x48f9e2 JL	48f99b

  (2525) 0x48f9e4 INC	%R8

  (2525) 0x48f9e7 MOV	%R8,-0x38(%RBP)

  (2525) 0x48f9eb CMP	%R10,-0x10(%RCX)

  (2525) 0x48f9ef JL	48f9a1

  (2525) 0x48f9f1 INC	%R8

  (2525) 0x48f9f4 MOV	%R8,-0x38(%RBP)

  (2525) 0x48f9f8 CMP	%R10,-0x8(%RCX)

  (2525) 0x48f9fc JL	48f9a7

  (2525) 0x48f9fe INC	%R8

  (2525) 0x48fa01 MOV	%R8,-0x38(%RBP)

  (2525) 0x48fa05 CMP	%R10,(%RCX)

  (2525) 0x48fa08 JL	48f970

  (2525) 0x48fa0e INC	%R8

  (2525) 0x48fa11 MOV	%R8,-0x38(%RBP)

  (2525) 0x48fa15 JMP	48f970

0x48fa1a NOPW	(%RAX,%RAX,1)

  (2527) 0x48fa20 INC	%RAX

  (2527) 0x48fa23 CMP	%RAX,%RDX

  (2527) 0x48fa26 JE	48f910

  (2527) 0x48fa2c CMP	%R10,(%R11,%RAX,8)

  (2527) 0x48fa30 JL	48fa20

  (2527) 0x48fa32 INC	%RSI

  (2527) 0x48fa35 MOV	%RSI,-0x30(%RBP)

  (2527) 0x48fa39 JMP	48fa20

0x48fa3b NOPL	(%RAX,%RAX,1)

(2522) 0x48fa40 XOR	%EAX,%EAX

(2522) 0x48fa42 JMP	48fa67

0x48fa44 NOPW	%CS:(%RAX,%RAX,1)

  (2523) 0x48fa50 LEA	(%RDI,%RAX,8),%RCX

  (2523) 0x48fa54 MOVQ	$0,(%RCX)

  (2523) 0x48fa5b INC	%RAX

  (2523) 0x48fa5e CMP	%RAX,%RDX

  (2523) 0x48fa61 JE	48f4a7

  (2523) 0x48fa67 LEA	(%RDI,%RAX,8),%RCX

  (2523) 0x48fa6b MOV	(%RCX),%RCX

  (2523) 0x48fa6e CMP	%R10,%RCX

  (2523) 0x48fa71 JL	48fa50

  (2523) 0x48fa73 MOV	-0xa8(%RBP),%R8

  (2523) 0x48fa7a INC	%R8

  (2523) 0x48fa7d MOV	%R8,%RCX

  (2523) 0x48fa80 MOV	%R8,-0xa8(%RBP)

  (2523) 0x48fa87 MOV	%R8,-0x38(%RBP)

  (2523) 0x48fa8b JMP	48fa50

0x48fa8d NOPL	(%RAX)

(2522) 0x48fa90 MOV	%RDX,%RAX

(2522) 0x48fa93 AND	$-0x8,%RAX

(2522) 0x48fa97 CMP	%RDX,%RAX

(2522) 0x48fa9a MOV	%RSI,-0xa0(%RBP)

(2522) 0x48faa1 JB	48fad8

(2522) 0x48faa3 MOV	%R8,-0xa8(%RBP)

(2522) 0x48faaa SAL	$0x3,%RDX

(2522) 0x48faae XOR	%ESI,%ESI

(2522) 0x48fab0 CALL	4f03c0 <_intel_fast_memset>

(2522) 0x48fab5 MOV	-0x68(%RBP),%R10

(2522) 0x48fab9 MOV	-0x60(%RBP),%R11

(2522) 0x48fabd MOV	-0xa0(%RBP),%RSI

(2522) 0x48fac4 JMP	48f4a7

0x48fac9 NOPL	(%RAX)

  (2524) 0x48fad0 INC	%RAX

  (2524) 0x48fad3 CMP	%RAX,%RDX

  (2524) 0x48fad6 JE	48faa3

  (2524) 0x48fad8 CMP	%R10,(%RDI,%RAX,8)

  (2524) 0x48fadc JL	48fad0

  (2524) 0x48fade INC	%R8

  (2524) 0x48fae1 MOV	%R8,-0x38(%RBP)

  (2524) 0x48fae5 JMP	48fad0

0x48fae7 MOV	0x88(%RBP),%R15

0x48faee MOV	(%R15),%RAX

0x48faf1 MOV	0x28(%RBP),%RCX

0x48faf5 LEA	(%RCX,%RAX,8),%RSI

0x48faf9 MOV	0x38(%RBP),%RCX

0x48fafd LEA	(%RCX,%RAX,8),%RCX

0x48fb01 LEA	-0x30(%RBP),%RDI

0x48fb05 LEA	-0x38(%RBP),%RDX

0x48fb09 MOV	0x90(%RBP),%R8

0x48fb10 CALL	4e9f20 <hypre_prefix_sum_pair>

0x48fb15 CMPQ	$0,(%R15)

0x48fb19 MOV	-0x48(%RBP),%RCX

0x48fb1d JLE	48fb40

0x48fb1f XOR	%EAX,%EAX

0x48fb21 NOPW	%CS:(%RAX,%RAX,1)

(2521) 0x48fb30 MOVQ	$-0x1,(%RCX,%RAX,8)

(2521) 0x48fb38 INC	%RAX

(2521) 0x48fb3b CMP	(%R15),%RAX

(2521) 0x48fb3e JL	48fb30

0x48fb40 MOV	0x48(%RBP),%RCX

0x48fb44 CMPQ	$0,(%RCX)

0x48fb48 MOV	-0x50(%RBP),%R13

0x48fb4c MOV	-0xb0(%RBP),%R15

0x48fb53 JLE	48fb70

0x48fb55 XOR	%EAX,%EAX

0x48fb57 NOPW	(%RAX,%RAX,1)

(2520) 0x48fb60 MOVQ	$-0x1,(%R14,%RAX,8)

(2520) 0x48fb68 INC	%RAX

(2520) 0x48fb6b CMP	(%RCX),%RAX

(2520) 0x48fb6e JL	48fb60

0x48fb70 MOV	(%R15),%ESI

0x48fb73 MOV	$0x535410,%EDI

0x48fb78 CALL	410560 <__kmpc_barrier@plt>

0x48fb7d MOV	(%R15),%ESI

0x48fb80 MOV	$0x535430,%EDI

0x48fb85 XOR	%EDX,%EDX

0x48fb87 CALL	4106c0 <__kmpc_masked@plt>

0x48fb8c CMP	$0x1,%EAX

0x48fb8f MOV	%R15,%RAX

0x48fb92 MOV	-0x70(%RBP),%R15

0x48fb96 MOV	-0x98(%RBP),%R12

0x48fb9d JNE	48fc07

0x48fb9f MOV	0x88(%RBP),%RAX

0x48fba6 MOV	(%RAX),%RAX

0x48fba9 MOV	0x28(%RBP),%RCX

0x48fbad MOV	(%RCX,%RAX,8),%RDI

0x48fbb1 TEST	%RDI,%RDI

0x48fbb4 JE	48fbd0

0x48fbb6 SAL	$0x3,%RDI

0x48fbba CALL	4e7260 <hypre_MAlloc>

0x48fbbf MOV	0x30(%RBP),%RCX

0x48fbc3 MOV	%RAX,(%RCX)

0x48fbc6 MOV	0x88(%RBP),%RAX

0x48fbcd MOV	(%RAX),%RAX

0x48fbd0 MOV	0x38(%RBP),%RCX

0x48fbd4 MOV	(%RCX,%RAX,8),%RDI

0x48fbd8 TEST	%RDI,%RDI

0x48fbdb JE	48fbed

0x48fbdd SAL	$0x3,%RDI

0x48fbe1 CALL	4e7260 <hypre_MAlloc>

0x48fbe6 MOV	0x40(%RBP),%RCX

0x48fbea MOV	%RAX,(%RCX)

0x48fbed MOV	-0xb0(%RBP),%RAX

0x48fbf4 MOV	(%RAX),%ESI

0x48fbf6 MOV	$0x535450,%EDI

0x48fbfb CALL	4104f0 <__kmpc_end_masked@plt>

0x48fc00 MOV	-0xb0(%RBP),%RAX

0x48fc07 MOV	(%RAX),%ESI

0x48fc09 MOV	$0x535470,%EDI

0x48fc0e CALL	410560 <__kmpc_barrier@plt>

0x48fc13 MOV	-0x80(%RBP),%RCX

0x48fc17 LEA	-0x1(%RCX),%RAX

0x48fc1b MOV	%RAX,%RSI

0x48fc1e MOV	%RBX,%RDX

0x48fc21 SUB	%RBX,%RSI

0x48fc24 MOV	0x38(%RBP),%R11

0x48fc28 MOV	0x28(%RBP),%R10

0x48fc2c JLE	490019

0x48fc32 MOV	%RSI,%R13

0x48fc35 MOV	%RCX,%R15

0x48fc38 LEA	(%R10,%RAX,8),%RCX

0x48fc3c LEA	(%R11,%RBX,8),%R8

0x48fc40 CMP	%R8,%RCX

0x48fc43 SETAE	%R12B

0x48fc47 LEA	(%R11,%RAX,8),%RDX

0x48fc4b LEA	(%R10,%RBX,8),%R9

0x48fc4f CMP	%R9,%RDX

0x48fc52 SETAE	%DIL

0x48fc56 MOV	0xa0(%RBP),%R11

0x48fc5d LEA	(%R11,%RBX,8),%R10

0x48fc61 CMP	%R10,%RCX

0x48fc64 SETB	%SIL

0x48fc68 LEA	-0x10(%R11,%R15,8),%RBX

0x48fc6d CMP	%R9,%RBX

0x48fc70 SETB	%R15B

0x48fc74 CMP	%R10,%RDX

0x48fc77 SETB	%R11B

0x48fc7b MOV	-0x30(%RBP),%RCX

0x48fc7f CMP	%R8,%RBX

0x48fc82 MOV	-0x38(%RBP),%RDX

0x48fc86 SETB	%BL

0x48fc89 TEST	%DIL,%R12B

0x48fc8c JNE	48fe69

0x48fc92 OR	%R15B,%SIL

0x48fc95 JE	48fe69

0x48fc9b OR	%BL,%R11B

0x48fc9e JE	48fe69

0x48fca4 MOV	%R13,%RDI

0x48fca7 MOV	%R13,%R11

0x48fcaa AND	$-0x4,%R11

0x48fcae MOV	-0x50(%RBP),%R13

0x48fcb2 JE	48fed9

0x48fcb8 MOV	%RDI,%RSI

0x48fcbb VPBROADCASTQ	%RCX,%YMM0

0x48fcc1 VPBROADCASTQ	%RDX,%YMM1

0x48fcc7 AND	$-0x10,%RSI

0x48fccb JE	48feeb

0x48fcd1 LEA	-0x1(%RSI),%RBX

0x48fcd5 XOR	%R15D,%R15D

0x48fcd8 VPBROADCASTQ	0x7d0af(%RIP),%YMM2

0x48fce1 NOPW	%CS:(%RAX,%RAX,1)

(2519) 0x48fcf0 VMOVDQU	(%R9,%R15,8),%YMM3

(2519) 0x48fcf6 VMOVDQU	0x20(%R9,%R15,8),%YMM4

(2519) 0x48fcfd VMOVDQU	0x40(%R9,%R15,8),%YMM5

(2519) 0x48fd04 VMOVDQU	0x60(%R9,%R15,8),%YMM6

(2519) 0x48fd0b VPCMPEQQ	0x68(%R9,%R15,8),%YMM6,%K1

(2519) 0x48fd16 VPCMPEQQ	0x48(%R9,%R15,8),%YMM5,%K3

(2519) 0x48fd21 VPCMPEQQ	0x28(%R9,%R15,8),%YMM4,%K4

(2519) 0x48fd2c VPCMPEQQ	0x8(%R9,%R15,8),%YMM3,%K2

(2519) 0x48fd37 VMOVDQU64	0x8(%R8,%R15,8),%YMM7{%K2}{z}

(2519) 0x48fd42 VMOVDQU64	0x28(%R8,%R15,8),%YMM8{%K4}{z}

(2519) 0x48fd4d VMOVDQU64	0x48(%R8,%R15,8),%YMM9{%K3}{z}

(2519) 0x48fd58 VMOVDQU64	0x68(%R8,%R15,8),%YMM10{%K1}{z}

(2519) 0x48fd63 VMOVDQU64	(%R8,%R15,8),%YMM11{%K2}{z}

(2519) 0x48fd6a VMOVDQU64	0x20(%R8,%R15,8),%YMM12{%K4}{z}

(2519) 0x48fd72 VMOVDQU64	0x40(%R8,%R15,8),%YMM13{%K3}{z}

(2519) 0x48fd7a VMOVDQU64	0x60(%R8,%R15,8),%YMM14{%K1}{z}

(2519) 0x48fd82 VPCMPEQQ	%YMM10,%YMM14,%K1{%K1}

(2519) 0x48fd88 VMOVDQU64	0x60(%R10,%R15,8),%YMM10{%K1}{z}

(2519) 0x48fd90 VPCMPEQQ	%YMM9,%YMM13,%K3{%K3}

(2519) 0x48fd96 VMOVDQU64	0x40(%R10,%R15,8),%YMM9{%K3}{z}

(2519) 0x48fd9e VPCMPEQQ	%YMM8,%YMM12,%K4{%K4}

(2519) 0x48fda4 VMOVDQU64	0x20(%R10,%R15,8),%YMM8{%K4}{z}

(2519) 0x48fdac VPCMPEQQ	%YMM7,%YMM11,%K2{%K2}

(2519) 0x48fdb2 VMOVDQU64	(%R10,%R15,8),%YMM7{%K2}{z}

(2519) 0x48fdb9 VPSCATTERQQ	%YMM2,(%R13,%YMM7,8){%K2}

(2519) 0x48fdc1 VPSCATTERQQ	%YMM2,(%R13,%YMM8,8){%K4}

(2519) 0x48fdc9 VPSCATTERQQ	%YMM2,(%R13,%YMM9,8){%K3}

(2519) 0x48fdd1 VPSCATTERQQ	%YMM2,(%R13,%YMM10,8){%K1}

(2519) 0x48fdd9 VPADDQ	%YMM3,%YMM0,%YMM3

(2519) 0x48fddd VPADDQ	%YMM4,%YMM0,%YMM4

(2519) 0x48fde1 VPADDQ	%YMM5,%YMM0,%YMM5

(2519) 0x48fde5 VPADDQ	%YMM6,%YMM0,%YMM6

(2519) 0x48fde9 VMOVDQU	%YMM6,0x60(%R9,%R15,8)

(2519) 0x48fdf0 VMOVDQU	%YMM5,0x40(%R9,%R15,8)

(2519) 0x48fdf7 VMOVDQU	%YMM4,0x20(%R9,%R15,8)

(2519) 0x48fdfe VMOVDQU	%YMM3,(%R9,%R15,8)

(2519) 0x48fe04 VPADDQ	0x40(%R8,%R15,8),%YMM1,%YMM3

(2519) 0x48fe0b VPADDQ	0x20(%R8,%R15,8),%YMM1,%YMM4

(2519) 0x48fe12 VPADDQ	(%R8,%R15,8),%YMM1,%YMM5

(2519) 0x48fe18 VPADDQ	0x60(%R8,%R15,8),%YMM1,%YMM6

(2519) 0x48fe1f VMOVDQU	%YMM6,0x60(%R8,%R15,8)

(2519) 0x48fe26 VMOVDQU	%YMM5,(%R8,%R15,8)

(2519) 0x48fe2c VMOVDQU	%YMM4,0x20(%R8,%R15,8)

(2519) 0x48fe33 VMOVDQU	%YMM3,0x40(%R8,%R15,8)

(2519) 0x48fe3a ADD	$0x10,%R15

(2519) 0x48fe3e CMP	%RBX,%R15

(2519) 0x48fe41 JBE	48fcf0

0x48fe47 CMP	%RSI,%R11

0x48fe4a MOV	-0x70(%RBP),%R15

0x48fe4e MOV	-0x98(%RBP),%R12

0x48fe55 JNE	48fef8

0x48fe5b CMP	%R11,%RDI

0x48fe5e JE	48ff81

0x48fe64 JMP	48ff9c

0x48fe69 MOV	-0x88(%RBP),%RBX

0x48fe70 MOV	%RBX,%RSI

0x48fe73 MOV	-0x70(%RBP),%R15

0x48fe77 MOV	-0x50(%RBP),%R13

0x48fe7b MOV	-0x98(%RBP),%R12

0x48fe82 MOV	0x38(%RBP),%R11

0x48fe86 MOV	0x28(%RBP),%R10

0x48fe8a JMP	48feaa

0x48fe8c NOPL	(%RAX)

(2516) 0x48fe90 ADD	%RCX,%RDI

(2516) 0x48fe93 LEA	(%R10,%RSI,8),%R8

(2516) 0x48fe97 MOV	%RDI,(%R8)

(2516) 0x48fe9a ADD	%RDX,(%R11,%RSI,8)

(2516) 0x48fe9e INC	%RSI

(2516) 0x48fea1 CMP	%RSI,%RAX

(2516) 0x48fea4 JE	490012

(2516) 0x48feaa LEA	(%R10,%RSI,8),%RDI

(2516) 0x48feae MOV	(%RDI),%RDI

(2516) 0x48feb1 CMP	%RDI,0x8(%R10,%RSI,8)

(2516) 0x48feb6 JNE	48fe90

(2516) 0x48feb8 MOV	0x8(%R11,%RSI,8),%R8

(2516) 0x48febd CMP	(%R11,%RSI,8),%R8

(2516) 0x48fec1 JNE	48fe90

(2516) 0x48fec3 MOV	0xa0(%RBP),%R8

(2516) 0x48feca MOV	(%R8,%RSI,8),%R8

(2516) 0x48fece MOVQ	$0x2,(%R13,%R8,8)

(2516) 0x48fed7 JMP	48fe90

0x48fed9 XOR	%ESI,%ESI

0x48fedb MOV	-0x70(%RBP),%R15

0x48fedf MOV	-0x98(%RBP),%R12

0x48fee6 JMP	48ff9c

0x48feeb XOR	%ESI,%ESI

0x48feed MOV	-0x70(%RBP),%R15

0x48fef1 MOV	-0x98(%RBP),%R12

0x48fef8 LEA	-0x1(%R11),%RBX

0x48fefc VPBROADCASTQ	0x7ce8b(%RIP),%YMM2

0x48ff05 NOPW	%CS:(%RAX,%RAX,1)

(2518) 0x48ff10 VMOVDQU	(%R9,%RSI,8),%YMM6

(2518) 0x48ff16 VPCMPEQQ	0x8(%R9,%RSI,8),%YMM6,%K1

(2518) 0x48ff21 VMOVDQU64	0x8(%R8,%RSI,8),%YMM7{%K1}{z}

(2518) 0x48ff2c VMOVDQA64	%YMM7,%YMM5{%K1}

(2518) 0x48ff32 VMOVDQU64	(%R8,%RSI,8),%YMM7{%K1}{z}

(2518) 0x48ff39 VMOVDQA64	%YMM7,%YMM4{%K1}

(2518) 0x48ff3f VPCMPEQQ	%YMM4,%YMM5,%K1{%K1}

(2518) 0x48ff45 VMOVDQU64	(%R10,%RSI,8),%YMM7{%K1}{z}

(2518) 0x48ff4c VMOVDQA64	%YMM7,%YMM3{%K1}

(2518) 0x48ff52 VPSCATTERQQ	%YMM2,(%R13,%YMM3,8){%K1}

(2518) 0x48ff5a VPADDQ	%YMM6,%YMM0,%YMM6

(2518) 0x48ff5e VMOVDQU	%YMM6,(%R9,%RSI,8)

(2518) 0x48ff64 VPADDQ	(%R8,%RSI,8),%YMM1,%YMM6

(2518) 0x48ff6a VMOVDQU	%YMM6,(%R8,%RSI,8)

(2518) 0x48ff70 ADD	$0x4,%RSI

(2518) 0x48ff74 CMP	%RBX,%RSI

(2518) 0x48ff77 JBE	48ff10

0x48ff79 MOV	%R11,%RSI

0x48ff7c CMP	%R11,%RDI

0x48ff7f JNE	48ff9c

0x48ff81 MOV	%RAX,%RDX

0x48ff84 MOV	-0x88(%RBP),%RBX

0x48ff8b MOV	-0x80(%RBP),%RCX

0x48ff8f MOV	0x38(%RBP),%R11

0x48ff93 MOV	0x28(%RBP),%R10

0x48ff97 JMP	490019

0x48ff9c MOV	-0x88(%RBP),%RBX

0x48ffa3 ADD	%RBX,%RSI

0x48ffa6 MOV	0x28(%RBP),%R10

0x48ffaa MOV	(%R10,%RSI,8),%RDI

0x48ffae MOV	0x38(%RBP),%R11

0x48ffb2 JMP	48ffde

0x48ffb4 NOPW	%CS:(%RAX,%RAX,1)

(2517) 0x48ffc0 MOV	(%R11,%RSI,8),%R9

(2517) 0x48ffc4 ADD	%RCX,%R8

(2517) 0x48ffc7 MOV	0x28(%RBP),%R10

(2517) 0x48ffcb MOV	%R8,(%R10,%RSI,8)

(2517) 0x48ffcf ADD	%RDX,%R9

(2517) 0x48ffd2 MOV	%R9,(%R11,%RSI,8)

(2517) 0x48ffd6 INC	%RSI

(2517) 0x48ffd9 CMP	%RSI,%RAX

(2517) 0x48ffdc JE	490012

(2517) 0x48ffde MOV	%RDI,%R8

(2517) 0x48ffe1 MOV	0x8(%R10,%RSI,8),%RDI

(2517) 0x48ffe6 CMP	%R8,%RDI

(2517) 0x48ffe9 JNE	48ffc0

(2517) 0x48ffeb MOV	(%R11,%RSI,8),%R9

(2517) 0x48ffef MOV	0x8(%R11,%RSI,8),%R10

(2517) 0x48fff4 CMP	%R9,%R10

(2517) 0x48fff7 JNE	48ffc4

(2517) 0x48fff9 MOV	0xa0(%RBP),%R9

(2517) 0x490000 MOV	(%R9,%RSI,8),%R9

(2517) 0x490004 MOVQ	$0x2,(%R13,%R9,8)

(2517) 0x49000d MOV	%R10,%R9

(2517) 0x490010 JMP	48ffc4

0x490012 MOV	%RAX,%RDX

0x490015 MOV	-0x80(%RBP),%RCX

0x490019 CMP	%RCX,%RBX

0x49001c MOV	-0x68(%RBP),%R9

0x490020 JGE	4909ab

0x490026 MOV	-0x30(%RBP),%RAX

0x49002a LEA	(%R10,%RDX,8),%RDI

0x49002e ADD	%RAX,(%RDI)

0x490031 MOV	-0x38(%RBP),%RCX

0x490035 MOV	(%R11,%RDX,8),%RSI

0x490039 ADD	%RCX,%RSI

0x49003c MOV	%RSI,(%R11,%RDX,8)

0x490040 MOV	-0xb8(%RBP),%R10

0x490047 SAL	$0x4,%R10

0x49004b MOV	0x90(%RBP),%R11

0x490052 MOV	0x10(%R10,%R11,1),%R8

0x490057 MOV	(%RDI),%RDI

0x49005a CMP	%RDI,%R8

0x49005d JNE	49007a

0x49005f CMP	%RSI,0x18(%R10,%R11,1)

0x490064 JNE	49007a

0x490066 MOV	0xa0(%RBP),%RSI

0x49006d MOV	(%RSI,%RDX,8),%RDX

0x490071 MOVQ	$0x2,(%R13,%RDX,8)

0x49007a CMP	$0x1,%R9

0x49007e JNE	49030d

0x490084 JMP	49009d

0x490086 NOPW	%CS:(%RAX,%RAX,1)

(2509) 0x490090 INC	%RBX

(2509) 0x490093 CMP	-0x80(%RBP),%RBX

(2509) 0x490097 JE	4909ab

(2509) 0x49009d MOV	0xa0(%RBP),%RAX

(2509) 0x4900a4 MOV	(%RAX,%RBX,8),%RAX

(2509) 0x4900a8 MOV	-0x30(%RBP),%RCX

(2509) 0x4900ac MOV	-0x38(%RBP),%RDX

(2509) 0x4900b0 MOV	-0x58(%RBP),%RDI

(2509) 0x4900b4 MOV	(%RDI,%RAX,8),%RSI

(2509) 0x4900b8 CMP	0x8(%RDI,%RAX,8),%RSI

(2509) 0x4900bd MOV	0x40(%RBP),%R12

(2509) 0x4900c1 JL	4901f2

(2509) 0x4900c7 MOV	0x10(%RBP),%RDI

(2509) 0x4900cb MOV	(%RDI,%RAX,8),%RSI

(2509) 0x4900cf JMP	4900e7

0x4900d1 NOPW	%CS:(%RAX,%RAX,1)

  (2510) 0x4900e0 INC	%RSI

  (2510) 0x4900e3 MOV	0x10(%RBP),%RDI

  (2510) 0x4900e7 CMP	0x8(%RDI,%RAX,8),%RSI

  (2510) 0x4900ec JGE	490090

  (2510) 0x4900ee MOV	0x18(%RBP),%RDI

  (2510) 0x4900f2 MOV	(%RDI,%RSI,8),%RDI

  (2510) 0x4900f6 MOV	0x70(%RBP),%R8

  (2510) 0x4900fa CMPQ	$0,(%R8,%RDI,8)

  (2510) 0x4900ff JLE	490126

  (2510) 0x490101 MOV	0x80(%RBP),%R8

  (2510) 0x490108 MOV	(%R8,%RDI,8),%R8

  (2510) 0x49010c CMP	%RDX,(%R14,%R8,8)

  (2510) 0x490110 JGE	490126

  (2510) 0x490112 MOV	-0x38(%RBP),%R9

  (2510) 0x490116 MOV	%R9,(%R14,%R8,8)

  (2510) 0x49011a MOV	(%R12),%R10

  (2510) 0x49011e MOV	%R8,(%R10,%R9,8)

  (2510) 0x490122 INCQ	-0x38(%RBP)

  (2510) 0x490126 MOV	0x50(%RBP),%R9

  (2510) 0x49012a MOV	(%R9,%RDI,8),%R8

  (2510) 0x49012e MOV	0x8(%R9,%RDI,8),%R9

  (2510) 0x490133 JMP	490143

0x490135 NOPW	%CS:(%RAX,%RAX,1)

    (2512) 0x490140 INC	%R8

    (2512) 0x490143 CMP	%R9,%R8

    (2512) 0x490146 JGE	490190

    (2512) 0x490148 MOV	0x58(%RBP),%R10

    (2512) 0x49014c MOV	(%R10,%R8,8),%R10

    (2512) 0x490150 CMP	%RBX,%R10

    (2512) 0x490153 JE	490140

    (2512) 0x490155 MOV	-0x48(%RBP),%R11

    (2512) 0x490159 CMP	%RCX,(%R11,%R10,8)

    (2512) 0x49015d JGE	490140

    (2512) 0x49015f MOV	-0x30(%RBP),%R9

    (2512) 0x490163 MOV	-0x48(%RBP),%R11

    (2512) 0x490167 MOV	%R9,(%R11,%R10,8)

    (2512) 0x49016b MOV	0x30(%RBP),%R11

    (2512) 0x49016f MOV	(%R11),%R11

    (2512) 0x490172 MOV	%R10,(%R11,%R9,8)

    (2512) 0x490176 INCQ	-0x30(%RBP)

    (2512) 0x49017a MOV	0x50(%RBP),%R9

    (2512) 0x49017e MOV	0x8(%R9,%RDI,8),%R9

    (2512) 0x490183 JMP	490140

0x490185 NOPW	%CS:(%RAX,%RAX,1)

  (2510) 0x490190 MOV	0x60(%RBP),%R9

  (2510) 0x490194 MOV	(%R9,%RDI,8),%R8

  (2510) 0x490198 MOV	0x8(%R9,%RDI,8),%R9

  (2510) 0x49019d JMP	4901a3

0x49019f NOP

    (2511) 0x4901a0 INC	%R8

    (2511) 0x4901a3 CMP	%R9,%R8

    (2511) 0x4901a6 JGE	4900e0

    (2511) 0x4901ac MOV	0x68(%RBP),%R10

    (2511) 0x4901b0 MOV	(%R10,%R8,8),%R10

    (2511) 0x4901b4 CMP	%RDX,(%R14,%R10,8)

    (2511) 0x4901b8 JGE	4901a0

    (2511) 0x4901ba MOV	-0x38(%RBP),%R9

    (2511) 0x4901be MOV	%R9,(%R14,%R10,8)

    (2511) 0x4901c2 MOV	(%R12),%R11

    (2511) 0x4901c6 MOV	%R10,(%R11,%R9,8)

    (2511) 0x4901ca INCQ	-0x38(%RBP)

    (2511) 0x4901ce MOV	0x60(%RBP),%R9

    (2511) 0x4901d2 MOV	0x8(%R9,%RDI,8),%R9

    (2511) 0x4901d7 JMP	4901a0

0x4901d9 NOPL	(%RAX)

  (2513) 0x4901e0 INC	%RSI

  (2513) 0x4901e3 MOV	-0x58(%RBP),%RDI

  (2513) 0x4901e7 CMP	0x8(%RDI,%RAX,8),%RSI

  (2513) 0x4901ec JGE	4900c7

  (2513) 0x4901f2 MOV	(%R15,%RSI,8),%RDI

  (2513) 0x4901f6 CMPQ	$0,(%R13,%RDI,8)

  (2513) 0x4901fc JLE	49022b

  (2513) 0x4901fe MOV	0x78(%RBP),%R8

  (2513) 0x490202 MOV	(%R8,%RDI,8),%R8

  (2513) 0x490206 MOV	-0x48(%RBP),%R9

  (2513) 0x49020a CMP	%RCX,(%R9,%R8,8)

  (2513) 0x49020e JGE	49022b

  (2513) 0x490210 MOV	-0x30(%RBP),%R9

  (2513) 0x490214 MOV	-0x48(%RBP),%R10

  (2513) 0x490218 MOV	%R9,(%R10,%R8,8)

  (2513) 0x49021c MOV	0x30(%RBP),%R10

  (2513) 0x490220 MOV	(%R10),%R10

  (2513) 0x490223 MOV	%R8,(%R10,%R9,8)

  (2513) 0x490227 INCQ	-0x30(%RBP)

  (2513) 0x49022b MOV	-0x58(%RBP),%R9

  (2513) 0x49022f MOV	(%R9,%RDI,8),%R8

  (2513) 0x490233 MOV	0x8(%R9,%RDI,8),%R9

  (2513) 0x490238 JMP	490243

0x49023a NOPW	(%RAX,%RAX,1)

    (2515) 0x490240 INC	%R8

    (2515) 0x490243 CMP	%R9,%R8

    (2515) 0x490246 JGE	4902a0

    (2515) 0x490248 MOV	(%R15,%R8,8),%R10

    (2515) 0x49024c CMPQ	$0,(%R13,%R10,8)

    (2515) 0x490252 JLE	490240

    (2515) 0x490254 MOV	0x78(%RBP),%R11

    (2515) 0x490258 MOV	(%R11,%R10,8),%R10

    (2515) 0x49025c CMP	%RBX,%R10

    (2515) 0x49025f JE	490240

    (2515) 0x490261 MOV	-0x48(%RBP),%R11

    (2515) 0x490265 CMP	%RCX,(%R11,%R10,8)

    (2515) 0x490269 JGE	490240

    (2515) 0x49026b MOV	-0x30(%RBP),%R9

    (2515) 0x49026f MOV	-0x48(%RBP),%R11

    (2515) 0x490273 MOV	%R9,(%R11,%R10,8)

    (2515) 0x490277 MOV	0x30(%RBP),%R11

    (2515) 0x49027b MOV	(%R11),%R11

    (2515) 0x49027e MOV	%R10,(%R11,%R9,8)

    (2515) 0x490282 INCQ	-0x30(%RBP)

    (2515) 0x490286 MOV	-0x58(%RBP),%R9

    (2515) 0x49028a MOV	0x8(%R9,%RDI,8),%R9

    (2515) 0x49028f JMP	490240

0x490291 NOPW	%CS:(%RAX,%RAX,1)

  (2513) 0x4902a0 MOV	0x10(%RBP),%R9

  (2513) 0x4902a4 MOV	(%R9,%RDI,8),%R8

  (2513) 0x4902a8 MOV	0x8(%R9,%RDI,8),%R9

  (2513) 0x4902ad JMP	4902b3

0x4902af NOP

    (2514) 0x4902b0 INC	%R8

    (2514) 0x4902b3 CMP	%R9,%R8

    (2514) 0x4902b6 JGE	4901e0

    (2514) 0x4902bc MOV	0x18(%RBP),%R10

    (2514) 0x4902c0 MOV	(%R10,%R8,8),%R10

    (2514) 0x4902c4 MOV	0x70(%RBP),%R11

    (2514) 0x4902c8 CMPQ	$0,(%R11,%R10,8)

    (2514) 0x4902cd JLE	4902b0

    (2514) 0x4902cf MOV	0x80(%RBP),%R11

    (2514) 0x4902d6 MOV	(%R11,%R10,8),%R10

    (2514) 0x4902da CMP	%RDX,(%R14,%R10,8)

    (2514) 0x4902de JGE	4902b0

    (2514) 0x4902e0 MOV	-0x38(%RBP),%R9

    (2514) 0x4902e4 MOV	%R9,(%R14,%R10,8)

    (2514) 0x4902e8 MOV	(%R12),%R11

    (2514) 0x4902ec MOV	%R10,(%R11,%R9,8)

    (2514) 0x4902f0 INCQ	-0x38(%RBP)

    (2514) 0x4902f4 MOV	0x10(%RBP),%R9

    (2514) 0x4902f8 MOV	0x8(%R9,%RDI,8),%R9

    (2514) 0x4902fd JMP	4902b0

0x4902ff NOP

(2498) 0x490300 INC	%RBX

(2498) 0x490303 CMP	-0x80(%RBP),%RBX

(2498) 0x490307 JE	4909ab

(2498) 0x49030d MOV	%RAX,%RSI

(2498) 0x490310 MOV	%RCX,%RDX

(2498) 0x490313 MOV	0xa0(%RBP),%RDI

(2498) 0x49031a MOV	(%RDI,%RBX,8),%RDI

(2498) 0x49031e MOV	-0x58(%RBP),%R9

(2498) 0x490322 MOV	(%R9,%RDI,8),%R8

(2498) 0x490326 MOV	%RDI,-0x50(%RBP)

(2498) 0x49032a CMP	0x8(%R9,%RDI,8),%R8

(2498) 0x49032f MOV	%RBX,%RDI

(2498) 0x490332 JGE	4904a0

(2498) 0x490338 MOV	%RDX,%RCX

(2498) 0x49033b MOV	%RSI,%RAX

(2498) 0x49033e JMP	490356

  (2506) 0x490340 INC	%R8

  (2506) 0x490343 MOV	-0x58(%RBP),%R9

  (2506) 0x490347 MOV	-0x50(%RBP),%R10

  (2506) 0x49034b CMP	0x8(%R9,%R10,8),%R8

  (2506) 0x490350 JGE	4904a0

  (2506) 0x490356 MOV	(%R15,%R8,8),%R9

  (2506) 0x49035a CMPQ	$0,(%R13,%R9,8)

  (2506) 0x490360 JLE	4903a9

  (2506) 0x490362 MOV	0x78(%RBP),%R10

  (2506) 0x490366 MOV	(%R10,%R9,8),%R10

  (2506) 0x49036a MOV	-0x48(%RBP),%RBX

  (2506) 0x49036e MOV	(%RBX,%R10,8),%R11

  (2506) 0x490372 SUB	%RSI,%R11

  (2506) 0x490375 JGE	4903a0

  (2506) 0x490377 MOV	%RAX,(%RBX,%R10,8)

  (2506) 0x49037b MOV	%RAX,%R11

  (2506) 0x49037e SUB	%RSI,%R11

  (2506) 0x490381 MOV	-0x78(%RBP),%RBX

  (2506) 0x490385 MOV	%R10,(%RBX,%R11,8)

  (2506) 0x490389 MOV	-0x60(%RBP),%R10

  (2506) 0x49038d MOVQ	$0x2,(%R10,%R11,8)

  (2506) 0x490395 INC	%RAX

  (2506) 0x490398 JMP	4903a9

0x49039a NOPW	(%RAX,%RAX,1)

  (2506) 0x4903a0 MOV	-0x60(%RBP),%R10

  (2506) 0x4903a4 ADDQ	$0x2,(%R10,%R11,8)

  (2506) 0x4903a9 MOV	-0x58(%RBP),%R11

  (2506) 0x4903ad MOV	(%R11,%R9,8),%R10

  (2506) 0x4903b1 JMP	4903c9

    (2508) 0x4903b3 MOV	-0x60(%RBP),%R11

    (2508) 0x4903b7 INCQ	(%R11,%RBX,8)

    (2508) 0x4903bb MOV	%R15,%R12

    (2508) 0x4903be MOV	-0x70(%RBP),%R15

    (2508) 0x4903c2 INC	%R10

    (2508) 0x4903c5 MOV	-0x58(%RBP),%R11

    (2508) 0x4903c9 CMP	0x8(%R11,%R9,8),%R10

    (2508) 0x4903ce JGE	490430

    (2508) 0x4903d0 MOV	(%R15,%R10,8),%R11

    (2508) 0x4903d4 CMPQ	$0,(%R13,%R11,8)

    (2508) 0x4903da JLE	4903c2

    (2508) 0x4903dc MOV	0x78(%RBP),%RBX

    (2508) 0x4903e0 MOV	(%RBX,%R11,8),%R11

    (2508) 0x4903e4 MOV	%RDI,%RBX

    (2508) 0x4903e7 CMP	%RDI,%R11

    (2508) 0x4903ea JE	4903c2

    (2508) 0x4903ec MOV	%R12,%R15

    (2508) 0x4903ef MOV	-0x48(%RBP),%R12

    (2508) 0x4903f3 MOV	(%R12,%R11,8),%RBX

    (2508) 0x4903f7 SUB	%RSI,%RBX

    (2508) 0x4903fa JGE	4903b3

    (2508) 0x4903fc MOV	%RAX,(%R12,%R11,8)

    (2508) 0x490400 MOV	%RAX,%RBX

    (2508) 0x490403 SUB	%RSI,%RBX

    (2508) 0x490406 MOV	-0x78(%RBP),%R12

    (2508) 0x49040a MOV	%R11,(%R12,%RBX,8)

    (2508) 0x49040e MOV	-0x98(%RBP),%R12

    (2508) 0x490415 MOV	-0x60(%RBP),%R11

    (2508) 0x490419 MOVQ	$0x1,(%R11,%RBX,8)

    (2508) 0x490421 INC	%RAX

    (2508) 0x490424 JMP	4903be

0x490426 NOPW	%CS:(%RAX,%RAX,1)

  (2506) 0x490430 MOV	0x10(%RBP),%R11

  (2506) 0x490434 MOV	(%R11,%R9,8),%R10

  (2506) 0x490438 JMP	49044f

0x49043a NOPW	(%RAX,%RAX,1)

    (2507) 0x490440 MOV	-0x40(%RBP),%R11

    (2507) 0x490444 INCQ	(%R11,%RBX,8)

    (2507) 0x490448 INC	%R10

    (2507) 0x49044b MOV	0x10(%RBP),%R11

    (2507) 0x49044f CMP	0x8(%R11,%R9,8),%R10

    (2507) 0x490454 JGE	490340

    (2507) 0x49045a MOV	0x18(%RBP),%R11

    (2507) 0x49045e MOV	(%R11,%R10,8),%R11

    (2507) 0x490462 MOV	0x70(%RBP),%RBX

    (2507) 0x490466 CMPQ	$0,(%RBX,%R11,8)

    (2507) 0x49046b JLE	490448

    (2507) 0x49046d MOV	0x80(%RBP),%RBX

    (2507) 0x490474 MOV	(%RBX,%R11,8),%R11

    (2507) 0x490478 MOV	(%R14,%R11,8),%RBX

    (2507) 0x49047c SUB	%RDX,%RBX

    (2507) 0x49047f JGE	490440

    (2507) 0x490481 MOV	%RCX,(%R14,%R11,8)

    (2507) 0x490485 MOV	%RCX,%RBX

    (2507) 0x490488 SUB	%RDX,%RBX

    (2507) 0x49048b MOV	%R11,(%R12,%RBX,8)

    (2507) 0x49048f MOV	-0x40(%RBP),%R11

    (2507) 0x490493 MOVQ	$0x1,(%R11,%RBX,8)

    (2507) 0x49049b INC	%RCX

    (2507) 0x49049e JMP	490448

(2498) 0x4904a0 MOV	0x10(%RBP),%R9

(2498) 0x4904a4 MOV	-0x50(%RBP),%R10

(2498) 0x4904a8 MOV	(%R9,%R10,8),%R8

(2498) 0x4904ac CMP	0x8(%R9,%R10,8),%R8

(2498) 0x4904b1 JL	490536

(2498) 0x4904b7 MOV	-0x60(%RBP),%R11

(2498) 0x4904bb MOV	%RAX,%R8

(2498) 0x4904be SUB	%RSI,%R8

(2498) 0x4904c1 MOV	%R8,-0x50(%RBP)

(2498) 0x4904c5 MOV	%RDI,%RBX

(2498) 0x4904c8 MOV	-0x68(%RBP),%R10

(2498) 0x4904cc JLE	4904f0

(2498) 0x4904ce MOV	-0x50(%RBP),%RSI

(2498) 0x4904d2 CMP	$0x4,%RSI

(2498) 0x4904d6 JAE	490710

(2498) 0x4904dc MOV	-0x50(%RBP),%RDI

(2498) 0x4904e0 MOV	%RDI,%RSI

(2498) 0x4904e3 AND	$-0x4,%RSI

(2498) 0x4904e7 CMP	%RDI,%RSI

(2498) 0x4904ea JB	490688

(2498) 0x4904f0 MOV	%RCX,%RSI

(2498) 0x4904f3 SUB	%RDX,%RSI

(2498) 0x4904f6 MOV	-0x40(%RBP),%R8

(2498) 0x4904fa JLE	490300

(2498) 0x490500 CMP	$0x4,%RSI

(2498) 0x490504 JAE	490870

(2498) 0x49050a MOV	%RSI,%RDX

(2498) 0x49050d AND	$-0x4,%RDX

(2498) 0x490511 CMP	%RSI,%RDX

(2498) 0x490514 JB	4906d7

(2498) 0x49051a JMP	490300

0x49051f NOP

  (2503) 0x490520 INC	%R8

  (2503) 0x490523 MOV	0x10(%RBP),%R9

  (2503) 0x490527 MOV	-0x50(%RBP),%R10

  (2503) 0x49052b CMP	0x8(%R9,%R10,8),%R8

  (2503) 0x490530 MOV	-0x60(%RBP),%R11

  (2503) 0x490534 JGE	4904bb

  (2503) 0x490536 MOV	0x18(%RBP),%R9

  (2503) 0x49053a MOV	(%R9,%R8,8),%R9

  (2503) 0x49053e MOV	0x70(%RBP),%R10

  (2503) 0x490542 CMPQ	$0,(%R10,%R9,8)

  (2503) 0x490547 JLE	490589

  (2503) 0x490549 MOV	0x80(%RBP),%R10

  (2503) 0x490550 MOV	(%R10,%R9,8),%R10

  (2503) 0x490554 MOV	(%R14,%R10,8),%R11

  (2503) 0x490558 SUB	%RDX,%R11

  (2503) 0x49055b JGE	490580

  (2503) 0x49055d MOV	%RCX,(%R14,%R10,8)

  (2503) 0x490561 MOV	%RCX,%R11

  (2503) 0x490564 SUB	%RDX,%R11

  (2503) 0x490567 MOV	%R10,(%R12,%R11,8)

  (2503) 0x49056b MOV	-0x40(%RBP),%R10

  (2503) 0x49056f MOVQ	$0x2,(%R10,%R11,8)

  (2503) 0x490577 INC	%RCX

  (2503) 0x49057a JMP	490589

0x49057c NOPL	(%RAX)

  (2503) 0x490580 MOV	-0x40(%RBP),%R10

  (2503) 0x490584 ADDQ	$0x2,(%R10,%R11,8)

  (2503) 0x490589 MOV	%RDI,%RBX

  (2503) 0x49058c MOV	0x50(%RBP),%R11

  (2503) 0x490590 MOV	(%R11,%R9,8),%R10

  (2503) 0x490594 JMP	4905b9

0x490596 NOPW	%CS:(%RAX,%RAX,1)

    (2505) 0x4905a0 MOV	-0x60(%RBP),%R11

    (2505) 0x4905a4 INCQ	(%R11,%RBX,8)

    (2505) 0x4905a8 MOV	%RDI,%RBX

    (2505) 0x4905ab MOV	%R15,%R12

    (2505) 0x4905ae MOV	-0x70(%RBP),%R15

    (2505) 0x4905b2 INC	%R10

    (2505) 0x4905b5 MOV	0x50(%RBP),%R11

    (2505) 0x4905b9 CMP	0x8(%R11,%R9,8),%R10

    (2505) 0x4905be JGE	490610

    (2505) 0x4905c0 MOV	0x58(%RBP),%R11

    (2505) 0x4905c4 MOV	(%R11,%R10,8),%R11

    (2505) 0x4905c8 CMP	%RBX,%R11

    (2505) 0x4905cb JE	4905b2

    (2505) 0x4905cd MOV	%R12,%R15

    (2505) 0x4905d0 MOV	-0x48(%RBP),%R12

    (2505) 0x4905d4 MOV	(%R12,%R11,8),%RBX

    (2505) 0x4905d8 SUB	%RSI,%RBX

    (2505) 0x4905db JGE	4905a0

    (2505) 0x4905dd MOV	%RAX,(%R12,%R11,8)

    (2505) 0x4905e1 MOV	%RAX,%RBX

    (2505) 0x4905e4 SUB	%RSI,%RBX

    (2505) 0x4905e7 MOV	-0x78(%RBP),%R12

    (2505) 0x4905eb MOV	%R11,(%R12,%RBX,8)

    (2505) 0x4905ef MOV	-0x98(%RBP),%R12

    (2505) 0x4905f6 MOV	-0x60(%RBP),%R11

    (2505) 0x4905fa MOVQ	$0x1,(%R11,%RBX,8)

    (2505) 0x490602 INC	%RAX

    (2505) 0x490605 MOV	%RDI,%RBX

    (2505) 0x490608 JMP	4905ae

0x49060a NOPW	(%RAX,%RAX,1)

  (2503) 0x490610 MOV	0x60(%RBP),%R11

  (2503) 0x490614 MOV	(%R11,%R9,8),%R10

  (2503) 0x490618 JMP	49062f

0x49061a NOPW	(%RAX,%RAX,1)

    (2504) 0x490620 MOV	-0x40(%RBP),%R11

    (2504) 0x490624 INCQ	(%R11,%RBX,8)

    (2504) 0x490628 INC	%R10

    (2504) 0x49062b MOV	0x60(%RBP),%R11

    (2504) 0x49062f CMP	0x8(%R11,%R9,8),%R10

    (2504) 0x490634 JGE	490520

    (2504) 0x49063a MOV	0x68(%RBP),%R11

    (2504) 0x49063e MOV	(%R11,%R10,8),%R11

    (2504) 0x490642 MOV	(%R14,%R11,8),%RBX

    (2504) 0x490646 SUB	%RDX,%RBX

    (2504) 0x490649 JGE	490620

    (2504) 0x49064b MOV	%RCX,(%R14,%R11,8)

    (2504) 0x49064f MOV	%RCX,%RBX

    (2504) 0x490652 SUB	%RDX,%RBX

    (2504) 0x490655 MOV	%R11,(%R12,%RBX,8)

    (2504) 0x490659 MOV	-0x40(%RBP),%R11

    (2504) 0x49065d MOVQ	$0x1,(%R11,%RBX,8)

    (2504) 0x490665 INC	%RCX

    (2504) 0x490668 JMP	490628

0x49066a NOPW	(%RAX,%RAX,1)

  (2501) 0x490670 LEA	(%R11,%RSI,8),%R8

  (2501) 0x490674 MOVQ	$0,(%R8)

  (2501) 0x49067b INC	%RSI

  (2501) 0x49067e CMP	%RSI,-0x50(%RBP)

  (2501) 0x490682 JE	4904f0

  (2501) 0x490688 LEA	(%R11,%RSI,8),%R8

  (2501) 0x49068c MOV	(%R8),%R8

  (2501) 0x49068f CMP	%R10,%R8

  (2501) 0x490692 JL	490670

  (2501) 0x490694 MOV	-0x78(%RBP),%RDI

  (2501) 0x490698 MOV	(%RDI,%RSI,8),%R8

  (2501) 0x49069c MOV	0x30(%RBP),%RDI

  (2501) 0x4906a0 MOV	(%RDI),%R9

  (2501) 0x4906a3 MOV	-0x30(%RBP),%R10

  (2501) 0x4906a7 LEA	0x1(%R10),%R11

  (2501) 0x4906ab MOV	%R11,-0x30(%RBP)

  (2501) 0x4906af MOV	-0x60(%RBP),%R11

  (2501) 0x4906b3 MOV	%R8,(%R9,%R10,8)

  (2501) 0x4906b7 MOV	-0x68(%RBP),%R10

  (2501) 0x4906bb JMP	490670

0x4906bd NOPL	(%RAX)

  (2499) 0x4906c0 LEA	(%R8,%RDX,8),%RDI

  (2499) 0x4906c4 MOVQ	$0,(%RDI)

  (2499) 0x4906cb INC	%RDX

  (2499) 0x4906ce CMP	%RDX,%RSI

  (2499) 0x4906d1 JE	490300

  (2499) 0x4906d7 LEA	(%R8,%RDX,8),%RDI

  (2499) 0x4906db MOV	(%RDI),%RDI

  (2499) 0x4906de CMP	%R10,%RDI

  (2499) 0x4906e1 JL	4906c0

  (2499) 0x4906e3 MOV	(%R12,%RDX,8),%RDI

  (2499) 0x4906e7 MOV	0x40(%RBP),%R8

  (2499) 0x4906eb MOV	(%R8),%R8

  (2499) 0x4906ee MOV	-0x38(%RBP),%R9

  (2499) 0x4906f2 LEA	0x1(%R9),%R10

  (2499) 0x4906f6 MOV	%R10,-0x38(%RBP)

  (2499) 0x4906fa MOV	-0x68(%RBP),%R10

  (2499) 0x4906fe MOV	%RDI,(%R8,%R9,8)

  (2499) 0x490702 MOV	-0x40(%RBP),%R8

  (2499) 0x490706 JMP	4906c0

0x490708 NOPL	(%RAX,%RAX,1)

(2498) 0x490710 MOV	-0x50(%RBP),%RSI

(2498) 0x490714 SHR	$0x2,%RSI

(2498) 0x490718 MOV	$0x18,%R8D

(2498) 0x49071e JMP	490735

  (2502) 0x490720 MOVQ	$0,(%R11,%R8,1)

  (2502) 0x490728 ADD	$0x20,%R8

  (2502) 0x49072c DEC	%RSI

  (2502) 0x49072f JE	4904dc

  (2502) 0x490735 CMP	%R10,-0x18(%R11,%R8,1)

  (2502) 0x49073a JGE	490780

  (2502) 0x49073c MOVQ	$0,-0x18(%R11,%R8,1)

  (2502) 0x490745 CMP	%R10,-0x10(%R11,%R8,1)

  (2502) 0x49074a JGE	4907bb

  (2502) 0x49074c MOVQ	$0,-0x10(%R11,%R8,1)

  (2502) 0x490755 CMP	%R10,-0x8(%R11,%R8,1)

  (2502) 0x49075a JGE	4907fa

  (2502) 0x490760 MOVQ	$0,-0x8(%R11,%R8,1)

  (2502) 0x490769 CMP	%R10,(%R11,%R8,1)

  (2502) 0x49076d JL	490720

  (2502) 0x49076f JMP	490838

0x490774 NOPW	%CS:(%RAX,%RAX,1)

  (2502) 0x490780 MOV	-0x78(%RBP),%R9

  (2502) 0x490784 MOV	-0x18(%R9,%R8,1),%R9

  (2502) 0x490789 MOV	0x30(%RBP),%R10

  (2502) 0x49078d MOV	(%R10),%R10

  (2502) 0x490790 MOV	-0x30(%RBP),%R11

  (2502) 0x490794 LEA	0x1(%R11),%RBX

  (2502) 0x490798 MOV	%RBX,-0x30(%RBP)

  (2502) 0x49079c MOV	%RDI,%RBX

  (2502) 0x49079f MOV	%R9,(%R10,%R11,8)

  (2502) 0x4907a3 MOV	-0x60(%RBP),%R11

  (2502) 0x4907a7 MOV	-0x68(%RBP),%R10

  (2502) 0x4907ab MOVQ	$0,-0x18(%R11,%R8,1)

  (2502) 0x4907b4 CMP	%R10,-0x10(%R11,%R8,1)

  (2502) 0x4907b9 JL	49074c

  (2502) 0x4907bb MOV	-0x78(%RBP),%R9

  (2502) 0x4907bf MOV	-0x10(%R9,%R8,1),%R9

  (2502) 0x4907c4 MOV	0x30(%RBP),%R10

  (2502) 0x4907c8 MOV	(%R10),%R10

  (2502) 0x4907cb MOV	-0x30(%RBP),%R11

  (2502) 0x4907cf LEA	0x1(%R11),%RBX

  (2502) 0x4907d3 MOV	%RBX,-0x30(%RBP)

  (2502) 0x4907d7 MOV	%RDI,%RBX

  (2502) 0x4907da MOV	%R9,(%R10,%R11,8)

  (2502) 0x4907de MOV	-0x60(%RBP),%R11

  (2502) 0x4907e2 MOV	-0x68(%RBP),%R10

  (2502) 0x4907e6 MOVQ	$0,-0x10(%R11,%R8,1)

  (2502) 0x4907ef CMP	%R10,-0x8(%R11,%R8,1)

  (2502) 0x4907f4 JL	490760

  (2502) 0x4907fa MOV	-0x78(%RBP),%R9

  (2502) 0x4907fe MOV	-0x8(%R9,%R8,1),%R9

  (2502) 0x490803 MOV	0x30(%RBP),%R10

  (2502) 0x490807 MOV	(%R10),%R10

  (2502) 0x49080a MOV	-0x30(%RBP),%R11

  (2502) 0x49080e LEA	0x1(%R11),%RBX

  (2502) 0x490812 MOV	%RBX,-0x30(%RBP)

  (2502) 0x490816 MOV	%RDI,%RBX

  (2502) 0x490819 MOV	%R9,(%R10,%R11,8)

  (2502) 0x49081d MOV	-0x60(%RBP),%R11

  (2502) 0x490821 MOV	-0x68(%RBP),%R10

  (2502) 0x490825 MOVQ	$0,-0x8(%R11,%R8,1)

  (2502) 0x49082e CMP	%R10,(%R11,%R8,1)

  (2502) 0x490832 JL	490720

  (2502) 0x490838 MOV	-0x78(%RBP),%R9

  (2502) 0x49083c MOV	(%R9,%R8,1),%R9

  (2502) 0x490840 MOV	0x30(%RBP),%R10

  (2502) 0x490844 MOV	(%R10),%R10

  (2502) 0x490847 MOV	-0x30(%RBP),%R11

  (2502) 0x49084b LEA	0x1(%R11),%RBX

  (2502) 0x49084f MOV	%RBX,-0x30(%RBP)

  (2502) 0x490853 MOV	%RDI,%RBX

  (2502) 0x490856 MOV	%R9,(%R10,%R11,8)

  (2502) 0x49085a MOV	-0x60(%RBP),%R11

  (2502) 0x49085e MOV	-0x68(%RBP),%R10

  (2502) 0x490862 JMP	490720

0x490867 NOPW	(%RAX,%RAX,1)

(2498) 0x490870 MOV	%RSI,%RDX

(2498) 0x490873 SHR	$0x2,%RDX

(2498) 0x490877 MOV	$0x18,%EDI

(2498) 0x49087c JMP	490895

0x49087e XCHG	%AX,%AX

  (2500) 0x490880 MOVQ	$0,(%R8,%RDI,1)

  (2500) 0x490888 ADD	$0x20,%RDI

  (2500) 0x49088c DEC	%RDX

  (2500) 0x49088f JE	49050a

  (2500) 0x490895 CMP	%R10,-0x18(%R8,%RDI,1)

  (2500) 0x49089a JGE	4908e0

  (2500) 0x49089c MOVQ	$0,-0x18(%R8,%RDI,1)

  (2500) 0x4908a5 CMP	%R10,-0x10(%R8,%RDI,1)

  (2500) 0x4908aa JGE	490914

  (2500) 0x4908ac MOVQ	$0,-0x10(%R8,%RDI,1)

  (2500) 0x4908b5 CMP	%R10,-0x8(%R8,%RDI,1)

  (2500) 0x4908ba JGE	49094c

  (2500) 0x4908c0 MOVQ	$0,-0x8(%R8,%RDI,1)

  (2500) 0x4908c9 CMP	%R10,(%R8,%RDI,1)

  (2500) 0x4908cd JL	490880

  (2500) 0x4908cf JMP	490983

0x4908d4 NOPW	%CS:(%RAX,%RAX,1)

  (2500) 0x4908e0 MOV	-0x18(%R12,%RDI,1),%R8

  (2500) 0x4908e5 MOV	0x40(%RBP),%R9

  (2500) 0x4908e9 MOV	(%R9),%R9

  (2500) 0x4908ec MOV	-0x38(%RBP),%R10

  (2500) 0x4908f0 LEA	0x1(%R10),%R11

  (2500) 0x4908f4 MOV	%R11,-0x38(%RBP)

  (2500) 0x4908f8 MOV	%R8,(%R9,%R10,8)

  (2500) 0x4908fc MOV	-0x40(%RBP),%R8

  (2500) 0x490900 MOV	-0x68(%RBP),%R10

  (2500) 0x490904 MOVQ	$0,-0x18(%R8,%RDI,1)

  (2500) 0x49090d CMP	%R10,-0x10(%R8,%RDI,1)

  (2500) 0x490912 JL	4908ac

  (2500) 0x490914 MOV	-0x10(%R12,%RDI,1),%R8

  (2500) 0x490919 MOV	0x40(%RBP),%R9

  (2500) 0x49091d MOV	(%R9),%R9

  (2500) 0x490920 MOV	-0x38(%RBP),%R10

  (2500) 0x490924 LEA	0x1(%R10),%R11

  (2500) 0x490928 MOV	%R11,-0x38(%RBP)

  (2500) 0x49092c MOV	%R8,(%R9,%R10,8)

  (2500) 0x490930 MOV	-0x40(%RBP),%R8

  (2500) 0x490934 MOV	-0x68(%RBP),%R10

  (2500) 0x490938 MOVQ	$0,-0x10(%R8,%RDI,1)

  (2500) 0x490941 CMP	%R10,-0x8(%R8,%RDI,1)

  (2500) 0x490946 JL	4908c0

  (2500) 0x49094c MOV	-0x8(%R12,%RDI,1),%R8

  (2500) 0x490951 MOV	0x40(%RBP),%R9

  (2500) 0x490955 MOV	(%R9),%R9

  (2500) 0x490958 MOV	-0x38(%RBP),%R10

  (2500) 0x49095c LEA	0x1(%R10),%R11

  (2500) 0x490960 MOV	%R11,-0x38(%RBP)

  (2500) 0x490964 MOV	%R8,(%R9,%R10,8)

  (2500) 0x490968 MOV	-0x40(%RBP),%R8

  (2500) 0x49096c MOV	-0x68(%RBP),%R10

  (2500) 0x490970 MOVQ	$0,-0x8(%R8,%RDI,1)

  (2500) 0x490979 CMP	%R10,(%R8,%RDI,1)

  (2500) 0x49097d JL	490880

  (2500) 0x490983 MOV	(%R12,%RDI,1),%R8

  (2500) 0x490987 MOV	0x40(%RBP),%R9

  (2500) 0x49098b MOV	(%R9),%R9

  (2500) 0x49098e MOV	-0x38(%RBP),%R10

  (2500) 0x490992 LEA	0x1(%R10),%R11

  (2500) 0x490996 MOV	%R11,-0x38(%RBP)

  (2500) 0x49099a MOV	%R8,(%R9,%R10,8)

  (2500) 0x49099e MOV	-0x40(%RBP),%R8

  (2500) 0x4909a2 MOV	-0x68(%RBP),%R10

  (2500) 0x4909a6 JMP	490880

0x4909ab ADD	$0xb8,%RSP

0x4909b2 POP	%RBX

0x4909b3 POP	%R12

0x4909b5 POP	%R13

0x4909b7 POP	%R14

0x4909b9 POP	%R15

0x4909bb POP	%RBP

0x4909bc VZEROUPPER

0x4909bf RET

Coverage (%)	Name	Source Location	Module
►100.00+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0

Source file and lines	par_strength.c:1668-2230
Module	exec

The function is defined in /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1668-1697,1705-1714,1720-1797,1806,1812-1971,1978-2000,2006-2083,2095,2101-2230.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 60.33 to 12.00 cycles (5.03x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is probably not vectorized. Only 12% of vector register length is used (average across all SSE/AVX instructions).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers).

Workaround

Read the "512-bits vectorization" report at "Potential" confidence level.

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

512-bits vectorization

On some x86 processors supporting 512-bits vectorization, compilers are often too conservative and limit vectorization to 256 bits. Performance can then be improved by enforcing 512-bits vectorization, especially with many vectorized and high trip count loops. 512-bits vectorization performance overhead (compared to 256-bits) is generally lower on newer processors.

Workaround

Recompile with -mprefer-vector-width=512

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

__kmpc_barrier@plt: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1955
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1962
__kmpc_end_masked@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1962
__kmpc_masked@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1962
hypre_GetSimpleThreadPartition: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1674
hypre_GetThreadNum: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1671
hypre_MAlloc: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1967
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1971
hypre_prefix_sum_pair: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1946

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

ADD: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1988
VZEROUPPER: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:2228

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 680 bytes. The binary function is storing 192 bytes.

General properties

nb instructions	350
nb uops	361
loop length	1685
used x86 registers	16
used mmx registers	0
used xmm registers	0
used ymm registers	3
used zmm registers	0
nb stack references	36

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	60.33 cycles
front end	60.33 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	18.00	15.40	31.33	31.33	19.50	15.20	18.00	19.50	19.50	19.50	15.40	31.33
cycles	18.00	15.40	31.33	31.33	19.50	15.20	18.00	19.50	19.50	19.50	15.40	31.33

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	60.33
Dispatch	31.33
Overall L1	60.33

Vectorization ratios

all	1%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	3%

Vector efficiency ratios

all	12%
load	12%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 60.33 cycles. At this rate:

5% of peak load performance is reached (11.27 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (3.18 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 60.33 to 31.33 cycles (1.93x speedup).

ASM code

In the binary file, the address of the function is: 48f050

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0xb8,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R9,-0x70(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R8,-0x58(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RCX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,-0x50(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDI,-0xb0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x88(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x48(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x20(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
CALL 4e8ff0 <hypre_GetThreadNum>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RAX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA -0xd0(%RBP),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0xd8(%RBP),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R12,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4e9000 <hypre_GetSimpleThreadPartition>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %R15,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%RBX),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RCX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
IMUL %R13,%RDX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
MOV (%R14),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP $0x1,%R15	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JLE 48f0f6 <hypre_BoomerAMGCreate2ndS.extracted.17+0xa6>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0xd0(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xc8(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xc0(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xb8(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RSI,%RDX,8),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSI,-0x78(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RAX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
IMUL %R13,%RSI	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA (%R9,%RSI,8),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%RDI,%RDX,8),%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R8,%RSI,8),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 48f10b <hypre_BoomerAMGCreate2ndS.extracted.17+0xbb>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
MOV %RAX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
IMUL %R13,%RSI	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDI,-0x78(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %R11D,%R11D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0xa8(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R8,%RDX,8),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
TEST %RAX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
MOV 0xb0(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RDX,%RSI,8),%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMOVE %RAX,%R14	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
TEST %RCX,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
CMOVE %RCX,%R8	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
MOV 0x48(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JLE 48f153 <hypre_BoomerAMGCreate2ndS.extracted.17+0x103>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV (%RDX),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x98(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %RAX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JLE 48f180 <hypre_BoomerAMGCreate2ndS.extracted.17+0x130>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R8,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R9,-0x98(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVQ $0,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOVQ $0,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV (%RCX,%R13,8),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R13,-0xb8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x8(%RCX,%R13,8),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP $0x1,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RBX,-0x88(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RAX,-0x80(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R10,-0x68(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R11,-0x60(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDI,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JNE 48f460 <hypre_BoomerAMGCreate2ndS.extracted.17+0x410>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RAX,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 48fae7 <hypre_BoomerAMGCreate2ndS.extracted.17+0xa97>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RBX,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 48f1f3 <hypre_BoomerAMGCreate2ndS.extracted.17+0x1a3>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RAX,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 48fae7 <hypre_BoomerAMGCreate2ndS.extracted.17+0xa97>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA 0x38(%R11),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,-0xc8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA 0x38(%RDI),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,-0xc0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
XOR %R12D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV %RBX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %R15D,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,-0xa8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 48f4b4 <hypre_BoomerAMGCreate2ndS.extracted.17+0x464>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x88(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R15),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x28(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RCX,%RAX,8),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x38(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RCX,%RAX,8),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x30(%RBP),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x38(%RBP),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x90(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CALL 4e9f20 <hypre_prefix_sum_pair>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
CMPQ $0,(%R15)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
MOV -0x48(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JLE 48fb40 <hypre_BoomerAMGCreate2ndS.extracted.17+0xaf0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x48(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMPQ $0,(%RCX)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
MOV -0x50(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0xb0(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JLE 48fb70 <hypre_BoomerAMGCreate2ndS.extracted.17+0xb20>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV (%R15),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV $0x535410,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CALL 410560 <__kmpc_barrier@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV (%R15),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV $0x535430,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 4106c0 <__kmpc_masked@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
CMP $0x1,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV %R15,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x70(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x98(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JNE 48fc07 <hypre_BoomerAMGCreate2ndS.extracted.17+0xbb7>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x88(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RAX),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x28(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RCX,%RAX,8),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %RDI,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 48fbd0 <hypre_BoomerAMGCreate2ndS.extracted.17+0xb80>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
SAL $0x3,%RDI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
CALL 4e7260 <hypre_MAlloc>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0x30(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,(%RCX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x88(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RAX),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x38(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RCX,%RAX,8),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %RDI,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 48fbed <hypre_BoomerAMGCreate2ndS.extracted.17+0xb9d>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
SAL $0x3,%RDI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
CALL 4e7260 <hypre_MAlloc>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0x40(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,(%RCX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0xb0(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RAX),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV $0x535450,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CALL 4104f0 <__kmpc_end_masked@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0xb0(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RAX),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV $0x535470,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CALL 410560 <__kmpc_barrier@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x80(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA -0x1(%RCX),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RBX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RBX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV 0x38(%RBP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x28(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JLE 490019 <hypre_BoomerAMGCreate2ndS.extracted.17+0xfc9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RSI,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA (%R10,%RAX,8),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R11,%RBX,8),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %R8,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
SETAE %R12B	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
LEA (%R11,%RAX,8),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R10,%RBX,8),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %R9,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
SETAE %DIL	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
MOV 0xa0(%RBP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R11,%RBX,8),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %R10,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
SETB %SIL	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
LEA -0x10(%R11,%R15,8),%RBX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
CMP %R9,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
SETB %R15B	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
CMP %R10,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
SETB %R11B	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
MOV -0x30(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %R8,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV -0x38(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
SETB %BL	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
TEST %DIL,%R12B	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
JNE 48fe69 <hypre_BoomerAMGCreate2ndS.extracted.17+0xe19>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
OR %R15B,%SIL	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
JE 48fe69 <hypre_BoomerAMGCreate2ndS.extracted.17+0xe19>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
OR %BL,%R11B	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
JE 48fe69 <hypre_BoomerAMGCreate2ndS.extracted.17+0xe19>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R13,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R13,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x4,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
MOV -0x50(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JE 48fed9 <hypre_BoomerAMGCreate2ndS.extracted.17+0xe89>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RDI,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VPBROADCASTQ %RCX,%YMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	scal (12.5%)
VPBROADCASTQ %RDX,%YMM1	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	scal (12.5%)
AND $-0x10,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
JE 48feeb <hypre_BoomerAMGCreate2ndS.extracted.17+0xe9b>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA -0x1(%RSI),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %R15D,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VPBROADCASTQ 0x7d0af(%RIP),%YMM2	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	0.33	scal (12.5%)
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RSI,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV -0x70(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x98(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JNE 48fef8 <hypre_BoomerAMGCreate2ndS.extracted.17+0xea8>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %R11,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 48ff81 <hypre_BoomerAMGCreate2ndS.extracted.17+0xf31>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
JMP 48ff9c <hypre_BoomerAMGCreate2ndS.extracted.17+0xf4c>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV -0x88(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RBX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x70(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x50(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x98(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x38(%RBP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x28(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JMP 48feaa <hypre_BoomerAMGCreate2ndS.extracted.17+0xe5a>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x70(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x98(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JMP 48ff9c <hypre_BoomerAMGCreate2ndS.extracted.17+0xf4c>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x70(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x98(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
LEA -0x1(%R11),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VPBROADCASTQ 0x7ce8b(%RIP),%YMM2	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	0.33	scal (12.5%)
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R11,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %R11,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JNE 48ff9c <hypre_BoomerAMGCreate2ndS.extracted.17+0xf4c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x88(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x80(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x38(%RBP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x28(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JMP 490019 <hypre_BoomerAMGCreate2ndS.extracted.17+0xfc9>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV -0x88(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %RBX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV 0x28(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R10,%RSI,8),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x38(%RBP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JMP 48ffde <hypre_BoomerAMGCreate2ndS.extracted.17+0xf8e>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x80(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RCX,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV -0x68(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JGE 4909ab <hypre_BoomerAMGCreate2ndS.extracted.17+0x195b>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x30(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R10,%RDX,8),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %RAX,(%RDI)	2	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x38(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R11,%RDX,8),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %RCX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RSI,(%R11,%RDX,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0xb8(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
SAL $0x4,%R10	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV 0x90(%RBP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%R10,%R11,1),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RDI),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RDI,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JNE 49007a <hypre_BoomerAMGCreate2ndS.extracted.17+0x102a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RSI,0x18(%R10,%R11,1)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JNE 49007a <hypre_BoomerAMGCreate2ndS.extracted.17+0x102a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0xa0(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RSI,%RDX,8),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOVQ $0x2,(%R13,%RDX,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
CMP $0x1,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JNE 49030d <hypre_BoomerAMGCreate2ndS.extracted.17+0x12bd>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
JMP 49009d <hypre_BoomerAMGCreate2ndS.extracted.17+0x104d>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD $0xb8,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0

Source file and lines	par_strength.c:1668-2230
Module	exec

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is probably not vectorized. Only 12% of vector register length is used (average across all SSE/AVX instructions).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers).

Workaround

Read the "512-bits vectorization" report at "Potential" confidence level.

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

512-bits vectorization

Workaround

Recompile with -mprefer-vector-width=512

CALL instructions

Detected function call instructions.

Details

__kmpc_barrier@plt: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1955
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1962
__kmpc_end_masked@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1962
__kmpc_masked@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1962
hypre_GetSimpleThreadPartition: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1674
hypre_GetThreadNum: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1671
hypre_MAlloc: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1967
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1971
hypre_prefix_sum_pair: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1946

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

ADD: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:1988
VZEROUPPER: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:2228

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 680 bytes. The binary function is storing 192 bytes.

General properties

nb instructions	350
nb uops	361
loop length	1685
used x86 registers	16
used mmx registers	0
used xmm registers	0
used ymm registers	3
used zmm registers	0
nb stack references	36

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	60.33 cycles
front end	60.33 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	18.00	15.40	31.33	31.33	19.50	15.20	18.00	19.50	19.50	19.50	15.40	31.33
cycles	18.00	15.40	31.33	31.33	19.50	15.20	18.00	19.50	19.50	19.50	15.40	31.33

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	60.33
Dispatch	31.33
Overall L1	60.33

Vectorization ratios

all	1%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	3%

Vector efficiency ratios

all	12%
load	12%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 60.33 cycles. At this rate:

5% of peak load performance is reached (11.27 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (3.18 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 48f050

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0xb8,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R9,-0x70(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R8,-0x58(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RCX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,-0x50(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDI,-0xb0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x88(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x48(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x20(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
CALL 4e8ff0 <hypre_GetThreadNum>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RAX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA -0xd0(%RBP),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0xd8(%RBP),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R12,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4e9000 <hypre_GetSimpleThreadPartition>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %R15,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%RBX),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RCX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
IMUL %R13,%RDX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
MOV (%R14),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP $0x1,%R15	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JLE 48f0f6 <hypre_BoomerAMGCreate2ndS.extracted.17+0xa6>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0xd0(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xc8(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xc0(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xb8(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RSI,%RDX,8),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSI,-0x78(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RAX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
IMUL %R13,%RSI	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA (%R9,%RSI,8),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%RDI,%RDX,8),%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R8,%RSI,8),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 48f10b <hypre_BoomerAMGCreate2ndS.extracted.17+0xbb>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
MOV %RAX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
IMUL %R13,%RSI	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDI,-0x78(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %R11D,%R11D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0xa8(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R8,%RDX,8),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
TEST %RAX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
MOV 0xb0(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RDX,%RSI,8),%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMOVE %RAX,%R14	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
TEST %RCX,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
CMOVE %RCX,%R8	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
MOV 0x48(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JLE 48f153 <hypre_BoomerAMGCreate2ndS.extracted.17+0x103>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV (%RDX),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x98(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %RAX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JLE 48f180 <hypre_BoomerAMGCreate2ndS.extracted.17+0x130>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R8,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R9,-0x98(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVQ $0,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOVQ $0,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV (%RCX,%R13,8),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R13,-0xb8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x8(%RCX,%R13,8),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP $0x1,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RBX,-0x88(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RAX,-0x80(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R10,-0x68(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R11,-0x60(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDI,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JNE 48f460 <hypre_BoomerAMGCreate2ndS.extracted.17+0x410>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RAX,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 48fae7 <hypre_BoomerAMGCreate2ndS.extracted.17+0xa97>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RBX,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 48f1f3 <hypre_BoomerAMGCreate2ndS.extracted.17+0x1a3>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RAX,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 48fae7 <hypre_BoomerAMGCreate2ndS.extracted.17+0xa97>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA 0x38(%R11),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,-0xc8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA 0x38(%RDI),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,-0xc0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
XOR %R12D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV %RBX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %R15D,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,-0xa8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 48f4b4 <hypre_BoomerAMGCreate2ndS.extracted.17+0x464>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x88(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R15),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x28(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RCX,%RAX,8),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x38(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RCX,%RAX,8),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x30(%RBP),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x38(%RBP),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x90(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CALL 4e9f20 <hypre_prefix_sum_pair>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
CMPQ $0,(%R15)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
MOV -0x48(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JLE 48fb40 <hypre_BoomerAMGCreate2ndS.extracted.17+0xaf0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x48(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMPQ $0,(%RCX)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
MOV -0x50(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0xb0(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JLE 48fb70 <hypre_BoomerAMGCreate2ndS.extracted.17+0xb20>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV (%R15),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV $0x535410,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CALL 410560 <__kmpc_barrier@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV (%R15),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV $0x535430,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 4106c0 <__kmpc_masked@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
CMP $0x1,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV %R15,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x70(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x98(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JNE 48fc07 <hypre_BoomerAMGCreate2ndS.extracted.17+0xbb7>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x88(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RAX),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x28(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RCX,%RAX,8),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %RDI,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 48fbd0 <hypre_BoomerAMGCreate2ndS.extracted.17+0xb80>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
SAL $0x3,%RDI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
CALL 4e7260 <hypre_MAlloc>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0x30(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,(%RCX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x88(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RAX),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x38(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RCX,%RAX,8),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %RDI,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 48fbed <hypre_BoomerAMGCreate2ndS.extracted.17+0xb9d>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
SAL $0x3,%RDI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
CALL 4e7260 <hypre_MAlloc>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0x40(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,(%RCX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0xb0(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RAX),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV $0x535450,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CALL 4104f0 <__kmpc_end_masked@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0xb0(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RAX),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV $0x535470,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CALL 410560 <__kmpc_barrier@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x80(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA -0x1(%RCX),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RBX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RBX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV 0x38(%RBP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x28(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JLE 490019 <hypre_BoomerAMGCreate2ndS.extracted.17+0xfc9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RSI,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA (%R10,%RAX,8),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R11,%RBX,8),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %R8,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
SETAE %R12B	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
LEA (%R11,%RAX,8),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R10,%RBX,8),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %R9,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
SETAE %DIL	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
MOV 0xa0(%RBP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R11,%RBX,8),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %R10,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
SETB %SIL	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
LEA -0x10(%R11,%R15,8),%RBX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
CMP %R9,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
SETB %R15B	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
CMP %R10,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
SETB %R11B	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
MOV -0x30(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %R8,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV -0x38(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
SETB %BL	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
TEST %DIL,%R12B	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
JNE 48fe69 <hypre_BoomerAMGCreate2ndS.extracted.17+0xe19>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
OR %R15B,%SIL	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
JE 48fe69 <hypre_BoomerAMGCreate2ndS.extracted.17+0xe19>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
OR %BL,%R11B	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
JE 48fe69 <hypre_BoomerAMGCreate2ndS.extracted.17+0xe19>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R13,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R13,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x4,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
MOV -0x50(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JE 48fed9 <hypre_BoomerAMGCreate2ndS.extracted.17+0xe89>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RDI,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VPBROADCASTQ %RCX,%YMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	scal (12.5%)
VPBROADCASTQ %RDX,%YMM1	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	scal (12.5%)
AND $-0x10,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
JE 48feeb <hypre_BoomerAMGCreate2ndS.extracted.17+0xe9b>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA -0x1(%RSI),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %R15D,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VPBROADCASTQ 0x7d0af(%RIP),%YMM2	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	0.33	scal (12.5%)
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RSI,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV -0x70(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x98(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JNE 48fef8 <hypre_BoomerAMGCreate2ndS.extracted.17+0xea8>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %R11,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 48ff81 <hypre_BoomerAMGCreate2ndS.extracted.17+0xf31>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
JMP 48ff9c <hypre_BoomerAMGCreate2ndS.extracted.17+0xf4c>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV -0x88(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RBX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x70(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x50(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x98(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x38(%RBP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x28(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JMP 48feaa <hypre_BoomerAMGCreate2ndS.extracted.17+0xe5a>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x70(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x98(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JMP 48ff9c <hypre_BoomerAMGCreate2ndS.extracted.17+0xf4c>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x70(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x98(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
LEA -0x1(%R11),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VPBROADCASTQ 0x7ce8b(%RIP),%YMM2	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	0.33	scal (12.5%)
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R11,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %R11,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JNE 48ff9c <hypre_BoomerAMGCreate2ndS.extracted.17+0xf4c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x88(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x80(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x38(%RBP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x28(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JMP 490019 <hypre_BoomerAMGCreate2ndS.extracted.17+0xfc9>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV -0x88(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %RBX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV 0x28(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R10,%RSI,8),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x38(%RBP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JMP 48ffde <hypre_BoomerAMGCreate2ndS.extracted.17+0xf8e>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x80(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RCX,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV -0x68(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JGE 4909ab <hypre_BoomerAMGCreate2ndS.extracted.17+0x195b>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x30(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R10,%RDX,8),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %RAX,(%RDI)	2	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x38(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R11,%RDX,8),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %RCX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RSI,(%R11,%RDX,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0xb8(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
SAL $0x4,%R10	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV 0x90(%RBP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%R10,%R11,1),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RDI),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RDI,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JNE 49007a <hypre_BoomerAMGCreate2ndS.extracted.17+0x102a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RSI,0x18(%R10,%R11,1)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JNE 49007a <hypre_BoomerAMGCreate2ndS.extracted.17+0x102a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0xa0(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RSI,%RDX,8),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOVQ $0x2,(%R13,%RDX,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
CMP $0x1,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JNE 49030d <hypre_BoomerAMGCreate2ndS.extracted.17+0x12bd>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
JMP 49009d <hypre_BoomerAMGCreate2ndS.extracted.17+0x104d>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD $0xb8,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A

Name	Coverage (%)	Time (s)
▼hypre_BoomerAMGCreate2ndS.extracted.17–	1.57	0.85
○Loop 2521 - par_strength.c:1951-1953 - exec	0.02	0.01
○Loop 2543 - par_strength.c:1691-1693 - exec	0.00	0.00
▼Loop 2509 - par_strength.c:2000-2083 - exec–	0.00	0.01
▼Loop 2513 - par_strength.c:2011-2048 - exec–	0.06	0.03
○Loop 2515 - par_strength.c:2024-2034 - exec	0.69	0.29
○Loop 2514 - par_strength.c:2038-2048 - exec	0.00	0.01
▼Loop 2510 - par_strength.c:2053-2083 - exec–	0.00	0.00
○Loop 2512 - par_strength.c:2066-2073 - exec	0.00	0.00
○Loop 2511 - par_strength.c:2076-2083 - exec	0.00	0.00
○Loop 2519 - par_strength.c:1978-1984 - exec	0.00	0.00
▼Loop 2535 - par_strength.c:1714-1797 - exec–	0.00	0.01
▼Loop 2539 - par_strength.c:1731-1765 - exec–	0.07	0.03
○Loop 2541 - par_strength.c:1743-1752 - exec	0.70	0.30
○Loop 2540 - par_strength.c:1756-1765 - exec	0.00	0.01
▼Loop 2536 - par_strength.c:1770-1797 - exec–	0.00	0.00
○Loop 2537 - par_strength.c:1791-1797 - exec	0.00	0.00
○Loop 2538 - par_strength.c:1782-1788 - exec	0.00	0.01
○Loop 2520 - par_strength.c:1955-1957 - exec	0.00	0.00
○Loop 2542 - par_strength.c:1695-1697 - exec	0.00	0.00
○Loop 2517 - par_strength.c:1978-1984 - exec	0.00	0.00
▼Loop 2498 - par_strength.c:1679-2230 - exec–	0.00	0.00
○Loop 2501 - par_strength.c:2216-2222 - exec	0.00	0.00
▼Loop 2503 - par_strength.c:2163-2211 - exec–	0.00	0.00
○Loop 2505 - par_strength.c:2181-2195 - exec	0.00	0.00
○Loop 2504 - par_strength.c:2199-2211 - exec	0.00	0.00
○Loop 2502 - par_strength.c:2216-2222 - exec	0.00	0.00
○Loop 2499 - par_strength.c:2224-2230 - exec	0.00	0.00
▼Loop 2506 - par_strength.c:2106-2158 - exec–	0.00	0.00
○Loop 2507 - par_strength.c:2143-2158 - exec	0.00	0.00
○Loop 2508 - par_strength.c:2124-2139 - exec	0.00	0.00
○Loop 2500 - par_strength.c:2224-2230 - exec	0.00	0.00
○Loop 2518 - par_strength.c:1679-1984 - exec	0.00	0.00
○Loop 2516 - par_strength.c:1978-1984 - exec	0.00	0.00
▼Loop 2522 - par_strength.c:1679-1941 - exec–	0.00	0.00
▼Loop 2532 - par_strength.c:1823-1872 - exec–	0.00	0.00
○Loop 2534 - par_strength.c:1840-1854 - exec	0.00	0.00
○Loop 2533 - par_strength.c:1858-1872 - exec	0.00	0.00
○Loop 2527 - par_strength.c:1927-1931 - exec	0.00	0.00
○Loop 2528 - par_strength.c:1927-1931 - exec	0.00	0.00
▼Loop 2529 - par_strength.c:1877-1922 - exec–	0.00	0.00
○Loop 2530 - par_strength.c:1911-1922 - exec	0.00	0.00
○Loop 2531 - par_strength.c:1894-1907 - exec	0.00	0.00
○Loop 2526 - par_strength.c:1927-1933 - exec	0.00	0.00
○Loop 2524 - par_strength.c:1935-1939 - exec	0.00	0.00
○Loop 2525 - par_strength.c:1935-1939 - exec	0.00	0.00
○Loop 2523 - par_strength.c:1935-1941 - exec	0.00	0.00

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Execution units bottlenecks

512-bits vectorization

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CALL instructions

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Complex instructions

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Type of elements and instruction set

Matching between your function (in the source code) and the binary function

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Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

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ASM code