OV - exec - Loop 4057

	Loop Id: 4057	Module: exec	Source: IJMatrix_parcsr.c:3262-3454 [...]	Coverage: 1.06%

0x504400 MOV	-0x30(%RBP),%R10

0x504404 MOV	%RCX,%R8

0x504407 INC	%RSI

0x50440a INC	%RDI

0x50440d CMP	%R15,%RDI

0x504410 JE	504bc0

0x504416 MOV	(%RBX,%RSI,8),%R9

0x50441a CMP	0x28(%RBP),%R9

0x50441e JL	504580

0x504424 CMP	0x30(%RBP),%R9

0x504428 JG	504580

0x50442e MOV	0x60(%RBP),%RAX

0x504432 MOV	(%RAX,%R10,8),%R10

0x504436 MOV	-0x90(%RBP),%R11

0x50443d SUB	%R10,%R11

0x504440 JLE	504530

0x504446 MOV	0x68(%RBP),%RAX

0x50444a LEA	(%RAX,%R10,8),%EAX

0x50444e AND	$0x7f,%EAX

0x504451 MOV	$0x80,%EDX

0x504456 SUB	%EAX,%EDX

0x504458 SHR	$0x3,%EDX

0x50445b CMP	%RDX,%R11

0x50445e MOV	%RDX,%R8

0x504461 CMOVB	%R11,%R8

0x504465 TEST	%R8,%R8

0x504468 JE	504486

0x50446a MOV	%R10,%R13

0x50446d MOV	%R8,%RAX

  (4063) 0x504470 MOV	0x68(%RBP),%R14

  (4063) 0x504474 CMP	%R9,(%R14,%R13,8)

  (4063) 0x504478 JE	50472a

  (4063) 0x50447e INC	%R13

  (4063) 0x504481 DEC	%RAX

  (4063) 0x504484 JNE	504470

0x504486 CMP	%RDX,%R11

0x504489 JBE	504530

0x50448f MOV	%RSI,-0x38(%RBP)

0x504493 SUB	%R8,%R11

0x504496 MOV	%R11,%R14

0x504499 AND	$-0x10,%R14

0x50449d JE	5044fa

0x50449f LEA	-0x1(%R14),%RSI

0x5044a3 LEA	(%R10,%R8,1),%R13

0x5044a7 VPBROADCASTQ	%R9,%YMM0

0x5044ad MOV	0x68(%RBP),%RAX

0x5044b1 LEA	(%RAX,%R13,8),%RAX

0x5044b5 XOR	%EDX,%EDX

0x5044b7 NOPW	(%RAX,%RAX,1)

  (4062) 0x5044c0 VPCMPEQQ	0x20(%RAX,%RDX,8),%YMM0,%K0

  (4062) 0x5044c8 VPCMPEQQ	(%RAX,%RDX,8),%YMM0,%K1

  (4062) 0x5044cf VPCMPEQQ	0x60(%RAX,%RDX,8),%YMM0,%K2

  (4062) 0x5044d7 VPCMPEQQ	0x40(%RAX,%RDX,8),%YMM0,%K3

  (4062) 0x5044df KORB	%K0,%K1,%K4

  (4062) 0x5044e3 KORB	%K2,%K3,%K5

  (4062) 0x5044e7 KORTESTB	%K5,%K4

  (4062) 0x5044eb JNE	504700

  (4062) 0x5044f1 ADD	$0x10,%RDX

  (4062) 0x5044f5 CMP	%RSI,%RDX

  (4062) 0x5044f8 JBE	5044c0

0x5044fa CMP	%R11,%R14

0x5044fd MOV	-0x38(%RBP),%RSI

0x504501 JAE	504530

0x504503 ADD	%R8,%R10

0x504506 ADD	%R14,%R10

0x504509 MOV	%R10,%R13

0x50450c NOPL	(%RAX)

  (4061) 0x504510 MOV	0x68(%RBP),%RAX

  (4061) 0x504514 CMP	%R9,(%RAX,%R13,8)

  (4061) 0x504518 JE	50472a

  (4061) 0x50451e INC	%R13

  (4061) 0x504521 CMP	%R13,-0x90(%RBP)

  (4061) 0x504528 JNE	504510

0x50452a NOPW	(%RAX,%RAX,1)

0x504530 MOV	-0x70(%RBP),%RDX

0x504534 CMP	-0x78(%RBP),%RDX

0x504538 JGE	504c40

0x50453e MOV	0x68(%RBP),%RAX

0x504542 MOV	%R9,(%RAX,%RDX,8)

0x504546 MOV	0x10(%RBP),%RAX

0x50454a VMOVQ	(%RAX,%RSI,8),%XMM0

0x50454f MOV	0x70(%RBP),%RAX

0x504553 VMOVQ	%XMM0,(%RAX,%RDX,8)

0x504558 INC	%RDX

0x50455b MOV	%RDX,-0x70(%RBP)

0x50455f JMP	504400

0x504580 MOV	0x78(%RBP),%RAX

0x504584 MOV	(%RAX,%R10,8),%R10

0x504588 MOV	%R8,%R11

0x50458b SUB	%R10,%R11

0x50458e JLE	504690

0x504594 MOV	0x80(%RBP),%RAX

0x50459b LEA	(%RAX,%R10,8),%EAX

0x50459f AND	$0x7f,%EAX

0x5045a2 MOV	$0x80,%EDX

0x5045a7 SUB	%EAX,%EDX

0x5045a9 SHR	$0x3,%EDX

0x5045ac CMP	%RDX,%R11

0x5045af MOV	%RDX,%R8

0x5045b2 CMOVB	%R11,%R8

0x5045b6 TEST	%R8,%R8

0x5045b9 JE	5045e9

0x5045bb MOV	%R10,%R13

0x5045be MOV	%R8,%RAX

0x5045c1 NOPW	%CS:(%RAX,%RAX,1)

  (4060) 0x5045d0 MOV	0x80(%RBP),%R14

  (4060) 0x5045d7 CMP	%R9,(%R14,%R13,8)

  (4060) 0x5045db JE	5047aa

  (4060) 0x5045e1 INC	%R13

  (4060) 0x5045e4 DEC	%RAX

  (4060) 0x5045e7 JNE	5045d0

0x5045e9 CMP	%RDX,%R11

0x5045ec JBE	504690

0x5045f2 MOV	%RSI,-0x38(%RBP)

0x5045f6 SUB	%R8,%R11

0x5045f9 MOV	%R11,%R14

0x5045fc AND	$-0x10,%R14

0x504600 JE	50465a

0x504602 LEA	-0x1(%R14),%RSI

0x504606 LEA	(%R10,%R8,1),%R13

0x50460a VPBROADCASTQ	%R9,%YMM0

0x504610 MOV	0x80(%RBP),%RAX

0x504617 LEA	(%RAX,%R13,8),%RAX

0x50461b XOR	%EDX,%EDX

0x50461d NOPL	(%RAX)

  (4059) 0x504620 VPCMPEQQ	0x20(%RAX,%RDX,8),%YMM0,%K0

  (4059) 0x504628 VPCMPEQQ	(%RAX,%RDX,8),%YMM0,%K1

  (4059) 0x50462f VPCMPEQQ	0x60(%RAX,%RDX,8),%YMM0,%K2

  (4059) 0x504637 VPCMPEQQ	0x40(%RAX,%RDX,8),%YMM0,%K3

  (4059) 0x50463f KORB	%K0,%K1,%K4

  (4059) 0x504643 KORB	%K2,%K3,%K5

  (4059) 0x504647 KORTESTB	%K5,%K4

  (4059) 0x50464b JNE	504780

  (4059) 0x504651 ADD	$0x10,%RDX

  (4059) 0x504655 CMP	%RSI,%RDX

  (4059) 0x504658 JBE	504620

0x50465a CMP	%R11,%R14

0x50465d MOV	-0x38(%RBP),%RSI

0x504661 JAE	504690

0x504663 ADD	%R8,%R10

0x504666 ADD	%R14,%R10

0x504669 MOV	%R10,%R13

0x50466c NOPL	(%RAX)

  (4058) 0x504670 MOV	0x80(%RBP),%RAX

  (4058) 0x504677 CMP	%R9,(%RAX,%R13,8)

  (4058) 0x50467b JE	5047aa

  (4058) 0x504681 INC	%R13

  (4058) 0x504684 CMP	%R13,%RCX

  (4058) 0x504687 JNE	504670

0x504689 NOPL	(%RAX)

0x504690 MOV	-0x80(%RBP),%RDX

0x504694 CMP	-0x98(%RBP),%RDX

0x50469b JGE	504c80

0x5046a1 MOV	0x80(%RBP),%RAX

0x5046a8 MOV	%R9,(%RAX,%RDX,8)

0x5046ac MOV	0x10(%RBP),%RAX

0x5046b0 VMOVQ	(%RAX,%RSI,8),%XMM0

0x5046b5 MOV	0x88(%RBP),%RAX

0x5046bc VMOVQ	%XMM0,(%RAX,%RDX,8)

0x5046c1 INC	%RDX

0x5046c4 MOV	%RDX,-0x80(%RBP)

0x5046c8 JMP	504400

0x504700 KSHIFTLB	$0x4,%K0,%K0

0x504706 KORB	%K0,%K1,%K0

0x50470a KSHIFTLB	$0x4,%K2,%K1

0x504710 KORB	%K1,%K3,%K1

0x504714 KUNPCKBW	%K0,%K1,%K0

0x504718 KMOVD	%K0,%EAX

0x50471c TZCNT	%EAX,%EAX

0x504720 ADD	%RDX,%R13

0x504723 ADD	%RAX,%R13

0x504726 MOV	-0x38(%RBP),%RSI

0x50472a MOV	-0x30(%RBP),%R10

0x50472e MOV	%RCX,%R8

0x504731 MOV	0x10(%RBP),%RAX

0x504735 VMOVQ	(%RAX,%RSI,8),%XMM0

0x50473a MOV	0x70(%RBP),%RAX

0x50473e VMOVQ	%XMM0,(%RAX,%R13,8)

0x504744 JMP	504407

0x504780 KSHIFTLB	$0x4,%K0,%K0

0x504786 KORB	%K0,%K1,%K0

0x50478a KSHIFTLB	$0x4,%K2,%K1

0x504790 KORB	%K1,%K3,%K1

0x504794 KUNPCKBW	%K0,%K1,%K0

0x504798 KMOVD	%K0,%EAX

0x50479c TZCNT	%EAX,%EAX

0x5047a0 ADD	%RDX,%R13

0x5047a3 ADD	%RAX,%R13

0x5047a6 MOV	-0x38(%RBP),%RSI

0x5047aa MOV	-0x30(%RBP),%R10

0x5047ae MOV	%RCX,%R8

0x5047b1 MOV	0x10(%RBP),%RAX

0x5047b5 VMOVQ	(%RAX,%RSI,8),%XMM0

0x5047ba MOV	0x88(%RBP),%RAX

0x5047c1 VMOVQ	%XMM0,(%RAX,%R13,8)

0x5047c7 JMP	504407

/home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/IJ_mv/IJMatrix_parcsr.c: 3262 - 3454

--------------------------------------------------------------------------------

3262:          if (my_thread_num < rest)

[...]

3383:   	          for (i=0; i < n; i++)

3384: 	          {

3385: 	             if (cols[indx] < col_0 || cols[indx] > col_n)

3386:                      /* insert into offd */

3387: 	             {

3388: 	                for (j=offd_i[row_local]; j < offd_indx; j++)

3389: 	                {

3390: 		           if (offd_j[j] == cols[indx])

3391: 		           {

3392:                               offd_data[j] = values[indx];

[...]

3399: 	                   if (cnt_offd < offd_space)

3400: 	                   {

3401: 	                      offd_j[cnt_offd] = cols[indx];

3402: 	                      offd_data[cnt_offd++] = values[indx];

[...]

3422: 	                for (j=diag_i[row_local]; j < diag_indx; j++)

3423: 	                {

3424: 		           if (diag_j[j] == cols[indx])

3425: 		           {

3426:                               diag_data[j] = values[indx];

[...]

3433: 	                   if (cnt_diag < diag_space)

3434: 	                   {

3435: 	                      diag_j[cnt_diag] = cols[indx];

3436: 	                      diag_data[cnt_diag++] = values[indx];

[...]

3454: 	             indx++;

Coverage (%)	Name	Source Location	Module
►100.00+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so

Path /

Metric	Value
CQA speedup if no scalar integer	2.73
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	8.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.77
Bottlenecks	micro-operation queue,
Function	hypre_IJMatrixSetValuesOMPParCSR.extracted.28
Source	IJMatrix_parcsr.c:3262-3262,IJMatrix_parcsr.c:3383-3385,IJMatrix_parcsr.c:3388-3392,IJMatrix_parcsr.c:3399-3402,IJMatrix_parcsr.c:3422-3426,IJMatrix_parcsr.c:3433-3436,IJMatrix_parcsr.c:3454-3454
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	25.00
CQA cycles if no scalar integer	9.17
CQA cycles if FP arith vectorized	25.00
CQA cycles if fully vectorized	3.13
Front-end cycles	25.00
P0 cycles	14.10
P1 cycles	14.00
P2 cycles	12.33
P3 cycles	12.33
P4 cycles	5.00
P5 cycles	14.00
P6 cycles	13.90
P7 cycles	5.00
P8 cycles	5.00
P9 cycles	5.00
P10 cycles	14.00
P11 cycles	12.33
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	150.00
Nb uops	150.00
Nb loads	37.00
Nb stores	10.00
Nb stack references	16.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	15.04
Bytes prefetched	0.00
Bytes loaded	296.00
Bytes stored	80.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	12.50
Vector-efficiency ratio load	12.50
Vector-efficiency ratio store	12.50
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	12.50
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	12.50

Metric	Value
CQA speedup if no scalar integer	2.73
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	8.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.77
Bottlenecks	micro-operation queue,
Function	hypre_IJMatrixSetValuesOMPParCSR.extracted.28
Source	IJMatrix_parcsr.c:3262-3262,IJMatrix_parcsr.c:3383-3385,IJMatrix_parcsr.c:3388-3392,IJMatrix_parcsr.c:3399-3402,IJMatrix_parcsr.c:3422-3426,IJMatrix_parcsr.c:3433-3436,IJMatrix_parcsr.c:3454-3454
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	25.00
CQA cycles if no scalar integer	9.17
CQA cycles if FP arith vectorized	25.00
CQA cycles if fully vectorized	3.13
Front-end cycles	25.00
P0 cycles	14.10
P1 cycles	14.00
P2 cycles	12.33
P3 cycles	12.33
P4 cycles	5.00
P5 cycles	14.00
P6 cycles	13.90
P7 cycles	5.00
P8 cycles	5.00
P9 cycles	5.00
P10 cycles	14.00
P11 cycles	12.33
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	150.00
Nb uops	150.00
Nb loads	37.00
Nb stores	10.00
Nb stack references	16.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	15.04
Bytes prefetched	0.00
Bytes loaded	296.00
Bytes stored	80.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	12.50
Vector-efficiency ratio load	12.50
Vector-efficiency ratio store	12.50
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	12.50
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	12.50

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	hypre_IJMatrixSetValuesOMPParCSR.extracted.28
Source file and lines	IJMatrix_parcsr.c:3262-3454
Module	exec

The loop is defined in /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/IJ_mv/IJMatrix_parcsr.c:3262,3383-3392,3399-3402,3422-3426,3433-3436,3454.

Analyzed code is defined in /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/IJ_mv/IJMatrix_parcsr.c:3262,3383-3385,3388-3392,3399-3402,3422-3426,3433-3436,3454.

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Too many paths. If you really need to analyze all of the 54 paths individually, rerun with max-paths=54
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 54 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 25.00 to 9.17 cycles (2.73x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your loop is not vectorized. 8 data elements could be processed at once in vector registers.

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers).

Workaround

Read the "512-bits vectorization" report at "Potential" confidence level.

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

512-bits vectorization

On some x86 processors supporting 512-bits vectorization, compilers are often too conservative and limit vectorization to 256 bits. Performance can then be improved by enforcing 512-bits vectorization, especially with many vectorized and high trip count loops. 512-bits vectorization performance overhead (compared to 256-bits) is generally lower on newer processors.

Workaround

Recompile with -mprefer-vector-width=512

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This loop is probably writing/copying data or processing integer elements.

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 296 bytes. The binary loop is storing 80 bytes.

General properties

nb instructions	150
nb uops	150
loop length	624
used x86 registers	14
used mmx registers	0
used xmm registers	1
used ymm registers	1
used zmm registers	0
nb stack references	16

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	25.00 cycles
front end	25.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	14.10	14.00	12.33	12.33	5.00	14.00	13.90	5.00	5.00	5.00	14.00	12.33
cycles	14.10	14.00	12.33	12.33	5.00	14.00	13.90	5.00	5.00	5.00	14.00	12.33

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	25.00
Dispatch	14.10
Overall L1	25.00

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 25.00 cycles. At this rate:

6% of peak load performance is reached (11.84 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (3.20 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 25.00 to 14.10 cycles (1.77x speedup).

ASM code

In the binary file, the address of the loop is: 504416

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
MOV -0x30(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RCX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
INC %RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
INC %RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
CMP %R15,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 504bc0 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0xf60>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV (%RBX,%RSI,8),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
CMP 0x28(%RBP),%R9	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JL 504580 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0x920>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP 0x30(%RBP),%R9	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JG 504580 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0x920>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x60(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RAX,%R10,8),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x90(%RBP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
SUB %R10,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JLE 504530 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0x8d0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x68(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RAX,%R10,8),%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
AND $0x7f,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
MOV $0x80,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SUB %EAX,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SHR $0x3,%EDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
CMP %RDX,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RDX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMOVB %R11,%R8	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
TEST %R8,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 504486 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0x826>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R10,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RDX,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JBE 504530 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0x8d0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RSI,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
SUB %R8,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %R11,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x10,%R14	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
JE 5044fa <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0x89a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA -0x1(%R14),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R10,%R8,1),%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VPBROADCASTQ %R9,%YMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	scal (12.5%)
MOV 0x68(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RAX,%R13,8),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %R11,%R14	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV -0x38(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JAE 504530 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0x8d0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
ADD %R8,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %R14,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R10,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x70(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP -0x78(%RBP),%RDX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JGE 504c40 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0xfe0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x68(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R9,(%RAX,%RDX,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x10(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVQ (%RAX,%RSI,8),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x70(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVQ %XMM0,(%RAX,%RDX,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INC %RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,-0x70(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 504400 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0x7a0>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV 0x78(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RAX,%R10,8),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R8,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
SUB %R10,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JLE 504690 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0xa30>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x80(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RAX,%R10,8),%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
AND $0x7f,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
MOV $0x80,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SUB %EAX,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SHR $0x3,%EDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
CMP %RDX,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RDX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMOVB %R11,%R8	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
TEST %R8,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 5045e9 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0x989>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R10,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RDX,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JBE 504690 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0xa30>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RSI,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
SUB %R8,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %R11,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x10,%R14	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
JE 50465a <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0x9fa>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA -0x1(%R14),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R10,%R8,1),%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VPBROADCASTQ %R9,%YMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	scal (12.5%)
MOV 0x80(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RAX,%R13,8),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %R11,%R14	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV -0x38(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JAE 504690 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0xa30>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
ADD %R8,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %R14,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R10,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x80(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP -0x98(%RBP),%RDX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JGE 504c80 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0x1020>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x80(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R9,(%RAX,%RDX,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x10(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVQ (%RAX,%RSI,8),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x88(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVQ %XMM0,(%RAX,%RDX,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INC %RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,-0x80(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 504400 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0x7a0>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
KSHIFTLB $0x4,%K0,%K0	1	0	0	0	0	0	1	0	0	0	0	0	0	4	1	N/A
KORB %K0,%K1,%K0	1	1	0	0	0	0	0	0	0	0	0	0	0	1	1	N/A
KSHIFTLB $0x4,%K2,%K1	1	0	0	0	0	0	1	0	0	0	0	0	0	4	1	N/A
KORB %K1,%K3,%K1	1	1	0	0	0	0	0	0	0	0	0	0	0	1	1	N/A
KUNPCKBW %K0,%K1,%K0	1	0	0	0	0	0	1	0	0	0	0	0	0	4	1	N/A
KMOVD %K0,%EAX	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	N/A
TZCNT %EAX,%EAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %RDX,%R13	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RAX,%R13	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x38(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x30(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RCX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x10(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVQ (%RAX,%RSI,8),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x70(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVQ %XMM0,(%RAX,%R13,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 504407 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0x7a7>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
KSHIFTLB $0x4,%K0,%K0	1	0	0	0	0	0	1	0	0	0	0	0	0	4	1	N/A
KORB %K0,%K1,%K0	1	1	0	0	0	0	0	0	0	0	0	0	0	1	1	N/A
KSHIFTLB $0x4,%K2,%K1	1	0	0	0	0	0	1	0	0	0	0	0	0	4	1	N/A
KORB %K1,%K3,%K1	1	1	0	0	0	0	0	0	0	0	0	0	0	1	1	N/A
KUNPCKBW %K0,%K1,%K0	1	0	0	0	0	0	1	0	0	0	0	0	0	4	1	N/A
KMOVD %K0,%EAX	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	N/A
TZCNT %EAX,%EAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %RDX,%R13	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RAX,%R13	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x38(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x30(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RCX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x10(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVQ (%RAX,%RSI,8),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x88(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVQ %XMM0,(%RAX,%R13,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 504407 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0x7a7>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A

Function	hypre_IJMatrixSetValuesOMPParCSR.extracted.28
Source file and lines	IJMatrix_parcsr.c:3262-3454
Module	exec

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Too many paths. If you really need to analyze all of the 54 paths individually, rerun with max-paths=54
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 25.00 to 9.17 cycles (2.73x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your loop is not vectorized. 8 data elements could be processed at once in vector registers.

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers).

Workaround

Read the "512-bits vectorization" report at "Potential" confidence level.

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

512-bits vectorization

Workaround

Recompile with -mprefer-vector-width=512

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This loop is probably writing/copying data or processing integer elements.

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 296 bytes. The binary loop is storing 80 bytes.

General properties

nb instructions	150
nb uops	150
loop length	624
used x86 registers	14
used mmx registers	0
used xmm registers	1
used ymm registers	1
used zmm registers	0
nb stack references	16

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	25.00 cycles
front end	25.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	14.10	14.00	12.33	12.33	5.00	14.00	13.90	5.00	5.00	5.00	14.00	12.33
cycles	14.10	14.00	12.33	12.33	5.00	14.00	13.90	5.00	5.00	5.00	14.00	12.33

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	25.00
Dispatch	14.10
Overall L1	25.00

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 25.00 cycles. At this rate:

6% of peak load performance is reached (11.84 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (3.20 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the loop is: 504416

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
MOV -0x30(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RCX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
INC %RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
INC %RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
CMP %R15,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 504bc0 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0xf60>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV (%RBX,%RSI,8),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
CMP 0x28(%RBP),%R9	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JL 504580 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0x920>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP 0x30(%RBP),%R9	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JG 504580 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0x920>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x60(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RAX,%R10,8),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x90(%RBP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
SUB %R10,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JLE 504530 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0x8d0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x68(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RAX,%R10,8),%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
AND $0x7f,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
MOV $0x80,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SUB %EAX,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SHR $0x3,%EDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
CMP %RDX,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RDX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMOVB %R11,%R8	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
TEST %R8,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 504486 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0x826>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R10,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RDX,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JBE 504530 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0x8d0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RSI,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
SUB %R8,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %R11,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x10,%R14	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
JE 5044fa <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0x89a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA -0x1(%R14),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R10,%R8,1),%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VPBROADCASTQ %R9,%YMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	scal (12.5%)
MOV 0x68(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RAX,%R13,8),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %R11,%R14	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV -0x38(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JAE 504530 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0x8d0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
ADD %R8,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %R14,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R10,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x70(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP -0x78(%RBP),%RDX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JGE 504c40 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0xfe0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x68(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R9,(%RAX,%RDX,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x10(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVQ (%RAX,%RSI,8),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x70(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVQ %XMM0,(%RAX,%RDX,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INC %RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,-0x70(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 504400 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0x7a0>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV 0x78(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RAX,%R10,8),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R8,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
SUB %R10,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JLE 504690 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0xa30>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x80(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RAX,%R10,8),%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
AND $0x7f,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
MOV $0x80,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SUB %EAX,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SHR $0x3,%EDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
CMP %RDX,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RDX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMOVB %R11,%R8	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
TEST %R8,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 5045e9 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0x989>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R10,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RDX,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JBE 504690 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0xa30>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RSI,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
SUB %R8,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %R11,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x10,%R14	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
JE 50465a <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0x9fa>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA -0x1(%R14),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R10,%R8,1),%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VPBROADCASTQ %R9,%YMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	scal (12.5%)
MOV 0x80(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RAX,%R13,8),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %R11,%R14	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV -0x38(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JAE 504690 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0xa30>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
ADD %R8,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %R14,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R10,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x80(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP -0x98(%RBP),%RDX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JGE 504c80 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0x1020>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x80(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R9,(%RAX,%RDX,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x10(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVQ (%RAX,%RSI,8),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x88(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVQ %XMM0,(%RAX,%RDX,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INC %RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,-0x80(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 504400 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0x7a0>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
KSHIFTLB $0x4,%K0,%K0	1	0	0	0	0	0	1	0	0	0	0	0	0	4	1	N/A
KORB %K0,%K1,%K0	1	1	0	0	0	0	0	0	0	0	0	0	0	1	1	N/A
KSHIFTLB $0x4,%K2,%K1	1	0	0	0	0	0	1	0	0	0	0	0	0	4	1	N/A
KORB %K1,%K3,%K1	1	1	0	0	0	0	0	0	0	0	0	0	0	1	1	N/A
KUNPCKBW %K0,%K1,%K0	1	0	0	0	0	0	1	0	0	0	0	0	0	4	1	N/A
KMOVD %K0,%EAX	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	N/A
TZCNT %EAX,%EAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %RDX,%R13	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RAX,%R13	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x38(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x30(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RCX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x10(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVQ (%RAX,%RSI,8),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x70(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVQ %XMM0,(%RAX,%R13,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 504407 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0x7a7>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
KSHIFTLB $0x4,%K0,%K0	1	0	0	0	0	0	1	0	0	0	0	0	0	4	1	N/A
KORB %K0,%K1,%K0	1	1	0	0	0	0	0	0	0	0	0	0	0	1	1	N/A
KSHIFTLB $0x4,%K2,%K1	1	0	0	0	0	0	1	0	0	0	0	0	0	4	1	N/A
KORB %K1,%K3,%K1	1	1	0	0	0	0	0	0	0	0	0	0	0	1	1	N/A
KUNPCKBW %K0,%K1,%K0	1	0	0	0	0	0	1	0	0	0	0	0	0	4	1	N/A
KMOVD %K0,%EAX	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	N/A
TZCNT %EAX,%EAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %RDX,%R13	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RAX,%R13	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x38(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x30(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RCX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x10(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVQ (%RAX,%RSI,8),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x88(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVQ %XMM0,(%RAX,%R13,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 504407 <hypre_IJMatrixSetValuesOMPParCSR.extracted.28+0x7a7>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

512-bits vectorization

Workaround

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

512-bits vectorization

Workaround

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code