OV - exec - Function hypre_ParCSRComputeL1NormsThreads.extracted

	Function: hypre_ParCSRComputeL1NormsThreads.extracted	Module: exec	Source: ams.c:3363-3540 [...]	Coverage (incl. loops): 0.29% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/ams.c: 3363 - 3540

--------------------------------------------------------------------------------

3363: #pragma omp parallel for private(i,ii,j,k,ns,ne,rest,size,diag,cf_diag) HYPRE_SMP_SCHEDULE

3364: #endif

3365:    for (k = 0; k < num_threads; k++)

3366:    {

3367:       size = num_rows/num_threads;

3368:       rest = num_rows - size*num_threads;

3369:       if (k < rest)

3370:       {

3371:          ns = k*size+k;

3372:          ne = (k+1)*size+k+1;

3373:       }

3374:       else

3375:       {

3376:          ns = k*size+rest;

3377:          ne = (k+1)*size+rest;

3378:       }

3379:

3380:       if (option == 1)

3381:       {

3382:          for (i = ns; i < ne; i++)

3383:          {

3384:             l1_norm[i] = 0.0;

3385:             if (cf_marker == NULL)

3386:             {

3387:                /* Add the l1 norm of the diag part of the ith row */

3388:                for (j = A_diag_I[i]; j < A_diag_I[i+1]; j++)

3389:                   l1_norm[i] += fabs(A_diag_data[j]);

3390:                /* Add the l1 norm of the offd part of the ith row */

3391:                if (num_cols_offd)

3392:                {

3393:                   for (j = A_offd_I[i]; j < A_offd_I[i+1]; j++)

3394:                      l1_norm[i] += fabs(A_offd_data[j]);

3395:                }

3396:             }

3397:             else

3398:             {

3399:                cf_diag = cf_marker[i];

3400:                /* Add the CF l1 norm of the diag part of the ith row */

3401:                for (j = A_diag_I[i]; j < A_diag_I[i+1]; j++)

3402:                   if (cf_diag == cf_marker[A_diag_J[j]])

3403:                      l1_norm[i] += fabs(A_diag_data[j]);

3404:                /* Add the CF l1 norm of the offd part of the ith row */

3405:                if (num_cols_offd)

3406:                {

3407:                   for (j = A_offd_I[i]; j < A_offd_I[i+1]; j++)

3408:                      if (cf_diag == cf_marker_offd[A_offd_J[j]])

3409:                         l1_norm[i] += fabs(A_offd_data[j]);

[...]

3416:          for (i = ns; i < ne; i++)

3417:          {

3418:             l1_norm[i] = 0.0;

3419:             if (cf_marker == NULL)

3420:             {

3421:                /* Add the diagonal and the local off-thread part of the ith row */

3422:                for (j = A_diag_I[i]; j < A_diag_I[i+1]; j++)

3423:                {

3424:                   ii = A_diag_J[j];

3425:                   if (ii == i || ii < ns || ii >= ne)

3426:                      l1_norm[i] += fabs(A_diag_data[j]);

3427:                }

3428:                /* Add the l1 norm of the offd part of the ith row */

3429:                if (num_cols_offd)

3430:                {

3431:                   for (j = A_offd_I[i]; j < A_offd_I[i+1]; j++)

3432:                      l1_norm[i] += fabs(A_offd_data[j]);

3433:                }

3434:             }

3435:             else

3436:             {

3437:                cf_diag = cf_marker[i];

3438:                /* Add the diagonal and the local off-thread part of the ith row */

3439:                for (j = A_diag_I[i]; j < A_diag_I[i+1]; j++)

3440:                {

3441:                   ii = A_diag_J[j];

3442:                   if ((ii == i || ii < ns || ii >= ne) &&

3443:                       (cf_diag == cf_marker[A_diag_J[j]]))

3444:                      l1_norm[i] += fabs(A_diag_data[j]);

3445:                }

3446:                /* Add the CF l1 norm of the offd part of the ith row */

3447:                if (num_cols_offd)

3448:                {

3449:                   for (j = A_offd_I[i]; j < A_offd_I[i+1]; j++)

3450:                      if (cf_diag == cf_marker_offd[A_offd_J[j]])

3451:                         l1_norm[i] += fabs(A_offd_data[j]);

[...]

3458:          for (i = ns; i < ne; i++)

3459:          {

3460:             l1_norm[i] = 0.0;

3461:             for (j = A_diag_I[i]; j < A_diag_I[i+1]; j++)

3462:                l1_norm[i] += A_diag_data[j] * A_diag_data[j];

3463:             if (num_cols_offd)

3464:                for (j = A_offd_I[i]; j < A_offd_I[i+1]; j++)

3465:                   l1_norm[i] += A_offd_data[j] * A_offd_data[j];

3466:          }

3467:       }

3468:       else if (option == 4)

3469:       {

3470:          for (i = ns; i < ne; i++)

3471:          {

3472:             l1_norm[i] = 0.0;

3473:             if (cf_marker == NULL)

3474:             {

3475:                /* Add the diagonal and the local off-thread part of the ith row */

3476:                for (j = A_diag_I[i]; j < A_diag_I[i+1]; j++)

3477:                {

3478:                   ii = A_diag_J[j];

3479:                   if (ii == i || ii < ns || ii >= ne)

[...]

3487:                         l1_norm[i] += 0.5*fabs(A_diag_data[j]);

3488:                   }

3489:                }

3490:                /* Add the l1 norm of the offd part of the ith row */

3491:                if (num_cols_offd)

3492:                {

3493:                   for (j = A_offd_I[i]; j < A_offd_I[i+1]; j++)

3494:                      l1_norm[i] += 0.5*fabs(A_offd_data[j]);

3495:                }

3496:             }

3497:             else

3498:             {

3499:                cf_diag = cf_marker[i];

3500:                /* Add the diagonal and the local off-thread part of the ith row */

3501:                for (j = A_diag_I[i]; j < A_diag_I[i+1]; j++)

3502:                {

3503:                   ii = A_diag_J[j];

3504:                   if ((ii == i || ii < ns || ii >= ne) &&

3505:                       (cf_diag == cf_marker[A_diag_J[j]]))

3506:                   {

3507:                      if (ii == i)

3508:                      {

3509:                         diag = fabs(A_diag_data[j]);

3510:                         l1_norm[i] += fabs(A_diag_data[j]);

3511:                      }

3512:                      else

3513:                         l1_norm[i] += 0.5*fabs(A_diag_data[j]);

3514:                   }

3515:                }

3516:                /* Add the CF l1 norm of the offd part of the ith row */

3517:                if (num_cols_offd)

3518:                {

3519:                   for (j = A_offd_I[i]; j < A_offd_I[i+1]; j++)

3520:                      if (cf_diag == cf_marker_offd[A_offd_J[j]])

3521:                         l1_norm[i] += 0.5*fabs(A_offd_data[j]);

3522:                }

3523:             }

3524:

3525:             /* Truncate according to Remark 6.2 */

3526:             if (l1_norm[i] <= 4.0/3.0*diag)

3527:                l1_norm[i] = diag;

3528:          }

3529:       }

3530:

3531:       /* Handle negative definite matrices */

3532:       for (i = ns; i < ne; i++)

3533:          if (A_diag_data[A_diag_I[i]] < 0)

3534:             l1_norm[i] = -l1_norm[i];

3535:

3536:       for (i = ns; i < ne; i++)

3537:          /* if (fabs(l1_norm[i]) < DBL_EPSILON) */

3538:          if (fabs(l1_norm[i]) == 0.0)

3539:          {

3540:             hypre_error_in_arg(1);

0x4cb6b0 PUSH	%RBP

0x4cb6b1 MOV	%RSP,%RBP

0x4cb6b4 PUSH	%R15

0x4cb6b6 PUSH	%R14

0x4cb6b8 PUSH	%R13

0x4cb6ba PUSH	%R12

0x4cb6bc PUSH	%RBX

0x4cb6bd SUB	$0x118,%RSP

0x4cb6c4 MOV	0x50(%RBP),%RBX

0x4cb6c8 MOV	0x48(%RBP),%RAX

0x4cb6cc MOV	%RAX,-0x30(%RBP)

0x4cb6d0 MOV	0x40(%RBP),%RAX

0x4cb6d4 MOV	%RAX,-0x98(%RBP)

0x4cb6db MOV	0x38(%RBP),%RAX

0x4cb6df MOV	%RAX,-0x50(%RBP)

0x4cb6e3 MOV	0x30(%RBP),%RAX

0x4cb6e7 MOV	%RAX,-0xc8(%RBP)

0x4cb6ee MOV	0x28(%RBP),%RAX

0x4cb6f2 MOV	%RAX,-0xa0(%RBP)

0x4cb6f9 MOV	0x20(%RBP),%R12

0x4cb6fd MOV	0x18(%RBP),%R15

0x4cb701 MOV	0x10(%RBP),%R14

0x4cb705 MOVL	$0,-0xf0(%RBP)

0x4cb70f MOV	%R9,%R13

0x4cb712 MOV	%RCX,-0x70(%RBP)

0x4cb716 MOV	%RDX,-0xd0(%RBP)

0x4cb71d MOV	%R8,-0x38(%RBP)

0x4cb721 MOV	(%RDI),%ESI

0x4cb723 MOVQ	$0,-0x108(%RBP)

0x4cb72e MOVQ	$0x1,-0x138(%RBP)

0x4cb739 SUB	$0x8,%RSP

0x4cb73d LEA	-0x138(%RBP),%RAX

0x4cb744 LEA	-0xf0(%RBP),%RCX

0x4cb74b LEA	-0x108(%RBP),%R8

0x4cb752 LEA	0x60(%RBP),%R9

0x4cb756 MOV	$0x55f910,%EDI

0x4cb75b MOV	%ESI,-0xec(%RBP)

0x4cb761 MOV	$0x22,%EDX

0x4cb766 PUSH	$0x1

0x4cb768 PUSH	$0x1

0x4cb76a PUSH	%RAX

0x4cb76b CALL	410430 <__kmpc_for_static_init_8@plt>

0x4cb770 MOV	%R14,%R9

0x4cb773 MOV	-0x30(%RBP),%RDI

0x4cb777 MOV	-0x50(%RBP),%R14

0x4cb77b ADD	$0x20,%RSP

0x4cb77f MOV	-0x108(%RBP),%RCX

0x4cb786 MOV	0x60(%RBP),%RAX

0x4cb78a MOV	%RAX,-0x130(%RBP)

0x4cb791 MOV	%RCX,-0xe0(%RBP)

0x4cb798 CMP	%RAX,%RCX

0x4cb79b JBE	4cb800

0x4cb79d MOV	$0x55f930,%EDI

0x4cb7a2 MOV	-0xec(%RBP),%ESI

0x4cb7a8 ADD	$0x118,%RSP

0x4cb7af POP	%RBX

0x4cb7b0 POP	%R12

0x4cb7b2 POP	%R13

0x4cb7b4 POP	%R14

0x4cb7b6 POP	%R15

0x4cb7b8 POP	%RBP

0x4cb7b9 VZEROUPPER

0x4cb7bc JMP	410180

0x4cb7c1 NOPW	%CS:(%RAX,%RAX,1)

0x4cb7d0 NOPW	%CS:(%RAX,%RAX,1)

0x4cb7df NOPW	%CS:(%RAX,%RAX,1)

0x4cb7ee NOPW	%CS:(%RAX,%RAX,1)

0x4cb7fd NOPL	(%RAX)

0x4cb800 MOV	%R13,%RAX

0x4cb803 MOV	%R13,%RCX

0x4cb806 MOV	-0x70(%RBP),%R13

0x4cb80a OR	%R13,%RCX

0x4cb80d SHR	$0x20,%RCX

0x4cb811 MOV	-0xd0(%RBP),%RCX

0x4cb818 JE	4cb840

0x4cb81a CQTO

0x4cb81c IDIV	%R13

0x4cb81f JMP	4cb845

0x4cb821 NOPW	%CS:(%RAX,%RAX,1)

0x4cb830 NOPW	%CS:(%RAX,%RAX,1)

0x4cb83f NOP

0x4cb840 XOR	%EDX,%EDX

0x4cb842 DIV	%R13D

0x4cb845 LEA	0x1(%RAX),%RSI

0x4cb849 MOV	%RSI,-0x120(%RBP)

0x4cb850 LEA	0x8(%R12),%RSI

0x4cb855 MOV	%RSI,-0x118(%RBP)

0x4cb85c LEA	0x8(%R15),%RSI

0x4cb860 MOV	%RSI,-0x110(%RBP)

0x4cb867 MOV	-0xe0(%RBP),%RSI

0x4cb86e IMUL	%RAX,%RSI

0x4cb872 LEA	0x10(%R9,%RSI,8),%R11

0x4cb877 LEA	(,%RAX,8),%R8

0x4cb87f MOV	%R8,-0x128(%RBP)

0x4cb886 LEA	0x10(%RDI,%RSI,8),%R8

0x4cb88b MOV	%R8,-0xb0(%RBP)

0x4cb892 LEA	(%RDI,%RSI,8),%R8

0x4cb896 MOV	%R8,-0xc0(%RBP)

0x4cb89d LEA	(%R9,%RSI,8),%RSI

0x4cb8a1 MOV	%RSI,-0x100(%RBP)

0x4cb8a8 DEC	%RCX

0x4cb8ab MOV	%RCX,-0xd0(%RBP)

0x4cb8b2 VXORPD	%XMM3,%XMM3,%XMM3

0x4cb8b6 VMOVDDUP	0x5f302(%RIP),%XMM4

0x4cb8be VMOVDDUP	0x5f7b2(%RIP),%XMM5

0x4cb8c6 VBROADCASTSD	0x5f7a9(%RIP),%YMM6

0x4cb8cf VMOVSD	0x5f2d1(%RIP),%XMM7

0x4cb8d7 VBROADCASTSD	0x5f2c8(%RIP),%YMM8

0x4cb8e0 VMOVSD	0x5f2d0(%RIP),%XMM9

0x4cb8e8 MOV	%R9,-0x80(%RBP)

0x4cb8ec MOV	%RBX,-0x58(%RBP)

0x4cb8f0 MOV	%RDX,-0xf8(%RBP)

0x4cb8f7 MOV	%RAX,-0x78(%RBP)

0x4cb8fb MOV	%RAX,%RCX

0x4cb8fe JMP	4cb9e3

0x4cb903 NOPW	%CS:(%RAX,%RAX,1)

0x4cb912 NOPW	%CS:(%RAX,%RAX,1)

0x4cb921 NOPW	%CS:(%RAX,%RAX,1)

0x4cb930 NOPW	%CS:(%RAX,%RAX,1)

0x4cb93f NOP

(3144) 0x4cb940 MOV	$0x5396a0,%EDI

(3144) 0x4cb945 MOV	$0xdd4,%ESI

(3144) 0x4cb94a MOV	$0xc,%EDX

(3144) 0x4cb94f XOR	%ECX,%ECX

(3144) 0x4cb951 VMOVUPD	%XMM10,-0x70(%RBP)

(3144) 0x4cb956 VZEROUPPER

(3144) 0x4cb959 CALL	51ec00 <hypre_error_handler>

(3144) 0x4cb95e VMOVUPD	-0x70(%RBP),%XMM10

(3144) 0x4cb963 VMOVSD	0x5f24d(%RIP),%XMM9

(3144) 0x4cb96b VBROADCASTSD	0x5f234(%RIP),%YMM8

(3144) 0x4cb974 VMOVSD	0x5f22c(%RIP),%XMM7

(3144) 0x4cb97c VBROADCASTSD	0x5f6f3(%RIP),%YMM6

(3144) 0x4cb985 VMOVDDUP	0x5f6eb(%RIP),%XMM5

(3144) 0x4cb98d VMOVDDUP	0x5f22b(%RIP),%XMM4

(3144) 0x4cb995 VXORPD	%XMM3,%XMM3,%XMM3

(3144) 0x4cb999 MOV	-0x48(%RBP),%R11

(3144) 0x4cb99d MOV	-0xf8(%RBP),%RDX

(3144) 0x4cb9a4 MOV	-0x80(%RBP),%R9

(3144) 0x4cb9a8 MOV	-0x30(%RBP),%RDI

(3144) 0x4cb9ac MOV	-0x128(%RBP),%RAX

(3144) 0x4cb9b3 ADD	%RAX,%R11

(3144) 0x4cb9b6 ADD	%RAX,-0xb0(%RBP)

(3144) 0x4cb9bd ADD	%RAX,-0xc0(%RBP)

(3144) 0x4cb9c4 ADD	%RAX,-0x100(%RBP)

(3144) 0x4cb9cb MOV	-0xe8(%RBP),%RAX

(3144) 0x4cb9d2 CMP	-0x130(%RBP),%RAX

(3144) 0x4cb9d9 MOV	-0x78(%RBP),%RCX

(3144) 0x4cb9dd JE	4cb79d

(3144) 0x4cb9e3 MOV	-0xe0(%RBP),%R10

(3144) 0x4cb9ea CMP	%R10,%RDX

(3144) 0x4cb9ed MOV	%R10,%RAX

(3144) 0x4cb9f0 CMOVL	%RDX,%RAX

(3144) 0x4cb9f4 MOV	%RAX,-0xb8(%RBP)

(3144) 0x4cb9fb LEA	0x1(%R10),%R13

(3144) 0x4cb9ff CMP	%RDX,%R10

(3144) 0x4cba02 MOV	-0xd0(%RBP),%RSI

(3144) 0x4cba09 JGE	4cba40

(3144) 0x4cba0b MOV	-0x120(%RBP),%RAX

(3144) 0x4cba12 IMUL	%R10,%RAX

(3144) 0x4cba16 MOV	%RAX,-0xa8(%RBP)

(3144) 0x4cba1d MOV	%R13,%RAX

(3144) 0x4cba20 JMP	4cba54

0x4cba22 NOPW	%CS:(%RAX,%RAX,1)

0x4cba31 NOPW	%CS:(%RAX,%RAX,1)

(3144) 0x4cba40 MOV	%RCX,%RAX

(3144) 0x4cba43 IMUL	%R10,%RAX

(3144) 0x4cba47 ADD	%RDX,%RAX

(3144) 0x4cba4a MOV	%RAX,-0xa8(%RBP)

(3144) 0x4cba51 MOV	%RDX,%RAX

(3144) 0x4cba54 MOV	-0x38(%RBP),%R8

(3144) 0x4cba58 MOV	%R13,-0xe0(%RBP)

(3144) 0x4cba5f IMUL	%RCX,%R13

(3144) 0x4cba63 MOV	%RAX,%RCX

(3144) 0x4cba66 MOV	%RAX,-0x88(%RBP)

(3144) 0x4cba6d ADD	%RAX,%R13

(3144) 0x4cba70 MOV	%R13,-0x70(%RBP)

(3144) 0x4cba74 CMP	$0x3,%RSI

(3144) 0x4cba78 MOV	%R11,-0x48(%RBP)

(3144) 0x4cba7c MOV	%R10,-0xe8(%RBP)

(3144) 0x4cba83 JA	4ce1d0

0x4cba89 JMP	0x538d60(,%RSI,8)

0x4cba90 MOV	-0x70(%RBP),%RAX

0x4cba94 CMP	%RAX,-0xa8(%RBP)

0x4cba9b JGE	4ce1d0

0x4cbaa1 CMP	%RDX,%R10

0x4cbaa4 MOV	%RDX,%RAX

0x4cbaa7 CMOVL	%R10,%RAX

0x4cbaab MOV	-0x78(%RBP),%RDX

0x4cbaaf MOV	%RAX,-0x90(%RBP)

0x4cbab6 SUB	%RAX,%RDX

0x4cbab9 MOV	-0x88(%RBP),%RCX

0x4cbac0 LEA	-0x1(%RDX,%RCX,1),%RAX

0x4cbac5 MOV	%RAX,-0x40(%RBP)

0x4cbac9 TEST	%R8,%R8

0x4cbacc MOV	-0xc8(%RBP),%R13

0x4cbad3 JE	4cd180

0x4cbad9 CMPQ	$0,-0x98(%RBP)

0x4cbae1 JE	4cd8c0

0x4cbae7 MOV	-0x78(%RBP),%RAX

0x4cbaeb IMUL	%R10,%RAX

0x4cbaef ADD	%RAX,-0x90(%RBP)

0x4cbaf6 XOR	%ECX,%ECX

0x4cbaf8 JMP	4cbb12

0x4cbafa NOPW	(%RAX,%RAX,1)

(3199) 0x4cbb00 CMP	-0x40(%RBP),%RCX

(3199) 0x4cbb04 LEA	0x1(%RCX),%RCX

(3199) 0x4cbb08 MOV	-0x80(%RBP),%R9

(3199) 0x4cbb0c JE	4cdb00

(3199) 0x4cbb12 MOV	-0x90(%RBP),%RAX

(3199) 0x4cbb19 LEA	(%RAX,%RCX,1),%RDX

(3199) 0x4cbb1d MOVQ	$0,(%RDI,%RDX,8)

(3199) 0x4cbb25 MOV	(%R9,%RDX,8),%RAX

(3199) 0x4cbb29 MOV	0x8(%R9,%RDX,8),%R10

(3199) 0x4cbb2e MOV	(%R8,%RDX,8),%R9

(3199) 0x4cbb32 VXORPD	%XMM0,%XMM0,%XMM0

(3199) 0x4cbb36 MOV	%R10,%R11

(3199) 0x4cbb39 SUB	%RAX,%R11

(3199) 0x4cbb3c JLE	4cbd08

(3199) 0x4cbb42 CMP	$0x4,%R11

(3199) 0x4cbb46 JAE	4cbbc0

(3199) 0x4cbb4c MOV	%R11,%RSI

(3199) 0x4cbb4f AND	$-0x4,%RSI

(3199) 0x4cbb53 CMP	%R11,%RSI

(3199) 0x4cbb56 JAE	4cbd00

(3199) 0x4cbb5c ADD	%RSI,%RAX

(3199) 0x4cbb5f MOV	-0x50(%RBP),%R14

(3199) 0x4cbb63 MOV	-0x38(%RBP),%R8

(3199) 0x4cbb67 JMP	4cbb8c

0x4cbb69 NOPW	%CS:(%RAX,%RAX,1)

0x4cbb78 NOPL	(%RAX,%RAX,1)

  (3202) 0x4cbb80 INC	%RAX

  (3202) 0x4cbb83 CMP	%RAX,%R10

  (3202) 0x4cbb86 JE	4cbd08

  (3202) 0x4cbb8c MOV	(%R15,%RAX,8),%RSI

  (3202) 0x4cbb90 CMP	(%R8,%RSI,8),%R9

  (3202) 0x4cbb94 JNE	4cbb80

  (3202) 0x4cbb96 VMOVSD	(%R12,%RAX,8),%XMM1

  (3202) 0x4cbb9c VANDPD	%XMM5,%XMM1,%XMM1

  (3202) 0x4cbba0 VADDSD	%XMM1,%XMM0,%XMM0

  (3202) 0x4cbba4 VMOVSD	%XMM0,(%RDI,%RDX,8)

  (3202) 0x4cbba9 JMP	4cbb80

0x4cbbab NOPW	%CS:(%RAX,%RAX,1)

0x4cbbba NOPW	(%RAX,%RAX,1)

(3199) 0x4cbbc0 MOV	%R11,%R14

(3199) 0x4cbbc3 SHR	$0x2,%R14

(3199) 0x4cbbc7 LEA	0x18(,%RAX,8),%R8

(3199) 0x4cbbcf JMP	4cbc11

0x4cbbd1 NOPW	%CS:(%RAX,%RAX,1)

0x4cbbe0 NOPW	%CS:(%RAX,%RAX,1)

0x4cbbef NOPW	%CS:(%RAX,%RAX,1)

0x4cbbfe XCHG	%AX,%AX

  (3203) 0x4cbc00 MOV	-0x58(%RBP),%RBX

  (3203) 0x4cbc04 ADD	$0x20,%R8

  (3203) 0x4cbc08 DEC	%R14

  (3203) 0x4cbc0b JE	4cbb4c

  (3203) 0x4cbc11 MOV	-0x18(%R15,%R8,1),%RSI

  (3203) 0x4cbc16 MOV	-0x38(%RBP),%RBX

  (3203) 0x4cbc1a CMP	(%RBX,%RSI,8),%R9

  (3203) 0x4cbc1e JNE	4cbc80

  (3203) 0x4cbc20 VMOVSD	-0x18(%R12,%R8,1),%XMM1

  (3203) 0x4cbc27 VANDPD	%XMM5,%XMM1,%XMM1

  (3203) 0x4cbc2b VADDSD	%XMM1,%XMM0,%XMM0

  (3203) 0x4cbc2f VMOVSD	%XMM0,(%RDI,%RDX,8)

  (3203) 0x4cbc34 MOV	-0x10(%R15,%R8,1),%RSI

  (3203) 0x4cbc39 MOV	-0x38(%RBP),%RBX

  (3203) 0x4cbc3d CMP	(%RBX,%RSI,8),%R9

  (3203) 0x4cbc41 JE	4cbc8f

  (3203) 0x4cbc43 MOV	-0x8(%R15,%R8,1),%RSI

  (3203) 0x4cbc48 MOV	-0x38(%RBP),%RBX

  (3203) 0x4cbc4c CMP	(%RBX,%RSI,8),%R9

  (3203) 0x4cbc50 JNE	4cbcb2

  (3203) 0x4cbc52 VMOVSD	-0x8(%R12,%R8,1),%XMM1

  (3203) 0x4cbc59 VANDPD	%XMM5,%XMM1,%XMM1

  (3203) 0x4cbc5d VADDSD	%XMM1,%XMM0,%XMM0

  (3203) 0x4cbc61 VMOVSD	%XMM0,(%RDI,%RDX,8)

  (3203) 0x4cbc66 MOV	(%R15,%R8,1),%RSI

  (3203) 0x4cbc6a MOV	-0x38(%RBP),%RBX

  (3203) 0x4cbc6e CMP	(%RBX,%RSI,8),%R9

  (3203) 0x4cbc72 JNE	4cbc00

  (3203) 0x4cbc74 JMP	4cbcc4

0x4cbc76 NOPW	%CS:(%RAX,%RAX,1)

  (3203) 0x4cbc80 MOV	-0x10(%R15,%R8,1),%RSI

  (3203) 0x4cbc85 MOV	-0x38(%RBP),%RBX

  (3203) 0x4cbc89 CMP	(%RBX,%RSI,8),%R9

  (3203) 0x4cbc8d JNE	4cbc43

  (3203) 0x4cbc8f VMOVSD	-0x10(%R12,%R8,1),%XMM1

  (3203) 0x4cbc96 VANDPD	%XMM5,%XMM1,%XMM1

  (3203) 0x4cbc9a VADDSD	%XMM1,%XMM0,%XMM0

  (3203) 0x4cbc9e VMOVSD	%XMM0,(%RDI,%RDX,8)

  (3203) 0x4cbca3 MOV	-0x8(%R15,%R8,1),%RSI

  (3203) 0x4cbca8 MOV	-0x38(%RBP),%RBX

  (3203) 0x4cbcac CMP	(%RBX,%RSI,8),%R9

  (3203) 0x4cbcb0 JE	4cbc52

  (3203) 0x4cbcb2 MOV	(%R15,%R8,1),%RSI

  (3203) 0x4cbcb6 MOV	-0x38(%RBP),%RBX

  (3203) 0x4cbcba CMP	(%RBX,%RSI,8),%R9

  (3203) 0x4cbcbe JNE	4cbc00

  (3203) 0x4cbcc4 VMOVSD	(%R12,%R8,1),%XMM1

  (3203) 0x4cbcca VANDPD	%XMM5,%XMM1,%XMM1

  (3203) 0x4cbcce VADDSD	%XMM1,%XMM0,%XMM0

  (3203) 0x4cbcd2 VMOVSD	%XMM0,(%RDI,%RDX,8)

  (3203) 0x4cbcd7 JMP	4cbc00

0x4cbcdc NOPW	%CS:(%RAX,%RAX,1)

0x4cbceb NOPW	%CS:(%RAX,%RAX,1)

0x4cbcfa NOPW	(%RAX,%RAX,1)

(3199) 0x4cbd00 MOV	-0x50(%RBP),%R14

(3199) 0x4cbd04 MOV	-0x38(%RBP),%R8

(3199) 0x4cbd08 MOV	-0xa0(%RBP),%RSI

(3199) 0x4cbd0f MOV	(%RSI,%RDX,8),%RAX

(3199) 0x4cbd13 MOV	0x8(%RSI,%RDX,8),%R10

(3199) 0x4cbd18 MOV	%R10,%R11

(3199) 0x4cbd1b SUB	%RAX,%R11

(3199) 0x4cbd1e JLE	4cbb00

(3199) 0x4cbd24 CMP	$0x4,%R11

(3199) 0x4cbd28 JAE	4cbdc0

(3199) 0x4cbd2e MOV	%R11,%RSI

(3199) 0x4cbd31 AND	$-0x4,%RSI

(3199) 0x4cbd35 CMP	%R11,%RSI

(3199) 0x4cbd38 MOV	-0x50(%RBP),%R14

(3199) 0x4cbd3c MOV	-0x38(%RBP),%R8

(3199) 0x4cbd40 JAE	4cbb00

(3199) 0x4cbd46 ADD	%RSI,%RAX

(3199) 0x4cbd49 JMP	4cbd8c

0x4cbd4b NOPW	%CS:(%RAX,%RAX,1)

0x4cbd5a NOPW	%CS:(%RAX,%RAX,1)

0x4cbd69 NOPW	%CS:(%RAX,%RAX,1)

0x4cbd78 NOPL	(%RAX,%RAX,1)

  (3200) 0x4cbd80 INC	%RAX

  (3200) 0x4cbd83 CMP	%RAX,%R10

  (3200) 0x4cbd86 JE	4cbb00

  (3200) 0x4cbd8c MOV	(%R13,%RAX,8),%RSI

  (3200) 0x4cbd91 CMP	(%RBX,%RSI,8),%R9

  (3200) 0x4cbd95 JNE	4cbd80

  (3200) 0x4cbd97 VMOVSD	(%R14,%RAX,8),%XMM1

  (3200) 0x4cbd9d VANDPD	%XMM5,%XMM1,%XMM1

  (3200) 0x4cbda1 VADDSD	%XMM1,%XMM0,%XMM0

  (3200) 0x4cbda5 VMOVSD	%XMM0,(%RDI,%RDX,8)

  (3200) 0x4cbdaa JMP	4cbd80

0x4cbdac NOPW	%CS:(%RAX,%RAX,1)

0x4cbdbb NOPL	(%RAX,%RAX,1)

(3199) 0x4cbdc0 MOV	%R11,%R14

(3199) 0x4cbdc3 SHR	$0x2,%R14

(3199) 0x4cbdc7 LEA	0x18(,%RAX,8),%R8

(3199) 0x4cbdcf JMP	4cbe0d

0x4cbdd1 NOPW	%CS:(%RAX,%RAX,1)

0x4cbde0 NOPW	%CS:(%RAX,%RAX,1)

0x4cbdef NOPW	%CS:(%RAX,%RAX,1)

0x4cbdfe XCHG	%AX,%AX

  (3201) 0x4cbe00 ADD	$0x20,%R8

  (3201) 0x4cbe04 DEC	%R14

  (3201) 0x4cbe07 JE	4cbd2e

  (3201) 0x4cbe0d MOV	-0x18(%R13,%R8,1),%RSI

  (3201) 0x4cbe12 CMP	(%RBX,%RSI,8),%R9

  (3201) 0x4cbe16 JNE	4cbe80

  (3201) 0x4cbe18 MOV	-0x50(%RBP),%RSI

  (3201) 0x4cbe1c VMOVSD	-0x18(%RSI,%R8,1),%XMM1

  (3201) 0x4cbe23 VANDPD	%XMM5,%XMM1,%XMM1

  (3201) 0x4cbe27 VADDSD	%XMM1,%XMM0,%XMM0

  (3201) 0x4cbe2b VMOVSD	%XMM0,(%RDI,%RDX,8)

  (3201) 0x4cbe30 MOV	-0x10(%R13,%R8,1),%RSI

  (3201) 0x4cbe35 CMP	(%RBX,%RSI,8),%R9

  (3201) 0x4cbe39 JE	4cbe8b

  (3201) 0x4cbe3b MOV	-0x8(%R13,%R8,1),%RSI

  (3201) 0x4cbe40 CMP	(%RBX,%RSI,8),%R9

  (3201) 0x4cbe44 JNE	4cbeae

  (3201) 0x4cbe46 MOV	-0x50(%RBP),%RSI

  (3201) 0x4cbe4a VMOVSD	-0x8(%RSI,%R8,1),%XMM1

  (3201) 0x4cbe51 VANDPD	%XMM5,%XMM1,%XMM1

  (3201) 0x4cbe55 VADDSD	%XMM1,%XMM0,%XMM0

  (3201) 0x4cbe59 VMOVSD	%XMM0,(%RDI,%RDX,8)

  (3201) 0x4cbe5e MOV	(%R13,%R8,1),%RSI

  (3201) 0x4cbe63 CMP	(%RBX,%RSI,8),%R9

  (3201) 0x4cbe67 JNE	4cbe00

  (3201) 0x4cbe69 JMP	4cbebd

0x4cbe6b NOPW	%CS:(%RAX,%RAX,1)

0x4cbe7a NOPW	(%RAX,%RAX,1)

  (3201) 0x4cbe80 MOV	-0x10(%R13,%R8,1),%RSI

  (3201) 0x4cbe85 CMP	(%RBX,%RSI,8),%R9

  (3201) 0x4cbe89 JNE	4cbe3b

  (3201) 0x4cbe8b MOV	-0x50(%RBP),%RSI

  (3201) 0x4cbe8f VMOVSD	-0x10(%RSI,%R8,1),%XMM1

  (3201) 0x4cbe96 VANDPD	%XMM5,%XMM1,%XMM1

  (3201) 0x4cbe9a VADDSD	%XMM1,%XMM0,%XMM0

  (3201) 0x4cbe9e VMOVSD	%XMM0,(%RDI,%RDX,8)

  (3201) 0x4cbea3 MOV	-0x8(%R13,%R8,1),%RSI

  (3201) 0x4cbea8 CMP	(%RBX,%RSI,8),%R9

  (3201) 0x4cbeac JE	4cbe46

  (3201) 0x4cbeae MOV	(%R13,%R8,1),%RSI

  (3201) 0x4cbeb3 CMP	(%RBX,%RSI,8),%R9

  (3201) 0x4cbeb7 JNE	4cbe00

  (3201) 0x4cbebd MOV	-0x50(%RBP),%RSI

  (3201) 0x4cbec1 VMOVSD	(%RSI,%R8,1),%XMM1

  (3201) 0x4cbec7 VANDPD	%XMM5,%XMM1,%XMM1

  (3201) 0x4cbecb VADDSD	%XMM1,%XMM0,%XMM0

  (3201) 0x4cbecf VMOVSD	%XMM0,(%RDI,%RDX,8)

  (3201) 0x4cbed4 JMP	4cbe00

0x4cbed9 NOPW	%CS:(%RAX,%RAX,1)

0x4cbee8 NOPW	%CS:(%RAX,%RAX,1)

0x4cbef7 NOPW	(%RAX,%RAX,1)

0x4cbf00 MOV	-0x70(%RBP),%RAX

0x4cbf04 CMP	%RAX,-0xa8(%RBP)

0x4cbf0b JGE	4ce1d0

0x4cbf11 CMP	%RDX,%R10

0x4cbf14 MOV	%RDX,%RDI

0x4cbf17 CMOVL	%R10,%RDI

0x4cbf1b MOV	-0x78(%RBP),%RDX

0x4cbf1f SUB	%RDI,%RDX

0x4cbf22 MOV	-0x88(%RBP),%RCX

0x4cbf29 LEA	-0x1(%RDX,%RCX,1),%RAX

0x4cbf2e MOV	%RAX,-0x40(%RBP)

0x4cbf32 TEST	%R8,%R8

0x4cbf35 MOV	-0xc8(%RBP),%R13

0x4cbf3c JE	4cd400

0x4cbf42 CMPQ	$0,-0x98(%RBP)

0x4cbf4a JE	4cdb40

0x4cbf50 MOV	-0x78(%RBP),%RAX

0x4cbf54 IMUL	%R10,%RAX

0x4cbf58 ADD	%RAX,%RDI

0x4cbf5b XOR	%ECX,%ECX

0x4cbf5d JMP	4cbf92

0x4cbf5f NOPW	%CS:(%RAX,%RAX,1)

0x4cbf6e NOPW	%CS:(%RAX,%RAX,1)

0x4cbf7d NOPL	(%RAX)

(3180) 0x4cbf80 CMP	-0x40(%RBP),%RCX

(3180) 0x4cbf84 LEA	0x1(%RCX),%RCX

(3180) 0x4cbf88 MOV	-0x80(%RBP),%R9

(3180) 0x4cbf8c JE	4ce1c0

(3180) 0x4cbf92 LEA	(%RDI,%RCX,1),%RDX

(3180) 0x4cbf96 MOV	-0x30(%RBP),%RAX

(3180) 0x4cbf9a MOVQ	$0,(%RAX,%RDX,8)

(3180) 0x4cbfa2 MOV	(%R9,%RDX,8),%R10

(3180) 0x4cbfa6 MOV	0x8(%R9,%RDX,8),%R11

(3180) 0x4cbfab MOV	-0x38(%RBP),%RAX

(3180) 0x4cbfaf MOV	(%RAX,%RDX,8),%R9

(3180) 0x4cbfb3 VXORPD	%XMM0,%XMM0,%XMM0

(3180) 0x4cbfb7 MOV	%R11,%R8

(3180) 0x4cbfba SUB	%R10,%R8

(3180) 0x4cbfbd JLE	4cc204

(3180) 0x4cbfc3 CMP	$0x4,%R8

(3180) 0x4cbfc7 JAE	4cc080

(3180) 0x4cbfcd MOV	%R8,%RAX

(3180) 0x4cbfd0 AND	$-0x4,%RAX

(3180) 0x4cbfd4 CMP	%R8,%RAX

(3180) 0x4cbfd7 JAE	4cc200

(3180) 0x4cbfdd ADD	%RAX,%R10

(3180) 0x4cbfe0 MOV	-0x50(%RBP),%R14

(3180) 0x4cbfe4 JMP	4cc00c

0x4cbfe6 NOPW	%CS:(%RAX,%RAX,1)

0x4cbff5 NOPW	%CS:(%RAX,%RAX,1)

  (3183) 0x4cc000 INC	%R10

  (3183) 0x4cc003 CMP	%R10,%R11

  (3183) 0x4cc006 JE	4cc204

  (3183) 0x4cc00c MOV	(%R15,%R10,8),%RAX

  (3183) 0x4cc010 CMP	%RDX,%RAX

  (3183) 0x4cc013 JE	4cc020

  (3183) 0x4cc015 CMP	%RDI,%RAX

  (3183) 0x4cc018 JL	4cc020

  (3183) 0x4cc01a CMP	-0x70(%RBP),%RAX

  (3183) 0x4cc01e JL	4cc000

  (3183) 0x4cc020 MOV	-0x38(%RBP),%RSI

  (3183) 0x4cc024 CMP	(%RSI,%RAX,8),%R9

  (3183) 0x4cc028 JNE	4cc000

  (3183) 0x4cc02a VMOVSD	(%R12,%R10,8),%XMM1

  (3183) 0x4cc030 VANDPD	%XMM5,%XMM1,%XMM1

  (3183) 0x4cc034 VADDSD	%XMM1,%XMM0,%XMM0

  (3183) 0x4cc038 MOV	-0x30(%RBP),%RAX

  (3183) 0x4cc03c VMOVSD	%XMM0,(%RAX,%RDX,8)

  (3183) 0x4cc041 JMP	4cc000

0x4cc043 NOPW	%CS:(%RAX,%RAX,1)

0x4cc052 NOPW	%CS:(%RAX,%RAX,1)

0x4cc061 NOPW	%CS:(%RAX,%RAX,1)

0x4cc070 NOPW	%CS:(%RAX,%RAX,1)

0x4cc07f NOP

(3180) 0x4cc080 MOV	%R8,%RAX

(3180) 0x4cc083 SHR	$0x2,%RAX

(3180) 0x4cc087 LEA	0x18(,%R10,8),%R14

(3180) 0x4cc08f JMP	4cc0d1

0x4cc091 NOPW	%CS:(%RAX,%RAX,1)

0x4cc0a0 NOPW	%CS:(%RAX,%RAX,1)

0x4cc0af NOPW	%CS:(%RAX,%RAX,1)

0x4cc0be XCHG	%AX,%AX

  (3184) 0x4cc0c0 MOV	-0x58(%RBP),%RBX

  (3184) 0x4cc0c4 ADD	$0x20,%R14

  (3184) 0x4cc0c8 DEC	%RAX

  (3184) 0x4cc0cb JE	4cbfcd

  (3184) 0x4cc0d1 MOV	-0x18(%R15,%R14,1),%RSI

  (3184) 0x4cc0d6 CMP	%RDX,%RSI

  (3184) 0x4cc0d9 JE	4cc0e6

  (3184) 0x4cc0db CMP	%RDI,%RSI

  (3184) 0x4cc0de JL	4cc0e6

  (3184) 0x4cc0e0 CMP	-0x70(%RBP),%RSI

  (3184) 0x4cc0e4 JL	4cc10c

  (3184) 0x4cc0e6 MOV	-0x38(%RBP),%RBX

  (3184) 0x4cc0ea CMP	(%RBX,%RSI,8),%R9

  (3184) 0x4cc0ee JNE	4cc108

  (3184) 0x4cc0f0 VMOVSD	-0x18(%R12,%R14,1),%XMM1

  (3184) 0x4cc0f7 VANDPD	%XMM5,%XMM1,%XMM1

  (3184) 0x4cc0fb VADDSD	%XMM1,%XMM0,%XMM0

  (3184) 0x4cc0ff MOV	-0x30(%RBP),%RSI

  (3184) 0x4cc103 VMOVSD	%XMM0,(%RSI,%RDX,8)

  (3184) 0x4cc108 MOV	-0x58(%RBP),%RBX

  (3184) 0x4cc10c MOV	-0x10(%R15,%R14,1),%RSI

  (3184) 0x4cc111 CMP	%RDX,%RSI

  (3184) 0x4cc114 JE	4cc121

  (3184) 0x4cc116 CMP	%RDI,%RSI

  (3184) 0x4cc119 JL	4cc121

  (3184) 0x4cc11b CMP	-0x70(%RBP),%RSI

  (3184) 0x4cc11f JL	4cc147

  (3184) 0x4cc121 MOV	-0x38(%RBP),%RBX

  (3184) 0x4cc125 CMP	(%RBX,%RSI,8),%R9

  (3184) 0x4cc129 JNE	4cc143

  (3184) 0x4cc12b VMOVSD	-0x10(%R12,%R14,1),%XMM1

  (3184) 0x4cc132 VANDPD	%XMM5,%XMM1,%XMM1

  (3184) 0x4cc136 VADDSD	%XMM1,%XMM0,%XMM0

  (3184) 0x4cc13a MOV	-0x30(%RBP),%RSI

  (3184) 0x4cc13e VMOVSD	%XMM0,(%RSI,%RDX,8)

  (3184) 0x4cc143 MOV	-0x58(%RBP),%RBX

  (3184) 0x4cc147 MOV	-0x8(%R15,%R14,1),%RSI

  (3184) 0x4cc14c CMP	%RDX,%RSI

  (3184) 0x4cc14f JE	4cc15c

  (3184) 0x4cc151 CMP	%RDI,%RSI

  (3184) 0x4cc154 JL	4cc15c

  (3184) 0x4cc156 CMP	-0x70(%RBP),%RSI

  (3184) 0x4cc15a JL	4cc182

  (3184) 0x4cc15c MOV	-0x38(%RBP),%RBX

  (3184) 0x4cc160 CMP	(%RBX,%RSI,8),%R9

  (3184) 0x4cc164 JNE	4cc17e

  (3184) 0x4cc166 VMOVSD	-0x8(%R12,%R14,1),%XMM1

  (3184) 0x4cc16d VANDPD	%XMM5,%XMM1,%XMM1

  (3184) 0x4cc171 VADDSD	%XMM1,%XMM0,%XMM0

  (3184) 0x4cc175 MOV	-0x30(%RBP),%RSI

  (3184) 0x4cc179 VMOVSD	%XMM0,(%RSI,%RDX,8)

  (3184) 0x4cc17e MOV	-0x58(%RBP),%RBX

  (3184) 0x4cc182 MOV	(%R15,%R14,1),%RSI

  (3184) 0x4cc186 CMP	%RDX,%RSI

  (3184) 0x4cc189 JE	4cc19a

  (3184) 0x4cc18b CMP	%RDI,%RSI

  (3184) 0x4cc18e JL	4cc19a

  (3184) 0x4cc190 CMP	-0x70(%RBP),%RSI

  (3184) 0x4cc194 JL	4cc0c4

  (3184) 0x4cc19a MOV	-0x38(%RBP),%RBX

  (3184) 0x4cc19e CMP	(%RBX,%RSI,8),%R9

  (3184) 0x4cc1a2 JNE	4cc0c0

  (3184) 0x4cc1a8 VMOVSD	(%R12,%R14,1),%XMM1

  (3184) 0x4cc1ae VANDPD	%XMM5,%XMM1,%XMM1

  (3184) 0x4cc1b2 VADDSD	%XMM1,%XMM0,%XMM0

  (3184) 0x4cc1b6 MOV	-0x30(%RBP),%RSI

  (3184) 0x4cc1ba VMOVSD	%XMM0,(%RSI,%RDX,8)

  (3184) 0x4cc1bf JMP	4cc0c0

0x4cc1c4 NOPW	%CS:(%RAX,%RAX,1)

0x4cc1d3 NOPW	%CS:(%RAX,%RAX,1)

0x4cc1e2 NOPW	%CS:(%RAX,%RAX,1)

0x4cc1f1 NOPW	%CS:(%RAX,%RAX,1)

(3180) 0x4cc200 MOV	-0x50(%RBP),%R14

(3180) 0x4cc204 MOV	-0xa0(%RBP),%RSI

(3180) 0x4cc20b MOV	(%RSI,%RDX,8),%RAX

(3180) 0x4cc20f MOV	0x8(%RSI,%RDX,8),%R8

(3180) 0x4cc214 MOV	%R8,%R10

(3180) 0x4cc217 SUB	%RAX,%R10

(3180) 0x4cc21a MOV	-0x48(%RBP),%R11

(3180) 0x4cc21e JLE	4cbf80

(3180) 0x4cc224 CMP	$0x4,%R10

(3180) 0x4cc228 JAE	4cc2c0

(3180) 0x4cc22e MOV	%R10,%RSI

(3180) 0x4cc231 AND	$-0x4,%RSI

(3180) 0x4cc235 CMP	%R10,%RSI

(3180) 0x4cc238 MOV	-0x50(%RBP),%R14

(3180) 0x4cc23c MOV	-0x48(%RBP),%R11

(3180) 0x4cc240 JAE	4cbf80

(3180) 0x4cc246 ADD	%RSI,%RAX

(3180) 0x4cc249 JMP	4cc28c

0x4cc24b NOPW	%CS:(%RAX,%RAX,1)

0x4cc25a NOPW	%CS:(%RAX,%RAX,1)

0x4cc269 NOPW	%CS:(%RAX,%RAX,1)

0x4cc278 NOPL	(%RAX,%RAX,1)

  (3181) 0x4cc280 INC	%RAX

  (3181) 0x4cc283 CMP	%RAX,%R8

  (3181) 0x4cc286 JE	4cbf80

  (3181) 0x4cc28c MOV	(%R13,%RAX,8),%RSI

  (3181) 0x4cc291 CMP	(%RBX,%RSI,8),%R9

  (3181) 0x4cc295 JNE	4cc280

  (3181) 0x4cc297 VMOVSD	(%R14,%RAX,8),%XMM1

  (3181) 0x4cc29d VANDPD	%XMM5,%XMM1,%XMM1

  (3181) 0x4cc2a1 VADDSD	%XMM1,%XMM0,%XMM0

  (3181) 0x4cc2a5 MOV	-0x30(%RBP),%RSI

  (3181) 0x4cc2a9 VMOVSD	%XMM0,(%RSI,%RDX,8)

  (3181) 0x4cc2ae JMP	4cc280

0x4cc2b0 NOPW	%CS:(%RAX,%RAX,1)

0x4cc2bf NOP

(3180) 0x4cc2c0 MOV	%R10,%R11

(3180) 0x4cc2c3 SHR	$0x2,%R11

(3180) 0x4cc2c7 LEA	0x18(,%RAX,8),%R14

(3180) 0x4cc2cf JMP	4cc30d

0x4cc2d1 NOPW	%CS:(%RAX,%RAX,1)

0x4cc2e0 NOPW	%CS:(%RAX,%RAX,1)

0x4cc2ef NOPW	%CS:(%RAX,%RAX,1)

0x4cc2fe XCHG	%AX,%AX

  (3182) 0x4cc300 ADD	$0x20,%R14

  (3182) 0x4cc304 DEC	%R11

  (3182) 0x4cc307 JE	4cc22e

  (3182) 0x4cc30d MOV	-0x18(%R13,%R14,1),%RSI

  (3182) 0x4cc312 CMP	(%RBX,%RSI,8),%R9

  (3182) 0x4cc316 JNE	4cc380

  (3182) 0x4cc318 MOV	-0x50(%RBP),%RSI

  (3182) 0x4cc31c VMOVSD	-0x18(%RSI,%R14,1),%XMM1

  (3182) 0x4cc323 VANDPD	%XMM5,%XMM1,%XMM1

  (3182) 0x4cc327 VADDSD	%XMM1,%XMM0,%XMM0

  (3182) 0x4cc32b MOV	-0x30(%RBP),%RSI

  (3182) 0x4cc32f VMOVSD	%XMM0,(%RSI,%RDX,8)

  (3182) 0x4cc334 MOV	-0x10(%R13,%R14,1),%RSI

  (3182) 0x4cc339 CMP	(%RBX,%RSI,8),%R9

  (3182) 0x4cc33d JE	4cc38b

  (3182) 0x4cc33f MOV	-0x8(%R13,%R14,1),%RSI

  (3182) 0x4cc344 CMP	(%RBX,%RSI,8),%R9

  (3182) 0x4cc348 JNE	4cc3b2

  (3182) 0x4cc34a MOV	-0x50(%RBP),%RSI

  (3182) 0x4cc34e VMOVSD	-0x8(%RSI,%R14,1),%XMM1

  (3182) 0x4cc355 VANDPD	%XMM5,%XMM1,%XMM1

  (3182) 0x4cc359 VADDSD	%XMM1,%XMM0,%XMM0

  (3182) 0x4cc35d MOV	-0x30(%RBP),%RSI

  (3182) 0x4cc361 VMOVSD	%XMM0,(%RSI,%RDX,8)

  (3182) 0x4cc366 MOV	(%R13,%R14,1),%RSI

  (3182) 0x4cc36b CMP	(%RBX,%RSI,8),%R9

  (3182) 0x4cc36f JNE	4cc300

  (3182) 0x4cc371 JMP	4cc3c1

0x4cc373 NOPW	%CS:(%RAX,%RAX,1)

  (3182) 0x4cc380 MOV	-0x10(%R13,%R14,1),%RSI

  (3182) 0x4cc385 CMP	(%RBX,%RSI,8),%R9

  (3182) 0x4cc389 JNE	4cc33f

  (3182) 0x4cc38b MOV	-0x50(%RBP),%RSI

  (3182) 0x4cc38f VMOVSD	-0x10(%RSI,%R14,1),%XMM1

  (3182) 0x4cc396 VANDPD	%XMM5,%XMM1,%XMM1

  (3182) 0x4cc39a VADDSD	%XMM1,%XMM0,%XMM0

  (3182) 0x4cc39e MOV	-0x30(%RBP),%RSI

  (3182) 0x4cc3a2 VMOVSD	%XMM0,(%RSI,%RDX,8)

  (3182) 0x4cc3a7 MOV	-0x8(%R13,%R14,1),%RSI

  (3182) 0x4cc3ac CMP	(%RBX,%RSI,8),%R9

  (3182) 0x4cc3b0 JE	4cc34a

  (3182) 0x4cc3b2 MOV	(%R13,%R14,1),%RSI

  (3182) 0x4cc3b7 CMP	(%RBX,%RSI,8),%R9

  (3182) 0x4cc3bb JNE	4cc300

  (3182) 0x4cc3c1 MOV	-0x50(%RBP),%RSI

  (3182) 0x4cc3c5 VMOVSD	(%RSI,%R14,1),%XMM1

  (3182) 0x4cc3cb VANDPD	%XMM5,%XMM1,%XMM1

  (3182) 0x4cc3cf VADDSD	%XMM1,%XMM0,%XMM0

  (3182) 0x4cc3d3 MOV	-0x30(%RBP),%RSI

  (3182) 0x4cc3d7 VMOVSD	%XMM0,(%RSI,%RDX,8)

  (3182) 0x4cc3dc JMP	4cc300

0x4cc3e1 NOPW	%CS:(%RAX,%RAX,1)

0x4cc3f0 NOPW	%CS:(%RAX,%RAX,1)

0x4cc3ff NOP

0x4cc400 MOV	-0x70(%RBP),%RAX

0x4cc404 CMP	%RAX,-0xa8(%RBP)

0x4cc40b JGE	4ce1d0

0x4cc411 CMP	%RDX,%R10

0x4cc414 MOV	%RDX,%R13

0x4cc417 CMOVL	%R10,%R13

0x4cc41b MOV	-0x78(%RBP),%RCX

0x4cc41f MOV	%RCX,%RDX

0x4cc422 SUB	%R13,%RDX

0x4cc425 MOV	-0x88(%RBP),%RAX

0x4cc42c LEA	-0x1(%RDX,%RAX,1),%RSI

0x4cc431 CMPQ	$0,-0x98(%RBP)

0x4cc439 MOV	%RSI,-0x40(%RBP)

0x4cc43d MOV	%RCX,%RAX

0x4cc440 JE	4cd740

0x4cc446 IMUL	%R10,%RAX

0x4cc44a ADD	%RAX,%R13

0x4cc44d XOR	%EDI,%EDI

0x4cc44f JMP	4cc49a

0x4cc451 NOPW	%CS:(%RAX,%RAX,1)

0x4cc460 NOPW	%CS:(%RAX,%RAX,1)

0x4cc46f NOPW	%CS:(%RAX,%RAX,1)

0x4cc47e XCHG	%AX,%AX

(3161) 0x4cc480 VMOVSD	%XMM0,(%R8)

(3161) 0x4cc485 CMP	%RSI,%RDI

(3161) 0x4cc488 LEA	0x1(%RDI),%RDI

(3161) 0x4cc48c MOV	-0x80(%RBP),%R9

(3161) 0x4cc490 MOV	-0x48(%RBP),%R11

(3161) 0x4cc494 JE	4ce1c0

(3161) 0x4cc49a LEA	(%R13,%RDI,1),%RAX

(3161) 0x4cc49f MOV	-0x30(%RBP),%RCX

(3161) 0x4cc4a3 LEA	(%RCX,%RAX,8),%R8

(3161) 0x4cc4a7 MOVQ	$0,(%RCX,%RAX,8)

(3161) 0x4cc4af MOV	(%R9,%RAX,8),%R10

(3161) 0x4cc4b3 MOV	0x8(%R9,%RAX,8),%R9

(3161) 0x4cc4b8 VXORPD	%XMM0,%XMM0,%XMM0

(3161) 0x4cc4bc MOV	%R9,%R14

(3161) 0x4cc4bf SUB	%R10,%R14

(3161) 0x4cc4c2 JLE	4cc5a8

(3161) 0x4cc4c8 LEA	-0x8(%R12,%R9,8),%RCX

(3161) 0x4cc4cd LEA	(%R12,%R10,8),%RDX

(3161) 0x4cc4d1 CMP	%R8,%RCX

(3161) 0x4cc4d4 JB	4cc500

(3161) 0x4cc4d6 CMP	%RDX,%R8

(3161) 0x4cc4d9 JB	4cc500

(3161) 0x4cc4db NOPL	(%RAX,%RAX,1)

  (3167) 0x4cc4e0 VMOVSD	(%R12,%R10,8),%XMM1

  (3167) 0x4cc4e6 VFMADD231SD	%XMM1,%XMM1,%XMM0

  (3167) 0x4cc4eb VMOVSD	%XMM0,(%R8)

  (3167) 0x4cc4f0 INC	%R10

  (3167) 0x4cc4f3 CMP	%R10,%R9

  (3167) 0x4cc4f6 JNE	4cc4e0

(3161) 0x4cc4f8 JMP	4cc5a8

0x4cc4fd NOPL	(%RAX)

(3161) 0x4cc500 MOV	%R14,%R11

(3161) 0x4cc503 AND	$-0x4,%R11

(3161) 0x4cc507 JE	4cc580

(3161) 0x4cc509 LEA	-0x1(%R11),%RCX

(3161) 0x4cc50d VXORPD	%XMM0,%XMM0,%XMM0

(3161) 0x4cc511 XOR	%ESI,%ESI

(3161) 0x4cc513 NOPW	%CS:(%RAX,%RAX,1)

  (3166) 0x4cc520 VMOVUPD	(%RDX,%RSI,8),%YMM1

  (3166) 0x4cc525 VFMADD231PD	%YMM1,%YMM1,%YMM0

  (3166) 0x4cc52a ADD	$0x4,%RSI

  (3166) 0x4cc52e CMP	%RCX,%RSI

  (3166) 0x4cc531 JBE	4cc520

(3161) 0x4cc533 VEXTRACTF128	$0x1,%YMM0,%XMM1

(3161) 0x4cc539 VADDPD	%XMM1,%XMM0,%XMM0

(3161) 0x4cc53d VSHUFPD	$0x1,%XMM0,%XMM0,%XMM1

(3161) 0x4cc542 VADDSD	%XMM1,%XMM0,%XMM0

(3161) 0x4cc546 CMP	%R11,%R14

(3161) 0x4cc549 MOV	-0x40(%RBP),%RSI

(3161) 0x4cc54d JNE	4cc583

(3161) 0x4cc54f JMP	4cc5a3

0x4cc551 NOPW	%CS:(%RAX,%RAX,1)

0x4cc560 NOPW	%CS:(%RAX,%RAX,1)

0x4cc56f NOPW	%CS:(%RAX,%RAX,1)

0x4cc57e XCHG	%AX,%AX

(3161) 0x4cc580 XOR	%R11D,%R11D

(3161) 0x4cc583 ADD	%R10,%R11

(3161) 0x4cc586 NOPW	%CS:(%RAX,%RAX,1)

  (3165) 0x4cc590 VMOVSD	(%R12,%R11,8),%XMM1

  (3165) 0x4cc596 VFMADD231SD	%XMM1,%XMM1,%XMM0

  (3165) 0x4cc59b INC	%R11

  (3165) 0x4cc59e CMP	%R11,%R9

  (3165) 0x4cc5a1 JNE	4cc590

(3161) 0x4cc5a3 VMOVSD	%XMM0,(%R8)

(3161) 0x4cc5a8 MOV	-0xa0(%RBP),%RCX

(3161) 0x4cc5af MOV	(%RCX,%RAX,8),%R9

(3161) 0x4cc5b3 MOV	0x8(%RCX,%RAX,8),%RAX

(3161) 0x4cc5b8 MOV	%RAX,%R11

(3161) 0x4cc5bb SUB	%R9,%R11

(3161) 0x4cc5be MOV	-0x50(%RBP),%R14

(3161) 0x4cc5c2 JLE	4cc485

(3161) 0x4cc5c8 LEA	-0x8(%R14,%RAX,8),%RCX

(3161) 0x4cc5cd LEA	(%R14,%R9,8),%RDX

(3161) 0x4cc5d1 CMP	%R8,%RCX

(3161) 0x4cc5d4 JB	4cc600

(3161) 0x4cc5d6 CMP	%RDX,%R8

(3161) 0x4cc5d9 JB	4cc600

(3161) 0x4cc5db NOPL	(%RAX,%RAX,1)

  (3164) 0x4cc5e0 VMOVSD	(%R14,%R9,8),%XMM1

  (3164) 0x4cc5e6 VFMADD231SD	%XMM1,%XMM1,%XMM0

  (3164) 0x4cc5eb VMOVSD	%XMM0,(%R8)

  (3164) 0x4cc5f0 INC	%R9

  (3164) 0x4cc5f3 CMP	%R9,%RAX

  (3164) 0x4cc5f6 JNE	4cc5e0

(3161) 0x4cc5f8 JMP	4cc485

0x4cc5fd NOPL	(%RAX)

(3161) 0x4cc600 MOV	%R11,%R10

(3161) 0x4cc603 AND	$-0x4,%R10

(3161) 0x4cc607 JE	4cc680

(3161) 0x4cc609 LEA	-0x1(%R10),%RCX

(3161) 0x4cc60d VXORPD	%XMM1,%XMM1,%XMM1

(3161) 0x4cc611 XOR	%ESI,%ESI

(3161) 0x4cc613 NOPW	%CS:(%RAX,%RAX,1)

  (3163) 0x4cc620 VMOVUPD	(%RDX,%RSI,8),%YMM2

  (3163) 0x4cc625 VFMADD231PD	%YMM2,%YMM2,%YMM1

  (3163) 0x4cc62a ADD	$0x4,%RSI

  (3163) 0x4cc62e CMP	%RCX,%RSI

  (3163) 0x4cc631 JBE	4cc620

(3161) 0x4cc633 VEXTRACTF128	$0x1,%YMM1,%XMM2

(3161) 0x4cc639 VADDPD	%XMM2,%XMM1,%XMM1

(3161) 0x4cc63d VSHUFPD	$0x1,%XMM1,%XMM1,%XMM2

(3161) 0x4cc642 VADDSD	%XMM2,%XMM1,%XMM1

(3161) 0x4cc646 VADDSD	%XMM1,%XMM0,%XMM0

(3161) 0x4cc64a CMP	%R10,%R11

(3161) 0x4cc64d MOV	-0x40(%RBP),%RSI

(3161) 0x4cc651 JE	4cc480

(3161) 0x4cc657 JMP	4cc683

0x4cc659 NOPW	%CS:(%RAX,%RAX,1)

0x4cc668 NOPW	%CS:(%RAX,%RAX,1)

0x4cc677 NOPW	(%RAX,%RAX,1)

(3161) 0x4cc680 XOR	%R10D,%R10D

(3161) 0x4cc683 ADD	%R9,%R10

(3161) 0x4cc686 NOPW	%CS:(%RAX,%RAX,1)

  (3162) 0x4cc690 VMOVSD	(%R14,%R10,8),%XMM1

  (3162) 0x4cc696 VFMADD231SD	%XMM1,%XMM1,%XMM0

  (3162) 0x4cc69b INC	%R10

  (3162) 0x4cc69e CMP	%R10,%RAX

  (3162) 0x4cc6a1 JNE	4cc690

(3161) 0x4cc6a3 JMP	4cc480

0x4cc6a8 NOPW	%CS:(%RAX,%RAX,1)

0x4cc6b7 NOPW	(%RAX,%RAX,1)

0x4cc6c0 MOV	-0x70(%RBP),%RAX

0x4cc6c4 CMP	%RAX,-0xa8(%RBP)

0x4cc6cb JGE	4ce1d0

0x4cc6d1 CMP	%RDX,%R10

0x4cc6d4 CMOVL	%R10,%RDX

0x4cc6d8 MOV	-0x78(%RBP),%R8

0x4cc6dc MOV	%R8,%RCX

0x4cc6df SUB	%RDX,%RCX

0x4cc6e2 MOV	-0x88(%RBP),%RAX

0x4cc6e9 LEA	-0x1(%RCX,%RAX,1),%RAX

0x4cc6ee MOV	%RAX,-0x90(%RBP)

0x4cc6f5 IMUL	%R10,%R8

0x4cc6f9 ADD	%RDX,%R8

0x4cc6fc XOR	%ESI,%ESI

0x4cc6fe MOV	-0xc8(%RBP),%R13

0x4cc705 JMP	4cc751

0x4cc707 NOPW	%CS:(%RAX,%RAX,1)

0x4cc716 NOPW	%CS:(%RAX,%RAX,1)

0x4cc725 NOPW	%CS:(%RAX,%RAX,1)

0x4cc734 NOPW	%CS:(%RAX,%RAX,1)

(3148) 0x4cc740 CMP	-0x90(%RBP),%RSI

(3148) 0x4cc747 LEA	0x1(%RSI),%RSI

(3148) 0x4cc74b JE	4ce1d0

(3148) 0x4cc751 LEA	(%R8,%RSI,1),%R11

(3148) 0x4cc755 LEA	(%RDI,%R11,8),%R10

(3148) 0x4cc759 MOVQ	$0,(%RDI,%R11,8)

(3148) 0x4cc761 MOV	(%R9,%R11,8),%RCX

(3148) 0x4cc765 MOV	-0x38(%RBP),%RAX

(3148) 0x4cc769 TEST	%RAX,%RAX

(3148) 0x4cc76c JE	4cc880

(3148) 0x4cc772 MOV	(%RAX,%R11,8),%RDX

(3148) 0x4cc776 MOV	0x8(%R9,%R11,8),%RAX

(3148) 0x4cc77b VXORPD	%XMM0,%XMM0,%XMM0

(3148) 0x4cc77f MOV	%RAX,%RDI

(3148) 0x4cc782 SUB	%RCX,%RDI

(3148) 0x4cc785 JLE	4cc7ba

(3148) 0x4cc787 MOV	%RSI,-0x40(%RBP)

(3148) 0x4cc78b LEA	0x1(%RCX),%RSI

(3148) 0x4cc78f CMP	%RSI,%RAX

(3148) 0x4cc792 MOV	%RDI,-0xd8(%RBP)

(3148) 0x4cc799 JNE	4cc980

(3148) 0x4cc79f XOR	%EDI,%EDI

(3148) 0x4cc7a1 TESTB	$0x1,-0xd8(%RBP)

(3148) 0x4cc7a8 MOV	-0x50(%RBP),%R14

(3148) 0x4cc7ac MOV	-0x80(%RBP),%R9

(3148) 0x4cc7b0 MOV	-0x40(%RBP),%RSI

(3148) 0x4cc7b4 JNE	4ccb80

(3148) 0x4cc7ba CMPQ	$0,-0x98(%RBP)

(3148) 0x4cc7c2 JE	4cd120

(3148) 0x4cc7c8 MOV	-0xa0(%RBP),%RCX

(3148) 0x4cc7cf MOV	(%RCX,%R11,8),%RAX

(3148) 0x4cc7d3 MOV	0x8(%RCX,%R11,8),%RCX

(3148) 0x4cc7d8 MOV	%RCX,%RDI

(3148) 0x4cc7db SUB	%RAX,%RDI

(3148) 0x4cc7de JLE	4cd120

(3148) 0x4cc7e4 CMP	$0x4,%RDI

(3148) 0x4cc7e8 MOV	%RSI,-0x40(%RBP)

(3148) 0x4cc7ec JAE	4ccbc0

(3148) 0x4cc7f2 MOV	%RDI,%RSI

(3148) 0x4cc7f5 AND	$-0x4,%RSI

(3148) 0x4cc7f9 CMP	%RDI,%RSI

(3148) 0x4cc7fc JAE	4ccd00

(3148) 0x4cc802 ADD	%RSI,%RAX

(3148) 0x4cc805 MOV	-0x30(%RBP),%RDI

(3148) 0x4cc809 MOV	-0x80(%RBP),%R9

(3148) 0x4cc80d MOV	-0x48(%RBP),%R11

(3148) 0x4cc811 JMP	4cc84c

0x4cc813 NOPW	%CS:(%RAX,%RAX,1)

0x4cc822 NOPW	%CS:(%RAX,%RAX,1)

0x4cc831 NOPW	%CS:(%RAX,%RAX,1)

  (3154) 0x4cc840 INC	%RAX

  (3154) 0x4cc843 CMP	%RAX,%RCX

  (3154) 0x4cc846 JE	4ccd0c

  (3154) 0x4cc84c MOV	(%R13,%RAX,8),%RSI

  (3154) 0x4cc851 CMP	(%RBX,%RSI,8),%RDX

  (3154) 0x4cc855 JNE	4cc840

  (3154) 0x4cc857 VMOVSD	(%R14,%RAX,8),%XMM1

  (3154) 0x4cc85d VANDPD	%XMM5,%XMM1,%XMM1

  (3154) 0x4cc861 VFMADD231SD	%XMM7,%XMM1,%XMM0

  (3154) 0x4cc866 VMOVSD	%XMM0,(%R10)

  (3154) 0x4cc86b JMP	4cc840

0x4cc86d NOPW	%CS:(%RAX,%RAX,1)

0x4cc87c NOPL	(%RAX)

(3148) 0x4cc880 MOV	0x8(%R9,%R11,8),%RDX

(3148) 0x4cc885 VXORPD	%XMM0,%XMM0,%XMM0

(3148) 0x4cc889 MOV	%RDX,%RAX

(3148) 0x4cc88c SUB	%RCX,%RAX

(3148) 0x4cc88f JLE	4ccf08

(3148) 0x4cc895 CMP	$0x4,%RAX

(3148) 0x4cc899 MOV	%RSI,-0x40(%RBP)

(3148) 0x4cc89d MOV	%RAX,-0xd8(%RBP)

(3148) 0x4cc8a4 JAE	4ccd40

(3148) 0x4cc8aa MOV	-0xd8(%RBP),%RSI

(3148) 0x4cc8b1 MOV	%RSI,%RAX

(3148) 0x4cc8b4 AND	$-0x4,%RAX

(3148) 0x4cc8b8 CMP	%RSI,%RAX

(3148) 0x4cc8bb JAE	4ccf00

(3148) 0x4cc8c1 ADD	%RAX,%RCX

(3148) 0x4cc8c4 MOV	-0x30(%RBP),%RDI

(3148) 0x4cc8c8 MOV	-0x40(%RBP),%RSI

(3148) 0x4cc8cc JMP	4cc923

0x4cc8ce NOPW	%CS:(%RAX,%RAX,1)

0x4cc8dd NOPW	%CS:(%RAX,%RAX,1)

0x4cc8ec NOPW	%CS:(%RAX,%RAX,1)

0x4cc8fb NOPL	(%RAX,%RAX,1)

  (3152) 0x4cc900 VMOVSD	(%R12,%RCX,8),%XMM1

  (3152) 0x4cc906 VANDPD	%XMM5,%XMM1,%XMM1

  (3152) 0x4cc90a VMOVAPD	%XMM1,%XMM10

  (3152) 0x4cc90e VADDSD	%XMM0,%XMM1,%XMM0

  (3152) 0x4cc912 VMOVSD	%XMM0,(%R10)

  (3152) 0x4cc917 INC	%RCX

  (3152) 0x4cc91a CMP	%RCX,%RDX

  (3152) 0x4cc91d JE	4ccf08

  (3152) 0x4cc923 MOV	(%R15,%RCX,8),%RAX

  (3152) 0x4cc927 CMP	%R11,%RAX

  (3152) 0x4cc92a JE	4cc900

  (3152) 0x4cc92c CMP	%R8,%RAX

  (3152) 0x4cc92f JL	4cc937

  (3152) 0x4cc931 CMP	-0x70(%RBP),%RAX

  (3152) 0x4cc935 JL	4cc917

  (3152) 0x4cc937 VMOVSD	(%R12,%RCX,8),%XMM1

  (3152) 0x4cc93d VANDPD	%XMM5,%XMM1,%XMM1

  (3152) 0x4cc941 VMULSD	%XMM7,%XMM1,%XMM1

  (3152) 0x4cc945 JMP	4cc90e

0x4cc947 NOPW	%CS:(%RAX,%RAX,1)

0x4cc956 NOPW	%CS:(%RAX,%RAX,1)

0x4cc965 NOPW	%CS:(%RAX,%RAX,1)

0x4cc974 NOPW	%CS:(%RAX,%RAX,1)

(3148) 0x4cc980 MOV	%RDI,%RAX

(3148) 0x4cc983 AND	$-0x2,%RAX

(3148) 0x4cc987 MOV	-0x118(%RBP),%RSI

(3148) 0x4cc98e LEA	(%RSI,%RCX,8),%R9

(3148) 0x4cc992 MOV	-0x110(%RBP),%RSI

(3148) 0x4cc999 LEA	(%RSI,%RCX,8),%R14

(3148) 0x4cc99d XOR	%EDI,%EDI

(3148) 0x4cc99f JMP	4cc9e0

0x4cc9a1 NOPW	%CS:(%RAX,%RAX,1)

0x4cc9b0 NOPW	%CS:(%RAX,%RAX,1)

0x4cc9bf NOP

  (3156) 0x4cc9c0 VMOVSD	(%R9,%RDI,8),%XMM1

  (3156) 0x4cc9c6 VANDPD	%XMM5,%XMM1,%XMM10

  (3156) 0x4cc9ca VADDSD	%XMM0,%XMM10,%XMM0

  (3156) 0x4cc9ce VMOVSD	%XMM0,(%R10)

  (3156) 0x4cc9d3 ADD	$0x2,%RDI

  (3156) 0x4cc9d7 CMP	%RDI,%RAX

  (3156) 0x4cc9da JE	4cc7a1

  (3156) 0x4cc9e0 MOV	-0x8(%R14,%RDI,8),%RSI

  (3156) 0x4cc9e5 CMP	%R11,%RSI

  (3156) 0x4cc9e8 JNE	4cca40

  (3156) 0x4cc9ea VMOVSD	-0x8(%R9,%RDI,8),%XMM1

  (3156) 0x4cc9f1 VANDPD	%XMM5,%XMM1,%XMM10

  (3156) 0x4cc9f5 VADDSD	%XMM0,%XMM10,%XMM0

  (3156) 0x4cc9f9 VMOVSD	%XMM0,(%R10)

  (3156) 0x4cc9fe MOV	(%R14,%RDI,8),%RSI

  (3156) 0x4cca02 CMP	%R11,%RSI

  (3156) 0x4cca05 JE	4cc9c0

  (3156) 0x4cca07 JMP	4cca58

0x4cca09 NOPW	%CS:(%RAX,%RAX,1)

0x4cca18 NOPW	%CS:(%RAX,%RAX,1)

0x4cca27 NOPW	%CS:(%RAX,%RAX,1)

0x4cca36 NOPW	%CS:(%RAX,%RAX,1)

  (3156) 0x4cca40 CMP	%R8,%RSI

  (3156) 0x4cca43 JL	4ccac0

  (3156) 0x4cca45 CMP	-0x70(%RBP),%RSI

  (3156) 0x4cca49 JGE	4ccac0

  (3156) 0x4cca4b MOV	(%R14,%RDI,8),%RSI

  (3156) 0x4cca4f CMP	%R11,%RSI

  (3156) 0x4cca52 JE	4cc9c0

  (3156) 0x4cca58 CMP	%R8,%RSI

  (3156) 0x4cca5b JL	4cca67

  (3156) 0x4cca5d CMP	-0x70(%RBP),%RSI

  (3156) 0x4cca61 JL	4cc9d3

  (3156) 0x4cca67 MOV	-0x38(%RBP),%RBX

  (3156) 0x4cca6b CMP	(%RBX,%RSI,8),%RDX

  (3156) 0x4cca6f JNE	4ccb00

  (3156) 0x4cca75 VMOVSD	(%R9,%RDI,8),%XMM1

  (3156) 0x4cca7b VANDPD	%XMM5,%XMM1,%XMM1

  (3156) 0x4cca7f VFMADD231SD	%XMM7,%XMM1,%XMM0

  (3156) 0x4cca84 MOV	-0x58(%RBP),%RBX

  (3156) 0x4cca88 JMP	4cc9ce

0x4cca8d NOPW	%CS:(%RAX,%RAX,1)

0x4cca9c NOPW	%CS:(%RAX,%RAX,1)

0x4ccaab NOPW	%CS:(%RAX,%RAX,1)

0x4ccaba NOPW	(%RAX,%RAX,1)

  (3156) 0x4ccac0 MOV	-0x38(%RBP),%RBX

  (3156) 0x4ccac4 CMP	(%RBX,%RSI,8),%RDX

  (3156) 0x4ccac8 JNE	4ccb40

  (3156) 0x4ccaca VMOVSD	-0x8(%R9,%RDI,8),%XMM1

  (3156) 0x4ccad1 VANDPD	%XMM5,%XMM1,%XMM1

  (3156) 0x4ccad5 VFMADD231SD	%XMM7,%XMM1,%XMM0

  (3156) 0x4ccada MOV	-0x58(%RBP),%RBX

  (3156) 0x4ccade JMP	4cc9f9

0x4ccae3 NOPW	%CS:(%RAX,%RAX,1)

0x4ccaf2 NOPW	%CS:(%RAX,%RAX,1)

  (3156) 0x4ccb00 MOV	-0x58(%RBP),%RBX

  (3156) 0x4ccb04 JMP	4cc9d3

0x4ccb09 NOPW	%CS:(%RAX,%RAX,1)

0x4ccb18 NOPW	%CS:(%RAX,%RAX,1)

0x4ccb27 NOPW	%CS:(%RAX,%RAX,1)

0x4ccb36 NOPW	%CS:(%RAX,%RAX,1)

  (3156) 0x4ccb40 MOV	-0x58(%RBP),%RBX

  (3156) 0x4ccb44 MOV	(%R14,%RDI,8),%RSI

  (3156) 0x4ccb48 CMP	%R11,%RSI

  (3156) 0x4ccb4b JNE	4cca58

  (3156) 0x4ccb51 JMP	4cc9c0

0x4ccb56 NOPW	%CS:(%RAX,%RAX,1)

0x4ccb65 NOPW	%CS:(%RAX,%RAX,1)

0x4ccb74 NOPW	%CS:(%RAX,%RAX,1)

(3148) 0x4ccb80 ADD	%RDI,%RCX

(3148) 0x4ccb83 MOV	(%R15,%RCX,8),%RAX

(3148) 0x4ccb87 CMP	%R11,%RAX

(3148) 0x4ccb8a JNE	4ccfc0

(3148) 0x4ccb90 VMOVSD	(%R12,%RCX,8),%XMM1

(3148) 0x4ccb96 VANDPD	%XMM5,%XMM1,%XMM10

(3148) 0x4ccb9a VADDSD	%XMM0,%XMM10,%XMM0

(3148) 0x4ccb9e VMOVSD	%XMM0,(%R10)

(3148) 0x4ccba3 CMPQ	$0,-0x98(%RBP)

(3148) 0x4ccbab JNE	4cc7c8

(3148) 0x4ccbb1 JMP	4cd120

0x4ccbb6 NOPW	%CS:(%RAX,%RAX,1)

(3148) 0x4ccbc0 MOV	%RDI,%R9

(3148) 0x4ccbc3 SHR	$0x2,%R9

(3148) 0x4ccbc7 LEA	0x18(,%RAX,8),%R11

(3148) 0x4ccbcf JMP	4ccc0d

0x4ccbd1 NOPW	%CS:(%RAX,%RAX,1)

0x4ccbe0 NOPW	%CS:(%RAX,%RAX,1)

0x4ccbef NOPW	%CS:(%RAX,%RAX,1)

0x4ccbfe XCHG	%AX,%AX

  (3155) 0x4ccc00 ADD	$0x20,%R11

  (3155) 0x4ccc04 DEC	%R9

  (3155) 0x4ccc07 JE	4cc7f2

  (3155) 0x4ccc0d MOV	-0x18(%R13,%R11,1),%RSI

  (3155) 0x4ccc12 CMP	(%RBX,%RSI,8),%RDX

  (3155) 0x4ccc16 JNE	4ccc80

  (3155) 0x4ccc18 VMOVSD	-0x18(%R14,%R11,1),%XMM1

  (3155) 0x4ccc1f VANDPD	%XMM5,%XMM1,%XMM1

  (3155) 0x4ccc23 VFMADD231SD	%XMM7,%XMM1,%XMM0

  (3155) 0x4ccc28 VMOVSD	%XMM0,(%R10)

  (3155) 0x4ccc2d MOV	-0x10(%R13,%R11,1),%RSI

  (3155) 0x4ccc32 CMP	(%RBX,%RSI,8),%RDX

  (3155) 0x4ccc36 JE	4ccc8b

  (3155) 0x4ccc38 MOV	-0x8(%R13,%R11,1),%RSI

  (3155) 0x4ccc3d CMP	(%RBX,%RSI,8),%RDX

  (3155) 0x4ccc41 JNE	4cccab

  (3155) 0x4ccc43 VMOVSD	-0x8(%R14,%R11,1),%XMM1

  (3155) 0x4ccc4a VANDPD	%XMM5,%XMM1,%XMM1

  (3155) 0x4ccc4e VFMADD231SD	%XMM7,%XMM1,%XMM0

  (3155) 0x4ccc53 VMOVSD	%XMM0,(%R10)

  (3155) 0x4ccc58 MOV	(%R13,%R11,1),%RSI

  (3155) 0x4ccc5d CMP	(%RBX,%RSI,8),%RDX

  (3155) 0x4ccc61 JNE	4ccc00

  (3155) 0x4ccc63 JMP	4cccba

0x4ccc65 NOPW	%CS:(%RAX,%RAX,1)

0x4ccc74 NOPW	%CS:(%RAX,%RAX,1)

  (3155) 0x4ccc80 MOV	-0x10(%R13,%R11,1),%RSI

  (3155) 0x4ccc85 CMP	(%RBX,%RSI,8),%RDX

  (3155) 0x4ccc89 JNE	4ccc38

  (3155) 0x4ccc8b VMOVSD	-0x10(%R14,%R11,1),%XMM1

  (3155) 0x4ccc92 VANDPD	%XMM5,%XMM1,%XMM1

  (3155) 0x4ccc96 VFMADD231SD	%XMM7,%XMM1,%XMM0

  (3155) 0x4ccc9b VMOVSD	%XMM0,(%R10)

  (3155) 0x4ccca0 MOV	-0x8(%R13,%R11,1),%RSI

  (3155) 0x4ccca5 CMP	(%RBX,%RSI,8),%RDX

  (3155) 0x4ccca9 JE	4ccc43

  (3155) 0x4cccab MOV	(%R13,%R11,1),%RSI

  (3155) 0x4cccb0 CMP	(%RBX,%RSI,8),%RDX

  (3155) 0x4cccb4 JNE	4ccc00

  (3155) 0x4cccba VMOVSD	(%R14,%R11,1),%XMM1

  (3155) 0x4cccc0 VANDPD	%XMM5,%XMM1,%XMM1

  (3155) 0x4cccc4 VFMADD231SD	%XMM7,%XMM1,%XMM0

  (3155) 0x4cccc9 VMOVSD	%XMM0,(%R10)

  (3155) 0x4cccce JMP	4ccc00

0x4cccd3 NOPW	%CS:(%RAX,%RAX,1)

0x4ccce2 NOPW	%CS:(%RAX,%RAX,1)

0x4cccf1 NOPW	%CS:(%RAX,%RAX,1)

(3148) 0x4ccd00 MOV	-0x30(%RBP),%RDI

(3148) 0x4ccd04 MOV	-0x80(%RBP),%R9

(3148) 0x4ccd08 MOV	-0x48(%RBP),%R11

(3148) 0x4ccd0c MOV	-0x40(%RBP),%RSI

(3148) 0x4ccd10 JMP	4cd128

0x4ccd15 NOPW	%CS:(%RAX,%RAX,1)

0x4ccd24 NOPW	%CS:(%RAX,%RAX,1)

0x4ccd33 NOPW	%CS:(%RAX,%RAX,1)

(3148) 0x4ccd40 MOV	%RAX,%RDI

(3148) 0x4ccd43 SHR	$0x2,%RDI

(3148) 0x4ccd47 LEA	0x18(,%RCX,8),%RAX

(3148) 0x4ccd4f JMP	4ccda4

0x4ccd51 NOPW	%CS:(%RAX,%RAX,1)

0x4ccd60 NOPW	%CS:(%RAX,%RAX,1)

0x4ccd6f NOPW	%CS:(%RAX,%RAX,1)

0x4ccd7e XCHG	%AX,%AX

  (3153) 0x4ccd80 VMOVSD	(%R12,%RAX,1),%XMM1

  (3153) 0x4ccd86 VANDPD	%XMM5,%XMM1,%XMM1

  (3153) 0x4ccd8a VMOVAPD	%XMM1,%XMM10

  (3153) 0x4ccd8e VADDSD	%XMM0,%XMM1,%XMM0

  (3153) 0x4ccd92 VMOVSD	%XMM0,(%R10)

  (3153) 0x4ccd97 ADD	$0x20,%RAX

  (3153) 0x4ccd9b DEC	%RDI

  (3153) 0x4ccd9e JE	4cc8aa

  (3153) 0x4ccda4 MOV	-0x18(%R15,%RAX,1),%RSI

  (3153) 0x4ccda9 CMP	%R11,%RSI

  (3153) 0x4ccdac JNE	4ccdc0

  (3153) 0x4ccdae VMOVSD	-0x18(%R12,%RAX,1),%XMM1

  (3153) 0x4ccdb5 VANDPD	%XMM5,%XMM1,%XMM1

  (3153) 0x4ccdb9 VMOVAPD	%XMM1,%XMM10

  (3153) 0x4ccdbd JMP	4cce0f

0x4ccdbf NOP

  (3153) 0x4ccdc0 CMP	%R8,%RSI

  (3153) 0x4ccdc3 JL	4cce00

  (3153) 0x4ccdc5 CMP	-0x70(%RBP),%RSI

  (3153) 0x4ccdc9 JGE	4cce00

  (3153) 0x4ccdcb MOV	-0x10(%R15,%RAX,1),%RSI

  (3153) 0x4ccdd0 CMP	%R11,%RSI

  (3153) 0x4ccdd3 JNE	4cce22

  (3153) 0x4ccdd5 VMOVSD	-0x10(%R12,%RAX,1),%XMM1

  (3153) 0x4ccddc VANDPD	%XMM5,%XMM1,%XMM1

  (3153) 0x4ccde0 VMOVAPD	%XMM1,%XMM10

  (3153) 0x4ccde4 JMP	4cce8f

0x4ccde9 NOPW	%CS:(%RAX,%RAX,1)

0x4ccdf8 NOPL	(%RAX,%RAX,1)

  (3153) 0x4cce00 VMOVSD	-0x18(%R12,%RAX,1),%XMM1

  (3153) 0x4cce07 VANDPD	%XMM5,%XMM1,%XMM1

  (3153) 0x4cce0b VMULSD	%XMM7,%XMM1,%XMM1

  (3153) 0x4cce0f VADDSD	%XMM0,%XMM1,%XMM0

  (3153) 0x4cce13 VMOVSD	%XMM0,(%R10)

  (3153) 0x4cce18 MOV	-0x10(%R15,%RAX,1),%RSI

  (3153) 0x4cce1d CMP	%R11,%RSI

  (3153) 0x4cce20 JE	4ccdd5

  (3153) 0x4cce22 CMP	%R8,%RSI

  (3153) 0x4cce25 JL	4cce80

  (3153) 0x4cce27 CMP	-0x70(%RBP),%RSI

  (3153) 0x4cce2b JGE	4cce80

  (3153) 0x4cce2d MOV	-0x8(%R15,%RAX,1),%RSI

  (3153) 0x4cce32 CMP	%R11,%RSI

  (3153) 0x4cce35 JNE	4ccea2

  (3153) 0x4cce37 VMOVSD	-0x8(%R12,%RAX,1),%XMM1

  (3153) 0x4cce3e VANDPD	%XMM5,%XMM1,%XMM1

  (3153) 0x4cce42 VMOVAPD	%XMM1,%XMM10

  (3153) 0x4cce46 JMP	4ccebc

0x4cce48 NOPW	%CS:(%RAX,%RAX,1)

0x4cce57 NOPW	%CS:(%RAX,%RAX,1)

0x4cce66 NOPW	%CS:(%RAX,%RAX,1)

0x4cce75 NOPW	%CS:(%RAX,%RAX,1)

  (3153) 0x4cce80 VMOVSD	-0x10(%R12,%RAX,1),%XMM1

  (3153) 0x4cce87 VANDPD	%XMM5,%XMM1,%XMM1

  (3153) 0x4cce8b VMULSD	%XMM7,%XMM1,%XMM1

  (3153) 0x4cce8f VADDSD	%XMM0,%XMM1,%XMM0

  (3153) 0x4cce93 VMOVSD	%XMM0,(%R10)

  (3153) 0x4cce98 MOV	-0x8(%R15,%RAX,1),%RSI

  (3153) 0x4cce9d CMP	%R11,%RSI

  (3153) 0x4ccea0 JE	4cce37

  (3153) 0x4ccea2 CMP	%R8,%RSI

  (3153) 0x4ccea5 JL	4ccead

  (3153) 0x4ccea7 CMP	-0x70(%RBP),%RSI

  (3153) 0x4cceab JL	4ccec5

  (3153) 0x4ccead VMOVSD	-0x8(%R12,%RAX,1),%XMM1

  (3153) 0x4cceb4 VANDPD	%XMM5,%XMM1,%XMM1

  (3153) 0x4cceb8 VMULSD	%XMM7,%XMM1,%XMM1

  (3153) 0x4ccebc VADDSD	%XMM0,%XMM1,%XMM0

  (3153) 0x4ccec0 VMOVSD	%XMM0,(%R10)

  (3153) 0x4ccec5 MOV	(%R15,%RAX,1),%RSI

  (3153) 0x4ccec9 CMP	%R11,%RSI

  (3153) 0x4ccecc JE	4ccd80

  (3153) 0x4cced2 CMP	%R8,%RSI

  (3153) 0x4cced5 JL	4ccee1

  (3153) 0x4cced7 CMP	-0x70(%RBP),%RSI

  (3153) 0x4ccedb JL	4ccd97

  (3153) 0x4ccee1 VMOVSD	(%R12,%RAX,1),%XMM1

  (3153) 0x4ccee7 VANDPD	%XMM5,%XMM1,%XMM1

  (3153) 0x4cceeb VMULSD	%XMM7,%XMM1,%XMM1

  (3153) 0x4cceef JMP	4ccd8e

0x4ccef4 NOPW	%CS:(%RAX,%RAX,1)

(3148) 0x4ccf00 MOV	-0x30(%RBP),%RDI

(3148) 0x4ccf04 MOV	-0x40(%RBP),%RSI

(3148) 0x4ccf08 CMPQ	$0,-0x98(%RBP)

(3148) 0x4ccf10 JE	4cd124

(3148) 0x4ccf16 MOV	-0xa0(%RBP),%RAX

(3148) 0x4ccf1d MOV	(%RAX,%R11,8),%RCX

(3148) 0x4ccf21 MOV	0x8(%RAX,%R11,8),%RAX

(3148) 0x4ccf26 MOV	%RAX,%RDI

(3148) 0x4ccf29 SUB	%RCX,%RDI

(3148) 0x4ccf2c JLE	4cd120

(3148) 0x4ccf32 LEA	-0x8(%R14,%RAX,8),%RDX

(3148) 0x4ccf37 LEA	(%R14,%RCX,8),%R9

(3148) 0x4ccf3b CMP	%R10,%RDX

(3148) 0x4ccf3e JB	4cd040

(3148) 0x4ccf44 CMP	%R9,%R10

(3148) 0x4ccf47 JB	4cd040

(3148) 0x4ccf4d MOV	-0x30(%RBP),%RDI

(3148) 0x4ccf51 MOV	-0x80(%RBP),%R9

(3148) 0x4ccf55 MOV	-0x48(%RBP),%R11

(3148) 0x4ccf59 NOPL	(%RAX)

  (3151) 0x4ccf60 VMOVSD	(%R14,%RCX,8),%XMM1

  (3151) 0x4ccf66 VANDPD	%XMM5,%XMM1,%XMM1

  (3151) 0x4ccf6a VFMADD231SD	%XMM7,%XMM1,%XMM0

  (3151) 0x4ccf6f VMOVSD	%XMM0,(%R10)

  (3151) 0x4ccf74 INC	%RCX

  (3151) 0x4ccf77 CMP	%RCX,%RAX

  (3151) 0x4ccf7a JNE	4ccf60

(3148) 0x4ccf7c JMP	4cd128

0x4ccf81 NOPW	%CS:(%RAX,%RAX,1)

0x4ccf90 NOPW	%CS:(%RAX,%RAX,1)

0x4ccf9f NOPW	%CS:(%RAX,%RAX,1)

0x4ccfae NOPW	%CS:(%RAX,%RAX,1)

0x4ccfbd NOPL	(%RAX)

(3148) 0x4ccfc0 CMP	%R8,%RAX

(3148) 0x4ccfc3 JL	4ccfcf

(3148) 0x4ccfc5 CMP	-0x70(%RBP),%RAX

(3148) 0x4ccfc9 JL	4cc7ba

(3148) 0x4ccfcf MOV	-0x38(%RBP),%RSI

(3148) 0x4ccfd3 CMP	(%RSI,%RAX,8),%RDX

(3148) 0x4ccfd7 JNE	4cd100

(3148) 0x4ccfdd VMOVSD	(%R12,%RCX,8),%XMM1

(3148) 0x4ccfe3 VANDPD	%XMM5,%XMM1,%XMM1

(3148) 0x4ccfe7 VFMADD231SD	%XMM7,%XMM1,%XMM0

(3148) 0x4ccfec MOV	-0x40(%RBP),%RSI

(3148) 0x4ccff0 VMOVSD	%XMM0,(%R10)

(3148) 0x4ccff5 CMPQ	$0,-0x98(%RBP)

(3148) 0x4ccffd JNE	4cc7c8

(3148) 0x4cd003 JMP	4cd120

0x4cd008 NOPW	%CS:(%RAX,%RAX,1)

0x4cd017 NOPW	%CS:(%RAX,%RAX,1)

0x4cd026 NOPW	%CS:(%RAX,%RAX,1)

0x4cd035 NOPW	%CS:(%RAX,%RAX,1)

(3148) 0x4cd040 MOV	%RDI,%RDX

(3148) 0x4cd043 AND	$-0x4,%RDX

(3148) 0x4cd047 JE	4cd0c0

(3148) 0x4cd049 MOV	%RSI,-0x40(%RBP)

(3148) 0x4cd04d LEA	-0x1(%RDX),%R11

(3148) 0x4cd051 VXORPD	%XMM1,%XMM1,%XMM1

(3148) 0x4cd055 XOR	%ESI,%ESI

(3148) 0x4cd057 NOPW	(%RAX,%RAX,1)

  (3150) 0x4cd060 VANDPD	(%R9,%RSI,8),%YMM6,%YMM2

  (3150) 0x4cd066 VFMADD231PD	%YMM8,%YMM2,%YMM1

  (3150) 0x4cd06b ADD	$0x4,%RSI

  (3150) 0x4cd06f CMP	%R11,%RSI

  (3150) 0x4cd072 JBE	4cd060

(3148) 0x4cd074 VEXTRACTF128	$0x1,%YMM1,%XMM2

(3148) 0x4cd07a VADDPD	%XMM2,%XMM1,%XMM1

(3148) 0x4cd07e VSHUFPD	$0x1,%XMM1,%XMM1,%XMM2

(3148) 0x4cd083 VADDSD	%XMM2,%XMM1,%XMM1

(3148) 0x4cd087 VADDSD	%XMM1,%XMM0,%XMM0

(3148) 0x4cd08b CMP	%RDX,%RDI

(3148) 0x4cd08e MOV	-0x40(%RBP),%RSI

(3148) 0x4cd092 JNE	4cd0c2

(3148) 0x4cd094 JMP	4cd0e7

0x4cd096 NOPW	%CS:(%RAX,%RAX,1)

0x4cd0a5 NOPW	%CS:(%RAX,%RAX,1)

0x4cd0b4 NOPW	%CS:(%RAX,%RAX,1)

(3148) 0x4cd0c0 XOR	%EDX,%EDX

(3148) 0x4cd0c2 ADD	%RCX,%RDX

(3148) 0x4cd0c5 NOPW	%CS:(%RAX,%RAX,1)

  (3149) 0x4cd0d0 VMOVSD	(%R14,%RDX,8),%XMM1

  (3149) 0x4cd0d6 VANDPD	%XMM5,%XMM1,%XMM1

  (3149) 0x4cd0da VFMADD231SD	%XMM7,%XMM1,%XMM0

  (3149) 0x4cd0df INC	%RDX

  (3149) 0x4cd0e2 CMP	%RDX,%RAX

  (3149) 0x4cd0e5 JNE	4cd0d0

(3148) 0x4cd0e7 VMOVSD	%XMM0,(%R10)

(3148) 0x4cd0ec MOV	-0x30(%RBP),%RDI

(3148) 0x4cd0f0 MOV	-0x80(%RBP),%R9

(3148) 0x4cd0f4 JMP	4cd124

0x4cd0f6 NOPW	%CS:(%RAX,%RAX,1)

(3148) 0x4cd100 MOV	-0x40(%RBP),%RSI

(3148) 0x4cd104 CMPQ	$0,-0x98(%RBP)

(3148) 0x4cd10c JNE	4cc7c8

(3148) 0x4cd112 NOPW	%CS:(%RAX,%RAX,1)

(3148) 0x4cd120 MOV	-0x30(%RBP),%RDI

(3148) 0x4cd124 MOV	-0x48(%RBP),%R11

(3148) 0x4cd128 VMULSD	%XMM9,%XMM10,%XMM1

(3148) 0x4cd12d VUCOMISD	%XMM1,%XMM0

(3148) 0x4cd131 JA	4cc740

(3148) 0x4cd137 VMOVSD	%XMM10,(%R10)

(3148) 0x4cd13c JMP	4cc740

0x4cd141 NOPW	%CS:(%RAX,%RAX,1)

0x4cd150 NOPW	%CS:(%RAX,%RAX,1)

0x4cd15f NOPW	%CS:(%RAX,%RAX,1)

0x4cd16e NOPW	%CS:(%RAX,%RAX,1)

0x4cd17d NOPL	(%RAX)

0x4cd180 CMPQ	$0,-0x98(%RBP)

0x4cd188 JE	4cde00

0x4cd18e MOV	-0x78(%RBP),%RAX

0x4cd192 IMUL	%R10,%RAX

0x4cd196 MOV	-0x90(%RBP),%R13

0x4cd19d ADD	%RAX,%R13

0x4cd1a0 XOR	%ECX,%ECX

0x4cd1a2 JMP	4cd1d6

0x4cd1a4 NOPW	%CS:(%RAX,%RAX,1)

0x4cd1b3 NOPW	%CS:(%RAX,%RAX,1)

(3189) 0x4cd1c0 VMOVSD	%XMM0,(%RDX)

(3189) 0x4cd1c4 CMP	-0x40(%RBP),%RCX

(3189) 0x4cd1c8 LEA	0x1(%RCX),%RCX

(3189) 0x4cd1cc MOV	-0x80(%RBP),%R9

(3189) 0x4cd1d0 JE	4cdb00

(3189) 0x4cd1d6 LEA	(%R13,%RCX,1),%RAX

(3189) 0x4cd1db LEA	(%RDI,%RAX,8),%RDX

(3189) 0x4cd1df MOVQ	$0,(%RDI,%RAX,8)

(3189) 0x4cd1e7 MOV	(%R9,%RAX,8),%R10

(3189) 0x4cd1eb MOV	0x8(%R9,%RAX,8),%R9

(3189) 0x4cd1f0 VXORPD	%XMM0,%XMM0,%XMM0

(3189) 0x4cd1f4 MOV	%R9,%R11

(3189) 0x4cd1f7 SUB	%R10,%R11

(3189) 0x4cd1fa JLE	4cd2ee

(3189) 0x4cd200 LEA	-0x8(%R12,%R9,8),%RSI

(3189) 0x4cd205 LEA	(%R12,%R10,8),%R14

(3189) 0x4cd209 CMP	%RDX,%RSI

(3189) 0x4cd20c JB	4cd240

(3189) 0x4cd20e CMP	%R14,%RDX

(3189) 0x4cd211 JB	4cd240

(3189) 0x4cd213 MOV	-0x50(%RBP),%R14

(3189) 0x4cd217 NOPW	(%RAX,%RAX,1)

  (3195) 0x4cd220 VMOVSD	(%R12,%R10,8),%XMM1

  (3195) 0x4cd226 VANDPD	%XMM5,%XMM1,%XMM1

  (3195) 0x4cd22a VADDSD	%XMM1,%XMM0,%XMM0

  (3195) 0x4cd22e VMOVSD	%XMM0,(%RDX)

  (3195) 0x4cd232 INC	%R10

  (3195) 0x4cd235 CMP	%R10,%R9

  (3195) 0x4cd238 JNE	4cd220

(3189) 0x4cd23a JMP	4cd2ee

0x4cd23f NOP

(3189) 0x4cd240 MOV	%R11,%R8

(3189) 0x4cd243 AND	$-0x4,%R8

(3189) 0x4cd247 JE	4cd2c0

(3189) 0x4cd249 LEA	-0x1(%R8),%RDI

(3189) 0x4cd24d VXORPD	%XMM0,%XMM0,%XMM0

(3189) 0x4cd251 XOR	%ESI,%ESI

(3189) 0x4cd253 NOPW	%CS:(%RAX,%RAX,1)

  (3194) 0x4cd260 VANDPD	(%R14,%RSI,8),%YMM6,%YMM1

  (3194) 0x4cd266 VADDPD	%YMM1,%YMM0,%YMM0

  (3194) 0x4cd26a ADD	$0x4,%RSI

  (3194) 0x4cd26e CMP	%RDI,%RSI

  (3194) 0x4cd271 JBE	4cd260

(3189) 0x4cd273 VEXTRACTF128	$0x1,%YMM0,%XMM1

(3189) 0x4cd279 VADDPD	%XMM1,%XMM0,%XMM0

(3189) 0x4cd27d VSHUFPD	$0x1,%XMM0,%XMM0,%XMM1

(3189) 0x4cd282 VADDSD	%XMM1,%XMM0,%XMM0

(3189) 0x4cd286 CMP	%R8,%R11

(3189) 0x4cd289 MOV	-0x30(%RBP),%RDI

(3189) 0x4cd28d JNE	4cd2c3

(3189) 0x4cd28f JMP	4cd2e6

0x4cd291 NOPW	%CS:(%RAX,%RAX,1)

0x4cd2a0 NOPW	%CS:(%RAX,%RAX,1)

0x4cd2af NOPW	%CS:(%RAX,%RAX,1)

0x4cd2be XCHG	%AX,%AX

(3189) 0x4cd2c0 XOR	%R8D,%R8D

(3189) 0x4cd2c3 ADD	%R10,%R8

(3189) 0x4cd2c6 NOPW	%CS:(%RAX,%RAX,1)

  (3193) 0x4cd2d0 VMOVSD	(%R12,%R8,8),%XMM1

  (3193) 0x4cd2d6 VANDPD	%XMM5,%XMM1,%XMM1

  (3193) 0x4cd2da VADDSD	%XMM1,%XMM0,%XMM0

  (3193) 0x4cd2de INC	%R8

  (3193) 0x4cd2e1 CMP	%R8,%R9

  (3193) 0x4cd2e4 JNE	4cd2d0

(3189) 0x4cd2e6 VMOVSD	%XMM0,(%RDX)

(3189) 0x4cd2ea MOV	-0x50(%RBP),%R14

(3189) 0x4cd2ee MOV	-0xa0(%RBP),%RSI

(3189) 0x4cd2f5 MOV	(%RSI,%RAX,8),%R9

(3189) 0x4cd2f9 MOV	0x8(%RSI,%RAX,8),%RAX

(3189) 0x4cd2fe MOV	%RAX,%R10

(3189) 0x4cd301 SUB	%R9,%R10

(3189) 0x4cd304 JLE	4cd1c4

(3189) 0x4cd30a LEA	-0x8(%R14,%RAX,8),%RSI

(3189) 0x4cd30f LEA	(%R14,%R9,8),%R11

(3189) 0x4cd313 CMP	%RDX,%RSI

(3189) 0x4cd316 JB	4cd340

(3189) 0x4cd318 CMP	%R11,%RDX

(3189) 0x4cd31b JB	4cd340

(3189) 0x4cd31d NOPL	(%RAX)

  (3192) 0x4cd320 VMOVSD	(%R14,%R9,8),%XMM1

  (3192) 0x4cd326 VANDPD	%XMM5,%XMM1,%XMM1

  (3192) 0x4cd32a VADDSD	%XMM1,%XMM0,%XMM0

  (3192) 0x4cd32e VMOVSD	%XMM0,(%RDX)

  (3192) 0x4cd332 INC	%R9

  (3192) 0x4cd335 CMP	%R9,%RAX

  (3192) 0x4cd338 JNE	4cd320

(3189) 0x4cd33a JMP	4cd1c4

0x4cd33f NOP

(3189) 0x4cd340 MOV	%R10,%R8

(3189) 0x4cd343 AND	$-0x4,%R8

(3189) 0x4cd347 JE	4cd3c0

(3189) 0x4cd349 LEA	-0x1(%R8),%RDI

(3189) 0x4cd34d VXORPD	%XMM1,%XMM1,%XMM1

(3189) 0x4cd351 XOR	%ESI,%ESI

(3189) 0x4cd353 NOPW	%CS:(%RAX,%RAX,1)

  (3191) 0x4cd360 VANDPD	(%R11,%RSI,8),%YMM6,%YMM2

  (3191) 0x4cd366 VADDPD	%YMM2,%YMM1,%YMM1

  (3191) 0x4cd36a ADD	$0x4,%RSI

  (3191) 0x4cd36e CMP	%RDI,%RSI

  (3191) 0x4cd371 JBE	4cd360

(3189) 0x4cd373 VEXTRACTF128	$0x1,%YMM1,%XMM2

(3189) 0x4cd379 VADDPD	%XMM2,%XMM1,%XMM1

(3189) 0x4cd37d VSHUFPD	$0x1,%XMM1,%XMM1,%XMM2

(3189) 0x4cd382 VADDSD	%XMM2,%XMM1,%XMM1

(3189) 0x4cd386 VADDSD	%XMM1,%XMM0,%XMM0

(3189) 0x4cd38a CMP	%R8,%R10

(3189) 0x4cd38d MOV	-0x30(%RBP),%RDI

(3189) 0x4cd391 JE	4cd1c0

(3189) 0x4cd397 JMP	4cd3c3

0x4cd399 NOPW	%CS:(%RAX,%RAX,1)

0x4cd3a8 NOPW	%CS:(%RAX,%RAX,1)

0x4cd3b7 NOPW	(%RAX,%RAX,1)

(3189) 0x4cd3c0 XOR	%R8D,%R8D

(3189) 0x4cd3c3 ADD	%R9,%R8

(3189) 0x4cd3c6 NOPW	%CS:(%RAX,%RAX,1)

  (3190) 0x4cd3d0 VMOVSD	(%R14,%R8,8),%XMM1

  (3190) 0x4cd3d6 VANDPD	%XMM5,%XMM1,%XMM1

  (3190) 0x4cd3da VADDSD	%XMM1,%XMM0,%XMM0

  (3190) 0x4cd3de INC	%R8

  (3190) 0x4cd3e1 CMP	%R8,%RAX

  (3190) 0x4cd3e4 JNE	4cd3d0

(3189) 0x4cd3e6 JMP	4cd1c0

0x4cd3eb NOPW	%CS:(%RAX,%RAX,1)

0x4cd3fa NOPW	(%RAX,%RAX,1)

0x4cd400 CMPQ	$0,-0x98(%RBP)

0x4cd408 JE	4cdf80

0x4cd40e MOV	-0x78(%RBP),%RAX

0x4cd412 IMUL	%R10,%RAX

0x4cd416 ADD	%RAX,%RDI

0x4cd419 XOR	%ECX,%ECX

0x4cd41b MOV	-0x40(%RBP),%R13

0x4cd41f JMP	4cd459

0x4cd421 NOPW	%CS:(%RAX,%RAX,1)

0x4cd430 NOPW	%CS:(%RAX,%RAX,1)

0x4cd43f NOP

(3171) 0x4cd440 VMOVSD	%XMM0,(%RDX)

(3171) 0x4cd444 MOV	-0x80(%RBP),%R9

(3171) 0x4cd448 MOV	-0x48(%RBP),%R11

(3171) 0x4cd44c CMP	%R13,%RCX

(3171) 0x4cd44f LEA	0x1(%RCX),%RCX

(3171) 0x4cd453 JE	4ce1c0

(3171) 0x4cd459 LEA	(%RDI,%RCX,1),%RAX

(3171) 0x4cd45d MOV	-0x30(%RBP),%RSI

(3171) 0x4cd461 LEA	(%RSI,%RAX,8),%RDX

(3171) 0x4cd465 MOVQ	$0,(%RSI,%RAX,8)

(3171) 0x4cd46d MOV	%R9,%RSI

(3171) 0x4cd470 MOV	(%R9,%RAX,8),%R9

(3171) 0x4cd474 MOV	0x8(%RSI,%RAX,8),%R10

(3171) 0x4cd479 VXORPD	%XMM0,%XMM0,%XMM0

(3171) 0x4cd47d MOV	%R10,%R8

(3171) 0x4cd480 SUB	%R9,%R8

(3171) 0x4cd483 JLE	4cd608

(3171) 0x4cd489 CMP	$0x4,%R8

(3171) 0x4cd48d JAE	4cd500

(3171) 0x4cd48f MOV	%R8,%RSI

(3171) 0x4cd492 AND	$-0x4,%RSI

(3171) 0x4cd496 CMP	%R8,%RSI

(3171) 0x4cd499 JAE	4cd600

(3171) 0x4cd49f ADD	%RSI,%R9

(3171) 0x4cd4a2 MOV	-0x50(%RBP),%R14

(3171) 0x4cd4a6 MOV	-0x48(%RBP),%R11

(3171) 0x4cd4aa JMP	4cd4de

0x4cd4ac NOPW	%CS:(%RAX,%RAX,1)

0x4cd4bb NOPL	(%RAX,%RAX,1)

  (3175) 0x4cd4c0 VMOVSD	(%R12,%R9,8),%XMM1

  (3175) 0x4cd4c6 VANDPD	%XMM5,%XMM1,%XMM1

  (3175) 0x4cd4ca VADDSD	%XMM1,%XMM0,%XMM0

  (3175) 0x4cd4ce VMOVSD	%XMM0,(%RDX)

  (3175) 0x4cd4d2 INC	%R9

  (3175) 0x4cd4d5 CMP	%R9,%R10

  (3175) 0x4cd4d8 JE	4cd608

  (3175) 0x4cd4de MOV	(%R15,%R9,8),%RSI

  (3175) 0x4cd4e2 CMP	%RAX,%RSI

  (3175) 0x4cd4e5 JE	4cd4c0

  (3175) 0x4cd4e7 CMP	%RDI,%RSI

  (3175) 0x4cd4ea JL	4cd4c0

  (3175) 0x4cd4ec CMP	-0x70(%RBP),%RSI

  (3175) 0x4cd4f0 JL	4cd4d2

  (3175) 0x4cd4f2 JMP	4cd4c0

0x4cd4f4 NOPW	%CS:(%RAX,%RAX,1)

(3171) 0x4cd500 MOV	%R8,%R11

(3171) 0x4cd503 SHR	$0x2,%R11

(3171) 0x4cd507 LEA	0x18(,%R9,8),%R14

(3171) 0x4cd50f JMP	4cd55f

0x4cd511 NOPW	%CS:(%RAX,%RAX,1)

0x4cd520 NOPW	%CS:(%RAX,%RAX,1)

0x4cd52f NOPW	%CS:(%RAX,%RAX,1)

0x4cd53e XCHG	%AX,%AX

  (3176) 0x4cd540 VMOVSD	(%R12,%R14,1),%XMM1

  (3176) 0x4cd546 VANDPD	%XMM5,%XMM1,%XMM1

  (3176) 0x4cd54a VADDSD	%XMM1,%XMM0,%XMM0

  (3176) 0x4cd54e VMOVSD	%XMM0,(%RDX)

  (3176) 0x4cd552 ADD	$0x20,%R14

  (3176) 0x4cd556 DEC	%R11

  (3176) 0x4cd559 JE	4cd48f

  (3176) 0x4cd55f MOV	-0x18(%R15,%R14,1),%RSI

  (3176) 0x4cd564 CMP	%RAX,%RSI

  (3176) 0x4cd567 JE	4cd574

  (3176) 0x4cd569 CMP	%RDI,%RSI

  (3176) 0x4cd56c JL	4cd574

  (3176) 0x4cd56e CMP	-0x70(%RBP),%RSI

  (3176) 0x4cd572 JL	4cd587

  (3176) 0x4cd574 VMOVSD	-0x18(%R12,%R14,1),%XMM1

  (3176) 0x4cd57b VANDPD	%XMM5,%XMM1,%XMM1

  (3176) 0x4cd57f VADDSD	%XMM1,%XMM0,%XMM0

  (3176) 0x4cd583 VMOVSD	%XMM0,(%RDX)

  (3176) 0x4cd587 MOV	-0x10(%R15,%R14,1),%RSI

  (3176) 0x4cd58c CMP	%RAX,%RSI

  (3176) 0x4cd58f JE	4cd59c

  (3176) 0x4cd591 CMP	%RDI,%RSI

  (3176) 0x4cd594 JL	4cd59c

  (3176) 0x4cd596 CMP	-0x70(%RBP),%RSI

  (3176) 0x4cd59a JL	4cd5af

  (3176) 0x4cd59c VMOVSD	-0x10(%R12,%R14,1),%XMM1

  (3176) 0x4cd5a3 VANDPD	%XMM5,%XMM1,%XMM1

  (3176) 0x4cd5a7 VADDSD	%XMM1,%XMM0,%XMM0

  (3176) 0x4cd5ab VMOVSD	%XMM0,(%RDX)

  (3176) 0x4cd5af MOV	-0x8(%R15,%R14,1),%RSI

  (3176) 0x4cd5b4 CMP	%RAX,%RSI

  (3176) 0x4cd5b7 JE	4cd5c4

  (3176) 0x4cd5b9 CMP	%RDI,%RSI

  (3176) 0x4cd5bc JL	4cd5c4

  (3176) 0x4cd5be CMP	-0x70(%RBP),%RSI

  (3176) 0x4cd5c2 JL	4cd5d7

  (3176) 0x4cd5c4 VMOVSD	-0x8(%R12,%R14,1),%XMM1

  (3176) 0x4cd5cb VANDPD	%XMM5,%XMM1,%XMM1

  (3176) 0x4cd5cf VADDSD	%XMM1,%XMM0,%XMM0

  (3176) 0x4cd5d3 VMOVSD	%XMM0,(%RDX)

  (3176) 0x4cd5d7 MOV	(%R15,%R14,1),%RSI

  (3176) 0x4cd5db CMP	%RAX,%RSI

  (3176) 0x4cd5de JE	4cd540

  (3176) 0x4cd5e4 CMP	%RDI,%RSI

  (3176) 0x4cd5e7 JL	4cd540

  (3176) 0x4cd5ed CMP	-0x70(%RBP),%RSI

  (3176) 0x4cd5f1 JL	4cd552

  (3176) 0x4cd5f7 JMP	4cd540

0x4cd5fc NOPL	(%RAX)

(3171) 0x4cd600 MOV	-0x50(%RBP),%R14

(3171) 0x4cd604 MOV	-0x48(%RBP),%R11

(3171) 0x4cd608 MOV	-0xa0(%RBP),%RSI

(3171) 0x4cd60f MOV	(%RSI,%RAX,8),%R8

(3171) 0x4cd613 MOV	0x8(%RSI,%RAX,8),%RAX

(3171) 0x4cd618 MOV	%RAX,%R10

(3171) 0x4cd61b SUB	%R8,%R10

(3171) 0x4cd61e MOV	-0x80(%RBP),%R9

(3171) 0x4cd622 JLE	4cd44c

(3171) 0x4cd628 LEA	-0x8(%R14,%RAX,8),%RSI

(3171) 0x4cd62d LEA	(%R14,%R8,8),%R11

(3171) 0x4cd631 CMP	%RDX,%RSI

(3171) 0x4cd634 JB	4cd680

(3171) 0x4cd636 CMP	%R11,%RDX

(3171) 0x4cd639 JB	4cd680

(3171) 0x4cd63b MOV	-0x48(%RBP),%R11

(3171) 0x4cd63f NOP

  (3174) 0x4cd640 VMOVSD	(%R14,%R8,8),%XMM1

  (3174) 0x4cd646 VANDPD	%XMM5,%XMM1,%XMM1

  (3174) 0x4cd64a VADDSD	%XMM1,%XMM0,%XMM0

  (3174) 0x4cd64e VMOVSD	%XMM0,(%RDX)

  (3174) 0x4cd652 INC	%R8

  (3174) 0x4cd655 CMP	%R8,%RAX

  (3174) 0x4cd658 JNE	4cd640

(3171) 0x4cd65a JMP	4cd44c

0x4cd65f NOPW	%CS:(%RAX,%RAX,1)

0x4cd66e NOPW	%CS:(%RAX,%RAX,1)

0x4cd67d NOPL	(%RAX)

(3171) 0x4cd680 MOV	%R10,%R9

(3171) 0x4cd683 AND	$-0x4,%R9

(3171) 0x4cd687 JE	4cd700

(3171) 0x4cd689 LEA	-0x1(%R9),%R14

(3171) 0x4cd68d VXORPD	%XMM1,%XMM1,%XMM1

(3171) 0x4cd691 XOR	%ESI,%ESI

(3171) 0x4cd693 NOPW	%CS:(%RAX,%RAX,1)

  (3173) 0x4cd6a0 VANDPD	(%R11,%RSI,8),%YMM6,%YMM2

  (3173) 0x4cd6a6 VADDPD	%YMM2,%YMM1,%YMM1

  (3173) 0x4cd6aa ADD	$0x4,%RSI

  (3173) 0x4cd6ae CMP	%R14,%RSI

  (3173) 0x4cd6b1 JBE	4cd6a0

(3171) 0x4cd6b3 VEXTRACTF128	$0x1,%YMM1,%XMM2

(3171) 0x4cd6b9 VADDPD	%XMM2,%XMM1,%XMM1

(3171) 0x4cd6bd VSHUFPD	$0x1,%XMM1,%XMM1,%XMM2

(3171) 0x4cd6c2 VADDSD	%XMM2,%XMM1,%XMM1

(3171) 0x4cd6c6 VADDSD	%XMM1,%XMM0,%XMM0

(3171) 0x4cd6ca CMP	%R9,%R10

(3171) 0x4cd6cd MOV	-0x50(%RBP),%R14

(3171) 0x4cd6d1 JE	4cd440

(3171) 0x4cd6d7 JMP	4cd703

0x4cd6d9 NOPW	%CS:(%RAX,%RAX,1)

0x4cd6e8 NOPW	%CS:(%RAX,%RAX,1)

0x4cd6f7 NOPW	(%RAX,%RAX,1)

(3171) 0x4cd700 XOR	%R9D,%R9D

(3171) 0x4cd703 ADD	%R8,%R9

(3171) 0x4cd706 NOPW	%CS:(%RAX,%RAX,1)

  (3172) 0x4cd710 VMOVSD	(%R14,%R9,8),%XMM1

  (3172) 0x4cd716 VANDPD	%XMM5,%XMM1,%XMM1

  (3172) 0x4cd71a VADDSD	%XMM1,%XMM0,%XMM0

  (3172) 0x4cd71e INC	%R9

  (3172) 0x4cd721 CMP	%R9,%RAX

  (3172) 0x4cd724 JNE	4cd710

(3171) 0x4cd726 JMP	4cd440

0x4cd72b NOPW	%CS:(%RAX,%RAX,1)

0x4cd73a NOPW	(%RAX,%RAX,1)

0x4cd740 IMUL	%R10,%RAX

0x4cd744 ADD	%RAX,%R13

0x4cd747 XOR	%EAX,%EAX

0x4cd749 JMP	4cd79a

0x4cd74b NOPW	%CS:(%RAX,%RAX,1)

0x4cd75a NOPW	%CS:(%RAX,%RAX,1)

0x4cd769 NOPW	%CS:(%RAX,%RAX,1)

0x4cd778 NOPL	(%RAX,%RAX,1)

(3157) 0x4cd780 VMOVSD	%XMM0,(%R8)

(3157) 0x4cd785 CMP	%RSI,%RAX

(3157) 0x4cd788 LEA	0x1(%RAX),%RAX

(3157) 0x4cd78c MOV	-0x30(%RBP),%RDI

(3157) 0x4cd790 MOV	-0x80(%RBP),%R9

(3157) 0x4cd794 JE	4cdb00

(3157) 0x4cd79a LEA	(%R13,%RAX,1),%RCX

(3157) 0x4cd79f MOVQ	$0,(%RDI,%RCX,8)

(3157) 0x4cd7a7 MOV	%R9,%RDX

(3157) 0x4cd7aa MOV	(%R9,%RCX,8),%R9

(3157) 0x4cd7ae MOV	0x8(%RDX,%RCX,8),%RDI

(3157) 0x4cd7b3 MOV	%RDI,%R11

(3157) 0x4cd7b6 SUB	%R9,%R11

(3157) 0x4cd7b9 JLE	4cd785

(3157) 0x4cd7bb MOV	-0x30(%RBP),%RDX

(3157) 0x4cd7bf LEA	(%RDX,%RCX,8),%R8

(3157) 0x4cd7c3 LEA	-0x8(%R12,%RDI,8),%RCX

(3157) 0x4cd7c8 LEA	(%R12,%R9,8),%RDX

(3157) 0x4cd7cc CMP	%R8,%RCX

(3157) 0x4cd7cf JB	4cd800

(3157) 0x4cd7d1 CMP	%RDX,%R8

(3157) 0x4cd7d4 JB	4cd800

(3157) 0x4cd7d6 VXORPD	%XMM0,%XMM0,%XMM0

(3157) 0x4cd7da NOPW	(%RAX,%RAX,1)

  (3160) 0x4cd7e0 VMOVSD	(%R12,%R9,8),%XMM1

  (3160) 0x4cd7e6 VFMADD231SD	%XMM1,%XMM1,%XMM0

  (3160) 0x4cd7eb VMOVSD	%XMM0,(%R8)

  (3160) 0x4cd7f0 INC	%R9

  (3160) 0x4cd7f3 CMP	%R9,%RDI

  (3160) 0x4cd7f6 JNE	4cd7e0

(3157) 0x4cd7f8 JMP	4cd785

0x4cd7fa NOPW	(%RAX,%RAX,1)

(3157) 0x4cd800 MOV	%R11,%R10

(3157) 0x4cd803 AND	$-0x4,%R10

(3157) 0x4cd807 JE	4cd880

(3157) 0x4cd809 LEA	-0x1(%R10),%RCX

(3157) 0x4cd80d VXORPD	%XMM0,%XMM0,%XMM0

(3157) 0x4cd811 XOR	%ESI,%ESI

(3157) 0x4cd813 NOPW	%CS:(%RAX,%RAX,1)

  (3159) 0x4cd820 VMOVUPD	(%RDX,%RSI,8),%YMM1

  (3159) 0x4cd825 VFMADD231PD	%YMM1,%YMM1,%YMM0

  (3159) 0x4cd82a ADD	$0x4,%RSI

  (3159) 0x4cd82e CMP	%RCX,%RSI

  (3159) 0x4cd831 JBE	4cd820

(3157) 0x4cd833 VEXTRACTF128	$0x1,%YMM0,%XMM1

(3157) 0x4cd839 VADDPD	%XMM1,%XMM0,%XMM0

(3157) 0x4cd83d VSHUFPD	$0x1,%XMM0,%XMM0,%XMM1

(3157) 0x4cd842 VADDSD	%XMM1,%XMM0,%XMM0

(3157) 0x4cd846 CMP	%R10,%R11

(3157) 0x4cd849 MOV	-0x40(%RBP),%RSI

(3157) 0x4cd84d JE	4cd780

(3157) 0x4cd853 JMP	4cd887

0x4cd855 NOPW	%CS:(%RAX,%RAX,1)

0x4cd864 NOPW	%CS:(%RAX,%RAX,1)

0x4cd873 NOPW	%CS:(%RAX,%RAX,1)

(3157) 0x4cd880 VXORPD	%XMM0,%XMM0,%XMM0

(3157) 0x4cd884 XOR	%R10D,%R10D

(3157) 0x4cd887 ADD	%R9,%R10

(3157) 0x4cd88a NOPW	(%RAX,%RAX,1)

  (3158) 0x4cd890 VMOVSD	(%R12,%R10,8),%XMM1

  (3158) 0x4cd896 VFMADD231SD	%XMM1,%XMM1,%XMM0

  (3158) 0x4cd89b INC	%R10

  (3158) 0x4cd89e CMP	%R10,%RDI

  (3158) 0x4cd8a1 JNE	4cd890

(3157) 0x4cd8a3 JMP	4cd780

0x4cd8a8 NOPW	%CS:(%RAX,%RAX,1)

0x4cd8b7 NOPW	(%RAX,%RAX,1)

0x4cd8c0 MOV	-0x78(%RBP),%RAX

0x4cd8c4 IMUL	%R10,%RAX

0x4cd8c8 MOV	-0x90(%RBP),%R13

0x4cd8cf ADD	%RAX,%R13

0x4cd8d2 XOR	%EAX,%EAX

0x4cd8d4 JMP	4cd912

0x4cd8d6 NOPW	%CS:(%RAX,%RAX,1)

0x4cd8e5 NOPW	%CS:(%RAX,%RAX,1)

0x4cd8f4 NOPW	%CS:(%RAX,%RAX,1)

(3196) 0x4cd900 CMP	-0x40(%RBP),%RAX

(3196) 0x4cd904 LEA	0x1(%RAX),%RAX

(3196) 0x4cd908 MOV	-0x80(%RBP),%R9

(3196) 0x4cd90c JE	4cdb00

(3196) 0x4cd912 LEA	(%R13,%RAX,1),%RCX

(3196) 0x4cd917 MOVQ	$0,(%RDI,%RCX,8)

(3196) 0x4cd91f MOV	(%R9,%RCX,8),%RDX

(3196) 0x4cd923 MOV	0x8(%R9,%RCX,8),%R9

(3196) 0x4cd928 MOV	%R9,%R11

(3196) 0x4cd92b SUB	%RDX,%R11

(3196) 0x4cd92e JLE	4cd900

(3196) 0x4cd930 MOV	(%R8,%RCX,8),%R10

(3196) 0x4cd934 VXORPD	%XMM0,%XMM0,%XMM0

(3196) 0x4cd938 CMP	$0x4,%R11

(3196) 0x4cd93c JAE	4cd9c0

(3196) 0x4cd942 MOV	%R11,%RSI

(3196) 0x4cd945 AND	$-0x4,%RSI

(3196) 0x4cd949 CMP	%R11,%RSI

(3196) 0x4cd94c MOV	-0x50(%RBP),%R14

(3196) 0x4cd950 MOV	-0x38(%RBP),%R8

(3196) 0x4cd954 MOV	-0x58(%RBP),%RBX

(3196) 0x4cd958 JAE	4cd900

(3196) 0x4cd95a ADD	%RSI,%RDX

(3196) 0x4cd95d JMP	4cd98c

0x4cd95f NOPW	%CS:(%RAX,%RAX,1)

0x4cd96e NOPW	%CS:(%RAX,%RAX,1)

0x4cd97d NOPL	(%RAX)

  (3197) 0x4cd980 INC	%RDX

  (3197) 0x4cd983 CMP	%RDX,%R9

  (3197) 0x4cd986 JE	4cd900

  (3197) 0x4cd98c MOV	(%R15,%RDX,8),%RSI

  (3197) 0x4cd990 CMP	(%R8,%RSI,8),%R10

  (3197) 0x4cd994 JNE	4cd980

  (3197) 0x4cd996 VMOVSD	(%R12,%RDX,8),%XMM1

  (3197) 0x4cd99c VANDPD	%XMM5,%XMM1,%XMM1

  (3197) 0x4cd9a0 VADDSD	%XMM1,%XMM0,%XMM0

  (3197) 0x4cd9a4 VMOVSD	%XMM0,(%RDI,%RCX,8)

  (3197) 0x4cd9a9 JMP	4cd980

0x4cd9ab NOPW	%CS:(%RAX,%RAX,1)

0x4cd9ba NOPW	(%RAX,%RAX,1)

(3196) 0x4cd9c0 MOV	%R11,%R14

(3196) 0x4cd9c3 SHR	$0x2,%R14

(3196) 0x4cd9c7 LEA	0x18(,%RDX,8),%R8

(3196) 0x4cd9cf JMP	4cda0d

0x4cd9d1 NOPW	%CS:(%RAX,%RAX,1)

0x4cd9e0 NOPW	%CS:(%RAX,%RAX,1)

0x4cd9ef NOPW	%CS:(%RAX,%RAX,1)

0x4cd9fe XCHG	%AX,%AX

  (3198) 0x4cda00 ADD	$0x20,%R8

  (3198) 0x4cda04 DEC	%R14

  (3198) 0x4cda07 JE	4cd942

  (3198) 0x4cda0d MOV	-0x18(%R15,%R8,1),%RSI

  (3198) 0x4cda12 MOV	-0x38(%RBP),%RBX

  (3198) 0x4cda16 CMP	(%RBX,%RSI,8),%R10

  (3198) 0x4cda1a JNE	4cda80

  (3198) 0x4cda1c VMOVSD	-0x18(%R12,%R8,1),%XMM1

  (3198) 0x4cda23 VANDPD	%XMM5,%XMM1,%XMM1

  (3198) 0x4cda27 VADDSD	%XMM1,%XMM0,%XMM0

  (3198) 0x4cda2b VMOVSD	%XMM0,(%RDI,%RCX,8)

  (3198) 0x4cda30 MOV	-0x10(%R15,%R8,1),%RSI

  (3198) 0x4cda35 MOV	-0x38(%RBP),%RBX

  (3198) 0x4cda39 CMP	(%RBX,%RSI,8),%R10

  (3198) 0x4cda3d JE	4cda8f

  (3198) 0x4cda3f MOV	-0x8(%R15,%R8,1),%RSI

  (3198) 0x4cda44 MOV	-0x38(%RBP),%RBX

  (3198) 0x4cda48 CMP	(%RBX,%RSI,8),%R10

  (3198) 0x4cda4c JNE	4cdab2

  (3198) 0x4cda4e VMOVSD	-0x8(%R12,%R8,1),%XMM1

  (3198) 0x4cda55 VANDPD	%XMM5,%XMM1,%XMM1

  (3198) 0x4cda59 VADDSD	%XMM1,%XMM0,%XMM0

  (3198) 0x4cda5d VMOVSD	%XMM0,(%RDI,%RCX,8)

  (3198) 0x4cda62 MOV	(%R15,%R8,1),%RSI

  (3198) 0x4cda66 MOV	-0x38(%RBP),%RBX

  (3198) 0x4cda6a CMP	(%RBX,%RSI,8),%R10

  (3198) 0x4cda6e JNE	4cda00

  (3198) 0x4cda70 JMP	4cdac4

0x4cda72 NOPW	%CS:(%RAX,%RAX,1)

  (3198) 0x4cda80 MOV	-0x10(%R15,%R8,1),%RSI

  (3198) 0x4cda85 MOV	-0x38(%RBP),%RBX

  (3198) 0x4cda89 CMP	(%RBX,%RSI,8),%R10

  (3198) 0x4cda8d JNE	4cda3f

  (3198) 0x4cda8f VMOVSD	-0x10(%R12,%R8,1),%XMM1

  (3198) 0x4cda96 VANDPD	%XMM5,%XMM1,%XMM1

  (3198) 0x4cda9a VADDSD	%XMM1,%XMM0,%XMM0

  (3198) 0x4cda9e VMOVSD	%XMM0,(%RDI,%RCX,8)

  (3198) 0x4cdaa3 MOV	-0x8(%R15,%R8,1),%RSI

  (3198) 0x4cdaa8 MOV	-0x38(%RBP),%RBX

  (3198) 0x4cdaac CMP	(%RBX,%RSI,8),%R10

  (3198) 0x4cdab0 JE	4cda4e

  (3198) 0x4cdab2 MOV	(%R15,%R8,1),%RSI

  (3198) 0x4cdab6 MOV	-0x38(%RBP),%RBX

  (3198) 0x4cdaba CMP	(%RBX,%RSI,8),%R10

  (3198) 0x4cdabe JNE	4cda00

  (3198) 0x4cdac4 VMOVSD	(%R12,%R8,1),%XMM1

  (3198) 0x4cdaca VANDPD	%XMM5,%XMM1,%XMM1

  (3198) 0x4cdace VADDSD	%XMM1,%XMM0,%XMM0

  (3198) 0x4cdad2 VMOVSD	%XMM0,(%RDI,%RCX,8)

  (3198) 0x4cdad7 JMP	4cda00

0x4cdadc NOPW	%CS:(%RAX,%RAX,1)

0x4cdaeb NOPW	%CS:(%RAX,%RAX,1)

0x4cdafa NOPW	(%RAX,%RAX,1)

0x4cdb00 MOV	-0x48(%RBP),%R11

0x4cdb04 JMP	4ce1d0

0x4cdb09 NOPW	%CS:(%RAX,%RAX,1)

0x4cdb18 NOPW	%CS:(%RAX,%RAX,1)

0x4cdb27 NOPW	%CS:(%RAX,%RAX,1)

0x4cdb36 NOPW	%CS:(%RAX,%RAX,1)

0x4cdb40 MOV	-0x78(%RBP),%RAX

0x4cdb44 IMUL	%R10,%RAX

0x4cdb48 ADD	%RAX,%RDI

0x4cdb4b XOR	%ECX,%ECX

0x4cdb4d MOV	-0x40(%RBP),%R13

0x4cdb51 JMP	4cdb91

0x4cdb53 NOPW	%CS:(%RAX,%RAX,1)

0x4cdb62 NOPW	%CS:(%RAX,%RAX,1)

0x4cdb71 NOPW	%CS:(%RAX,%RAX,1)

(3177) 0x4cdb80 CMP	%R13,%RCX

(3177) 0x4cdb83 LEA	0x1(%RCX),%RCX

(3177) 0x4cdb87 MOV	-0x80(%RBP),%R9

(3177) 0x4cdb8b JE	4cddc0

(3177) 0x4cdb91 LEA	(%RDI,%RCX,1),%RDX

(3177) 0x4cdb95 MOV	-0x30(%RBP),%RAX

(3177) 0x4cdb99 MOVQ	$0,(%RAX,%RDX,8)

(3177) 0x4cdba1 MOV	%R9,%RAX

(3177) 0x4cdba4 MOV	(%R9,%RDX,8),%R9

(3177) 0x4cdba8 MOV	0x8(%RAX,%RDX,8),%R10

(3177) 0x4cdbad MOV	%R10,%RAX

(3177) 0x4cdbb0 SUB	%R9,%RAX

(3177) 0x4cdbb3 JLE	4cdb80

(3177) 0x4cdbb5 MOV	(%R8,%RDX,8),%R11

(3177) 0x4cdbb9 VXORPD	%XMM0,%XMM0,%XMM0

(3177) 0x4cdbbd CMP	$0x4,%RAX

(3177) 0x4cdbc1 JAE	4cdc40

(3177) 0x4cdbc7 MOV	%RAX,%RSI

(3177) 0x4cdbca AND	$-0x4,%RSI

(3177) 0x4cdbce CMP	%RAX,%RSI

(3177) 0x4cdbd1 MOV	-0x50(%RBP),%R14

(3177) 0x4cdbd5 MOV	-0x38(%RBP),%R8

(3177) 0x4cdbd9 JAE	4cdb80

(3177) 0x4cdbdb ADD	%RSI,%R9

(3177) 0x4cdbde JMP	4cdc0c

0x4cdbe0 NOPW	%CS:(%RAX,%RAX,1)

0x4cdbef NOPW	%CS:(%RAX,%RAX,1)

0x4cdbfe XCHG	%AX,%AX

  (3178) 0x4cdc00 INC	%R9

  (3178) 0x4cdc03 CMP	%R9,%R10

  (3178) 0x4cdc06 JE	4cdb80

  (3178) 0x4cdc0c MOV	(%R15,%R9,8),%RAX

  (3178) 0x4cdc10 CMP	%RDX,%RAX

  (3178) 0x4cdc13 JE	4cdc20

  (3178) 0x4cdc15 CMP	%RDI,%RAX

  (3178) 0x4cdc18 JL	4cdc20

  (3178) 0x4cdc1a CMP	-0x70(%RBP),%RAX

  (3178) 0x4cdc1e JL	4cdc00

  (3178) 0x4cdc20 CMP	(%R8,%RAX,8),%R11

  (3178) 0x4cdc24 JNE	4cdc00

  (3178) 0x4cdc26 VMOVSD	(%R12,%R9,8),%XMM1

  (3178) 0x4cdc2c VANDPD	%XMM5,%XMM1,%XMM1

  (3178) 0x4cdc30 VADDSD	%XMM1,%XMM0,%XMM0

  (3178) 0x4cdc34 MOV	-0x30(%RBP),%RAX

  (3178) 0x4cdc38 VMOVSD	%XMM0,(%RAX,%RDX,8)

  (3178) 0x4cdc3d JMP	4cdc00

0x4cdc3f NOP

(3177) 0x4cdc40 MOV	%RAX,%R8

(3177) 0x4cdc43 SHR	$0x2,%R8

(3177) 0x4cdc47 LEA	0x18(,%R9,8),%R14

(3177) 0x4cdc4f JMP	4cdc91

0x4cdc51 NOPW	%CS:(%RAX,%RAX,1)

0x4cdc60 NOPW	%CS:(%RAX,%RAX,1)

0x4cdc6f NOPW	%CS:(%RAX,%RAX,1)

0x4cdc7e XCHG	%AX,%AX

  (3179) 0x4cdc80 MOV	-0x58(%RBP),%RBX

  (3179) 0x4cdc84 ADD	$0x20,%R14

  (3179) 0x4cdc88 DEC	%R8

  (3179) 0x4cdc8b JE	4cdbc7

  (3179) 0x4cdc91 MOV	-0x18(%R15,%R14,1),%RSI

  (3179) 0x4cdc96 CMP	%RDX,%RSI

  (3179) 0x4cdc99 JE	4cdca6

  (3179) 0x4cdc9b CMP	%RDI,%RSI

  (3179) 0x4cdc9e JL	4cdca6

  (3179) 0x4cdca0 CMP	-0x70(%RBP),%RSI

  (3179) 0x4cdca4 JL	4cdccc

  (3179) 0x4cdca6 MOV	-0x38(%RBP),%RBX

  (3179) 0x4cdcaa CMP	(%RBX,%RSI,8),%R11

  (3179) 0x4cdcae JNE	4cdcc8

  (3179) 0x4cdcb0 VMOVSD	-0x18(%R12,%R14,1),%XMM1

  (3179) 0x4cdcb7 VANDPD	%XMM5,%XMM1,%XMM1

  (3179) 0x4cdcbb VADDSD	%XMM1,%XMM0,%XMM0

  (3179) 0x4cdcbf MOV	-0x30(%RBP),%RSI

  (3179) 0x4cdcc3 VMOVSD	%XMM0,(%RSI,%RDX,8)

  (3179) 0x4cdcc8 MOV	-0x58(%RBP),%RBX

  (3179) 0x4cdccc MOV	-0x10(%R15,%R14,1),%RSI

  (3179) 0x4cdcd1 CMP	%RDX,%RSI

  (3179) 0x4cdcd4 JE	4cdce1

  (3179) 0x4cdcd6 CMP	%RDI,%RSI

  (3179) 0x4cdcd9 JL	4cdce1

  (3179) 0x4cdcdb CMP	-0x70(%RBP),%RSI

  (3179) 0x4cdcdf JL	4cdd07

  (3179) 0x4cdce1 MOV	-0x38(%RBP),%RBX

  (3179) 0x4cdce5 CMP	(%RBX,%RSI,8),%R11

  (3179) 0x4cdce9 JNE	4cdd03

  (3179) 0x4cdceb VMOVSD	-0x10(%R12,%R14,1),%XMM1

  (3179) 0x4cdcf2 VANDPD	%XMM5,%XMM1,%XMM1

  (3179) 0x4cdcf6 VADDSD	%XMM1,%XMM0,%XMM0

  (3179) 0x4cdcfa MOV	-0x30(%RBP),%RSI

  (3179) 0x4cdcfe VMOVSD	%XMM0,(%RSI,%RDX,8)

  (3179) 0x4cdd03 MOV	-0x58(%RBP),%RBX

  (3179) 0x4cdd07 MOV	-0x8(%R15,%R14,1),%RSI

  (3179) 0x4cdd0c CMP	%RDX,%RSI

  (3179) 0x4cdd0f JE	4cdd1c

  (3179) 0x4cdd11 CMP	%RDI,%RSI

  (3179) 0x4cdd14 JL	4cdd1c

  (3179) 0x4cdd16 CMP	-0x70(%RBP),%RSI

  (3179) 0x4cdd1a JL	4cdd42

  (3179) 0x4cdd1c MOV	-0x38(%RBP),%RBX

  (3179) 0x4cdd20 CMP	(%RBX,%RSI,8),%R11

  (3179) 0x4cdd24 JNE	4cdd3e

  (3179) 0x4cdd26 VMOVSD	-0x8(%R12,%R14,1),%XMM1

  (3179) 0x4cdd2d VANDPD	%XMM5,%XMM1,%XMM1

  (3179) 0x4cdd31 VADDSD	%XMM1,%XMM0,%XMM0

  (3179) 0x4cdd35 MOV	-0x30(%RBP),%RSI

  (3179) 0x4cdd39 VMOVSD	%XMM0,(%RSI,%RDX,8)

  (3179) 0x4cdd3e MOV	-0x58(%RBP),%RBX

  (3179) 0x4cdd42 MOV	(%R15,%R14,1),%RSI

  (3179) 0x4cdd46 CMP	%RDX,%RSI

  (3179) 0x4cdd49 JE	4cdd5a

  (3179) 0x4cdd4b CMP	%RDI,%RSI

  (3179) 0x4cdd4e JL	4cdd5a

  (3179) 0x4cdd50 CMP	-0x70(%RBP),%RSI

  (3179) 0x4cdd54 JL	4cdc84

  (3179) 0x4cdd5a MOV	-0x38(%RBP),%RBX

  (3179) 0x4cdd5e CMP	(%RBX,%RSI,8),%R11

  (3179) 0x4cdd62 JNE	4cdc80

  (3179) 0x4cdd68 VMOVSD	(%R12,%R14,1),%XMM1

  (3179) 0x4cdd6e VANDPD	%XMM5,%XMM1,%XMM1

  (3179) 0x4cdd72 VADDSD	%XMM1,%XMM0,%XMM0

  (3179) 0x4cdd76 MOV	-0x30(%RBP),%RSI

  (3179) 0x4cdd7a VMOVSD	%XMM0,(%RSI,%RDX,8)

  (3179) 0x4cdd7f JMP	4cdc80

0x4cdd84 NOPW	%CS:(%RAX,%RAX,1)

0x4cdd93 NOPW	%CS:(%RAX,%RAX,1)

0x4cdda2 NOPW	%CS:(%RAX,%RAX,1)

0x4cddb1 NOPW	%CS:(%RAX,%RAX,1)

0x4cddc0 MOV	-0x30(%RBP),%RDI

0x4cddc4 MOV	-0x48(%RBP),%R11

0x4cddc8 JMP	4ce1d0

0x4cddcd NOPW	%CS:(%RAX,%RAX,1)

0x4cdddc NOPW	%CS:(%RAX,%RAX,1)

0x4cddeb NOPW	%CS:(%RAX,%RAX,1)

0x4cddfa NOPW	(%RAX,%RAX,1)

0x4cde00 MOV	-0x78(%RBP),%RAX

0x4cde04 IMUL	%R10,%RAX

0x4cde08 MOV	-0x90(%RBP),%R13

0x4cde0f ADD	%RAX,%R13

0x4cde12 XOR	%EAX,%EAX

0x4cde14 JMP	4cde5a

0x4cde16 NOPW	%CS:(%RAX,%RAX,1)

0x4cde25 NOPW	%CS:(%RAX,%RAX,1)

0x4cde34 NOPW	%CS:(%RAX,%RAX,1)

(3185) 0x4cde40 VMOVSD	%XMM0,(%RDX)

(3185) 0x4cde44 MOV	-0x48(%RBP),%R11

(3185) 0x4cde48 CMP	-0x40(%RBP),%RAX

(3185) 0x4cde4c LEA	0x1(%RAX),%RAX

(3185) 0x4cde50 MOV	-0x80(%RBP),%R9

(3185) 0x4cde54 JE	4ce1d0

(3185) 0x4cde5a LEA	(%R13,%RAX,1),%RDX

(3185) 0x4cde5f MOVQ	$0,(%RDI,%RDX,8)

(3185) 0x4cde67 MOV	%R9,%RCX

(3185) 0x4cde6a MOV	(%R9,%RDX,8),%R9

(3185) 0x4cde6e MOV	0x8(%RCX,%RDX,8),%RCX

(3185) 0x4cde73 MOV	%RCX,%R10

(3185) 0x4cde76 SUB	%R9,%R10

(3185) 0x4cde79 JLE	4cde48

(3185) 0x4cde7b LEA	(%RDI,%RDX,8),%RDX

(3185) 0x4cde7f LEA	-0x8(%R12,%RCX,8),%RSI

(3185) 0x4cde84 LEA	(%R12,%R9,8),%R11

(3185) 0x4cde88 CMP	%RDX,%RSI

(3185) 0x4cde8b JB	4cdec0

(3185) 0x4cde8d CMP	%R11,%RDX

(3185) 0x4cde90 JB	4cdec0

(3185) 0x4cde92 VXORPD	%XMM0,%XMM0,%XMM0

(3185) 0x4cde96 MOV	-0x48(%RBP),%R11

(3185) 0x4cde9a NOPW	(%RAX,%RAX,1)

  (3188) 0x4cdea0 VMOVSD	(%R12,%R9,8),%XMM1

  (3188) 0x4cdea6 VANDPD	%XMM5,%XMM1,%XMM1

  (3188) 0x4cdeaa VADDSD	%XMM1,%XMM0,%XMM0

  (3188) 0x4cdeae VMOVSD	%XMM0,(%RDX)

  (3188) 0x4cdeb2 INC	%R9

  (3188) 0x4cdeb5 CMP	%R9,%RCX

  (3188) 0x4cdeb8 JNE	4cdea0

(3185) 0x4cdeba JMP	4cde48

0x4cdebc NOPL	(%RAX)

(3185) 0x4cdec0 MOV	%R10,%R8

(3185) 0x4cdec3 AND	$-0x4,%R8

(3185) 0x4cdec7 JE	4cdf40

(3185) 0x4cdec9 LEA	-0x1(%R8),%RDI

(3185) 0x4cdecd VXORPD	%XMM0,%XMM0,%XMM0

(3185) 0x4cded1 XOR	%ESI,%ESI

(3185) 0x4cded3 NOPW	%CS:(%RAX,%RAX,1)

  (3187) 0x4cdee0 VANDPD	(%R11,%RSI,8),%YMM6,%YMM1

  (3187) 0x4cdee6 VADDPD	%YMM1,%YMM0,%YMM0

  (3187) 0x4cdeea ADD	$0x4,%RSI

  (3187) 0x4cdeee CMP	%RDI,%RSI

  (3187) 0x4cdef1 JBE	4cdee0

(3185) 0x4cdef3 VEXTRACTF128	$0x1,%YMM0,%XMM1

(3185) 0x4cdef9 VADDPD	%XMM1,%XMM0,%XMM0

(3185) 0x4cdefd VSHUFPD	$0x1,%XMM0,%XMM0,%XMM1

(3185) 0x4cdf02 VADDSD	%XMM1,%XMM0,%XMM0

(3185) 0x4cdf06 CMP	%R8,%R10

(3185) 0x4cdf09 MOV	-0x30(%RBP),%RDI

(3185) 0x4cdf0d JE	4cde40

(3185) 0x4cdf13 JMP	4cdf47

0x4cdf15 NOPW	%CS:(%RAX,%RAX,1)

0x4cdf24 NOPW	%CS:(%RAX,%RAX,1)

0x4cdf33 NOPW	%CS:(%RAX,%RAX,1)

(3185) 0x4cdf40 VXORPD	%XMM0,%XMM0,%XMM0

(3185) 0x4cdf44 XOR	%R8D,%R8D

(3185) 0x4cdf47 ADD	%R9,%R8

(3185) 0x4cdf4a NOPW	(%RAX,%RAX,1)

  (3186) 0x4cdf50 VMOVSD	(%R12,%R8,8),%XMM1

  (3186) 0x4cdf56 VANDPD	%XMM5,%XMM1,%XMM1

  (3186) 0x4cdf5a VADDSD	%XMM1,%XMM0,%XMM0

  (3186) 0x4cdf5e INC	%R8

  (3186) 0x4cdf61 CMP	%R8,%RCX

  (3186) 0x4cdf64 JNE	4cdf50

(3185) 0x4cdf66 JMP	4cde40

0x4cdf6b NOPW	%CS:(%RAX,%RAX,1)

0x4cdf7a NOPW	(%RAX,%RAX,1)

0x4cdf80 MOV	-0x78(%RBP),%RAX

0x4cdf84 IMUL	%R10,%RAX

0x4cdf88 ADD	%RAX,%RDI

0x4cdf8b XOR	%EAX,%EAX

0x4cdf8d MOV	-0x40(%RBP),%R13

0x4cdf91 JMP	4cdfd1

0x4cdf93 NOPW	%CS:(%RAX,%RAX,1)

0x4cdfa2 NOPW	%CS:(%RAX,%RAX,1)

0x4cdfb1 NOPW	%CS:(%RAX,%RAX,1)

(3168) 0x4cdfc0 CMP	%R13,%RAX

(3168) 0x4cdfc3 LEA	0x1(%RAX),%RAX

(3168) 0x4cdfc7 MOV	-0x80(%RBP),%R9

(3168) 0x4cdfcb JE	4ce1c0

(3168) 0x4cdfd1 LEA	(%RDI,%RAX,1),%RCX

(3168) 0x4cdfd5 MOV	-0x30(%RBP),%RDX

(3168) 0x4cdfd9 MOVQ	$0,(%RDX,%RCX,8)

(3168) 0x4cdfe1 MOV	(%R9,%RCX,8),%RDX

(3168) 0x4cdfe5 MOV	0x8(%R9,%RCX,8),%R9

(3168) 0x4cdfea MOV	%R9,%R8

(3168) 0x4cdfed SUB	%RDX,%R8

(3168) 0x4cdff0 JLE	4cdfc0

(3168) 0x4cdff2 VXORPD	%XMM0,%XMM0,%XMM0

(3168) 0x4cdff6 CMP	$0x4,%R8

(3168) 0x4cdffa JAE	4ce080

(3168) 0x4ce000 MOV	%R8,%RSI

(3168) 0x4ce003 AND	$-0x4,%RSI

(3168) 0x4ce007 CMP	%R8,%RSI

(3168) 0x4ce00a MOV	-0x48(%RBP),%R11

(3168) 0x4ce00e JAE	4cdfc0

(3168) 0x4ce010 ADD	%RSI,%RDX

(3168) 0x4ce013 JMP	4ce063

0x4ce015 NOPW	%CS:(%RAX,%RAX,1)

0x4ce024 NOPW	%CS:(%RAX,%RAX,1)

0x4ce033 NOPW	%CS:(%RAX,%RAX,1)

  (3169) 0x4ce040 VMOVSD	(%R12,%RDX,8),%XMM1

  (3169) 0x4ce046 VANDPD	%XMM5,%XMM1,%XMM1

  (3169) 0x4ce04a VADDSD	%XMM1,%XMM0,%XMM0

  (3169) 0x4ce04e MOV	-0x30(%RBP),%RSI

  (3169) 0x4ce052 VMOVSD	%XMM0,(%RSI,%RCX,8)

  (3169) 0x4ce057 INC	%RDX

  (3169) 0x4ce05a CMP	%RDX,%R9

  (3169) 0x4ce05d JE	4cdfc0

  (3169) 0x4ce063 MOV	(%R15,%RDX,8),%RSI

  (3169) 0x4ce067 CMP	%RCX,%RSI

  (3169) 0x4ce06a JE	4ce040

  (3169) 0x4ce06c CMP	%RDI,%RSI

  (3169) 0x4ce06f JL	4ce040

  (3169) 0x4ce071 CMP	-0x70(%RBP),%RSI

  (3169) 0x4ce075 JL	4ce057

  (3169) 0x4ce077 JMP	4ce040

0x4ce079 NOPL	(%RAX)

(3168) 0x4ce080 MOV	%R8,%R10

(3168) 0x4ce083 SHR	$0x2,%R10

(3168) 0x4ce087 LEA	0x18(,%RDX,8),%R11

(3168) 0x4ce08f JMP	4ce0e4

0x4ce091 NOPW	%CS:(%RAX,%RAX,1)

0x4ce0a0 NOPW	%CS:(%RAX,%RAX,1)

0x4ce0af NOPW	%CS:(%RAX,%RAX,1)

0x4ce0be XCHG	%AX,%AX

  (3170) 0x4ce0c0 VMOVSD	(%R12,%R11,1),%XMM1

  (3170) 0x4ce0c6 VANDPD	%XMM5,%XMM1,%XMM1

  (3170) 0x4ce0ca VADDSD	%XMM1,%XMM0,%XMM0

  (3170) 0x4ce0ce MOV	-0x30(%RBP),%RSI

  (3170) 0x4ce0d2 VMOVSD	%XMM0,(%RSI,%RCX,8)

  (3170) 0x4ce0d7 ADD	$0x20,%R11

  (3170) 0x4ce0db DEC	%R10

  (3170) 0x4ce0de JE	4ce000

  (3170) 0x4ce0e4 MOV	-0x18(%R15,%R11,1),%RSI

  (3170) 0x4ce0e9 CMP	%RCX,%RSI

  (3170) 0x4ce0ec JE	4ce0f9

  (3170) 0x4ce0ee CMP	%RDI,%RSI

  (3170) 0x4ce0f1 JL	4ce0f9

  (3170) 0x4ce0f3 CMP	-0x70(%RBP),%RSI

  (3170) 0x4ce0f7 JL	4ce111

  (3170) 0x4ce0f9 VMOVSD	-0x18(%R12,%R11,1),%XMM1

  (3170) 0x4ce100 VANDPD	%XMM5,%XMM1,%XMM1

  (3170) 0x4ce104 VADDSD	%XMM1,%XMM0,%XMM0

  (3170) 0x4ce108 MOV	-0x30(%RBP),%RSI

  (3170) 0x4ce10c VMOVSD	%XMM0,(%RSI,%RCX,8)

  (3170) 0x4ce111 MOV	-0x10(%R15,%R11,1),%RSI

  (3170) 0x4ce116 CMP	%RCX,%RSI

  (3170) 0x4ce119 JE	4ce126

  (3170) 0x4ce11b CMP	%RDI,%RSI

  (3170) 0x4ce11e JL	4ce126

  (3170) 0x4ce120 CMP	-0x70(%RBP),%RSI

  (3170) 0x4ce124 JL	4ce13e

  (3170) 0x4ce126 VMOVSD	-0x10(%R12,%R11,1),%XMM1

  (3170) 0x4ce12d VANDPD	%XMM5,%XMM1,%XMM1

  (3170) 0x4ce131 VADDSD	%XMM1,%XMM0,%XMM0

  (3170) 0x4ce135 MOV	-0x30(%RBP),%RSI

  (3170) 0x4ce139 VMOVSD	%XMM0,(%RSI,%RCX,8)

  (3170) 0x4ce13e MOV	-0x8(%R15,%R11,1),%RSI

  (3170) 0x4ce143 CMP	%RCX,%RSI

  (3170) 0x4ce146 JE	4ce153

  (3170) 0x4ce148 CMP	%RDI,%RSI

  (3170) 0x4ce14b JL	4ce153

  (3170) 0x4ce14d CMP	-0x70(%RBP),%RSI

  (3170) 0x4ce151 JL	4ce16b

  (3170) 0x4ce153 VMOVSD	-0x8(%R12,%R11,1),%XMM1

  (3170) 0x4ce15a VANDPD	%XMM5,%XMM1,%XMM1

  (3170) 0x4ce15e VADDSD	%XMM1,%XMM0,%XMM0

  (3170) 0x4ce162 MOV	-0x30(%RBP),%RSI

  (3170) 0x4ce166 VMOVSD	%XMM0,(%RSI,%RCX,8)

  (3170) 0x4ce16b MOV	(%R15,%R11,1),%RSI

  (3170) 0x4ce16f CMP	%RCX,%RSI

  (3170) 0x4ce172 JE	4ce0c0

  (3170) 0x4ce178 CMP	%RDI,%RSI

  (3170) 0x4ce17b JL	4ce0c0

  (3170) 0x4ce181 CMP	-0x70(%RBP),%RSI

  (3170) 0x4ce185 JL	4ce0d7

  (3170) 0x4ce18b JMP	4ce0c0

0x4ce190 NOPW	%CS:(%RAX,%RAX,1)

0x4ce19f NOPW	%CS:(%RAX,%RAX,1)

0x4ce1ae NOPW	%CS:(%RAX,%RAX,1)

0x4ce1bd NOPL	(%RAX)

0x4ce1c0 MOV	-0x30(%RBP),%RDI

0x4ce1c4 NOPW	%CS:(%RAX,%RAX,1)

(3144) 0x4ce1d0 MOV	-0x70(%RBP),%RAX

(3144) 0x4ce1d4 CMP	%RAX,-0xa8(%RBP)

(3144) 0x4ce1db MOV	-0xf8(%RBP),%RDX

(3144) 0x4ce1e2 MOV	-0x88(%RBP),%R8

(3144) 0x4ce1e9 JGE	4cb9ac

(3144) 0x4ce1ef MOV	-0xb8(%RBP),%RAX

(3144) 0x4ce1f6 LEA	(,%RAX,8),%RCX

(3144) 0x4ce1fe MOV	-0xe8(%RBP),%RSI

(3144) 0x4ce205 CMP	%RDX,%RSI

(3144) 0x4ce208 MOV	%RDX,%RAX

(3144) 0x4ce20b CMOVL	%RSI,%RAX

(3144) 0x4ce20f MOV	-0x78(%RBP),%R10

(3144) 0x4ce213 SUB	%RAX,%R10

(3144) 0x4ce216 ADD	%R8,%R10

(3144) 0x4ce219 CMP	$0x4,%R10

(3144) 0x4ce21d JAE	4ce340

(3144) 0x4ce223 MOV	%R10,%RSI

(3144) 0x4ce226 AND	$-0x4,%RSI

(3144) 0x4ce22a CMP	%R10,%RSI

(3144) 0x4ce22d JAE	4ce2c0

(3144) 0x4ce233 MOV	-0x78(%RBP),%RSI

(3144) 0x4ce237 MOV	-0x88(%RBP),%RDI

(3144) 0x4ce23e ADD	%RDI,%RSI

(3144) 0x4ce241 MOV	%RSI,%RDI

(3144) 0x4ce244 MOV	-0xb8(%RBP),%R8

(3144) 0x4ce24b SUB	%R8,%RDI

(3144) 0x4ce24e AND	$-0x4,%RDI

(3144) 0x4ce252 ADD	%R8,%RDI

(3144) 0x4ce255 JMP	4ce288

0x4ce257 NOPW	%CS:(%RAX,%RAX,1)

0x4ce266 NOPW	%CS:(%RAX,%RAX,1)

0x4ce275 NOPW	%CS:(%RAX,%RAX,1)

  (3146) 0x4ce280 INC	%RDI

  (3146) 0x4ce283 CMP	%RDI,%RSI

  (3146) 0x4ce286 JE	4ce2c0

  (3146) 0x4ce288 MOV	-0x100(%RBP),%R8

  (3146) 0x4ce28f MOV	(%R8,%RDI,8),%R8

  (3146) 0x4ce293 VUCOMISD	(%R12,%R8,8),%XMM3

  (3146) 0x4ce299 JBE	4ce280

  (3146) 0x4ce29b MOV	-0xc0(%RBP),%R8

  (3146) 0x4ce2a2 VMOVSD	(%R8,%RDI,8),%XMM0

  (3146) 0x4ce2a8 VXORPD	%XMM4,%XMM0,%XMM0

  (3146) 0x4ce2ac VMOVLPD	%XMM0,(%R8,%RDI,8)

  (3146) 0x4ce2b2 JMP	4ce280

0x4ce2b4 NOPW	%CS:(%RAX,%RAX,1)

(3144) 0x4ce2c0 CMP	$0x2,%R10

(3144) 0x4ce2c4 MOV	-0x30(%RBP),%RDI

(3144) 0x4ce2c8 MOV	-0x88(%RBP),%R8

(3144) 0x4ce2cf JB	4ce30e

(3144) 0x4ce2d1 ADD	-0x78(%RBP),%R8

(3144) 0x4ce2d5 SUB	-0xb8(%RBP),%R8

(3144) 0x4ce2dc SHR	$0x1,%R8

(3144) 0x4ce2df NOP

  (3145) 0x4ce2e0 MOV	-0xc0(%RBP),%RSI

  (3145) 0x4ce2e7 VUCOMISD	(%RSI,%RCX,1),%XMM3

  (3145) 0x4ce2ec JE	4cb940

  (3145) 0x4ce2f2 MOV	-0xc0(%RBP),%RSI

  (3145) 0x4ce2f9 VUCOMISD	0x8(%RSI,%RCX,1),%XMM3

  (3145) 0x4ce2ff JE	4cb940

  (3145) 0x4ce305 ADD	$0x10,%RCX

  (3145) 0x4ce309 DEC	%R8

  (3145) 0x4ce30c JNE	4ce2e0

(3144) 0x4ce30e MOV	%R10,%RCX

(3144) 0x4ce311 AND	$-0x2,%RCX

(3144) 0x4ce315 CMP	%R10,%RCX

(3144) 0x4ce318 JAE	4cb9ac

(3144) 0x4ce31e MOV	-0x78(%RBP),%RSI

(3144) 0x4ce322 IMUL	-0xe8(%RBP),%RSI

(3144) 0x4ce32a ADD	%RCX,%RAX

(3144) 0x4ce32d ADD	%RSI,%RAX

(3144) 0x4ce330 VUCOMISD	(%RDI,%RAX,8),%XMM3

(3144) 0x4ce335 JE	4cb940

(3144) 0x4ce33b JMP	4cb9ac

(3144) 0x4ce340 MOV	-0x78(%RBP),%RSI

(3144) 0x4ce344 MOV	-0x88(%RBP),%RDI

(3144) 0x4ce34b ADD	%RDI,%RSI

(3144) 0x4ce34e SUB	-0xb8(%RBP),%RSI

(3144) 0x4ce355 SHR	$0x2,%RSI

(3144) 0x4ce359 MOV	%RCX,%RDI

(3144) 0x4ce35c JMP	4ce38d

0x4ce35e NOPW	%CS:(%RAX,%RAX,1)

0x4ce36d NOPW	%CS:(%RAX,%RAX,1)

0x4ce37c NOPL	(%RAX)

  (3147) 0x4ce380 ADD	$0x20,%RDI

  (3147) 0x4ce384 DEC	%RSI

  (3147) 0x4ce387 JE	4ce223

  (3147) 0x4ce38d MOV	-0x10(%R11,%RDI,1),%R8

  (3147) 0x4ce392 VUCOMISD	(%R12,%R8,8),%XMM3

  (3147) 0x4ce398 JBE	4ce400

  (3147) 0x4ce39a MOV	-0xb0(%RBP),%R8

  (3147) 0x4ce3a1 VMOVSD	-0x10(%R8,%RDI,1),%XMM0

  (3147) 0x4ce3a8 VXORPD	%XMM4,%XMM0,%XMM0

  (3147) 0x4ce3ac VMOVLPD	%XMM0,-0x10(%R8,%RDI,1)

  (3147) 0x4ce3b3 MOV	-0x8(%R11,%RDI,1),%R8

  (3147) 0x4ce3b8 VUCOMISD	(%R12,%R8,8),%XMM3

  (3147) 0x4ce3be JA	4ce40d

  (3147) 0x4ce3c0 MOV	(%R11,%RDI,1),%R8

  (3147) 0x4ce3c4 VUCOMISD	(%R12,%R8,8),%XMM3

  (3147) 0x4ce3ca JBE	4ce432

  (3147) 0x4ce3cc MOV	-0xb0(%RBP),%R8

  (3147) 0x4ce3d3 VMOVSD	(%R8,%RDI,1),%XMM0

  (3147) 0x4ce3d9 VXORPD	%XMM4,%XMM0,%XMM0

  (3147) 0x4ce3dd VMOVLPD	%XMM0,(%R8,%RDI,1)

  (3147) 0x4ce3e3 MOV	0x8(%R11,%RDI,1),%R8

  (3147) 0x4ce3e8 VUCOMISD	(%R12,%R8,8),%XMM3

  (3147) 0x4ce3ee JBE	4ce380

  (3147) 0x4ce3f0 JMP	4ce443

0x4ce3f2 NOPW	%CS:(%RAX,%RAX,1)

  (3147) 0x4ce400 MOV	-0x8(%R11,%RDI,1),%R8

  (3147) 0x4ce405 VUCOMISD	(%R12,%R8,8),%XMM3

  (3147) 0x4ce40b JBE	4ce3c0

  (3147) 0x4ce40d MOV	-0xb0(%RBP),%R8

  (3147) 0x4ce414 VMOVSD	-0x8(%R8,%RDI,1),%XMM0

  (3147) 0x4ce41b VXORPD	%XMM4,%XMM0,%XMM0

  (3147) 0x4ce41f VMOVLPD	%XMM0,-0x8(%R8,%RDI,1)

  (3147) 0x4ce426 MOV	(%R11,%RDI,1),%R8

  (3147) 0x4ce42a VUCOMISD	(%R12,%R8,8),%XMM3

  (3147) 0x4ce430 JA	4ce3cc

  (3147) 0x4ce432 MOV	0x8(%R11,%RDI,1),%R8

  (3147) 0x4ce437 VUCOMISD	(%R12,%R8,8),%XMM3

  (3147) 0x4ce43d JBE	4ce380

  (3147) 0x4ce443 MOV	-0xb0(%RBP),%R8

  (3147) 0x4ce44a VMOVSD	0x8(%R8,%RDI,1),%XMM0

  (3147) 0x4ce451 VXORPD	%XMM4,%XMM0,%XMM0

  (3147) 0x4ce455 VMOVLPD	%XMM0,0x8(%R8,%RDI,1)

  (3147) 0x4ce45c JMP	4ce380

0x4ce461 NOPW	%CS:(%RAX,%RAX,1)

Coverage (%)	Name	Source Location	Module
►100.00+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_4

Source file and lines	ams.c:3363-3540
Module	exec

The function is defined in /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/ams.c:3363-3409,3416-3451,3458-3479,3487-3540.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 88.50 to 13.80 cycles (6.41x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is probably not vectorized. Only 12% of vector register length is used (average across all SSE/AVX instructions).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers).

Workaround

Read the "512-bits vectorization" report at "Potential" confidence level.

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

512-bits vectorization

On some x86 processors supporting 512-bits vectorization, compilers are often too conservative and limit vectorization to 256 bits. Performance can then be improved by enforcing 512-bits vectorization, especially with many vectorized and high trip count loops. 512-bits vectorization performance overhead (compared to 256-bits) is generally lower on newer processors.

Workaround

Recompile with -mprefer-vector-width=512

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

__kmpc_for_static_init_8@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/ams.c:3363

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

ADD: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/ams.c:3384
DIV: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/ams.c:3367
IDIV: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/ams.c:3367
VZEROUPPER: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/ams.c:3363

Conversion instructions

Detected expensive conversion instructions.

Details

CQTO: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/ams.c:3367

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 536 bytes. The binary function is storing 248 bytes.

General properties

nb instructions	521
nb uops	531
loop length	4525
used x86 registers	16
used mmx registers	0
used xmm registers	5
used ymm registers	2
used zmm registers	0
nb stack references	40

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	88.50 cycles
front end	88.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	14.20	24.00	24.67	24.67	21.00	14.40	14.20	21.00	21.00	21.00	14.20	24.67
cycles	14.20	31.40	24.67	24.67	21.00	14.40	14.20	21.00	21.00	21.00	14.20	24.67

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

16.00

Cycles summary

Front-end	88.50
Dispatch	31.40
DIV/SQRT	16.00
Overall L1	88.50

Vectorization ratios

INT

all	1%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	4%

all	14%
load	0%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	33%

INT+FP

all	2%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	8%

Vector efficiency ratios

INT

all	12%
load	12%
store	11%
mul	12%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
other	12%

all	14%
load	12%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	16%

INT+FP

all	12%
load	12%
store	11%
mul	12%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	9%
other	13%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 88.50 cycles. At this rate:

3% of peak load performance is reached (6.06 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (2.80 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 88.50 to 31.40 cycles (2.82x speedup).

ASM code

In the binary file, the address of the function is: 4cb6b0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0x118,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV 0x50(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x48(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x40(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x98(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x38(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x50(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x30(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0xc8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x28(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0xa0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x20(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x18(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOVL $0,-0xf0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R9,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RCX,-0x70(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDX,-0xd0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R8,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV (%RDI),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOVQ $0,-0x108(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOVQ $0x1,-0x138(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
LEA -0x138(%RBP),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0xf0(%RBP),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x108(%RBP),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA 0x60(%RBP),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x55f910,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %ESI,-0xec(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
PUSH $0x1	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH $0x1	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RAX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
CALL 410430 <__kmpc_for_static_init_8@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %R14,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x30(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x50(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
ADD $0x20,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x108(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x60(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x130(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RCX,-0xe0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMP %RAX,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JBE 4cb800 <hypre_ParCSRComputeL1NormsThreads.extracted+0x150>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV $0x55f930,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0xec(%RBP),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD $0x118,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
JMP 410180 <__kmpc_for_static_fini@plt>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R13,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R13,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x70(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
OR %R13,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
SHR $0x20,%RCX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV -0xd0(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JE 4cb840 <hypre_ParCSRComputeL1NormsThreads.extracted+0x190>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CQTO	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	scal (12.5%)
IDIV %R13	5	0	3	0	0	0	0	0	0	0	0	0	0	11-16	10	scal (12.5%)
JMP 4cb845 <hypre_ParCSRComputeL1NormsThreads.extracted+0x195>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
DIV %R13D	4	0	3	0	0	0	0	0	0	0	0	0	0	11-16	6	scal (6.3%)
LEA 0x1(%RAX),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSI,-0x120(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA 0x8(%R12),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSI,-0x118(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA 0x8(%R15),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSI,-0x110(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0xe0(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %RAX,%RSI	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA 0x10(%R9,%RSI,8),%R11	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA (,%RAX,8),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R8,-0x128(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA 0x10(%RDI,%RSI,8),%R8	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
MOV %R8,-0xb0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA (%RDI,%RSI,8),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R8,-0xc0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA (%R9,%RSI,8),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSI,-0x100(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
DEC %RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,-0xd0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VXORPD %XMM3,%XMM3,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VMOVDDUP 0x5f302(%RIP),%XMM4	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVDDUP 0x5f7b2(%RIP),%XMM5	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VBROADCASTSD 0x5f7a9(%RIP),%YMM6	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	0.33	scal (12.5%)
VMOVSD 0x5f2d1(%RIP),%XMM7	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VBROADCASTSD 0x5f2c8(%RIP),%YMM8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	0.33	scal (12.5%)
VMOVSD 0x5f2d0(%RIP),%XMM9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %R9,-0x80(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RBX,-0x58(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDX,-0xf8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RAX,-0x78(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RAX,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 4cb9e3 <hypre_ParCSRComputeL1NormsThreads.extracted+0x333>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 0x538d60(,%RSI,8)	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	1	N/A
MOV -0x70(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RAX,-0xa8(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JGE 4ce1d0 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2b20>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RDX,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RDX,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMOVL %R10,%RAX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
MOV -0x78(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x90(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
SUB %RAX,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x88(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA -0x1(%RDX,%RCX,1),%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
TEST %R8,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
MOV -0xc8(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JE 4cd180 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1ad0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMPQ $0,-0x98(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 4cd8c0 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2210>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x78(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %R10,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %RAX,-0x90(%RBP)	2	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 4cbb12 <hypre_ParCSRComputeL1NormsThreads.extracted+0x462>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x70(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RAX,-0xa8(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JGE 4ce1d0 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2b20>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RDX,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RDX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMOVL %R10,%RDI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
MOV -0x78(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
SUB %RDI,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x88(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA -0x1(%RDX,%RCX,1),%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
TEST %R8,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
MOV -0xc8(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JE 4cd400 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1d50>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMPQ $0,-0x98(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 4cdb40 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2490>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x78(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %R10,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %RAX,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 4cbf92 <hypre_ParCSRComputeL1NormsThreads.extracted+0x8e2>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x70(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RAX,-0xa8(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JGE 4ce1d0 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2b20>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RDX,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RDX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
CMOVL %R10,%R13	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	scal (12.5%)
MOV -0x78(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RCX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %R13,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x88(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA -0x1(%RDX,%RAX,1),%RSI	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
CMPQ $0,-0x98(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
MOV %RSI,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RCX,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JE 4cd740 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2090>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
IMUL %R10,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %RAX,%R13	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 4cc49a <hypre_ParCSRComputeL1NormsThreads.extracted+0xdea>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x70(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RAX,-0xa8(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JGE 4ce1d0 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2b20>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RDX,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
CMOVL %R10,%RDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
MOV -0x78(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %R8,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RDX,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x88(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA -0x1(%RCX,%RAX,1),%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
MOV %RAX,-0x90(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
IMUL %R10,%R8	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
ADD %RDX,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0xc8(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JMP 4cc751 <hypre_ParCSRComputeL1NormsThreads.extracted+0x10a1>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMPQ $0,-0x98(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 4cde00 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2750>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x78(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %R10,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
MOV -0x90(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
ADD %RAX,%R13	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 4cd1d6 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1b26>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMPQ $0,-0x98(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 4cdf80 <hypre_ParCSRComputeL1NormsThreads.extracted+0x28d0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x78(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %R10,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %RAX,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x40(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JMP 4cd459 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1da9>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
IMUL %R10,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %RAX,%R13	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 4cd79a <hypre_ParCSRComputeL1NormsThreads.extracted+0x20ea>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x78(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %R10,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
MOV -0x90(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
ADD %RAX,%R13	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 4cd912 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2262>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x48(%RBP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JMP 4ce1d0 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2b20>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x78(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %R10,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %RAX,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x40(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JMP 4cdb91 <hypre_ParCSRComputeL1NormsThreads.extracted+0x24e1>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x30(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x48(%RBP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JMP 4ce1d0 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2b20>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x78(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %R10,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
MOV -0x90(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
ADD %RAX,%R13	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 4cde5a <hypre_ParCSRComputeL1NormsThreads.extracted+0x27aa>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x78(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %R10,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %RAX,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x40(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JMP 4cdfd1 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2921>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x30(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_4

Source file and lines	ams.c:3363-3540
Module	exec

The function is defined in /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/ams.c:3363-3409,3416-3451,3458-3479,3487-3540.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is probably not vectorized. Only 12% of vector register length is used (average across all SSE/AVX instructions).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers).

Workaround

Read the "512-bits vectorization" report at "Potential" confidence level.

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

512-bits vectorization

Workaround

Recompile with -mprefer-vector-width=512

CALL instructions

Detected function call instructions.

Details

__kmpc_for_static_init_8@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/ams.c:3363

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

ADD: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/ams.c:3384
DIV: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/ams.c:3367
IDIV: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/ams.c:3367
VZEROUPPER: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/ams.c:3363

Conversion instructions

Detected expensive conversion instructions.

Details

CQTO: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/ams.c:3367

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 536 bytes. The binary function is storing 248 bytes.

General properties

nb instructions	521
nb uops	531
loop length	4525
used x86 registers	16
used mmx registers	0
used xmm registers	5
used ymm registers	2
used zmm registers	0
nb stack references	40

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	88.50 cycles
front end	88.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	14.20	24.00	24.67	24.67	21.00	14.40	14.20	21.00	21.00	21.00	14.20	24.67
cycles	14.20	31.40	24.67	24.67	21.00	14.40	14.20	21.00	21.00	21.00	14.20	24.67

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

16.00

Cycles summary

Front-end	88.50
Dispatch	31.40
DIV/SQRT	16.00
Overall L1	88.50

Vectorization ratios

INT

all	1%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	4%

all	14%
load	0%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	33%

INT+FP

all	2%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	8%

Vector efficiency ratios

INT

all	12%
load	12%
store	11%
mul	12%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
other	12%

all	14%
load	12%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	16%

INT+FP

all	12%
load	12%
store	11%
mul	12%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	9%
other	13%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 88.50 cycles. At this rate:

3% of peak load performance is reached (6.06 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (2.80 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 4cb6b0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0x118,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV 0x50(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x48(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x40(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x98(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x38(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x50(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x30(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0xc8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x28(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0xa0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x20(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x18(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOVL $0,-0xf0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R9,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RCX,-0x70(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDX,-0xd0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R8,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV (%RDI),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOVQ $0,-0x108(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOVQ $0x1,-0x138(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
LEA -0x138(%RBP),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0xf0(%RBP),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x108(%RBP),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA 0x60(%RBP),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x55f910,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %ESI,-0xec(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
PUSH $0x1	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH $0x1	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RAX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
CALL 410430 <__kmpc_for_static_init_8@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %R14,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x30(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x50(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
ADD $0x20,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x108(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x60(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x130(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RCX,-0xe0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMP %RAX,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JBE 4cb800 <hypre_ParCSRComputeL1NormsThreads.extracted+0x150>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV $0x55f930,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0xec(%RBP),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD $0x118,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
JMP 410180 <__kmpc_for_static_fini@plt>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R13,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R13,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x70(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
OR %R13,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
SHR $0x20,%RCX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV -0xd0(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JE 4cb840 <hypre_ParCSRComputeL1NormsThreads.extracted+0x190>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CQTO	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	scal (12.5%)
IDIV %R13	5	0	3	0	0	0	0	0	0	0	0	0	0	11-16	10	scal (12.5%)
JMP 4cb845 <hypre_ParCSRComputeL1NormsThreads.extracted+0x195>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
DIV %R13D	4	0	3	0	0	0	0	0	0	0	0	0	0	11-16	6	scal (6.3%)
LEA 0x1(%RAX),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSI,-0x120(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA 0x8(%R12),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSI,-0x118(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA 0x8(%R15),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSI,-0x110(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0xe0(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %RAX,%RSI	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA 0x10(%R9,%RSI,8),%R11	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA (,%RAX,8),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R8,-0x128(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA 0x10(%RDI,%RSI,8),%R8	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
MOV %R8,-0xb0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA (%RDI,%RSI,8),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R8,-0xc0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA (%R9,%RSI,8),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSI,-0x100(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
DEC %RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,-0xd0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VXORPD %XMM3,%XMM3,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VMOVDDUP 0x5f302(%RIP),%XMM4	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVDDUP 0x5f7b2(%RIP),%XMM5	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VBROADCASTSD 0x5f7a9(%RIP),%YMM6	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	0.33	scal (12.5%)
VMOVSD 0x5f2d1(%RIP),%XMM7	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VBROADCASTSD 0x5f2c8(%RIP),%YMM8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	0.33	scal (12.5%)
VMOVSD 0x5f2d0(%RIP),%XMM9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %R9,-0x80(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RBX,-0x58(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDX,-0xf8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RAX,-0x78(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RAX,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 4cb9e3 <hypre_ParCSRComputeL1NormsThreads.extracted+0x333>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 0x538d60(,%RSI,8)	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	1	N/A
MOV -0x70(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RAX,-0xa8(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JGE 4ce1d0 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2b20>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RDX,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RDX,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMOVL %R10,%RAX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
MOV -0x78(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x90(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
SUB %RAX,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x88(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA -0x1(%RDX,%RCX,1),%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
TEST %R8,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
MOV -0xc8(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JE 4cd180 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1ad0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMPQ $0,-0x98(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 4cd8c0 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2210>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x78(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %R10,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %RAX,-0x90(%RBP)	2	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 4cbb12 <hypre_ParCSRComputeL1NormsThreads.extracted+0x462>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x70(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RAX,-0xa8(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JGE 4ce1d0 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2b20>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RDX,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RDX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMOVL %R10,%RDI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
MOV -0x78(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
SUB %RDI,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x88(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA -0x1(%RDX,%RCX,1),%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
TEST %R8,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
MOV -0xc8(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JE 4cd400 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1d50>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMPQ $0,-0x98(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 4cdb40 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2490>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x78(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %R10,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %RAX,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 4cbf92 <hypre_ParCSRComputeL1NormsThreads.extracted+0x8e2>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x70(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RAX,-0xa8(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JGE 4ce1d0 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2b20>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RDX,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RDX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
CMOVL %R10,%R13	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	scal (12.5%)
MOV -0x78(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RCX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %R13,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x88(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA -0x1(%RDX,%RAX,1),%RSI	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
CMPQ $0,-0x98(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
MOV %RSI,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RCX,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JE 4cd740 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2090>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
IMUL %R10,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %RAX,%R13	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 4cc49a <hypre_ParCSRComputeL1NormsThreads.extracted+0xdea>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x70(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RAX,-0xa8(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JGE 4ce1d0 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2b20>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RDX,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
CMOVL %R10,%RDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
MOV -0x78(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %R8,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RDX,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x88(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA -0x1(%RCX,%RAX,1),%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
MOV %RAX,-0x90(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
IMUL %R10,%R8	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
ADD %RDX,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0xc8(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JMP 4cc751 <hypre_ParCSRComputeL1NormsThreads.extracted+0x10a1>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMPQ $0,-0x98(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 4cde00 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2750>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x78(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %R10,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
MOV -0x90(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
ADD %RAX,%R13	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 4cd1d6 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1b26>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMPQ $0,-0x98(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 4cdf80 <hypre_ParCSRComputeL1NormsThreads.extracted+0x28d0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x78(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %R10,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %RAX,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x40(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JMP 4cd459 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1da9>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
IMUL %R10,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %RAX,%R13	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 4cd79a <hypre_ParCSRComputeL1NormsThreads.extracted+0x20ea>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x78(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %R10,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
MOV -0x90(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
ADD %RAX,%R13	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 4cd912 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2262>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x48(%RBP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JMP 4ce1d0 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2b20>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x78(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %R10,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %RAX,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x40(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JMP 4cdb91 <hypre_ParCSRComputeL1NormsThreads.extracted+0x24e1>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x30(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x48(%RBP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JMP 4ce1d0 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2b20>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x78(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %R10,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
MOV -0x90(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
ADD %RAX,%R13	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 4cde5a <hypre_ParCSRComputeL1NormsThreads.extracted+0x27aa>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x78(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %R10,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %RAX,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x40(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JMP 4cdfd1 <hypre_ParCSRComputeL1NormsThreads.extracted+0x2921>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x30(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

Name	Coverage (%)	Time (s)
▼hypre_ParCSRComputeL1NormsThreads.extracted–	0.29	0.15
▼Loop 3189 - ams.c:3382-3401 - exec–	0.01	0.01
○Loop 3194 - ams.c:3388-3389 - exec	0.18	0.08
○Loop 3193 - ams.c:3388-3389 - exec	0.03	0.01
○Loop 3190 - ams.c:3393-3394 - exec	0.00	0.00
○Loop 3195 - ams.c:3388-3389 - exec	0.00	0.00
○Loop 3192 - ams.c:3393-3394 - exec	0.00	0.00
○Loop 3191 - ams.c:3393-3394 - exec	0.00	0.00
▼Loop 3180 - ams.c:3416-3451 - exec–	0.00	0.00
○Loop 3182 - ams.c:3449-3451 - exec	0.00	0.00
○Loop 3184 - ams.c:3439-3444 - exec	0.00	0.00
○Loop 3183 - ams.c:3439-3444 - exec	0.00	0.00
○Loop 3181 - ams.c:3449-3451 - exec	0.00	0.00
▼Loop 3177 - ams.c:3416-3444 - exec–	0.00	0.00
○Loop 3178 - ams.c:3439-3444 - exec	0.00	0.00
○Loop 3179 - ams.c:3439-3444 - exec	0.00	0.00
▼Loop 3196 - ams.c:3382-3403 - exec–	0.00	0.00
○Loop 3198 - ams.c:3401-3403 - exec	0.00	0.00
○Loop 3197 - ams.c:3401-3403 - exec	0.00	0.00
▼Loop 3144 - ams.c:3363-3540 - exec–	0.00	0.00
○Loop 3147 - ams.c:3532-3534 - exec	0.07	0.03
○Loop 3145 - ams.c:3534-3538 - exec	0.01	0.01
○Loop 3146 - ams.c:3532-3534 - exec	0.00	0.00
▼Loop 3171 - ams.c:3416-3439 - exec–	0.00	0.00
○Loop 3172 - ams.c:3431-3432 - exec	0.00	0.00
○Loop 3176 - ams.c:3422-3426 - exec	0.00	0.00
○Loop 3173 - ams.c:3431-3432 - exec	0.00	0.00
○Loop 3175 - ams.c:3422-3426 - exec	0.00	0.00
○Loop 3174 - ams.c:3431-3432 - exec	0.00	0.00
▼Loop 3168 - ams.c:3416-3439 - exec–	0.00	0.00
○Loop 3170 - ams.c:3422-3426 - exec	0.00	0.00
○Loop 3169 - ams.c:3422-3426 - exec	0.00	0.00
▼Loop 3199 - ams.c:3382-3409 - exec–	0.00	0.00
○Loop 3200 - ams.c:3407-3409 - exec	0.00	0.00
○Loop 3202 - ams.c:3401-3403 - exec	0.00	0.00
○Loop 3201 - ams.c:3407-3409 - exec	0.00	0.00
○Loop 3203 - ams.c:3401-3403 - exec	0.00	0.00
▼Loop 3185 - ams.c:3382-3401 - exec–	0.00	0.00
○Loop 3186 - ams.c:3388-3389 - exec	0.00	0.00
○Loop 3188 - ams.c:3388-3389 - exec	0.00	0.00
○Loop 3187 - ams.c:3388-3389 - exec	0.00	0.00
▼Loop 3157 - ams.c:3458-3462 - exec–	0.00	0.00
○Loop 3158 - ams.c:3461-3462 - exec	0.00	0.00
○Loop 3160 - ams.c:3461-3462 - exec	0.00	0.00
○Loop 3159 - ams.c:3461-3462 - exec	0.00	0.00
▼Loop 3148 - ams.c:3470-3527 - exec–	0.00	0.00
○Loop 3156 - ams.c:3501-3513 - exec	0.00	0.00
○Loop 3155 - ams.c:3519-3521 - exec	0.00	0.00
○Loop 3154 - ams.c:3519-3521 - exec	0.00	0.00
○Loop 3152 - ams.c:3476-3487 - exec	0.00	0.00
○Loop 3153 - ams.c:3476-3487 - exec	0.00	0.00
○Loop 3150 - ams.c:3493-3494 - exec	0.00	0.00
○Loop 3151 - ams.c:3493-3494 - exec	0.00	0.00
○Loop 3149 - ams.c:3493-3494 - exec	0.00	0.00
▼Loop 3161 - ams.c:3458-3465 - exec–	0.00	0.00
○Loop 3165 - ams.c:3461-3462 - exec	0.00	0.00
○Loop 3167 - ams.c:3461-3462 - exec	0.00	0.00
○Loop 3163 - ams.c:3464-3465 - exec	0.00	0.00
○Loop 3166 - ams.c:3461-3462 - exec	0.00	0.00
○Loop 3162 - ams.c:3464-3465 - exec	0.00	0.00
○Loop 3164 - ams.c:3464-3465 - exec	0.00	0.00

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

512-bits vectorization

Workaround

CALL instructions

Details

Complex instructions

Details

Conversion instructions

Details

Workaround

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

512-bits vectorization

Workaround

CALL instructions

Details

Complex instructions

Details

Conversion instructions

Details

Workaround

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code