OV - exec - Function hypre_BoomerAMGCreateS.extracted

	Function: hypre_BoomerAMGCreateS.extracted	Module: exec	Source: par_strength.c:246-513 [...]	Coverage (incl. loops): 1.41% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c: 246 - 513

--------------------------------------------------------------------------------

246: #pragma omp parallel private(i,diag,row_scale,row_sum,jA,jS)

247: #endif

248:    {

249:    HYPRE_Int start, stop;

250:    hypre_GetSimpleThreadPartition(&start, &stop, num_variables);

251:    HYPRE_Int jS_diag = 0, jS_offd = 0;

252:

253:    for (i = start; i < stop; i++)

254:    {

255:       S_diag_i[i] = jS_diag;

256:       if (num_cols_offd)

257:       {

258:          S_offd_i[i] = jS_offd;

259:       }

260:

261:       diag = A_diag_data[A_diag_i[i]];

262:

263:       /* compute scaling factor and row sum */

264:       row_scale = 0.0;

265:       row_sum = diag;

266:       if (num_functions > 1)

267:       {

268:          if (diag < 0)

269:          {

270:             for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

271:             {

272:                if (dof_func[i] == dof_func[A_diag_j[jA]])

273:                {

274:                   row_scale = hypre_max(row_scale, A_diag_data[jA]);

275:                   row_sum += A_diag_data[jA];

276:                }

277:             }

278:             for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

279:             {

280:                if (dof_func[i] == dof_func_offd[A_offd_j[jA]])

281:                {

282:                   row_scale = hypre_max(row_scale, A_offd_data[jA]);

283:                   row_sum += A_offd_data[jA];

[...]

289:             for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

290:             {

291:                if (dof_func[i] == dof_func[A_diag_j[jA]])

292:                {

293:                   row_scale = hypre_min(row_scale, A_diag_data[jA]);

294:                   row_sum += A_diag_data[jA];

295:                }

296:             }

297:             for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

298:             {

299:                if (dof_func[i] == dof_func_offd[A_offd_j[jA]])

300:                {

301:                   row_scale = hypre_min(row_scale, A_offd_data[jA]);

302:                   row_sum += A_offd_data[jA];

[...]

309:          if (diag < 0)

310:          {

311:             for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

312:             {

313:                row_scale = hypre_max(row_scale, A_diag_data[jA]);

314:                row_sum += A_diag_data[jA];

315:             }

316:             for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

317:             {

318:                row_scale = hypre_max(row_scale, A_offd_data[jA]);

319:                row_sum += A_offd_data[jA];

320:             }

321:          }

322:          else

323:          {

324:             for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

325:             {

326:                row_scale = hypre_min(row_scale, A_diag_data[jA]);

327:                row_sum += A_diag_data[jA];

328:             }

329:             for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

330:             {

331:                row_scale = hypre_min(row_scale, A_offd_data[jA]);

332:                row_sum += A_offd_data[jA];

333:             }

334:          } /* diag >= 0*/

335:       } /* num_functions <= 1 */

336:

337:       jS_diag += A_diag_i[i + 1] - A_diag_i[i] - 1;

338:       jS_offd += A_offd_i[i + 1] - A_offd_i[i];

339:

340:       /* compute row entries of S */

341:       S_temp_diag_j[A_diag_i[i]] = -1;

342:       if ((fabs(row_sum) > fabs(diag)*max_row_sum) && (max_row_sum < 1.0))

343:       {

344:          /* make all dependencies weak */

345:          for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

346:          {

347:             S_temp_diag_j[jA] = -1;

348:          }

349:          jS_diag -= A_diag_i[i + 1] - (A_diag_i[i] + 1);

350:

351:          for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

352:          {

353:             S_temp_offd_j[jA] = -1;

354:          }

355:          jS_offd -= A_offd_i[i + 1] - A_offd_i[i];

356:       }

357:       else

358:       {

359:          if (num_functions > 1)

360:          {

361:             if (diag < 0)

362:             {

363:                for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

364:                {

365:                   if (A_diag_data[jA] <= strength_threshold * row_scale

366:                       || dof_func[i] != dof_func[A_diag_j[jA]])

367:                   {

368:                      S_temp_diag_j[jA] = -1;

369:                      --jS_diag;

370:                   }

371:                   else

372:                   {

373:                      S_temp_diag_j[jA] = A_diag_j[jA];

374:                   }

375:                }

376:                for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

377:                {

378:                   if (A_offd_data[jA] <= strength_threshold * row_scale

379:                       || dof_func[i] != dof_func_offd[A_offd_j[jA]])

380:                   {

381:                      S_temp_offd_j[jA] = -1;

382:                      --jS_offd;

383:                   }

384:                   else

385:                   {

386:                      S_temp_offd_j[jA] = A_offd_j[jA];

[...]

392:                for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

393:                {

394:                   if (A_diag_data[jA] >= strength_threshold * row_scale

395:                       || dof_func[i] != dof_func[A_diag_j[jA]])

396:                   {

397:                      S_temp_diag_j[jA] = -1;

398:                      --jS_diag;

399:                   }

400:                   else

401:                   {

402:                      S_temp_diag_j[jA] = A_diag_j[jA];

403:                   }

404:                }

405:                for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

406:                {

407:                   if (A_offd_data[jA] >= strength_threshold * row_scale

408:                       || dof_func[i] != dof_func_offd[A_offd_j[jA]])

409:                   {

410:                      S_temp_offd_j[jA] = -1;

411:                      --jS_offd;

412:                   }

413:                   else

414:                   {

415:                      S_temp_offd_j[jA] = A_offd_j[jA];

[...]

422:             if (diag < 0)

423:             {

424:                for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

425:                {

426:                   if (A_diag_data[jA] <= strength_threshold * row_scale)

427:                   {

428:                      S_temp_diag_j[jA] = -1;

429:                      --jS_diag;

430:                   }

431:                   else

432:                   {

433:                      S_temp_diag_j[jA] = A_diag_j[jA];

434:                   }

435:                }

436:                for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

437:                {

438:                   if (A_offd_data[jA] <= strength_threshold * row_scale)

439:                   {

440:                      S_temp_offd_j[jA] = -1;

441:                      --jS_offd;

442:                   }

443:                   else

444:                   {

445:                      S_temp_offd_j[jA] = A_offd_j[jA];

[...]

451:                for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

452:                {

453:                   if (A_diag_data[jA] >= strength_threshold * row_scale)

454:                   {

455:                      S_temp_diag_j[jA] = -1;

456:                      --jS_diag;

457:                   }

458:                   else

459:                   {

460:                      S_temp_diag_j[jA] = A_diag_j[jA];

461:                   }

462:                }

463:                for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

464:                {

465:                   if (A_offd_data[jA] >= strength_threshold * row_scale)

466:                   {

467:                      S_temp_offd_j[jA] = -1;

468:                      --jS_offd;

469:                   }

470:                   else

471:                   {

472:                      S_temp_offd_j[jA] = A_offd_j[jA];

[...]

480:    hypre_prefix_sum_pair(&jS_diag, S_diag_i + num_variables, &jS_offd, S_offd_i + num_variables, prefix_sum_workspace);

[...]

492:    for (i = start; i < stop; i++)

493:    {

494:       S_diag_i[i] += jS_diag;

495:       S_offd_i[i] += jS_offd;

496:

497:       jS = S_diag_i[i];

498:       for (jA = A_diag_i[i]; jA < A_diag_i[i+1]; jA++)

499:       {

500:          if (S_temp_diag_j[jA] > -1)

501:          {

502:             S_diag_j[jS]    = S_temp_diag_j[jA];

503:             jS++;

504:          }

505:       }

506:

507:       jS = S_offd_i[i];

508:       for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

509:       {

510:          if (S_temp_offd_j[jA] > -1)

511:          {

512:             S_offd_j[jS]    = S_temp_offd_j[jA];

513:             jS++;

0x4ab3b0 PUSH	%RBP

0x4ab3b1 MOV	%RSP,%RBP

0x4ab3b4 PUSH	%R15

0x4ab3b6 PUSH	%R14

0x4ab3b8 PUSH	%R13

0x4ab3ba PUSH	%R12

0x4ab3bc PUSH	%RBX

0x4ab3bd SUB	$0x68,%RSP

0x4ab3c1 MOV	%R9,%R15

0x4ab3c4 MOV	%R8,-0x60(%RBP)

0x4ab3c8 MOV	%RCX,-0x38(%RBP)

0x4ab3cc MOV	%RDX,%R14

0x4ab3cf MOV	0x88(%RBP),%R13

0x4ab3d6 MOV	0x80(%RBP),%R12

0x4ab3dd MOV	0x40(%RBP),%RDX

0x4ab3e1 MOV	0x10(%RBP),%RBX

0x4ab3e5 LEA	-0x68(%RBP),%RDI

0x4ab3e9 LEA	-0x70(%RBP),%RSI

0x4ab3ed CALL	51da70 <hypre_GetSimpleThreadPartition>

0x4ab3f2 MOV	-0x68(%RBP),%R8

0x4ab3f6 MOV	-0x70(%RBP),%RAX

0x4ab3fa MOV	%RAX,-0x88(%RBP)

0x4ab401 CMP	%RAX,%R8

0x4ab404 JGE	4ac5c0

0x4ab40a MOV	0x30(%RBP),%RAX

0x4ab40e MOV	0x28(%RBP),%RDI

0x4ab412 MOV	0x18(%RBP),%R9

0x4ab416 VMOVSD	-0x38(%RBP),%XMM0

0x4ab41b VMOVQ	%R14,%XMM1

0x4ab420 LEA	0x8(%R9),%RCX

0x4ab424 MOV	%RCX,-0x50(%RBP)

0x4ab428 ADD	$0x8,%RAX

0x4ab42c MOV	%RAX,-0x58(%RBP)

0x4ab430 XOR	%R10D,%R10D

0x4ab433 VXORPD	%XMM2,%XMM2,%XMM2

0x4ab437 VMOVDDUP	0x7fc39(%RIP),%XMM3

0x4ab43f VMOVSD	0x7ebc9(%RIP),%XMM4

0x4ab447 XOR	%R14D,%R14D

0x4ab44a MOV	0x20(%RBP),%R11

0x4ab44e JMP	4ab4a5

0x4ab450 NOPW	%CS:(%RAX,%RAX,1)

0x4ab45f NOPW	%CS:(%RAX,%RAX,1)

0x4ab46e NOPW	%CS:(%RAX,%RAX,1)

0x4ab47d NOPL	(%RAX)

(2453) 0x4ab480 SUB	%RSI,%R10

(2453) 0x4ab483 ADD	%RCX,%R10

(2453) 0x4ab486 MOV	-0x38(%RBP),%R14

(2453) 0x4ab48a SUB	%R9,%R14

(2453) 0x4ab48d ADD	%RDI,%R14

(2453) 0x4ab490 MOV	0x28(%RBP),%RDI

(2453) 0x4ab494 MOV	0x18(%RBP),%R9

(2453) 0x4ab498 CMP	-0x88(%RBP),%R8

(2453) 0x4ab49f JE	4ac5c6

(2453) 0x4ab4a5 MOV	%R8,%RAX

(2453) 0x4ab4a8 MOV	0x50(%RBP),%RCX

(2453) 0x4ab4ac MOV	%R10,(%RCX,%R8,8)

(2453) 0x4ab4b0 MOV	0x48(%RBP),%RCX

(2453) 0x4ab4b4 TEST	%RCX,%RCX

(2453) 0x4ab4b7 JE	4ab4c1

(2453) 0x4ab4b9 MOV	0x60(%RBP),%RCX

(2453) 0x4ab4bd MOV	%R14,(%RCX,%RAX,8)

(2453) 0x4ab4c1 MOV	%R14,-0x38(%RBP)

(2453) 0x4ab4c5 LEA	0x1(%RAX),%R8

(2453) 0x4ab4c9 MOV	(%RBX,%RAX,8),%R14

(2453) 0x4ab4cd MOV	0x8(%RBX,%RAX,8),%RSI

(2453) 0x4ab4d2 LEA	0x1(%R14),%RCX

(2453) 0x4ab4d6 VMOVSD	(%R9,%R14,8),%XMM5

(2453) 0x4ab4dc MOV	%R14,%RDX

(2453) 0x4ab4df NOT	%RDX

(2453) 0x4ab4e2 MOV	%RDX,-0x48(%RBP)

(2453) 0x4ab4e6 CMPQ	$0x2,-0x60(%RBP)

(2453) 0x4ab4eb JL	4ab700

(2453) 0x4ab4f1 VXORPD	%XMM6,%XMM6,%XMM6

(2453) 0x4ab4f5 VMOVAPD	%XMM5,%XMM7

(2453) 0x4ab4f9 VUCOMISD	%XMM2,%XMM5

(2453) 0x4ab4fd JAE	4ab7c0

(2453) 0x4ab503 CMP	%RSI,%RCX

(2453) 0x4ab506 JGE	4ab5f0

(2453) 0x4ab50c MOV	(%R15,%RAX,8),%RCX

(2453) 0x4ab510 MOV	-0x48(%RBP),%RDX

(2453) 0x4ab514 LEA	(%RDX,%RSI,1),%R9

(2453) 0x4ab518 MOV	%R9,%RDI

(2453) 0x4ab51b AND	$-0x4,%RDI

(2453) 0x4ab51f JE	4aba80

(2453) 0x4ab525 LEA	-0x1(%RDI),%R11

(2453) 0x4ab529 VPBROADCASTQ	%RCX,%YMM6

(2453) 0x4ab52f MOV	-0x50(%RBP),%RDX

(2453) 0x4ab533 LEA	(%RDX,%R14,8),%RBX

(2453) 0x4ab537 MOV	-0x58(%RBP),%RDX

(2453) 0x4ab53b MOV	%R14,-0x30(%RBP)

(2453) 0x4ab53f LEA	(%RDX,%R14,8),%R14

(2453) 0x4ab543 VXORPD	%XMM7,%XMM7,%XMM7

(2453) 0x4ab547 VXORPD	%XMM8,%XMM8,%XMM8

(2453) 0x4ab54c XOR	%R13D,%R13D

(2453) 0x4ab54f NOP

  (2479) 0x4ab550 VMOVDQU	(%R14,%R13,8),%YMM9

  (2479) 0x4ab556 VPXOR	%XMM10,%XMM10,%XMM10

  (2479) 0x4ab55b KXNORW	%K0,%K0,%K1

  (2479) 0x4ab55f VPGATHERQQ	(%R15,%YMM9,8),%YMM10{%K1}

  (2479) 0x4ab566 VPCMPEQQ	%YMM10,%YMM6,%K1

  (2479) 0x4ab56c VMOVUPD	(%RBX,%R13,8),%YMM9{%K1}{z}

  (2479) 0x4ab573 VADDPD	%YMM7,%YMM9,%YMM7{%K1}

  (2479) 0x4ab579 VCMPPD	$0x1,%YMM9,%YMM8,%K1{%K1}

  (2479) 0x4ab580 VMOVAPD	%YMM9,%YMM8{%K1}

  (2479) 0x4ab586 ADD	$0x4,%R13

  (2479) 0x4ab58a CMP	%R11,%R13

  (2479) 0x4ab58d JBE	4ab550

(2453) 0x4ab58f VSHUFPD	$0x1,%XMM8,%XMM8,%XMM6

(2453) 0x4ab595 VMAXSD	%XMM6,%XMM8,%XMM6

(2453) 0x4ab599 VEXTRACTF128	$0x1,%YMM8,%XMM8

(2453) 0x4ab59f VSHUFPD	$0x1,%XMM8,%XMM8,%XMM9

(2453) 0x4ab5a5 VMAXSD	%XMM9,%XMM8,%XMM8

(2453) 0x4ab5aa VMAXSD	%XMM6,%XMM8,%XMM6

(2453) 0x4ab5ae VEXTRACTF128	$0x1,%YMM7,%XMM8

(2453) 0x4ab5b4 VADDPD	%XMM7,%XMM8,%XMM7

(2453) 0x4ab5b8 VSHUFPD	$0x1,%XMM7,%XMM7,%XMM8

(2453) 0x4ab5bd VADDSD	%XMM7,%XMM8,%XMM7

(2453) 0x4ab5c1 VADDSD	%XMM7,%XMM5,%XMM7

(2453) 0x4ab5c5 CMP	%RDI,%R9

(2453) 0x4ab5c8 MOV	0x88(%RBP),%R13

(2453) 0x4ab5cf MOV	0x20(%RBP),%R11

(2453) 0x4ab5d3 MOV	0x10(%RBP),%RBX

(2453) 0x4ab5d7 MOV	0x30(%RBP),%R9

(2453) 0x4ab5db MOV	-0x30(%RBP),%R14

(2453) 0x4ab5df JNE	4aba8a

(2453) 0x4ab5e5 NOPW	%CS:(%RAX,%RAX,1)

(2453) 0x4ab5f0 MOV	(%R11,%RAX,8),%RDI

(2453) 0x4ab5f4 MOV	(%R11,%R8,8),%RCX

(2453) 0x4ab5f8 MOV	%RCX,%R9

(2453) 0x4ab5fb MOV	%RDI,%RDX

(2453) 0x4ab5fe MOV	%RDI,-0x40(%RBP)

(2453) 0x4ab602 SUB	%RDI,%R9

(2453) 0x4ab605 JLE	4abe13

(2453) 0x4ab60b MOV	(%R15,%RAX,8),%R11

(2453) 0x4ab60f MOV	%R9,%RDI

(2453) 0x4ab612 AND	$-0x4,%RDI

(2453) 0x4ab616 JE	4abb00

(2453) 0x4ab61c MOV	%R14,-0x30(%RBP)

(2453) 0x4ab620 VBROADCASTSD	%XMM6,%YMM6

(2453) 0x4ab625 LEA	-0x1(%RDI),%R14

(2453) 0x4ab629 VPBROADCASTQ	%R11,%YMM9

(2453) 0x4ab62f MOV	0x28(%RBP),%RDX

(2453) 0x4ab633 MOV	-0x40(%RBP),%R12

(2453) 0x4ab637 LEA	(%RDX,%R12,8),%RBX

(2453) 0x4ab63b MOV	0x38(%RBP),%RDX

(2453) 0x4ab63f LEA	(%RDX,%R12,8),%R13

(2453) 0x4ab643 VXORPD	%XMM8,%XMM8,%XMM8

(2453) 0x4ab648 XOR	%EDX,%EDX

(2453) 0x4ab64a MOV	0x70(%RBP),%R12

(2453) 0x4ab64e XCHG	%AX,%AX

  (2477) 0x4ab650 VMOVDQU	(%R13,%RDX,8),%YMM10

  (2477) 0x4ab657 KXNORW	%K0,%K0,%K1

  (2477) 0x4ab65b VPXOR	%XMM11,%XMM11,%XMM11

  (2477) 0x4ab660 VPGATHERQQ	(%R12,%YMM10,8),%YMM11{%K1}

  (2477) 0x4ab667 VPCMPEQQ	%YMM11,%YMM9,%K1

  (2477) 0x4ab66d VMOVUPD	(%RBX,%RDX,8),%YMM10{%K1}{z}

  (2477) 0x4ab674 VADDPD	%YMM8,%YMM10,%YMM8{%K1}

  (2477) 0x4ab67a VCMPPD	$0x1,%YMM10,%YMM6,%K1{%K1}

  (2477) 0x4ab681 VMOVAPD	%YMM10,%YMM6{%K1}

  (2477) 0x4ab687 ADD	$0x4,%RDX

  (2477) 0x4ab68b CMP	%R14,%RDX

  (2477) 0x4ab68e JBE	4ab650

(2453) 0x4ab690 VSHUFPD	$0x1,%XMM6,%XMM6,%XMM9

(2453) 0x4ab695 VMAXSD	%XMM6,%XMM9,%XMM9

(2453) 0x4ab699 VEXTRACTF128	$0x1,%YMM6,%XMM6

(2453) 0x4ab69f VSHUFPD	$0x1,%XMM6,%XMM6,%XMM10

(2453) 0x4ab6a4 VMAXSD	%XMM6,%XMM10,%XMM6

(2453) 0x4ab6a8 VMAXSD	%XMM6,%XMM9,%XMM6

(2453) 0x4ab6ac VEXTRACTF128	$0x1,%YMM8,%XMM9

(2453) 0x4ab6b2 VADDPD	%XMM9,%XMM8,%XMM8

(2453) 0x4ab6b7 VSHUFPD	$0x1,%XMM8,%XMM8,%XMM9

(2453) 0x4ab6bd VADDSD	%XMM9,%XMM8,%XMM8

(2453) 0x4ab6c2 VADDSD	%XMM7,%XMM8,%XMM7

(2453) 0x4ab6c6 CMP	%RDI,%R9

(2453) 0x4ab6c9 JE	4ab978

(2453) 0x4ab6cf MOV	0x88(%RBP),%R13

(2453) 0x4ab6d6 MOV	0x10(%RBP),%RBX

(2453) 0x4ab6da MOV	0x70(%RBP),%R9

(2453) 0x4ab6de MOV	0x80(%RBP),%R12

(2453) 0x4ab6e5 MOV	-0x30(%RBP),%R14

(2453) 0x4ab6e9 JMP	4abb06

0x4ab6ee NOPW	%CS:(%RAX,%RAX,1)

0x4ab6fd NOPL	(%RAX)

(2453) 0x4ab700 VUCOMISD	%XMM2,%XMM5

(2453) 0x4ab704 MOV	%R14,-0x30(%RBP)

(2453) 0x4ab708 VXORPD	%XMM6,%XMM6,%XMM6

(2453) 0x4ab70c VMOVAPD	%XMM5,%XMM7

(2453) 0x4ab710 JAE	4ab9c0

(2453) 0x4ab716 CMP	%RSI,%RCX

(2453) 0x4ab719 JGE	4abba6

(2453) 0x4ab71f MOV	-0x48(%RBP),%RCX

(2453) 0x4ab723 LEA	(%RCX,%RSI,1),%RDI

(2453) 0x4ab727 MOV	%RDI,%RCX

(2453) 0x4ab72a AND	$-0x4,%RCX

(2453) 0x4ab72e JE	4abb80

(2453) 0x4ab734 LEA	-0x1(%RCX),%RDX

(2453) 0x4ab738 MOV	-0x50(%RBP),%R9

(2453) 0x4ab73c LEA	(%R9,%R14,8),%R9

(2453) 0x4ab740 VXORPD	%XMM6,%XMM6,%XMM6

(2453) 0x4ab744 XOR	%R11D,%R11D

(2453) 0x4ab747 VXORPD	%XMM7,%XMM7,%XMM7

(2453) 0x4ab74b NOPL	(%RAX,%RAX,1)

  (2471) 0x4ab750 VMOVUPD	(%R9,%R11,8),%YMM8

  (2471) 0x4ab756 VMAXPD	%YMM6,%YMM8,%YMM6

  (2471) 0x4ab75a VADDPD	%YMM7,%YMM8,%YMM7

  (2471) 0x4ab75e ADD	$0x4,%R11

  (2471) 0x4ab762 CMP	%RDX,%R11

  (2471) 0x4ab765 JBE	4ab750

(2453) 0x4ab767 VSHUFPD	$0x1,%XMM6,%XMM6,%XMM8

(2453) 0x4ab76c VMAXSD	%XMM6,%XMM8,%XMM8

(2453) 0x4ab770 VEXTRACTF128	$0x1,%YMM6,%XMM6

(2453) 0x4ab776 VSHUFPD	$0x1,%XMM6,%XMM6,%XMM9

(2453) 0x4ab77b VMAXSD	%XMM6,%XMM9,%XMM6

(2453) 0x4ab77f VMAXSD	%XMM6,%XMM8,%XMM6

(2453) 0x4ab783 VEXTRACTF128	$0x1,%YMM7,%XMM8

(2453) 0x4ab789 VADDPD	%XMM7,%XMM8,%XMM7

(2453) 0x4ab78d VSHUFPD	$0x1,%XMM7,%XMM7,%XMM8

(2453) 0x4ab792 VADDSD	%XMM7,%XMM8,%XMM7

(2453) 0x4ab796 VADDSD	%XMM7,%XMM5,%XMM7

(2453) 0x4ab79a CMP	%RCX,%RDI

(2453) 0x4ab79d MOV	0x20(%RBP),%R11

(2453) 0x4ab7a1 MOV	0x28(%RBP),%RDI

(2453) 0x4ab7a5 MOV	0x18(%RBP),%R9

(2453) 0x4ab7a9 JNE	4abb8a

(2453) 0x4ab7af JMP	4abba6

0x4ab7b4 NOPW	%CS:(%RAX,%RAX,1)

(2453) 0x4ab7c0 CMP	%RSI,%RCX

(2453) 0x4ab7c3 JGE	4ab8a0

(2453) 0x4ab7c9 MOV	(%R15,%RAX,8),%RCX

(2453) 0x4ab7cd MOV	-0x48(%RBP),%RDX

(2453) 0x4ab7d1 LEA	(%RDX,%RSI,1),%R9

(2453) 0x4ab7d5 MOV	%R9,%RDI

(2453) 0x4ab7d8 AND	$-0x4,%RDI

(2453) 0x4ab7dc JE	4abc80

(2453) 0x4ab7e2 LEA	-0x1(%RDI),%R11

(2453) 0x4ab7e6 VPBROADCASTQ	%RCX,%YMM6

(2453) 0x4ab7ec MOV	-0x50(%RBP),%RDX

(2453) 0x4ab7f0 LEA	(%RDX,%R14,8),%RBX

(2453) 0x4ab7f4 MOV	-0x58(%RBP),%RDX

(2453) 0x4ab7f8 MOV	%R14,-0x30(%RBP)

(2453) 0x4ab7fc LEA	(%RDX,%R14,8),%R14

(2453) 0x4ab800 VXORPD	%XMM7,%XMM7,%XMM7

(2453) 0x4ab804 VXORPD	%XMM8,%XMM8,%XMM8

(2453) 0x4ab809 XOR	%EDX,%EDX

(2453) 0x4ab80b NOPL	(%RAX,%RAX,1)

  (2475) 0x4ab810 VMOVDQU	(%R14,%RDX,8),%YMM9

  (2475) 0x4ab816 KXNORW	%K0,%K0,%K1

  (2475) 0x4ab81a VPXOR	%XMM10,%XMM10,%XMM10

  (2475) 0x4ab81f VPGATHERQQ	(%R15,%YMM9,8),%YMM10{%K1}

  (2475) 0x4ab826 VPCMPEQQ	%YMM10,%YMM6,%K1

  (2475) 0x4ab82c VMOVUPD	(%RBX,%RDX,8),%YMM9{%K1}{z}

  (2475) 0x4ab833 VADDPD	%YMM7,%YMM9,%YMM7{%K1}

  (2475) 0x4ab839 VMINPD	%YMM9,%YMM8,%YMM8{%K1}

  (2475) 0x4ab83f ADD	$0x4,%RDX

  (2475) 0x4ab843 CMP	%R11,%RDX

  (2475) 0x4ab846 JBE	4ab810

(2453) 0x4ab848 VSHUFPD	$0x1,%XMM8,%XMM8,%XMM6

(2453) 0x4ab84e VMINSD	%XMM6,%XMM8,%XMM6

(2453) 0x4ab852 VEXTRACTF128	$0x1,%YMM8,%XMM8

(2453) 0x4ab858 VSHUFPD	$0x1,%XMM8,%XMM8,%XMM9

(2453) 0x4ab85e VMINSD	%XMM9,%XMM8,%XMM8

(2453) 0x4ab863 VMINSD	%XMM6,%XMM8,%XMM6

(2453) 0x4ab867 VEXTRACTF128	$0x1,%YMM7,%XMM8

(2453) 0x4ab86d VADDPD	%XMM7,%XMM8,%XMM7

(2453) 0x4ab871 VSHUFPD	$0x1,%XMM7,%XMM7,%XMM8

(2453) 0x4ab876 VADDSD	%XMM7,%XMM8,%XMM7

(2453) 0x4ab87a VADDSD	%XMM7,%XMM5,%XMM7

(2453) 0x4ab87e CMP	%RDI,%R9

(2453) 0x4ab881 MOV	0x20(%RBP),%R11

(2453) 0x4ab885 MOV	0x10(%RBP),%RBX

(2453) 0x4ab889 MOV	0x30(%RBP),%R9

(2453) 0x4ab88d MOV	-0x30(%RBP),%R14

(2453) 0x4ab891 JNE	4abc8a

(2453) 0x4ab897 NOPW	(%RAX,%RAX,1)

(2453) 0x4ab8a0 MOV	(%R11,%RAX,8),%RDI

(2453) 0x4ab8a4 MOV	(%R11,%R8,8),%RCX

(2453) 0x4ab8a8 MOV	%RCX,%R9

(2453) 0x4ab8ab MOV	%RDI,%RDX

(2453) 0x4ab8ae MOV	%RDI,-0x40(%RBP)

(2453) 0x4ab8b2 SUB	%RDI,%R9

(2453) 0x4ab8b5 JLE	4abe13

(2453) 0x4ab8bb MOV	(%R15,%RAX,8),%R11

(2453) 0x4ab8bf MOV	%R9,%RDI

(2453) 0x4ab8c2 AND	$-0x4,%RDI

(2453) 0x4ab8c6 JE	4abd00

(2453) 0x4ab8cc MOV	%R14,-0x30(%RBP)

(2453) 0x4ab8d0 VBROADCASTSD	%XMM6,%YMM6

(2453) 0x4ab8d5 LEA	-0x1(%RDI),%R14

(2453) 0x4ab8d9 VPBROADCASTQ	%R11,%YMM9

(2453) 0x4ab8df MOV	0x28(%RBP),%RDX

(2453) 0x4ab8e3 MOV	-0x40(%RBP),%R12

(2453) 0x4ab8e7 LEA	(%RDX,%R12,8),%RBX

(2453) 0x4ab8eb MOV	0x38(%RBP),%RDX

(2453) 0x4ab8ef LEA	(%RDX,%R12,8),%R13

(2453) 0x4ab8f3 VXORPD	%XMM8,%XMM8,%XMM8

(2453) 0x4ab8f8 XOR	%EDX,%EDX

(2453) 0x4ab8fa MOV	0x70(%RBP),%R12

(2453) 0x4ab8fe XCHG	%AX,%AX

  (2473) 0x4ab900 VMOVDQU	(%R13,%RDX,8),%YMM10

  (2473) 0x4ab907 KXNORW	%K0,%K0,%K1

  (2473) 0x4ab90b VPXOR	%XMM11,%XMM11,%XMM11

  (2473) 0x4ab910 VPGATHERQQ	(%R12,%YMM10,8),%YMM11{%K1}

  (2473) 0x4ab917 VPCMPEQQ	%YMM11,%YMM9,%K1

  (2473) 0x4ab91d VMOVUPD	(%RBX,%RDX,8),%YMM10{%K1}{z}

  (2473) 0x4ab924 VADDPD	%YMM8,%YMM10,%YMM8{%K1}

  (2473) 0x4ab92a VMINPD	%YMM10,%YMM6,%YMM6{%K1}

  (2473) 0x4ab930 ADD	$0x4,%RDX

  (2473) 0x4ab934 CMP	%R14,%RDX

  (2473) 0x4ab937 JBE	4ab900

(2453) 0x4ab939 VSHUFPD	$0x1,%XMM6,%XMM6,%XMM9

(2453) 0x4ab93e VMINSD	%XMM6,%XMM9,%XMM9

(2453) 0x4ab942 VEXTRACTF128	$0x1,%YMM6,%XMM6

(2453) 0x4ab948 VSHUFPD	$0x1,%XMM6,%XMM6,%XMM10

(2453) 0x4ab94d VMINSD	%XMM6,%XMM10,%XMM6

(2453) 0x4ab951 VMINSD	%XMM6,%XMM9,%XMM6

(2453) 0x4ab955 VEXTRACTF128	$0x1,%YMM8,%XMM9

(2453) 0x4ab95b VADDPD	%XMM9,%XMM8,%XMM8

(2453) 0x4ab960 VSHUFPD	$0x1,%XMM8,%XMM8,%XMM9

(2453) 0x4ab966 VADDSD	%XMM9,%XMM8,%XMM8

(2453) 0x4ab96b VADDSD	%XMM7,%XMM8,%XMM7

(2453) 0x4ab96f CMP	%RDI,%R9

(2453) 0x4ab972 JNE	4abf00

(2453) 0x4ab978 MOV	0x88(%RBP),%R13

(2453) 0x4ab97f MOV	0x20(%RBP),%R11

(2453) 0x4ab983 MOV	0x10(%RBP),%RBX

(2453) 0x4ab987 MOV	0x70(%RBP),%R9

(2453) 0x4ab98b MOV	0x80(%RBP),%R12

(2453) 0x4ab992 MOV	0x28(%RBP),%RDI

(2453) 0x4ab996 JMP	4abe44

0x4ab99b NOPW	%CS:(%RAX,%RAX,1)

0x4ab9aa NOPW	%CS:(%RAX,%RAX,1)

0x4ab9b9 NOPL	(%RAX)

(2453) 0x4ab9c0 CMP	%RSI,%RCX

(2453) 0x4ab9c3 JGE	4abd66

(2453) 0x4ab9c9 MOV	-0x48(%RBP),%RCX

(2453) 0x4ab9cd LEA	(%RCX,%RSI,1),%RDI

(2453) 0x4ab9d1 MOV	%RDI,%RCX

(2453) 0x4ab9d4 AND	$-0x4,%RCX

(2453) 0x4ab9d8 JE	4abd40

(2453) 0x4ab9de LEA	-0x1(%RCX),%RDX

(2453) 0x4ab9e2 MOV	-0x50(%RBP),%R9

(2453) 0x4ab9e6 LEA	(%R9,%R14,8),%R9

(2453) 0x4ab9ea VXORPD	%XMM6,%XMM6,%XMM6

(2453) 0x4ab9ee XOR	%R11D,%R11D

(2453) 0x4ab9f1 VXORPD	%XMM7,%XMM7,%XMM7

(2453) 0x4ab9f5 NOPW	%CS:(%RAX,%RAX,1)

  (2467) 0x4aba00 VMOVUPD	(%R9,%R11,8),%YMM8

  (2467) 0x4aba06 VMINPD	%YMM6,%YMM8,%YMM6

  (2467) 0x4aba0a VADDPD	%YMM7,%YMM8,%YMM7

  (2467) 0x4aba0e ADD	$0x4,%R11

  (2467) 0x4aba12 CMP	%RDX,%R11

  (2467) 0x4aba15 JBE	4aba00

(2453) 0x4aba17 VSHUFPD	$0x1,%XMM6,%XMM6,%XMM8

(2453) 0x4aba1c VMINSD	%XMM6,%XMM8,%XMM8

(2453) 0x4aba20 VEXTRACTF128	$0x1,%YMM6,%XMM6

(2453) 0x4aba26 VSHUFPD	$0x1,%XMM6,%XMM6,%XMM9

(2453) 0x4aba2b VMINSD	%XMM6,%XMM9,%XMM6

(2453) 0x4aba2f VMINSD	%XMM6,%XMM8,%XMM6

(2453) 0x4aba33 VEXTRACTF128	$0x1,%YMM7,%XMM8

(2453) 0x4aba39 VADDPD	%XMM7,%XMM8,%XMM7

(2453) 0x4aba3d VSHUFPD	$0x1,%XMM7,%XMM7,%XMM8

(2453) 0x4aba42 VADDSD	%XMM7,%XMM8,%XMM7

(2453) 0x4aba46 VADDSD	%XMM7,%XMM5,%XMM7

(2453) 0x4aba4a CMP	%RCX,%RDI

(2453) 0x4aba4d MOV	0x20(%RBP),%R11

(2453) 0x4aba51 MOV	0x28(%RBP),%RDI

(2453) 0x4aba55 MOV	0x18(%RBP),%R9

(2453) 0x4aba59 JNE	4abd4a

(2453) 0x4aba5f JMP	4abd66

0x4aba64 NOPW	%CS:(%RAX,%RAX,1)

0x4aba73 NOPW	%CS:(%RAX,%RAX,1)

(2453) 0x4aba80 VMOVAPD	%XMM5,%XMM7

(2453) 0x4aba84 XOR	%EDI,%EDI

(2453) 0x4aba86 MOV	0x30(%RBP),%R9

(2453) 0x4aba8a LEA	0x1(%RDI,%R14,1),%RDI

(2453) 0x4aba8f JMP	4abacc

0x4aba91 NOPW	%CS:(%RAX,%RAX,1)

0x4abaa0 NOPW	%CS:(%RAX,%RAX,1)

0x4abaaf NOPW	%CS:(%RAX,%RAX,1)

0x4ababe XCHG	%AX,%AX

  (2478) 0x4abac0 INC	%RDI

  (2478) 0x4abac3 CMP	%RDI,%RSI

  (2478) 0x4abac6 JE	4ab5f0

  (2478) 0x4abacc MOV	(%R9,%RDI,8),%RDX

  (2478) 0x4abad0 CMP	(%R15,%RDX,8),%RCX

  (2478) 0x4abad4 JNE	4abac0

  (2478) 0x4abad6 MOV	0x18(%RBP),%RDX

  (2478) 0x4abada VMOVSD	(%RDX,%RDI,8),%XMM8

  (2478) 0x4abadf VMAXSD	%XMM6,%XMM8,%XMM6

  (2478) 0x4abae3 VADDSD	%XMM7,%XMM8,%XMM7

  (2478) 0x4abae7 JMP	4abac0

0x4abae9 NOPW	%CS:(%RAX,%RAX,1)

0x4abaf8 NOPL	(%RAX,%RAX,1)

(2453) 0x4abb00 XOR	%EDI,%EDI

(2453) 0x4abb02 MOV	0x70(%RBP),%R9

(2453) 0x4abb06 ADD	-0x40(%RBP),%RDI

(2453) 0x4abb0a JMP	4abb4c

0x4abb0c NOPW	%CS:(%RAX,%RAX,1)

0x4abb1b NOPW	%CS:(%RAX,%RAX,1)

0x4abb2a NOPW	%CS:(%RAX,%RAX,1)

0x4abb39 NOPL	(%RAX)

  (2476) 0x4abb40 INC	%RDI

  (2476) 0x4abb43 CMP	%RDI,%RCX

  (2476) 0x4abb46 JE	4abf80

  (2476) 0x4abb4c MOV	0x38(%RBP),%RDX

  (2476) 0x4abb50 MOV	(%RDX,%RDI,8),%RDX

  (2476) 0x4abb54 CMP	(%R9,%RDX,8),%R11

  (2476) 0x4abb58 JNE	4abb40

  (2476) 0x4abb5a MOV	0x28(%RBP),%RDX

  (2476) 0x4abb5e VMOVSD	(%RDX,%RDI,8),%XMM8

  (2476) 0x4abb63 VMAXSD	%XMM6,%XMM8,%XMM6

  (2476) 0x4abb67 VADDSD	%XMM7,%XMM8,%XMM7

  (2476) 0x4abb6b JMP	4abb40

0x4abb6d NOPW	%CS:(%RAX,%RAX,1)

0x4abb7c NOPL	(%RAX)

(2453) 0x4abb80 XOR	%ECX,%ECX

(2453) 0x4abb82 VMOVAPD	%XMM5,%XMM7

(2453) 0x4abb86 MOV	0x28(%RBP),%RDI

(2453) 0x4abb8a LEA	0x1(%RCX,%R14,1),%RCX

(2453) 0x4abb8f NOP

  (2470) 0x4abb90 VMOVSD	(%R9,%RCX,8),%XMM8

  (2470) 0x4abb96 VMAXSD	%XMM6,%XMM8,%XMM6

  (2470) 0x4abb9a VADDSD	%XMM7,%XMM8,%XMM7

  (2470) 0x4abb9e INC	%RCX

  (2470) 0x4abba1 CMP	%RCX,%RSI

  (2470) 0x4abba4 JNE	4abb90

(2453) 0x4abba6 MOV	(%R11,%RAX,8),%R14

(2453) 0x4abbaa MOV	(%R11,%R8,8),%RCX

(2453) 0x4abbae MOV	%RCX,%R9

(2453) 0x4abbb1 MOV	%R14,%RDX

(2453) 0x4abbb4 MOV	%R14,-0x40(%RBP)

(2453) 0x4abbb8 SUB	%R14,%R9

(2453) 0x4abbbb JLE	4abe40

(2453) 0x4abbc1 MOV	%R9,%RDI

(2453) 0x4abbc4 AND	$-0x4,%RDI

(2453) 0x4abbc8 JE	4abe80

(2453) 0x4abbce VBROADCASTSD	%XMM6,%YMM6

(2453) 0x4abbd3 LEA	-0x1(%RDI),%RDX

(2453) 0x4abbd7 MOV	0x28(%RBP),%R11

(2453) 0x4abbdb MOV	-0x40(%RBP),%RBX

(2453) 0x4abbdf LEA	(%R11,%RBX,8),%R11

(2453) 0x4abbe3 VXORPD	%XMM8,%XMM8,%XMM8

(2453) 0x4abbe8 XOR	%EBX,%EBX

(2453) 0x4abbea NOPW	(%RAX,%RAX,1)

  (2469) 0x4abbf0 VMOVUPD	(%R11,%RBX,8),%YMM9

  (2469) 0x4abbf6 VMAXPD	%YMM6,%YMM9,%YMM6

  (2469) 0x4abbfa VADDPD	%YMM8,%YMM9,%YMM8

  (2469) 0x4abbff ADD	$0x4,%RBX

  (2469) 0x4abc03 CMP	%RDX,%RBX

  (2469) 0x4abc06 JBE	4abbf0

(2453) 0x4abc08 VSHUFPD	$0x1,%XMM6,%XMM6,%XMM9

(2453) 0x4abc0d VMAXSD	%XMM6,%XMM9,%XMM9

(2453) 0x4abc11 VEXTRACTF128	$0x1,%YMM6,%XMM6

(2453) 0x4abc17 VSHUFPD	$0x1,%XMM6,%XMM6,%XMM10

(2453) 0x4abc1c VMAXSD	%XMM6,%XMM10,%XMM6

(2453) 0x4abc20 VMAXSD	%XMM6,%XMM9,%XMM6

(2453) 0x4abc24 VEXTRACTF128	$0x1,%YMM8,%XMM9

(2453) 0x4abc2a VADDPD	%XMM9,%XMM8,%XMM8

(2453) 0x4abc2f VSHUFPD	$0x1,%XMM8,%XMM8,%XMM9

(2453) 0x4abc35 VADDSD	%XMM9,%XMM8,%XMM8

(2453) 0x4abc3a VADDSD	%XMM7,%XMM8,%XMM7

(2453) 0x4abc3e CMP	%RDI,%R9

(2453) 0x4abc41 MOV	-0x30(%RBP),%R14

(2453) 0x4abc45 JE	4abe0b

(2453) 0x4abc4b MOV	0x20(%RBP),%R11

(2453) 0x4abc4f MOV	0x10(%RBP),%RBX

(2453) 0x4abc53 MOV	0x70(%RBP),%R9

(2453) 0x4abc57 JMP	4abe8a

0x4abc5c NOPW	%CS:(%RAX,%RAX,1)

0x4abc6b NOPW	%CS:(%RAX,%RAX,1)

0x4abc7a NOPW	(%RAX,%RAX,1)

(2453) 0x4abc80 VMOVAPD	%XMM5,%XMM7

(2453) 0x4abc84 XOR	%EDI,%EDI

(2453) 0x4abc86 MOV	0x30(%RBP),%R9

(2453) 0x4abc8a LEA	0x1(%RDI,%R14,1),%RDI

(2453) 0x4abc8f JMP	4abccc

0x4abc91 NOPW	%CS:(%RAX,%RAX,1)

0x4abca0 NOPW	%CS:(%RAX,%RAX,1)

0x4abcaf NOPW	%CS:(%RAX,%RAX,1)

0x4abcbe XCHG	%AX,%AX

  (2474) 0x4abcc0 INC	%RDI

  (2474) 0x4abcc3 CMP	%RDI,%RSI

  (2474) 0x4abcc6 JE	4ab8a0

  (2474) 0x4abccc MOV	(%R9,%RDI,8),%RDX

  (2474) 0x4abcd0 CMP	(%R15,%RDX,8),%RCX

  (2474) 0x4abcd4 JNE	4abcc0

  (2474) 0x4abcd6 MOV	0x18(%RBP),%RDX

  (2474) 0x4abcda VMOVSD	(%RDX,%RDI,8),%XMM8

  (2474) 0x4abcdf VMINSD	%XMM6,%XMM8,%XMM6

  (2474) 0x4abce3 VADDSD	%XMM7,%XMM8,%XMM7

  (2474) 0x4abce7 JMP	4abcc0

0x4abce9 NOPW	%CS:(%RAX,%RAX,1)

0x4abcf8 NOPL	(%RAX,%RAX,1)

(2453) 0x4abd00 XOR	%EDI,%EDI

(2453) 0x4abd02 MOV	0x70(%RBP),%R9

(2453) 0x4abd06 JMP	4abf1a

0x4abd0b NOPW	%CS:(%RAX,%RAX,1)

0x4abd1a NOPW	%CS:(%RAX,%RAX,1)

0x4abd29 NOPW	%CS:(%RAX,%RAX,1)

0x4abd38 NOPL	(%RAX,%RAX,1)

(2453) 0x4abd40 XOR	%ECX,%ECX

(2453) 0x4abd42 VMOVAPD	%XMM5,%XMM7

(2453) 0x4abd46 MOV	0x28(%RBP),%RDI

(2453) 0x4abd4a LEA	0x1(%RCX,%R14,1),%RCX

(2453) 0x4abd4f NOP

  (2466) 0x4abd50 VMOVSD	(%R9,%RCX,8),%XMM8

  (2466) 0x4abd56 VMINSD	%XMM6,%XMM8,%XMM6

  (2466) 0x4abd5a VADDSD	%XMM7,%XMM8,%XMM7

  (2466) 0x4abd5e INC	%RCX

  (2466) 0x4abd61 CMP	%RCX,%RSI

  (2466) 0x4abd64 JNE	4abd50

(2453) 0x4abd66 MOV	(%R11,%RAX,8),%R14

(2453) 0x4abd6a MOV	(%R11,%R8,8),%RCX

(2453) 0x4abd6e MOV	%RCX,%R9

(2453) 0x4abd71 MOV	%R14,%RDX

(2453) 0x4abd74 MOV	%R14,-0x40(%RBP)

(2453) 0x4abd78 SUB	%R14,%R9

(2453) 0x4abd7b JLE	4abe40

(2453) 0x4abd81 MOV	%R9,%RDI

(2453) 0x4abd84 AND	$-0x4,%RDI

(2453) 0x4abd88 JE	4abec0

(2453) 0x4abd8e VBROADCASTSD	%XMM6,%YMM6

(2453) 0x4abd93 LEA	-0x1(%RDI),%RDX

(2453) 0x4abd97 MOV	0x28(%RBP),%R11

(2453) 0x4abd9b MOV	-0x40(%RBP),%RBX

(2453) 0x4abd9f LEA	(%R11,%RBX,8),%R11

(2453) 0x4abda3 VXORPD	%XMM8,%XMM8,%XMM8

(2453) 0x4abda8 XOR	%EBX,%EBX

(2453) 0x4abdaa NOPW	(%RAX,%RAX,1)

  (2465) 0x4abdb0 VMOVUPD	(%R11,%RBX,8),%YMM9

  (2465) 0x4abdb6 VMINPD	%YMM6,%YMM9,%YMM6

  (2465) 0x4abdba VADDPD	%YMM8,%YMM9,%YMM8

  (2465) 0x4abdbf ADD	$0x4,%RBX

  (2465) 0x4abdc3 CMP	%RDX,%RBX

  (2465) 0x4abdc6 JBE	4abdb0

(2453) 0x4abdc8 VSHUFPD	$0x1,%XMM6,%XMM6,%XMM9

(2453) 0x4abdcd VMINSD	%XMM6,%XMM9,%XMM9

(2453) 0x4abdd1 VEXTRACTF128	$0x1,%YMM6,%XMM6

(2453) 0x4abdd7 VSHUFPD	$0x1,%XMM6,%XMM6,%XMM10

(2453) 0x4abddc VMINSD	%XMM6,%XMM10,%XMM6

(2453) 0x4abde0 VMINSD	%XMM6,%XMM9,%XMM6

(2453) 0x4abde4 VEXTRACTF128	$0x1,%YMM8,%XMM9

(2453) 0x4abdea VADDPD	%XMM9,%XMM8,%XMM8

(2453) 0x4abdef VSHUFPD	$0x1,%XMM8,%XMM8,%XMM9

(2453) 0x4abdf5 VADDSD	%XMM9,%XMM8,%XMM8

(2453) 0x4abdfa VADDSD	%XMM7,%XMM8,%XMM7

(2453) 0x4abdfe CMP	%RDI,%R9

(2453) 0x4abe01 MOV	-0x30(%RBP),%R14

(2453) 0x4abe05 JNE	4abfc0

(2453) 0x4abe0b MOV	0x20(%RBP),%R11

(2453) 0x4abe0f MOV	0x10(%RBP),%RBX

(2453) 0x4abe13 MOV	0x70(%RBP),%R9

(2453) 0x4abe17 MOV	0x28(%RBP),%RDI

(2453) 0x4abe1b JMP	4ac000

0x4abe20 NOPW	%CS:(%RAX,%RAX,1)

0x4abe2f NOPW	%CS:(%RAX,%RAX,1)

0x4abe3e XCHG	%AX,%AX

(2453) 0x4abe40 MOV	0x70(%RBP),%R9

(2453) 0x4abe44 MOV	-0x30(%RBP),%R14

(2453) 0x4abe48 JMP	4ac000

0x4abe4d NOPW	%CS:(%RAX,%RAX,1)

0x4abe5c NOPW	%CS:(%RAX,%RAX,1)

0x4abe6b NOPW	%CS:(%RAX,%RAX,1)

0x4abe7a NOPW	(%RAX,%RAX,1)

(2453) 0x4abe80 XOR	%EDI,%EDI

(2453) 0x4abe82 MOV	0x70(%RBP),%R9

(2453) 0x4abe86 MOV	-0x30(%RBP),%R14

(2453) 0x4abe8a ADD	-0x40(%RBP),%RDI

(2453) 0x4abe8e MOV	0x28(%RBP),%RDX

(2453) 0x4abe92 NOPW	%CS:(%RAX,%RAX,1)

  (2468) 0x4abea0 VMOVSD	(%RDX,%RDI,8),%XMM8

  (2468) 0x4abea5 VMAXSD	%XMM6,%XMM8,%XMM6

  (2468) 0x4abea9 VADDSD	%XMM7,%XMM8,%XMM7

  (2468) 0x4abead INC	%RDI

  (2468) 0x4abeb0 CMP	%RDI,%RCX

  (2468) 0x4abeb3 JNE	4abea0

(2453) 0x4abeb5 JMP	4abff5

0x4abeba NOPW	(%RAX,%RAX,1)

(2453) 0x4abec0 XOR	%EDI,%EDI

(2453) 0x4abec2 MOV	0x70(%RBP),%R9

(2453) 0x4abec6 MOV	-0x30(%RBP),%R14

(2453) 0x4abeca JMP	4abfcc

0x4abecf NOPW	%CS:(%RAX,%RAX,1)

0x4abede NOPW	%CS:(%RAX,%RAX,1)

0x4abeed NOPW	%CS:(%RAX,%RAX,1)

0x4abefc NOPL	(%RAX)

(2453) 0x4abf00 MOV	0x88(%RBP),%R13

(2453) 0x4abf07 MOV	0x10(%RBP),%RBX

(2453) 0x4abf0b MOV	0x70(%RBP),%R9

(2453) 0x4abf0f MOV	0x80(%RBP),%R12

(2453) 0x4abf16 MOV	-0x30(%RBP),%R14

(2453) 0x4abf1a ADD	-0x40(%RBP),%RDI

(2453) 0x4abf1e JMP	4abf48

0x4abf20 NOPW	%CS:(%RAX,%RAX,1)

0x4abf2f NOPW	%CS:(%RAX,%RAX,1)

0x4abf3e XCHG	%AX,%AX

  (2472) 0x4abf40 INC	%RDI

  (2472) 0x4abf43 CMP	%RDI,%RCX

  (2472) 0x4abf46 JE	4abf80

  (2472) 0x4abf48 MOV	0x38(%RBP),%RDX

  (2472) 0x4abf4c MOV	(%RDX,%RDI,8),%RDX

  (2472) 0x4abf50 CMP	(%R9,%RDX,8),%R11

  (2472) 0x4abf54 JNE	4abf40

  (2472) 0x4abf56 MOV	0x28(%RBP),%RDX

  (2472) 0x4abf5a VMOVSD	(%RDX,%RDI,8),%XMM8

  (2472) 0x4abf5f VMINSD	%XMM6,%XMM8,%XMM6

  (2472) 0x4abf63 VADDSD	%XMM7,%XMM8,%XMM7

  (2472) 0x4abf67 JMP	4abf40

0x4abf69 NOPW	%CS:(%RAX,%RAX,1)

0x4abf78 NOPL	(%RAX,%RAX,1)

(2453) 0x4abf80 MOV	0x20(%RBP),%R11

(2453) 0x4abf84 MOV	0x28(%RBP),%RDI

(2453) 0x4abf88 JMP	4ac000

0x4abf8a NOPW	%CS:(%RAX,%RAX,1)

0x4abf99 NOPW	%CS:(%RAX,%RAX,1)

0x4abfa8 NOPW	%CS:(%RAX,%RAX,1)

0x4abfb7 NOPW	(%RAX,%RAX,1)

(2453) 0x4abfc0 MOV	0x20(%RBP),%R11

(2453) 0x4abfc4 MOV	0x10(%RBP),%RBX

(2453) 0x4abfc8 MOV	0x70(%RBP),%R9

(2453) 0x4abfcc ADD	-0x40(%RBP),%RDI

(2453) 0x4abfd0 MOV	0x28(%RBP),%RDX

(2453) 0x4abfd4 NOPW	%CS:(%RAX,%RAX,1)

  (2464) 0x4abfe0 VMOVSD	(%RDX,%RDI,8),%XMM8

  (2464) 0x4abfe5 VMINSD	%XMM6,%XMM8,%XMM6

  (2464) 0x4abfe9 VADDSD	%XMM7,%XMM8,%XMM7

  (2464) 0x4abfed INC	%RDI

  (2464) 0x4abff0 CMP	%RDI,%RCX

  (2464) 0x4abff3 JNE	4abfe0

(2453) 0x4abff5 MOV	%RDX,%RDI

(2453) 0x4abff8 NOPL	(%RAX,%RAX,1)

(2453) 0x4ac000 SUB	-0x40(%RBP),%RCX

(2453) 0x4ac004 ADD	-0x48(%RBP),%R10

(2453) 0x4ac008 ADD	%RSI,%R10

(2453) 0x4ac00b ADD	%RCX,-0x38(%RBP)

(2453) 0x4ac00f MOVQ	$-0x1,(%R12,%R14,8)

(2453) 0x4ac017 VANDPD	%XMM3,%XMM7,%XMM7

(2453) 0x4ac01b VANDPD	%XMM3,%XMM5,%XMM8

(2453) 0x4ac01f VMULSD	%XMM0,%XMM8,%XMM8

(2453) 0x4ac023 MOV	(%RBX,%RAX,8),%RCX

(2453) 0x4ac027 INC	%RCX

(2453) 0x4ac02a VUCOMISD	%XMM8,%XMM7

(2453) 0x4ac02f MOV	(%RBX,%R8,8),%RSI

(2453) 0x4ac033 JBE	4ac0c0

(2453) 0x4ac039 VUCOMISD	%XMM4,%XMM0

(2453) 0x4ac03d JAE	4ac0c0

(2453) 0x4ac043 CMP	%RSI,%RCX

(2453) 0x4ac046 JGE	4ac06b

(2453) 0x4ac048 NOPL	(%RAX,%RAX,1)

  (2463) 0x4ac050 MOVQ	$-0x1,(%R12,%RCX,8)

  (2463) 0x4ac058 INC	%RCX

  (2463) 0x4ac05b MOV	(%RBX,%R8,8),%RSI

  (2463) 0x4ac05f CMP	%RSI,%RCX

  (2463) 0x4ac062 JL	4ac050

(2453) 0x4ac064 MOV	(%RBX,%RAX,8),%RCX

(2453) 0x4ac068 INC	%RCX

(2453) 0x4ac06b MOV	(%R11,%RAX,8),%RDI

(2453) 0x4ac06f MOV	(%R11,%R8,8),%R9

(2453) 0x4ac073 CMP	%R9,%RDI

(2453) 0x4ac076 JGE	4ab480

(2453) 0x4ac07c NOPL	(%RAX)

  (2462) 0x4ac080 MOVQ	$-0x1,(%R13,%RDI,8)

  (2462) 0x4ac089 INC	%RDI

  (2462) 0x4ac08c MOV	(%R11,%R8,8),%R9

  (2462) 0x4ac090 CMP	%R9,%RDI

  (2462) 0x4ac093 JL	4ac080

(2453) 0x4ac095 MOV	(%R11,%RAX,8),%RDI

(2453) 0x4ac099 JMP	4ab480

0x4ac09e NOPW	%CS:(%RAX,%RAX,1)

0x4ac0ad NOPW	%CS:(%RAX,%RAX,1)

0x4ac0bc NOPL	(%RAX)

(2453) 0x4ac0c0 CMPQ	$0x2,-0x60(%RBP)

(2453) 0x4ac0c5 JL	4ac180

(2453) 0x4ac0cb VUCOMISD	%XMM2,%XMM5

(2453) 0x4ac0cf JAE	4ac280

(2453) 0x4ac0d5 CMP	%RSI,%RCX

(2453) 0x4ac0d8 JGE	4ac440

(2453) 0x4ac0de VMULSD	%XMM1,%XMM6,%XMM5

(2453) 0x4ac0e2 MOV	-0x38(%RBP),%R14

(2453) 0x4ac0e6 JMP	4ac114

0x4ac0e8 NOPW	%CS:(%RAX,%RAX,1)

0x4ac0f7 NOPW	(%RAX,%RAX,1)

  (2461) 0x4ac100 MOVQ	$-0x1,(%R12,%RCX,8)

  (2461) 0x4ac108 DEC	%R10

  (2461) 0x4ac10b INC	%RCX

  (2461) 0x4ac10e CMP	(%RBX,%R8,8),%RCX

  (2461) 0x4ac112 JGE	4ac142

  (2461) 0x4ac114 MOV	0x18(%RBP),%RDX

  (2461) 0x4ac118 VUCOMISD	(%RDX,%RCX,8),%XMM5

  (2461) 0x4ac11d JAE	4ac100

  (2461) 0x4ac11f MOV	(%R15,%RAX,8),%RSI

  (2461) 0x4ac123 MOV	0x30(%RBP),%RDX

  (2461) 0x4ac127 MOV	(%RDX,%RCX,8),%RDX

  (2461) 0x4ac12b CMP	(%R15,%RDX,8),%RSI

  (2461) 0x4ac12f MOV	-0x38(%RBP),%R14

  (2461) 0x4ac133 JNE	4ac100

  (2461) 0x4ac135 MOV	%RDX,(%R12,%RCX,8)

  (2461) 0x4ac139 INC	%RCX

  (2461) 0x4ac13c CMP	(%RBX,%R8,8),%RCX

  (2461) 0x4ac140 JL	4ac114

(2453) 0x4ac142 MOV	(%R11,%RAX,8),%RCX

(2453) 0x4ac146 CMP	(%R11,%R8,8),%RCX

(2453) 0x4ac14a JGE	4ab494

(2453) 0x4ac150 JMP	4ac452

0x4ac155 NOPW	%CS:(%RAX,%RAX,1)

0x4ac164 NOPW	%CS:(%RAX,%RAX,1)

0x4ac173 NOPW	%CS:(%RAX,%RAX,1)

(2453) 0x4ac180 VUCOMISD	%XMM2,%XMM5

(2453) 0x4ac184 JAE	4ac340

(2453) 0x4ac18a CMP	%RSI,%RCX

(2453) 0x4ac18d MOV	0x30(%RBP),%RSI

(2453) 0x4ac191 MOV	0x18(%RBP),%R9

(2453) 0x4ac195 JGE	4ac1f0

(2453) 0x4ac197 VMULSD	%XMM1,%XMM6,%XMM5

(2453) 0x4ac19b JMP	4ac1d1

0x4ac19d NOPW	%CS:(%RAX,%RAX,1)

0x4ac1ac NOPW	%CS:(%RAX,%RAX,1)

0x4ac1bb NOPL	(%RAX,%RAX,1)

  (2457) 0x4ac1c0 MOV	(%RSI,%RCX,8),%RDX

  (2457) 0x4ac1c4 MOV	%RDX,(%R12,%RCX,8)

  (2457) 0x4ac1c8 INC	%RCX

  (2457) 0x4ac1cb CMP	(%RBX,%R8,8),%RCX

  (2457) 0x4ac1cf JGE	4ac1f0

  (2457) 0x4ac1d1 VUCOMISD	(%R9,%RCX,8),%XMM5

  (2457) 0x4ac1d7 JB	4ac1c0

  (2457) 0x4ac1d9 DEC	%R10

  (2457) 0x4ac1dc MOV	$-0x1,%RDX

  (2457) 0x4ac1e3 MOV	%RDX,(%R12,%RCX,8)

  (2457) 0x4ac1e7 INC	%RCX

  (2457) 0x4ac1ea CMP	(%RBX,%R8,8),%RCX

  (2457) 0x4ac1ee JL	4ac1d1

(2453) 0x4ac1f0 MOV	(%R11,%RAX,8),%RAX

(2453) 0x4ac1f4 CMP	(%R11,%R8,8),%RAX

(2453) 0x4ac1f8 JGE	4ac400

(2453) 0x4ac1fe VMULSD	%XMM1,%XMM6,%XMM5

(2453) 0x4ac202 MOV	-0x38(%RBP),%R14

(2453) 0x4ac206 JMP	4ac25a

0x4ac208 NOPW	%CS:(%RAX,%RAX,1)

0x4ac217 NOPW	%CS:(%RAX,%RAX,1)

0x4ac226 NOPW	%CS:(%RAX,%RAX,1)

0x4ac235 NOPW	%CS:(%RAX,%RAX,1)

  (2456) 0x4ac240 MOV	0x38(%RBP),%RCX

  (2456) 0x4ac244 MOV	(%RCX,%RAX,8),%RCX

  (2456) 0x4ac248 MOV	%RCX,(%R13,%RAX,8)

  (2456) 0x4ac24d INC	%RAX

  (2456) 0x4ac250 CMP	(%R11,%R8,8),%RAX

  (2456) 0x4ac254 JGE	4ab498

  (2456) 0x4ac25a VUCOMISD	(%RDI,%RAX,8),%XMM5

  (2456) 0x4ac25f JB	4ac240

  (2456) 0x4ac261 DEC	%R14

  (2456) 0x4ac264 MOV	$-0x1,%RCX

  (2456) 0x4ac26b MOV	%RCX,(%R13,%RAX,8)

  (2456) 0x4ac270 INC	%RAX

  (2456) 0x4ac273 CMP	(%R11,%R8,8),%RAX

  (2456) 0x4ac277 JL	4ac25a

(2453) 0x4ac279 JMP	4ab498

0x4ac27e XCHG	%AX,%AX

(2453) 0x4ac280 CMP	%RSI,%RCX

(2453) 0x4ac283 JGE	4ac500

(2453) 0x4ac289 VMULSD	%XMM1,%XMM6,%XMM5

(2453) 0x4ac28d MOV	-0x38(%RBP),%R14

(2453) 0x4ac291 JMP	4ac2d4

0x4ac293 NOPW	%CS:(%RAX,%RAX,1)

0x4ac2a2 NOPW	%CS:(%RAX,%RAX,1)

0x4ac2b1 NOPW	%CS:(%RAX,%RAX,1)

  (2459) 0x4ac2c0 MOVQ	$-0x1,(%R12,%RCX,8)

  (2459) 0x4ac2c8 DEC	%R10

  (2459) 0x4ac2cb INC	%RCX

  (2459) 0x4ac2ce CMP	(%RBX,%R8,8),%RCX

  (2459) 0x4ac2d2 JGE	4ac302

  (2459) 0x4ac2d4 MOV	0x18(%RBP),%RDX

  (2459) 0x4ac2d8 VUCOMISD	(%RDX,%RCX,8),%XMM5

  (2459) 0x4ac2dd JBE	4ac2c0

  (2459) 0x4ac2df MOV	(%R15,%RAX,8),%RSI

  (2459) 0x4ac2e3 MOV	0x30(%RBP),%RDX

  (2459) 0x4ac2e7 MOV	(%RDX,%RCX,8),%RDX

  (2459) 0x4ac2eb CMP	(%R15,%RDX,8),%RSI

  (2459) 0x4ac2ef MOV	-0x38(%RBP),%R14

  (2459) 0x4ac2f3 JNE	4ac2c0

  (2459) 0x4ac2f5 MOV	%RDX,(%R12,%RCX,8)

  (2459) 0x4ac2f9 INC	%RCX

  (2459) 0x4ac2fc CMP	(%RBX,%R8,8),%RCX

  (2459) 0x4ac300 JL	4ac2d4

(2453) 0x4ac302 MOV	(%R11,%RAX,8),%RCX

(2453) 0x4ac306 CMP	(%R11,%R8,8),%RCX

(2453) 0x4ac30a JGE	4ab494

(2453) 0x4ac310 JMP	4ac512

0x4ac315 NOPW	%CS:(%RAX,%RAX,1)

0x4ac324 NOPW	%CS:(%RAX,%RAX,1)

0x4ac333 NOPW	%CS:(%RAX,%RAX,1)

(2453) 0x4ac340 VMULSD	%XMM1,%XMM6,%XMM5

(2453) 0x4ac344 CMP	%RSI,%RCX

(2453) 0x4ac347 MOV	0x30(%RBP),%RSI

(2453) 0x4ac34b MOV	0x18(%RBP),%R9

(2453) 0x4ac34f JL	4ac391

(2453) 0x4ac351 JMP	4ac3b0

0x4ac353 NOPW	%CS:(%RAX,%RAX,1)

0x4ac362 NOPW	%CS:(%RAX,%RAX,1)

0x4ac371 NOPW	%CS:(%RAX,%RAX,1)

  (2455) 0x4ac380 MOV	(%RSI,%RCX,8),%RDX

  (2455) 0x4ac384 MOV	%RDX,(%R12,%RCX,8)

  (2455) 0x4ac388 INC	%RCX

  (2455) 0x4ac38b CMP	(%RBX,%R8,8),%RCX

  (2455) 0x4ac38f JGE	4ac3b0

  (2455) 0x4ac391 VUCOMISD	(%R9,%RCX,8),%XMM5

  (2455) 0x4ac397 JA	4ac380

  (2455) 0x4ac399 DEC	%R10

  (2455) 0x4ac39c MOV	$-0x1,%RDX

  (2455) 0x4ac3a3 MOV	%RDX,(%R12,%RCX,8)

  (2455) 0x4ac3a7 INC	%RCX

  (2455) 0x4ac3aa CMP	(%RBX,%R8,8),%RCX

  (2455) 0x4ac3ae JL	4ac391

(2453) 0x4ac3b0 MOV	(%R11,%RAX,8),%RAX

(2453) 0x4ac3b4 CMP	(%R11,%R8,8),%RAX

(2453) 0x4ac3b8 JGE	4ac400

(2453) 0x4ac3ba MOV	-0x38(%RBP),%R14

(2453) 0x4ac3be JMP	4ac3da

  (2454) 0x4ac3c0 MOV	0x38(%RBP),%RCX

  (2454) 0x4ac3c4 MOV	(%RCX,%RAX,8),%RCX

  (2454) 0x4ac3c8 MOV	%RCX,(%R13,%RAX,8)

  (2454) 0x4ac3cd INC	%RAX

  (2454) 0x4ac3d0 CMP	(%R11,%R8,8),%RAX

  (2454) 0x4ac3d4 JGE	4ab498

  (2454) 0x4ac3da VUCOMISD	(%RDI,%RAX,8),%XMM5

  (2454) 0x4ac3df JA	4ac3c0

  (2454) 0x4ac3e1 DEC	%R14

  (2454) 0x4ac3e4 MOV	$-0x1,%RCX

  (2454) 0x4ac3eb MOV	%RCX,(%R13,%RAX,8)

  (2454) 0x4ac3f0 INC	%RAX

  (2454) 0x4ac3f3 CMP	(%R11,%R8,8),%RAX

  (2454) 0x4ac3f7 JL	4ac3da

(2453) 0x4ac3f9 JMP	4ab498

0x4ac3fe XCHG	%AX,%AX

(2453) 0x4ac400 MOV	-0x38(%RBP),%R14

(2453) 0x4ac404 JMP	4ab498

0x4ac409 NOPW	%CS:(%RAX,%RAX,1)

0x4ac418 NOPW	%CS:(%RAX,%RAX,1)

0x4ac427 NOPW	%CS:(%RAX,%RAX,1)

0x4ac436 NOPW	%CS:(%RAX,%RAX,1)

(2453) 0x4ac440 MOV	-0x38(%RBP),%R14

(2453) 0x4ac444 MOV	(%R11,%RAX,8),%RCX

(2453) 0x4ac448 CMP	(%R11,%R8,8),%RCX

(2453) 0x4ac44c JGE	4ab494

(2453) 0x4ac452 VMULSD	%XMM1,%XMM6,%XMM5

(2453) 0x4ac456 JMP	4ac499

0x4ac458 NOPW	%CS:(%RAX,%RAX,1)

0x4ac467 NOPW	%CS:(%RAX,%RAX,1)

0x4ac476 NOPW	%CS:(%RAX,%RAX,1)

  (2460) 0x4ac480 MOVQ	$-0x1,(%R13,%RCX,8)

  (2460) 0x4ac489 DEC	%R14

  (2460) 0x4ac48c INC	%RCX

  (2460) 0x4ac48f CMP	(%R11,%R8,8),%RCX

  (2460) 0x4ac493 JGE	4ab494

  (2460) 0x4ac499 VUCOMISD	(%RDI,%RCX,8),%XMM5

  (2460) 0x4ac49e JAE	4ac480

  (2460) 0x4ac4a0 MOV	(%R15,%RAX,8),%RSI

  (2460) 0x4ac4a4 MOV	0x38(%RBP),%RDX

  (2460) 0x4ac4a8 MOV	(%RDX,%RCX,8),%RDX

  (2460) 0x4ac4ac CMP	(%R9,%RDX,8),%RSI

  (2460) 0x4ac4b0 JNE	4ac480

  (2460) 0x4ac4b2 MOV	%RDX,(%R13,%RCX,8)

  (2460) 0x4ac4b7 INC	%RCX

  (2460) 0x4ac4ba CMP	(%R11,%R8,8),%RCX

  (2460) 0x4ac4be JL	4ac499

(2453) 0x4ac4c0 JMP	4ab494

0x4ac4c5 NOPW	%CS:(%RAX,%RAX,1)

0x4ac4d4 NOPW	%CS:(%RAX,%RAX,1)

0x4ac4e3 NOPW	%CS:(%RAX,%RAX,1)

0x4ac4f2 NOPW	%CS:(%RAX,%RAX,1)

(2453) 0x4ac500 MOV	-0x38(%RBP),%R14

(2453) 0x4ac504 MOV	(%R11,%RAX,8),%RCX

(2453) 0x4ac508 CMP	(%R11,%R8,8),%RCX

(2453) 0x4ac50c JGE	4ab494

(2453) 0x4ac512 VMULSD	%XMM1,%XMM6,%XMM5

(2453) 0x4ac516 JMP	4ac559

0x4ac518 NOPW	%CS:(%RAX,%RAX,1)

0x4ac527 NOPW	%CS:(%RAX,%RAX,1)

0x4ac536 NOPW	%CS:(%RAX,%RAX,1)

  (2458) 0x4ac540 MOVQ	$-0x1,(%R13,%RCX,8)

  (2458) 0x4ac549 DEC	%R14

  (2458) 0x4ac54c INC	%RCX

  (2458) 0x4ac54f CMP	(%R11,%R8,8),%RCX

  (2458) 0x4ac553 JGE	4ab494

  (2458) 0x4ac559 VUCOMISD	(%RDI,%RCX,8),%XMM5

  (2458) 0x4ac55e JBE	4ac540

  (2458) 0x4ac560 MOV	(%R15,%RAX,8),%RSI

  (2458) 0x4ac564 MOV	0x38(%RBP),%RDX

  (2458) 0x4ac568 MOV	(%RDX,%RCX,8),%RDX

  (2458) 0x4ac56c CMP	(%R9,%RDX,8),%RSI

  (2458) 0x4ac570 JNE	4ac540

  (2458) 0x4ac572 MOV	%RDX,(%R13,%RCX,8)

  (2458) 0x4ac577 INC	%RCX

  (2458) 0x4ac57a CMP	(%R11,%R8,8),%RCX

  (2458) 0x4ac57e JL	4ac559

(2453) 0x4ac580 JMP	4ab494

0x4ac585 NOPW	%CS:(%RAX,%RAX,1)

0x4ac594 NOPW	%CS:(%RAX,%RAX,1)

0x4ac5a3 NOPW	%CS:(%RAX,%RAX,1)

0x4ac5b2 NOPW	%CS:(%RAX,%RAX,1)

0x4ac5c0 XOR	%R14D,%R14D

0x4ac5c3 XOR	%R10D,%R10D

0x4ac5c6 MOV	%R10,-0x78(%RBP)

0x4ac5ca MOV	%R14,-0x80(%RBP)

0x4ac5ce MOV	0x50(%RBP),%RAX

0x4ac5d2 MOV	0x40(%RBP),%RCX

0x4ac5d6 LEA	(%RAX,%RCX,8),%RSI

0x4ac5da MOV	0x60(%RBP),%RAX

0x4ac5de LEA	(%RAX,%RCX,8),%RCX

0x4ac5e2 LEA	-0x78(%RBP),%RDI

0x4ac5e6 LEA	-0x80(%RBP),%RDX

0x4ac5ea MOV	0x78(%RBP),%R8

0x4ac5ee VZEROUPPER

0x4ac5f1 CALL	51ef40 <hypre_prefix_sum_pair>

0x4ac5f6 MOV	-0x68(%RBP),%RDX

0x4ac5fa MOV	-0x70(%RBP),%RAX

0x4ac5fe CMP	%RAX,%RDX

0x4ac601 JGE	4ac780

0x4ac607 MOV	0x68(%RBP),%RCX

0x4ac60b MOV	0x58(%RBP),%RSI

0x4ac60f MOV	-0x78(%RBP),%RDI

0x4ac613 MOV	-0x80(%RBP),%R8

0x4ac617 JMP	4ac64d

0x4ac619 NOPW	%CS:(%RAX,%RAX,1)

0x4ac628 NOPW	%CS:(%RAX,%RAX,1)

0x4ac637 NOPW	(%RAX,%RAX,1)

(2450) 0x4ac640 CMP	%RAX,%RDX

(2450) 0x4ac643 MOV	0x10(%RBP),%RBX

(2450) 0x4ac647 JE	4ac780

(2450) 0x4ac64d MOV	%RDX,%R9

(2450) 0x4ac650 MOV	0x50(%RBP),%RDX

(2450) 0x4ac654 LEA	(%RDX,%R9,8),%RDX

(2450) 0x4ac658 ADD	%RDI,(%RDX)

(2450) 0x4ac65b MOV	0x60(%RBP),%RDX

(2450) 0x4ac65f ADD	%R8,(%RDX,%R9,8)

(2450) 0x4ac663 MOV	(%RBX,%R9,8),%R10

(2450) 0x4ac667 MOV	0x8(%RBX,%R9,8),%R11

(2450) 0x4ac66c LEA	0x1(%R9),%RDX

(2450) 0x4ac670 CMP	%R11,%R10

(2450) 0x4ac673 JGE	4ac700

(2450) 0x4ac679 MOV	0x50(%RBP),%RBX

(2450) 0x4ac67d LEA	(%RBX,%R9,8),%RBX

(2450) 0x4ac681 MOV	(%RBX),%R15

(2450) 0x4ac684 JMP	4ac6c8

0x4ac686 NOPW	%CS:(%RAX,%RAX,1)

0x4ac695 NOPW	%CS:(%RAX,%RAX,1)

0x4ac6a4 NOPW	%CS:(%RAX,%RAX,1)

0x4ac6b3 NOPW	%CS:(%RAX,%RAX,1)

  (2452) 0x4ac6c0 INC	%R10

  (2452) 0x4ac6c3 CMP	%R11,%R10

  (2452) 0x4ac6c6 JGE	4ac700

  (2452) 0x4ac6c8 MOV	(%R12,%R10,8),%RBX

  (2452) 0x4ac6cc TEST	%RBX,%RBX

  (2452) 0x4ac6cf JS	4ac6c0

  (2452) 0x4ac6d1 MOV	%RBX,(%RSI,%R15,8)

  (2452) 0x4ac6d5 INC	%R15

  (2452) 0x4ac6d8 MOV	0x10(%RBP),%R11

  (2452) 0x4ac6dc MOV	(%R11,%RDX,8),%R11

  (2452) 0x4ac6e0 JMP	4ac6c0

0x4ac6e2 NOPW	%CS:(%RAX,%RAX,1)

0x4ac6f1 NOPW	%CS:(%RAX,%RAX,1)

(2450) 0x4ac700 MOV	0x20(%RBP),%R11

(2450) 0x4ac704 MOV	(%R11,%R9,8),%R10

(2450) 0x4ac708 MOV	(%R11,%RDX,8),%R11

(2450) 0x4ac70c CMP	%R11,%R10

(2450) 0x4ac70f JGE	4ac640

(2450) 0x4ac715 MOV	0x60(%RBP),%RBX

(2450) 0x4ac719 MOV	(%RBX,%R9,8),%R9

(2450) 0x4ac71d JMP	4ac74c

0x4ac71f NOPW	%CS:(%RAX,%RAX,1)

0x4ac72e NOPW	%CS:(%RAX,%RAX,1)

0x4ac73d NOPL	(%RAX)

  (2451) 0x4ac740 INC	%R10

  (2451) 0x4ac743 CMP	%R11,%R10

  (2451) 0x4ac746 JGE	4ac640

  (2451) 0x4ac74c MOV	(%R13,%R10,8),%RBX

  (2451) 0x4ac751 TEST	%RBX,%RBX

  (2451) 0x4ac754 JS	4ac740

  (2451) 0x4ac756 MOV	%RBX,(%RCX,%R9,8)

  (2451) 0x4ac75a INC	%R9

  (2451) 0x4ac75d MOV	0x20(%RBP),%R11

  (2451) 0x4ac761 MOV	(%R11,%RDX,8),%R11

  (2451) 0x4ac765 JMP	4ac740

0x4ac767 NOPW	%CS:(%RAX,%RAX,1)

0x4ac776 NOPW	%CS:(%RAX,%RAX,1)

0x4ac780 ADD	$0x68,%RSP

0x4ac784 POP	%RBX

0x4ac785 POP	%R12

0x4ac787 POP	%R13

0x4ac789 POP	%R14

0x4ac78b POP	%R15

0x4ac78d POP	%RBP

0x4ac78e RET

0x4ac78f NOP

Coverage (%)	Name	Source Location	Module
►100.00+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_4

Source file and lines	par_strength.c:246-513
Module	exec

The function is defined in /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:246-283,289-302,309-386,392-415,422-445,451-472,480,492-513.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 31.83 to 1.83 cycles (17.36x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is probably not vectorized. Only 12% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 31.83 to 2.28 cycles (13.99x speedup).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

hypre_GetSimpleThreadPartition: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:250
hypre_prefix_sum_pair: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:480

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

VZEROUPPER: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:480

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 184 bytes. The binary function is storing 56 bytes.

General properties

nb instructions	188
nb uops	191
loop length	1722
used x86 registers	16
used mmx registers	0
used xmm registers	5
used ymm registers	0
used zmm registers	0
nb stack references	22

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	31.83 cycles
front end	31.83 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	1.50	1.00	10.00	10.00	7.50	1.00	1.50	7.50	7.50	7.50	1.00	10.00
cycles	1.50	1.00	10.00	10.00	7.50	1.00	1.50	7.50	7.50	7.50	1.00	10.00

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	31.83
Dispatch	10.00
Overall L1	31.83

Vectorization ratios

INT

all	3%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	10%

all	25%
load	0%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	100%

INT+FP

all	6%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	18%

Vector efficiency ratios

INT

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	11%

all	15%
load	12%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

INT+FP

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 31.83 cycles. At this rate:

3% of peak load performance is reached (5.78 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
1% of peak store performance is reached (1.76 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 31.83 to 10.00 cycles (3.18x speedup).

ASM code

In the binary file, the address of the function is: 4ab3b0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0x68,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R9,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R8,-0x60(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RCX,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV 0x88(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x80(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x40(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x10(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
LEA -0x68(%RBP),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x70(%RBP),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 51da70 <hypre_GetSimpleThreadPartition>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x68(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0x70(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x88(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMP %RAX,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 4ac5c0 <hypre_BoomerAMGCreateS.extracted+0x1210>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x30(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x28(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x18(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD -0x38(%RBP),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVQ %R14,%XMM1	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
LEA 0x8(%R9),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RCX,-0x50(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
ADD $0x8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,-0x58(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
VXORPD %XMM2,%XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VMOVDDUP 0x7fc39(%RIP),%XMM3	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x7ebc9(%RIP),%XMM4	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV 0x20(%RBP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JMP 4ab4a5 <hypre_BoomerAMGCreateS.extracted+0xf5>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV %R10,-0x78(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R14,-0x80(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x50(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x40(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RAX,%RCX,8),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x60(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RAX,%RCX,8),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x78(%RBP),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x80(%RBP),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x78(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 51ef40 <hypre_prefix_sum_pair>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x68(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0x70(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RAX,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 4ac780 <hypre_BoomerAMGCreateS.extracted+0x13d0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x68(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x58(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0x78(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0x80(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JMP 4ac64d <hypre_BoomerAMGCreateS.extracted+0x129d>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD $0x68,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_4

Source file and lines	par_strength.c:246-513
Module	exec

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

hypre_GetSimpleThreadPartition: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:250
hypre_prefix_sum_pair: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:480

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

VZEROUPPER: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:480

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 184 bytes. The binary function is storing 56 bytes.

General properties

nb instructions	188
nb uops	191
loop length	1722
used x86 registers	16
used mmx registers	0
used xmm registers	5
used ymm registers	0
used zmm registers	0
nb stack references	22

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	31.83 cycles
front end	31.83 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	1.50	1.00	10.00	10.00	7.50	1.00	1.50	7.50	7.50	7.50	1.00	10.00
cycles	1.50	1.00	10.00	10.00	7.50	1.00	1.50	7.50	7.50	7.50	1.00	10.00

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	31.83
Dispatch	10.00
Overall L1	31.83

Vectorization ratios

INT

all	3%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	10%

all	25%
load	0%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	100%

INT+FP

all	6%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	18%

Vector efficiency ratios

INT

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	11%

all	15%
load	12%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

INT+FP

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 31.83 cycles. At this rate:

3% of peak load performance is reached (5.78 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
1% of peak store performance is reached (1.76 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 4ab3b0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0x68,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R9,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R8,-0x60(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RCX,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV 0x88(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x80(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x40(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x10(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
LEA -0x68(%RBP),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x70(%RBP),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 51da70 <hypre_GetSimpleThreadPartition>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x68(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0x70(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x88(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMP %RAX,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 4ac5c0 <hypre_BoomerAMGCreateS.extracted+0x1210>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x30(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x28(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x18(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD -0x38(%RBP),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVQ %R14,%XMM1	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
LEA 0x8(%R9),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RCX,-0x50(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
ADD $0x8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,-0x58(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
VXORPD %XMM2,%XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VMOVDDUP 0x7fc39(%RIP),%XMM3	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x7ebc9(%RIP),%XMM4	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV 0x20(%RBP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JMP 4ab4a5 <hypre_BoomerAMGCreateS.extracted+0xf5>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV %R10,-0x78(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R14,-0x80(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x50(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x40(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RAX,%RCX,8),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x60(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RAX,%RCX,8),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x78(%RBP),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x80(%RBP),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x78(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 51ef40 <hypre_prefix_sum_pair>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x68(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0x70(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RAX,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 4ac780 <hypre_BoomerAMGCreateS.extracted+0x13d0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x68(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x58(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0x78(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0x80(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JMP 4ac64d <hypre_BoomerAMGCreateS.extracted+0x129d>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD $0x68,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

Name	Coverage (%)	Time (s)
▼hypre_BoomerAMGCreateS.extracted–	1.41	0.74
▼Loop 2453 - par_strength.c:253-472 - exec–	0.06	0.03
○Loop 2455 - par_strength.c:451-460 - exec	0.42	0.18
○Loop 2467 - par_strength.c:324-327 - exec	0.29	0.12
○Loop 2466 - par_strength.c:324-327 - exec	0.03	0.01
○Loop 2454 - par_strength.c:463-472 - exec	0.00	0.00
○Loop 2465 - par_strength.c:329-332 - exec	0.00	0.00
○Loop 2464 - par_strength.c:329-332 - exec	0.00	0.00
○Loop 2463 - par_strength.c:345-347 - exec	0.00	0.00
○Loop 2473 - par_strength.c:297-302 - exec	0.00	0.00
○Loop 2469 - par_strength.c:316-319 - exec	0.00	0.00
○Loop 2479 - par_strength.c:270-275 - exec	0.00	0.00
○Loop 2462 - par_strength.c:351-353 - exec	0.00	0.00
○Loop 2461 - par_strength.c:363-373 - exec	0.00	0.00
○Loop 2457 - par_strength.c:424-433 - exec	0.00	0.00
○Loop 2456 - par_strength.c:436-445 - exec	0.00	0.00
○Loop 2478 - par_strength.c:270-275 - exec	0.00	0.00
○Loop 2470 - par_strength.c:311-314 - exec	0.00	0.00
○Loop 2471 - par_strength.c:311-314 - exec	0.00	0.00
○Loop 2475 - par_strength.c:289-294 - exec	0.00	0.00
○Loop 2460 - par_strength.c:376-386 - exec	0.00	0.00
○Loop 2468 - par_strength.c:316-319 - exec	0.00	0.00
○Loop 2458 - par_strength.c:405-415 - exec	0.00	0.00
○Loop 2474 - par_strength.c:289-294 - exec	0.00	0.00
○Loop 2476 - par_strength.c:278-283 - exec	0.00	0.00
○Loop 2472 - par_strength.c:297-302 - exec	0.00	0.00
○Loop 2477 - par_strength.c:278-283 - exec	0.00	0.00
○Loop 2459 - par_strength.c:392-402 - exec	0.00	0.00
▼Loop 2450 - par_strength.c:492-513 - exec–	0.06	0.02
○Loop 2452 - par_strength.c:498-503 - exec	0.55	0.23
○Loop 2451 - par_strength.c:508-513 - exec	0.00	0.00

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Matching between your function (in the source code) and the binary function

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