OV - exec - Function hypre_BoomerAMGBuildMultipass.extracted.34

	Function: hypre_BoomerAMGBuildMultipass.extracted.34	Module: exec	Source: par_multi_interp.c:891-1134 [...]	Coverage (incl. loops): 1.53% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 891 - 1134

--------------------------------------------------------------------------------

891:       #pragma omp parallel private(i,my_thread_num,num_threads,thread_start,thread_stop,cnt_nz,cnt_nz_offd,i1,j,j1,j_start,j_end,k1,k,P_marker,P_marker_offd)

[...]

900:           my_thread_num = hypre_GetThreadNum();

901:           num_threads = hypre_NumActiveThreads();

902:           thread_start = (pass_length/num_threads)*my_thread_num;

903:           if (my_thread_num == num_threads-1)

904:           {  thread_stop = pass_length; }

905:           else

906:           {  thread_stop = (pass_length/num_threads)*(my_thread_num+1); }

907:           thread_start += pass_pointer[pass];

908:           thread_stop += pass_pointer[pass];

[...]

916:           P_marker = hypre_CTAlloc(HYPRE_Int, n_coarse); /* marks points to see if they're counted */

917:           for (i=0; i < n_coarse; i++)

918:           {   P_marker[i] = -1; }

919:           if (new_num_cols_offd == local_index+1)

[...]

925:           else if (n_coarse_offd)

[...]

939:           for (i=thread_start; i < thread_stop; i++)

940:           {

941:              i1 = pass_array[i];

942:              P_diag_start[i1] = cnt_nz;

943:              P_offd_start[i1] = cnt_nz_offd;

944:              for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++)

945:              {

946:                 j1 = S_diag_j[j];

947:                 if (assigned[j1] == pass-1)

948:                 {

949:                    j_start = P_diag_start[j1];

950:                    j_end = j_start+P_diag_i[j1+1];

951:                    for (k=j_start; k < j_end; k++)

952:                    {

953:                       k1 = P_diag_pass[pass-1][k];

954:                       if (P_marker[k1] != i1)

955:                       {

956:                          cnt_nz++;

957:                          P_diag_i[i1+1]++;

958:                          P_marker[k1] = i1;

959:                       }

960:                    }

961:                    j_start = P_offd_start[j1];

962:                    j_end = j_start+P_offd_i[j1+1];

963:                    for (k=j_start; k < j_end; k++)

964:                    {

965:                       k1 = P_offd_pass[pass-1][k];

966:                       if (P_marker_offd[k1] != i1)

967:                       {

968:                          cnt_nz_offd++;

969:                          P_offd_i[i1+1]++;

970:                          P_marker_offd[k1] = i1;

[...]

976:              for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++)

977:              {

978:                 j1 = S_offd_j[j];

979:                 if (assigned_offd[j1] == pass-1)

980:                 {

981:                    j_start = Pext_start[j1];

982:                    j_end = j_start+Pext_i[j1+1];

983:                    for (k=j_start; k < j_end; k++)

984:                    {

985:                       k1 = Pext_pass[pass][k];

986:                       if (k1 < 0)

987:                       {

988:                          if (P_marker[-k1-1] != i1)

989:                          {

990:                             cnt_nz++;

991:                             P_diag_i[i1+1]++;

992:                             P_marker[-k1-1] = i1;

993:                          }

994:                       }

995:                       else if (P_marker_offd[k1] != i1)

996:                       {

997:                          cnt_nz_offd++;

[...]

1008:           if(my_thread_num == 0)

1009:           {   max_num_threads[0] = num_threads; }

1010:           cnt_nz_offd_per_thread[my_thread_num] = cnt_nz_offd;

1011:           cnt_nz_per_thread[my_thread_num] = cnt_nz;

1012: #ifdef HYPRE_USING_OPENMP

1013: #pragma omp barrier

1014: #endif

1015:           if(my_thread_num == 0)

1016:           {

1017:               for(i = 1; i < max_num_threads[0]; i++)

1018:               {

1019:                   cnt_nz_offd_per_thread[i] += cnt_nz_offd_per_thread[i-1];

1020:                   cnt_nz_per_thread[i] += cnt_nz_per_thread[i-1];

[...]

1026:           if(my_thread_num > 0)

1027:           {

1028:               /* update this thread's section of P_diag_start and P_offd_start

1029:                * with the num of nz's counted by previous threads */

1030:               for (i=thread_start; i < thread_stop; i++)

1031:                {

1032:                    i1 = pass_array[i];

1033:                    P_diag_start[i1] += cnt_nz_per_thread[my_thread_num-1];

1034:                    P_offd_start[i1] += cnt_nz_offd_per_thread[my_thread_num-1];

[...]

1040:               cnt_nz = cnt_nz_per_thread[max_num_threads[0]-1];

1041:               cnt_nz_offd = cnt_nz_offd_per_thread[max_num_threads[0]-1];

1042:

1043:               /* Updated total nz count */

1044:               total_nz += cnt_nz;

1045:               total_nz_offd += cnt_nz_offd;

1046:

1047:               /* Allocate P_diag_pass and P_offd_pass for all threads */

1048:               P_diag_pass[pass] = hypre_CTAlloc(HYPRE_Int, cnt_nz);

1049:               if (cnt_nz_offd)

1050:                  P_offd_pass[pass] = hypre_CTAlloc(HYPRE_Int, cnt_nz_offd);

1051:               else if (num_procs > 1)

[...]

1060:           if(my_thread_num > 0)

1061:           {

1062:               cnt_nz = cnt_nz_per_thread[my_thread_num-1];

1063:               cnt_nz_offd = cnt_nz_offd_per_thread[my_thread_num-1];

[...]

1072:           for (i=thread_start; i < thread_stop; i++)

1073:           {

1074:              i1 = pass_array[i];

1075:              for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++)

1076:              {

1077:                 j1 = S_diag_j[j];

1078:                 if (assigned[j1] == pass-1)

1079:                 {

1080:                    j_start = P_diag_start[j1];

1081:                    j_end = j_start+P_diag_i[j1+1];

1082:                    for (k=j_start; k < j_end; k++)

1083:                    {

1084:                       k1 = P_diag_pass[pass-1][k];

1085:                       if (P_marker[k1] != -i1-1)

1086:                       {

1087:                           P_diag_pass[pass][cnt_nz++] = k1;

1088:                           P_marker[k1] = -i1-1;

1089:                       }

1090:                    }

1091:                    j_start = P_offd_start[j1];

1092:                    j_end = j_start+P_offd_i[j1+1];

1093:                    for (k=j_start; k < j_end; k++)

1094:                    {

1095:                       k1 = P_offd_pass[pass-1][k];

1096:                       if (P_marker_offd[k1] != -i1-1)

1097:                       {

1098:                          P_offd_pass[pass][cnt_nz_offd++] = k1;

1099:                          P_marker_offd[k1] = -i1-1;

1100:                       }

1101:                    }

1102:                 }

1103:              }

1104:              for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++)

1105:              {

1106:                 j1 = S_offd_j[j];

1107:                 if (assigned_offd[j1] == pass-1)

1108:                 {

1109:                    j_start = Pext_start[j1];

1110:                    j_end = j_start+Pext_i[j1+1];

1111:                    for (k=j_start; k < j_end; k++)

1112:                    {

1113:                       k1 = Pext_pass[pass][k];

1114:                       if (k1 < 0)

1115:                       {

1116:                          if (P_marker[-k1-1] != -i1-1)

1117:                          {

1118:                             P_diag_pass[pass][cnt_nz++] = -k1-1;

1119:                             P_marker[-k1-1] = -i1-1;

1120:                          }

1121:                       }

1122:                       else if (P_marker_offd[k1] != -i1-1)

1123:                       {

1124:                          P_offd_pass[pass][cnt_nz_offd++] = k1;

1125:                          P_marker_offd[k1] = -i1-1;

[...]

1132:           hypre_TFree(P_marker);

1133:           if ( (n_coarse_offd) || (new_num_cols_offd  == local_index+1) )

1134:           {    hypre_TFree(P_marker_offd); }

0x451c20 PUSH	%RBP

0x451c21 MOV	%RSP,%RBP

0x451c24 PUSH	%R15

0x451c26 PUSH	%R14

0x451c28 PUSH	%R13

0x451c2a PUSH	%R12

0x451c2c PUSH	%RBX

0x451c2d SUB	$0x128,%RSP

0x451c34 MOV	%R9,-0x130(%RBP)

0x451c3b MOV	%R8,-0xa0(%RBP)

0x451c42 MOV	%RCX,-0x128(%RBP)

0x451c49 MOV	%RDX,-0xa8(%RBP)

0x451c50 MOV	%RDI,-0xc0(%RBP)

0x451c57 MOV	0xd0(%RBP),%RAX

0x451c5e MOV	%RAX,-0x78(%RBP)

0x451c62 MOV	0xc8(%RBP),%RAX

0x451c69 MOV	%RAX,-0xf0(%RBP)

0x451c70 MOV	0xc0(%RBP),%RAX

0x451c77 MOV	%RAX,-0xe0(%RBP)

0x451c7e MOV	0xb8(%RBP),%RBX

0x451c85 MOV	0xb0(%RBP),%RAX

0x451c8c MOV	%RAX,-0xf8(%RBP)

0x451c93 MOV	0xa8(%RBP),%RAX

0x451c9a MOV	%RAX,-0xb8(%RBP)

0x451ca1 MOV	0xa0(%RBP),%RAX

0x451ca8 MOV	%RAX,-0x150(%RBP)

0x451caf MOV	0x98(%RBP),%RAX

0x451cb6 MOV	%RAX,-0x138(%RBP)

0x451cbd MOV	0x90(%RBP),%RAX

0x451cc4 MOV	%RAX,-0x120(%RBP)

0x451ccb MOV	0x88(%RBP),%RAX

0x451cd2 MOV	%RAX,-0x118(%RBP)

0x451cd9 MOV	0x80(%RBP),%RAX

0x451ce0 MOV	%RAX,-0xe8(%RBP)

0x451ce7 MOV	0x78(%RBP),%R15

0x451ceb MOV	0x70(%RBP),%RAX

0x451cef MOV	%RAX,-0x50(%RBP)

0x451cf3 MOV	0x68(%RBP),%RAX

0x451cf7 MOV	%RAX,-0x148(%RBP)

0x451cfe MOV	0x60(%RBP),%RAX

0x451d02 MOV	%RAX,-0x110(%RBP)

0x451d09 MOV	0x58(%RBP),%RAX

0x451d0d MOV	%RAX,-0x108(%RBP)

0x451d14 MOV	0x50(%RBP),%RAX

0x451d18 MOV	%RAX,-0x48(%RBP)

0x451d1c MOV	0x48(%RBP),%RAX

0x451d20 MOV	%RAX,-0x40(%RBP)

0x451d24 MOV	0x40(%RBP),%RAX

0x451d28 MOV	%RAX,-0x98(%RBP)

0x451d2f MOV	0x38(%RBP),%RAX

0x451d33 MOV	%RAX,-0x90(%RBP)

0x451d3a MOV	0x30(%RBP),%R13

0x451d3e MOV	0x28(%RBP),%RAX

0x451d42 MOV	%RAX,-0x88(%RBP)

0x451d49 MOV	0x20(%RBP),%RAX

0x451d4d MOV	%RAX,-0x100(%RBP)

0x451d54 MOV	0x18(%RBP),%RAX

0x451d58 MOV	%RAX,-0x60(%RBP)

0x451d5c MOV	0x10(%RBP),%RAX

0x451d60 MOV	%RAX,-0x58(%RBP)

0x451d64 CALL	51da60 <hypre_GetThreadNum>

0x451d69 MOV	%RAX,%R12

0x451d6c CALL	51da50 <hypre_NumActiveThreads>

0x451d71 MOV	%RAX,%RCX

0x451d74 MOV	%RBX,%RAX

0x451d77 OR	%RCX,%RAX

0x451d7a SHR	$0x20,%RAX

0x451d7e JE	451dc0

0x451d80 MOV	%RBX,%RAX

0x451d83 CQTO

0x451d85 IDIV	%RCX

0x451d88 JMP	451dc6

0x451d8a NOPW	%CS:(%RAX,%RAX,1)

0x451d99 NOPW	%CS:(%RAX,%RAX,1)

0x451da8 NOPW	%CS:(%RAX,%RAX,1)

0x451db7 NOPW	(%RAX,%RAX,1)

0x451dc0 MOV	%EBX,%EAX

0x451dc2 XOR	%EDX,%EDX

0x451dc4 DIV	%ECX

0x451dc6 MOV	%RCX,-0x140(%RBP)

0x451dcd DEC	%RCX

0x451dd0 LEA	0x1(%R12),%RDX

0x451dd5 MOV	%RAX,%R14

0x451dd8 IMUL	%RAX,%RDX

0x451ddc MOV	%R12,-0x68(%RBP)

0x451de0 CMP	%RCX,%R12

0x451de3 CMOVE	%RBX,%RDX

0x451de7 MOV	%RDX,-0xb0(%RBP)

0x451dee MOV	-0x50(%RBP),%RAX

0x451df2 MOV	(%RAX),%R12

0x451df5 MOV	(%R13,%R12,8),%RAX

0x451dfa MOV	%RAX,-0xd8(%RBP)

0x451e01 MOV	$0x8,%ESI

0x451e06 MOV	%R15,%RDI

0x451e09 CALL	51b840 <hypre_CAlloc>

0x451e0e MOV	%RAX,%RBX

0x451e11 TEST	%R15,%R15

0x451e14 JLE	451e2a

0x451e16 SAL	$0x3,%R15

0x451e1a MOV	%RBX,%RDI

0x451e1d MOV	$0xff,%ESI

0x451e22 MOV	%R15,%RDX

0x451e25 CALL	5277f0 <__intel_avx_rep_memset>

0x451e2a IMUL	-0x68(%RBP),%R14

0x451e2f MOV	%R14,-0x70(%RBP)

0x451e33 MOV	-0xb8(%RBP),%RAX

0x451e3a INC	%RAX

0x451e3d MOV	-0xf8(%RBP),%RDI

0x451e44 CMP	%RDI,%RAX

0x451e47 MOV	%RAX,-0xb8(%RBP)

0x451e4e JE	451e5c

0x451e50 MOV	-0xe8(%RBP),%RDI

0x451e57 TEST	%RDI,%RDI

0x451e5a JE	451ec0

0x451e5c MOV	$0x8,%ESI

0x451e61 MOV	%RDI,%R14

0x451e64 CALL	51b840 <hypre_CAlloc>

0x451e69 MOV	%RAX,%R15

0x451e6c MOV	%R14,%RDX

0x451e6f TEST	%R14,%R14

0x451e72 JLE	451ec0

0x451e74 SAL	$0x3,%RDX

0x451e78 MOV	%R15,%RDI

0x451e7b MOV	$0xff,%ESI

0x451e80 CALL	5277f0 <__intel_avx_rep_memset>

0x451e85 JMP	451ec0

0x451e87 NOPW	%CS:(%RAX,%RAX,1)

0x451e96 NOPW	%CS:(%RAX,%RAX,1)

0x451ea5 NOPW	%CS:(%RAX,%RAX,1)

0x451eb4 NOPW	%CS:(%RAX,%RAX,1)

0x451ec0 MOV	-0x70(%RBP),%RDX

0x451ec4 MOV	-0xd8(%RBP),%RCX

0x451ecb LEA	(%RCX,%RDX,1),%RAX

0x451ecf MOV	-0xb0(%RBP),%RSI

0x451ed6 ADD	%RSI,%RCX

0x451ed9 MOV	%RCX,-0xc8(%RBP)

0x451ee0 CMP	%RSI,%RDX

0x451ee3 MOV	%RAX,-0x80(%RBP)

0x451ee7 JGE	4525c0

0x451eed LEA	-0x1(%R12),%R10

0x451ef2 XOR	%ECX,%ECX

0x451ef4 MOV	%RAX,%RSI

0x451ef7 XOR	%EAX,%EAX

0x451ef9 MOV	%R12,-0x50(%RBP)

0x451efd MOV	%R10,-0x38(%RBP)

0x451f01 JMP	451f57

0x451f03 NOPW	%CS:(%RAX,%RAX,1)

0x451f12 NOPW	%CS:(%RAX,%RAX,1)

0x451f21 NOPW	%CS:(%RAX,%RAX,1)

0x451f30 NOPW	%CS:(%RAX,%RAX,1)

0x451f3f NOP

(1007) 0x451f40 MOV	-0xd0(%RBP),%RSI

(1007) 0x451f47 INC	%RSI

(1007) 0x451f4a CMP	-0xc8(%RBP),%RSI

(1007) 0x451f51 JGE	4525c4

(1007) 0x451f57 MOV	-0x88(%RBP),%RDX

(1007) 0x451f5e MOV	%RSI,-0xd0(%RBP)

(1007) 0x451f65 MOV	(%RDX,%RSI,8),%RDI

(1007) 0x451f69 MOV	-0x90(%RBP),%RDX

(1007) 0x451f70 MOV	%RAX,(%RDX,%RDI,8)

(1007) 0x451f74 MOV	-0x98(%RBP),%RDX

(1007) 0x451f7b MOV	%RCX,(%RDX,%RDI,8)

(1007) 0x451f7f MOV	-0xa8(%RBP),%RDX

(1007) 0x451f86 MOV	(%RDX,%RDI,8),%R8

(1007) 0x451f8a JMP	451fce

0x451f8c NOPW	%CS:(%RAX,%RAX,1)

0x451f9b NOPW	%CS:(%RAX,%RAX,1)

0x451faa NOPW	%CS:(%RAX,%RAX,1)

0x451fb9 NOPL	(%RAX)

  (1010) 0x451fc0 MOV	-0x38(%RBP),%R10

  (1010) 0x451fc4 INC	%R8

  (1010) 0x451fc7 MOV	-0xa8(%RBP),%RDX

  (1010) 0x451fce CMP	0x8(%RDX,%RDI,8),%R8

  (1010) 0x451fd3 JGE	452380

  (1010) 0x451fd9 MOV	-0x128(%RBP),%RDX

  (1010) 0x451fe0 MOV	(%RDX,%R8,8),%R9

  (1010) 0x451fe4 MOV	-0x118(%RBP),%RDX

  (1010) 0x451feb CMP	%R10,(%RDX,%R9,8)

  (1010) 0x451fef JNE	451fc4

  (1010) 0x451ff1 MOV	-0x58(%RBP),%RDX

  (1010) 0x451ff5 MOV	0x8(%RDX,%R9,8),%RSI

  (1010) 0x451ffa TEST	%RSI,%RSI

  (1010) 0x451ffd JLE	4520c0

  (1010) 0x452003 MOV	-0x90(%RBP),%RDX

  (1010) 0x45200a MOV	(%RDX,%R9,8),%R10

  (1010) 0x45200e ADD	%R10,%RSI

  (1010) 0x452011 MOV	-0x40(%RBP),%RDX

  (1010) 0x452015 MOV	-0x8(%RDX,%R12,8),%R11

  (1010) 0x45201a LEA	0x1(%R10),%RDX

  (1010) 0x45201e CMP	%RDX,%RSI

  (1010) 0x452021 CMOVLE	%RDX,%RSI

  (1010) 0x452025 MOV	%RSI,%RDX

  (1010) 0x452028 SUB	%R10,%RDX

  (1010) 0x45202b CMP	$0x4,%RDX

  (1010) 0x45202f MOV	%RDX,-0x30(%RBP)

  (1010) 0x452033 JAE	452180

  (1010) 0x452039 MOV	-0x30(%RBP),%R14

  (1010) 0x45203d MOV	%R14,%RDX

  (1010) 0x452040 AND	$-0x4,%RDX

  (1010) 0x452044 CMP	%R14,%RDX

  (1010) 0x452047 JAE	4520c0

  (1010) 0x45204d ADD	%RDX,%R10

  (1010) 0x452050 JMP	452088

0x452052 NOPW	%CS:(%RAX,%RAX,1)

0x452061 NOPW	%CS:(%RAX,%RAX,1)

0x452070 NOPW	%CS:(%RAX,%RAX,1)

0x45207f NOP

    (1013) 0x452080 INC	%R10

    (1013) 0x452083 CMP	%R10,%RSI

    (1013) 0x452086 JE	4520c0

    (1013) 0x452088 MOV	(%R11,%R10,8),%RDX

    (1013) 0x45208c CMP	%RDI,(%RBX,%RDX,8)

    (1013) 0x452090 JE	452080

    (1013) 0x452092 INC	%RAX

    (1013) 0x452095 MOV	-0x58(%RBP),%R14

    (1013) 0x452099 INCQ	0x8(%R14,%RDI,8)

    (1013) 0x45209e MOV	%RDI,(%RBX,%RDX,8)

    (1013) 0x4520a2 JMP	452080

0x4520a4 NOPW	%CS:(%RAX,%RAX,1)

0x4520b3 NOPW	%CS:(%RAX,%RAX,1)

  (1010) 0x4520c0 MOV	-0x60(%RBP),%RDX

  (1010) 0x4520c4 MOV	0x8(%RDX,%R9,8),%RSI

  (1010) 0x4520c9 TEST	%RSI,%RSI

  (1010) 0x4520cc JLE	451fc0

  (1010) 0x4520d2 MOV	-0x98(%RBP),%RDX

  (1010) 0x4520d9 MOV	(%RDX,%R9,8),%R9

  (1010) 0x4520dd ADD	%R9,%RSI

  (1010) 0x4520e0 MOV	-0x48(%RBP),%RDX

  (1010) 0x4520e4 MOV	-0x8(%RDX,%R12,8),%R10

  (1010) 0x4520e9 LEA	0x1(%R9),%RDX

  (1010) 0x4520ed CMP	%RDX,%RSI

  (1010) 0x4520f0 CMOVLE	%RDX,%RSI

  (1010) 0x4520f4 MOV	%RSI,%R11

  (1010) 0x4520f7 SUB	%R9,%R11

  (1010) 0x4520fa CMP	$0x4,%R11

  (1010) 0x4520fe MOV	%R11,-0x30(%RBP)

  (1010) 0x452102 JAE	452280

  (1010) 0x452108 MOV	-0x30(%RBP),%RDX

  (1010) 0x45210c MOV	%RDX,%R11

  (1010) 0x45210f AND	$-0x4,%R11

  (1010) 0x452113 CMP	%RDX,%R11

  (1010) 0x452116 JAE	451fc0

  (1010) 0x45211c ADD	%R11,%R9

  (1010) 0x45211f JMP	45214c

0x452121 NOPW	%CS:(%RAX,%RAX,1)

0x452130 NOPW	%CS:(%RAX,%RAX,1)

0x45213f NOP

    (1011) 0x452140 INC	%R9

    (1011) 0x452143 CMP	%R9,%RSI

    (1011) 0x452146 JE	451fc0

    (1011) 0x45214c MOV	(%R10,%R9,8),%RDX

    (1011) 0x452150 CMP	%RDI,(%R15,%RDX,8)

    (1011) 0x452154 JE	452140

    (1011) 0x452156 INC	%RCX

    (1011) 0x452159 MOV	-0x60(%RBP),%R11

    (1011) 0x45215d INCQ	0x8(%R11,%RDI,8)

    (1011) 0x452162 MOV	%RDI,(%R15,%RDX,8)

    (1011) 0x452166 JMP	452140

0x452168 NOPW	%CS:(%RAX,%RAX,1)

0x452177 NOPW	(%RAX,%RAX,1)

  (1010) 0x452180 MOV	%RDX,%R14

  (1010) 0x452183 SHR	$0x2,%R14

  (1010) 0x452187 LEA	0x18(%R11,%R10,8),%R13

  (1010) 0x45218c JMP	4521d1

0x45218e NOPW	%CS:(%RAX,%RAX,1)

0x45219d NOPW	%CS:(%RAX,%RAX,1)

0x4521ac NOPW	%CS:(%RAX,%RAX,1)

0x4521bb NOPL	(%RAX,%RAX,1)

    (1014) 0x4521c0 MOV	-0x50(%RBP),%R12

    (1014) 0x4521c4 ADD	$0x20,%R13

    (1014) 0x4521c8 DEC	%R14

    (1014) 0x4521cb JE	452039

    (1014) 0x4521d1 MOV	-0x18(%R13),%RDX

    (1014) 0x4521d5 CMP	%RDI,(%RBX,%RDX,8)

    (1014) 0x4521d9 JNE	452200

    (1014) 0x4521db MOV	-0x10(%R13),%RDX

    (1014) 0x4521df CMP	%RDI,(%RBX,%RDX,8)

    (1014) 0x4521e3 JNE	45221a

    (1014) 0x4521e5 MOV	-0x8(%R13),%RDX

    (1014) 0x4521e9 CMP	%RDI,(%RBX,%RDX,8)

    (1014) 0x4521ed JNE	452234

    (1014) 0x4521ef MOV	(%R13),%RDX

    (1014) 0x4521f3 CMP	%RDI,(%RBX,%RDX,8)

    (1014) 0x4521f7 JE	4521c0

    (1014) 0x4521f9 JMP	452252

0x4521fb NOPL	(%RAX,%RAX,1)

    (1014) 0x452200 INC	%RAX

    (1014) 0x452203 MOV	-0x58(%RBP),%R12

    (1014) 0x452207 INCQ	0x8(%R12,%RDI,8)

    (1014) 0x45220c MOV	%RDI,(%RBX,%RDX,8)

    (1014) 0x452210 MOV	-0x10(%R13),%RDX

    (1014) 0x452214 CMP	%RDI,(%RBX,%RDX,8)

    (1014) 0x452218 JE	4521e5

    (1014) 0x45221a INC	%RAX

    (1014) 0x45221d MOV	-0x58(%RBP),%R12

    (1014) 0x452221 INCQ	0x8(%R12,%RDI,8)

    (1014) 0x452226 MOV	%RDI,(%RBX,%RDX,8)

    (1014) 0x45222a MOV	-0x8(%R13),%RDX

    (1014) 0x45222e CMP	%RDI,(%RBX,%RDX,8)

    (1014) 0x452232 JE	4521ef

    (1014) 0x452234 INC	%RAX

    (1014) 0x452237 MOV	-0x58(%RBP),%R12

    (1014) 0x45223b INCQ	0x8(%R12,%RDI,8)

    (1014) 0x452240 MOV	%RDI,(%RBX,%RDX,8)

    (1014) 0x452244 MOV	(%R13),%RDX

    (1014) 0x452248 CMP	%RDI,(%RBX,%RDX,8)

    (1014) 0x45224c JE	4521c0

    (1014) 0x452252 INC	%RAX

    (1014) 0x452255 MOV	-0x58(%RBP),%R12

    (1014) 0x452259 INCQ	0x8(%R12,%RDI,8)

    (1014) 0x45225e MOV	%RDI,(%RBX,%RDX,8)

    (1014) 0x452262 JMP	4521c0

0x452267 NOPW	%CS:(%RAX,%RAX,1)

0x452276 NOPW	%CS:(%RAX,%RAX,1)

  (1010) 0x452280 SHR	$0x2,%R11

  (1010) 0x452284 LEA	0x18(%R10,%R9,8),%R14

  (1010) 0x452289 JMP	4522cd

0x45228b NOPW	%CS:(%RAX,%RAX,1)

0x45229a NOPW	%CS:(%RAX,%RAX,1)

0x4522a9 NOPW	%CS:(%RAX,%RAX,1)

0x4522b8 NOPL	(%RAX,%RAX,1)

    (1012) 0x4522c0 ADD	$0x20,%R14

    (1012) 0x4522c4 DEC	%R11

    (1012) 0x4522c7 JE	452108

    (1012) 0x4522cd MOV	-0x18(%R14),%R13

    (1012) 0x4522d1 CMP	%RDI,(%R15,%R13,8)

    (1012) 0x4522d5 JNE	452300

    (1012) 0x4522d7 MOV	-0x10(%R14),%R13

    (1012) 0x4522db CMP	%RDI,(%R15,%R13,8)

    (1012) 0x4522df JNE	45231a

    (1012) 0x4522e1 MOV	-0x8(%R14),%R13

    (1012) 0x4522e5 CMP	%RDI,(%R15,%R13,8)

    (1012) 0x4522e9 JNE	452334

    (1012) 0x4522eb MOV	(%R14),%R13

    (1012) 0x4522ee CMP	%RDI,(%R15,%R13,8)

    (1012) 0x4522f2 JE	4522c0

    (1012) 0x4522f4 JMP	452351

0x4522f6 NOPW	%CS:(%RAX,%RAX,1)

    (1012) 0x452300 INC	%RCX

    (1012) 0x452303 MOV	-0x60(%RBP),%RDX

    (1012) 0x452307 INCQ	0x8(%RDX,%RDI,8)

    (1012) 0x45230c MOV	%RDI,(%R15,%R13,8)

    (1012) 0x452310 MOV	-0x10(%R14),%R13

    (1012) 0x452314 CMP	%RDI,(%R15,%R13,8)

    (1012) 0x452318 JE	4522e1

    (1012) 0x45231a INC	%RCX

    (1012) 0x45231d MOV	-0x60(%RBP),%RDX

    (1012) 0x452321 INCQ	0x8(%RDX,%RDI,8)

    (1012) 0x452326 MOV	%RDI,(%R15,%R13,8)

    (1012) 0x45232a MOV	-0x8(%R14),%R13

    (1012) 0x45232e CMP	%RDI,(%R15,%R13,8)

    (1012) 0x452332 JE	4522eb

    (1012) 0x452334 INC	%RCX

    (1012) 0x452337 MOV	-0x60(%RBP),%RDX

    (1012) 0x45233b INCQ	0x8(%RDX,%RDI,8)

    (1012) 0x452340 MOV	%RDI,(%R15,%R13,8)

    (1012) 0x452344 MOV	(%R14),%R13

    (1012) 0x452347 CMP	%RDI,(%R15,%R13,8)

    (1012) 0x45234b JE	4522c0

    (1012) 0x452351 INC	%RCX

    (1012) 0x452354 MOV	-0x60(%RBP),%RDX

    (1012) 0x452358 INCQ	0x8(%RDX,%RDI,8)

    (1012) 0x45235d MOV	%RDI,(%R15,%R13,8)

    (1012) 0x452361 JMP	4522c0

0x452366 NOPW	%CS:(%RAX,%RAX,1)

0x452375 NOPW	%CS:(%RAX,%RAX,1)

(1007) 0x452380 MOV	-0xa0(%RBP),%RDX

(1007) 0x452387 MOV	(%RDX,%RDI,8),%R8

(1007) 0x45238b MOV	0x8(%RDX,%RDI,8),%RDX

(1007) 0x452390 CMP	%RDX,%R8

(1007) 0x452393 JL	4523cc

(1007) 0x452395 JMP	451f40

0x45239a NOPW	%CS:(%RAX,%RAX,1)

0x4523a9 NOPW	%CS:(%RAX,%RAX,1)

0x4523b8 NOPL	(%RAX,%RAX,1)

  (1008) 0x4523c0 INC	%R8

  (1008) 0x4523c3 CMP	%RDX,%R8

  (1008) 0x4523c6 JGE	451f40

  (1008) 0x4523cc MOV	-0x130(%RBP),%RSI

  (1008) 0x4523d3 MOV	(%RSI,%R8,8),%R9

  (1008) 0x4523d7 MOV	-0x120(%RBP),%RSI

  (1008) 0x4523de CMP	%R10,(%RSI,%R9,8)

  (1008) 0x4523e2 JNE	4523c0

  (1008) 0x4523e4 MOV	-0x110(%RBP),%RSI

  (1008) 0x4523eb MOV	0x8(%RSI,%R9,8),%RSI

  (1008) 0x4523f0 TEST	%RSI,%RSI

  (1008) 0x4523f3 JLE	4523c0

  (1008) 0x4523f5 MOV	-0x100(%RBP),%RDX

  (1008) 0x4523fc MOV	(%RDX,%R9,8),%R9

  (1008) 0x452400 ADD	%R9,%RSI

  (1008) 0x452403 MOV	-0x108(%RBP),%RDX

  (1008) 0x45240a MOV	(%RDX,%R12,8),%R13

  (1008) 0x45240e LEA	0x1(%R9),%R10

  (1008) 0x452412 CMP	%R10,%RSI

  (1008) 0x452415 CMOVLE	%R10,%RSI

  (1008) 0x452419 MOV	%RSI,%R11

  (1008) 0x45241c SUB	%R9,%R11

  (1008) 0x45241f CMP	%R10,%RSI

  (1008) 0x452422 MOV	%R11,-0x30(%RBP)

  (1008) 0x452426 JNE	452480

  (1008) 0x452428 XOR	%ESI,%ESI

  (1008) 0x45242a TESTB	$0x1,-0x30(%RBP)

  (1008) 0x45242e MOV	-0x38(%RBP),%R10

  (1008) 0x452432 JE	45259c

  (1008) 0x452438 ADD	%RSI,%R9

  (1008) 0x45243b MOV	(%R13,%R9,8),%RDX

  (1008) 0x452440 TEST	%RDX,%RDX

  (1008) 0x452443 JS	452580

  (1008) 0x452449 CMP	%RDI,(%R15,%RDX,8)

  (1008) 0x45244d JE	45259c

  (1008) 0x452453 LEA	(%R15,%RDX,8),%RDX

  (1008) 0x452457 INC	%RCX

  (1008) 0x45245a MOV	-0x60(%RBP),%RSI

  (1008) 0x45245e JMP	452594

0x452463 NOPW	%CS:(%RAX,%RAX,1)

0x452472 NOPW	%CS:(%RAX,%RAX,1)

  (1008) 0x452480 AND	$-0x2,%R11

  (1008) 0x452484 LEA	0x8(%R13,%R9,8),%R10

  (1008) 0x452489 XOR	%ESI,%ESI

  (1008) 0x45248b MOV	%R13,%RDX

  (1008) 0x45248e JMP	4524d8

0x452490 NOPW	%CS:(%RAX,%RAX,1)

0x45249f NOPW	%CS:(%RAX,%RAX,1)

0x4524ae NOPW	%CS:(%RAX,%RAX,1)

0x4524bd NOPL	(%RAX)

    (1009) 0x4524c0 INCQ	0x8(%R13,%RDI,8)

    (1009) 0x4524c5 MOV	%RDI,(%R14)

    (1009) 0x4524c8 MOV	%RDX,%R13

    (1009) 0x4524cb ADD	$0x2,%RSI

    (1009) 0x4524cf CMP	%RSI,%R11

    (1009) 0x4524d2 JE	45242a

    (1009) 0x4524d8 MOV	-0x8(%R10,%RSI,8),%R14

    (1009) 0x4524dd TEST	%R14,%R14

    (1009) 0x4524e0 JS	452500

    (1009) 0x4524e2 CMP	%RDI,(%R15,%R14,8)

    (1009) 0x4524e6 JE	45251f

    (1009) 0x4524e8 LEA	(%R15,%R14,8),%R14

    (1009) 0x4524ec INC	%RCX

    (1009) 0x4524ef MOV	-0x60(%RBP),%R13

    (1009) 0x4524f3 JMP	452514

0x4524f5 NOPW	%CS:(%RAX,%RAX,1)

    (1009) 0x452500 NOT	%R14

    (1009) 0x452503 CMP	%RDI,(%RBX,%R14,8)

    (1009) 0x452507 JE	45251f

    (1009) 0x452509 LEA	(%RBX,%R14,8),%R14

    (1009) 0x45250d INC	%RAX

    (1009) 0x452510 MOV	-0x58(%RBP),%R13

    (1009) 0x452514 INCQ	0x8(%R13,%RDI,8)

    (1009) 0x452519 MOV	%RDI,(%R14)

    (1009) 0x45251c MOV	%RDX,%R13

    (1009) 0x45251f MOV	(%R10,%RSI,8),%R14

    (1009) 0x452523 TEST	%R14,%R14

    (1009) 0x452526 JS	452540

    (1009) 0x452528 CMP	%RDI,(%R15,%R14,8)

    (1009) 0x45252c JE	4524cb

    (1009) 0x45252e LEA	(%R15,%R14,8),%R14

    (1009) 0x452532 INC	%RCX

    (1009) 0x452535 MOV	-0x60(%RBP),%R13

    (1009) 0x452539 JMP	4524c0

0x45253b NOPL	(%RAX,%RAX,1)

    (1009) 0x452540 NOT	%R14

    (1009) 0x452543 CMP	%RDI,(%RBX,%R14,8)

    (1009) 0x452547 JE	4524cb

    (1009) 0x452549 LEA	(%RBX,%R14,8),%R14

    (1009) 0x45254d INC	%RAX

    (1009) 0x452550 MOV	-0x58(%RBP),%R13

    (1009) 0x452554 JMP	4524c0

0x452559 NOPW	%CS:(%RAX,%RAX,1)

0x452568 NOPW	%CS:(%RAX,%RAX,1)

0x452577 NOPW	(%RAX,%RAX,1)

  (1008) 0x452580 NOT	%RDX

  (1008) 0x452583 CMP	%RDI,(%RBX,%RDX,8)

  (1008) 0x452587 JE	45259c

  (1008) 0x452589 LEA	(%RBX,%RDX,8),%RDX

  (1008) 0x45258d INC	%RAX

  (1008) 0x452590 MOV	-0x58(%RBP),%RSI

  (1008) 0x452594 INCQ	0x8(%RSI,%RDI,8)

  (1008) 0x452599 MOV	%RDI,(%RDX)

  (1008) 0x45259c MOV	-0xa0(%RBP),%RDX

  (1008) 0x4525a3 MOV	0x8(%RDX,%RDI,8),%RDX

  (1008) 0x4525a8 INC	%R8

  (1008) 0x4525ab CMP	%RDX,%R8

  (1008) 0x4525ae JL	4523cc

(1007) 0x4525b4 JMP	451f40

0x4525b9 NOPL	(%RAX)

0x4525c0 XOR	%EAX,%EAX

0x4525c2 XOR	%ECX,%ECX

0x4525c4 MOV	-0x68(%RBP),%R13

0x4525c8 TEST	%R13,%R13

0x4525cb JNE	4525de

0x4525cd MOV	-0xe0(%RBP),%RDX

0x4525d4 MOV	-0x140(%RBP),%RSI

0x4525db MOV	%RSI,(%RDX)

0x4525de MOV	-0x78(%RBP),%RDX

0x4525e2 MOV	%RCX,(%RDX,%R13,8)

0x4525e6 MOV	-0xf0(%RBP),%R14

0x4525ed MOV	%RAX,(%R14,%R13,8)

0x4525f1 MOV	-0xc0(%RBP),%RAX

0x4525f8 MOV	(%RAX),%ESI

0x4525fa MOV	$0x55c8b0,%EDI

0x4525ff CALL	410570 <__kmpc_barrier@plt>

0x452604 MOV	-0x78(%RBP),%RDI

0x452608 TEST	%R13,%R13

0x45260b MOV	-0xe0(%RBP),%R13

0x452612 JNE	45264d

0x452614 CMPQ	$0x2,(%R13)

0x452619 JL	45264d

0x45261b MOV	$0x1,%EAX

(1006) 0x452620 MOV	-0x8(%RDI,%RAX,8),%RCX

(1006) 0x452625 LEA	(%RDI,%RAX,8),%RDX

(1006) 0x452629 MOV	(%RDX),%RSI

(1006) 0x45262c ADD	%RCX,%RSI

(1006) 0x45262f MOV	%RSI,(%RDX)

(1006) 0x452632 MOV	-0x8(%R14,%RAX,8),%RCX

(1006) 0x452637 LEA	(%R14,%RAX,8),%RDX

(1006) 0x45263b MOV	(%RDX),%RSI

(1006) 0x45263e ADD	%RCX,%RSI

(1006) 0x452641 MOV	%RSI,(%RDX)

(1006) 0x452644 INC	%RAX

(1006) 0x452647 CMP	(%R13),%RAX

(1006) 0x45264b JL	452620

0x45264d MOV	-0xc0(%RBP),%RAX

0x452654 MOV	(%RAX),%ESI

0x452656 MOV	$0x55c8d0,%EDI

0x45265b CALL	410570 <__kmpc_barrier@plt>

0x452660 CMPQ	$0,-0x68(%RBP)

0x452665 JLE	452800

0x45266b MOV	-0xb0(%RBP),%RAX

0x452672 CMP	%RAX,-0x70(%RBP)

0x452676 MOV	-0x98(%RBP),%R11

0x45267d MOV	%R14,%R10

0x452680 MOV	-0x90(%RBP),%R14

0x452687 MOV	-0x78(%RBP),%RSI

0x45268b MOV	-0x68(%RBP),%R13

0x45268f JGE	45289f

0x452695 MOV	-0x80(%RBP),%RDX

0x452699 LEA	0x1(%RDX),%RAX

0x45269d MOV	-0xc8(%RBP),%RCX

0x4526a4 CMP	%RCX,%RAX

0x4526a7 CMOVLE	%RCX,%RAX

0x4526ab MOV	%RAX,-0x50(%RBP)

0x4526af SUB	%RDX,%RAX

0x4526b2 MOV	%RAX,-0x38(%RBP)

0x4526b6 CMP	$0x4,%RAX

0x4526ba MOV	%RSI,%RAX

0x4526bd JB	452792

0x4526c3 MOV	-0x38(%RBP),%RDX

0x4526c7 SHR	$0x2,%RDX

0x4526cb MOV	-0x88(%RBP),%RSI

0x4526d2 MOV	-0x80(%RBP),%RDI

0x4526d6 LEA	0x18(%RSI,%RDI,8),%RSI

0x4526db NOPL	(%RAX,%RAX,1)

(1005) 0x4526e0 MOV	-0x18(%RSI),%RDI

(1005) 0x4526e4 MOV	-0x8(%R10,%R13,8),%R8

(1005) 0x4526e9 LEA	(%R14,%RDI,8),%R9

(1005) 0x4526ed MOV	%R10,%RCX

(1005) 0x4526f0 MOV	(%R9),%R10

(1005) 0x4526f3 ADD	%R8,%R10

(1005) 0x4526f6 MOV	%R10,(%R9)

(1005) 0x4526f9 MOV	-0x8(%RAX,%R13,8),%R8

(1005) 0x4526fe LEA	(%R11,%RDI,8),%RDI

(1005) 0x452702 MOV	(%RDI),%R9

(1005) 0x452705 ADD	%R8,%R9

(1005) 0x452708 MOV	%R9,(%RDI)

(1005) 0x45270b MOV	-0x10(%RSI),%RDI

(1005) 0x45270f MOV	-0x8(%RCX,%R13,8),%R8

(1005) 0x452714 LEA	(%R14,%RDI,8),%R9

(1005) 0x452718 MOV	(%R9),%R10

(1005) 0x45271b ADD	%R8,%R10

(1005) 0x45271e MOV	%R10,(%R9)

(1005) 0x452721 MOV	-0x8(%RAX,%R13,8),%R8

(1005) 0x452726 LEA	(%R11,%RDI,8),%RDI

(1005) 0x45272a MOV	(%RDI),%R9

(1005) 0x45272d ADD	%R8,%R9

(1005) 0x452730 MOV	%R9,(%RDI)

(1005) 0x452733 MOV	-0x8(%RSI),%RDI

(1005) 0x452737 MOV	-0x8(%RCX,%R13,8),%R8

(1005) 0x45273c LEA	(%R14,%RDI,8),%R9

(1005) 0x452740 MOV	(%R9),%R10

(1005) 0x452743 ADD	%R8,%R10

(1005) 0x452746 MOV	%R10,(%R9)

(1005) 0x452749 MOV	-0x8(%RAX,%R13,8),%R8

(1005) 0x45274e LEA	(%R11,%RDI,8),%RDI

(1005) 0x452752 MOV	(%RDI),%R9

(1005) 0x452755 ADD	%R8,%R9

(1005) 0x452758 MOV	%R9,(%RDI)

(1005) 0x45275b MOV	(%RSI),%RDI

(1005) 0x45275e MOV	-0x8(%RCX,%R13,8),%R8

(1005) 0x452763 LEA	(%R14,%RDI,8),%R9

(1005) 0x452767 MOV	(%R9),%R10

(1005) 0x45276a ADD	%R8,%R10

(1005) 0x45276d MOV	%R10,(%R9)

(1005) 0x452770 MOV	%RCX,%R10

(1005) 0x452773 MOV	-0x8(%RAX,%R13,8),%R8

(1005) 0x452778 LEA	(%R11,%RDI,8),%RDI

(1005) 0x45277c MOV	(%RDI),%R9

(1005) 0x45277f ADD	%R8,%R9

(1005) 0x452782 MOV	%R9,(%RDI)

(1005) 0x452785 ADD	$0x20,%RSI

(1005) 0x452789 DEC	%RDX

(1005) 0x45278c JNE	4526e0

0x452792 MOV	-0x38(%RBP),%RCX

0x452796 MOV	%RCX,%RDX

0x452799 AND	$-0x4,%RDX

0x45279d CMP	%RCX,%RDX

0x4527a0 MOV	-0x88(%RBP),%R8

0x4527a7 MOV	-0xd8(%RBP),%R9

0x4527ae JAE	45289f

0x4527b4 ADD	-0x70(%RBP),%R9

0x4527b8 ADD	%RDX,%R9

0x4527bb NOPL	(%RAX,%RAX,1)

(1004) 0x4527c0 MOV	(%R8,%R9,8),%RCX

(1004) 0x4527c4 MOV	-0x8(%R10,%R13,8),%RDX

(1004) 0x4527c9 LEA	(%R14,%RCX,8),%RSI

(1004) 0x4527cd MOV	(%RSI),%RDI

(1004) 0x4527d0 ADD	%RDX,%RDI

(1004) 0x4527d3 MOV	%RDI,(%RSI)

(1004) 0x4527d6 MOV	-0x8(%RAX,%R13,8),%RDX

(1004) 0x4527db LEA	(%R11,%RCX,8),%RCX

(1004) 0x4527df MOV	(%RCX),%RSI

(1004) 0x4527e2 ADD	%RDX,%RSI

(1004) 0x4527e5 MOV	%RSI,(%RCX)

(1004) 0x4527e8 MOV	-0x50(%RBP),%RCX

(1004) 0x4527ec INC	%R9

(1004) 0x4527ef CMP	%R9,%RCX

(1004) 0x4527f2 JNE	4527c0

0x4527f4 JMP	45289f

0x4527f9 NOPL	(%RAX)

0x452800 MOV	(%R13),%RAX

0x452804 MOV	-0x8(%R14,%RAX,8),%RDI

0x452809 MOV	-0x78(%RBP),%RCX

0x45280d MOV	-0x8(%RCX,%RAX,8),%R14

0x452812 MOV	-0x148(%RBP),%RAX

0x452819 ADD	%RDI,(%RAX)

0x45281c MOV	-0x150(%RBP),%RAX

0x452823 ADD	%R14,(%RAX)

0x452826 MOV	$0x8,%ESI

0x45282b CALL	51b840 <hypre_CAlloc>

0x452830 MOV	-0x40(%RBP),%RCX

0x452834 MOV	%RAX,(%RCX,%R12,8)

0x452838 TEST	%R14,%R14

0x45283b JE	452880

0x45283d MOV	$0x8,%ESI

0x452842 MOV	%R14,%RDI

0x452845 CALL	51b840 <hypre_CAlloc>

0x45284a JMP	452893

0x45284c NOPW	%CS:(%RAX,%RAX,1)

0x45285b NOPW	%CS:(%RAX,%RAX,1)

0x45286a NOPW	%CS:(%RAX,%RAX,1)

0x452879 NOPL	(%RAX)

0x452880 MOV	-0x138(%RBP),%RAX

0x452887 CMPQ	$0x2,(%RAX)

0x45288b MOV	-0x68(%RBP),%R13

0x45288f JL	45289f

0x452891 XOR	%EAX,%EAX

0x452893 MOV	-0x48(%RBP),%RCX

0x452897 MOV	%RAX,(%RCX,%R12,8)

0x45289b MOV	-0x68(%RBP),%R13

0x45289f MOV	-0xc0(%RBP),%RAX

0x4528a6 MOV	(%RAX),%ESI

0x4528a8 MOV	$0x55c8f0,%EDI

0x4528ad CALL	410570 <__kmpc_barrier@plt>

0x4528b2 TEST	%R13,%R13

0x4528b5 JLE	452900

0x4528b7 MOV	-0xf0(%RBP),%RAX

0x4528be MOV	-0x8(%RAX,%R13,8),%RAX

0x4528c3 MOV	-0x78(%RBP),%RCX

0x4528c7 MOV	-0x8(%RCX,%R13,8),%RCX

0x4528cc MOV	-0x70(%RBP),%RDX

0x4528d0 CMP	-0xb0(%RBP),%RDX

0x4528d7 MOV	-0x80(%RBP),%RSI

0x4528db JL	452919

0x4528dd JMP	453000

0x4528e2 NOPW	%CS:(%RAX,%RAX,1)

0x4528f1 NOPW	%CS:(%RAX,%RAX,1)

0x452900 XOR	%EAX,%EAX

0x452902 XOR	%ECX,%ECX

0x452904 MOV	-0x70(%RBP),%RDX

0x452908 CMP	-0xb0(%RBP),%RDX

0x45290f MOV	-0x80(%RBP),%RSI

0x452913 JGE	453000

0x452919 LEA	-0x1(%R12),%R10

0x45291e MOV	%R10,-0x38(%RBP)

0x452922 JMP	452954

0x452924 NOPW	%CS:(%RAX,%RAX,1)

0x452933 NOPW	%CS:(%RAX,%RAX,1)

(996) 0x452940 MOV	-0x80(%RBP),%RSI

(996) 0x452944 INC	%RSI

(996) 0x452947 CMP	-0xc8(%RBP),%RSI

(996) 0x45294e JGE	453000

(996) 0x452954 MOV	-0x88(%RBP),%RDX

(996) 0x45295b MOV	%RSI,-0x80(%RBP)

(996) 0x45295f MOV	(%RDX,%RSI,8),%RSI

(996) 0x452963 MOV	-0xa8(%RBP),%RDX

(996) 0x45296a MOV	(%RDX,%RSI,8),%R8

(996) 0x45296e MOV	%RSI,%RDI

(996) 0x452971 NOT	%RDI

(996) 0x452974 MOV	%RSI,-0x50(%RBP)

(996) 0x452978 JMP	452992

0x45297a NOPW	(%RAX,%RAX,1)

  (999) 0x452980 MOV	-0x38(%RBP),%R10

  (999) 0x452984 INC	%R8

  (999) 0x452987 MOV	-0xa8(%RBP),%RDX

  (999) 0x45298e MOV	-0x50(%RBP),%RSI

  (999) 0x452992 CMP	0x8(%RDX,%RSI,8),%R8

  (999) 0x452997 JGE	452d40

  (999) 0x45299d MOV	-0x128(%RBP),%RDX

  (999) 0x4529a4 MOV	(%RDX,%R8,8),%R14

  (999) 0x4529a8 MOV	-0x118(%RBP),%RDX

  (999) 0x4529af CMP	%R10,(%RDX,%R14,8)

  (999) 0x4529b3 JNE	452984

  (999) 0x4529b5 MOV	-0x58(%RBP),%RDX

  (999) 0x4529b9 MOV	0x8(%RDX,%R14,8),%R10

  (999) 0x4529be TEST	%R10,%R10

  (999) 0x4529c1 JLE	452b84

  (999) 0x4529c7 MOV	-0x90(%RBP),%RDX

  (999) 0x4529ce MOV	%R14,-0x30(%RBP)

  (999) 0x4529d2 MOV	(%RDX,%R14,8),%R11

  (999) 0x4529d6 ADD	%R11,%R10

  (999) 0x4529d9 MOV	-0x40(%RBP),%RDX

  (999) 0x4529dd MOV	-0x8(%RDX,%R12,8),%RSI

  (999) 0x4529e2 LEA	0x1(%R11),%RDX

  (999) 0x4529e6 CMP	%RDX,%R10

  (999) 0x4529e9 CMOVLE	%RDX,%R10

  (999) 0x4529ed MOV	%R10,%RDX

  (999) 0x4529f0 SUB	%R11,%RDX

  (999) 0x4529f3 CMP	$0x4,%RDX

  (999) 0x4529f7 MOV	%RDX,-0xd0(%RBP)

  (999) 0x4529fe JAE	452a80

  (999) 0x452a04 MOV	-0xd0(%RBP),%R9

  (999) 0x452a0b MOV	%R9,%RDX

  (999) 0x452a0e AND	$-0x4,%RDX

  (999) 0x452a12 CMP	%R9,%RDX

  (999) 0x452a15 JAE	452b80

  (999) 0x452a1b ADD	%RDX,%R11

  (999) 0x452a1e MOV	-0x30(%RBP),%R14

  (999) 0x452a22 JMP	452a4c

0x452a24 NOPW	%CS:(%RAX,%RAX,1)

0x452a33 NOPW	%CS:(%RAX,%RAX,1)

    (1002) 0x452a40 INC	%R11

    (1002) 0x452a43 CMP	%R11,%R10

    (1002) 0x452a46 JE	452b84

    (1002) 0x452a4c MOV	(%RSI,%R11,8),%RDX

    (1002) 0x452a50 CMP	%RDI,(%RBX,%RDX,8)

    (1002) 0x452a54 JE	452a40

    (1002) 0x452a56 MOV	-0x40(%RBP),%R9

    (1002) 0x452a5a MOV	(%R9,%R12,8),%R9

    (1002) 0x452a5e MOV	%RDX,(%R9,%RAX,8)

    (1002) 0x452a62 INC	%RAX

    (1002) 0x452a65 MOV	%RDI,(%RBX,%RDX,8)

    (1002) 0x452a69 JMP	452a40

0x452a6b NOPW	%CS:(%RAX,%RAX,1)

0x452a7a NOPW	(%RAX,%RAX,1)

  (999) 0x452a80 SHR	$0x2,%RDX

  (999) 0x452a84 LEA	0x18(%RSI,%R11,8),%R13

  (999) 0x452a89 JMP	452acd

0x452a8b NOPW	%CS:(%RAX,%RAX,1)

0x452a9a NOPW	%CS:(%RAX,%RAX,1)

0x452aa9 NOPW	%CS:(%RAX,%RAX,1)

0x452ab8 NOPL	(%RAX,%RAX,1)

    (1003) 0x452ac0 ADD	$0x20,%R13

    (1003) 0x452ac4 DEC	%RDX

    (1003) 0x452ac7 JE	452a04

    (1003) 0x452acd MOV	-0x18(%R13),%R14

    (1003) 0x452ad1 CMP	%RDI,(%RBX,%R14,8)

    (1003) 0x452ad5 JNE	452b00

    (1003) 0x452ad7 MOV	-0x10(%R13),%R14

    (1003) 0x452adb CMP	%RDI,(%RBX,%R14,8)

    (1003) 0x452adf JNE	452b1d

    (1003) 0x452ae1 MOV	-0x8(%R13),%R14

    (1003) 0x452ae5 CMP	%RDI,(%RBX,%R14,8)

    (1003) 0x452ae9 JNE	452b3a

    (1003) 0x452aeb MOV	(%R13),%R14

    (1003) 0x452aef CMP	%RDI,(%RBX,%R14,8)

    (1003) 0x452af3 JE	452ac0

    (1003) 0x452af5 JMP	452b5b

0x452af7 NOPW	(%RAX,%RAX,1)

    (1003) 0x452b00 MOV	-0x40(%RBP),%R9

    (1003) 0x452b04 MOV	(%R9,%R12,8),%R9

    (1003) 0x452b08 MOV	%R14,(%R9,%RAX,8)

    (1003) 0x452b0c INC	%RAX

    (1003) 0x452b0f MOV	%RDI,(%RBX,%R14,8)

    (1003) 0x452b13 MOV	-0x10(%R13),%R14

    (1003) 0x452b17 CMP	%RDI,(%RBX,%R14,8)

    (1003) 0x452b1b JE	452ae1

    (1003) 0x452b1d MOV	-0x40(%RBP),%R9

    (1003) 0x452b21 MOV	(%R9,%R12,8),%R9

    (1003) 0x452b25 MOV	%R14,(%R9,%RAX,8)

    (1003) 0x452b29 INC	%RAX

    (1003) 0x452b2c MOV	%RDI,(%RBX,%R14,8)

    (1003) 0x452b30 MOV	-0x8(%R13),%R14

    (1003) 0x452b34 CMP	%RDI,(%RBX,%R14,8)

    (1003) 0x452b38 JE	452aeb

    (1003) 0x452b3a MOV	-0x40(%RBP),%R9

    (1003) 0x452b3e MOV	(%R9,%R12,8),%R9

    (1003) 0x452b42 MOV	%R14,(%R9,%RAX,8)

    (1003) 0x452b46 INC	%RAX

    (1003) 0x452b49 MOV	%RDI,(%RBX,%R14,8)

    (1003) 0x452b4d MOV	(%R13),%R14

    (1003) 0x452b51 CMP	%RDI,(%RBX,%R14,8)

    (1003) 0x452b55 JE	452ac0

    (1003) 0x452b5b MOV	-0x40(%RBP),%R9

    (1003) 0x452b5f MOV	(%R9,%R12,8),%R9

    (1003) 0x452b63 MOV	%R14,(%R9,%RAX,8)

    (1003) 0x452b67 INC	%RAX

    (1003) 0x452b6a MOV	%RDI,(%RBX,%R14,8)

    (1003) 0x452b6e JMP	452ac0

0x452b73 NOPW	%CS:(%RAX,%RAX,1)

  (999) 0x452b80 MOV	-0x30(%RBP),%R14

  (999) 0x452b84 MOV	-0x60(%RBP),%RDX

  (999) 0x452b88 MOV	0x8(%RDX,%R14,8),%R10

  (999) 0x452b8d TEST	%R10,%R10

  (999) 0x452b90 JLE	452980

  (999) 0x452b96 MOV	-0x98(%RBP),%RDX

  (999) 0x452b9d MOV	(%RDX,%R14,8),%R9

  (999) 0x452ba1 ADD	%R9,%R10

  (999) 0x452ba4 MOV	-0x48(%RBP),%RDX

  (999) 0x452ba8 MOV	-0x8(%RDX,%R12,8),%RSI

  (999) 0x452bad LEA	0x1(%R9),%RDX

  (999) 0x452bb1 CMP	%RDX,%R10

  (999) 0x452bb4 CMOVLE	%RDX,%R10

  (999) 0x452bb8 MOV	%R10,%R11

  (999) 0x452bbb SUB	%R9,%R11

  (999) 0x452bbe CMP	$0x4,%R11

  (999) 0x452bc2 MOV	%R11,-0x30(%RBP)

  (999) 0x452bc6 JAE	452c40

  (999) 0x452bc8 MOV	-0x30(%RBP),%RDX

  (999) 0x452bcc MOV	%RDX,%R11

  (999) 0x452bcf AND	$-0x4,%R11

  (999) 0x452bd3 CMP	%RDX,%R11

  (999) 0x452bd6 JAE	452980

  (999) 0x452bdc ADD	%R11,%R9

  (999) 0x452bdf JMP	452c0c

0x452be1 NOPW	%CS:(%RAX,%RAX,1)

0x452bf0 NOPW	%CS:(%RAX,%RAX,1)

0x452bff NOP

    (1000) 0x452c00 INC	%R9

    (1000) 0x452c03 CMP	%R9,%R10

    (1000) 0x452c06 JE	452980

    (1000) 0x452c0c MOV	(%RSI,%R9,8),%RDX

    (1000) 0x452c10 CMP	%RDI,(%R15,%RDX,8)

    (1000) 0x452c14 JE	452c00

    (1000) 0x452c16 MOV	-0x48(%RBP),%R11

    (1000) 0x452c1a MOV	(%R11,%R12,8),%R11

    (1000) 0x452c1e MOV	%RDX,(%R11,%RCX,8)

    (1000) 0x452c22 INC	%RCX

    (1000) 0x452c25 MOV	%RDI,(%R15,%RDX,8)

    (1000) 0x452c29 JMP	452c00

0x452c2b NOPW	%CS:(%RAX,%RAX,1)

0x452c3a NOPW	(%RAX,%RAX,1)

  (999) 0x452c40 SHR	$0x2,%R11

  (999) 0x452c44 LEA	0x18(%RSI,%R9,8),%R14

  (999) 0x452c49 JMP	452c8d

0x452c4b NOPW	%CS:(%RAX,%RAX,1)

0x452c5a NOPW	%CS:(%RAX,%RAX,1)

0x452c69 NOPW	%CS:(%RAX,%RAX,1)

0x452c78 NOPL	(%RAX,%RAX,1)

    (1001) 0x452c80 ADD	$0x20,%R14

    (1001) 0x452c84 DEC	%R11

    (1001) 0x452c87 JE	452bc8

    (1001) 0x452c8d MOV	-0x18(%R14),%R13

    (1001) 0x452c91 CMP	%RDI,(%R15,%R13,8)

    (1001) 0x452c95 JNE	452cc0

    (1001) 0x452c97 MOV	-0x10(%R14),%R13

    (1001) 0x452c9b CMP	%RDI,(%R15,%R13,8)

    (1001) 0x452c9f JNE	452cdd

    (1001) 0x452ca1 MOV	-0x8(%R14),%R13

    (1001) 0x452ca5 CMP	%RDI,(%R15,%R13,8)

    (1001) 0x452ca9 JNE	452cfa

    (1001) 0x452cab MOV	(%R14),%R13

    (1001) 0x452cae CMP	%RDI,(%R15,%R13,8)

    (1001) 0x452cb2 JE	452c80

    (1001) 0x452cb4 JMP	452d1a

0x452cb6 NOPW	%CS:(%RAX,%RAX,1)

    (1001) 0x452cc0 MOV	-0x48(%RBP),%RDX

    (1001) 0x452cc4 MOV	(%RDX,%R12,8),%RDX

    (1001) 0x452cc8 MOV	%R13,(%RDX,%RCX,8)

    (1001) 0x452ccc INC	%RCX

    (1001) 0x452ccf MOV	%RDI,(%R15,%R13,8)

    (1001) 0x452cd3 MOV	-0x10(%R14),%R13

    (1001) 0x452cd7 CMP	%RDI,(%R15,%R13,8)

    (1001) 0x452cdb JE	452ca1

    (1001) 0x452cdd MOV	-0x48(%RBP),%RDX

    (1001) 0x452ce1 MOV	(%RDX,%R12,8),%RDX

    (1001) 0x452ce5 MOV	%R13,(%RDX,%RCX,8)

    (1001) 0x452ce9 INC	%RCX

    (1001) 0x452cec MOV	%RDI,(%R15,%R13,8)

    (1001) 0x452cf0 MOV	-0x8(%R14),%R13

    (1001) 0x452cf4 CMP	%RDI,(%R15,%R13,8)

    (1001) 0x452cf8 JE	452cab

    (1001) 0x452cfa MOV	-0x48(%RBP),%RDX

    (1001) 0x452cfe MOV	(%RDX,%R12,8),%RDX

    (1001) 0x452d02 MOV	%R13,(%RDX,%RCX,8)

    (1001) 0x452d06 INC	%RCX

    (1001) 0x452d09 MOV	%RDI,(%R15,%R13,8)

    (1001) 0x452d0d MOV	(%R14),%R13

    (1001) 0x452d10 CMP	%RDI,(%R15,%R13,8)

    (1001) 0x452d14 JE	452c80

    (1001) 0x452d1a MOV	-0x48(%RBP),%RDX

    (1001) 0x452d1e MOV	(%RDX,%R12,8),%RDX

    (1001) 0x452d22 MOV	%R13,(%RDX,%RCX,8)

    (1001) 0x452d26 INC	%RCX

    (1001) 0x452d29 MOV	%RDI,(%R15,%R13,8)

    (1001) 0x452d2d JMP	452c80

0x452d32 NOPW	%CS:(%RAX,%RAX,1)

(996) 0x452d40 MOV	-0xa0(%RBP),%RDX

(996) 0x452d47 MOV	-0x50(%RBP),%RSI

(996) 0x452d4b MOV	(%RDX,%RSI,8),%R8

(996) 0x452d4f MOV	0x8(%RDX,%RSI,8),%RDX

(996) 0x452d54 CMP	%RDX,%R8

(996) 0x452d57 JL	452d8c

(996) 0x452d59 JMP	452940

0x452d5e NOPW	%CS:(%RAX,%RAX,1)

0x452d6d NOPW	%CS:(%RAX,%RAX,1)

0x452d7c NOPL	(%RAX)

  (997) 0x452d80 INC	%R8

  (997) 0x452d83 CMP	%RDX,%R8

  (997) 0x452d86 JGE	452940

  (997) 0x452d8c MOV	-0x130(%RBP),%RSI

  (997) 0x452d93 MOV	(%RSI,%R8,8),%R9

  (997) 0x452d97 MOV	-0x120(%RBP),%RSI

  (997) 0x452d9e CMP	%R10,(%RSI,%R9,8)

  (997) 0x452da2 JNE	452d80

  (997) 0x452da4 MOV	-0x110(%RBP),%RSI

  (997) 0x452dab MOV	0x8(%RSI,%R9,8),%RSI

  (997) 0x452db0 TEST	%RSI,%RSI

  (997) 0x452db3 JLE	452d80

  (997) 0x452db5 MOV	-0x100(%RBP),%RDX

  (997) 0x452dbc MOV	(%RDX,%R9,8),%R9

  (997) 0x452dc0 ADD	%R9,%RSI

  (997) 0x452dc3 MOV	-0x108(%RBP),%RDX

  (997) 0x452dca MOV	(%RDX,%R12,8),%R11

  (997) 0x452dce LEA	0x1(%R9),%R10

  (997) 0x452dd2 CMP	%R10,%RSI

  (997) 0x452dd5 CMOVLE	%R10,%RSI

  (997) 0x452dd9 MOV	%RSI,%RDX

  (997) 0x452ddc SUB	%R9,%RDX

  (997) 0x452ddf CMP	%R10,%RSI

  (997) 0x452de2 MOV	%R11,-0x30(%RBP)

  (997) 0x452de6 JNE	452e40

  (997) 0x452de8 XOR	%R11D,%R11D

  (997) 0x452deb TEST	$0x1,%DL

  (997) 0x452dee MOV	-0x38(%RBP),%R10

  (997) 0x452df2 JE	452fa0

  (997) 0x452df8 ADD	%R11,%R9

  (997) 0x452dfb MOV	-0x30(%RBP),%RDX

  (997) 0x452dff MOV	(%RDX,%R9,8),%RDX

  (997) 0x452e03 TEST	%RDX,%RDX

  (997) 0x452e06 JS	452f80

  (997) 0x452e0c CMP	%RDI,(%R15,%RDX,8)

  (997) 0x452e10 JE	452fa0

  (997) 0x452e16 MOV	-0x48(%RBP),%RSI

  (997) 0x452e1a MOV	(%RSI,%R12,8),%RSI

  (997) 0x452e1e MOV	%RDX,(%RSI,%RCX,8)

  (997) 0x452e22 INC	%RCX

  (997) 0x452e25 MOV	%RDI,(%R15,%RDX,8)

  (997) 0x452e29 JMP	452fa0

0x452e2e NOPW	%CS:(%RAX,%RAX,1)

0x452e3d NOPL	(%RAX)

  (997) 0x452e40 MOV	%RDX,%RSI

  (997) 0x452e43 AND	$-0x2,%RSI

  (997) 0x452e47 LEA	0x8(%R11,%R9,8),%R10

  (997) 0x452e4c XOR	%R11D,%R11D

  (997) 0x452e4f JMP	452e8d

0x452e51 NOPW	%CS:(%RAX,%RAX,1)

0x452e60 NOPW	%CS:(%RAX,%RAX,1)

0x452e6f NOPW	%CS:(%RAX,%RAX,1)

0x452e7e XCHG	%AX,%AX

    (998) 0x452e80 ADD	$0x2,%R11

    (998) 0x452e84 CMP	%R11,%RSI

    (998) 0x452e87 JE	452deb

    (998) 0x452e8d MOV	-0x8(%R10,%R11,8),%R14

    (998) 0x452e92 TEST	%R14,%R14

    (998) 0x452e95 JS	452ec0

    (998) 0x452e97 CMP	%RDI,(%R15,%R14,8)

    (998) 0x452e9b JE	452ee0

    (998) 0x452e9d MOV	-0x48(%RBP),%R13

    (998) 0x452ea1 MOV	(%R13,%R12,8),%R13

    (998) 0x452ea6 MOV	%R14,(%R13,%RCX,8)

    (998) 0x452eab INC	%RCX

    (998) 0x452eae MOV	%RDI,(%R15,%R14,8)

    (998) 0x452eb2 JMP	452ee0

0x452eb4 NOPW	%CS:(%RAX,%RAX,1)

    (998) 0x452ec0 NOT	%R14

    (998) 0x452ec3 CMP	%RDI,(%RBX,%R14,8)

    (998) 0x452ec7 JE	452ee0

    (998) 0x452ec9 MOV	-0x40(%RBP),%R13

    (998) 0x452ecd MOV	(%R13,%R12,8),%R13

    (998) 0x452ed2 MOV	%R14,(%R13,%RAX,8)

    (998) 0x452ed7 INC	%RAX

    (998) 0x452eda MOV	%RDI,(%RBX,%R14,8)

    (998) 0x452ede XCHG	%AX,%AX

    (998) 0x452ee0 MOV	(%R10,%R11,8),%R14

    (998) 0x452ee4 TEST	%R14,%R14

    (998) 0x452ee7 JS	452f40

    (998) 0x452ee9 CMP	%RDI,(%R15,%R14,8)

    (998) 0x452eed JE	452e80

    (998) 0x452eef MOV	-0x48(%RBP),%R13

    (998) 0x452ef3 MOV	(%R13,%R12,8),%R13

    (998) 0x452ef8 MOV	%R14,(%R13,%RCX,8)

    (998) 0x452efd INC	%RCX

    (998) 0x452f00 MOV	%RDI,(%R15,%R14,8)

    (998) 0x452f04 JMP	452e80

0x452f09 NOPW	%CS:(%RAX,%RAX,1)

0x452f18 NOPW	%CS:(%RAX,%RAX,1)

0x452f27 NOPW	%CS:(%RAX,%RAX,1)

0x452f36 NOPW	%CS:(%RAX,%RAX,1)

    (998) 0x452f40 NOT	%R14

    (998) 0x452f43 CMP	%RDI,(%RBX,%R14,8)

    (998) 0x452f47 JE	452e80

    (998) 0x452f4d MOV	-0x40(%RBP),%R13

    (998) 0x452f51 MOV	(%R13,%R12,8),%R13

    (998) 0x452f56 MOV	%R14,(%R13,%RAX,8)

    (998) 0x452f5b INC	%RAX

    (998) 0x452f5e MOV	%RDI,(%RBX,%R14,8)

    (998) 0x452f62 JMP	452e80

0x452f67 NOPW	%CS:(%RAX,%RAX,1)

0x452f76 NOPW	%CS:(%RAX,%RAX,1)

  (997) 0x452f80 NOT	%RDX

  (997) 0x452f83 CMP	%RDI,(%RBX,%RDX,8)

  (997) 0x452f87 JE	452fa0

  (997) 0x452f89 MOV	-0x40(%RBP),%RSI

  (997) 0x452f8d MOV	(%RSI,%R12,8),%RSI

  (997) 0x452f91 MOV	%RDX,(%RSI,%RAX,8)

  (997) 0x452f95 INC	%RAX

  (997) 0x452f98 MOV	%RDI,(%RBX,%RDX,8)

  (997) 0x452f9c NOPL	(%RAX)

  (997) 0x452fa0 MOV	-0xa0(%RBP),%RDX

  (997) 0x452fa7 MOV	-0x50(%RBP),%RSI

  (997) 0x452fab MOV	0x8(%RDX,%RSI,8),%RDX

  (997) 0x452fb0 INC	%R8

  (997) 0x452fb3 CMP	%RDX,%R8

  (997) 0x452fb6 JL	452d8c

(996) 0x452fbc JMP	452940

0x452fc1 NOPW	%CS:(%RAX,%RAX,1)

0x452fd0 NOPW	%CS:(%RAX,%RAX,1)

0x452fdf NOPW	%CS:(%RAX,%RAX,1)

0x452fee NOPW	%CS:(%RAX,%RAX,1)

0x452ffd NOPL	(%RAX)

0x453000 MOV	%RBX,%RDI

0x453003 CALL	51b990 <hypre_Free>

0x453008 CMPQ	$0,-0xe8(%RBP)

0x453010 JNE	453040

0x453012 MOV	-0xb8(%RBP),%RAX

0x453019 CMP	-0xf8(%RBP),%RAX

0x453020 JE	453040

0x453022 ADD	$0x128,%RSP

0x453029 POP	%RBX

0x45302a POP	%R12

0x45302c POP	%R13

0x45302e POP	%R14

0x453030 POP	%R15

0x453032 POP	%RBP

0x453033 RET

0x453034 NOPW	%CS:(%RAX,%RAX,1)

0x453040 MOV	%R15,%RDI

0x453043 ADD	$0x128,%RSP

0x45304a POP	%RBX

0x45304b POP	%R12

0x45304d POP	%R13

0x45304f POP	%R14

0x453051 POP	%R15

0x453053 POP	%RBP

0x453054 JMP	51b990

0x453059 NOPL	(%RAX)

Coverage (%)	Name	Source Location	Module
►100.00+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_4

Source file and lines	par_multi_interp.c:891-1134
Module	exec

The function is defined in /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:891,900-908,916-919,925,939-970,976-997,1008-1020,1026-1034,1040-1051,1060-1063,1072-1125,1132-1134.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 12% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 68.17 to 6.50 cycles (10.49x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

__intel_avx_rep_memset: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:918
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:925
__kmpc_barrier@plt: 3 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1011
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1017
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1051
hypre_CAlloc: 4 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:916
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:925
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1048
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1050
hypre_Free: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1132
hypre_GetThreadNum: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:900
hypre_NumActiveThreads: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:901

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

ADD: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1044
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1045
DIV: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:902
IDIV: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:902

Conversion instructions

Detected expensive conversion instructions.

Details

CQTO: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:902

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 724 bytes. The binary function is storing 376 bytes.

General properties

nb instructions	388
nb uops	409
loop length	2557
used x86 registers	16
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	60

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	68.17 cycles
front end	68.17 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	15.80	15.80	35.00	35.00	32.50	15.80	15.80	32.50	32.50	32.50	15.80	35.00
cycles	15.80	17.40	35.00	35.00	32.50	15.80	15.80	32.50	32.50	32.50	15.80	35.00

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

16.00

Cycles summary

Front-end	68.17
Dispatch	35.00
DIV/SQRT	16.00
Overall L1	68.17

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	0%

Vector efficiency ratios

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	9%
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 68.17 cycles. At this rate:

5% of peak load performance is reached (10.62 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (5.52 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 68.17 to 35.00 cycles (1.95x speedup).

ASM code

In the binary file, the address of the function is: 451c20

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0x128,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R9,-0x130(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R8,-0xa0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RCX,-0x128(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDX,-0xa8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDI,-0xc0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0xd0(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x78(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0xc8(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0xf0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0xc0(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0xe0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0xb8(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0xb0(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0xf8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0xa8(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0xb8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0xa0(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x150(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x98(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x138(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x90(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x120(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x88(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x118(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x80(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0xe8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x78(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x70(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x50(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x68(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x148(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x60(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x110(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x58(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x108(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x50(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x48(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x40(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x98(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x38(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x90(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x30(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x28(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x88(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x20(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x100(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x18(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x60(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x10(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x58(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CALL 51da60 <hypre_GetThreadNum>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 51da50 <hypre_NumActiveThreads>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RAX,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RBX,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
OR %RCX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
SHR $0x20,%RAX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
JE 451dc0 <hypre_BoomerAMGBuildMultipass.extracted.34+0x1a0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RBX,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CQTO	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	scal (12.5%)
IDIV %RCX	5	0	3	0	0	0	0	0	0	0	0	0	0	11-16	10	scal (12.5%)
JMP 451dc6 <hypre_BoomerAMGBuildMultipass.extracted.34+0x1a6>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %EBX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
DIV %ECX	4	0	3	0	0	0	0	0	0	0	0	0	0	11-16	6	scal (6.3%)
MOV %RCX,-0x140(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
DEC %RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0x1(%R12),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
IMUL %RAX,%RDX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
MOV %R12,-0x68(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMP %RCX,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
CMOVE %RBX,%RDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
MOV %RDX,-0xb0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x50(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RAX),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R13,%R12,8),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0xd8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV $0x8,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R15,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 51b840 <hypre_CAlloc>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
TEST %R15,%R15	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JLE 451e2a <hypre_BoomerAMGBuildMultipass.extracted.34+0x20a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
SAL $0x3,%R15	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	scal (12.5%)
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV $0xff,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R15,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 5277f0 <__intel_avx_rep_memset>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
IMUL -0x68(%RBP),%R14	1	0	1	0.33	0.33	0	0	0	0	0	0	0	0.33	3	1	N/A
MOV %R14,-0x70(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0xb8(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0xf8(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RDI,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RAX,-0xb8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JE 451e5c <hypre_BoomerAMGBuildMultipass.extracted.34+0x23c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0xe8(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %RDI,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 451ec0 <hypre_BoomerAMGBuildMultipass.extracted.34+0x2a0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV $0x8,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RDI,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 51b840 <hypre_CAlloc>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RAX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R14,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
TEST %R14,%R14	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JLE 451ec0 <hypre_BoomerAMGBuildMultipass.extracted.34+0x2a0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
SAL $0x3,%RDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV %R15,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV $0xff,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CALL 5277f0 <__intel_avx_rep_memset>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
JMP 451ec0 <hypre_BoomerAMGBuildMultipass.extracted.34+0x2a0>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x70(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0xd8(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RCX,%RDX,1),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0xb0(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %RSI,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RCX,-0xc8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMP %RSI,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RAX,-0x80(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JGE 4525c0 <hypre_BoomerAMGBuildMultipass.extracted.34+0x9a0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA -0x1(%R12),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R12,-0x50(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R10,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 451f57 <hypre_BoomerAMGBuildMultipass.extracted.34+0x337>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x68(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %R13,%R13	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JNE 4525de <hypre_BoomerAMGBuildMultipass.extracted.34+0x9be>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0xe0(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x140(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RSI,(%RDX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x78(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RCX,(%RDX,%R13,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0xf0(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,(%R14,%R13,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0xc0(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RAX),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV $0x55c8b0,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CALL 410570 <__kmpc_barrier@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x78(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %R13,%R13	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
MOV -0xe0(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JNE 45264d <hypre_BoomerAMGBuildMultipass.extracted.34+0xa2d>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMPQ $0x2,(%R13)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JL 45264d <hypre_BoomerAMGBuildMultipass.extracted.34+0xa2d>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV $0x1,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0xc0(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RAX),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV $0x55c8d0,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CALL 410570 <__kmpc_barrier@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
CMPQ $0,-0x68(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JLE 452800 <hypre_BoomerAMGBuildMultipass.extracted.34+0xbe0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0xb0(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RAX,-0x70(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
MOV -0x98(%RBP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %R14,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x90(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x78(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x68(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JGE 45289f <hypre_BoomerAMGBuildMultipass.extracted.34+0xc7f>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x80(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA 0x1(%RDX),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0xc8(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RCX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
CMOVLE %RCX,%RAX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
MOV %RAX,-0x50(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
SUB %RDX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RAX,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMP $0x4,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RSI,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JB 452792 <hypre_BoomerAMGBuildMultipass.extracted.34+0xb72>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
SHR $0x2,%RDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV -0x88(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x80(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA 0x18(%RSI,%RDI,8),%RSI	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x38(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RCX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x4,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
CMP %RCX,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV -0x88(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0xd8(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JAE 45289f <hypre_BoomerAMGBuildMultipass.extracted.34+0xc7f>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
ADD -0x70(%RBP),%R9	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
ADD %RDX,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 45289f <hypre_BoomerAMGBuildMultipass.extracted.34+0xc7f>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV (%R13),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x8(%R14,%RAX,8),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x78(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x8(%RCX,%RAX,8),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x148(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %RDI,(%RAX)	2	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x150(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %R14,(%RAX)	2	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV $0x8,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CALL 51b840 <hypre_CAlloc>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x40(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,(%RCX,%R12,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
TEST %R14,%R14	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 452880 <hypre_BoomerAMGBuildMultipass.extracted.34+0xc60>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV $0x8,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R14,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 51b840 <hypre_CAlloc>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
JMP 452893 <hypre_BoomerAMGBuildMultipass.extracted.34+0xc73>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x138(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMPQ $0x2,(%RAX)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
MOV -0x68(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JL 45289f <hypre_BoomerAMGBuildMultipass.extracted.34+0xc7f>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x48(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,(%RCX,%R12,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x68(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0xc0(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RAX),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV $0x55c8f0,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CALL 410570 <__kmpc_barrier@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
TEST %R13,%R13	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JLE 452900 <hypre_BoomerAMGBuildMultipass.extracted.34+0xce0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0xf0(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x8(%RAX,%R13,8),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x78(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x8(%RCX,%R13,8),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x70(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP -0xb0(%RBP),%RDX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
MOV -0x80(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JL 452919 <hypre_BoomerAMGBuildMultipass.extracted.34+0xcf9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
JMP 453000 <hypre_BoomerAMGBuildMultipass.extracted.34+0x13e0>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x70(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP -0xb0(%RBP),%RDX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
MOV -0x80(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JGE 453000 <hypre_BoomerAMGBuildMultipass.extracted.34+0x13e0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA -0x1(%R12),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R10,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 452954 <hypre_BoomerAMGBuildMultipass.extracted.34+0xd34>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 51b990 <hypre_Free>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
CMPQ $0,-0xe8(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JNE 453040 <hypre_BoomerAMGBuildMultipass.extracted.34+0x1420>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0xb8(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP -0xf8(%RBP),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 453040 <hypre_BoomerAMGBuildMultipass.extracted.34+0x1420>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
ADD $0x128,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R15,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD $0x128,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
JMP 51b990 <hypre_Free>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_4

Source file and lines	par_multi_interp.c:891-1134
Module	exec

gain
potential
hint
expert

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

__intel_avx_rep_memset: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:918
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:925
__kmpc_barrier@plt: 3 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1011
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1017
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1051
hypre_CAlloc: 4 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:916
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:925
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1048
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1050
hypre_Free: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1132
hypre_GetThreadNum: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:900
hypre_NumActiveThreads: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:901

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

ADD: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1044
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:1045
DIV: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:902
IDIV: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:902

Conversion instructions

Detected expensive conversion instructions.

Details

CQTO: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:902

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 724 bytes. The binary function is storing 376 bytes.

General properties

nb instructions	388
nb uops	409
loop length	2557
used x86 registers	16
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	60

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	68.17 cycles
front end	68.17 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	15.80	15.80	35.00	35.00	32.50	15.80	15.80	32.50	32.50	32.50	15.80	35.00
cycles	15.80	17.40	35.00	35.00	32.50	15.80	15.80	32.50	32.50	32.50	15.80	35.00

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

16.00

Cycles summary

Front-end	68.17
Dispatch	35.00
DIV/SQRT	16.00
Overall L1	68.17

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	0%

Vector efficiency ratios

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	9%
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 68.17 cycles. At this rate:

5% of peak load performance is reached (10.62 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (5.52 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 451c20

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0x128,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R9,-0x130(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R8,-0xa0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RCX,-0x128(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDX,-0xa8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDI,-0xc0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0xd0(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x78(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0xc8(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0xf0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0xc0(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0xe0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0xb8(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0xb0(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0xf8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0xa8(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0xb8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0xa0(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x150(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x98(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x138(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x90(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x120(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x88(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x118(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x80(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0xe8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x78(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x70(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x50(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x68(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x148(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x60(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x110(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x58(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x108(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x50(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x48(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x40(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x98(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x38(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x90(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x30(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x28(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x88(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x20(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x100(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x18(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x60(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x10(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x58(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CALL 51da60 <hypre_GetThreadNum>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 51da50 <hypre_NumActiveThreads>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RAX,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RBX,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
OR %RCX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
SHR $0x20,%RAX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
JE 451dc0 <hypre_BoomerAMGBuildMultipass.extracted.34+0x1a0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RBX,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CQTO	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	scal (12.5%)
IDIV %RCX	5	0	3	0	0	0	0	0	0	0	0	0	0	11-16	10	scal (12.5%)
JMP 451dc6 <hypre_BoomerAMGBuildMultipass.extracted.34+0x1a6>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %EBX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
DIV %ECX	4	0	3	0	0	0	0	0	0	0	0	0	0	11-16	6	scal (6.3%)
MOV %RCX,-0x140(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
DEC %RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0x1(%R12),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
IMUL %RAX,%RDX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
MOV %R12,-0x68(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMP %RCX,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
CMOVE %RBX,%RDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
MOV %RDX,-0xb0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x50(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RAX),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R13,%R12,8),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0xd8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV $0x8,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R15,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 51b840 <hypre_CAlloc>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
TEST %R15,%R15	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JLE 451e2a <hypre_BoomerAMGBuildMultipass.extracted.34+0x20a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
SAL $0x3,%R15	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	scal (12.5%)
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV $0xff,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R15,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 5277f0 <__intel_avx_rep_memset>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
IMUL -0x68(%RBP),%R14	1	0	1	0.33	0.33	0	0	0	0	0	0	0	0.33	3	1	N/A
MOV %R14,-0x70(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0xb8(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0xf8(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RDI,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RAX,-0xb8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JE 451e5c <hypre_BoomerAMGBuildMultipass.extracted.34+0x23c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0xe8(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %RDI,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 451ec0 <hypre_BoomerAMGBuildMultipass.extracted.34+0x2a0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV $0x8,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RDI,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 51b840 <hypre_CAlloc>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RAX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R14,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
TEST %R14,%R14	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JLE 451ec0 <hypre_BoomerAMGBuildMultipass.extracted.34+0x2a0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
SAL $0x3,%RDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV %R15,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV $0xff,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CALL 5277f0 <__intel_avx_rep_memset>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
JMP 451ec0 <hypre_BoomerAMGBuildMultipass.extracted.34+0x2a0>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x70(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0xd8(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RCX,%RDX,1),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0xb0(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %RSI,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RCX,-0xc8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMP %RSI,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RAX,-0x80(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JGE 4525c0 <hypre_BoomerAMGBuildMultipass.extracted.34+0x9a0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA -0x1(%R12),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R12,-0x50(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R10,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 451f57 <hypre_BoomerAMGBuildMultipass.extracted.34+0x337>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x68(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %R13,%R13	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JNE 4525de <hypre_BoomerAMGBuildMultipass.extracted.34+0x9be>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0xe0(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x140(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RSI,(%RDX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x78(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RCX,(%RDX,%R13,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0xf0(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,(%R14,%R13,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0xc0(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RAX),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV $0x55c8b0,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CALL 410570 <__kmpc_barrier@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x78(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %R13,%R13	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
MOV -0xe0(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JNE 45264d <hypre_BoomerAMGBuildMultipass.extracted.34+0xa2d>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMPQ $0x2,(%R13)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JL 45264d <hypre_BoomerAMGBuildMultipass.extracted.34+0xa2d>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV $0x1,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0xc0(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RAX),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV $0x55c8d0,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CALL 410570 <__kmpc_barrier@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
CMPQ $0,-0x68(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JLE 452800 <hypre_BoomerAMGBuildMultipass.extracted.34+0xbe0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0xb0(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RAX,-0x70(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
MOV -0x98(%RBP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %R14,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x90(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x78(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x68(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JGE 45289f <hypre_BoomerAMGBuildMultipass.extracted.34+0xc7f>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x80(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA 0x1(%RDX),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0xc8(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RCX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
CMOVLE %RCX,%RAX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
MOV %RAX,-0x50(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
SUB %RDX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RAX,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMP $0x4,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RSI,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JB 452792 <hypre_BoomerAMGBuildMultipass.extracted.34+0xb72>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
SHR $0x2,%RDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV -0x88(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x80(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA 0x18(%RSI,%RDI,8),%RSI	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x38(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RCX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x4,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
CMP %RCX,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV -0x88(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0xd8(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JAE 45289f <hypre_BoomerAMGBuildMultipass.extracted.34+0xc7f>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
ADD -0x70(%RBP),%R9	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
ADD %RDX,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 45289f <hypre_BoomerAMGBuildMultipass.extracted.34+0xc7f>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV (%R13),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x8(%R14,%RAX,8),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x78(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x8(%RCX,%RAX,8),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x148(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %RDI,(%RAX)	2	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x150(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %R14,(%RAX)	2	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV $0x8,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CALL 51b840 <hypre_CAlloc>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x40(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,(%RCX,%R12,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
TEST %R14,%R14	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 452880 <hypre_BoomerAMGBuildMultipass.extracted.34+0xc60>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV $0x8,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R14,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 51b840 <hypre_CAlloc>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
JMP 452893 <hypre_BoomerAMGBuildMultipass.extracted.34+0xc73>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x138(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMPQ $0x2,(%RAX)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
MOV -0x68(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JL 45289f <hypre_BoomerAMGBuildMultipass.extracted.34+0xc7f>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x48(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,(%RCX,%R12,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x68(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0xc0(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RAX),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV $0x55c8f0,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CALL 410570 <__kmpc_barrier@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
TEST %R13,%R13	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JLE 452900 <hypre_BoomerAMGBuildMultipass.extracted.34+0xce0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0xf0(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x8(%RAX,%R13,8),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x78(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x8(%RCX,%R13,8),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x70(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP -0xb0(%RBP),%RDX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
MOV -0x80(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JL 452919 <hypre_BoomerAMGBuildMultipass.extracted.34+0xcf9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
JMP 453000 <hypre_BoomerAMGBuildMultipass.extracted.34+0x13e0>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x70(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP -0xb0(%RBP),%RDX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
MOV -0x80(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JGE 453000 <hypre_BoomerAMGBuildMultipass.extracted.34+0x13e0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA -0x1(%R12),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R10,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 452954 <hypre_BoomerAMGBuildMultipass.extracted.34+0xd34>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 51b990 <hypre_Free>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
CMPQ $0,-0xe8(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JNE 453040 <hypre_BoomerAMGBuildMultipass.extracted.34+0x1420>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0xb8(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP -0xf8(%RBP),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 453040 <hypre_BoomerAMGBuildMultipass.extracted.34+0x1420>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
ADD $0x128,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R15,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD $0x128,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
JMP 51b990 <hypre_Free>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

Name	Coverage (%)	Time (s)
▼hypre_BoomerAMGBuildMultipass.extracted.34–	1.53	0.81
○Loop 1005 - par_multi_interp.c:1030-1034 - exec	0.04	0.02
▼Loop 1007 - par_multi_interp.c:917-997 - exec–	0.04	0.02
▼Loop 1010 - par_multi_interp.c:917-970 - exec–	0.58	0.25
○Loop 1013 - par_multi_interp.c:951-958 - exec	0.17	0.07
○Loop 1014 - par_multi_interp.c:917-958 - exec	0.00	0.01
○Loop 1011 - par_multi_interp.c:963-970 - exec	0.00	0.00
○Loop 1012 - par_multi_interp.c:963-970 - exec	0.00	0.00
▼Loop 1008 - par_multi_interp.c:976-997 - exec–	0.00	0.00
○Loop 1009 - par_multi_interp.c:983-997 - exec	0.00	0.00
▼Loop 996 - par_multi_interp.c:917-1125 - exec–	0.03	0.01
▼Loop 999 - par_multi_interp.c:917-1099 - exec–	0.50	0.21
○Loop 1002 - par_multi_interp.c:1082-1088 - exec	0.15	0.07
○Loop 1003 - par_multi_interp.c:1082-1088 - exec	0.00	0.01
○Loop 1000 - par_multi_interp.c:1093-1099 - exec	0.00	0.00
○Loop 1001 - par_multi_interp.c:1093-1099 - exec	0.00	0.00
▼Loop 997 - par_multi_interp.c:1104-1125 - exec–	0.00	0.01
○Loop 998 - par_multi_interp.c:1111-1125 - exec	0.00	0.00
○Loop 1006 - par_multi_interp.c:1017-1020 - exec	0.00	0.00
○Loop 1004 - par_multi_interp.c:1030-1034 - exec	0.00	0.00

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