OV - exec - Loop 717

	Loop Id: 717	Module: exec	Source: par_lr_interp.c:1609-1675 [...]	Coverage: 0.07%

0x46f510 MOV	-0x48(%RBP),%R8

0x46f514 MOV	-0x38(%RBP),%R9

0x46f518 LEA	(%R8,%RCX,8),%RCX

0x46f51c VMOVSD	(%RCX),%XMM0

0x46f520 VADDSD	(%R15,%R9,8),%XMM0,%XMM7

0x46f526 VMOVSD	%XMM7,(%RCX)

0x46f52a INCQ	-0x38(%RBP)

0x46f52e MOV	-0x38(%RBP),%RBX

0x46f532 CMP	%R11,%RBX

0x46f535 JE	46f598

0x46f537 MOV	-0x38(%RBP),%RBX

0x46f53b MOV	(%RDI,%RBX,8),%RSI

0x46f53f MOV	(%R13,%RSI,8),%RCX

0x46f544 LEA	(,%RSI,8),%R8

0x46f54c CMP	%RCX,%RDX

0x46f54f JLE	46f510

0x46f551 CMP	%R12,%RCX

0x46f554 JE	46f8f0

0x46f55a CMPQ	$-0x3,(%R14,%RSI,8)

0x46f55f JE	46f52a

0x46f561 CMPQ	$0x1,-0xb0(%RBP)

0x46f569 JE	46f57c

0x46f56b MOV	-0xe8(%RBP),%R8

0x46f572 MOV	(%R8,%RSI,8),%R10

0x46f576 CMP	%R10,(%R8,%RAX,8)

0x46f57a JNE	46f52a

0x46f57c MOV	-0x38(%RBP),%RSI

0x46f580 INCQ	-0x38(%RBP)

0x46f584 VADDSD	(%R15,%RSI,8),%XMM1,%XMM1

0x46f58a MOV	-0x38(%RBP),%RBX

0x46f58e CMP	%R11,%RBX

0x46f591 JNE	46f537

0x46f8f0 MOV	-0xc0(%RBP),%R9

0x46f8f7 VMOVSD	0xeae09(%RIP),%XMM0

0x46f8ff MOV	(%R9,%RSI,8),%RBX

0x46f903 VCOMISD	(%R15,%RBX,8),%XMM10

0x46f909 JA	46f913

0x46f90b VMOVSD	0xeae05(%RIP),%XMM0

0x46f913 MOV	-0xc0(%RBP),%RCX

0x46f91a LEA	0x1(%RBX),%RBX

0x46f91e MOV	0x8(%RCX,%R8,1),%R10

0x46f923 MOV	%RBX,%R9

0x46f926 MOV	%R10,-0xd0(%RBP)

0x46f92d VMOVAPD	%XMM5,%XMM2

0x46f931 CMP	%R10,%RBX

0x46f934 JGE	4717fa

0x46f93a SUB	%RBX,%R10

0x46f93d MOV	%R10,%RCX

0x46f940 VXORPD	%XMM3,%XMM3,%XMM3

0x46f944 AND	$0x3,%ECX

0x46f947 JE	46f9e3

0x46f94d CMP	$0x1,%RCX

0x46f951 JE	46f9aa

0x46f953 CMP	$0x2,%RCX

0x46f957 JE	46f982

0x46f959 MOV	(%RDI,%RBX,8),%R10

0x46f95d CMP	(%R13,%R10,8),%RDX

0x46f962 JLE	46f969

0x46f964 CMP	%RAX,%R10

0x46f967 JNE	46f97e

0x46f969 VMOVSD	(%R15,%RBX,8),%XMM7

0x46f96f VMULSD	%XMM0,%XMM7,%XMM8

0x46f973 VCOMISD	%XMM8,%XMM3

0x46f978 JBE	46f97e

0x46f97a VADDSD	%XMM7,%XMM5,%XMM2

0x46f97e LEA	0x1(%RBX),%R9

0x46f982 MOV	(%RDI,%R9,8),%RCX

0x46f986 CMP	(%R13,%RCX,8),%RDX

0x46f98b JLE	46f992

0x46f98d CMP	%RAX,%RCX

0x46f990 JNE	46f9a7

0x46f992 VMOVSD	(%R15,%R9,8),%XMM9

0x46f998 VMULSD	%XMM0,%XMM9,%XMM11

0x46f99c VCOMISD	%XMM11,%XMM3

0x46f9a1 JA	4711af

0x46f9a7 INC	%R9

0x46f9aa MOV	(%RDI,%R9,8),%R10

0x46f9ae CMP	(%R13,%R10,8),%RDX

0x46f9b3 JLE	46f9ba

0x46f9b5 CMP	%RAX,%R10

0x46f9b8 JNE	46f9d0

0x46f9ba VMOVSD	(%R15,%R9,8),%XMM12

0x46f9c0 VMULSD	%XMM0,%XMM12,%XMM13

0x46f9c4 VCOMISD	%XMM13,%XMM3

0x46f9c9 JBE	46f9d0

0x46f9cb VADDSD	%XMM12,%XMM2,%XMM2

0x46f9d0 MOV	-0xd0(%RBP),%RCX

0x46f9d7 INC	%R9

0x46f9da CMP	%RCX,%R9

0x46f9dd JE	46fa98

  (721) 0x46f9e3 MOV	(%RDI,%R9,8),%R10

  (721) 0x46f9e7 CMP	(%R13,%R10,8),%RDX

  (721) 0x46f9ec JLE	46f9f3

  (721) 0x46f9ee CMP	%RAX,%R10

  (721) 0x46f9f1 JNE	46fa09

  (721) 0x46f9f3 VMOVSD	(%R15,%R9,8),%XMM14

  (721) 0x46f9f9 VMULSD	%XMM0,%XMM14,%XMM15

  (721) 0x46f9fd VCOMISD	%XMM15,%XMM3

  (721) 0x46fa02 JBE	46fa09

  (721) 0x46fa04 VADDSD	%XMM14,%XMM2,%XMM2

  (721) 0x46fa09 INC	%R9

  (721) 0x46fa0c MOV	(%RDI,%R9,8),%RCX

  (721) 0x46fa10 CMP	(%R13,%RCX,8),%RDX

  (721) 0x46fa15 JLE	46fa1c

  (721) 0x46fa17 CMP	%RAX,%RCX

  (721) 0x46fa1a JNE	46fa30

  (721) 0x46fa1c VMOVSD	(%R15,%R9,8),%XMM4

  (721) 0x46fa22 VMULSD	%XMM0,%XMM4,%XMM7

  (721) 0x46fa26 VCOMISD	%XMM7,%XMM3

  (721) 0x46fa2a JBE	46fa30

  (721) 0x46fa2c VADDSD	%XMM4,%XMM2,%XMM2

  (721) 0x46fa30 LEA	0x1(%R9),%R10

  (721) 0x46fa34 MOV	(%RDI,%R10,8),%RCX

  (721) 0x46fa38 CMP	(%R13,%RCX,8),%RDX

  (721) 0x46fa3d JLE	46fa44

  (721) 0x46fa3f CMP	%RAX,%RCX

  (721) 0x46fa42 JNE	46fa5a

  (721) 0x46fa44 VMOVSD	(%R15,%R10,8),%XMM9

  (721) 0x46fa4a VMULSD	%XMM0,%XMM9,%XMM8

  (721) 0x46fa4e VCOMISD	%XMM8,%XMM3

  (721) 0x46fa53 JBE	46fa5a

  (721) 0x46fa55 VADDSD	%XMM9,%XMM2,%XMM2

  (721) 0x46fa5a LEA	0x2(%R9),%R10

  (721) 0x46fa5e MOV	(%RDI,%R10,8),%RCX

  (721) 0x46fa62 CMP	(%R13,%RCX,8),%RDX

  (721) 0x46fa67 JLE	46fa6e

  (721) 0x46fa69 CMP	%RAX,%RCX

  (721) 0x46fa6c JNE	46fa84

  (721) 0x46fa6e VMOVSD	(%R15,%R10,8),%XMM11

  (721) 0x46fa74 VMULSD	%XMM0,%XMM11,%XMM12

  (721) 0x46fa78 VCOMISD	%XMM12,%XMM3

  (721) 0x46fa7d JBE	46fa84

  (721) 0x46fa7f VADDSD	%XMM11,%XMM2,%XMM2

  (721) 0x46fa84 MOV	-0xd0(%RBP),%R10

  (721) 0x46fa8b ADD	$0x3,%R9

  (721) 0x46fa8f CMP	%R10,%R9

  (721) 0x46fa92 JNE	46f9e3

0x46fa98 MOV	-0x38(%RBP),%R9

0x46fa9c CMPQ	$0x1,-0xa8(%RBP)

0x46faa4 VMOVSD	(%R15,%R9,8),%XMM13

0x46faaa JG	470598

0x46fab0 VXORPD	%XMM3,%XMM3,%XMM3

0x46fab4 VCOMISD	%XMM3,%XMM2

0x46fab8 JNE	470f7e

0x46fabe VADDSD	%XMM13,%XMM1,%XMM1

0x46fac3 JMP	46f52a

0x470598 MOV	-0x148(%RBP),%RCX

0x47059f MOV	(%RCX,%RSI,8),%R10

0x4705a3 MOV	0x8(%RCX,%R8,1),%R9

0x4705a8 MOV	%R10,-0x158(%RBP)

0x4705af MOV	%R9,-0x160(%RBP)

0x4705b6 CMP	%R9,%R10

0x4705b9 JGE	471aca

0x4705bf SUB	%R10,%R9

0x4705c2 MOV	%R10,-0x100(%RBP)

0x4705c9 VXORPD	%XMM15,%XMM15,%XMM15

0x4705ce AND	$0x7,%R9D

0x4705d2 JE	4707cd

0x4705d8 CMP	$0x1,%R9

0x4705dc JE	47078b

0x4705e2 CMP	$0x2,%R9

0x4705e6 JE	470760

0x4705ec CMP	$0x3,%R9

0x4705f0 JE	470717

0x4705f6 CMP	$0x4,%R9

0x4705fa JE	4706cd

0x470600 CMP	$0x5,%R9

0x470604 JE	470683

0x470606 CMP	$0x6,%R9

0x47060a JE	470658

0x47060c MOV	-0x108(%RBP),%RCX

0x470613 MOV	(%RCX,%R10,8),%R9

0x470617 MOV	-0x60(%RBP),%RCX

0x47061b MOV	-0x78(%RBP),%R10

0x47061f CMP	(%RCX,%R9,8),%R10

0x470623 JG	470647

0x470625 MOV	-0x128(%RBP),%R9

0x47062c MOV	-0x158(%RBP),%RCX

0x470633 VMOVSD	(%R9,%RCX,8),%XMM4

0x470639 VMULSD	%XMM0,%XMM4,%XMM7

0x47063d VCOMISD	%XMM7,%XMM15

0x470641 JBE	470647

0x470643 VADDSD	%XMM4,%XMM2,%XMM2

0x470647 MOV	-0x158(%RBP),%R10

0x47064e INC	%R10

0x470651 MOV	%R10,-0x100(%RBP)

0x470658 MOV	-0x108(%RBP),%R9

0x47065f MOV	-0x100(%RBP),%RCX

0x470666 MOV	-0x60(%RBP),%R10

0x47066a MOV	(%R9,%RCX,8),%RCX

0x47066e MOV	-0x78(%RBP),%R9

0x470672 CMP	(%R10,%RCX,8),%R9

0x470676 JLE	4719b0

0x47067c INCQ	-0x100(%RBP)

0x470683 MOV	-0x108(%RBP),%R9

0x47068a MOV	-0x100(%RBP),%RCX

0x470691 MOV	-0x60(%RBP),%R10

0x470695 MOV	(%R9,%RCX,8),%RCX

0x470699 MOV	-0x78(%RBP),%R9

0x47069d CMP	(%R10,%RCX,8),%R9

0x4706a1 JG	4706c6

0x4706a3 MOV	-0x128(%RBP),%RCX

0x4706aa MOV	-0x100(%RBP),%R10

0x4706b1 VMOVSD	(%RCX,%R10,8),%XMM11

0x4706b7 VMULSD	%XMM0,%XMM11,%XMM12

0x4706bb VCOMISD	%XMM12,%XMM15

0x4706c0 JA	471a78

0x4706c6 INCQ	-0x100(%RBP)

0x4706cd MOV	-0x108(%RBP),%R9

0x4706d4 MOV	-0x100(%RBP),%RCX

0x4706db MOV	-0x60(%RBP),%R10

0x4706df MOV	(%R9,%RCX,8),%RCX

0x4706e3 MOV	-0x78(%RBP),%R9

0x4706e7 CMP	(%R10,%RCX,8),%R9

0x4706eb JG	470710

0x4706ed MOV	-0x128(%RBP),%RCX

0x4706f4 MOV	-0x100(%RBP),%R10

0x4706fb VMOVSD	(%RCX,%R10,8),%XMM3

0x470701 VMULSD	%XMM0,%XMM3,%XMM14

0x470705 VCOMISD	%XMM14,%XMM15

0x47070a JA	471a50

0x470710 INCQ	-0x100(%RBP)

0x470717 MOV	-0x108(%RBP),%R9

0x47071e MOV	-0x100(%RBP),%RCX

0x470725 MOV	-0x60(%RBP),%R10

0x470729 MOV	(%R9,%RCX,8),%RCX

0x47072d MOV	-0x78(%RBP),%R9

0x470731 CMP	(%R10,%RCX,8),%R9

0x470735 JG	470759

0x470737 MOV	-0x128(%RBP),%RCX

0x47073e MOV	-0x100(%RBP),%R10

0x470745 VMOVSD	(%RCX,%R10,8),%XMM4

0x47074b VMULSD	%XMM0,%XMM4,%XMM7

0x47074f VCOMISD	%XMM7,%XMM15

0x470753 JBE	470759

0x470755 VADDSD	%XMM4,%XMM2,%XMM2

0x470759 INCQ	-0x100(%RBP)

0x470760 MOV	-0x108(%RBP),%R9

0x470767 MOV	-0x100(%RBP),%RCX

0x47076e MOV	-0x60(%RBP),%R10

0x470772 MOV	(%R9,%RCX,8),%RCX

0x470776 MOV	-0x78(%RBP),%R9

0x47077a CMP	(%R10,%RCX,8),%R9

0x47077e JLE	4711bc

0x470784 INCQ	-0x100(%RBP)

0x47078b MOV	-0x108(%RBP),%R9

0x470792 MOV	-0x100(%RBP),%RCX

0x470799 MOV	-0x60(%RBP),%R10

0x47079d MOV	(%R9,%RCX,8),%RCX

0x4707a1 MOV	-0x78(%RBP),%R9

0x4707a5 CMP	(%R10,%RCX,8),%R9

0x4707a9 JLE	471182

0x4707af INCQ	-0x100(%RBP)

0x4707b6 MOV	-0x160(%RBP),%R9

0x4707bd MOV	-0x100(%RBP),%R10

0x4707c4 CMP	%R9,%R10

0x4707c7 JE	470970

0x4707cd MOV	%RDX,-0x190(%RBP)

0x4707d4 MOV	%RDI,-0x170(%RBP)

0x4707db MOV	%R15,-0x180(%RBP)

0x4707e2 MOV	%R14,-0x188(%RBP)

0x4707e9 MOV	%RAX,-0x100(%RBP)

0x4707f0 MOV	%R10,%RCX

0x4707f3 MOV	%R13,%R15

0x4707f6 MOV	-0x60(%RBP),%RDI

0x4707fa MOV	-0x108(%RBP),%R13

0x470801 MOV	-0x78(%RBP),%R14

0x470805 MOV	-0x158(%RBP),%R10

0x47080c MOV	-0x128(%RBP),%RAX

  (720) 0x470813 MOV	(%R13,%RCX,8),%RDX

  (720) 0x470818 CMP	(%RDI,%RDX,8),%R14

  (720) 0x47081c JG	470832

  (720) 0x47081e VMOVSD	(%RAX,%RCX,8),%XMM3

  (720) 0x470823 VMULSD	%XMM0,%XMM3,%XMM14

  (720) 0x470827 VCOMISD	%XMM14,%XMM15

  (720) 0x47082c JBE	470832

  (720) 0x47082e VADDSD	%XMM3,%XMM2,%XMM2

  (720) 0x470832 LEA	0x1(%RCX),%RCX

  (720) 0x470836 MOV	(%R13,%RCX,8),%R9

  (720) 0x47083b CMP	(%RDI,%R9,8),%R14

  (720) 0x47083f JG	470854

  (720) 0x470841 VMOVSD	(%RAX,%RCX,8),%XMM4

  (720) 0x470846 VMULSD	%XMM0,%XMM4,%XMM7

  (720) 0x47084a VCOMISD	%XMM7,%XMM15

  (720) 0x47084e JBE	470854

  (720) 0x470850 VADDSD	%XMM4,%XMM2,%XMM2

  (720) 0x470854 LEA	0x1(%RCX),%R9

  (720) 0x470858 MOV	(%R13,%R9,8),%RDX

  (720) 0x47085d CMP	(%RDI,%RDX,8),%R14

  (720) 0x470861 JG	470879

  (720) 0x470863 VMOVSD	(%RAX,%R9,8),%XMM8

  (720) 0x470869 VMULSD	%XMM0,%XMM8,%XMM9

  (720) 0x47086d VCOMISD	%XMM9,%XMM15

  (720) 0x470872 JBE	470879

  (720) 0x470874 VADDSD	%XMM8,%XMM2,%XMM2

  (720) 0x470879 LEA	0x2(%RCX),%R9

  (720) 0x47087d MOV	(%R13,%R9,8),%RDX

  (720) 0x470882 CMP	(%RDI,%RDX,8),%R14

  (720) 0x470886 JG	47089e

  (720) 0x470888 VMOVSD	(%RAX,%R9,8),%XMM11

  (720) 0x47088e VMULSD	%XMM0,%XMM11,%XMM12

  (720) 0x470892 VCOMISD	%XMM12,%XMM15

  (720) 0x470897 JBE	47089e

  (720) 0x470899 VADDSD	%XMM11,%XMM2,%XMM2

  (720) 0x47089e LEA	0x3(%RCX),%R9

  (720) 0x4708a2 MOV	(%R13,%R9,8),%RDX

  (720) 0x4708a7 CMP	(%RDI,%RDX,8),%R14

  (720) 0x4708ab JG	4708c2

  (720) 0x4708ad VMOVSD	(%RAX,%R9,8),%XMM3

  (720) 0x4708b3 VMULSD	%XMM0,%XMM3,%XMM14

  (720) 0x4708b7 VCOMISD	%XMM14,%XMM15

  (720) 0x4708bc JBE	4708c2

  (720) 0x4708be VADDSD	%XMM3,%XMM2,%XMM2

  (720) 0x4708c2 LEA	0x4(%RCX),%R9

  (720) 0x4708c6 MOV	(%R13,%R9,8),%RDX

  (720) 0x4708cb CMP	(%RDI,%RDX,8),%R14

  (720) 0x4708cf JG	4708e5

  (720) 0x4708d1 VMOVSD	(%RAX,%R9,8),%XMM4

  (720) 0x4708d7 VMULSD	%XMM0,%XMM4,%XMM7

  (720) 0x4708db VCOMISD	%XMM7,%XMM15

  (720) 0x4708df JBE	4708e5

  (720) 0x4708e1 VADDSD	%XMM4,%XMM2,%XMM2

  (720) 0x4708e5 LEA	0x5(%RCX),%R9

  (720) 0x4708e9 MOV	(%R13,%R9,8),%RDX

  (720) 0x4708ee CMP	(%RDI,%RDX,8),%R14

  (720) 0x4708f2 JG	47090a

  (720) 0x4708f4 VMOVSD	(%RAX,%R9,8),%XMM8

  (720) 0x4708fa VMULSD	%XMM0,%XMM8,%XMM9

  (720) 0x4708fe VCOMISD	%XMM9,%XMM15

  (720) 0x470903 JBE	47090a

  (720) 0x470905 VADDSD	%XMM8,%XMM2,%XMM2

  (720) 0x47090a LEA	0x6(%RCX),%R9

  (720) 0x47090e MOV	(%R13,%R9,8),%RDX

  (720) 0x470913 CMP	(%RDI,%RDX,8),%R14

  (720) 0x470917 JG	47092f

  (720) 0x470919 VMOVSD	(%RAX,%R9,8),%XMM11

  (720) 0x47091f VMULSD	%XMM0,%XMM11,%XMM12

  (720) 0x470923 VCOMISD	%XMM12,%XMM15

  (720) 0x470928 JBE	47092f

  (720) 0x47092a VADDSD	%XMM11,%XMM2,%XMM2

  (720) 0x47092f MOV	-0x160(%RBP),%R9

  (720) 0x470936 LEA	0x7(%RCX),%RCX

  (720) 0x47093a CMP	%R9,%RCX

  (720) 0x47093d JNE	470813

0x470943 MOV	%R10,-0x158(%RBP)

0x47094a MOV	%R15,%R13

0x47094d MOV	-0x170(%RBP),%RDI

0x470954 MOV	-0x180(%RBP),%R15

0x47095b MOV	-0x188(%RBP),%R14

0x470962 MOV	-0x190(%RBP),%RDX

0x470969 MOV	-0x100(%RBP),%RAX

0x470970 VXORPD	%XMM15,%XMM15,%XMM15

0x470975 VCOMISD	%XMM15,%XMM2

0x47097a JE	46fabe

0x470980 MOV	-0xd0(%RBP),%R10

0x470987 VDIVSD	%XMM2,%XMM13,%XMM7

0x47098b CMP	%R10,%RBX

0x47098e JL	470f82

0x470994 MOV	-0x160(%RBP),%R8

0x47099b MOV	-0x158(%RBP),%R10

0x4709a2 JMP	471316

0x470f7e VDIVSD	%XMM2,%XMM13,%XMM7

0x470f82 MOV	-0xd0(%RBP),%RCX

0x470f89 MOV	(%RDI,%RBX,8),%R9

0x470f8d MOV	%RBX,%R10

0x470f90 NOT	%R10

0x470f93 ADD	%RCX,%R10

0x470f96 MOV	(%R13,%R9,8),%RCX

0x470f9b MOV	%R9,-0x100(%RBP)

0x470fa2 VXORPD	%XMM2,%XMM2,%XMM2

0x470fa6 AND	$0x3,%R10D

0x470faa CMP	%RCX,%RDX

0x470fad JG	47175a

0x470fb3 VMOVSD	(%R15,%RBX,8),%XMM13

0x470fb9 VMULSD	%XMM0,%XMM13,%XMM3

0x470fbd VCOMISD	%XMM3,%XMM2

0x470fc1 JA	471749

0x470fc7 LEA	0x1(%RBX),%R9

0x470fcb MOV	-0xd0(%RBP),%RBX

0x470fd2 CMP	%RBX,%R9

0x470fd5 JGE	4712e7

0x470fdb TEST	%R10,%R10

0x470fde JE	471090

0x470fe4 CMP	$0x1,%R10

0x470fe8 JE	471056

0x470fea CMP	$0x2,%R10

0x470fee JE	47101a

0x470ff0 MOV	(%RDI,%R9,8),%RBX

0x470ff4 MOV	(%R13,%RBX,8),%R10

0x470ff9 CMP	%R10,%RDX

0x470ffc JG	471b29

0x471002 VMOVSD	(%R15,%R9,8),%XMM9

0x471008 VMULSD	%XMM0,%XMM9,%XMM8

0x47100c VCOMISD	%XMM8,%XMM2

0x471011 JA	471b17

0x471017 INC	%R9

0x47101a MOV	(%RDI,%R9,8),%R10

0x47101e MOV	(%R13,%R10,8),%RBX

0x471023 CMP	%RBX,%RDX

0x471026 JG	47104a

0x471028 VMOVSD	(%R15,%R9,8),%XMM15

0x47102e VMULSD	%XMM0,%XMM15,%XMM13

0x471032 VCOMISD	%XMM13,%XMM2

0x471037 JBE	471053

0x471039 MOV	-0x48(%RBP),%RCX

0x47103d LEA	(%RCX,%RBX,8),%RBX

0x471041 VFMADD213SD	(%RBX),%XMM7,%XMM15

0x471046 VMOVSD	%XMM15,(%RBX)

0x47104a CMP	%RAX,%R10

0x47104d JE	471a59

0x471053 INC	%R9

0x471056 MOV	(%RDI,%R9,8),%R10

0x47105a MOV	(%R13,%R10,8),%RBX

0x47105f CMP	%RBX,%RDX

0x471062 JG	4717d2

0x471068 VMOVSD	(%R15,%R9,8),%XMM4

0x47106e VMULSD	%XMM0,%XMM4,%XMM9

0x471072 VCOMISD	%XMM9,%XMM2

0x471077 JA	4717c1

0x47107d MOV	-0xd0(%RBP),%R10

0x471084 INC	%R9

0x471087 CMP	%R10,%R9

0x47108a JGE	4712e7

0x471090 MOV	%RSI,-0x100(%RBP)

0x471097 JMP	471149

  (719) 0x4710a0 VMOVSD	(%R15,%R9,8),%XMM12

  (719) 0x4710a6 VMULSD	%XMM0,%XMM12,%XMM15

  (719) 0x4710aa VCOMISD	%XMM15,%XMM2

  (719) 0x4710af JA	471825

  (719) 0x4710b5 LEA	0x1(%R9),%RCX

  (719) 0x4710b9 MOV	(%RDI,%RCX,8),%R9

  (719) 0x4710bd MOV	(%R13,%R9,8),%RSI

  (719) 0x4710c2 CMP	%RSI,%RDX

  (719) 0x4710c5 JG	4712b8

  (719) 0x4710cb VMOVSD	(%R15,%RCX,8),%XMM14

  (719) 0x4710d1 VMULSD	%XMM0,%XMM14,%XMM4

  (719) 0x4710d5 VCOMISD	%XMM4,%XMM2

  (719) 0x4710d9 JA	4712a6

  (719) 0x4710df LEA	0x1(%RCX),%R9

  (719) 0x4710e3 MOV	(%RDI,%R9,8),%R10

  (719) 0x4710e7 MOV	(%R13,%R10,8),%RBX

  (719) 0x4710ec CMP	%RBX,%RDX

  (719) 0x4710ef JG	47127e

  (719) 0x4710f5 VMOVSD	(%R15,%R9,8),%XMM12

  (719) 0x4710fb VMULSD	%XMM0,%XMM12,%XMM8

  (719) 0x4710ff VCOMISD	%XMM8,%XMM2

  (719) 0x471104 JA	47126d

  (719) 0x47110a LEA	0x2(%RCX),%R9

  (719) 0x47110e MOV	(%RDI,%R9,8),%R10

  (719) 0x471112 MOV	(%R13,%R10,8),%RBX

  (719) 0x471117 CMP	%RBX,%RDX

  (719) 0x47111a JG	471245

  (719) 0x471120 VMOVSD	(%R15,%R9,8),%XMM3

  (719) 0x471126 VMULSD	%XMM0,%XMM3,%XMM14

  (719) 0x47112a VCOMISD	%XMM14,%XMM2

  (719) 0x47112f JA	471234

  (719) 0x471135 LEA	0x3(%RCX),%R9

  (719) 0x471139 MOV	-0xd0(%RBP),%RCX

  (719) 0x471140 CMP	%RCX,%R9

  (719) 0x471143 JGE	4712e0

  (719) 0x471149 MOV	(%RDI,%R9,8),%RSI

  (719) 0x47114d MOV	(%R13,%RSI,8),%RCX

  (719) 0x471152 CMP	%RCX,%RDX

  (719) 0x471155 JLE	4710a0

  (719) 0x47115b CMP	%RAX,%RSI

  (719) 0x47115e JNE	4710b5

  (719) 0x471164 VMOVSD	(%R15,%R9,8),%XMM13

  (719) 0x47116a VMULSD	%XMM0,%XMM13,%XMM3

  (719) 0x47116e VCOMISD	%XMM3,%XMM2

  (719) 0x471172 JBE	4710b5

  (719) 0x471178 VFMADD231SD	%XMM13,%XMM7,%XMM1

  (719) 0x47117d JMP	4710b5

0x471182 MOV	-0x128(%RBP),%RCX

0x471189 MOV	-0x100(%RBP),%R10

0x471190 VMOVSD	(%RCX,%R10,8),%XMM11

0x471196 VMULSD	%XMM0,%XMM11,%XMM12

0x47119a VCOMISD	%XMM12,%XMM15

0x47119f JBE	4707af

0x4711a5 VADDSD	%XMM11,%XMM2,%XMM2

0x4711aa JMP	4707af

0x4711af VADDSD	%XMM9,%XMM2,%XMM2

0x4711b4 INC	%R9

0x4711b7 JMP	46f9aa

0x4711bc MOV	-0x128(%RBP),%RCX

0x4711c3 MOV	-0x100(%RBP),%R10

0x4711ca VMOVSD	(%RCX,%R10,8),%XMM8

0x4711d0 VMULSD	%XMM0,%XMM8,%XMM9

0x4711d4 VCOMISD	%XMM9,%XMM15

0x4711d9 JBE	470784

0x4711df VADDSD	%XMM8,%XMM2,%XMM2

0x4711e4 JMP	470784

  (719) 0x471234 MOV	-0x48(%RBP),%RSI

  (719) 0x471238 LEA	(%RSI,%RBX,8),%RBX

  (719) 0x47123c VFMADD213SD	(%RBX),%XMM7,%XMM3

  (719) 0x471241 VMOVSD	%XMM3,(%RBX)

  (719) 0x471245 CMP	%RAX,%R10

  (719) 0x471248 JNE	471135

  (719) 0x47124e VMOVSD	(%R15,%R9,8),%XMM4

  (719) 0x471254 VMULSD	%XMM0,%XMM4,%XMM9

  (719) 0x471258 VCOMISD	%XMM9,%XMM2

  (719) 0x47125d JBE	471135

  (719) 0x471263 VFMADD231SD	%XMM4,%XMM7,%XMM1

  (719) 0x471268 JMP	471135

  (719) 0x47126d MOV	-0x48(%RBP),%RSI

  (719) 0x471271 LEA	(%RSI,%RBX,8),%RBX

  (719) 0x471275 VFMADD213SD	(%RBX),%XMM7,%XMM12

  (719) 0x47127a VMOVSD	%XMM12,(%RBX)

  (719) 0x47127e CMP	%RAX,%R10

  (719) 0x471281 JNE	47110a

  (719) 0x471287 VMOVSD	(%R15,%R9,8),%XMM15

  (719) 0x47128d VMULSD	%XMM0,%XMM15,%XMM13

  (719) 0x471291 VCOMISD	%XMM13,%XMM2

  (719) 0x471296 JBE	47110a

  (719) 0x47129c VFMADD231SD	%XMM15,%XMM7,%XMM1

  (719) 0x4712a1 JMP	47110a

  (719) 0x4712a6 MOV	-0x48(%RBP),%RBX

  (719) 0x4712aa LEA	(%RBX,%RSI,8),%R10

  (719) 0x4712ae VFMADD213SD	(%R10),%XMM7,%XMM14

  (719) 0x4712b3 VMOVSD	%XMM14,(%R10)

  (719) 0x4712b8 CMP	%RAX,%R9

  (719) 0x4712bb JNE	4710df

  (719) 0x4712c1 VMOVSD	(%R15,%RCX,8),%XMM9

  (719) 0x4712c7 VMULSD	%XMM0,%XMM9,%XMM11

  (719) 0x4712cb VCOMISD	%XMM11,%XMM2

  (719) 0x4712d0 JBE	4710df

  (719) 0x4712d6 VFMADD231SD	%XMM9,%XMM7,%XMM1

  (719) 0x4712db JMP	4710df

0x4712e0 MOV	-0x100(%RBP),%RSI

0x4712e7 CMPQ	$0x1,-0xa8(%RBP)

0x4712ef JLE	46f52a

0x4712f5 MOV	-0x148(%RBP),%R10

0x4712fc MOV	(%R10,%RSI,8),%R9

0x471300 MOV	0x8(%R10,%R8,1),%R8

0x471305 MOV	%R9,-0x158(%RBP)

0x47130c MOV	%R8,-0x160(%RBP)

0x471313 MOV	%R9,%R10

0x471316 CMP	%R8,%R10

0x471319 JGE	46f52a

0x47131f MOV	-0xf8(%RBP),%RBX

0x471326 SUB	%R10,%R8

0x471329 MOV	0xc8(%RBX),%RCX

0x471330 MOV	%R8,%RBX

0x471333 VXORPD	%XMM2,%XMM2,%XMM2

0x471337 AND	$0x7,%EBX

0x47133a JE	471582

0x471340 CMP	$0x1,%RBX

0x471344 JE	47153d

0x47134a CMP	$0x2,%RBX

0x47134e JE	4714f0

0x471354 CMP	$0x3,%RBX

0x471358 JE	4714a3

0x47135e CMP	$0x4,%RBX

0x471362 JE	471457

0x471368 CMP	$0x5,%RBX

0x47136c JE	47140b

0x471372 CMP	$0x6,%RBX

0x471376 JE	4713be

0x471378 MOV	-0x108(%RBP),%RSI

0x47137f MOV	-0x60(%RBP),%R8

0x471383 MOV	(%RSI,%R10,8),%R9

0x471387 MOV	(%R8,%R9,8),%RSI

0x47138b CMP	%RSI,-0x78(%RBP)

0x47138f JG	4713b7

0x471391 MOV	-0x128(%RBP),%RBX

0x471398 VMOVSD	(%RBX,%R10,8),%XMM11

0x47139e VMULSD	%XMM0,%XMM11,%XMM12

0x4713a2 VCOMISD	%XMM12,%XMM2

0x4713a7 JBE	4713b7

0x4713a9 LEA	(%RCX,%RSI,8),%R10

0x4713ad VFMADD213SD	(%R10),%XMM7,%XMM11

0x4713b2 VMOVSD	%XMM11,(%R10)

0x4713b7 INCQ	-0x158(%RBP)

0x4713be MOV	-0x108(%RBP),%R9

0x4713c5 MOV	-0x158(%RBP),%R8

0x4713cc MOV	-0x60(%RBP),%RBX

0x4713d0 MOV	(%R9,%R8,8),%RSI

0x4713d4 MOV	(%RBX,%RSI,8),%R10

0x4713d8 CMP	%R10,-0x78(%RBP)

0x4713dc JG	471404

0x4713de MOV	-0x128(%RBP),%R9

0x4713e5 VMOVSD	(%R9,%R8,8),%XMM15

0x4713eb VMULSD	%XMM0,%XMM15,%XMM8

0x4713ef VCOMISD	%XMM8,%XMM2

0x4713f4 JBE	471404

0x4713f6 LEA	(%RCX,%R10,8),%R8

0x4713fa VFMADD213SD	(%R8),%XMM7,%XMM15

0x4713ff VMOVSD	%XMM15,(%R8)

0x471404 INCQ	-0x158(%RBP)

0x47140b MOV	-0x108(%RBP),%RSI

0x471412 MOV	-0x158(%RBP),%R10

0x471419 MOV	-0x60(%RBP),%RBX

0x47141d MOV	(%RSI,%R10,8),%R9

0x471421 MOV	(%RBX,%R9,8),%R8

0x471425 CMP	%R8,-0x78(%RBP)

0x471429 JG	471450

0x47142b MOV	-0x128(%RBP),%RSI

0x471432 VMOVSD	(%RSI,%R10,8),%XMM13

0x471438 VMULSD	%XMM0,%XMM13,%XMM3

0x47143c VCOMISD	%XMM3,%XMM2

0x471440 JBE	471450

0x471442 LEA	(%RCX,%R8,8),%R10

0x471446 VFMADD213SD	(%R10),%XMM7,%XMM13

0x47144b VMOVSD	%XMM13,(%R10)

0x471450 INCQ	-0x158(%RBP)

0x471457 MOV	-0x108(%RBP),%R9

0x47145e MOV	-0x158(%RBP),%R8

0x471465 MOV	-0x60(%RBP),%RBX

0x471469 MOV	(%R9,%R8,8),%RSI

0x47146d MOV	(%RBX,%RSI,8),%R10

0x471471 CMP	%R10,-0x78(%RBP)

0x471475 JG	47149c

0x471477 MOV	-0x128(%RBP),%R9

0x47147e VMOVSD	(%R9,%R8,8),%XMM14

0x471484 VMULSD	%XMM0,%XMM14,%XMM4

0x471488 VCOMISD	%XMM4,%XMM2

0x47148c JBE	47149c

0x47148e LEA	(%RCX,%R10,8),%R8

0x471492 VFMADD213SD	(%R8),%XMM7,%XMM14

0x471497 VMOVSD	%XMM14,(%R8)

0x47149c INCQ	-0x158(%RBP)

0x4714a3 MOV	-0x108(%RBP),%RSI

0x4714aa MOV	-0x158(%RBP),%R10

0x4714b1 MOV	-0x60(%RBP),%RBX

0x4714b5 MOV	(%RSI,%R10,8),%R9

0x4714b9 MOV	(%RBX,%R9,8),%R8

0x4714bd CMP	%R8,-0x78(%RBP)

0x4714c1 JG	4714e9

0x4714c3 MOV	-0x128(%RBP),%RSI

0x4714ca VMOVSD	(%RSI,%R10,8),%XMM9

0x4714d0 VMULSD	%XMM0,%XMM9,%XMM11

0x4714d4 VCOMISD	%XMM11,%XMM2

0x4714d9 JBE	4714e9

0x4714db LEA	(%RCX,%R8,8),%R10

0x4714df VFMADD213SD	(%R10),%XMM7,%XMM9

0x4714e4 VMOVSD	%XMM9,(%R10)

0x4714e9 INCQ	-0x158(%RBP)

0x4714f0 MOV	-0x108(%RBP),%R9

0x4714f7 MOV	-0x158(%RBP),%R8

0x4714fe MOV	-0x60(%RBP),%RBX

0x471502 MOV	(%R9,%R8,8),%RSI

0x471506 MOV	(%RBX,%RSI,8),%R10

0x47150a CMP	%R10,-0x78(%RBP)

0x47150e JG	471536

0x471510 MOV	-0x128(%RBP),%R9

0x471517 VMOVSD	(%R9,%R8,8),%XMM12

0x47151d VMULSD	%XMM0,%XMM12,%XMM15

0x471521 VCOMISD	%XMM15,%XMM2

0x471526 JBE	471536

0x471528 LEA	(%RCX,%R10,8),%R8

0x47152c VFMADD213SD	(%R8),%XMM7,%XMM12

0x471531 VMOVSD	%XMM12,(%R8)

0x471536 INCQ	-0x158(%RBP)

0x47153d MOV	-0x108(%RBP),%RSI

0x471544 MOV	-0x158(%RBP),%R10

0x47154b MOV	-0x60(%RBP),%RBX

0x47154f MOV	(%RSI,%R10,8),%R9

0x471553 MOV	(%RBX,%R9,8),%R8

0x471557 CMP	%R8,-0x78(%RBP)

0x47155b JLE	4719dd

0x471561 INCQ	-0x158(%RBP)

0x471568 MOV	-0x160(%RBP),%RBX

0x47156f MOV	-0x158(%RBP),%R9

0x471576 MOV	%R9,%R10

0x471579 CMP	%RBX,%R9

0x47157c JE	46f52a

0x471582 MOV	%R13,-0xd0(%RBP)

0x471589 MOV	%RAX,-0x100(%RBP)

0x471590 MOV	-0x60(%RBP),%R8

0x471594 MOV	-0x108(%RBP),%R9

0x47159b MOV	-0x78(%RBP),%RBX

0x47159f MOV	-0x128(%RBP),%RAX

  (718) 0x4715a6 MOV	(%R9,%R10,8),%R13

  (718) 0x4715aa MOV	(%R8,%R13,8),%RSI

  (718) 0x4715ae CMP	%RSI,%RBX

  (718) 0x4715b1 JG	4715d4

  (718) 0x4715b3 VMOVSD	(%RAX,%R10,8),%XMM3

  (718) 0x4715b9 VMULSD	%XMM0,%XMM3,%XMM14

  (718) 0x4715bd VCOMISD	%XMM14,%XMM2

  (718) 0x4715c2 JBE	4715d4

  (718) 0x4715c4 LEA	(%RCX,%RSI,8),%R13

  (718) 0x4715c8 VFMADD213SD	(%R13),%XMM7,%XMM3

  (718) 0x4715ce VMOVSD	%XMM3,(%R13)

  (718) 0x4715d4 LEA	0x1(%R10),%RSI

  (718) 0x4715d8 MOV	(%R9,%RSI,8),%R10

  (718) 0x4715dc MOV	(%R8,%R10,8),%R13

  (718) 0x4715e0 CMP	%R13,%RBX

  (718) 0x4715e3 JG	471603

  (718) 0x4715e5 VMOVSD	(%RAX,%RSI,8),%XMM4

  (718) 0x4715ea VMULSD	%XMM0,%XMM4,%XMM9

  (718) 0x4715ee VCOMISD	%XMM9,%XMM2

  (718) 0x4715f3 JBE	471603

  (718) 0x4715f5 LEA	(%RCX,%R13,8),%R10

  (718) 0x4715f9 VFMADD213SD	(%R10),%XMM7,%XMM4

  (718) 0x4715fe VMOVSD	%XMM4,(%R10)

  (718) 0x471603 LEA	0x1(%RSI),%R10

  (718) 0x471607 MOV	(%R9,%R10,8),%R13

  (718) 0x47160b MOV	(%R8,%R13,8),%R13

  (718) 0x47160f CMP	%R13,%RBX

  (718) 0x471612 JG	471633

  (718) 0x471614 VMOVSD	(%RAX,%R10,8),%XMM11

  (718) 0x47161a VMULSD	%XMM0,%XMM11,%XMM12

  (718) 0x47161e VCOMISD	%XMM12,%XMM2

  (718) 0x471623 JBE	471633

  (718) 0x471625 LEA	(%RCX,%R13,8),%R10

  (718) 0x471629 VFMADD213SD	(%R10),%XMM7,%XMM11

  (718) 0x47162e VMOVSD	%XMM11,(%R10)

  (718) 0x471633 LEA	0x2(%RSI),%R10

  (718) 0x471637 MOV	(%R9,%R10,8),%R13

  (718) 0x47163b MOV	(%R8,%R13,8),%R13

  (718) 0x47163f CMP	%R13,%RBX

  (718) 0x471642 JG	471663

  (718) 0x471644 VMOVSD	(%RAX,%R10,8),%XMM15

  (718) 0x47164a VMULSD	%XMM0,%XMM15,%XMM13

  (718) 0x47164e VCOMISD	%XMM13,%XMM2

  (718) 0x471653 JBE	471663

  (718) 0x471655 LEA	(%RCX,%R13,8),%R10

  (718) 0x471659 VFMADD213SD	(%R10),%XMM7,%XMM15

  (718) 0x47165e VMOVSD	%XMM15,(%R10)

  (718) 0x471663 LEA	0x3(%RSI),%R10

  (718) 0x471667 MOV	(%R9,%R10,8),%R13

  (718) 0x47166b MOV	(%R8,%R13,8),%R13

  (718) 0x47166f CMP	%R13,%RBX

  (718) 0x471672 JG	471693

  (718) 0x471674 VMOVSD	(%RAX,%R10,8),%XMM3

  (718) 0x47167a VMULSD	%XMM0,%XMM3,%XMM8

  (718) 0x47167e VCOMISD	%XMM8,%XMM2

  (718) 0x471683 JBE	471693

  (718) 0x471685 LEA	(%RCX,%R13,8),%R10

  (718) 0x471689 VFMADD213SD	(%R10),%XMM7,%XMM3

  (718) 0x47168e VMOVSD	%XMM3,(%R10)

  (718) 0x471693 LEA	0x4(%RSI),%R10

  (718) 0x471697 MOV	(%R9,%R10,8),%R13

  (718) 0x47169b MOV	(%R8,%R13,8),%R13

  (718) 0x47169f CMP	%R13,%RBX

  (718) 0x4716a2 JG	4716c2

  (718) 0x4716a4 VMOVSD	(%RAX,%R10,8),%XMM14

  (718) 0x4716aa VMULSD	%XMM0,%XMM14,%XMM4

  (718) 0x4716ae VCOMISD	%XMM4,%XMM2

  (718) 0x4716b2 JBE	4716c2

  (718) 0x4716b4 LEA	(%RCX,%R13,8),%R10

  (718) 0x4716b8 VFMADD213SD	(%R10),%XMM7,%XMM14

  (718) 0x4716bd VMOVSD	%XMM14,(%R10)

  (718) 0x4716c2 LEA	0x5(%RSI),%R10

  (718) 0x4716c6 MOV	(%R9,%R10,8),%R13

  (718) 0x4716ca MOV	(%R8,%R13,8),%R13

  (718) 0x4716ce CMP	%R13,%RBX

  (718) 0x4716d1 JG	4716f2

  (718) 0x4716d3 VMOVSD	(%RAX,%R10,8),%XMM9

  (718) 0x4716d9 VMULSD	%XMM0,%XMM9,%XMM11

  (718) 0x4716dd VCOMISD	%XMM11,%XMM2

  (718) 0x4716e2 JBE	4716f2

  (718) 0x4716e4 LEA	(%RCX,%R13,8),%R10

  (718) 0x4716e8 VFMADD213SD	(%R10),%XMM7,%XMM9

  (718) 0x4716ed VMOVSD	%XMM9,(%R10)

  (718) 0x4716f2 LEA	0x6(%RSI),%R10

  (718) 0x4716f6 MOV	(%R9,%R10,8),%R13

  (718) 0x4716fa MOV	(%R8,%R13,8),%R13

  (718) 0x4716fe CMP	%R13,%RBX

  (718) 0x471701 JG	471722

  (718) 0x471703 VMOVSD	(%RAX,%R10,8),%XMM12

  (718) 0x471709 VMULSD	%XMM0,%XMM12,%XMM15

  (718) 0x47170d VCOMISD	%XMM15,%XMM2

  (718) 0x471712 JBE	471722

  (718) 0x471714 LEA	(%RCX,%R13,8),%R10

  (718) 0x471718 VFMADD213SD	(%R10),%XMM7,%XMM12

  (718) 0x47171d VMOVSD	%XMM12,(%R10)

  (718) 0x471722 LEA	0x7(%RSI),%R10

  (718) 0x471726 MOV	-0x160(%RBP),%RSI

  (718) 0x47172d CMP	%RSI,%R10

  (718) 0x471730 JNE	4715a6

0x471736 MOV	-0xd0(%RBP),%R13

0x47173d MOV	-0x100(%RBP),%RAX

0x471744 JMP	46f52a

0x471749 MOV	-0x48(%RBP),%R9

0x47174d LEA	(%R9,%RCX,8),%RCX

0x471751 VFMADD213SD	(%RCX),%XMM7,%XMM13

0x471756 VMOVSD	%XMM13,(%RCX)

0x47175a CMP	%RAX,-0x100(%RBP)

0x471761 JNE	470fc7

0x471767 VMOVSD	(%R15,%RBX,8),%XMM14

0x47176d VMULSD	%XMM0,%XMM14,%XMM4

0x471771 VCOMISD	%XMM4,%XMM2

0x471775 JBE	470fc7

0x47177b VFMADD231SD	%XMM14,%XMM7,%XMM1

0x471780 JMP	470fc7

0x4717c1 MOV	-0x48(%RBP),%RCX

0x4717c5 LEA	(%RCX,%RBX,8),%RBX

0x4717c9 VFMADD213SD	(%RBX),%XMM7,%XMM4

0x4717ce VMOVSD	%XMM4,(%RBX)

0x4717d2 CMP	%RAX,%R10

0x4717d5 JNE	47107d

0x4717db VMOVSD	(%R15,%R9,8),%XMM11

0x4717e1 VMULSD	%XMM0,%XMM11,%XMM8

0x4717e5 VCOMISD	%XMM8,%XMM2

0x4717ea JBE	47107d

0x4717f0 VFMADD231SD	%XMM11,%XMM7,%XMM1

0x4717f5 JMP	47107d

0x4717fa MOV	-0x38(%RBP),%R9

0x4717fe CMPQ	$0x1,-0xa8(%RBP)

0x471806 VMOVSD	(%R15,%R9,8),%XMM13

0x47180c JG	470598

0x471812 VXORPD	%XMM2,%XMM2,%XMM2

0x471816 VCOMISD	%XMM2,%XMM5

0x47181a JE	46fabe

0x471820 JMP	46f52a

  (719) 0x471825 MOV	-0x48(%RBP),%RBX

  (719) 0x471829 LEA	(%RBX,%RCX,8),%R10

  (719) 0x47182d VFMADD213SD	(%R10),%XMM7,%XMM12

  (719) 0x471832 VMOVSD	%XMM12,(%R10)

  (719) 0x471837 JMP	47115b

0x4719b0 MOV	-0x128(%RBP),%RCX

0x4719b7 MOV	-0x100(%RBP),%R10

0x4719be VMOVSD	(%RCX,%R10,8),%XMM8

0x4719c4 VMULSD	%XMM0,%XMM8,%XMM9

0x4719c8 VCOMISD	%XMM9,%XMM15

0x4719cd JBE	47067c

0x4719d3 VADDSD	%XMM8,%XMM2,%XMM2

0x4719d8 JMP	47067c

0x4719dd MOV	-0x128(%RBP),%RSI

0x4719e4 VMOVSD	(%RSI,%R10,8),%XMM13

0x4719ea VMULSD	%XMM0,%XMM13,%XMM8

0x4719ee VCOMISD	%XMM8,%XMM2

0x4719f3 JBE	471561

0x4719f9 LEA	(%RCX,%R8,8),%R10

0x4719fd VFMADD213SD	(%R10),%XMM7,%XMM13

0x471a02 VMOVSD	%XMM13,(%R10)

0x471a07 JMP	471561

0x471a50 VADDSD	%XMM3,%XMM2,%XMM2

0x471a54 JMP	470710

0x471a59 VMOVSD	(%R15,%R9,8),%XMM3

0x471a5f VMULSD	%XMM0,%XMM3,%XMM14

0x471a63 VCOMISD	%XMM14,%XMM2

0x471a68 JBE	471053

0x471a6e VFMADD231SD	%XMM3,%XMM7,%XMM1

0x471a73 JMP	471053

0x471a78 VADDSD	%XMM11,%XMM2,%XMM2

0x471a7d JMP	4706c6

0x471aca VXORPD	%XMM14,%XMM14,%XMM14

0x471acf VCOMISD	%XMM14,%XMM2

0x471ad4 JE	46fabe

0x471ada MOV	-0xd0(%RBP),%R10

0x471ae1 VDIVSD	%XMM2,%XMM13,%XMM7

0x471ae5 CMP	%R10,%RBX

0x471ae8 JL	470f82

0x471aee JMP	46f52a

0x471b17 MOV	-0x48(%RBP),%RCX

0x471b1b LEA	(%RCX,%R10,8),%R10

0x471b1f VFMADD213SD	(%R10),%XMM7,%XMM9

0x471b24 VMOVSD	%XMM9,(%R10)

0x471b29 CMP	%RAX,%RBX

0x471b2c JNE	471017

0x471b32 VMOVSD	(%R15,%R9,8),%XMM11

0x471b38 VMULSD	%XMM0,%XMM11,%XMM12

0x471b3c VCOMISD	%XMM12,%XMM2

0x471b41 JBE	471017

0x471b47 VFMADD231SD	%XMM11,%XMM7,%XMM1

0x471b4c JMP	471017

/home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c: 1609 - 1675

--------------------------------------------------------------------------------

1609:            for (jj = A_diag_i[i]+1; jj < A_diag_i[i+1]; jj++)

1610:            { /* i1 is a c-point and strongly influences i, accumulate

1611:               * a_(i,i1) into interpolation weight */

1612:              i1 = A_diag_j[jj];

1613:              if (P_marker[i1] >= jj_begin_row)

1614:              {

1615:                P_diag_data[P_marker[i1]] += A_diag_data[jj];

1616:              }

1617:              else if(P_marker[i1] == strong_f_marker)

1618:              {

1619:                sum = zero;

1620:                sgn = 1;

1621:                if(A_diag_data[A_diag_i[i1]] < 0) sgn = -1;

1622:                /* Loop over row of A for point i1 and calculate the sum

1623:                 * of the connections to c-points that strongly influence i. */

1624:                for(jj1 = A_diag_i[i1]+1; jj1 < A_diag_i[i1+1]; jj1++)

1625:                {

1626:                  i2 = A_diag_j[jj1];

1627:                  if((P_marker[i2] >= jj_begin_row || i2 == i) && (sgn*A_diag_data[jj1]) < 0)

1628:                    sum += A_diag_data[jj1];

1629:                }

1630:                if(num_procs > 1)

1631:                {

1632:                  for(jj1 = A_offd_i[i1]; jj1< A_offd_i[i1+1]; jj1++)

1633:                  {

1634:                    i2 = A_offd_j[jj1];

1635:                    if(P_marker_offd[i2] >= jj_begin_row_offd &&

1636:                       (sgn*A_offd_data[jj1]) < 0)

1637:                       sum += A_offd_data[jj1];

1638:                  }

1639:                }

1640:                if(sum != 0)

1641:                {

1642:                  distribute = A_diag_data[jj]/sum;

1643:                  /* Loop over row of A for point i1 and do the distribution */

1644:                  for(jj1 = A_diag_i[i1]+1; jj1 < A_diag_i[i1+1]; jj1++)

1645:                  {

1646:                    i2 = A_diag_j[jj1];

1647:                    if(P_marker[i2] >= jj_begin_row && (sgn*A_diag_data[jj1]) < 0)

1648:                       P_diag_data[P_marker[i2]] +=

1649:                       distribute*A_diag_data[jj1];

1650:                        if(i2 == i && (sgn*A_diag_data[jj1]) < 0)

1651:                          diagonal += distribute*A_diag_data[jj1];

1652:                  }

1653:                  if(num_procs > 1)

1654:                  {

1655:                    for(jj1 = A_offd_i[i1]; jj1 < A_offd_i[i1+1]; jj1++)

1656:                    {

1657:                      i2 = A_offd_j[jj1];

1658:                      if(P_marker_offd[i2] >= jj_begin_row_offd &&

1659:                                 (sgn*A_offd_data[jj1]) < 0)

1660:                        P_offd_data[P_marker_offd[i2]] +=

[...]

1667:                  diagonal += A_diag_data[jj];

1668:                }

1669:              }

1670:              /* neighbor i1 weakly influences i, accumulate a_(i,i1) into

1671:               * diagonal */

1672:              else if (CF_marker[i1] != -3)

1673:              {

1674:                if(num_functions == 1 || dof_func[i] == dof_func[i1])

1675:                  diagonal += A_diag_data[jj];

Coverage (%)	Name	Source Location	Module
○98.73	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○1.27	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0

Path /

Metric	Value
CQA speedup if no scalar integer	1.51
CQA speedup if FP arith vectorized	2.47
CQA speedup if fully vectorized	8.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.23
Bottlenecks	micro-operation queue,
Function	hypre_BoomerAMGBuildExtPIInterp._omp_fn.0
Source	par_lr_interp.c:1609-1609,par_lr_interp.c:1613-1621,par_lr_interp.c:1624-1632,par_lr_interp.c:1635-1637,par_lr_interp.c:1640-1655,par_lr_interp.c:1658-1660,par_lr_interp.c:1667-1667,par_lr_interp.c:1672-1675
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	98.67
CQA cycles if no scalar integer	65.50
CQA cycles if FP arith vectorized	39.98
CQA cycles if fully vectorized	12.33
Front-end cycles	98.67
P0 cycles	65.50
P1 cycles	47.40
P2 cycles	80.33
P3 cycles	80.33
P4 cycles	22.00
P5 cycles	47.20
P6 cycles	65.50
P7 cycles	22.00
P8 cycles	22.00
P9 cycles	22.00
P10 cycles	47.40
P11 cycles	80.33
DIV/SQRT cycles	12.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	548.00
Nb uops	579.00
Nb loads	241.00
Nb stores	44.00
Nb stack references	20.00
FLOP/cycle	0.72
Nb FLOP add-sub	13.00
Nb FLOP mul	25.00
Nb FLOP fma	15.00
Nb FLOP div	3.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	23.11
Bytes prefetched	0.00
Bytes loaded	1928.00
Bytes stored	352.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	3.85
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	0.00
Vectorization ratio add_sub	0.00
Vectorization ratio fma	0.00
Vectorization ratio div_sqrt	0.00
Vectorization ratio other	8.74
Vector-efficiency ratio all	12.98
Vector-efficiency ratio load	12.50
Vector-efficiency ratio store	12.50
Vector-efficiency ratio mul	12.50
Vector-efficiency ratio add_sub	12.50
Vector-efficiency ratio fma	12.50
Vector-efficiency ratio div_sqrt	12.50
Vector-efficiency ratio other	13.59

Metric	Value
CQA speedup if no scalar integer	1.51
CQA speedup if FP arith vectorized	2.47
CQA speedup if fully vectorized	8.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.23
Bottlenecks	micro-operation queue,
Function	hypre_BoomerAMGBuildExtPIInterp._omp_fn.0
Source	par_lr_interp.c:1609-1609,par_lr_interp.c:1613-1621,par_lr_interp.c:1624-1632,par_lr_interp.c:1635-1637,par_lr_interp.c:1640-1655,par_lr_interp.c:1658-1660,par_lr_interp.c:1667-1667,par_lr_interp.c:1672-1675
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	98.67
CQA cycles if no scalar integer	65.50
CQA cycles if FP arith vectorized	39.98
CQA cycles if fully vectorized	12.33
Front-end cycles	98.67
P0 cycles	65.50
P1 cycles	47.40
P2 cycles	80.33
P3 cycles	80.33
P4 cycles	22.00
P5 cycles	47.20
P6 cycles	65.50
P7 cycles	22.00
P8 cycles	22.00
P9 cycles	22.00
P10 cycles	47.40
P11 cycles	80.33
DIV/SQRT cycles	12.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	548.00
Nb uops	579.00
Nb loads	241.00
Nb stores	44.00
Nb stack references	20.00
FLOP/cycle	0.72
Nb FLOP add-sub	13.00
Nb FLOP mul	25.00
Nb FLOP fma	15.00
Nb FLOP div	3.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	23.11
Bytes prefetched	0.00
Bytes loaded	1928.00
Bytes stored	352.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	3.85
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	0.00
Vectorization ratio add_sub	0.00
Vectorization ratio fma	0.00
Vectorization ratio div_sqrt	0.00
Vectorization ratio other	8.74
Vector-efficiency ratio all	12.98
Vector-efficiency ratio load	12.50
Vector-efficiency ratio store	12.50
Vector-efficiency ratio mul	12.50
Vector-efficiency ratio add_sub	12.50
Vector-efficiency ratio fma	12.50
Vector-efficiency ratio div_sqrt	12.50
Vector-efficiency ratio other	13.59

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	hypre_BoomerAMGBuildExtPIInterp._omp_fn.0
Source file and lines	par_lr_interp.c:1609-1675
Module	exec

The loop is defined in /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1609-1660,1667-1675.

Analyzed code is defined in /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1609,1613-1621,1624-1632,1635-1637,1640-1655,1658-1660,1667,1672-1675.

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Failed to get the number of paths (too many, greater than internal limit = 100000)
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is very high. Force analysis with --force-loop-streams-analysis: expect potentially high RAM/CPU footprint

Try to simplify control.

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 98.67 to 65.50 cycles (1.51x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your loop is probably not vectorized. Only 12% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your loop, you can lower the cost of an iteration from 98.67 to 12.33 cycles (8.00x speedup).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

FMA

Detected 15 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible. For instance a + b*c is a valid FMA (MUL then ADD). However (a+b)* c cannot be translated into an FMA (ADD then MUL).

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

INC: 15 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1609
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1609
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1632
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1632
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1632
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1632
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1632
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1632
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1655
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1655
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1655
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1655
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1655
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1655
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1655
VCOMISD: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1621

Type of elements and instruction set

86 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 71 FP arithmetical operations:

28: addition or subtraction (15 inside FMA instructions)
40: multiply (15 inside FMA instructions)
3: divide

The binary loop is loading 1928 bytes (241 double precision FP elements). The binary loop is storing 352 bytes (44 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.03 FP operations per loaded or stored byte.

General properties

nb instructions	548
nb uops	579
loop length	2676
used x86 registers	15
used mmx registers	0
used xmm registers	15
used ymm registers	0
used zmm registers	0
nb stack references	20
ADD-SUB / MUL ratio	0.52

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	98.67 cycles
front end	98.67 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	65.50	47.40	80.33	80.33	22.00	47.20	65.50	22.00	22.00	22.00	47.40	80.33
cycles	65.50	47.40	80.33	80.33	22.00	47.20	65.50	22.00	22.00	22.00	47.40	80.33

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

12.00

Cycles summary

Front-end	98.67
Dispatch	80.33
DIV/SQRT	12.00
Overall L1	98.67

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	6%
load	0%
store	0%
mul	0%
add-sub	0%
fma	0%
div/sqrt	0%
other	23%

INT+FP

all	3%
load	0%
store	0%
mul	0%
add-sub	0%
fma	0%
div/sqrt	0%
other	8%

Vector efficiency ratios

INT

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	12%

all	13%
load	12%
store	12%
mul	12%
add-sub	12%
fma	12%
div/sqrt	12%
other	15%

INT+FP

all	12%
load	12%
store	12%
mul	12%
add-sub	12%
fma	12%
div/sqrt	12%
other	13%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 98.67 cycles. At this rate:

10% of peak load performance is reached (19.54 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (3.57 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 98.67 to 80.33 cycles (1.23x speedup).

ASM code

In the binary file, the address of the loop is: 46f537

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
MOV -0x48(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x38(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R8,%RCX,8),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VMOVSD (%RCX),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VADDSD (%R15,%R9,8),%XMM0,%XMM7	1	0	0.50	0.33	0.33	0	0.50	0	0	0	0	0	0.33	3	0.50	scal (12.5%)
VMOVSD %XMM7,(%RCX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INCQ -0x38(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x38(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %R11,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 46f598 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xe28>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RDI,%RBX,8),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R13,%RSI,8),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (,%RSI,8),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RCX,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JLE 46f510 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xda0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %R12,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 46f8f0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1180>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMPQ $-0x3,(%R14,%RSI,8)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 46f52a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xdba>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMPQ $0x1,-0xb0(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 46f57c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xe0c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0xe8(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R8,%RSI,8),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %R10,(%R8,%RAX,8)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JNE 46f52a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xdba>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INCQ -0x38(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
VADDSD (%R15,%RSI,8),%XMM1,%XMM1	1	0	0.50	0.33	0.33	0	0.50	0	0	0	0	0	0.33	3	0.50	scal (12.5%)
MOV -0x38(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %R11,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JNE 46f537 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xdc7>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0xc0(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD 0xeae09(%RIP),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV (%R9,%RSI,8),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VCOMISD (%R15,%RBX,8),%XMM10	2	1	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	1	scal (12.5%)
JA 46f913 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x11a3>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VMOVSD 0xeae05(%RIP),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0xc0(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA 0x1(%RBX),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x8(%RCX,%R8,1),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RBX,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R10,-0xd0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVAPD %XMM5,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
CMP %R10,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 4717fa <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x308a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
SUB %RBX,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R10,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VXORPD %XMM3,%XMM3,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
AND $0x3,%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
JE 46f9e3 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1273>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x1,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 46f9aa <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x123a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x2,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 46f982 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1212>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV (%RDI,%RBX,8),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP (%R13,%R10,8),%RDX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JLE 46f969 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x11f9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RAX,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JNE 46f97e <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x120e>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VMOVSD (%R15,%RBX,8),%XMM7	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM7,%XMM8	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM8,%XMM3	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 46f97e <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x120e>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VADDSD %XMM7,%XMM5,%XMM2	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
LEA 0x1(%RBX),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV (%RDI,%R9,8),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP (%R13,%RCX,8),%RDX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JLE 46f992 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1222>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RAX,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JNE 46f9a7 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1237>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VMOVSD (%R15,%R9,8),%XMM9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM9,%XMM11	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM11,%XMM3	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JA 4711af <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2a3f>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INC %R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%RDI,%R9,8),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP (%R13,%R10,8),%RDX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JLE 46f9ba <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x124a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RAX,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JNE 46f9d0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1260>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VMOVSD (%R15,%R9,8),%XMM12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM12,%XMM13	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM13,%XMM3	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 46f9d0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1260>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VADDSD %XMM12,%XMM2,%XMM2	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
MOV -0xd0(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RCX,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 46fa98 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1328>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMPQ $0x1,-0xa8(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
VMOVSD (%R15,%R9,8),%XMM13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JG 470598 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1e28>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VXORPD %XMM3,%XMM3,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VCOMISD %XMM3,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JNE 470f7e <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x280e>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VADDSD %XMM13,%XMM1,%XMM1	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
JMP 46f52a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xdba>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV -0x148(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RCX,%RSI,8),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x8(%RCX,%R8,1),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R10,-0x158(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R9,-0x160(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMP %R9,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 471aca <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x335a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
SUB %R10,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R10,-0x100(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VXORPD %XMM15,%XMM15,%XMM15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
AND $0x7,%R9D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
JE 4707cd <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x205d>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x1,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 47078b <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x201b>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x2,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 470760 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ff0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x3,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 470717 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1fa7>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x4,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 4706cd <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f5d>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x5,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 470683 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f13>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x6,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 470658 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ee8>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x108(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RCX,%R10,8),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x78(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP (%RCX,%R9,8),%R10	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JG 470647 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ed7>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x128(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x158(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%R9,%RCX,8),%XMM4	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM4,%XMM7	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM7,%XMM15	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 470647 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ed7>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VADDSD %XMM4,%XMM2,%XMM2	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
MOV -0x158(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R10,-0x100(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x108(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R9,%RCX,8),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x78(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP (%R10,%RCX,8),%R9	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JLE 4719b0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3240>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INCQ -0x100(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x108(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R9,%RCX,8),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x78(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP (%R10,%RCX,8),%R9	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JG 4706c6 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f56>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x128(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%RCX,%R10,8),%XMM11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM11,%XMM12	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM12,%XMM15	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JA 471a78 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3308>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INCQ -0x100(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x108(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R9,%RCX,8),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x78(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP (%R10,%RCX,8),%R9	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JG 470710 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1fa0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x128(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%RCX,%R10,8),%XMM3	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM3,%XMM14	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM14,%XMM15	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JA 471a50 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x32e0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INCQ -0x100(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x108(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R9,%RCX,8),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x78(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP (%R10,%RCX,8),%R9	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JG 470759 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1fe9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x128(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%RCX,%R10,8),%XMM4	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM4,%XMM7	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM7,%XMM15	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 470759 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1fe9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VADDSD %XMM4,%XMM2,%XMM2	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
INCQ -0x100(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x108(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R9,%RCX,8),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x78(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP (%R10,%RCX,8),%R9	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JLE 4711bc <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2a4c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INCQ -0x100(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x108(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R9,%RCX,8),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x78(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP (%R10,%RCX,8),%R9	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JLE 471182 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2a12>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INCQ -0x100(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x160(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %R9,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 470970 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2200>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RDX,-0x190(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDI,-0x170(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R15,-0x180(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R14,-0x188(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RAX,-0x100(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R10,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R13,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x60(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x108(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x78(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x158(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x128(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R10,-0x158(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R15,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x170(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x180(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x188(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x190(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0x100(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VXORPD %XMM15,%XMM15,%XMM15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VCOMISD %XMM15,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JE 46fabe <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x134e>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0xd0(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VDIVSD %XMM2,%XMM13,%XMM7	1	1	0	0	0	0	0	0	0	0	0	0	0	13-15	4	scal (12.5%)
CMP %R10,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JL 470f82 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2812>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x160(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x158(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JMP 471316 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2ba6>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
VDIVSD %XMM2,%XMM13,%XMM7	1	1	0	0	0	0	0	0	0	0	0	0	0	13-15	4	scal (12.5%)
MOV -0xd0(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RDI,%RBX,8),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RBX,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOT %R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RCX,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV (%R13,%R9,8),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R9,-0x100(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VXORPD %XMM2,%XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
AND $0x3,%R10D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
CMP %RCX,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JG 47175a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2fea>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VMOVSD (%R15,%RBX,8),%XMM13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM13,%XMM3	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM3,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JA 471749 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2fd9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA 0x1(%RBX),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0xd0(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RBX,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 4712e7 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2b77>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
TEST %R10,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 471090 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2920>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x1,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 471056 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x28e6>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x2,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 47101a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x28aa>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV (%RDI,%R9,8),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R13,%RBX,8),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %R10,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JG 471b29 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x33b9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VMOVSD (%R15,%R9,8),%XMM9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM9,%XMM8	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM8,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JA 471b17 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x33a7>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INC %R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%RDI,%R9,8),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R13,%R10,8),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RBX,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JG 47104a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x28da>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VMOVSD (%R15,%R9,8),%XMM15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM15,%XMM13	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM13,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 471053 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x28e3>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x48(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RCX,%RBX,8),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VFMADD213SD (%RBX),%XMM7,%XMM15	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM15,(%RBX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMP %RAX,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 471a59 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x32e9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INC %R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%RDI,%R9,8),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R13,%R10,8),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RBX,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JG 4717d2 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3062>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VMOVSD (%R15,%R9,8),%XMM4	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM4,%XMM9	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM9,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JA 4717c1 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3051>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0xd0(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %R10,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 4712e7 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2b77>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RSI,-0x100(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 471149 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x29d9>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV -0x128(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%RCX,%R10,8),%XMM11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM11,%XMM12	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM12,%XMM15	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 4707af <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x203f>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VADDSD %XMM11,%XMM2,%XMM2	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
JMP 4707af <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x203f>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
VADDSD %XMM9,%XMM2,%XMM2	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
INC %R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 46f9aa <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x123a>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV -0x128(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%RCX,%R10,8),%XMM8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM8,%XMM9	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM9,%XMM15	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 470784 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2014>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VADDSD %XMM8,%XMM2,%XMM2	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
JMP 470784 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2014>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV -0x100(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMPQ $0x1,-0xa8(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JLE 46f52a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xdba>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x148(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R10,%RSI,8),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x8(%R10,%R8,1),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R9,-0x158(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R8,-0x160(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R9,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %R8,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 46f52a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xdba>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0xf8(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
SUB %R10,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV 0xc8(%RBX),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R8,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VXORPD %XMM2,%XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
AND $0x7,%EBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
JE 471582 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2e12>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x1,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 47153d <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2dcd>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x2,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 4714f0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2d80>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x3,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 4714a3 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2d33>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x4,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 471457 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2ce7>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x5,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 47140b <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2c9b>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x6,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 4713be <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2c4e>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x108(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RSI,%R10,8),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R8,%R9,8),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RSI,-0x78(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JG 4713b7 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2c47>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x128(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%RBX,%R10,8),%XMM11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM11,%XMM12	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM12,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 4713b7 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2c47>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA (%RCX,%RSI,8),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VFMADD213SD (%R10),%XMM7,%XMM11	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM11,(%R10)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INCQ -0x158(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x108(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x158(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R9,%R8,8),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RBX,%RSI,8),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %R10,-0x78(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JG 471404 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2c94>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x128(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%R9,%R8,8),%XMM15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM15,%XMM8	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM8,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 471404 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2c94>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA (%RCX,%R10,8),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VFMADD213SD (%R8),%XMM7,%XMM15	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM15,(%R8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INCQ -0x158(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x108(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x158(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RSI,%R10,8),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RBX,%R9,8),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %R8,-0x78(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JG 471450 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2ce0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x128(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%RSI,%R10,8),%XMM13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM13,%XMM3	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM3,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 471450 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2ce0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA (%RCX,%R8,8),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VFMADD213SD (%R10),%XMM7,%XMM13	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM13,(%R10)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INCQ -0x158(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x108(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x158(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R9,%R8,8),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RBX,%RSI,8),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %R10,-0x78(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JG 47149c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2d2c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x128(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%R9,%R8,8),%XMM14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM14,%XMM4	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM4,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 47149c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2d2c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA (%RCX,%R10,8),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VFMADD213SD (%R8),%XMM7,%XMM14	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM14,(%R8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INCQ -0x158(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x108(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x158(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RSI,%R10,8),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RBX,%R9,8),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %R8,-0x78(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JG 4714e9 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2d79>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x128(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%RSI,%R10,8),%XMM9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM9,%XMM11	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM11,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 4714e9 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2d79>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA (%RCX,%R8,8),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VFMADD213SD (%R10),%XMM7,%XMM9	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM9,(%R10)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INCQ -0x158(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x108(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x158(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R9,%R8,8),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RBX,%RSI,8),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %R10,-0x78(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JG 471536 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2dc6>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x128(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%R9,%R8,8),%XMM12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM12,%XMM15	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM15,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 471536 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2dc6>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA (%RCX,%R10,8),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VFMADD213SD (%R8),%XMM7,%XMM12	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM12,(%R8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INCQ -0x158(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x108(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x158(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RSI,%R10,8),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RBX,%R9,8),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %R8,-0x78(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JLE 4719dd <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x326d>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INCQ -0x158(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x160(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x158(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R9,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RBX,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 46f52a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xdba>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R13,-0xd0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RAX,-0x100(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x60(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x108(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x78(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x128(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0xd0(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JMP 46f52a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xdba>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV -0x48(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R9,%RCX,8),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VFMADD213SD (%RCX),%XMM7,%XMM13	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM13,(%RCX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMP %RAX,-0x100(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JNE 470fc7 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2857>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VMOVSD (%R15,%RBX,8),%XMM14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM14,%XMM4	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM4,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 470fc7 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2857>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VFMADD231SD %XMM14,%XMM7,%XMM1	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
JMP 470fc7 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2857>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV -0x48(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RCX,%RBX,8),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VFMADD213SD (%RBX),%XMM7,%XMM4	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM4,(%RBX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMP %RAX,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JNE 47107d <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x290d>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VMOVSD (%R15,%R9,8),%XMM11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM11,%XMM8	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM8,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 47107d <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x290d>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VFMADD231SD %XMM11,%XMM7,%XMM1	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
JMP 47107d <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x290d>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV -0x38(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMPQ $0x1,-0xa8(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
VMOVSD (%R15,%R9,8),%XMM13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JG 470598 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1e28>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VXORPD %XMM2,%XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VCOMISD %XMM2,%XMM5	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JE 46fabe <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x134e>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
JMP 46f52a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xdba>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV -0x128(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%RCX,%R10,8),%XMM8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM8,%XMM9	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM9,%XMM15	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 47067c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f0c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VADDSD %XMM8,%XMM2,%XMM2	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
JMP 47067c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f0c>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV -0x128(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%RSI,%R10,8),%XMM13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM13,%XMM8	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM8,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 471561 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2df1>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA (%RCX,%R8,8),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VFMADD213SD (%R10),%XMM7,%XMM13	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM13,(%R10)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 471561 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2df1>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
VADDSD %XMM3,%XMM2,%XMM2	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
JMP 470710 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1fa0>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
VMOVSD (%R15,%R9,8),%XMM3	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM3,%XMM14	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM14,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 471053 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x28e3>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VFMADD231SD %XMM3,%XMM7,%XMM1	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
JMP 471053 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x28e3>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
VADDSD %XMM11,%XMM2,%XMM2	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
JMP 4706c6 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f56>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
VXORPD %XMM14,%XMM14,%XMM14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VCOMISD %XMM14,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JE 46fabe <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x134e>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0xd0(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VDIVSD %XMM2,%XMM13,%XMM7	1	1	0	0	0	0	0	0	0	0	0	0	0	13-15	4	scal (12.5%)
CMP %R10,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JL 470f82 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2812>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
JMP 46f52a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xdba>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV -0x48(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RCX,%R10,8),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VFMADD213SD (%R10),%XMM7,%XMM9	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM9,(%R10)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMP %RAX,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JNE 471017 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x28a7>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VMOVSD (%R15,%R9,8),%XMM11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM11,%XMM12	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM12,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 471017 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x28a7>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VFMADD231SD %XMM11,%XMM7,%XMM1	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
JMP 471017 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x28a7>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A

Function	hypre_BoomerAMGBuildExtPIInterp._omp_fn.0
Source file and lines	par_lr_interp.c:1609-1675
Module	exec

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Failed to get the number of paths (too many, greater than internal limit = 100000)
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is very high. Force analysis with --force-loop-streams-analysis: expect potentially high RAM/CPU footprint

Try to simplify control.

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

FMA

Detected 15 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

INC: 15 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1609
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1609
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1632
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1632
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1632
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1632
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1632
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1632
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1655
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1655
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1655
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1655
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1655
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1655
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1655
VCOMISD: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c:1621

Type of elements and instruction set

86 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 71 FP arithmetical operations:

28: addition or subtraction (15 inside FMA instructions)
40: multiply (15 inside FMA instructions)
3: divide

The binary loop is loading 1928 bytes (241 double precision FP elements). The binary loop is storing 352 bytes (44 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.03 FP operations per loaded or stored byte.

General properties

nb instructions	548
nb uops	579
loop length	2676
used x86 registers	15
used mmx registers	0
used xmm registers	15
used ymm registers	0
used zmm registers	0
nb stack references	20
ADD-SUB / MUL ratio	0.52

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	98.67 cycles
front end	98.67 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	65.50	47.40	80.33	80.33	22.00	47.20	65.50	22.00	22.00	22.00	47.40	80.33
cycles	65.50	47.40	80.33	80.33	22.00	47.20	65.50	22.00	22.00	22.00	47.40	80.33

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

12.00

Cycles summary

Front-end	98.67
Dispatch	80.33
DIV/SQRT	12.00
Overall L1	98.67

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	6%
load	0%
store	0%
mul	0%
add-sub	0%
fma	0%
div/sqrt	0%
other	23%

INT+FP

all	3%
load	0%
store	0%
mul	0%
add-sub	0%
fma	0%
div/sqrt	0%
other	8%

Vector efficiency ratios

INT

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	12%

all	13%
load	12%
store	12%
mul	12%
add-sub	12%
fma	12%
div/sqrt	12%
other	15%

INT+FP

all	12%
load	12%
store	12%
mul	12%
add-sub	12%
fma	12%
div/sqrt	12%
other	13%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 98.67 cycles. At this rate:

10% of peak load performance is reached (19.54 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (3.57 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the loop is: 46f537

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
MOV -0x48(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x38(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R8,%RCX,8),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VMOVSD (%RCX),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VADDSD (%R15,%R9,8),%XMM0,%XMM7	1	0	0.50	0.33	0.33	0	0.50	0	0	0	0	0	0.33	3	0.50	scal (12.5%)
VMOVSD %XMM7,(%RCX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INCQ -0x38(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x38(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %R11,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 46f598 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xe28>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RDI,%RBX,8),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R13,%RSI,8),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (,%RSI,8),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RCX,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JLE 46f510 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xda0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %R12,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 46f8f0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1180>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMPQ $-0x3,(%R14,%RSI,8)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 46f52a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xdba>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMPQ $0x1,-0xb0(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 46f57c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xe0c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0xe8(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R8,%RSI,8),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %R10,(%R8,%RAX,8)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JNE 46f52a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xdba>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INCQ -0x38(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
VADDSD (%R15,%RSI,8),%XMM1,%XMM1	1	0	0.50	0.33	0.33	0	0.50	0	0	0	0	0	0.33	3	0.50	scal (12.5%)
MOV -0x38(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %R11,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JNE 46f537 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xdc7>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0xc0(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD 0xeae09(%RIP),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV (%R9,%RSI,8),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VCOMISD (%R15,%RBX,8),%XMM10	2	1	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	1	scal (12.5%)
JA 46f913 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x11a3>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VMOVSD 0xeae05(%RIP),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0xc0(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA 0x1(%RBX),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x8(%RCX,%R8,1),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RBX,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R10,-0xd0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVAPD %XMM5,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
CMP %R10,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 4717fa <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x308a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
SUB %RBX,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R10,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VXORPD %XMM3,%XMM3,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
AND $0x3,%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
JE 46f9e3 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1273>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x1,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 46f9aa <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x123a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x2,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 46f982 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1212>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV (%RDI,%RBX,8),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP (%R13,%R10,8),%RDX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JLE 46f969 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x11f9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RAX,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JNE 46f97e <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x120e>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VMOVSD (%R15,%RBX,8),%XMM7	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM7,%XMM8	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM8,%XMM3	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 46f97e <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x120e>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VADDSD %XMM7,%XMM5,%XMM2	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
LEA 0x1(%RBX),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV (%RDI,%R9,8),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP (%R13,%RCX,8),%RDX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JLE 46f992 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1222>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RAX,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JNE 46f9a7 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1237>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VMOVSD (%R15,%R9,8),%XMM9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM9,%XMM11	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM11,%XMM3	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JA 4711af <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2a3f>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INC %R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%RDI,%R9,8),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP (%R13,%R10,8),%RDX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JLE 46f9ba <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x124a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RAX,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JNE 46f9d0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1260>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VMOVSD (%R15,%R9,8),%XMM12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM12,%XMM13	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM13,%XMM3	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 46f9d0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1260>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VADDSD %XMM12,%XMM2,%XMM2	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
MOV -0xd0(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RCX,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 46fa98 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1328>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMPQ $0x1,-0xa8(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
VMOVSD (%R15,%R9,8),%XMM13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JG 470598 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1e28>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VXORPD %XMM3,%XMM3,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VCOMISD %XMM3,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JNE 470f7e <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x280e>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VADDSD %XMM13,%XMM1,%XMM1	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
JMP 46f52a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xdba>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV -0x148(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RCX,%RSI,8),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x8(%RCX,%R8,1),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R10,-0x158(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R9,-0x160(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMP %R9,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 471aca <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x335a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
SUB %R10,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R10,-0x100(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VXORPD %XMM15,%XMM15,%XMM15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
AND $0x7,%R9D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
JE 4707cd <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x205d>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x1,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 47078b <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x201b>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x2,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 470760 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ff0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x3,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 470717 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1fa7>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x4,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 4706cd <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f5d>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x5,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 470683 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f13>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x6,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 470658 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ee8>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x108(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RCX,%R10,8),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x78(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP (%RCX,%R9,8),%R10	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JG 470647 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ed7>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x128(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x158(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%R9,%RCX,8),%XMM4	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM4,%XMM7	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM7,%XMM15	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 470647 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ed7>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VADDSD %XMM4,%XMM2,%XMM2	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
MOV -0x158(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R10,-0x100(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x108(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R9,%RCX,8),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x78(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP (%R10,%RCX,8),%R9	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JLE 4719b0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3240>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INCQ -0x100(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x108(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R9,%RCX,8),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x78(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP (%R10,%RCX,8),%R9	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JG 4706c6 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f56>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x128(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%RCX,%R10,8),%XMM11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM11,%XMM12	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM12,%XMM15	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JA 471a78 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3308>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INCQ -0x100(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x108(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R9,%RCX,8),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x78(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP (%R10,%RCX,8),%R9	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JG 470710 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1fa0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x128(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%RCX,%R10,8),%XMM3	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM3,%XMM14	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM14,%XMM15	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JA 471a50 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x32e0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INCQ -0x100(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x108(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R9,%RCX,8),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x78(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP (%R10,%RCX,8),%R9	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JG 470759 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1fe9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x128(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%RCX,%R10,8),%XMM4	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM4,%XMM7	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM7,%XMM15	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 470759 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1fe9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VADDSD %XMM4,%XMM2,%XMM2	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
INCQ -0x100(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x108(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R9,%RCX,8),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x78(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP (%R10,%RCX,8),%R9	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JLE 4711bc <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2a4c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INCQ -0x100(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x108(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R9,%RCX,8),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x78(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP (%R10,%RCX,8),%R9	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JLE 471182 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2a12>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INCQ -0x100(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x160(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %R9,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 470970 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2200>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RDX,-0x190(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDI,-0x170(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R15,-0x180(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R14,-0x188(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RAX,-0x100(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R10,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R13,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x60(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x108(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x78(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x158(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x128(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R10,-0x158(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R15,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x170(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x180(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x188(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x190(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0x100(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VXORPD %XMM15,%XMM15,%XMM15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VCOMISD %XMM15,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JE 46fabe <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x134e>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0xd0(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VDIVSD %XMM2,%XMM13,%XMM7	1	1	0	0	0	0	0	0	0	0	0	0	0	13-15	4	scal (12.5%)
CMP %R10,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JL 470f82 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2812>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x160(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x158(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JMP 471316 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2ba6>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
VDIVSD %XMM2,%XMM13,%XMM7	1	1	0	0	0	0	0	0	0	0	0	0	0	13-15	4	scal (12.5%)
MOV -0xd0(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RDI,%RBX,8),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RBX,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOT %R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RCX,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV (%R13,%R9,8),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R9,-0x100(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VXORPD %XMM2,%XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
AND $0x3,%R10D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
CMP %RCX,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JG 47175a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2fea>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VMOVSD (%R15,%RBX,8),%XMM13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM13,%XMM3	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM3,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JA 471749 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2fd9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA 0x1(%RBX),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0xd0(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RBX,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 4712e7 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2b77>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
TEST %R10,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 471090 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2920>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x1,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 471056 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x28e6>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x2,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 47101a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x28aa>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV (%RDI,%R9,8),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R13,%RBX,8),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %R10,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JG 471b29 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x33b9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VMOVSD (%R15,%R9,8),%XMM9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM9,%XMM8	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM8,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JA 471b17 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x33a7>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INC %R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%RDI,%R9,8),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R13,%R10,8),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RBX,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JG 47104a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x28da>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VMOVSD (%R15,%R9,8),%XMM15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM15,%XMM13	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM13,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 471053 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x28e3>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x48(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RCX,%RBX,8),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VFMADD213SD (%RBX),%XMM7,%XMM15	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM15,(%RBX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMP %RAX,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 471a59 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x32e9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INC %R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%RDI,%R9,8),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R13,%R10,8),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RBX,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JG 4717d2 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3062>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VMOVSD (%R15,%R9,8),%XMM4	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM4,%XMM9	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM9,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JA 4717c1 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3051>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0xd0(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %R10,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 4712e7 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2b77>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RSI,-0x100(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 471149 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x29d9>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV -0x128(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%RCX,%R10,8),%XMM11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM11,%XMM12	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM12,%XMM15	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 4707af <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x203f>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VADDSD %XMM11,%XMM2,%XMM2	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
JMP 4707af <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x203f>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
VADDSD %XMM9,%XMM2,%XMM2	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
INC %R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 46f9aa <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x123a>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV -0x128(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%RCX,%R10,8),%XMM8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM8,%XMM9	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM9,%XMM15	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 470784 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2014>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VADDSD %XMM8,%XMM2,%XMM2	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
JMP 470784 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2014>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV -0x100(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMPQ $0x1,-0xa8(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JLE 46f52a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xdba>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x148(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R10,%RSI,8),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x8(%R10,%R8,1),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R9,-0x158(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R8,-0x160(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R9,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %R8,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 46f52a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xdba>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0xf8(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
SUB %R10,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV 0xc8(%RBX),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R8,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VXORPD %XMM2,%XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
AND $0x7,%EBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
JE 471582 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2e12>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x1,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 47153d <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2dcd>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x2,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 4714f0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2d80>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x3,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 4714a3 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2d33>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x4,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 471457 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2ce7>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x5,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 47140b <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2c9b>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x6,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 4713be <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2c4e>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x108(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RSI,%R10,8),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R8,%R9,8),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RSI,-0x78(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JG 4713b7 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2c47>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x128(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%RBX,%R10,8),%XMM11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM11,%XMM12	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM12,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 4713b7 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2c47>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA (%RCX,%RSI,8),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VFMADD213SD (%R10),%XMM7,%XMM11	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM11,(%R10)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INCQ -0x158(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x108(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x158(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R9,%R8,8),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RBX,%RSI,8),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %R10,-0x78(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JG 471404 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2c94>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x128(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%R9,%R8,8),%XMM15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM15,%XMM8	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM8,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 471404 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2c94>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA (%RCX,%R10,8),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VFMADD213SD (%R8),%XMM7,%XMM15	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM15,(%R8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INCQ -0x158(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x108(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x158(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RSI,%R10,8),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RBX,%R9,8),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %R8,-0x78(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JG 471450 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2ce0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x128(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%RSI,%R10,8),%XMM13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM13,%XMM3	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM3,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 471450 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2ce0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA (%RCX,%R8,8),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VFMADD213SD (%R10),%XMM7,%XMM13	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM13,(%R10)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INCQ -0x158(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x108(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x158(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R9,%R8,8),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RBX,%RSI,8),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %R10,-0x78(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JG 47149c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2d2c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x128(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%R9,%R8,8),%XMM14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM14,%XMM4	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM4,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 47149c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2d2c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA (%RCX,%R10,8),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VFMADD213SD (%R8),%XMM7,%XMM14	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM14,(%R8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INCQ -0x158(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x108(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x158(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RSI,%R10,8),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RBX,%R9,8),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %R8,-0x78(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JG 4714e9 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2d79>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x128(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%RSI,%R10,8),%XMM9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM9,%XMM11	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM11,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 4714e9 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2d79>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA (%RCX,%R8,8),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VFMADD213SD (%R10),%XMM7,%XMM9	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM9,(%R10)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INCQ -0x158(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x108(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x158(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R9,%R8,8),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RBX,%RSI,8),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %R10,-0x78(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JG 471536 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2dc6>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x128(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%R9,%R8,8),%XMM12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM12,%XMM15	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM15,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 471536 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2dc6>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA (%RCX,%R10,8),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VFMADD213SD (%R8),%XMM7,%XMM12	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM12,(%R8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INCQ -0x158(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x108(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x158(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RSI,%R10,8),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RBX,%R9,8),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %R8,-0x78(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JLE 4719dd <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x326d>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INCQ -0x158(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV -0x160(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x158(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R9,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RBX,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 46f52a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xdba>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R13,-0xd0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RAX,-0x100(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x60(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x108(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x78(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x128(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0xd0(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JMP 46f52a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xdba>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV -0x48(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R9,%RCX,8),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VFMADD213SD (%RCX),%XMM7,%XMM13	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM13,(%RCX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMP %RAX,-0x100(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JNE 470fc7 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2857>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VMOVSD (%R15,%RBX,8),%XMM14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM14,%XMM4	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM4,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 470fc7 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2857>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VFMADD231SD %XMM14,%XMM7,%XMM1	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
JMP 470fc7 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2857>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV -0x48(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RCX,%RBX,8),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VFMADD213SD (%RBX),%XMM7,%XMM4	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM4,(%RBX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMP %RAX,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JNE 47107d <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x290d>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VMOVSD (%R15,%R9,8),%XMM11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM11,%XMM8	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM8,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 47107d <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x290d>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VFMADD231SD %XMM11,%XMM7,%XMM1	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
JMP 47107d <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x290d>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV -0x38(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMPQ $0x1,-0xa8(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
VMOVSD (%R15,%R9,8),%XMM13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JG 470598 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1e28>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VXORPD %XMM2,%XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VCOMISD %XMM2,%XMM5	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JE 46fabe <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x134e>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
JMP 46f52a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xdba>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV -0x128(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%RCX,%R10,8),%XMM8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM8,%XMM9	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM9,%XMM15	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 47067c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f0c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VADDSD %XMM8,%XMM2,%XMM2	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
JMP 47067c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f0c>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV -0x128(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%RSI,%R10,8),%XMM13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM13,%XMM8	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM8,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 471561 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2df1>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA (%RCX,%R8,8),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VFMADD213SD (%R10),%XMM7,%XMM13	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM13,(%R10)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 471561 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2df1>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
VADDSD %XMM3,%XMM2,%XMM2	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
JMP 470710 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1fa0>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
VMOVSD (%R15,%R9,8),%XMM3	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM3,%XMM14	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM14,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 471053 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x28e3>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VFMADD231SD %XMM3,%XMM7,%XMM1	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
JMP 471053 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x28e3>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
VADDSD %XMM11,%XMM2,%XMM2	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
JMP 4706c6 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f56>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
VXORPD %XMM14,%XMM14,%XMM14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VCOMISD %XMM14,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JE 46fabe <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x134e>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0xd0(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VDIVSD %XMM2,%XMM13,%XMM7	1	1	0	0	0	0	0	0	0	0	0	0	0	13-15	4	scal (12.5%)
CMP %R10,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JL 470f82 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2812>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
JMP 46f52a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xdba>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV -0x48(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RCX,%R10,8),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VFMADD213SD (%R10),%XMM7,%XMM9	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM9,(%R10)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMP %RAX,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JNE 471017 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x28a7>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VMOVSD (%R15,%R9,8),%XMM11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM0,%XMM11,%XMM12	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM12,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JBE 471017 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x28a7>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VFMADD231SD %XMM11,%XMM7,%XMM1	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
JMP 471017 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x28a7>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

FMA

Workaround

Complex instructions

Details

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

FMA

Workaround

Complex instructions

Details

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code