OV - exec - Loop 584

	Loop Id: 584	Module: exec	Source: par_multi_interp.c:944-970	Coverage: 0.84%

0x4624a0 INC	%RDX

0x4624a3 CMP	%R8,%RDX

0x4624a6 JGE	462920

0x4624ac MOV	-0x40(%RBP),%RSI

0x4624b0 MOV	(%RSI,%RDX,8),%RSI

0x4624b4 LEA	(,%RSI,8),%R12

0x4624bc CMP	%R9,(%R14,%RSI,8)

0x4624c0 JNE	4624a0

0x4624c2 MOV	-0x80(%RBP),%R8

0x4624c6 MOV	-0x60(%RBP),%RBX

0x4624ca MOV	(%R8,%RSI,8),%R8

0x4624ce MOV	0x8(%RBX,%R12,1),%R10

0x4624d3 ADD	%R8,%R10

0x4624d6 MOV	%R10,-0x88(%RBP)

0x4624dd CMP	%R10,%R8

0x4624e0 JGE	4626d8

0x4624e6 MOV	-0x70(%RBP),%RBX

0x4624ea MOV	-0xe8(%RBP),%R10

0x4624f1 MOV	-0x8(%R10,%RBX,1),%R10

0x4624f6 MOV	-0x88(%RBP),%RBX

0x4624fd LEA	(%R10,%R8,8),%R8

0x462501 LEA	(%R10,%RBX,8),%R10

0x462505 MOV	%R10,-0x88(%RBP)

0x46250c SUB	%R8,%R10

0x46250f SUB	$0x8,%R10

0x462513 SHR	$0x3,%R10

0x462517 INC	%R10

0x46251a AND	$0x7,%R10D

0x46251e JE	46260c

0x462524 CMP	$0x1,%R10

0x462528 JE	4625e6

0x46252e CMP	$0x2,%R10

0x462532 JE	4625cd

0x462538 CMP	$0x3,%R10

0x46253c JE	4625b4

0x46253e CMP	$0x4,%R10

0x462542 JE	46259b

0x462544 CMP	$0x5,%R10

0x462548 JE	462582

0x46254a CMP	$0x6,%R10

0x46254e JE	462569

0x462550 MOV	(%R8),%RBX

0x462553 LEA	(%R15,%RBX,8),%R10

0x462557 CMP	(%R10),%RAX

0x46255a JE	462565

0x46255c INCQ	(%R11)

0x46255f MOV	%RAX,(%R10)

0x462562 INC	%RDI

0x462565 ADD	$0x8,%R8

0x462569 MOV	(%R8),%RBX

0x46256c LEA	(%R15,%RBX,8),%R10

0x462570 CMP	(%R10),%RAX

0x462573 JE	46257e

0x462575 INCQ	(%R11)

0x462578 MOV	%RAX,(%R10)

0x46257b INC	%RDI

0x46257e ADD	$0x8,%R8

0x462582 MOV	(%R8),%RBX

0x462585 LEA	(%R15,%RBX,8),%R10

0x462589 CMP	(%R10),%RAX

0x46258c JE	462597

0x46258e INCQ	(%R11)

0x462591 MOV	%RAX,(%R10)

0x462594 INC	%RDI

0x462597 ADD	$0x8,%R8

0x46259b MOV	(%R8),%RBX

0x46259e LEA	(%R15,%RBX,8),%R10

0x4625a2 CMP	(%R10),%RAX

0x4625a5 JE	4625b0

0x4625a7 INCQ	(%R11)

0x4625aa MOV	%RAX,(%R10)

0x4625ad INC	%RDI

0x4625b0 ADD	$0x8,%R8

0x4625b4 MOV	(%R8),%RBX

0x4625b7 LEA	(%R15,%RBX,8),%R10

0x4625bb CMP	(%R10),%RAX

0x4625be JE	4625c9

0x4625c0 INCQ	(%R11)

0x4625c3 MOV	%RAX,(%R10)

0x4625c6 INC	%RDI

0x4625c9 ADD	$0x8,%R8

0x4625cd MOV	(%R8),%RBX

0x4625d0 LEA	(%R15,%RBX,8),%R10

0x4625d4 CMP	(%R10),%RAX

0x4625d7 JE	4625e2

0x4625d9 INCQ	(%R11)

0x4625dc MOV	%RAX,(%R10)

0x4625df INC	%RDI

0x4625e2 ADD	$0x8,%R8

0x4625e6 MOV	(%R8),%RBX

0x4625e9 LEA	(%R15,%RBX,8),%R10

0x4625ed CMP	(%R10),%RAX

0x4625f0 JE	4625fb

0x4625f2 INCQ	(%R11)

0x4625f5 MOV	%RAX,(%R10)

0x4625f8 INC	%RDI

0x4625fb ADD	$0x8,%R8

0x4625ff CMP	%R8,-0x88(%RBP)

0x462606 JE	4626d8

0x46260c MOV	-0x38(%RBP),%R10

  (586) 0x462610 MOV	(%R8),%RBX

  (586) 0x462613 LEA	(%R15,%RBX,8),%RBX

  (586) 0x462617 CMP	(%RBX),%RAX

  (586) 0x46261a JE	462625

  (586) 0x46261c INCQ	(%R11)

  (586) 0x46261f MOV	%RAX,(%RBX)

  (586) 0x462622 INC	%RDI

  (586) 0x462625 LEA	0x8(%R8),%RBX

  (586) 0x462629 MOV	0x8(%R8),%R8

  (586) 0x46262d LEA	(%R15,%R8,8),%R8

  (586) 0x462631 CMP	(%R8),%RAX

  (586) 0x462634 JE	46263f

  (586) 0x462636 INCQ	(%R11)

  (586) 0x462639 MOV	%RAX,(%R8)

  (586) 0x46263c INC	%RDI

  (586) 0x46263f MOV	0x8(%RBX),%R8

  (586) 0x462643 LEA	(%R15,%R8,8),%R8

  (586) 0x462647 CMP	(%R8),%RAX

  (586) 0x46264a JE	462655

  (586) 0x46264c INCQ	(%R11)

  (586) 0x46264f MOV	%RAX,(%R8)

  (586) 0x462652 INC	%RDI

  (586) 0x462655 MOV	0x10(%RBX),%R8

  (586) 0x462659 LEA	(%R15,%R8,8),%R8

  (586) 0x46265d CMP	(%R8),%RAX

  (586) 0x462660 JE	46266b

  (586) 0x462662 INCQ	(%R11)

  (586) 0x462665 MOV	%RAX,(%R8)

  (586) 0x462668 INC	%RDI

  (586) 0x46266b MOV	0x18(%RBX),%R8

  (586) 0x46266f LEA	(%R15,%R8,8),%R8

  (586) 0x462673 CMP	(%R8),%RAX

  (586) 0x462676 JE	462681

  (586) 0x462678 INCQ	(%R11)

  (586) 0x46267b MOV	%RAX,(%R8)

  (586) 0x46267e INC	%RDI

  (586) 0x462681 MOV	0x20(%RBX),%R8

  (586) 0x462685 LEA	(%R15,%R8,8),%R8

  (586) 0x462689 CMP	(%R8),%RAX

  (586) 0x46268c JE	462697

  (586) 0x46268e INCQ	(%R11)

  (586) 0x462691 MOV	%RAX,(%R8)

  (586) 0x462694 INC	%RDI

  (586) 0x462697 MOV	0x28(%RBX),%R8

  (586) 0x46269b LEA	(%R15,%R8,8),%R8

  (586) 0x46269f CMP	(%R8),%RAX

  (586) 0x4626a2 JE	4626ad

  (586) 0x4626a4 INCQ	(%R11)

  (586) 0x4626a7 MOV	%RAX,(%R8)

  (586) 0x4626aa INC	%RDI

  (586) 0x4626ad MOV	0x30(%RBX),%R8

  (586) 0x4626b1 LEA	(%R15,%R8,8),%R8

  (586) 0x4626b5 CMP	(%R8),%RAX

  (586) 0x4626b8 JE	4626c3

  (586) 0x4626ba INCQ	(%R11)

  (586) 0x4626bd MOV	%RAX,(%R8)

  (586) 0x4626c0 INC	%RDI

  (586) 0x4626c3 LEA	0x38(%RBX),%R8

  (586) 0x4626c7 CMP	%R8,-0x88(%RBP)

  (586) 0x4626ce JNE	462610

0x4626d4 MOV	%R10,-0x38(%RBP)

0x4626d8 MOV	-0x78(%RBP),%R10

0x4626dc MOV	-0x58(%RBP),%RBX

0x4626e0 MOV	(%R10,%RSI,8),%RSI

0x4626e4 MOV	0x8(%RBX,%R12,1),%R12

0x4626e9 ADD	%RSI,%R12

0x4626ec CMP	%R12,%RSI

0x4626ef JGE	462903

0x4626f5 MOV	-0xe0(%RBP),%R8

0x4626fc MOV	-0x70(%RBP),%R10

0x462700 MOV	-0x8(%R8,%R10,1),%RBX

0x462705 LEA	(%RBX,%R12,8),%R12

0x462709 LEA	(%RBX,%RSI,8),%RSI

0x46270d MOV	%R12,%R8

0x462710 SUB	%RSI,%R8

0x462713 SUB	$0x8,%R8

0x462717 SHR	$0x3,%R8

0x46271b INC	%R8

0x46271e AND	$0x7,%R8D

0x462722 JE	462833

0x462728 CMP	$0x1,%R8

0x46272c JE	46280c

0x462732 CMP	$0x2,%R8

0x462736 JE	4627ee

0x46273c CMP	$0x3,%R8

0x462740 JE	4627d0

0x462746 CMP	$0x4,%R8

0x46274a JE	4627b2

0x46274c CMP	$0x5,%R8

0x462750 JE	462794

0x462752 CMP	$0x6,%R8

0x462756 JE	462776

0x462758 MOV	(%RSI),%R10

0x46275b LEA	(%R13,%R10,8),%RBX

0x462760 CMP	(%RBX),%RAX

0x462763 JE	462772

0x462765 MOV	-0x38(%RBP),%R8

0x462769 INC	%RCX

0x46276c INCQ	(%R8)

0x46276f MOV	%RAX,(%RBX)

0x462772 ADD	$0x8,%RSI

0x462776 MOV	(%RSI),%R10

0x462779 LEA	(%R13,%R10,8),%RBX

0x46277e CMP	(%RBX),%RAX

0x462781 JE	462790

0x462783 MOV	-0x38(%RBP),%R8

0x462787 INC	%RCX

0x46278a INCQ	(%R8)

0x46278d MOV	%RAX,(%RBX)

0x462790 ADD	$0x8,%RSI

0x462794 MOV	(%RSI),%R10

0x462797 LEA	(%R13,%R10,8),%RBX

0x46279c CMP	(%RBX),%RAX

0x46279f JE	4627ae

0x4627a1 MOV	-0x38(%RBP),%R8

0x4627a5 INC	%RCX

0x4627a8 INCQ	(%R8)

0x4627ab MOV	%RAX,(%RBX)

0x4627ae ADD	$0x8,%RSI

0x4627b2 MOV	(%RSI),%R10

0x4627b5 LEA	(%R13,%R10,8),%RBX

0x4627ba CMP	(%RBX),%RAX

0x4627bd JE	4627cc

0x4627bf MOV	-0x38(%RBP),%R8

0x4627c3 INC	%RCX

0x4627c6 INCQ	(%R8)

0x4627c9 MOV	%RAX,(%RBX)

0x4627cc ADD	$0x8,%RSI

0x4627d0 MOV	(%RSI),%R10

0x4627d3 LEA	(%R13,%R10,8),%RBX

0x4627d8 CMP	(%RBX),%RAX

0x4627db JE	4627ea

0x4627dd MOV	-0x38(%RBP),%R8

0x4627e1 INC	%RCX

0x4627e4 INCQ	(%R8)

0x4627e7 MOV	%RAX,(%RBX)

0x4627ea ADD	$0x8,%RSI

0x4627ee MOV	(%RSI),%R10

0x4627f1 LEA	(%R13,%R10,8),%RBX

0x4627f6 CMP	(%RBX),%RAX

0x4627f9 JE	462808

0x4627fb MOV	-0x38(%RBP),%R8

0x4627ff INC	%RCX

0x462802 INCQ	(%R8)

0x462805 MOV	%RAX,(%RBX)

0x462808 ADD	$0x8,%RSI

0x46280c MOV	(%RSI),%R10

0x46280f LEA	(%R13,%R10,8),%RBX

0x462814 CMP	(%RBX),%RAX

0x462817 JE	462826

0x462819 MOV	-0x38(%RBP),%R8

0x46281d INC	%RCX

0x462820 INCQ	(%R8)

0x462823 MOV	%RAX,(%RBX)

0x462826 ADD	$0x8,%RSI

0x46282a CMP	%RSI,%R12

0x46282d JE	462903

0x462833 MOV	-0x38(%RBP),%R10

  (585) 0x462837 MOV	(%RSI),%RBX

  (585) 0x46283a LEA	(%R13,%RBX,8),%R8

  (585) 0x46283f CMP	(%R8),%RAX

  (585) 0x462842 JE	46284d

  (585) 0x462844 INCQ	(%R10)

  (585) 0x462847 MOV	%RAX,(%R8)

  (585) 0x46284a INC	%RCX

  (585) 0x46284d LEA	0x8(%RSI),%RBX

  (585) 0x462851 MOV	0x8(%RSI),%RSI

  (585) 0x462855 LEA	(%R13,%RSI,8),%R8

  (585) 0x46285a CMP	(%R8),%RAX

  (585) 0x46285d JE	462868

  (585) 0x46285f INCQ	(%R10)

  (585) 0x462862 MOV	%RAX,(%R8)

  (585) 0x462865 INC	%RCX

  (585) 0x462868 MOV	0x8(%RBX),%RSI

  (585) 0x46286c LEA	(%R13,%RSI,8),%R8

  (585) 0x462871 CMP	(%R8),%RAX

  (585) 0x462874 JE	46287f

  (585) 0x462876 INCQ	(%R10)

  (585) 0x462879 MOV	%RAX,(%R8)

  (585) 0x46287c INC	%RCX

  (585) 0x46287f MOV	0x10(%RBX),%RSI

  (585) 0x462883 LEA	(%R13,%RSI,8),%R8

  (585) 0x462888 CMP	(%R8),%RAX

  (585) 0x46288b JE	462896

  (585) 0x46288d INCQ	(%R10)

  (585) 0x462890 MOV	%RAX,(%R8)

  (585) 0x462893 INC	%RCX

  (585) 0x462896 MOV	0x18(%RBX),%RSI

  (585) 0x46289a LEA	(%R13,%RSI,8),%R8

  (585) 0x46289f CMP	(%R8),%RAX

  (585) 0x4628a2 JE	4628ad

  (585) 0x4628a4 INCQ	(%R10)

  (585) 0x4628a7 MOV	%RAX,(%R8)

  (585) 0x4628aa INC	%RCX

  (585) 0x4628ad MOV	0x20(%RBX),%RSI

  (585) 0x4628b1 LEA	(%R13,%RSI,8),%R8

  (585) 0x4628b6 CMP	(%R8),%RAX

  (585) 0x4628b9 JE	4628c4

  (585) 0x4628bb INCQ	(%R10)

  (585) 0x4628be MOV	%RAX,(%R8)

  (585) 0x4628c1 INC	%RCX

  (585) 0x4628c4 MOV	0x28(%RBX),%RSI

  (585) 0x4628c8 LEA	(%R13,%RSI,8),%R8

  (585) 0x4628cd CMP	(%R8),%RAX

  (585) 0x4628d0 JE	4628db

  (585) 0x4628d2 INCQ	(%R10)

  (585) 0x4628d5 MOV	%RAX,(%R8)

  (585) 0x4628d8 INC	%RCX

  (585) 0x4628db MOV	0x30(%RBX),%RSI

  (585) 0x4628df LEA	(%R13,%RSI,8),%R8

  (585) 0x4628e4 CMP	(%R8),%RAX

  (585) 0x4628e7 JE	4628f2

  (585) 0x4628e9 INCQ	(%R10)

  (585) 0x4628ec MOV	%RAX,(%R8)

  (585) 0x4628ef INC	%RCX

  (585) 0x4628f2 LEA	0x38(%RBX),%RSI

  (585) 0x4628f6 CMP	%RSI,%R12

  (585) 0x4628f9 JNE	462837

0x4628ff MOV	%R10,-0x38(%RBP)

0x462903 MOV	-0x90(%RBP),%R12

0x46290a INC	%RDX

0x46290d MOV	(%R12),%R8

0x462911 CMP	%R8,%RDX

0x462914 JL	4624ac

/home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 944 - 970

--------------------------------------------------------------------------------

944:              for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++)

945:              {

946:                 j1 = S_diag_j[j];

947:                 if (assigned[j1] == pass-1)

948:                 {

949:                    j_start = P_diag_start[j1];

950:                    j_end = j_start+P_diag_i[j1+1];

951:                    for (k=j_start; k < j_end; k++)

952:                    {

953:                       k1 = P_diag_pass[pass-1][k];

954:                       if (P_marker[k1] != i1)

955:                       {

956:                          cnt_nz++;

957:                          P_diag_i[i1+1]++;

958:                          P_marker[k1] = i1;

959:                       }

960:                    }

961:                    j_start = P_offd_start[j1];

962:                    j_end = j_start+P_offd_i[j1+1];

963:                    for (k=j_start; k < j_end; k++)

964:                    {

965:                       k1 = P_offd_pass[pass-1][k];

966:                       if (P_marker_offd[k1] != i1)

967:                       {

968:                          cnt_nz_offd++;

969:                          P_offd_i[i1+1]++;

970:                          P_marker_offd[k1] = i1;

Coverage (%)	Name	Source Location	Module
○98.29	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○1.71	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0

Path /

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	8.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.61
Bottlenecks	micro-operation queue,
Function	hypre_BoomerAMGBuildMultipass._omp_fn.5
Source	par_multi_interp.c:944-944,par_multi_interp.c:947-958,par_multi_interp.c:961-970
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	38.67
CQA cycles if no scalar integer	38.67
CQA cycles if FP arith vectorized	38.67
CQA cycles if fully vectorized	4.83
Front-end cycles	38.67
P0 cycles	18.50
P1 cycles	17.40
P2 cycles	24.00
P3 cycles	24.00
P4 cycles	16.00
P5 cycles	17.40
P6 cycles	18.50
P7 cycles	16.00
P8 cycles	16.00
P9 cycles	16.00
P10 cycles	17.20
P11 cycles	24.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	204.00
Nb uops	231.00
Nb loads	72.00
Nb stores	32.00
Nb stack references	11.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	21.52
Bytes prefetched	0.00
Bytes loaded	576.00
Bytes stored	256.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	12.50
Vector-efficiency ratio load	12.50
Vector-efficiency ratio store	12.50
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	12.50
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	12.50

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	8.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.61
Bottlenecks	micro-operation queue,
Function	hypre_BoomerAMGBuildMultipass._omp_fn.5
Source	par_multi_interp.c:944-944,par_multi_interp.c:947-958,par_multi_interp.c:961-970
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	38.67
CQA cycles if no scalar integer	38.67
CQA cycles if FP arith vectorized	38.67
CQA cycles if fully vectorized	4.83
Front-end cycles	38.67
P0 cycles	18.50
P1 cycles	17.40
P2 cycles	24.00
P3 cycles	24.00
P4 cycles	16.00
P5 cycles	17.40
P6 cycles	18.50
P7 cycles	16.00
P8 cycles	16.00
P9 cycles	16.00
P10 cycles	17.20
P11 cycles	24.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	204.00
Nb uops	231.00
Nb loads	72.00
Nb stores	32.00
Nb stack references	11.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	21.52
Bytes prefetched	0.00
Bytes loaded	576.00
Bytes stored	256.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	12.50
Vector-efficiency ratio load	12.50
Vector-efficiency ratio store	12.50
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	12.50
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	12.50

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	hypre_BoomerAMGBuildMultipass._omp_fn.5
Source file and lines	par_multi_interp.c:944-970
Module	exec

The loop is defined in /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:944-970.

Analyzed code is defined in /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:944,947-958,961-970.

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Failed to get the number of paths (too many, greater than internal limit = 100000)
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is very high. Force analysis with --force-loop-streams-analysis: expect potentially high RAM/CPU footprint

Try to simplify control.

gain
potential
hint
expert

Vectorization

Your loop is not vectorized. 8 data elements could be processed at once in vector registers. By vectorizing your loop, you can lower the cost of an iteration from 38.67 to 4.83 cycles (8.00x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

INC: 14 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:957
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:957
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:957
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:957
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:957
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:957
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:957
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:969
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:969
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:969
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:969
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:969
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:969
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:969

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This loop is probably writing/copying data or processing integer elements.

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 576 bytes. The binary loop is storing 256 bytes.

General properties

nb instructions	204
nb uops	231
loop length	750
used x86 registers	15
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	11

Front-end

ASSUMED MACRO FUSION FIT IN UOP CACHE

micro-operation queue	38.67 cycles
front end	38.67 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	18.50	17.40	24.00	24.00	16.00	17.40	18.50	16.00	16.00	16.00	17.20	24.00
cycles	18.50	17.40	24.00	24.00	16.00	17.40	18.50	16.00	16.00	16.00	17.20	24.00

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	38.67
Dispatch	24.00
Overall L1	38.67

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 38.67 cycles. At this rate:

7% of peak load performance is reached (14.90 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (6.62 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 38.67 to 24.00 cycles (1.61x speedup).

ASM code

In the binary file, the address of the loop is: 4624ac

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
INC %RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %R8,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 462920 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x750>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x40(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RSI,%RDX,8),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (,%RSI,8),%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %R9,(%R14,%RSI,8)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JNE 4624a0 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x2d0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x80(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R8,%RSI,8),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x8(%RBX,%R12,1),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %R8,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R10,-0x88(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMP %R10,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 4626d8 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x508>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x70(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0xe8(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x8(%R10,%RBX,1),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x88(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R10,%R8,8),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R10,%RBX,8),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R10,-0x88(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
SUB %R8,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SUB $0x8,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SHR $0x3,%R10	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
INC %R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $0x7,%R10D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
JE 46260c <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x43c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x1,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 4625e6 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x416>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x2,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 4625cd <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x3fd>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x3,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 4625b4 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x3e4>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x4,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 46259b <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x3cb>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x5,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 462582 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x3b2>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x6,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 462569 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x399>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV (%R8),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R15,%RBX,8),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP (%R10),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 462565 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x395>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INCQ (%R11)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV %RAX,(%R10)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INC %RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
ADD $0x8,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%R8),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R15,%RBX,8),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP (%R10),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 46257e <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x3ae>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INCQ (%R11)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV %RAX,(%R10)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INC %RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
ADD $0x8,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%R8),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R15,%RBX,8),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP (%R10),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 462597 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x3c7>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INCQ (%R11)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV %RAX,(%R10)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INC %RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
ADD $0x8,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%R8),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R15,%RBX,8),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP (%R10),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 4625b0 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x3e0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INCQ (%R11)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV %RAX,(%R10)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INC %RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
ADD $0x8,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%R8),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R15,%RBX,8),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP (%R10),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 4625c9 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x3f9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INCQ (%R11)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV %RAX,(%R10)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INC %RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
ADD $0x8,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%R8),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R15,%RBX,8),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP (%R10),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 4625e2 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x412>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INCQ (%R11)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV %RAX,(%R10)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INC %RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
ADD $0x8,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%R8),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R15,%RBX,8),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP (%R10),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 4625fb <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x42b>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INCQ (%R11)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV %RAX,(%R10)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INC %RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
ADD $0x8,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %R8,-0x88(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 4626d8 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x508>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R10,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x78(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x58(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R10,%RSI,8),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x8(%RBX,%R12,1),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %RSI,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CMP %R12,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 462903 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x733>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0xe0(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x70(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x8(%R8,%R10,1),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RBX,%R12,8),%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%RBX,%RSI,8),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R12,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RSI,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SUB $0x8,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SHR $0x3,%R8	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
INC %R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $0x7,%R8D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
JE 462833 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x663>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x1,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 46280c <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x63c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x2,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 4627ee <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x61e>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x3,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 4627d0 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x600>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x4,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 4627b2 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x5e2>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x5,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 462794 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x5c4>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x6,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 462776 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x5a6>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV (%RSI),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R13,%R10,8),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP (%RBX),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 462772 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x5a2>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
INCQ (%R8)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV %RAX,(%RBX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
ADD $0x8,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%RSI),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R13,%R10,8),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP (%RBX),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 462790 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x5c0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
INCQ (%R8)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV %RAX,(%RBX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
ADD $0x8,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%RSI),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R13,%R10,8),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP (%RBX),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 4627ae <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x5de>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
INCQ (%R8)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV %RAX,(%RBX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
ADD $0x8,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%RSI),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R13,%R10,8),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP (%RBX),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 4627cc <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x5fc>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
INCQ (%R8)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV %RAX,(%RBX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
ADD $0x8,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%RSI),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R13,%R10,8),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP (%RBX),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 4627ea <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x61a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
INCQ (%R8)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV %RAX,(%RBX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
ADD $0x8,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%RSI),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R13,%R10,8),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP (%RBX),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 462808 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x638>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
INCQ (%R8)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV %RAX,(%RBX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
ADD $0x8,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%RSI),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R13,%R10,8),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP (%RBX),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 462826 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x656>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
INCQ (%R8)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV %RAX,(%RBX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
ADD $0x8,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RSI,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 462903 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x733>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R10,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x90(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%R12),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %R8,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JL 4624ac <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x2dc>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A

Function	hypre_BoomerAMGBuildMultipass._omp_fn.5
Source file and lines	par_multi_interp.c:944-970
Module	exec

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Failed to get the number of paths (too many, greater than internal limit = 100000)
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is very high. Force analysis with --force-loop-streams-analysis: expect potentially high RAM/CPU footprint

Try to simplify control.

gain
potential
hint
expert

Vectorization

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

INC: 14 occurrences►
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:957
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:957
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:957
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:957
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:957
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:957
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:957
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:969
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:969
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:969
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:969
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:969
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:969
- /home/eoseret/qaas_runs_GNR/173-927-0874/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:969

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This loop is probably writing/copying data or processing integer elements.

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 576 bytes. The binary loop is storing 256 bytes.

General properties

nb instructions	204
nb uops	231
loop length	750
used x86 registers	15
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	11

Front-end

ASSUMED MACRO FUSION FIT IN UOP CACHE

micro-operation queue	38.67 cycles
front end	38.67 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	18.50	17.40	24.00	24.00	16.00	17.40	18.50	16.00	16.00	16.00	17.20	24.00
cycles	18.50	17.40	24.00	24.00	16.00	17.40	18.50	16.00	16.00	16.00	17.20	24.00

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	38.67
Dispatch	24.00
Overall L1	38.67

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 38.67 cycles. At this rate:

7% of peak load performance is reached (14.90 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (6.62 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the loop is: 4624ac

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
INC %RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %R8,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 462920 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x750>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x40(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RSI,%RDX,8),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (,%RSI,8),%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %R9,(%R14,%RSI,8)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JNE 4624a0 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x2d0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x80(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R8,%RSI,8),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x8(%RBX,%R12,1),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %R8,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R10,-0x88(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMP %R10,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 4626d8 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x508>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x70(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0xe8(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x8(%R10,%RBX,1),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x88(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R10,%R8,8),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R10,%RBX,8),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R10,-0x88(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
SUB %R8,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SUB $0x8,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SHR $0x3,%R10	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
INC %R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $0x7,%R10D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
JE 46260c <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x43c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x1,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 4625e6 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x416>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x2,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 4625cd <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x3fd>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x3,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 4625b4 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x3e4>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x4,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 46259b <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x3cb>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x5,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 462582 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x3b2>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x6,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 462569 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x399>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV (%R8),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R15,%RBX,8),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP (%R10),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 462565 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x395>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INCQ (%R11)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV %RAX,(%R10)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INC %RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
ADD $0x8,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%R8),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R15,%RBX,8),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP (%R10),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 46257e <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x3ae>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INCQ (%R11)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV %RAX,(%R10)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INC %RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
ADD $0x8,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%R8),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R15,%RBX,8),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP (%R10),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 462597 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x3c7>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INCQ (%R11)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV %RAX,(%R10)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INC %RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
ADD $0x8,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%R8),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R15,%RBX,8),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP (%R10),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 4625b0 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x3e0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INCQ (%R11)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV %RAX,(%R10)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INC %RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
ADD $0x8,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%R8),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R15,%RBX,8),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP (%R10),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 4625c9 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x3f9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INCQ (%R11)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV %RAX,(%R10)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INC %RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
ADD $0x8,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%R8),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R15,%RBX,8),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP (%R10),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 4625e2 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x412>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INCQ (%R11)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV %RAX,(%R10)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INC %RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
ADD $0x8,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%R8),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R15,%RBX,8),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP (%R10),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 4625fb <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x42b>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INCQ (%R11)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV %RAX,(%R10)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INC %RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
ADD $0x8,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %R8,-0x88(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 4626d8 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x508>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R10,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x78(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x58(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R10,%RSI,8),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x8(%RBX,%R12,1),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %RSI,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CMP %R12,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JGE 462903 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x733>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0xe0(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x70(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x8(%R8,%R10,1),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RBX,%R12,8),%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%RBX,%RSI,8),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R12,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RSI,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SUB $0x8,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SHR $0x3,%R8	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
INC %R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $0x7,%R8D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
JE 462833 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x663>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x1,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 46280c <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x63c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x2,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 4627ee <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x61e>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x3,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 4627d0 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x600>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x4,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 4627b2 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x5e2>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x5,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 462794 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x5c4>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x6,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 462776 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x5a6>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV (%RSI),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R13,%R10,8),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP (%RBX),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 462772 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x5a2>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
INCQ (%R8)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV %RAX,(%RBX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
ADD $0x8,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%RSI),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R13,%R10,8),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP (%RBX),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 462790 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x5c0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
INCQ (%R8)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV %RAX,(%RBX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
ADD $0x8,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%RSI),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R13,%R10,8),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP (%RBX),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 4627ae <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x5de>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
INCQ (%R8)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV %RAX,(%RBX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
ADD $0x8,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%RSI),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R13,%R10,8),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP (%RBX),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 4627cc <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x5fc>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
INCQ (%R8)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV %RAX,(%RBX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
ADD $0x8,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%RSI),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R13,%R10,8),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP (%RBX),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 4627ea <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x61a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
INCQ (%R8)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV %RAX,(%RBX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
ADD $0x8,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%RSI),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R13,%R10,8),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP (%RBX),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 462808 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x638>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
INCQ (%R8)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV %RAX,(%RBX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
ADD $0x8,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%RSI),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R13,%R10,8),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP (%RBX),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 462826 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x656>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
INCQ (%R8)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	scal (12.5%)
MOV %RAX,(%RBX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
ADD $0x8,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RSI,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 462903 <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x733>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x38(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R10,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x90(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%R12),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %R8,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JL 4624ac <hypre_BoomerAMGBuildMultipass._omp_fn.5+0x2dc>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A

Report Configuration

Vectorization

Details

Workaround

Execution units bottlenecks

Complex instructions

Details

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Vectorization

Details

Workaround

Execution units bottlenecks

Complex instructions

Details

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code